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AsanoRema
2026-08-06 18:56:32 +03:00
parent 9f2fd08ee5
commit d9d7ee49d2
2144 changed files with 1115424 additions and 1284 deletions
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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//
.version 8.0
.target sm_52
.address_size 64
// .globl oxMain
.const .align 16 .b8 params[1184];
.visible .entry oxMain()
{
.reg .pred %p<2>;
.reg .b16 %rs<53>;
.reg .f32 %f<134>;
.reg .b32 %r<42>;
.reg .b64 %rd<45>;
mov.u32 %r3, %ctaid.x;
mov.u32 %r4, %ntid.x;
mov.u32 %r5, %tid.x;
mad.lo.s32 %r1, %r3, %r4, %r5;
mov.u32 %r6, %ntid.y;
mov.u32 %r7, %ctaid.y;
mov.u32 %r8, %tid.y;
mad.lo.s32 %r2, %r7, %r6, %r8;
ld.const.u64 %rd4, [params+784];
cvta.to.global.u64 %rd5, %rd4;
ld.const.u32 %r9, [params+776];
mad.lo.s32 %r10, %r9, %r2, %r1;
mul.wide.u32 %rd6, %r10, 8;
add.s64 %rd7, %rd5, %rd6;
ld.global.u16 %rs1, [%rd7];
// begin inline asm
{ cvt.f32.f16 %f11, %rs1;}
// end inline asm
ld.global.u16 %rs2, [%rd7+2];
// begin inline asm
{ cvt.f32.f16 %f12, %rs2;}
// end inline asm
ld.global.u16 %rs3, [%rd7+4];
// begin inline asm
{ cvt.f32.f16 %f13, %rs3;}
// end inline asm
ld.const.u64 %rd8, [params+800];
cvta.to.global.u64 %rd9, %rd8;
ld.const.u32 %r11, [params+792];
mad.lo.s32 %r12, %r11, %r2, %r1;
mul.wide.u32 %rd10, %r12, 8;
add.s64 %rd11, %rd9, %rd10;
ld.global.u16 %rs4, [%rd11];
// begin inline asm
{ cvt.f32.f16 %f14, %rs4;}
// end inline asm
ld.global.u16 %rs5, [%rd11+2];
// begin inline asm
{ cvt.f32.f16 %f15, %rs5;}
// end inline asm
ld.global.u16 %rs6, [%rd11+4];
// begin inline asm
{ cvt.f32.f16 %f16, %rs6;}
// end inline asm
fma.rn.f32 %f41, %f14, 0f40000000, 0fBF800000;
fma.rn.f32 %f42, %f15, 0f40000000, 0fBF800000;
fma.rn.f32 %f43, %f16, 0f40000000, 0fBF800000;
ld.const.u64 %rd12, [params+816];
cvta.to.global.u64 %rd13, %rd12;
ld.const.u32 %r13, [params+808];
mad.lo.s32 %r14, %r13, %r2, %r1;
mul.wide.u32 %rd14, %r14, 8;
add.s64 %rd15, %rd13, %rd14;
ld.global.u16 %rs7, [%rd15];
// begin inline asm
{ cvt.f32.f16 %f17, %rs7;}
// end inline asm
ld.global.u16 %rs8, [%rd15+2];
// begin inline asm
{ cvt.f32.f16 %f18, %rs8;}
// end inline asm
ld.global.u16 %rs9, [%rd15+4];
// begin inline asm
{ cvt.f32.f16 %f19, %rs9;}
// end inline asm
fma.rn.f32 %f44, %f17, 0f40000000, 0fBF800000;
fma.rn.f32 %f45, %f18, 0f40000000, 0fBF800000;
fma.rn.f32 %f46, %f19, 0f40000000, 0fBF800000;
ld.const.u64 %rd16, [params+832];
cvta.to.global.u64 %rd17, %rd16;
ld.const.u32 %r15, [params+824];
mad.lo.s32 %r16, %r15, %r2, %r1;
mul.wide.u32 %rd18, %r16, 8;
add.s64 %rd19, %rd17, %rd18;
ld.global.u16 %rs10, [%rd19];
// begin inline asm
{ cvt.f32.f16 %f20, %rs10;}
// end inline asm
ld.global.u16 %rs11, [%rd19+2];
// begin inline asm
{ cvt.f32.f16 %f21, %rs11;}
// end inline asm
ld.global.u16 %rs12, [%rd19+4];
// begin inline asm
{ cvt.f32.f16 %f22, %rs12;}
// end inline asm
fma.rn.f32 %f47, %f20, 0f40000000, 0fBF800000;
fma.rn.f32 %f48, %f21, 0f40000000, 0fBF800000;
fma.rn.f32 %f49, %f22, 0f40000000, 0fBF800000;
ld.const.u64 %rd20, [params+928];
cvta.to.global.u64 %rd21, %rd20;
ld.const.u32 %r17, [params+920];
mad.lo.s32 %r18, %r17, %r2, %r1;
mul.wide.u32 %rd22, %r18, 8;
add.s64 %rd23, %rd21, %rd22;
ld.global.u16 %rs13, [%rd23];
// begin inline asm
{ cvt.f32.f16 %f23, %rs13;}
// end inline asm
ld.global.u16 %rs14, [%rd23+2];
// begin inline asm
{ cvt.f32.f16 %f24, %rs14;}
// end inline asm
ld.global.u16 %rs15, [%rd23+4];
// begin inline asm
{ cvt.f32.f16 %f25, %rs15;}
// end inline asm
ld.const.u64 %rd24, [params+944];
cvta.to.global.u64 %rd25, %rd24;
ld.const.u32 %r19, [params+936];
mad.lo.s32 %r20, %r19, %r2, %r1;
mul.wide.u32 %rd26, %r20, 8;
add.s64 %rd1, %rd25, %rd26;
ld.global.u16 %rs16, [%rd1];
// begin inline asm
{ cvt.f32.f16 %f26, %rs16;}
// end inline asm
ld.global.u16 %rs17, [%rd1+2];
// begin inline asm
{ cvt.f32.f16 %f27, %rs17;}
// end inline asm
ld.global.u16 %rs18, [%rd1+4];
// begin inline asm
{ cvt.f32.f16 %f28, %rs18;}
// end inline asm
fma.rn.f32 %f50, %f26, 0f40000000, 0fBF800000;
fma.rn.f32 %f51, %f27, 0f40000000, 0fBF800000;
fma.rn.f32 %f52, %f28, 0f40000000, 0fBF800000;
mul.f32 %f53, %f23, %f50;
mul.f32 %f54, %f24, %f51;
mul.f32 %f55, %f25, %f52;
ld.const.u64 %rd27, [params+960];
cvta.to.global.u64 %rd28, %rd27;
ld.const.u32 %r21, [params+952];
mad.lo.s32 %r22, %r21, %r2, %r1;
mul.wide.u32 %rd29, %r22, 8;
add.s64 %rd2, %rd28, %rd29;
ld.global.u16 %rs19, [%rd2];
// begin inline asm
{ cvt.f32.f16 %f29, %rs19;}
// end inline asm
ld.global.u16 %rs20, [%rd2+2];
// begin inline asm
{ cvt.f32.f16 %f30, %rs20;}
// end inline asm
ld.global.u16 %rs21, [%rd2+4];
// begin inline asm
{ cvt.f32.f16 %f31, %rs21;}
// end inline asm
fma.rn.f32 %f56, %f29, 0f40000000, 0fBF800000;
fma.rn.f32 %f57, %f30, 0f40000000, 0fBF800000;
fma.rn.f32 %f58, %f31, 0f40000000, 0fBF800000;
mul.f32 %f59, %f23, %f56;
mul.f32 %f60, %f24, %f57;
mul.f32 %f61, %f25, %f58;
ld.const.u64 %rd30, [params+976];
cvta.to.global.u64 %rd31, %rd30;
ld.const.u32 %r23, [params+968];
mad.lo.s32 %r24, %r23, %r2, %r1;
mul.wide.u32 %rd32, %r24, 8;
add.s64 %rd3, %rd31, %rd32;
ld.global.u16 %rs22, [%rd3];
// begin inline asm
{ cvt.f32.f16 %f32, %rs22;}
// end inline asm
ld.global.u16 %rs23, [%rd3+2];
// begin inline asm
{ cvt.f32.f16 %f33, %rs23;}
// end inline asm
ld.global.u16 %rs24, [%rd3+4];
// begin inline asm
{ cvt.f32.f16 %f34, %rs24;}
// end inline asm
fma.rn.f32 %f62, %f32, 0f40000000, 0fBF800000;
fma.rn.f32 %f63, %f33, 0f40000000, 0fBF800000;
fma.rn.f32 %f64, %f34, 0f40000000, 0fBF800000;
mul.f32 %f65, %f23, %f62;
mul.f32 %f66, %f24, %f63;
mul.f32 %f67, %f25, %f64;
ld.global.u16 %rs25, [%rd7+6];
// begin inline asm
{ cvt.f32.f16 %f35, %rs25;}
// end inline asm
ld.global.u16 %rs26, [%rd23+6];
// begin inline asm
{ cvt.f32.f16 %f36, %rs26;}
// end inline asm
min.f32 %f40, %f35, %f36;
add.f32 %f68, %f11, %f23;
add.f32 %f69, %f12, %f24;
add.f32 %f70, %f13, %f25;
fma.rn.f32 %f71, %f11, %f41, %f53;
fma.rn.f32 %f72, %f12, %f42, %f54;
fma.rn.f32 %f73, %f13, %f43, %f55;
fma.rn.f32 %f74, %f11, %f44, %f59;
fma.rn.f32 %f75, %f12, %f45, %f60;
fma.rn.f32 %f76, %f13, %f46, %f61;
fma.rn.f32 %f77, %f11, %f47, %f65;
fma.rn.f32 %f78, %f12, %f48, %f66;
fma.rn.f32 %f79, %f13, %f49, %f67;
mov.f32 %f80, 0f34000000;
max.f32 %f81, %f68, %f80;
max.f32 %f82, %f69, %f80;
max.f32 %f83, %f70, %f80;
div.rn.f32 %f84, %f71, %f81;
div.rn.f32 %f85, %f72, %f82;
div.rn.f32 %f86, %f73, %f83;
fma.rn.f32 %f87, %f84, 0f3F000000, 0f3F000000;
fma.rn.f32 %f88, %f85, 0f3F000000, 0f3F000000;
fma.rn.f32 %f89, %f86, 0f3F000000, 0f3F000000;
div.rn.f32 %f90, %f74, %f81;
div.rn.f32 %f91, %f75, %f82;
div.rn.f32 %f92, %f76, %f83;
fma.rn.f32 %f93, %f90, 0f3F000000, 0f3F000000;
fma.rn.f32 %f94, %f91, 0f3F000000, 0f3F000000;
fma.rn.f32 %f95, %f92, 0f3F000000, 0f3F000000;
div.rn.f32 %f96, %f77, %f81;
div.rn.f32 %f97, %f78, %f82;
div.rn.f32 %f98, %f79, %f83;
fma.rn.f32 %f99, %f96, 0f3F000000, 0f3F000000;
fma.rn.f32 %f100, %f97, 0f3F000000, 0f3F000000;
fma.rn.f32 %f101, %f98, 0f3F000000, 0f3F000000;
mul.f32 %f37, %f68, %f40;
mul.f32 %f38, %f69, %f40;
mul.f32 %f39, %f70, %f40;
mul.f32 %f2, %f40, %f87;
mul.f32 %f3, %f40, %f88;
mul.f32 %f4, %f40, %f89;
mul.f32 %f5, %f40, %f93;
mul.f32 %f6, %f40, %f94;
mul.f32 %f7, %f40, %f95;
mul.f32 %f8, %f40, %f99;
mul.f32 %f9, %f40, %f100;
mul.f32 %f10, %f40, %f101;
// begin inline asm
{ cvt.rn.f16.f32 %rs29, %f39;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs28, %f38;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs27, %f37;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs30, %f40;}
// end inline asm
st.global.v4.u16 [%rd23], {%rs27, %rs28, %rs29, %rs30};
ld.const.u32 %r25, [params+1112];
setp.gt.s32 %p1, %r25, 0;
@%p1 bra $L__BB0_2;
bra.uni $L__BB0_1;
$L__BB0_2:
mul.f32 %f114, %f2, 0f437F0000;
mov.f32 %f115, 0f437F0000;
min.f32 %f116, %f114, %f115;
mul.f32 %f117, %f3, 0f437F0000;
min.f32 %f118, %f117, %f115;
mul.f32 %f119, %f4, 0f437F0000;
min.f32 %f120, %f119, %f115;
mul.f32 %f121, %f5, 0f437F0000;
min.f32 %f122, %f121, %f115;
mul.f32 %f123, %f6, 0f437F0000;
min.f32 %f124, %f123, %f115;
mul.f32 %f125, %f7, 0f437F0000;
min.f32 %f126, %f125, %f115;
mul.f32 %f127, %f8, 0f437F0000;
min.f32 %f128, %f127, %f115;
mul.f32 %f129, %f9, 0f437F0000;
min.f32 %f130, %f129, %f115;
mul.f32 %f131, %f10, 0f437F0000;
min.f32 %f132, %f131, %f115;
ld.const.u64 %rd33, [params+1072];
cvta.to.global.u64 %rd34, %rd33;
ld.const.u32 %r26, [params+1064];
mad.lo.s32 %r27, %r26, %r2, %r1;
cvt.rzi.u32.f32 %r28, %f116;
cvt.rzi.u32.f32 %r29, %f118;
cvt.rzi.u32.f32 %r30, %f120;
mul.f32 %f133, %f40, 0f437F0000;
cvt.rzi.u32.f32 %r31, %f133;
mul.wide.u32 %rd35, %r27, 4;
add.s64 %rd36, %rd34, %rd35;
cvt.u16.u32 %rs43, %r30;
cvt.u16.u32 %rs44, %r29;
cvt.u16.u32 %rs45, %r28;
cvt.u16.u32 %rs46, %r31;
st.global.v4.u8 [%rd36], {%rs45, %rs44, %rs43, %rs46};
ld.const.u64 %rd37, [params+1088];
cvta.to.global.u64 %rd38, %rd37;
ld.const.u32 %r32, [params+1080];
mad.lo.s32 %r33, %r32, %r2, %r1;
cvt.rzi.u32.f32 %r34, %f122;
cvt.rzi.u32.f32 %r35, %f124;
cvt.rzi.u32.f32 %r36, %f126;
mul.wide.u32 %rd39, %r33, 4;
add.s64 %rd40, %rd38, %rd39;
cvt.u16.u32 %rs47, %r36;
cvt.u16.u32 %rs48, %r35;
cvt.u16.u32 %rs49, %r34;
st.global.v4.u8 [%rd40], {%rs49, %rs48, %rs47, %rs46};
ld.const.u64 %rd41, [params+1104];
cvta.to.global.u64 %rd42, %rd41;
ld.const.u32 %r37, [params+1096];
mad.lo.s32 %r38, %r37, %r2, %r1;
cvt.rzi.u32.f32 %r39, %f128;
cvt.rzi.u32.f32 %r40, %f130;
cvt.rzi.u32.f32 %r41, %f132;
mul.wide.u32 %rd43, %r38, 4;
add.s64 %rd44, %rd42, %rd43;
cvt.u16.u32 %rs50, %r41;
cvt.u16.u32 %rs51, %r40;
cvt.u16.u32 %rs52, %r39;
st.global.v4.u8 [%rd44], {%rs52, %rs51, %rs50, %rs46};
bra.uni $L__BB0_3;
$L__BB0_1:
cvt.sat.f32.f32 %f102, %f2;
cvt.sat.f32.f32 %f103, %f3;
cvt.sat.f32.f32 %f104, %f4;
// begin inline asm
{ cvt.rn.f16.f32 %rs34, %f40;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs33, %f104;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs32, %f103;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs31, %f102;}
// end inline asm
st.global.v4.u16 [%rd1], {%rs31, %rs32, %rs33, %rs34};
cvt.sat.f32.f32 %f106, %f5;
cvt.sat.f32.f32 %f107, %f6;
cvt.sat.f32.f32 %f108, %f7;
// begin inline asm
{ cvt.rn.f16.f32 %rs38, %f40;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs37, %f108;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs36, %f107;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs35, %f106;}
// end inline asm
st.global.v4.u16 [%rd2], {%rs35, %rs36, %rs37, %rs38};
cvt.sat.f32.f32 %f110, %f8;
cvt.sat.f32.f32 %f111, %f9;
cvt.sat.f32.f32 %f112, %f10;
// begin inline asm
{ cvt.rn.f16.f32 %rs42, %f40;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs41, %f112;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs40, %f111;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs39, %f110;}
// end inline asm
st.global.v4.u16 [%rd3], {%rs39, %rs40, %rs41, %rs42};
$L__BB0_3:
ret;
}