Added many other

This commit is contained in:
2026-08-06 18:56:32 +03:00
parent 9f2fd08ee5
commit d9d7ee49d2
2144 changed files with 1115424 additions and 1284 deletions
@@ -0,0 +1,230 @@
//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//
.version 8.0
.target sm_52
.address_size 64
.const .align 16 .b8 params[1184];
.visible .func (.param .align 8 .b8 func_retval0[32]) __direct_callable__oxMain(
.param .b32 __direct_callable__oxMain_param_0,
.param .align 8 .b8 __direct_callable__oxMain_param_1[8]
)
{
.reg .pred %p<6>;
.reg .b16 %rs<57>;
.reg .f32 %f<114>;
.reg .b32 %r<37>;
.reg .b64 %rd<53>;
ld.param.u32 %r5, [__direct_callable__oxMain_param_0];
ld.param.f32 %f29, [__direct_callable__oxMain_param_1+4];
ld.param.f32 %f28, [__direct_callable__oxMain_param_1];
// begin inline asm
call (%r6), _optix_get_launch_index_x, ();
// end inline asm
// begin inline asm
call (%r7), _optix_get_launch_index_y, ();
// end inline asm
ld.const.u64 %rd5, [params+72];
cvta.to.global.u64 %rd6, %rd5;
mul.wide.s32 %rd7, %r5, 8;
add.s64 %rd8, %rd6, %rd7;
ld.global.u64 %rd1, [%rd8];
setp.eq.s64 %p1, %rd1, 0;
@%p1 bra $L__BB0_2;
ld.const.u64 %rd9, [params+480];
cvta.to.global.u64 %rd10, %rd9;
ld.const.u32 %r9, [params+472];
mad.lo.s32 %r10, %r9, %r7, %r6;
cvt.u64.u32 %rd11, %r10;
add.s64 %rd12, %rd10, %rd11;
ld.global.u8 %r11, [%rd12];
mov.u64 %rd13, 1;
shl.b64 %rd14, %rd13, %r11;
and.b64 %rd15, %rd14, %rd1;
setp.eq.s64 %p2, %rd15, 0;
mov.f32 %f110, 0f00000000;
mov.f32 %f111, %f110;
mov.f32 %f112, %f110;
mov.f32 %f113, %f110;
@%p2 bra $L__BB0_8;
$L__BB0_2:
ld.const.u64 %rd16, [params+24];
cvta.to.global.u64 %rd17, %rd16;
mul.wide.u32 %rd18, %r5, 12;
add.s64 %rd19, %rd17, %rd18;
ld.global.s32 %rd2, [%rd19];
ld.global.s32 %rd3, [%rd19+4];
ld.global.s32 %rd4, [%rd19+8];
ld.const.u32 %r3, [params+32];
setp.gt.u32 %p3, %r3, %r5;
@%p3 bra $L__BB0_6;
bra.uni $L__BB0_3;
$L__BB0_6:
mov.f32 %f113, 0f3F800000;
sub.f32 %f82, %f113, %f28;
sub.f32 %f108, %f82, %f29;
bra.uni $L__BB0_7;
$L__BB0_3:
sub.s32 %r12, %r5, %r3;
ld.const.u64 %rd20, [params+48];
cvta.to.global.u64 %rd21, %rd20;
mul.wide.u32 %rd22, %r12, 4;
add.s64 %rd23, %rd21, %rd22;
ld.const.u64 %rd24, [params+40];
cvta.to.global.u64 %rd25, %rd24;
shl.b64 %rd26, %rd2, 3;
add.s64 %rd27, %rd25, %rd26;
ld.global.v2.f32 {%f38, %f39}, [%rd27];
shl.b64 %rd28, %rd3, 3;
add.s64 %rd29, %rd25, %rd28;
ld.global.v2.f32 {%f42, %f43}, [%rd29];
shl.b64 %rd30, %rd4, 3;
add.s64 %rd31, %rd25, %rd30;
ld.global.v2.f32 {%f46, %f47}, [%rd31];
mov.f32 %f50, 0f3F800000;
sub.f32 %f51, %f50, %f28;
sub.f32 %f108, %f51, %f29;
mul.f32 %f52, %f28, %f42;
mul.f32 %f53, %f28, %f43;
fma.rn.f32 %f54, %f108, %f38, %f52;
fma.rn.f32 %f55, %f108, %f39, %f53;
fma.rn.f32 %f4, %f29, %f46, %f54;
fma.rn.f32 %f5, %f29, %f47, %f55;
ld.global.u32 %r4, [%rd23];
and.b32 %r13, %r4, -16384;
setp.eq.s32 %p4, %r13, 16384;
@%p4 bra $L__BB0_5;
bra.uni $L__BB0_4;
$L__BB0_5:
add.s32 %r25, %r4, -16384;
ld.const.u64 %rd40, [params+64];
cvta.to.global.u64 %rd41, %rd40;
mul.wide.u32 %rd42, %r25, 8;
add.s64 %rd43, %rd41, %rd42;
ld.global.u64 %rd44, [%rd43];
tex.2d.v4.f32.f32 {%f66, %f67, %f68, %f69}, [%rd44, {%f4, %f5}];
cvt.sat.f32.f32 %f70, %f66;
mul.f32 %f71, %f70, 0f437F0000;
cvt.rzi.s32.f32 %r26, %f71;
cvt.sat.f32.f32 %f72, %f67;
mul.f32 %f73, %f72, 0f437F0000;
cvt.rzi.s32.f32 %r27, %f73;
cvt.sat.f32.f32 %f74, %f68;
mul.f32 %f75, %f74, 0f437F0000;
cvt.rzi.s32.f32 %r28, %f75;
shl.b32 %r29, %r27, 8;
or.b32 %r30, %r29, %r26;
shl.b32 %r31, %r28, 16;
or.b32 %r32, %r30, %r31;
not.b32 %r33, %r32;
cvt.rn.f32.s32 %f113, %r33;
bra.uni $L__BB0_8;
$L__BB0_4:
abs.f32 %f56, %f4;
cvt.rmi.f32.f32 %f57, %f56;
sub.f32 %f58, %f56, %f57;
abs.f32 %f59, %f5;
cvt.rmi.f32.f32 %f60, %f59;
sub.f32 %f61, %f59, %f60;
ld.const.u64 %rd32, [params+56];
cvta.to.global.u64 %rd33, %rd32;
shl.b32 %r14, %r4, 4;
cvt.u64.u32 %rd34, %r14;
and.b64 %rd35, %rd34, 1048560;
add.s64 %rd36, %rd33, %rd35;
ld.global.v2.u32 {%r15, %r16}, [%rd36];
cvt.rn.f32.u32 %f62, %r15;
mul.f32 %f63, %f58, %f62;
cvt.rzi.u32.f32 %r19, %f63;
cvt.rn.f32.u32 %f64, %r16;
mul.f32 %f65, %f61, %f64;
cvt.rzi.u32.f32 %r20, %f65;
mad.lo.s32 %r21, %r15, %r20, %r19;
cvt.u64.u32 %rd37, %r21;
ld.global.u64 %rd38, [%rd36+8];
add.s64 %rd39, %rd38, %rd37;
ld.u8 %r22, [%rd39];
shr.u32 %r23, %r4, 16;
and.b32 %r24, %r23, %r22;
setp.eq.s32 %p5, %r24, 0;
selp.f32 %f113, 0f00000000, 0f3F800000, %p5;
$L__BB0_7:
cvt.u32.u64 %r34, %rd2;
cvt.u32.u64 %r35, %rd3;
cvt.u32.u64 %r36, %rd4;
ld.const.u64 %rd45, [params+16];
cvta.to.global.u64 %rd46, %rd45;
mul.wide.s32 %rd47, %r34, 24;
add.s64 %rd48, %rd46, %rd47;
mul.wide.s32 %rd49, %r35, 24;
add.s64 %rd50, %rd46, %rd49;
mul.wide.s32 %rd51, %r36, 24;
add.s64 %rd52, %rd46, %rd51;
ld.global.f32 %f83, [%rd48+12];
ld.global.f32 %f84, [%rd48+16];
ld.global.f32 %f85, [%rd48+20];
ld.global.f32 %f86, [%rd50+12];
mul.f32 %f87, %f28, %f86;
ld.global.f32 %f88, [%rd50+16];
mul.f32 %f89, %f28, %f88;
ld.global.f32 %f90, [%rd50+20];
mul.f32 %f91, %f28, %f90;
fma.rn.f32 %f92, %f108, %f83, %f87;
fma.rn.f32 %f93, %f108, %f84, %f89;
fma.rn.f32 %f94, %f108, %f85, %f91;
ld.global.f32 %f95, [%rd52+12];
ld.global.f32 %f96, [%rd52+16];
ld.global.f32 %f97, [%rd52+20];
fma.rn.f32 %f98, %f29, %f95, %f92;
fma.rn.f32 %f99, %f29, %f96, %f93;
fma.rn.f32 %f100, %f29, %f97, %f94;
mul.f32 %f101, %f99, %f99;
fma.rn.f32 %f102, %f98, %f98, %f101;
fma.rn.f32 %f103, %f100, %f100, %f102;
sqrt.rn.f32 %f104, %f103;
rcp.rn.f32 %f105, %f104;
mul.f32 %f112, %f100, %f105;
mul.f32 %f111, %f99, %f105;
mul.f32 %f110, %f98, %f105;
$L__BB0_8:
st.param.f32 [func_retval0+0], %f110;
st.param.f32 [func_retval0+4], %f111;
st.param.f32 [func_retval0+8], %f112;
st.param.v4.b8 [func_retval0+12], {%rs17, %rs18, %rs19, %rs20};
st.param.f32 [func_retval0+16], %f25;
st.param.f32 [func_retval0+20], %f26;
st.param.f32 [func_retval0+24], %f113;
st.param.v4.b8 [func_retval0+28], {%rs21, %rs22, %rs23, %rs24};
ret;
}
// .globl oxMain
.visible .entry oxMain()
{
.reg .b64 %rd<2>;
mov.u64 %rd1, __direct_callable__oxMain;
// begin inline asm
// end inline asm
ret;
}