//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 ignoreNormal;
.global .align 1 .b8 localLights[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[4];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<134>;
	.reg .b16 	%rs<63>;
	.reg .f32 	%f<1268>;
	.reg .b32 	%r<205>;
	.reg .b64 	%rd<126>;


	mov.u64 	%rd125, __local_depot0;
	cvta.local.u64 	%SP, %rd125;
	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
	cvt.u64.u32	%rd10, %r30;
	cvt.u64.u32	%rd11, %r31;
	mov.u64 	%rd14, uvnormal;
	cvta.global.u64 	%rd9, %rd14;
	mov.u32 	%r28, 2;
	mov.u32 	%r29, 4;
	mov.u64 	%rd13, 0;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
	// inline asm
	ld.u32 	%r1, [%rd8];
	shr.u32 	%r34, %r1, 16;
	cvt.u16.u32	%rs1, %r34;
	and.b16  	%rs5, %rs1, 255;
	cvt.u16.u32	%rs6, %r1;
	or.b16  	%rs7, %rs6, %rs5;
	setp.eq.s16	%p8, %rs7, 0;
	mov.f32 	%f1205, 0f00000000;
	mov.f32 	%f1206, %f1205;
	mov.f32 	%f1207, %f1205;
	@%p8 bra 	BB0_2;

	ld.u8 	%rs8, [%rd8+1];
	and.b16  	%rs10, %rs6, 255;
	cvt.rn.f32.u16	%f220, %rs10;
	div.rn.f32 	%f221, %f220, 0f437F0000;
	fma.rn.f32 	%f222, %f221, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f223, %rs8;
	div.rn.f32 	%f224, %f223, 0f437F0000;
	fma.rn.f32 	%f225, %f224, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f226, %rs5;
	div.rn.f32 	%f227, %f226, 0f437F0000;
	fma.rn.f32 	%f228, %f227, 0f40000000, 0fBF800000;
	mul.f32 	%f229, %f225, %f225;
	fma.rn.f32 	%f230, %f222, %f222, %f229;
	fma.rn.f32 	%f231, %f228, %f228, %f230;
	sqrt.rn.f32 	%f232, %f231;
	rcp.rn.f32 	%f233, %f232;
	mul.f32 	%f1205, %f222, %f233;
	mul.f32 	%f1206, %f225, %f233;
	mul.f32 	%f1207, %f228, %f233;

BB0_2:
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	ld.global.v2.u32 	{%r38, %r39}, [tileInfo];
	add.s32 	%r2, %r35, %r38;
	add.s32 	%r3, %r36, %r39;
	setp.eq.f32	%p9, %f1206, 0f00000000;
	setp.eq.f32	%p10, %f1205, 0f00000000;
	and.pred  	%p11, %p10, %p9;
	setp.eq.f32	%p12, %f1207, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB0_103;
	bra.uni 	BB0_3;

BB0_103:
	ld.global.u32 	%r204, [imageEnabled];
	and.b32  	%r179, %r204, 1;
	setp.eq.b32	%p128, %r179, 1;
	@!%p128 bra 	BB0_105;
	bra.uni 	BB0_104;

BB0_104:
	cvt.u64.u32	%rd86, %r2;
	cvt.u64.u32	%rd87, %r3;
	mov.u64 	%rd90, image;
	cvta.global.u64 	%rd85, %rd90;
	// inline asm
	call (%rd84), _rt_buffer_get_64, (%rd85, %r28, %r29, %rd86, %rd87, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs43, 0;
	st.v4.u8 	[%rd84], {%rs43, %rs43, %rs43, %rs43};
	ld.global.u32 	%r204, [imageEnabled];

BB0_105:
	and.b32  	%r182, %r204, 8;
	setp.eq.s32	%p129, %r182, 0;
	@%p129 bra 	BB0_107;

	cvt.u64.u32	%rd93, %r2;
	cvt.u64.u32	%rd94, %r3;
	mov.u64 	%rd97, image_Mask;
	cvta.global.u64 	%rd92, %rd97;
	// inline asm
	call (%rd91), _rt_buffer_get_64, (%rd92, %r28, %r28, %rd93, %rd94, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1194, 0f00000000;
	cvt.rzi.u32.f32	%r185, %f1194;
	cvt.u16.u32	%rs44, %r185;
	mov.u16 	%rs45, 0;
	st.v2.u8 	[%rd91], {%rs44, %rs45};
	ld.global.u32 	%r204, [imageEnabled];

BB0_107:
	and.b32  	%r186, %r204, 4;
	setp.eq.s32	%p130, %r186, 0;
	@%p130 bra 	BB0_111;

	ld.global.u32 	%r187, [additive];
	setp.eq.s32	%p131, %r187, 0;
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	@%p131 bra 	BB0_110;

	mov.u64 	%rd110, image_HDR;
	cvta.global.u64 	%rd99, %rd110;
	mov.u32 	%r191, 8;
	// inline asm
	call (%rd98), _rt_buffer_get_64, (%rd99, %r28, %r191, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs52, %rs53, %rs54, %rs55}, [%rd98];
	// inline asm
	{  cvt.f32.f16 %f1195, %rs52;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1196, %rs53;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1197, %rs54;}

	// inline asm
	// inline asm
	call (%rd104), _rt_buffer_get_64, (%rd99, %r28, %r191, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1198, %f1195, 0f00000000;
	add.f32 	%f1199, %f1196, 0f00000000;
	add.f32 	%f1200, %f1197, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1200;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f1199;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs49, %f1198;}

	// inline asm
	mov.u16 	%rs56, 0;
	st.v4.u16 	[%rd104], {%rs49, %rs50, %rs51, %rs56};
	bra.uni 	BB0_111;

BB0_3:
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd17, %r47;
	cvt.u64.u32	%rd18, %r48;
	mov.u64 	%rd26, uvpos;
	cvta.global.u64 	%rd16, %rd26;
	mov.u32 	%r44, 12;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
	// inline asm
	ld.f32 	%f9, [%rd15+8];
	ld.f32 	%f8, [%rd15+4];
	ld.f32 	%f7, [%rd15];
	mul.f32 	%f241, %f7, 0f3456BF95;
	mul.f32 	%f242, %f8, 0f3456BF95;
	mul.f32 	%f243, %f9, 0f3456BF95;
	abs.f32 	%f244, %f1205;
	div.rn.f32 	%f245, %f241, %f244;
	abs.f32 	%f246, %f1206;
	div.rn.f32 	%f247, %f242, %f246;
	abs.f32 	%f248, %f1207;
	div.rn.f32 	%f249, %f243, %f248;
	abs.f32 	%f250, %f245;
	abs.f32 	%f251, %f247;
	abs.f32 	%f252, %f249;
	mov.f32 	%f253, 0f38D1B717;
	max.f32 	%f254, %f250, %f253;
	max.f32 	%f255, %f251, %f253;
	max.f32 	%f256, %f252, %f253;
	fma.rn.f32 	%f10, %f1205, %f254, %f7;
	fma.rn.f32 	%f11, %f1206, %f255, %f8;
	fma.rn.f32 	%f12, %f1207, %f256, %f9;
	ld.global.v2.u32 	{%r51, %r52}, [pixelID];
	cvt.rn.f32.u32	%f13, %r51;
	cvt.rn.f32.u32	%f14, %r52;
	mov.u64 	%rd27, localLights;
	cvta.global.u64 	%rd25, %rd27;
	mov.u32 	%r45, 1;
	mov.u32 	%r46, 96;
	// inline asm
	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
	// inline asm
	cvt.u32.u64	%r4, %rd21;
	setp.eq.s32	%p14, %r4, 0;
	mov.f32 	%f1208, 0f00000000;
	mov.f32 	%f22, %f1208;
	mov.f32 	%f23, %f1208;
	mov.f32 	%f24, %f1208;
	mov.f32 	%f1212, %f1208;
	mov.f32 	%f1213, %f1208;
	mov.f32 	%f1214, %f1208;
	@%p14 bra 	BB0_49;

	mov.f32 	%f264, 0f40000000;
	cvt.rzi.f32.f32	%f265, %f264;
	add.f32 	%f266, %f265, %f265;
	mov.f32 	%f267, 0f40800000;
	sub.f32 	%f268, %f267, %f266;
	abs.f32 	%f15, %f268;
	mul.f32 	%f16, %f10, 0f3456BF95;
	mul.f32 	%f17, %f11, 0f3456BF95;
	mul.f32 	%f18, %f12, 0f3456BF95;
	mul.f32 	%f19, %f13, 0f3DD32618;
	mul.f32 	%f20, %f14, 0f3DD2F1AA;
	mov.f32 	%f263, 0f00000000;
	mov.u32 	%r196, 0;
	abs.f32 	%f448, %f16;
	abs.f32 	%f449, %f17;
	max.f32 	%f450, %f448, %f449;
	abs.f32 	%f451, %f18;
	max.f32 	%f452, %f450, %f451;
	mov.f32 	%f1208, %f263;
	mov.f32 	%f22, %f263;
	mov.f32 	%f23, %f263;
	mov.f32 	%f24, %f263;
	mov.f32 	%f1212, %f263;
	mov.f32 	%f1213, %f263;
	mov.f32 	%f1214, %f263;

BB0_5:
	cvt.u64.u32	%rd30, %r196;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
	// inline asm
	ld.v4.f32 	{%f271, %f272, %f273, %f274}, [%rd28+80];
	ld.v4.f32 	{%f275, %f276, %f277, %f278}, [%rd28+64];
	ld.v4.f32 	{%f279, %f280, %f281, %f282}, [%rd28+48];
	ld.v4.f32 	{%f283, %f1223, %f1224, %f286}, [%rd28+32];
	ld.v4.f32 	{%f287, %f288, %f289, %f290}, [%rd28+16];
	ld.v4.f32 	{%f291, %f292, %f293, %f294}, [%rd28];
	mov.b32 	 %r6, %f274;
	sub.f32 	%f52, %f292, %f7;
	sub.f32 	%f54, %f293, %f8;
	sub.f32 	%f56, %f294, %f9;
	mul.f32 	%f296, %f54, %f54;
	fma.rn.f32 	%f297, %f52, %f52, %f296;
	fma.rn.f32 	%f298, %f56, %f56, %f297;
	sqrt.rn.f32 	%f57, %f298;
	rcp.rn.f32 	%f299, %f57;
	mul.f32 	%f58, %f52, %f299;
	mul.f32 	%f59, %f54, %f299;
	mul.f32 	%f60, %f56, %f299;
	mul.f32 	%f61, %f57, %f290;
	abs.f32 	%f62, %f61;
	setp.lt.f32	%p15, %f62, 0f00800000;
	mul.f32 	%f300, %f62, 0f4B800000;
	selp.f32	%f301, 0fC3170000, 0fC2FE0000, %p15;
	selp.f32	%f302, %f300, %f62, %p15;
	mov.b32 	 %r58, %f302;
	and.b32  	%r59, %r58, 8388607;
	or.b32  	%r60, %r59, 1065353216;
	mov.b32 	 %f303, %r60;
	shr.u32 	%r61, %r58, 23;
	cvt.rn.f32.u32	%f304, %r61;
	add.f32 	%f305, %f301, %f304;
	setp.gt.f32	%p16, %f303, 0f3FB504F3;
	mul.f32 	%f306, %f303, 0f3F000000;
	add.f32 	%f307, %f305, 0f3F800000;
	selp.f32	%f308, %f306, %f303, %p16;
	selp.f32	%f309, %f307, %f305, %p16;
	add.f32 	%f310, %f308, 0fBF800000;
	add.f32 	%f270, %f308, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f269,%f270;
	// inline asm
	add.f32 	%f311, %f310, %f310;
	mul.f32 	%f312, %f269, %f311;
	mul.f32 	%f313, %f312, %f312;
	mov.f32 	%f314, 0f3C4CAF63;
	mov.f32 	%f315, 0f3B18F0FE;
	fma.rn.f32 	%f316, %f315, %f313, %f314;
	mov.f32 	%f317, 0f3DAAAABD;
	fma.rn.f32 	%f318, %f316, %f313, %f317;
	mul.rn.f32 	%f319, %f318, %f313;
	mul.rn.f32 	%f320, %f319, %f312;
	sub.f32 	%f321, %f310, %f312;
	neg.f32 	%f322, %f312;
	add.f32 	%f323, %f321, %f321;
	fma.rn.f32 	%f324, %f322, %f310, %f323;
	mul.rn.f32 	%f325, %f269, %f324;
	add.f32 	%f326, %f320, %f312;
	sub.f32 	%f327, %f312, %f326;
	add.f32 	%f328, %f320, %f327;
	add.f32 	%f329, %f325, %f328;
	add.f32 	%f330, %f326, %f329;
	sub.f32 	%f331, %f326, %f330;
	add.f32 	%f332, %f329, %f331;
	mov.f32 	%f333, 0f3F317200;
	mul.rn.f32 	%f334, %f309, %f333;
	mov.f32 	%f335, 0f35BFBE8E;
	mul.rn.f32 	%f336, %f309, %f335;
	add.f32 	%f337, %f334, %f330;
	sub.f32 	%f338, %f334, %f337;
	add.f32 	%f339, %f330, %f338;
	add.f32 	%f340, %f332, %f339;
	add.f32 	%f341, %f336, %f340;
	add.f32 	%f342, %f337, %f341;
	sub.f32 	%f343, %f337, %f342;
	add.f32 	%f344, %f341, %f343;
	mul.rn.f32 	%f63, %f267, %f342;
	neg.f32 	%f346, %f63;
	fma.rn.f32 	%f347, %f267, %f342, %f346;
	fma.rn.f32 	%f348, %f267, %f344, %f347;
	fma.rn.f32 	%f64, %f263, %f342, %f348;
	add.rn.f32 	%f65, %f63, %f64;
	mov.b32 	 %r62, %f65;
	setp.eq.s32	%p1, %r62, 1118925336;
	add.s32 	%r63, %r62, -1;
	mov.b32 	 %f350, %r63;
	selp.f32	%f351, %f350, %f65, %p1;
	mul.f32 	%f352, %f351, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f353, %f352;
	mov.f32 	%f354, 0fBF317200;
	fma.rn.f32 	%f355, %f353, %f354, %f351;
	mov.f32 	%f356, 0fB5BFBE8E;
	fma.rn.f32 	%f357, %f353, %f356, %f355;
	mul.f32 	%f358, %f357, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f359, %f358;
	add.f32 	%f360, %f353, 0f00000000;
	ex2.approx.f32 	%f361, %f360;
	mul.f32 	%f362, %f359, %f361;
	setp.lt.f32	%p17, %f351, 0fC2D20000;
	selp.f32	%f363, 0f00000000, %f362, %p17;
	setp.gt.f32	%p18, %f351, 0f42D20000;
	selp.f32	%f1215, 0f7F800000, %f363, %p18;
	setp.eq.f32	%p19, %f1215, 0f7F800000;
	@%p19 bra 	BB0_7;

	neg.f32 	%f364, %f65;
	add.rn.f32 	%f365, %f63, %f364;
	add.rn.f32 	%f366, %f365, %f64;
	add.f32 	%f367, %f366, 0f37000000;
	selp.f32	%f368, %f367, %f366, %p1;
	fma.rn.f32 	%f1215, %f1215, %f368, %f1215;

BB0_7:
	setp.lt.f32	%p20, %f61, 0f00000000;
	setp.eq.f32	%p21, %f15, 0f3F800000;
	and.pred  	%p2, %p20, %p21;
	mov.b32 	 %r64, %f1215;
	xor.b32  	%r65, %r64, -2147483648;
	mov.b32 	 %f369, %r65;
	selp.f32	%f1217, %f369, %f1215, %p2;
	setp.eq.f32	%p22, %f61, 0f00000000;
	@%p22 bra 	BB0_10;
	bra.uni 	BB0_8;

BB0_10:
	add.f32 	%f372, %f61, %f61;
	selp.f32	%f1217, %f372, 0f00000000, %p21;
	bra.uni 	BB0_11;

BB0_8:
	setp.geu.f32	%p23, %f61, 0f00000000;
	@%p23 bra 	BB0_11;

	cvt.rzi.f32.f32	%f371, %f267;
	setp.neu.f32	%p24, %f371, 0f40800000;
	selp.f32	%f1217, 0f7FFFFFFF, %f1217, %p24;

BB0_11:
	add.f32 	%f373, %f62, 0f40800000;
	mov.b32 	 %r66, %f373;
	setp.lt.s32	%p26, %r66, 2139095040;
	@%p26 bra 	BB0_16;

	setp.gtu.f32	%p27, %f62, 0f7F800000;
	@%p27 bra 	BB0_15;
	bra.uni 	BB0_13;

BB0_15:
	add.f32 	%f1217, %f61, 0f40800000;
	bra.uni 	BB0_16;

BB0_13:
	setp.neu.f32	%p28, %f62, 0f7F800000;
	@%p28 bra 	BB0_16;

	selp.f32	%f1217, 0fFF800000, 0f7F800000, %p2;

BB0_16:
	mul.f32 	%f374, %f57, %f288;
	mov.f32 	%f1237, 0f3F800000;
	sub.f32 	%f376, %f1237, %f1217;
	setp.eq.f32	%p29, %f61, 0f3F800000;
	selp.f32	%f377, 0f00000000, %f376, %p29;
	cvt.sat.f32.f32	%f378, %f377;
	fma.rn.f32 	%f379, %f374, %f374, %f289;
	div.rn.f32 	%f91, %f378, %f379;
	mul.f32 	%f380, %f1206, %f59;
	fma.rn.f32 	%f381, %f1205, %f58, %f380;
	fma.rn.f32 	%f382, %f1207, %f60, %f381;
	ld.global.u32 	%r67, [ignoreNormal];
	setp.eq.s32	%p30, %r67, 0;
	selp.f32	%f383, %f382, 0f3F800000, %p30;
	cvt.sat.f32.f32	%f92, %f383;
	setp.eq.f32	%p31, %f291, 0f3F800000;
	@%p31 bra 	BB0_23;
	bra.uni 	BB0_17;

BB0_23:
	setp.leu.f32	%p35, %f286, 0f00000000;
	@%p35 bra 	BB0_19;

	setp.geu.f32	%p36, %f282, 0f00000000;
	@%p36 bra 	BB0_25;

	sub.f32 	%f1204, %f294, %f9;
	sub.f32 	%f1203, %f292, %f7;
	sub.f32 	%f1202, %f293, %f8;
	mul.f32 	%f406, %f272, %f1202;
	fma.rn.f32 	%f407, %f271, %f1203, %f406;
	fma.rn.f32 	%f408, %f273, %f1204, %f407;
	rcp.rn.f32 	%f409, %f408;
	mul.f32 	%f1218, %f1203, %f409;
	mul.f32 	%f1219, %f1202, %f409;
	mul.f32 	%f1220, %f1204, %f409;
	neg.f32 	%f282, %f282;
	bra.uni 	BB0_27;

BB0_17:
	setp.eq.f32	%p32, %f291, 0f40000000;
	@%p32 bra 	BB0_21;
	bra.uni 	BB0_18;

BB0_21:
	setp.leu.f32	%p34, %f286, 0f00000000;
	@%p34 bra 	BB0_19;

	mul.f32 	%f400, %f280, %f59;
	fma.rn.f32 	%f401, %f279, %f58, %f400;
	mul.f32 	%f402, %f276, %f59;
	fma.rn.f32 	%f403, %f275, %f58, %f402;
	mul.f32 	%f404, %f272, %f59;
	fma.rn.f32 	%f405, %f271, %f58, %f404;
	fma.rn.f32 	%f397, %f281, %f60, %f401;
	fma.rn.f32 	%f398, %f277, %f60, %f403;
	fma.rn.f32 	%f399, %f273, %f60, %f405;
	cvt.rzi.s32.f32	%r68, %f286;
	mov.u32 	%r69, 6;
	mov.u32 	%r70, 0;
	// inline asm
	call (%f393, %f394, %f395, %f396), _rt_texture_get_base_id, (%r68, %r69, %f397, %f398, %f399, %r70);
	// inline asm
	mul.f32 	%f1222, %f283, %f393;
	mul.f32 	%f1223, %f1223, %f394;
	mul.f32 	%f1224, %f1224, %f395;
	bra.uni 	BB0_28;

BB0_18:
	setp.neu.f32	%p33, %f291, 0f40800000;
	@%p33 bra 	BB0_19;

	mul.f32 	%f384, %f271, %f58;
	mul.f32 	%f385, %f272, %f59;
	neg.f32 	%f386, %f385;
	sub.f32 	%f387, %f386, %f384;
	mul.f32 	%f388, %f273, %f60;
	sub.f32 	%f389, %f387, %f388;
	fma.rn.f32 	%f390, %f286, %f389, %f282;
	cvt.sat.f32.f32	%f391, %f390;
	mul.f32 	%f392, %f391, %f391;
	mul.f32 	%f1225, %f91, %f392;
	mov.f32 	%f1222, %f283;
	bra.uni 	BB0_29;

BB0_19:
	mov.f32 	%f1222, %f283;
	bra.uni 	BB0_28;

BB0_25:
	mov.f32 	%f1218, %f58;
	mov.f32 	%f1219, %f59;
	mov.f32 	%f1220, %f60;

BB0_27:
	mul.f32 	%f418, %f273, %f60;
	mul.f32 	%f419, %f272, %f59;
	neg.f32 	%f420, %f419;
	mul.f32 	%f421, %f271, %f58;
	sub.f32 	%f422, %f420, %f421;
	sub.f32 	%f423, %f422, %f418;
	setp.gt.f32	%p37, %f423, 0f00000000;
	selp.f32	%f424, 0f3F800000, 0f00000000, %p37;
	mul.f32 	%f425, %f280, %f1219;
	fma.rn.f32 	%f426, %f279, %f1218, %f425;
	mul.f32 	%f427, %f276, %f1219;
	fma.rn.f32 	%f428, %f275, %f1218, %f427;
	fma.rn.f32 	%f429, %f281, %f1220, %f426;
	fma.rn.f32 	%f430, %f277, %f1220, %f428;
	fma.rn.f32 	%f431, %f282, %f429, 0f3F000000;
	mov.f32 	%f432, 0f3F800000;
	sub.f32 	%f414, %f432, %f431;
	fma.rn.f32 	%f415, %f282, %f430, 0f3F000000;
	cvt.rzi.s32.f32	%r71, %f286;
	mov.f32 	%f417, 0f00000000;
	// inline asm
	call (%f410, %f411, %f412, %f413), _rt_texture_get_f_id, (%r71, %r28, %f414, %f415, %f417, %f417);
	// inline asm
	mul.f32 	%f433, %f424, %f410;
	mul.f32 	%f434, %f424, %f411;
	mul.f32 	%f435, %f424, %f412;
	mul.f32 	%f1222, %f283, %f433;
	mul.f32 	%f1223, %f1223, %f434;
	mul.f32 	%f1224, %f1224, %f435;

BB0_28:
	mov.f32 	%f1225, %f91;

BB0_29:
	max.f32 	%f442, %f1222, %f1223;
	max.f32 	%f443, %f442, %f1224;
	mul.f32 	%f112, %f92, %f1225;
	mul.f32 	%f444, %f112, %f443;
	setp.lt.f32	%p39, %f444, 0f3727C5AC;
	mov.pred 	%p133, -1;
	mov.f32 	%f119, 0f00000000;
	mov.f32 	%f120, %f119;
	mov.f32 	%f121, %f119;
	mov.f32 	%f122, %f119;
	mov.f32 	%f123, %f119;
	mov.f32 	%f124, %f119;
	@%p39 bra 	BB0_31;

	mul.f32 	%f119, %f1222, %f112;
	mul.f32 	%f120, %f1223, %f112;
	mul.f32 	%f121, %f1224, %f112;
	ld.global.u8 	%rs12, [imageEnabled];
	and.b16  	%rs13, %rs12, 64;
	setp.eq.s16	%p41, %rs13, 0;
	selp.f32	%f122, 0f00000000, %f58, %p41;
	selp.f32	%f123, 0f00000000, %f59, %p41;
	selp.f32	%f124, 0f00000000, %f60, %p41;
	mov.pred 	%p133, 0;

BB0_31:
	@%p133 bra 	BB0_48;

	setp.eq.s32	%p42, %r6, 0;
	mov.u16 	%rs62, 0;
	@%p42 bra 	BB0_43;

	abs.s32 	%r8, %r6;
	mov.f32 	%f1236, 0f00000000;
	setp.lt.s32	%p43, %r8, 1;
	@%p43 bra 	BB0_42;

	max.f32 	%f126, %f452, %f253;
	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p44, %r9, 0;
	add.u64 	%rd35, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd35;
	mov.f32 	%f1236, 0f00000000;
	mov.u32 	%r200, 0;
	@%p44 bra 	BB0_40;

	setp.eq.s32	%p45, %r9, 1;
	mov.f32 	%f1233, 0f00000000;
	mov.u32 	%r198, 0;
	@%p45 bra 	BB0_39;

	setp.eq.s32	%p46, %r9, 2;
	mov.f32 	%f1232, 0f00000000;
	mov.u32 	%r197, 0;
	@%p46 bra 	BB0_38;

	cvt.rmi.f32.f32	%f464, %f19;
	sub.f32 	%f465, %f19, %f464;
	cvt.rmi.f32.f32	%f466, %f20;
	sub.f32 	%f467, %f20, %f466;
	add.f32 	%f468, %f467, 0f420551EC;
	add.f32 	%f469, %f465, 0f420551EC;
	mul.f32 	%f470, %f465, %f468;
	fma.rn.f32 	%f471, %f467, %f469, %f470;
	add.f32 	%f472, %f471, 0f00000000;
	add.f32 	%f473, %f465, %f472;
	add.f32 	%f474, %f467, %f472;
	add.f32 	%f475, %f473, %f474;
	mul.f32 	%f476, %f472, %f475;
	cvt.rmi.f32.f32	%f477, %f476;
	sub.f32 	%f478, %f476, %f477;
	add.f32 	%f479, %f473, %f473;
	mul.f32 	%f480, %f474, %f479;
	cvt.rmi.f32.f32	%f481, %f480;
	sub.f32 	%f482, %f480, %f481;
	mul.f32 	%f483, %f473, %f475;
	cvt.rmi.f32.f32	%f484, %f483;
	sub.f32 	%f485, %f483, %f484;
	fma.rn.f32 	%f486, %f478, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f487, %f482, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f488, %f485, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f489, %f287, %f486, %f292;
	fma.rn.f32 	%f490, %f287, %f487, %f293;
	fma.rn.f32 	%f491, %f287, %f488, %f294;
	sub.f32 	%f492, %f489, %f7;
	sub.f32 	%f493, %f490, %f8;
	sub.f32 	%f494, %f491, %f9;
	mul.f32 	%f495, %f493, %f493;
	fma.rn.f32 	%f496, %f492, %f492, %f495;
	fma.rn.f32 	%f497, %f494, %f494, %f496;
	sqrt.rn.f32 	%f463, %f497;
	rcp.rn.f32 	%f498, %f463;
	mul.f32 	%f459, %f498, %f492;
	mul.f32 	%f460, %f498, %f493;
	mul.f32 	%f461, %f498, %f494;
	ld.global.u32 	%r80, [imageEnabled];
	and.b32  	%r81, %r80, 32;
	setp.eq.s32	%p47, %r81, 0;
	selp.f32	%f499, 0f3F800000, 0f41200000, %p47;
	mul.f32 	%f462, %f499, %f126;
	mov.u32 	%r82, 1065353216;
	st.local.u32 	[%rd2], %r82;
	ld.global.u32 	%r76, [root];
	// inline asm
	call _rt_trace_64, (%r76, %f10, %f11, %f12, %f459, %f460, %f461, %r45, %f462, %f463, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f500, [%rd2];
	add.f32 	%f1232, %f500, 0f00000000;
	mov.u32 	%r197, %r45;

BB0_38:
	cvt.rn.f32.s32	%f509, %r197;
	add.f32 	%f510, %f13, %f509;
	sub.f32 	%f511, %f14, %f509;
	mul.f32 	%f512, %f510, 0f3DD32618;
	cvt.rmi.f32.f32	%f513, %f512;
	sub.f32 	%f514, %f512, %f513;
	mul.f32 	%f515, %f511, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f516, %f515;
	sub.f32 	%f517, %f515, %f516;
	mul.f32 	%f518, %f509, 0f3DC74539;
	cvt.rmi.f32.f32	%f519, %f518;
	sub.f32 	%f520, %f518, %f519;
	add.f32 	%f521, %f517, 0f420551EC;
	add.f32 	%f522, %f514, 0f420551EC;
	add.f32 	%f523, %f520, 0f420551EC;
	mul.f32 	%f524, %f514, %f521;
	fma.rn.f32 	%f525, %f517, %f522, %f524;
	fma.rn.f32 	%f526, %f520, %f523, %f525;
	add.f32 	%f527, %f514, %f526;
	add.f32 	%f528, %f517, %f526;
	add.f32 	%f529, %f520, %f526;
	add.f32 	%f530, %f527, %f528;
	mul.f32 	%f531, %f529, %f530;
	cvt.rmi.f32.f32	%f532, %f531;
	sub.f32 	%f533, %f531, %f532;
	add.f32 	%f534, %f527, %f527;
	mul.f32 	%f535, %f528, %f534;
	cvt.rmi.f32.f32	%f536, %f535;
	sub.f32 	%f537, %f535, %f536;
	mul.f32 	%f538, %f527, %f530;
	cvt.rmi.f32.f32	%f539, %f538;
	sub.f32 	%f540, %f538, %f539;
	fma.rn.f32 	%f541, %f533, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f542, %f537, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f543, %f540, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f544, %f287, %f541, %f292;
	fma.rn.f32 	%f545, %f287, %f542, %f293;
	fma.rn.f32 	%f546, %f287, %f543, %f294;
	sub.f32 	%f547, %f544, %f7;
	sub.f32 	%f548, %f545, %f8;
	sub.f32 	%f549, %f546, %f9;
	mul.f32 	%f550, %f548, %f548;
	fma.rn.f32 	%f551, %f547, %f547, %f550;
	fma.rn.f32 	%f552, %f549, %f549, %f551;
	sqrt.rn.f32 	%f508, %f552;
	rcp.rn.f32 	%f553, %f508;
	mul.f32 	%f504, %f553, %f547;
	mul.f32 	%f505, %f553, %f548;
	mul.f32 	%f506, %f553, %f549;
	ld.global.u32 	%r86, [imageEnabled];
	and.b32  	%r87, %r86, 32;
	setp.eq.s32	%p48, %r87, 0;
	selp.f32	%f554, 0f3F800000, 0f41200000, %p48;
	mul.f32 	%f507, %f554, %f126;
	mov.u32 	%r88, 1065353216;
	st.local.u32 	[%rd2], %r88;
	ld.global.u32 	%r83, [root];
	// inline asm
	call _rt_trace_64, (%r83, %f10, %f11, %f12, %f504, %f505, %f506, %r45, %f507, %f508, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f555, [%rd2];
	add.f32 	%f1233, %f1232, %f555;
	add.s32 	%r198, %r197, 1;

BB0_39:
	cvt.rn.f32.s32	%f564, %r198;
	add.f32 	%f565, %f13, %f564;
	sub.f32 	%f566, %f14, %f564;
	mul.f32 	%f567, %f565, 0f3DD32618;
	cvt.rmi.f32.f32	%f568, %f567;
	sub.f32 	%f569, %f567, %f568;
	mul.f32 	%f570, %f566, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f571, %f570;
	sub.f32 	%f572, %f570, %f571;
	mul.f32 	%f573, %f564, 0f3DC74539;
	cvt.rmi.f32.f32	%f574, %f573;
	sub.f32 	%f575, %f573, %f574;
	add.f32 	%f576, %f572, 0f420551EC;
	add.f32 	%f577, %f569, 0f420551EC;
	add.f32 	%f578, %f575, 0f420551EC;
	mul.f32 	%f579, %f569, %f576;
	fma.rn.f32 	%f580, %f572, %f577, %f579;
	fma.rn.f32 	%f581, %f575, %f578, %f580;
	add.f32 	%f582, %f569, %f581;
	add.f32 	%f583, %f572, %f581;
	add.f32 	%f584, %f575, %f581;
	add.f32 	%f585, %f582, %f583;
	mul.f32 	%f586, %f584, %f585;
	cvt.rmi.f32.f32	%f587, %f586;
	sub.f32 	%f588, %f586, %f587;
	add.f32 	%f589, %f582, %f582;
	mul.f32 	%f590, %f583, %f589;
	cvt.rmi.f32.f32	%f591, %f590;
	sub.f32 	%f592, %f590, %f591;
	mul.f32 	%f593, %f582, %f585;
	cvt.rmi.f32.f32	%f594, %f593;
	sub.f32 	%f595, %f593, %f594;
	fma.rn.f32 	%f596, %f588, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f597, %f592, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f598, %f595, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f599, %f287, %f596, %f292;
	fma.rn.f32 	%f600, %f287, %f597, %f293;
	fma.rn.f32 	%f601, %f287, %f598, %f294;
	sub.f32 	%f602, %f599, %f7;
	sub.f32 	%f603, %f600, %f8;
	sub.f32 	%f604, %f601, %f9;
	mul.f32 	%f605, %f603, %f603;
	fma.rn.f32 	%f606, %f602, %f602, %f605;
	fma.rn.f32 	%f607, %f604, %f604, %f606;
	sqrt.rn.f32 	%f563, %f607;
	rcp.rn.f32 	%f608, %f563;
	mul.f32 	%f559, %f608, %f602;
	mul.f32 	%f560, %f608, %f603;
	mul.f32 	%f561, %f608, %f604;
	ld.global.u32 	%r92, [imageEnabled];
	and.b32  	%r93, %r92, 32;
	setp.eq.s32	%p49, %r93, 0;
	selp.f32	%f609, 0f3F800000, 0f41200000, %p49;
	mul.f32 	%f562, %f609, %f126;
	mov.u32 	%r94, 1065353216;
	st.local.u32 	[%rd2], %r94;
	ld.global.u32 	%r89, [root];
	mov.u32 	%r90, 1;
	// inline asm
	call _rt_trace_64, (%r89, %f10, %f11, %f12, %f559, %f560, %f561, %r90, %f562, %f563, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f610, [%rd2];
	add.f32 	%f1236, %f1233, %f610;
	add.s32 	%r200, %r198, 1;

BB0_40:
	setp.lt.u32	%p50, %r8, 4;
	@%p50 bra 	BB0_42;

BB0_41:
	cvt.rn.f32.s32	%f643, %r200;
	add.f32 	%f644, %f13, %f643;
	sub.f32 	%f645, %f14, %f643;
	mul.f32 	%f646, %f644, 0f3DD32618;
	cvt.rmi.f32.f32	%f647, %f646;
	sub.f32 	%f648, %f646, %f647;
	mul.f32 	%f649, %f645, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f650, %f649;
	sub.f32 	%f651, %f649, %f650;
	mul.f32 	%f652, %f643, 0f3DC74539;
	cvt.rmi.f32.f32	%f653, %f652;
	sub.f32 	%f654, %f652, %f653;
	add.f32 	%f655, %f651, 0f420551EC;
	add.f32 	%f656, %f648, 0f420551EC;
	add.f32 	%f657, %f654, 0f420551EC;
	mul.f32 	%f658, %f648, %f655;
	fma.rn.f32 	%f659, %f651, %f656, %f658;
	fma.rn.f32 	%f660, %f654, %f657, %f659;
	add.f32 	%f661, %f648, %f660;
	add.f32 	%f662, %f651, %f660;
	add.f32 	%f663, %f654, %f660;
	add.f32 	%f664, %f661, %f662;
	mul.f32 	%f665, %f663, %f664;
	cvt.rmi.f32.f32	%f666, %f665;
	sub.f32 	%f667, %f665, %f666;
	add.f32 	%f668, %f661, %f661;
	mul.f32 	%f669, %f662, %f668;
	cvt.rmi.f32.f32	%f670, %f669;
	sub.f32 	%f671, %f669, %f670;
	mul.f32 	%f672, %f661, %f664;
	cvt.rmi.f32.f32	%f673, %f672;
	sub.f32 	%f674, %f672, %f673;
	fma.rn.f32 	%f675, %f667, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f676, %f671, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f677, %f674, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f678, %f287, %f675, %f292;
	fma.rn.f32 	%f679, %f287, %f676, %f293;
	fma.rn.f32 	%f680, %f287, %f677, %f294;
	sub.f32 	%f681, %f678, %f7;
	sub.f32 	%f682, %f679, %f8;
	sub.f32 	%f683, %f680, %f9;
	mul.f32 	%f684, %f682, %f682;
	fma.rn.f32 	%f685, %f681, %f681, %f684;
	fma.rn.f32 	%f686, %f683, %f683, %f685;
	sqrt.rn.f32 	%f618, %f686;
	rcp.rn.f32 	%f687, %f618;
	mul.f32 	%f614, %f687, %f681;
	mul.f32 	%f615, %f687, %f682;
	mul.f32 	%f616, %f687, %f683;
	ld.global.u32 	%r107, [imageEnabled];
	and.b32  	%r108, %r107, 32;
	setp.eq.s32	%p51, %r108, 0;
	selp.f32	%f688, 0f3F800000, 0f41200000, %p51;
	mul.f32 	%f617, %f688, %f126;
	mov.u32 	%r109, 1065353216;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r95, [root];
	mov.u32 	%r105, 1;
	// inline asm
	call _rt_trace_64, (%r95, %f10, %f11, %f12, %f614, %f615, %f616, %r105, %f617, %f618, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f689, [%rd2];
	add.f32 	%f690, %f1236, %f689;
	add.s32 	%r110, %r200, 1;
	cvt.rn.f32.s32	%f691, %r110;
	add.f32 	%f692, %f13, %f691;
	sub.f32 	%f693, %f14, %f691;
	mul.f32 	%f694, %f692, 0f3DD32618;
	cvt.rmi.f32.f32	%f695, %f694;
	sub.f32 	%f696, %f694, %f695;
	mul.f32 	%f697, %f693, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f698, %f697;
	sub.f32 	%f699, %f697, %f698;
	mul.f32 	%f700, %f691, 0f3DC74539;
	cvt.rmi.f32.f32	%f701, %f700;
	sub.f32 	%f702, %f700, %f701;
	add.f32 	%f703, %f699, 0f420551EC;
	add.f32 	%f704, %f696, 0f420551EC;
	add.f32 	%f705, %f702, 0f420551EC;
	mul.f32 	%f706, %f696, %f703;
	fma.rn.f32 	%f707, %f699, %f704, %f706;
	fma.rn.f32 	%f708, %f702, %f705, %f707;
	add.f32 	%f709, %f696, %f708;
	add.f32 	%f710, %f699, %f708;
	add.f32 	%f711, %f702, %f708;
	add.f32 	%f712, %f709, %f710;
	mul.f32 	%f713, %f711, %f712;
	cvt.rmi.f32.f32	%f714, %f713;
	sub.f32 	%f715, %f713, %f714;
	add.f32 	%f716, %f709, %f709;
	mul.f32 	%f717, %f710, %f716;
	cvt.rmi.f32.f32	%f718, %f717;
	sub.f32 	%f719, %f717, %f718;
	mul.f32 	%f720, %f709, %f712;
	cvt.rmi.f32.f32	%f721, %f720;
	sub.f32 	%f722, %f720, %f721;
	fma.rn.f32 	%f723, %f715, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f724, %f719, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f725, %f722, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f726, %f287, %f723, %f292;
	fma.rn.f32 	%f727, %f287, %f724, %f293;
	fma.rn.f32 	%f728, %f287, %f725, %f294;
	sub.f32 	%f729, %f726, %f7;
	sub.f32 	%f730, %f727, %f8;
	sub.f32 	%f731, %f728, %f9;
	mul.f32 	%f732, %f730, %f730;
	fma.rn.f32 	%f733, %f729, %f729, %f732;
	fma.rn.f32 	%f734, %f731, %f731, %f733;
	sqrt.rn.f32 	%f626, %f734;
	rcp.rn.f32 	%f735, %f626;
	mul.f32 	%f622, %f735, %f729;
	mul.f32 	%f623, %f735, %f730;
	mul.f32 	%f624, %f735, %f731;
	ld.global.u32 	%r111, [imageEnabled];
	and.b32  	%r112, %r111, 32;
	setp.eq.s32	%p52, %r112, 0;
	selp.f32	%f736, 0f3F800000, 0f41200000, %p52;
	mul.f32 	%f625, %f736, %f126;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r98, [root];
	// inline asm
	call _rt_trace_64, (%r98, %f10, %f11, %f12, %f622, %f623, %f624, %r105, %f625, %f626, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f737, [%rd2];
	add.f32 	%f738, %f690, %f737;
	add.s32 	%r113, %r200, 2;
	cvt.rn.f32.s32	%f739, %r113;
	add.f32 	%f740, %f13, %f739;
	sub.f32 	%f741, %f14, %f739;
	mul.f32 	%f742, %f740, 0f3DD32618;
	cvt.rmi.f32.f32	%f743, %f742;
	sub.f32 	%f744, %f742, %f743;
	mul.f32 	%f745, %f741, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f746, %f745;
	sub.f32 	%f747, %f745, %f746;
	mul.f32 	%f748, %f739, 0f3DC74539;
	cvt.rmi.f32.f32	%f749, %f748;
	sub.f32 	%f750, %f748, %f749;
	add.f32 	%f751, %f747, 0f420551EC;
	add.f32 	%f752, %f744, 0f420551EC;
	add.f32 	%f753, %f750, 0f420551EC;
	mul.f32 	%f754, %f744, %f751;
	fma.rn.f32 	%f755, %f747, %f752, %f754;
	fma.rn.f32 	%f756, %f750, %f753, %f755;
	add.f32 	%f757, %f744, %f756;
	add.f32 	%f758, %f747, %f756;
	add.f32 	%f759, %f750, %f756;
	add.f32 	%f760, %f757, %f758;
	mul.f32 	%f761, %f759, %f760;
	cvt.rmi.f32.f32	%f762, %f761;
	sub.f32 	%f763, %f761, %f762;
	add.f32 	%f764, %f757, %f757;
	mul.f32 	%f765, %f758, %f764;
	cvt.rmi.f32.f32	%f766, %f765;
	sub.f32 	%f767, %f765, %f766;
	mul.f32 	%f768, %f757, %f760;
	cvt.rmi.f32.f32	%f769, %f768;
	sub.f32 	%f770, %f768, %f769;
	fma.rn.f32 	%f771, %f763, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f772, %f767, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f773, %f770, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f774, %f287, %f771, %f292;
	fma.rn.f32 	%f775, %f287, %f772, %f293;
	fma.rn.f32 	%f776, %f287, %f773, %f294;
	sub.f32 	%f777, %f774, %f7;
	sub.f32 	%f778, %f775, %f8;
	sub.f32 	%f779, %f776, %f9;
	mul.f32 	%f780, %f778, %f778;
	fma.rn.f32 	%f781, %f777, %f777, %f780;
	fma.rn.f32 	%f782, %f779, %f779, %f781;
	sqrt.rn.f32 	%f634, %f782;
	rcp.rn.f32 	%f783, %f634;
	mul.f32 	%f630, %f783, %f777;
	mul.f32 	%f631, %f783, %f778;
	mul.f32 	%f632, %f783, %f779;
	ld.global.u32 	%r114, [imageEnabled];
	and.b32  	%r115, %r114, 32;
	setp.eq.s32	%p53, %r115, 0;
	selp.f32	%f784, 0f3F800000, 0f41200000, %p53;
	mul.f32 	%f633, %f784, %f126;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r101, [root];
	// inline asm
	call _rt_trace_64, (%r101, %f10, %f11, %f12, %f630, %f631, %f632, %r105, %f633, %f634, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f785, [%rd2];
	add.f32 	%f786, %f738, %f785;
	add.s32 	%r116, %r200, 3;
	cvt.rn.f32.s32	%f787, %r116;
	add.f32 	%f788, %f13, %f787;
	sub.f32 	%f789, %f14, %f787;
	mul.f32 	%f790, %f788, 0f3DD32618;
	cvt.rmi.f32.f32	%f791, %f790;
	sub.f32 	%f792, %f790, %f791;
	mul.f32 	%f793, %f789, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f794, %f793;
	sub.f32 	%f795, %f793, %f794;
	mul.f32 	%f796, %f787, 0f3DC74539;
	cvt.rmi.f32.f32	%f797, %f796;
	sub.f32 	%f798, %f796, %f797;
	add.f32 	%f799, %f795, 0f420551EC;
	add.f32 	%f800, %f792, 0f420551EC;
	add.f32 	%f801, %f798, 0f420551EC;
	mul.f32 	%f802, %f792, %f799;
	fma.rn.f32 	%f803, %f795, %f800, %f802;
	fma.rn.f32 	%f804, %f798, %f801, %f803;
	add.f32 	%f805, %f792, %f804;
	add.f32 	%f806, %f795, %f804;
	add.f32 	%f807, %f798, %f804;
	add.f32 	%f808, %f805, %f806;
	mul.f32 	%f809, %f807, %f808;
	cvt.rmi.f32.f32	%f810, %f809;
	sub.f32 	%f811, %f809, %f810;
	add.f32 	%f812, %f805, %f805;
	mul.f32 	%f813, %f806, %f812;
	cvt.rmi.f32.f32	%f814, %f813;
	sub.f32 	%f815, %f813, %f814;
	mul.f32 	%f816, %f805, %f808;
	cvt.rmi.f32.f32	%f817, %f816;
	sub.f32 	%f818, %f816, %f817;
	fma.rn.f32 	%f819, %f811, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f820, %f815, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f821, %f818, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f822, %f287, %f819, %f292;
	fma.rn.f32 	%f823, %f287, %f820, %f293;
	fma.rn.f32 	%f824, %f287, %f821, %f294;
	sub.f32 	%f825, %f822, %f7;
	sub.f32 	%f826, %f823, %f8;
	sub.f32 	%f827, %f824, %f9;
	mul.f32 	%f828, %f826, %f826;
	fma.rn.f32 	%f829, %f825, %f825, %f828;
	fma.rn.f32 	%f830, %f827, %f827, %f829;
	sqrt.rn.f32 	%f642, %f830;
	rcp.rn.f32 	%f831, %f642;
	mul.f32 	%f638, %f831, %f825;
	mul.f32 	%f639, %f831, %f826;
	mul.f32 	%f640, %f831, %f827;
	ld.global.u32 	%r117, [imageEnabled];
	and.b32  	%r118, %r117, 32;
	setp.eq.s32	%p54, %r118, 0;
	selp.f32	%f832, 0f3F800000, 0f41200000, %p54;
	mul.f32 	%f641, %f832, %f126;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r104, [root];
	// inline asm
	call _rt_trace_64, (%r104, %f10, %f11, %f12, %f638, %f639, %f640, %r105, %f641, %f642, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f833, [%rd2];
	add.f32 	%f1236, %f786, %f833;
	add.s32 	%r200, %r200, 4;
	setp.lt.s32	%p55, %r200, %r8;
	@%p55 bra 	BB0_41;

BB0_42:
	cvt.rn.f32.s32	%f834, %r8;
	div.rn.f32 	%f1237, %f1236, %f834;
	shr.u32 	%r119, %r6, 31;
	cvt.u16.u32	%rs62, %r119;

BB0_43:
	fma.rn.f32 	%f1214, %f119, %f1237, %f1214;
	fma.rn.f32 	%f1213, %f120, %f1237, %f1213;
	fma.rn.f32 	%f1212, %f121, %f1237, %f1212;
	ld.global.u8 	%rs15, [imageEnabled];
	and.b16  	%rs16, %rs15, 64;
	setp.eq.s16	%p56, %rs16, 0;
	@%p56 bra 	BB0_45;

	mul.f32 	%f835, %f120, 0f3F372474;
	fma.rn.f32 	%f836, %f119, 0f3E59999A, %f835;
	fma.rn.f32 	%f837, %f121, 0f3D93A92A, %f836;
	fma.rn.f32 	%f24, %f122, %f837, %f24;
	fma.rn.f32 	%f23, %f123, %f837, %f23;
	fma.rn.f32 	%f22, %f837, %f124, %f22;

BB0_45:
	setp.eq.s16	%p57, %rs62, 0;
	@%p57 bra 	BB0_47;

	div.rn.f32 	%f838, %f119, %f283;
	div.rn.f32 	%f839, %f838, %f91;
	cvt.sat.f32.f32	%f840, %f839;
	mul.f32 	%f1237, %f1237, %f840;

BB0_47:
	add.f32 	%f1208, %f1208, %f1237;

BB0_48:
	add.s32 	%r196, %r196, 1;
	setp.lt.u32	%p58, %r196, %r4;
	@%p58 bra 	BB0_5;

BB0_49:
	ld.global.u32 	%r202, [imageEnabled];
	and.b32  	%r120, %r202, 8;
	setp.eq.s32	%p59, %r120, 0;
	@%p59 bra 	BB0_62;

	cvt.sat.f32.f32	%f164, %f1208;
	cvt.u64.u32	%rd46, %r3;
	cvt.u64.u32	%rd45, %r2;
	mov.u64 	%rd49, image_Mask;
	cvta.global.u64 	%rd44, %rd49;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
	// inline asm
	mov.f32 	%f843, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f844, %f843;
	fma.rn.f32 	%f845, %f844, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f165, %f845;
	abs.f32 	%f166, %f164;
	setp.lt.f32	%p60, %f166, 0f00800000;
	mul.f32 	%f846, %f166, 0f4B800000;
	selp.f32	%f847, 0fC3170000, 0fC2FE0000, %p60;
	selp.f32	%f848, %f846, %f166, %p60;
	mov.b32 	 %r123, %f848;
	and.b32  	%r124, %r123, 8388607;
	or.b32  	%r125, %r124, 1065353216;
	mov.b32 	 %f849, %r125;
	shr.u32 	%r126, %r123, 23;
	cvt.rn.f32.u32	%f850, %r126;
	add.f32 	%f851, %f847, %f850;
	setp.gt.f32	%p61, %f849, 0f3FB504F3;
	mul.f32 	%f852, %f849, 0f3F000000;
	add.f32 	%f853, %f851, 0f3F800000;
	selp.f32	%f854, %f852, %f849, %p61;
	selp.f32	%f855, %f853, %f851, %p61;
	add.f32 	%f856, %f854, 0fBF800000;
	add.f32 	%f842, %f854, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f841,%f842;
	// inline asm
	add.f32 	%f857, %f856, %f856;
	mul.f32 	%f858, %f841, %f857;
	mul.f32 	%f859, %f858, %f858;
	mov.f32 	%f860, 0f3C4CAF63;
	mov.f32 	%f861, 0f3B18F0FE;
	fma.rn.f32 	%f862, %f861, %f859, %f860;
	mov.f32 	%f863, 0f3DAAAABD;
	fma.rn.f32 	%f864, %f862, %f859, %f863;
	mul.rn.f32 	%f865, %f864, %f859;
	mul.rn.f32 	%f866, %f865, %f858;
	sub.f32 	%f867, %f856, %f858;
	neg.f32 	%f868, %f858;
	add.f32 	%f869, %f867, %f867;
	fma.rn.f32 	%f870, %f868, %f856, %f869;
	mul.rn.f32 	%f871, %f841, %f870;
	add.f32 	%f872, %f866, %f858;
	sub.f32 	%f873, %f858, %f872;
	add.f32 	%f874, %f866, %f873;
	add.f32 	%f875, %f871, %f874;
	add.f32 	%f876, %f872, %f875;
	sub.f32 	%f877, %f872, %f876;
	add.f32 	%f878, %f875, %f877;
	mov.f32 	%f879, 0f3F317200;
	mul.rn.f32 	%f880, %f855, %f879;
	mov.f32 	%f881, 0f35BFBE8E;
	mul.rn.f32 	%f882, %f855, %f881;
	add.f32 	%f883, %f880, %f876;
	sub.f32 	%f884, %f880, %f883;
	add.f32 	%f885, %f876, %f884;
	add.f32 	%f886, %f878, %f885;
	add.f32 	%f887, %f882, %f886;
	add.f32 	%f888, %f883, %f887;
	sub.f32 	%f889, %f883, %f888;
	add.f32 	%f890, %f887, %f889;
	mov.f32 	%f891, 0f3EE8BA2E;
	mul.rn.f32 	%f892, %f891, %f888;
	neg.f32 	%f893, %f892;
	fma.rn.f32 	%f894, %f891, %f888, %f893;
	fma.rn.f32 	%f895, %f891, %f890, %f894;
	mov.f32 	%f896, 0f00000000;
	fma.rn.f32 	%f897, %f896, %f888, %f895;
	add.rn.f32 	%f898, %f892, %f897;
	neg.f32 	%f899, %f898;
	add.rn.f32 	%f900, %f892, %f899;
	add.rn.f32 	%f901, %f900, %f897;
	mov.b32 	 %r127, %f898;
	setp.eq.s32	%p62, %r127, 1118925336;
	add.s32 	%r128, %r127, -1;
	mov.b32 	 %f902, %r128;
	add.f32 	%f903, %f901, 0f37000000;
	selp.f32	%f904, %f902, %f898, %p62;
	selp.f32	%f167, %f903, %f901, %p62;
	mul.f32 	%f905, %f904, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f906, %f905;
	mov.f32 	%f907, 0fBF317200;
	fma.rn.f32 	%f908, %f906, %f907, %f904;
	mov.f32 	%f909, 0fB5BFBE8E;
	fma.rn.f32 	%f910, %f906, %f909, %f908;
	mul.f32 	%f911, %f910, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f912, %f911;
	add.f32 	%f913, %f906, 0f00000000;
	ex2.approx.f32 	%f914, %f913;
	mul.f32 	%f915, %f912, %f914;
	setp.lt.f32	%p63, %f904, 0fC2D20000;
	selp.f32	%f916, 0f00000000, %f915, %p63;
	setp.gt.f32	%p64, %f904, 0f42D20000;
	selp.f32	%f1256, 0f7F800000, %f916, %p64;
	setp.eq.f32	%p65, %f1256, 0f7F800000;
	@%p65 bra 	BB0_52;

	fma.rn.f32 	%f1256, %f1256, %f167, %f1256;

BB0_52:
	setp.lt.f32	%p66, %f164, 0f00000000;
	setp.eq.f32	%p67, %f165, 0f3F800000;
	and.pred  	%p4, %p66, %p67;
	mov.b32 	 %r129, %f1256;
	xor.b32  	%r130, %r129, -2147483648;
	mov.b32 	 %f917, %r130;
	selp.f32	%f1258, %f917, %f1256, %p4;
	setp.eq.f32	%p68, %f164, 0f00000000;
	@%p68 bra 	BB0_55;
	bra.uni 	BB0_53;

BB0_55:
	add.f32 	%f920, %f164, %f164;
	selp.f32	%f1258, %f920, 0f00000000, %p67;
	bra.uni 	BB0_56;

BB0_110:
	mov.u64 	%rd117, image_HDR;
	cvta.global.u64 	%rd112, %rd117;
	mov.u32 	%r193, 8;
	// inline asm
	call (%rd111), _rt_buffer_get_64, (%rd112, %r28, %r193, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1201, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f1201;}

	// inline asm
	mov.u16 	%rs58, 0;
	st.v4.u16 	[%rd111], {%rs57, %rs57, %rs57, %rs58};

BB0_111:
	ld.global.u8 	%rs59, [imageEnabled];
	and.b16  	%rs60, %rs59, 64;
	setp.eq.s16	%p132, %rs60, 0;
	@%p132 bra 	BB0_113;

	cvt.u64.u32	%rd120, %r2;
	cvt.u64.u32	%rd121, %r3;
	mov.u64 	%rd124, image_Dir;
	cvta.global.u64 	%rd119, %rd124;
	// inline asm
	call (%rd118), _rt_buffer_get_64, (%rd119, %r28, %r29, %rd120, %rd121, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs61, 0;
	st.v4.u8 	[%rd118], {%rs61, %rs61, %rs61, %rs61};
	bra.uni 	BB0_113;

BB0_53:
	setp.geu.f32	%p69, %f164, 0f00000000;
	@%p69 bra 	BB0_56;

	cvt.rzi.f32.f32	%f919, %f891;
	setp.neu.f32	%p70, %f919, 0f3EE8BA2E;
	selp.f32	%f1258, 0f7FFFFFFF, %f1258, %p70;

BB0_56:
	add.f32 	%f921, %f166, 0f3EE8BA2E;
	mov.b32 	 %r131, %f921;
	setp.lt.s32	%p72, %r131, 2139095040;
	@%p72 bra 	BB0_61;

	setp.gtu.f32	%p73, %f166, 0f7F800000;
	@%p73 bra 	BB0_60;
	bra.uni 	BB0_58;

BB0_60:
	add.f32 	%f1258, %f164, 0f3EE8BA2E;
	bra.uni 	BB0_61;

BB0_58:
	setp.neu.f32	%p74, %f166, 0f7F800000;
	@%p74 bra 	BB0_61;

	selp.f32	%f1258, 0fFF800000, 0f7F800000, %p4;

BB0_61:
	mul.f32 	%f922, %f1258, 0f437F0000;
	setp.eq.f32	%p75, %f164, 0f3F800000;
	selp.f32	%f923, 0f437F0000, %f922, %p75;
	cvt.rzi.u32.f32	%r132, %f923;
	cvt.u16.u32	%rs17, %r132;
	mov.u16 	%rs18, 255;
	st.v2.u8 	[%rd43], {%rs17, %rs18};
	ld.global.u32 	%r202, [imageEnabled];

BB0_62:
	and.b32  	%r133, %r202, 1;
	setp.eq.b32	%p76, %r133, 1;
	@!%p76 bra 	BB0_97;
	bra.uni 	BB0_63;

BB0_63:
	mov.f32 	%f926, 0f3E666666;
	cvt.rzi.f32.f32	%f927, %f926;
	fma.rn.f32 	%f928, %f927, 0fC0000000, 0f3EE66666;
	abs.f32 	%f178, %f928;
	abs.f32 	%f179, %f1214;
	setp.lt.f32	%p77, %f179, 0f00800000;
	mul.f32 	%f929, %f179, 0f4B800000;
	selp.f32	%f930, 0fC3170000, 0fC2FE0000, %p77;
	selp.f32	%f931, %f929, %f179, %p77;
	mov.b32 	 %r134, %f931;
	and.b32  	%r135, %r134, 8388607;
	or.b32  	%r136, %r135, 1065353216;
	mov.b32 	 %f932, %r136;
	shr.u32 	%r137, %r134, 23;
	cvt.rn.f32.u32	%f933, %r137;
	add.f32 	%f934, %f930, %f933;
	setp.gt.f32	%p78, %f932, 0f3FB504F3;
	mul.f32 	%f935, %f932, 0f3F000000;
	add.f32 	%f936, %f934, 0f3F800000;
	selp.f32	%f937, %f935, %f932, %p78;
	selp.f32	%f938, %f936, %f934, %p78;
	add.f32 	%f939, %f937, 0fBF800000;
	add.f32 	%f925, %f937, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f924,%f925;
	// inline asm
	add.f32 	%f940, %f939, %f939;
	mul.f32 	%f941, %f924, %f940;
	mul.f32 	%f942, %f941, %f941;
	mov.f32 	%f943, 0f3C4CAF63;
	mov.f32 	%f944, 0f3B18F0FE;
	fma.rn.f32 	%f945, %f944, %f942, %f943;
	mov.f32 	%f946, 0f3DAAAABD;
	fma.rn.f32 	%f947, %f945, %f942, %f946;
	mul.rn.f32 	%f948, %f947, %f942;
	mul.rn.f32 	%f949, %f948, %f941;
	sub.f32 	%f950, %f939, %f941;
	neg.f32 	%f951, %f941;
	add.f32 	%f952, %f950, %f950;
	fma.rn.f32 	%f953, %f951, %f939, %f952;
	mul.rn.f32 	%f954, %f924, %f953;
	add.f32 	%f955, %f949, %f941;
	sub.f32 	%f956, %f941, %f955;
	add.f32 	%f957, %f949, %f956;
	add.f32 	%f958, %f954, %f957;
	add.f32 	%f959, %f955, %f958;
	sub.f32 	%f960, %f955, %f959;
	add.f32 	%f961, %f958, %f960;
	mov.f32 	%f962, 0f3F317200;
	mul.rn.f32 	%f963, %f938, %f962;
	mov.f32 	%f964, 0f35BFBE8E;
	mul.rn.f32 	%f965, %f938, %f964;
	add.f32 	%f966, %f963, %f959;
	sub.f32 	%f967, %f963, %f966;
	add.f32 	%f968, %f959, %f967;
	add.f32 	%f969, %f961, %f968;
	add.f32 	%f970, %f965, %f969;
	add.f32 	%f971, %f966, %f970;
	sub.f32 	%f972, %f966, %f971;
	add.f32 	%f973, %f970, %f972;
	mov.f32 	%f974, 0f3EE66666;
	mul.rn.f32 	%f975, %f974, %f971;
	neg.f32 	%f976, %f975;
	fma.rn.f32 	%f977, %f974, %f971, %f976;
	fma.rn.f32 	%f978, %f974, %f973, %f977;
	mov.f32 	%f979, 0f00000000;
	fma.rn.f32 	%f980, %f979, %f971, %f978;
	add.rn.f32 	%f981, %f975, %f980;
	neg.f32 	%f982, %f981;
	add.rn.f32 	%f983, %f975, %f982;
	add.rn.f32 	%f984, %f983, %f980;
	mov.b32 	 %r138, %f981;
	setp.eq.s32	%p79, %r138, 1118925336;
	add.s32 	%r139, %r138, -1;
	mov.b32 	 %f985, %r139;
	add.f32 	%f986, %f984, 0f37000000;
	selp.f32	%f987, %f985, %f981, %p79;
	selp.f32	%f180, %f986, %f984, %p79;
	mul.f32 	%f988, %f987, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f989, %f988;
	mov.f32 	%f990, 0fBF317200;
	fma.rn.f32 	%f991, %f989, %f990, %f987;
	mov.f32 	%f992, 0fB5BFBE8E;
	fma.rn.f32 	%f993, %f989, %f992, %f991;
	mul.f32 	%f994, %f993, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f995, %f994;
	add.f32 	%f996, %f989, 0f00000000;
	ex2.approx.f32 	%f997, %f996;
	mul.f32 	%f998, %f995, %f997;
	setp.lt.f32	%p80, %f987, 0fC2D20000;
	selp.f32	%f999, 0f00000000, %f998, %p80;
	setp.gt.f32	%p81, %f987, 0f42D20000;
	selp.f32	%f1259, 0f7F800000, %f999, %p81;
	setp.eq.f32	%p82, %f1259, 0f7F800000;
	@%p82 bra 	BB0_65;

	fma.rn.f32 	%f1259, %f1259, %f180, %f1259;

BB0_65:
	setp.lt.f32	%p83, %f1214, 0f00000000;
	setp.eq.f32	%p84, %f178, 0f3F800000;
	and.pred  	%p5, %p83, %p84;
	mov.b32 	 %r140, %f1259;
	xor.b32  	%r141, %r140, -2147483648;
	mov.b32 	 %f1000, %r141;
	selp.f32	%f1261, %f1000, %f1259, %p5;
	setp.eq.f32	%p85, %f1214, 0f00000000;
	@%p85 bra 	BB0_68;
	bra.uni 	BB0_66;

BB0_68:
	add.f32 	%f1003, %f1214, %f1214;
	selp.f32	%f1261, %f1003, 0f00000000, %p84;
	bra.uni 	BB0_69;

BB0_66:
	setp.geu.f32	%p86, %f1214, 0f00000000;
	@%p86 bra 	BB0_69;

	cvt.rzi.f32.f32	%f1002, %f974;
	setp.neu.f32	%p87, %f1002, 0f3EE66666;
	selp.f32	%f1261, 0f7FFFFFFF, %f1261, %p87;

BB0_69:
	add.f32 	%f1004, %f179, 0f3EE66666;
	mov.b32 	 %r142, %f1004;
	setp.lt.s32	%p89, %r142, 2139095040;
	@%p89 bra 	BB0_74;

	setp.gtu.f32	%p90, %f179, 0f7F800000;
	@%p90 bra 	BB0_73;
	bra.uni 	BB0_71;

BB0_73:
	add.f32 	%f1261, %f1214, 0f3EE66666;
	bra.uni 	BB0_74;

BB0_71:
	setp.neu.f32	%p91, %f179, 0f7F800000;
	@%p91 bra 	BB0_74;

	selp.f32	%f1261, 0fFF800000, 0f7F800000, %p5;

BB0_74:
	setp.eq.f32	%p92, %f1214, 0f3F800000;
	selp.f32	%f191, 0f3F800000, %f1261, %p92;
	abs.f32 	%f192, %f1213;
	setp.lt.f32	%p93, %f192, 0f00800000;
	mul.f32 	%f1007, %f192, 0f4B800000;
	selp.f32	%f1008, 0fC3170000, 0fC2FE0000, %p93;
	selp.f32	%f1009, %f1007, %f192, %p93;
	mov.b32 	 %r143, %f1009;
	and.b32  	%r144, %r143, 8388607;
	or.b32  	%r145, %r144, 1065353216;
	mov.b32 	 %f1010, %r145;
	shr.u32 	%r146, %r143, 23;
	cvt.rn.f32.u32	%f1011, %r146;
	add.f32 	%f1012, %f1008, %f1011;
	setp.gt.f32	%p94, %f1010, 0f3FB504F3;
	mul.f32 	%f1013, %f1010, 0f3F000000;
	add.f32 	%f1014, %f1012, 0f3F800000;
	selp.f32	%f1015, %f1013, %f1010, %p94;
	selp.f32	%f1016, %f1014, %f1012, %p94;
	add.f32 	%f1017, %f1015, 0fBF800000;
	add.f32 	%f1006, %f1015, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1005,%f1006;
	// inline asm
	add.f32 	%f1018, %f1017, %f1017;
	mul.f32 	%f1019, %f1005, %f1018;
	mul.f32 	%f1020, %f1019, %f1019;
	fma.rn.f32 	%f1023, %f944, %f1020, %f943;
	fma.rn.f32 	%f1025, %f1023, %f1020, %f946;
	mul.rn.f32 	%f1026, %f1025, %f1020;
	mul.rn.f32 	%f1027, %f1026, %f1019;
	sub.f32 	%f1028, %f1017, %f1019;
	neg.f32 	%f1029, %f1019;
	add.f32 	%f1030, %f1028, %f1028;
	fma.rn.f32 	%f1031, %f1029, %f1017, %f1030;
	mul.rn.f32 	%f1032, %f1005, %f1031;
	add.f32 	%f1033, %f1027, %f1019;
	sub.f32 	%f1034, %f1019, %f1033;
	add.f32 	%f1035, %f1027, %f1034;
	add.f32 	%f1036, %f1032, %f1035;
	add.f32 	%f1037, %f1033, %f1036;
	sub.f32 	%f1038, %f1033, %f1037;
	add.f32 	%f1039, %f1036, %f1038;
	mul.rn.f32 	%f1041, %f1016, %f962;
	mul.rn.f32 	%f1043, %f1016, %f964;
	add.f32 	%f1044, %f1041, %f1037;
	sub.f32 	%f1045, %f1041, %f1044;
	add.f32 	%f1046, %f1037, %f1045;
	add.f32 	%f1047, %f1039, %f1046;
	add.f32 	%f1048, %f1043, %f1047;
	add.f32 	%f1049, %f1044, %f1048;
	sub.f32 	%f1050, %f1044, %f1049;
	add.f32 	%f1051, %f1048, %f1050;
	mul.rn.f32 	%f1053, %f974, %f1049;
	neg.f32 	%f1054, %f1053;
	fma.rn.f32 	%f1055, %f974, %f1049, %f1054;
	fma.rn.f32 	%f1056, %f974, %f1051, %f1055;
	fma.rn.f32 	%f1058, %f979, %f1049, %f1056;
	add.rn.f32 	%f1059, %f1053, %f1058;
	neg.f32 	%f1060, %f1059;
	add.rn.f32 	%f1061, %f1053, %f1060;
	add.rn.f32 	%f1062, %f1061, %f1058;
	mov.b32 	 %r147, %f1059;
	setp.eq.s32	%p95, %r147, 1118925336;
	add.s32 	%r148, %r147, -1;
	mov.b32 	 %f1063, %r148;
	add.f32 	%f1064, %f1062, 0f37000000;
	selp.f32	%f1065, %f1063, %f1059, %p95;
	selp.f32	%f193, %f1064, %f1062, %p95;
	mul.f32 	%f1066, %f1065, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1067, %f1066;
	fma.rn.f32 	%f1069, %f1067, %f990, %f1065;
	fma.rn.f32 	%f1071, %f1067, %f992, %f1069;
	mul.f32 	%f1072, %f1071, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1073, %f1072;
	add.f32 	%f1074, %f1067, 0f00000000;
	ex2.approx.f32 	%f1075, %f1074;
	mul.f32 	%f1076, %f1073, %f1075;
	setp.lt.f32	%p96, %f1065, 0fC2D20000;
	selp.f32	%f1077, 0f00000000, %f1076, %p96;
	setp.gt.f32	%p97, %f1065, 0f42D20000;
	selp.f32	%f1262, 0f7F800000, %f1077, %p97;
	setp.eq.f32	%p98, %f1262, 0f7F800000;
	@%p98 bra 	BB0_76;

	fma.rn.f32 	%f1262, %f1262, %f193, %f1262;

BB0_76:
	setp.lt.f32	%p99, %f1213, 0f00000000;
	and.pred  	%p6, %p99, %p84;
	mov.b32 	 %r149, %f1262;
	xor.b32  	%r150, %r149, -2147483648;
	mov.b32 	 %f1078, %r150;
	selp.f32	%f1264, %f1078, %f1262, %p6;
	setp.eq.f32	%p101, %f1213, 0f00000000;
	@%p101 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f1081, %f1213, %f1213;
	selp.f32	%f1264, %f1081, 0f00000000, %p84;
	bra.uni 	BB0_80;

BB0_77:
	setp.geu.f32	%p102, %f1213, 0f00000000;
	@%p102 bra 	BB0_80;

	cvt.rzi.f32.f32	%f1080, %f974;
	setp.neu.f32	%p103, %f1080, 0f3EE66666;
	selp.f32	%f1264, 0f7FFFFFFF, %f1264, %p103;

BB0_80:
	add.f32 	%f1082, %f192, 0f3EE66666;
	mov.b32 	 %r151, %f1082;
	setp.lt.s32	%p105, %r151, 2139095040;
	@%p105 bra 	BB0_85;

	setp.gtu.f32	%p106, %f192, 0f7F800000;
	@%p106 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f1264, %f1213, 0f3EE66666;
	bra.uni 	BB0_85;

BB0_82:
	setp.neu.f32	%p107, %f192, 0f7F800000;
	@%p107 bra 	BB0_85;

	selp.f32	%f1264, 0fFF800000, 0f7F800000, %p6;

BB0_85:
	setp.eq.f32	%p108, %f1213, 0f3F800000;
	selp.f32	%f204, 0f3F800000, %f1264, %p108;
	abs.f32 	%f205, %f1212;
	setp.lt.f32	%p109, %f205, 0f00800000;
	mul.f32 	%f1085, %f205, 0f4B800000;
	selp.f32	%f1086, 0fC3170000, 0fC2FE0000, %p109;
	selp.f32	%f1087, %f1085, %f205, %p109;
	mov.b32 	 %r152, %f1087;
	and.b32  	%r153, %r152, 8388607;
	or.b32  	%r154, %r153, 1065353216;
	mov.b32 	 %f1088, %r154;
	shr.u32 	%r155, %r152, 23;
	cvt.rn.f32.u32	%f1089, %r155;
	add.f32 	%f1090, %f1086, %f1089;
	setp.gt.f32	%p110, %f1088, 0f3FB504F3;
	mul.f32 	%f1091, %f1088, 0f3F000000;
	add.f32 	%f1092, %f1090, 0f3F800000;
	selp.f32	%f1093, %f1091, %f1088, %p110;
	selp.f32	%f1094, %f1092, %f1090, %p110;
	add.f32 	%f1095, %f1093, 0fBF800000;
	add.f32 	%f1084, %f1093, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1083,%f1084;
	// inline asm
	add.f32 	%f1096, %f1095, %f1095;
	mul.f32 	%f1097, %f1083, %f1096;
	mul.f32 	%f1098, %f1097, %f1097;
	fma.rn.f32 	%f1101, %f944, %f1098, %f943;
	fma.rn.f32 	%f1103, %f1101, %f1098, %f946;
	mul.rn.f32 	%f1104, %f1103, %f1098;
	mul.rn.f32 	%f1105, %f1104, %f1097;
	sub.f32 	%f1106, %f1095, %f1097;
	neg.f32 	%f1107, %f1097;
	add.f32 	%f1108, %f1106, %f1106;
	fma.rn.f32 	%f1109, %f1107, %f1095, %f1108;
	mul.rn.f32 	%f1110, %f1083, %f1109;
	add.f32 	%f1111, %f1105, %f1097;
	sub.f32 	%f1112, %f1097, %f1111;
	add.f32 	%f1113, %f1105, %f1112;
	add.f32 	%f1114, %f1110, %f1113;
	add.f32 	%f1115, %f1111, %f1114;
	sub.f32 	%f1116, %f1111, %f1115;
	add.f32 	%f1117, %f1114, %f1116;
	mul.rn.f32 	%f1119, %f1094, %f962;
	mul.rn.f32 	%f1121, %f1094, %f964;
	add.f32 	%f1122, %f1119, %f1115;
	sub.f32 	%f1123, %f1119, %f1122;
	add.f32 	%f1124, %f1115, %f1123;
	add.f32 	%f1125, %f1117, %f1124;
	add.f32 	%f1126, %f1121, %f1125;
	add.f32 	%f1127, %f1122, %f1126;
	sub.f32 	%f1128, %f1122, %f1127;
	add.f32 	%f1129, %f1126, %f1128;
	mul.rn.f32 	%f1131, %f974, %f1127;
	neg.f32 	%f1132, %f1131;
	fma.rn.f32 	%f1133, %f974, %f1127, %f1132;
	fma.rn.f32 	%f1134, %f974, %f1129, %f1133;
	fma.rn.f32 	%f1136, %f979, %f1127, %f1134;
	add.rn.f32 	%f1137, %f1131, %f1136;
	neg.f32 	%f1138, %f1137;
	add.rn.f32 	%f1139, %f1131, %f1138;
	add.rn.f32 	%f1140, %f1139, %f1136;
	mov.b32 	 %r156, %f1137;
	setp.eq.s32	%p111, %r156, 1118925336;
	add.s32 	%r157, %r156, -1;
	mov.b32 	 %f1141, %r157;
	add.f32 	%f1142, %f1140, 0f37000000;
	selp.f32	%f1143, %f1141, %f1137, %p111;
	selp.f32	%f206, %f1142, %f1140, %p111;
	mul.f32 	%f1144, %f1143, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1145, %f1144;
	fma.rn.f32 	%f1147, %f1145, %f990, %f1143;
	fma.rn.f32 	%f1149, %f1145, %f992, %f1147;
	mul.f32 	%f1150, %f1149, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1151, %f1150;
	add.f32 	%f1152, %f1145, 0f00000000;
	ex2.approx.f32 	%f1153, %f1152;
	mul.f32 	%f1154, %f1151, %f1153;
	setp.lt.f32	%p112, %f1143, 0fC2D20000;
	selp.f32	%f1155, 0f00000000, %f1154, %p112;
	setp.gt.f32	%p113, %f1143, 0f42D20000;
	selp.f32	%f1265, 0f7F800000, %f1155, %p113;
	setp.eq.f32	%p114, %f1265, 0f7F800000;
	@%p114 bra 	BB0_87;

	fma.rn.f32 	%f1265, %f1265, %f206, %f1265;

BB0_87:
	setp.lt.f32	%p115, %f1212, 0f00000000;
	and.pred  	%p7, %p115, %p84;
	mov.b32 	 %r158, %f1265;
	xor.b32  	%r159, %r158, -2147483648;
	mov.b32 	 %f1156, %r159;
	selp.f32	%f1267, %f1156, %f1265, %p7;
	setp.eq.f32	%p117, %f1212, 0f00000000;
	@%p117 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f1159, %f1212, %f1212;
	selp.f32	%f1267, %f1159, 0f00000000, %p84;
	bra.uni 	BB0_91;

BB0_88:
	setp.geu.f32	%p118, %f1212, 0f00000000;
	@%p118 bra 	BB0_91;

	cvt.rzi.f32.f32	%f1158, %f974;
	setp.neu.f32	%p119, %f1158, 0f3EE66666;
	selp.f32	%f1267, 0f7FFFFFFF, %f1267, %p119;

BB0_91:
	add.f32 	%f1160, %f205, 0f3EE66666;
	mov.b32 	 %r160, %f1160;
	setp.lt.s32	%p121, %r160, 2139095040;
	@%p121 bra 	BB0_96;

	setp.gtu.f32	%p122, %f205, 0f7F800000;
	@%p122 bra 	BB0_95;
	bra.uni 	BB0_93;

BB0_95:
	add.f32 	%f1267, %f1212, 0f3EE66666;
	bra.uni 	BB0_96;

BB0_93:
	setp.neu.f32	%p123, %f205, 0f7F800000;
	@%p123 bra 	BB0_96;

	selp.f32	%f1267, 0fFF800000, 0f7F800000, %p7;

BB0_96:
	setp.eq.f32	%p124, %f1212, 0f3F800000;
	selp.f32	%f1161, 0f3F800000, %f1267, %p124;
	cvt.u64.u32	%rd53, %r3;
	cvt.u64.u32	%rd52, %r2;
	mov.u64 	%rd56, image;
	cvta.global.u64 	%rd51, %rd56;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
	// inline asm
	cvt.sat.f32.f32	%f1162, %f1161;
	mul.f32 	%f1163, %f1162, 0f437FFD71;
	cvt.rzi.u32.f32	%r163, %f1163;
	cvt.sat.f32.f32	%f1164, %f204;
	mul.f32 	%f1165, %f1164, 0f437FFD71;
	cvt.rzi.u32.f32	%r164, %f1165;
	cvt.sat.f32.f32	%f1166, %f191;
	mul.f32 	%f1167, %f1166, 0f437FFD71;
	cvt.rzi.u32.f32	%r165, %f1167;
	cvt.u16.u32	%rs19, %r163;
	cvt.u16.u32	%rs20, %r165;
	cvt.u16.u32	%rs21, %r164;
	mov.u16 	%rs22, 255;
	st.v4.u8 	[%rd50], {%rs19, %rs21, %rs20, %rs22};
	ld.global.u32 	%r202, [imageEnabled];

BB0_97:
	and.b32  	%r166, %r202, 4;
	setp.eq.s32	%p125, %r166, 0;
	@%p125 bra 	BB0_101;

	ld.global.u32 	%r167, [additive];
	setp.eq.s32	%p126, %r167, 0;
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	mov.f32 	%f1168, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f1168;}

	// inline asm
	@%p126 bra 	BB0_100;

	mov.u64 	%rd69, image_HDR;
	cvta.global.u64 	%rd58, %rd69;
	mov.u32 	%r171, 8;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd57];
	// inline asm
	{  cvt.f32.f16 %f1169, %rs30;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1170, %rs31;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1171, %rs32;}

	// inline asm
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1172, %f1214, %f1169;
	add.f32 	%f1173, %f1213, %f1170;
	add.f32 	%f1174, %f1212, %f1171;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f1174;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f1173;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f1172;}

	// inline asm
	st.v4.u16 	[%rd63], {%rs27, %rs28, %rs29, %rs23};
	bra.uni 	BB0_101;

BB0_100:
	mov.u64 	%rd76, image_HDR;
	cvta.global.u64 	%rd71, %rd76;
	mov.u32 	%r173, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r173, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f1212;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs35, %f1213;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f1214;}

	// inline asm
	st.v4.u16 	[%rd70], {%rs34, %rs35, %rs36, %rs23};

BB0_101:
	ld.global.u8 	%rs37, [imageEnabled];
	and.b16  	%rs38, %rs37, 64;
	setp.eq.s16	%p127, %rs38, 0;
	@%p127 bra 	BB0_113;

	mul.f32 	%f1178, %f23, %f23;
	fma.rn.f32 	%f1179, %f24, %f24, %f1178;
	fma.rn.f32 	%f1180, %f22, %f22, %f1179;
	sqrt.rn.f32 	%f1181, %f1180;
	rcp.rn.f32 	%f1182, %f1181;
	mul.f32 	%f1183, %f24, %f1182;
	mul.f32 	%f1184, %f23, %f1182;
	mul.f32 	%f1185, %f22, %f1182;
	cvt.u64.u32	%rd80, %r3;
	cvt.u64.u32	%rd79, %r2;
	mov.u64 	%rd83, image_Dir;
	cvta.global.u64 	%rd78, %rd83;
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r29, %rd79, %rd80, %rd13, %rd13);
	// inline asm
	fma.rn.f32 	%f1186, %f1183, 0f3F000000, 0f3F000000;
	mul.f32 	%f1187, %f1186, 0f437F0000;
	cvt.rzi.u32.f32	%r176, %f1187;
	fma.rn.f32 	%f1188, %f1184, 0f3F000000, 0f3F000000;
	mul.f32 	%f1189, %f1188, 0f437F0000;
	cvt.rzi.u32.f32	%r177, %f1189;
	fma.rn.f32 	%f1190, %f1185, 0f3F000000, 0f3F000000;
	mul.f32 	%f1191, %f1190, 0f437F0000;
	cvt.rzi.u32.f32	%r178, %f1191;
	cvt.u16.u32	%rs39, %r178;
	cvt.u16.u32	%rs40, %r177;
	cvt.u16.u32	%rs41, %r176;
	mov.u16 	%rs42, 255;
	st.v4.u8 	[%rd77], {%rs41, %rs40, %rs39, %rs42};

BB0_113:
	ret;
}