//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<147>;
	.reg .b16 	%rs<46>;
	.reg .f32 	%f<921>;
	.reg .b32 	%r<329>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<90>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r50), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r51), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u32 	%r3, [params+540];
	ld.const.u64 	%rd19, [params+400];
	cvta.to.global.u64 	%rd20, %rd19;
	ld.const.u32 	%r56, [params+392];
	mad.lo.s32 	%r57, %r56, %r51, %r50;
	mul.wide.u32 	%rd21, %r57, 4;
	add.s64 	%rd2, %rd20, %rd21;
	ld.global.v2.u8 	{%rs7, %rs45}, [%rd2];
	or.b16  	%rs9, %rs7, %rs45;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p7, %rs10, 0;
	@%p7 bra 	$L__BB0_2;

	ld.global.u8 	%rs44, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs44, [%rd2+2];
	setp.eq.s16 	%p8, %rs44, 0;
	mov.f32 	%f882, 0f00000000;
	mov.u16 	%rs45, 0;
	mov.f32 	%f883, %f882;
	mov.f32 	%f884, %f882;
	@%p8 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f155, %rs7;
	div.rn.f32 	%f156, %f155, 0f437F0000;
	fma.rn.f32 	%f157, %f156, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs45, 255;
	cvt.rn.f32.u16 	%f158, %rs13;
	div.rn.f32 	%f159, %f158, 0f437F0000;
	fma.rn.f32 	%f160, %f159, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f161, %rs44;
	div.rn.f32 	%f162, %f161, 0f437F0000;
	fma.rn.f32 	%f163, %f162, 0f40000000, 0fBF800000;
	mul.f32 	%f164, %f160, %f160;
	fma.rn.f32 	%f165, %f157, %f157, %f164;
	fma.rn.f32 	%f166, %f163, %f163, %f165;
	sqrt.rn.f32 	%f167, %f166;
	rcp.rn.f32 	%f168, %f167;
	mul.f32 	%f884, %f168, %f163;
	mul.f32 	%f883, %f168, %f160;
	mul.f32 	%f882, %f157, %f168;

$L__BB0_4:
	ld.const.v2.u32 	{%r58, %r59}, [params];
	add.s32 	%r4, %r58, %r50;
	add.s32 	%r5, %r59, %r51;
	setp.eq.f32 	%p9, %f882, 0f00000000;
	setp.eq.f32 	%p10, %f883, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	setp.eq.f32 	%p12, %f884, 0f00000000;
	and.pred  	%p13, %p12, %p11;
	@%p13 bra 	$L__BB0_116;
	bra.uni 	$L__BB0_5;

$L__BB0_116:
	ld.const.u32 	%r49, [params+104];
	and.b32  	%r305, %r49, 1;
	setp.eq.b32 	%p141, %r305, 1;
	mov.pred 	%p142, 0;
	xor.pred  	%p143, %p141, %p142;
	not.pred 	%p144, %p143;
	@%p144 bra 	$L__BB0_118;

	ld.const.u64 	%rd70, [params+144];
	cvta.to.global.u64 	%rd71, %rd70;
	ld.const.u32 	%r306, [params+136];
	mad.lo.s32 	%r307, %r306, %r5, %r4;
	mul.wide.u32 	%rd72, %r307, 4;
	add.s64 	%rd73, %rd71, %rd72;
	mov.u16 	%rs35, 0;
	st.global.v4.u8 	[%rd73], {%rs35, %rs35, %rs35, %rs35};

$L__BB0_118:
	and.b32  	%r308, %r49, 4;
	setp.eq.s32 	%p145, %r308, 0;
	@%p145 bra 	$L__BB0_120;

	ld.const.u64 	%rd74, [params+224];
	cvta.to.global.u64 	%rd75, %rd74;
	ld.const.u32 	%r309, [params+216];
	mad.lo.s32 	%r310, %r309, %r5, %r4;
	mov.f32 	%f854, 0f00000000;
	mul.wide.u32 	%rd76, %r310, 8;
	add.s64 	%rd77, %rd75, %rd76;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs38, %f854;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs37, %f854;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs36, %f854;}

	// end inline asm
	mov.u16 	%rs39, 0;
	st.global.v4.u16 	[%rd77], {%rs36, %rs37, %rs38, %rs39};

$L__BB0_120:
	and.b32  	%r311, %r49, 16;
	setp.eq.s32 	%p146, %r311, 0;
	@%p146 bra 	$L__BB0_122;

	ld.const.u64 	%rd78, [params+240];
	cvta.to.global.u64 	%rd79, %rd78;
	ld.const.u32 	%r312, [params+232];
	mad.lo.s32 	%r313, %r312, %r5, %r4;
	mov.f32 	%f857, 0f00000000;
	mul.wide.u32 	%rd80, %r313, 8;
	add.s64 	%rd81, %rd79, %rd80;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs42, %f857;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs41, %f857;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs40, %f857;}

	// end inline asm
	mov.u16 	%rs43, 0;
	st.global.v4.u16 	[%rd81], {%rs40, %rs41, %rs42, %rs43};
	bra.uni 	$L__BB0_122;

$L__BB0_5:
	ld.const.u64 	%rd22, [params+496];
	cvta.to.global.u64 	%rd23, %rd22;
	ld.const.u32 	%r62, [params+488];
	mad.lo.s32 	%r63, %r62, %r51, %r50;
	mul.wide.u32 	%rd24, %r63, 8;
	add.s64 	%rd25, %rd23, %rd24;
	ld.global.v4.u16 	{%rs19, %rs20, %rs21, %rs22}, [%rd25];
	// begin inline asm
	{  cvt.f32.f16 %f169, %rs19;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f170, %rs20;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f171, %rs21;}

	// end inline asm
	ld.const.u64 	%rd26, [params+432];
	cvta.to.global.u64 	%rd27, %rd26;
	ld.const.u32 	%r64, [params+424];
	mad.lo.s32 	%r65, %r64, %r51, %r50;
	mul.wide.u32 	%rd28, %r65, 12;
	add.s64 	%rd29, %rd27, %rd28;
	ld.global.f32 	%f176, [%rd29];
	mul.f32 	%f177, %f176, 0f3456BF95;
	ld.global.f32 	%f178, [%rd29+4];
	mul.f32 	%f179, %f178, 0f3456BF95;
	ld.global.f32 	%f180, [%rd29+8];
	mul.f32 	%f181, %f180, 0f3456BF95;
	abs.f32 	%f182, %f882;
	div.rn.f32 	%f183, %f177, %f182;
	abs.f32 	%f184, %f883;
	div.rn.f32 	%f185, %f179, %f184;
	abs.f32 	%f186, %f884;
	div.rn.f32 	%f187, %f181, %f186;
	abs.f32 	%f188, %f183;
	abs.f32 	%f189, %f185;
	abs.f32 	%f190, %f187;
	mov.f32 	%f191, 0f38D1B717;
	max.f32 	%f192, %f188, %f191;
	max.f32 	%f193, %f189, %f191;
	max.f32 	%f194, %f190, %f191;
	fma.rn.f32 	%f13, %f882, %f192, %f176;
	fma.rn.f32 	%f14, %f883, %f193, %f178;
	fma.rn.f32 	%f15, %f884, %f194, %f180;
	setp.gt.f32 	%p14, %f182, %f186;
	neg.f32 	%f195, %f883;
	selp.f32 	%f196, %f195, 0f00000000, %p14;
	mov.f32 	%f900, 0f00000000;
	neg.f32 	%f197, %f884;
	selp.f32 	%f198, %f882, %f197, %p14;
	selp.f32 	%f199, 0f00000000, %f883, %p14;
	mul.f32 	%f200, %f198, %f198;
	fma.rn.f32 	%f201, %f196, %f196, %f200;
	fma.rn.f32 	%f202, %f199, %f199, %f201;
	sqrt.rn.f32 	%f203, %f202;
	rcp.rn.f32 	%f204, %f203;
	mul.f32 	%f16, %f196, %f204;
	mul.f32 	%f17, %f198, %f204;
	mul.f32 	%f18, %f199, %f204;
	ld.const.u64 	%rd30, [params+128];
	cvta.to.global.u64 	%rd31, %rd30;
	ld.const.u32 	%r66, [params+120];
	mad.lo.s32 	%r67, %r66, %r51, %r50;
	mul.wide.u32 	%rd32, %r67, 4;
	add.s64 	%rd3, %rd31, %rd32;
	setp.lt.s32 	%p15, %r3, 1;
	mov.f32 	%f890, %f900;
	mov.f32 	%f889, %f900;
	mov.f32 	%f888, %f900;
	@%p15 bra 	$L__BB0_34;

	cvt.rn.f32.s32 	%f208, %r3;
	rcp.rn.f32 	%f19, %f208;
	ld.global.u32 	%r321, [%rd3];
	mul.f32 	%f20, %f13, 0f3456BF95;
	mul.f32 	%f21, %f14, 0f3456BF95;
	mul.f32 	%f22, %f15, 0f3456BF95;
	ld.const.u64 	%rd4, [params+96];
	mul.f32 	%f209, %f882, %f17;
	mul.f32 	%f210, %f883, %f16;
	sub.f32 	%f23, %f210, %f209;
	mul.f32 	%f211, %f884, %f16;
	mul.f32 	%f212, %f882, %f18;
	sub.f32 	%f24, %f212, %f211;
	mul.f32 	%f213, %f883, %f18;
	mul.f32 	%f214, %f884, %f17;
	sub.f32 	%f25, %f214, %f213;
	mov.u32 	%r68, 0;
	add.s64 	%rd5, %rd1, 24;
	mov.u64 	%rd33, __cudart_i2opi_f;
	abs.f32 	%f280, %f21;
	abs.f32 	%f281, %f20;
	max.f32 	%f282, %f281, %f280;
	abs.f32 	%f283, %f22;
	max.f32 	%f284, %f282, %f283;
	mov.u32 	%r318, %r68;

$L__BB0_7:
	cvt.rn.f32.s32 	%f29, %r318;
	mov.u32 	%r320, %r68;

$L__BB0_8:
	mad.lo.s32 	%r70, %r321, 1664525, 1013904223;
	and.b32  	%r71, %r70, 16777215;
	cvt.rn.f32.u32 	%f215, %r71;
	fma.rn.f32 	%f216, %f215, 0f33800000, %f29;
	mul.f32 	%f217, %f19, %f216;
	mad.lo.s32 	%r321, %r70, 1664525, 1013904223;
	and.b32  	%r72, %r321, 16777215;
	cvt.rn.f32.u32 	%f218, %r72;
	cvt.rn.f32.s32 	%f219, %r320;
	fma.rn.f32 	%f220, %f218, 0f33800000, %f219;
	mul.f32 	%f221, %f19, %f220;
	sqrt.rn.f32 	%f33, %f217;
	mul.f32 	%f34, %f221, 0f40C90FDB;
	mul.f32 	%f222, %f34, 0f3F22F983;
	cvt.rni.s32.f32 	%r328, %f222;
	cvt.rn.f32.s32 	%f223, %r328;
	mov.f32 	%f224, 0fBFC90FDA;
	fma.rn.f32 	%f225, %f223, %f224, %f34;
	mov.f32 	%f226, 0fB3A22168;
	fma.rn.f32 	%f227, %f223, %f226, %f225;
	mov.f32 	%f228, 0fA7C234C5;
	fma.rn.f32 	%f894, %f223, %f228, %f227;
	abs.f32 	%f36, %f34;
	setp.ltu.f32 	%p16, %f36, 0f47CE4780;
	mov.u32 	%r325, %r328;
	mov.f32 	%f891, %f894;
	@%p16 bra 	$L__BB0_16;

	setp.eq.f32 	%p17, %f36, 0f7F800000;
	@%p17 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f231, 0f00000000;
	mul.rn.f32 	%f891, %f34, %f231;
	mov.u32 	%r325, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r13, %f34;
	bfe.u32 	%r74, %r13, 23, 8;
	add.s32 	%r14, %r74, -128;
	shl.b32 	%r75, %r13, 8;
	or.b32  	%r15, %r75, -2147483648;
	shr.u32 	%r16, %r14, 5;
	mov.u64 	%rd87, 0;
	mov.u32 	%r322, 0;
	mov.u64 	%rd85, %rd1;
	mov.u64 	%rd86, %rd33;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r76, [%rd86];
	mad.wide.u32 	%rd35, %r76, %r15, %rd87;
	shr.u64 	%rd87, %rd35, 32;
	st.local.u32 	[%rd85], %rd35;
	add.s64 	%rd86, %rd86, 4;
	add.s64 	%rd85, %rd85, 4;
	add.s32 	%r322, %r322, 1;
	setp.ne.s32 	%p18, %r322, 6;
	@%p18 bra 	$L__BB0_11;

	st.local.u32 	[%rd5], %rd87;
	mov.u32 	%r77, 4;
	sub.s32 	%r19, %r77, %r16;
	mov.u32 	%r78, 6;
	sub.s32 	%r79, %r78, %r16;
	mul.wide.s32 	%rd36, %r79, 4;
	add.s64 	%rd37, %rd1, %rd36;
	ld.local.u32 	%r323, [%rd37];
	ld.local.u32 	%r324, [%rd37+-4];
	and.b32  	%r22, %r14, 31;
	setp.eq.s32 	%p19, %r22, 0;
	@%p19 bra 	$L__BB0_14;

	mov.u32 	%r80, 32;
	sub.s32 	%r81, %r80, %r22;
	shr.u32 	%r82, %r324, %r81;
	shl.b32 	%r83, %r323, %r22;
	add.s32 	%r323, %r82, %r83;
	mul.wide.s32 	%rd38, %r19, 4;
	add.s64 	%rd39, %rd1, %rd38;
	ld.local.u32 	%r84, [%rd39];
	shr.u32 	%r85, %r84, %r81;
	shl.b32 	%r86, %r324, %r22;
	add.s32 	%r324, %r85, %r86;

$L__BB0_14:
	and.b32  	%r87, %r13, -2147483648;
	shr.u32 	%r88, %r324, 30;
	shl.b32 	%r89, %r323, 2;
	or.b32  	%r90, %r88, %r89;
	shr.u32 	%r91, %r90, 31;
	shr.u32 	%r92, %r323, 30;
	add.s32 	%r93, %r91, %r92;
	neg.s32 	%r94, %r93;
	setp.eq.s32 	%p20, %r87, 0;
	selp.b32 	%r325, %r93, %r94, %p20;
	setp.ne.s32 	%p21, %r91, 0;
	xor.b32  	%r95, %r87, -2147483648;
	selp.b32 	%r96, %r95, %r87, %p21;
	selp.b32 	%r97, -1, 0, %p21;
	xor.b32  	%r98, %r90, %r97;
	shl.b32 	%r99, %r324, 2;
	xor.b32  	%r100, %r99, %r97;
	cvt.u64.u32 	%rd40, %r98;
	cvt.u64.u32 	%rd41, %r100;
	bfi.b64 	%rd42, %rd40, %rd41, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd42;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f229, %fd2;
	setp.eq.s32 	%p22, %r96, 0;
	neg.f32 	%f230, %f229;
	selp.f32 	%f891, %f229, %f230, %p22;

$L__BB0_16:
	add.s32 	%r29, %r325, 1;
	and.b32  	%r30, %r29, 1;
	setp.eq.s32 	%p23, %r30, 0;
	selp.f32 	%f40, %f891, 0f3F800000, %p23;
	mul.rn.f32 	%f41, %f891, %f891;
	mov.f32 	%f892, 0fB94D4153;
	@%p23 bra 	$L__BB0_18;

	mov.f32 	%f233, 0fBAB607ED;
	mov.f32 	%f234, 0f37CBAC00;
	fma.rn.f32 	%f892, %f234, %f41, %f233;

$L__BB0_18:
	selp.f32 	%f235, 0f3C0885E4, 0f3D2AAABB, %p23;
	fma.rn.f32 	%f236, %f892, %f41, %f235;
	selp.f32 	%f237, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
	fma.rn.f32 	%f238, %f236, %f41, %f237;
	mov.f32 	%f239, 0f00000000;
	fma.rn.f32 	%f240, %f41, %f40, %f239;
	fma.rn.f32 	%f893, %f238, %f240, %f40;
	and.b32  	%r102, %r29, 2;
	setp.eq.s32 	%p25, %r102, 0;
	@%p25 bra 	$L__BB0_20;

	mov.f32 	%f242, 0fBF800000;
	fma.rn.f32 	%f893, %f893, %f242, %f239;

$L__BB0_20:
	@%p16 bra 	$L__BB0_28;

	setp.eq.f32 	%p27, %f36, 0f7F800000;
	@%p27 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f245, 0f00000000;
	mul.rn.f32 	%f894, %f34, %f245;
	mov.u32 	%r328, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r31, %f34;
	bfe.u32 	%r103, %r31, 23, 8;
	add.s32 	%r32, %r103, -128;
	shl.b32 	%r104, %r31, 8;
	or.b32  	%r33, %r104, -2147483648;
	shr.u32 	%r34, %r32, 5;
	mov.u64 	%rd88, 0;
	mov.u64 	%rd89, %rd88;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd45, %rd88, 2;
	mov.u64 	%rd46, __cudart_i2opi_f;
	add.s64 	%rd47, %rd46, %rd45;
	ld.global.nc.u32 	%r105, [%rd47];
	mad.wide.u32 	%rd48, %r105, %r33, %rd89;
	shr.u64 	%rd89, %rd48, 32;
	add.s64 	%rd49, %rd1, %rd45;
	st.local.u32 	[%rd49], %rd48;
	cvt.u32.u64 	%r106, %rd88;
	add.s32 	%r107, %r106, 1;
	cvt.s64.s32 	%rd88, %r107;
	setp.ne.s32 	%p28, %r107, 6;
	@%p28 bra 	$L__BB0_23;

	st.local.u32 	[%rd5], %rd89;
	mov.u32 	%r108, 4;
	sub.s32 	%r35, %r108, %r34;
	mov.u32 	%r109, 6;
	sub.s32 	%r110, %r109, %r34;
	mul.wide.s32 	%rd50, %r110, 4;
	add.s64 	%rd51, %rd1, %rd50;
	ld.local.u32 	%r326, [%rd51];
	ld.local.u32 	%r327, [%rd51+-4];
	and.b32  	%r38, %r32, 31;
	setp.eq.s32 	%p29, %r38, 0;
	@%p29 bra 	$L__BB0_26;

	mov.u32 	%r111, 32;
	sub.s32 	%r112, %r111, %r38;
	shr.u32 	%r113, %r327, %r112;
	shl.b32 	%r114, %r326, %r38;
	add.s32 	%r326, %r113, %r114;
	mul.wide.s32 	%rd52, %r35, 4;
	add.s64 	%rd53, %rd1, %rd52;
	ld.local.u32 	%r115, [%rd53];
	shr.u32 	%r116, %r115, %r112;
	shl.b32 	%r117, %r327, %r38;
	add.s32 	%r327, %r116, %r117;

$L__BB0_26:
	and.b32  	%r118, %r31, -2147483648;
	shr.u32 	%r119, %r327, 30;
	shl.b32 	%r120, %r326, 2;
	or.b32  	%r121, %r119, %r120;
	shr.u32 	%r122, %r121, 31;
	shr.u32 	%r123, %r326, 30;
	add.s32 	%r124, %r122, %r123;
	neg.s32 	%r125, %r124;
	setp.eq.s32 	%p30, %r118, 0;
	selp.b32 	%r328, %r124, %r125, %p30;
	setp.ne.s32 	%p31, %r122, 0;
	xor.b32  	%r126, %r118, -2147483648;
	selp.b32 	%r127, %r126, %r118, %p31;
	selp.b32 	%r128, -1, 0, %p31;
	xor.b32  	%r129, %r121, %r128;
	shl.b32 	%r130, %r327, 2;
	xor.b32  	%r131, %r130, %r128;
	cvt.u64.u32 	%rd54, %r129;
	cvt.u64.u32 	%rd55, %r131;
	bfi.b64 	%rd56, %rd54, %rd55, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd56;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f243, %fd4;
	setp.eq.s32 	%p32, %r127, 0;
	neg.f32 	%f244, %f243;
	selp.f32 	%f894, %f243, %f244, %p32;

$L__BB0_28:
	mul.f32 	%f50, %f33, %f893;
	and.b32  	%r45, %r328, 1;
	setp.eq.s32 	%p33, %r45, 0;
	selp.f32 	%f51, %f894, 0f3F800000, %p33;
	mul.rn.f32 	%f52, %f894, %f894;
	mov.f32 	%f895, 0fB94D4153;
	@%p33 bra 	$L__BB0_30;

	mov.f32 	%f247, 0fBAB607ED;
	mov.f32 	%f248, 0f37CBAC00;
	fma.rn.f32 	%f895, %f248, %f52, %f247;

$L__BB0_30:
	selp.f32 	%f249, 0f3C0885E4, 0f3D2AAABB, %p33;
	fma.rn.f32 	%f250, %f895, %f52, %f249;
	selp.f32 	%f251, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
	fma.rn.f32 	%f252, %f250, %f52, %f251;
	mov.f32 	%f253, 0f00000000;
	fma.rn.f32 	%f254, %f52, %f51, %f253;
	fma.rn.f32 	%f896, %f252, %f254, %f51;
	and.b32  	%r133, %r328, 2;
	setp.eq.s32 	%p35, %r133, 0;
	@%p35 bra 	$L__BB0_32;

	mov.f32 	%f256, 0fBF800000;
	fma.rn.f32 	%f896, %f896, %f256, %f253;

$L__BB0_32:
	mul.f32 	%f266, %f50, %f50;
	mov.f32 	%f267, 0f3F800000;
	sub.f32 	%f268, %f267, %f266;
	mul.f32 	%f269, %f33, %f896;
	mul.f32 	%f270, %f269, %f269;
	sub.f32 	%f271, %f268, %f270;
	max.f32 	%f272, %f253, %f271;
	sqrt.rn.f32 	%f273, %f272;
	mul.f32 	%f274, %f16, %f269;
	mul.f32 	%f275, %f17, %f269;
	mul.f32 	%f276, %f18, %f269;
	fma.rn.f32 	%f277, %f25, %f50, %f274;
	fma.rn.f32 	%f278, %f24, %f50, %f275;
	fma.rn.f32 	%f279, %f23, %f50, %f276;
	fma.rn.f32 	%f260, %f882, %f273, %f277;
	fma.rn.f32 	%f261, %f883, %f273, %f278;
	fma.rn.f32 	%f262, %f884, %f273, %f279;
	mov.f32 	%f285, 0f38D1B717;
	max.f32 	%f263, %f284, %f285;
	mov.f32 	%f264, 0f6C4ECB8F;
	mov.u32 	%r167, 1;
	mov.u32 	%r170, 2;
	mov.u32 	%r172, 4;
	mov.u32 	%r175, 1065353216;
	mov.u32 	%r176, 2139095039;
	mov.u32 	%r204, 0;
	// begin inline asm
	call(%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165),_optix_trace_typed_32,(%r204,%rd4,%f13,%f14,%f15,%f260,%f261,%f262,%f263,%f264,%f253,%r167,%r204,%r204,%r170,%r204,%r172,%r175,%r175,%r175,%r176,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204);
	// end inline asm
	mov.b32 	%f286, %r134;
	mov.b32 	%f287, %r135;
	mov.b32 	%f288, %r136;
	mov.b32 	%f289, %r137;
	setp.ltu.f32 	%p36, %f289, 0f00000000;
	selp.f32 	%f290, %f288, 0f00000000, %p36;
	selp.f32 	%f291, %f287, 0f00000000, %p36;
	selp.f32 	%f292, %f286, 0f00000000, %p36;
	add.f32 	%f890, %f890, %f292;
	add.f32 	%f889, %f889, %f291;
	add.f32 	%f888, %f888, %f290;
	add.s32 	%r320, %r320, 1;
	setp.lt.s32 	%p37, %r320, %r3;
	@%p37 bra 	$L__BB0_8;

	add.s32 	%r318, %r318, 1;
	setp.lt.s32 	%p38, %r318, %r3;
	@%p38 bra 	$L__BB0_7;

$L__BB0_34:
	mul.lo.s32 	%r205, %r3, %r3;
	cvt.rn.f32.s32 	%f296, %r205;
	rcp.rn.f32 	%f297, %f296;
	mul.f32 	%f298, %f297, %f890;
	mul.f32 	%f299, %f297, %f889;
	mul.f32 	%f300, %f297, %f888;
	ld.const.u64 	%rd58, [params+504];
	cvt.rn.f32.u32 	%f301, %r5;
	cvt.rn.f32.u32 	%f302, %r4;
	tex.2d.v4.f32.f32 	{%f303, %f304, %f305, %f306}, [%rd58, {%f302, %f301}];
	mul.f32 	%f64, %f298, %f303;
	mul.f32 	%f65, %f299, %f304;
	mul.f32 	%f66, %f300, %f305;
	add.f32 	%f67, %f169, %f64;
	add.f32 	%f68, %f170, %f65;
	add.f32 	%f69, %f171, %f66;
	abs.f32 	%f307, %f67;
	setp.gtu.f32 	%p39, %f307, 0f7F800000;
	mov.f32 	%f901, %f900;
	mov.f32 	%f902, %f900;
	@%p39 bra 	$L__BB0_38;

	abs.f32 	%f311, %f68;
	setp.gtu.f32 	%p40, %f311, 0f7F800000;
	mov.f32 	%f901, %f900;
	mov.f32 	%f902, %f900;
	@%p40 bra 	$L__BB0_38;

	abs.f32 	%f315, %f69;
	setp.gtu.f32 	%p41, %f315, 0f7F800000;
	mov.f32 	%f901, %f900;
	mov.f32 	%f902, %f900;
	@%p41 bra 	$L__BB0_38;

	mov.f32 	%f900, %f67;
	mov.f32 	%f901, %f68;
	mov.f32 	%f902, %f69;

$L__BB0_38:
	ld.const.u32 	%r48, [params+104];
	and.b32  	%r206, %r48, 1;
	setp.eq.b32 	%p42, %r206, 1;
	mov.pred 	%p43, 0;
	xor.pred  	%p44, %p42, %p43;
	not.pred 	%p45, %p44;
	@%p45 bra 	$L__BB0_112;

	mov.f32 	%f320, 0f3EE66666;
	abs.f32 	%f80, %f900;
	setp.lt.f32 	%p46, %f80, 0f00800000;
	mul.f32 	%f322, %f80, 0f4B800000;
	selp.f32 	%f323, %f322, %f80, %p46;
	selp.f32 	%f324, 0fC3170000, 0fC2FE0000, %p46;
	mov.b32 	%r207, %f323;
	and.b32  	%r208, %r207, 8388607;
	or.b32  	%r209, %r208, 1065353216;
	mov.b32 	%f325, %r209;
	shr.u32 	%r210, %r207, 23;
	cvt.rn.f32.u32 	%f326, %r210;
	add.f32 	%f327, %f324, %f326;
	setp.gt.f32 	%p47, %f325, 0f3FB504F3;
	mul.f32 	%f328, %f325, 0f3F000000;
	add.f32 	%f329, %f327, 0f3F800000;
	selp.f32 	%f330, %f329, %f327, %p47;
	selp.f32 	%f331, %f328, %f325, %p47;
	add.f32 	%f332, %f331, 0fBF800000;
	add.f32 	%f333, %f331, 0f3F800000;
	rcp.approx.ftz.f32 	%f334, %f333;
	add.f32 	%f335, %f332, %f332;
	mul.f32 	%f336, %f335, %f334;
	mul.f32 	%f337, %f336, %f336;
	mov.f32 	%f338, 0f3C4CAF63;
	mov.f32 	%f339, 0f3B18F0FE;
	fma.rn.f32 	%f340, %f339, %f337, %f338;
	mov.f32 	%f341, 0f3DAAAABD;
	fma.rn.f32 	%f342, %f340, %f337, %f341;
	mul.rn.f32 	%f343, %f342, %f337;
	mul.rn.f32 	%f344, %f343, %f336;
	sub.f32 	%f345, %f332, %f336;
	add.f32 	%f346, %f345, %f345;
	neg.f32 	%f347, %f336;
	fma.rn.f32 	%f348, %f347, %f332, %f346;
	mul.rn.f32 	%f349, %f334, %f348;
	add.f32 	%f350, %f344, %f336;
	sub.f32 	%f351, %f336, %f350;
	add.f32 	%f352, %f344, %f351;
	add.f32 	%f353, %f349, %f352;
	add.f32 	%f354, %f350, %f353;
	sub.f32 	%f355, %f350, %f354;
	add.f32 	%f356, %f353, %f355;
	mov.f32 	%f357, 0f3F317200;
	mul.rn.f32 	%f358, %f330, %f357;
	mov.f32 	%f359, 0f35BFBE8E;
	mul.rn.f32 	%f360, %f330, %f359;
	add.f32 	%f361, %f358, %f354;
	sub.f32 	%f362, %f358, %f361;
	add.f32 	%f363, %f354, %f362;
	add.f32 	%f364, %f356, %f363;
	add.f32 	%f365, %f360, %f364;
	add.f32 	%f366, %f361, %f365;
	sub.f32 	%f367, %f361, %f366;
	add.f32 	%f368, %f365, %f367;
	mul.rn.f32 	%f369, %f320, %f366;
	neg.f32 	%f370, %f369;
	fma.rn.f32 	%f371, %f320, %f366, %f370;
	fma.rn.f32 	%f372, %f320, %f368, %f371;
	mov.f32 	%f373, 0f00000000;
	fma.rn.f32 	%f374, %f373, %f366, %f372;
	add.rn.f32 	%f375, %f369, %f374;
	neg.f32 	%f376, %f375;
	add.rn.f32 	%f377, %f369, %f376;
	add.rn.f32 	%f378, %f377, %f374;
	mov.b32 	%r211, %f375;
	setp.eq.s32 	%p48, %r211, 1118925336;
	add.s32 	%r212, %r211, -1;
	mov.b32 	%f379, %r212;
	add.f32 	%f380, %f378, 0f37000000;
	selp.f32 	%f81, %f380, %f378, %p48;
	selp.f32 	%f381, %f379, %f375, %p48;
	mov.f32 	%f382, 0f3FB8AA3B;
	mul.rn.f32 	%f383, %f381, %f382;
	cvt.rzi.f32.f32 	%f384, %f383;
	abs.f32 	%f385, %f384;
	setp.gt.f32 	%p49, %f385, 0f42FC0000;
	mov.b32 	%r213, %f384;
	and.b32  	%r214, %r213, -2147483648;
	or.b32  	%r215, %r214, 1123811328;
	mov.b32 	%f386, %r215;
	selp.f32 	%f387, %f386, %f384, %p49;
	mov.f32 	%f388, 0fBF317218;
	fma.rn.f32 	%f389, %f387, %f388, %f381;
	mov.f32 	%f390, 0f3102E308;
	fma.rn.f32 	%f391, %f387, %f390, %f389;
	mul.f32 	%f392, %f391, 0f3FB8AA3B;
	add.f32 	%f393, %f387, 0f4B40007F;
	mov.b32 	%r216, %f393;
	shl.b32 	%r217, %r216, 23;
	mov.b32 	%f394, %r217;
	ex2.approx.ftz.f32 	%f395, %f392;
	mul.f32 	%f82, %f395, %f394;
	setp.eq.f32 	%p50, %f82, 0f7F800000;
	mov.f32 	%f903, 0f7F800000;
	@%p50 bra 	$L__BB0_41;

	fma.rn.f32 	%f903, %f82, %f81, %f82;

$L__BB0_41:
	mov.f32 	%f872, 0f3E666666;
	cvt.rzi.f32.f32 	%f871, %f872;
	add.f32 	%f870, %f871, %f871;
	mov.f32 	%f869, 0f3EE66666;
	sub.f32 	%f868, %f869, %f870;
	abs.f32 	%f867, %f868;
	setp.lt.f32 	%p51, %f900, 0f00000000;
	setp.eq.f32 	%p52, %f867, 0f3F800000;
	and.pred  	%p1, %p51, %p52;
	setp.eq.f32 	%p53, %f900, 0f00000000;
	@%p53 bra 	$L__BB0_45;
	bra.uni 	$L__BB0_42;

$L__BB0_45:
	add.f32 	%f400, %f900, %f900;
	selp.f32 	%f905, %f400, 0f00000000, %p52;
	bra.uni 	$L__BB0_46;

$L__BB0_42:
	mov.b32 	%r218, %f903;
	xor.b32  	%r219, %r218, -2147483648;
	mov.b32 	%f396, %r219;
	selp.f32 	%f905, %f396, %f903, %p1;
	setp.geu.f32 	%p54, %f900, 0f00000000;
	@%p54 bra 	$L__BB0_46;

	mov.f32 	%f397, 0f3EE66666;
	cvt.rzi.f32.f32 	%f398, %f397;
	setp.eq.f32 	%p55, %f398, 0f3EE66666;
	@%p55 bra 	$L__BB0_46;

	mov.f32 	%f905, 0f7FFFFFFF;

$L__BB0_46:
	abs.f32 	%f873, %f900;
	add.f32 	%f401, %f873, 0f3EE66666;
	mov.b32 	%r220, %f401;
	setp.lt.s32 	%p57, %r220, 2139095040;
	@%p57 bra 	$L__BB0_51;

	abs.f32 	%f874, %f900;
	setp.gtu.f32 	%p58, %f874, 0f7F800000;
	@%p58 bra 	$L__BB0_50;
	bra.uni 	$L__BB0_48;

$L__BB0_50:
	add.f32 	%f905, %f900, 0f3EE66666;
	bra.uni 	$L__BB0_51;

$L__BB0_48:
	abs.f32 	%f875, %f900;
	setp.neu.f32 	%p59, %f875, 0f7F800000;
	@%p59 bra 	$L__BB0_51;

	selp.f32 	%f905, 0fFF800000, 0f7F800000, %p1;

$L__BB0_51:
	setp.eq.f32 	%p60, %f900, 0f3F800000;
	selp.f32 	%f91, 0f3F800000, %f905, %p60;
	abs.f32 	%f92, %f901;
	setp.lt.f32 	%p61, %f92, 0f00800000;
	mul.f32 	%f403, %f92, 0f4B800000;
	selp.f32 	%f404, %f403, %f92, %p61;
	selp.f32 	%f405, 0fC3170000, 0fC2FE0000, %p61;
	mov.b32 	%r221, %f404;
	and.b32  	%r222, %r221, 8388607;
	or.b32  	%r223, %r222, 1065353216;
	mov.b32 	%f406, %r223;
	shr.u32 	%r224, %r221, 23;
	cvt.rn.f32.u32 	%f407, %r224;
	add.f32 	%f408, %f405, %f407;
	setp.gt.f32 	%p62, %f406, 0f3FB504F3;
	mul.f32 	%f409, %f406, 0f3F000000;
	add.f32 	%f410, %f408, 0f3F800000;
	selp.f32 	%f411, %f410, %f408, %p62;
	selp.f32 	%f412, %f409, %f406, %p62;
	add.f32 	%f413, %f412, 0fBF800000;
	add.f32 	%f414, %f412, 0f3F800000;
	rcp.approx.ftz.f32 	%f415, %f414;
	add.f32 	%f416, %f413, %f413;
	mul.f32 	%f417, %f416, %f415;
	mul.f32 	%f418, %f417, %f417;
	mov.f32 	%f419, 0f3C4CAF63;
	mov.f32 	%f420, 0f3B18F0FE;
	fma.rn.f32 	%f421, %f420, %f418, %f419;
	mov.f32 	%f422, 0f3DAAAABD;
	fma.rn.f32 	%f423, %f421, %f418, %f422;
	mul.rn.f32 	%f424, %f423, %f418;
	mul.rn.f32 	%f425, %f424, %f417;
	sub.f32 	%f426, %f413, %f417;
	add.f32 	%f427, %f426, %f426;
	neg.f32 	%f428, %f417;
	fma.rn.f32 	%f429, %f428, %f413, %f427;
	mul.rn.f32 	%f430, %f415, %f429;
	add.f32 	%f431, %f425, %f417;
	sub.f32 	%f432, %f417, %f431;
	add.f32 	%f433, %f425, %f432;
	add.f32 	%f434, %f430, %f433;
	add.f32 	%f435, %f431, %f434;
	sub.f32 	%f436, %f431, %f435;
	add.f32 	%f437, %f434, %f436;
	mov.f32 	%f438, 0f3F317200;
	mul.rn.f32 	%f439, %f411, %f438;
	mov.f32 	%f440, 0f35BFBE8E;
	mul.rn.f32 	%f441, %f411, %f440;
	add.f32 	%f442, %f439, %f435;
	sub.f32 	%f443, %f439, %f442;
	add.f32 	%f444, %f435, %f443;
	add.f32 	%f445, %f437, %f444;
	add.f32 	%f446, %f441, %f445;
	add.f32 	%f447, %f442, %f446;
	sub.f32 	%f448, %f442, %f447;
	add.f32 	%f449, %f446, %f448;
	mov.f32 	%f450, 0f3EE66666;
	mul.rn.f32 	%f451, %f450, %f447;
	neg.f32 	%f452, %f451;
	fma.rn.f32 	%f453, %f450, %f447, %f452;
	fma.rn.f32 	%f454, %f450, %f449, %f453;
	mov.f32 	%f455, 0f00000000;
	fma.rn.f32 	%f456, %f455, %f447, %f454;
	add.rn.f32 	%f457, %f451, %f456;
	neg.f32 	%f458, %f457;
	add.rn.f32 	%f459, %f451, %f458;
	add.rn.f32 	%f460, %f459, %f456;
	mov.b32 	%r225, %f457;
	setp.eq.s32 	%p63, %r225, 1118925336;
	add.s32 	%r226, %r225, -1;
	mov.b32 	%f461, %r226;
	add.f32 	%f462, %f460, 0f37000000;
	selp.f32 	%f93, %f462, %f460, %p63;
	selp.f32 	%f463, %f461, %f457, %p63;
	mov.f32 	%f464, 0f3FB8AA3B;
	mul.rn.f32 	%f465, %f463, %f464;
	cvt.rzi.f32.f32 	%f466, %f465;
	abs.f32 	%f467, %f466;
	setp.gt.f32 	%p64, %f467, 0f42FC0000;
	mov.b32 	%r227, %f466;
	and.b32  	%r228, %r227, -2147483648;
	or.b32  	%r229, %r228, 1123811328;
	mov.b32 	%f468, %r229;
	selp.f32 	%f469, %f468, %f466, %p64;
	mov.f32 	%f470, 0fBF317218;
	fma.rn.f32 	%f471, %f469, %f470, %f463;
	mov.f32 	%f472, 0f3102E308;
	fma.rn.f32 	%f473, %f469, %f472, %f471;
	mul.f32 	%f474, %f473, 0f3FB8AA3B;
	add.f32 	%f475, %f469, 0f4B40007F;
	mov.b32 	%r230, %f475;
	shl.b32 	%r231, %r230, 23;
	mov.b32 	%f476, %r231;
	ex2.approx.ftz.f32 	%f477, %f474;
	mul.f32 	%f94, %f477, %f476;
	setp.eq.f32 	%p65, %f94, 0f7F800000;
	mov.f32 	%f906, 0f7F800000;
	@%p65 bra 	$L__BB0_53;

	fma.rn.f32 	%f906, %f94, %f93, %f94;

$L__BB0_53:
	setp.lt.f32 	%p66, %f901, 0f00000000;
	and.pred  	%p2, %p66, %p52;
	setp.eq.f32 	%p68, %f901, 0f00000000;
	@%p68 bra 	$L__BB0_57;
	bra.uni 	$L__BB0_54;

$L__BB0_57:
	add.f32 	%f482, %f901, %f901;
	selp.f32 	%f908, %f482, 0f00000000, %p52;
	bra.uni 	$L__BB0_58;

$L__BB0_54:
	mov.b32 	%r232, %f906;
	xor.b32  	%r233, %r232, -2147483648;
	mov.b32 	%f478, %r233;
	selp.f32 	%f908, %f478, %f906, %p2;
	setp.geu.f32 	%p69, %f901, 0f00000000;
	@%p69 bra 	$L__BB0_58;

	mov.f32 	%f479, 0f3EE66666;
	cvt.rzi.f32.f32 	%f480, %f479;
	setp.eq.f32 	%p70, %f480, 0f3EE66666;
	@%p70 bra 	$L__BB0_58;

	mov.f32 	%f908, 0f7FFFFFFF;

$L__BB0_58:
	abs.f32 	%f876, %f901;
	add.f32 	%f483, %f876, 0f3EE66666;
	mov.b32 	%r234, %f483;
	setp.lt.s32 	%p72, %r234, 2139095040;
	@%p72 bra 	$L__BB0_63;

	abs.f32 	%f877, %f901;
	setp.gtu.f32 	%p73, %f877, 0f7F800000;
	@%p73 bra 	$L__BB0_62;
	bra.uni 	$L__BB0_60;

$L__BB0_62:
	add.f32 	%f908, %f901, 0f3EE66666;
	bra.uni 	$L__BB0_63;

$L__BB0_60:
	abs.f32 	%f878, %f901;
	setp.neu.f32 	%p74, %f878, 0f7F800000;
	@%p74 bra 	$L__BB0_63;

	selp.f32 	%f908, 0fFF800000, 0f7F800000, %p2;

$L__BB0_63:
	setp.eq.f32 	%p75, %f901, 0f3F800000;
	selp.f32 	%f103, 0f3F800000, %f908, %p75;
	abs.f32 	%f104, %f902;
	setp.lt.f32 	%p76, %f104, 0f00800000;
	mul.f32 	%f485, %f104, 0f4B800000;
	selp.f32 	%f486, %f485, %f104, %p76;
	selp.f32 	%f487, 0fC3170000, 0fC2FE0000, %p76;
	mov.b32 	%r235, %f486;
	and.b32  	%r236, %r235, 8388607;
	or.b32  	%r237, %r236, 1065353216;
	mov.b32 	%f488, %r237;
	shr.u32 	%r238, %r235, 23;
	cvt.rn.f32.u32 	%f489, %r238;
	add.f32 	%f490, %f487, %f489;
	setp.gt.f32 	%p77, %f488, 0f3FB504F3;
	mul.f32 	%f491, %f488, 0f3F000000;
	add.f32 	%f492, %f490, 0f3F800000;
	selp.f32 	%f493, %f492, %f490, %p77;
	selp.f32 	%f494, %f491, %f488, %p77;
	add.f32 	%f495, %f494, 0fBF800000;
	add.f32 	%f496, %f494, 0f3F800000;
	rcp.approx.ftz.f32 	%f497, %f496;
	add.f32 	%f498, %f495, %f495;
	mul.f32 	%f499, %f498, %f497;
	mul.f32 	%f500, %f499, %f499;
	mov.f32 	%f501, 0f3C4CAF63;
	mov.f32 	%f502, 0f3B18F0FE;
	fma.rn.f32 	%f503, %f502, %f500, %f501;
	mov.f32 	%f504, 0f3DAAAABD;
	fma.rn.f32 	%f505, %f503, %f500, %f504;
	mul.rn.f32 	%f506, %f505, %f500;
	mul.rn.f32 	%f507, %f506, %f499;
	sub.f32 	%f508, %f495, %f499;
	add.f32 	%f509, %f508, %f508;
	neg.f32 	%f510, %f499;
	fma.rn.f32 	%f511, %f510, %f495, %f509;
	mul.rn.f32 	%f512, %f497, %f511;
	add.f32 	%f513, %f507, %f499;
	sub.f32 	%f514, %f499, %f513;
	add.f32 	%f515, %f507, %f514;
	add.f32 	%f516, %f512, %f515;
	add.f32 	%f517, %f513, %f516;
	sub.f32 	%f518, %f513, %f517;
	add.f32 	%f519, %f516, %f518;
	mov.f32 	%f520, 0f3F317200;
	mul.rn.f32 	%f521, %f493, %f520;
	mov.f32 	%f522, 0f35BFBE8E;
	mul.rn.f32 	%f523, %f493, %f522;
	add.f32 	%f524, %f521, %f517;
	sub.f32 	%f525, %f521, %f524;
	add.f32 	%f526, %f517, %f525;
	add.f32 	%f527, %f519, %f526;
	add.f32 	%f528, %f523, %f527;
	add.f32 	%f529, %f524, %f528;
	sub.f32 	%f530, %f524, %f529;
	add.f32 	%f531, %f528, %f530;
	mov.f32 	%f532, 0f3EE66666;
	mul.rn.f32 	%f533, %f532, %f529;
	neg.f32 	%f534, %f533;
	fma.rn.f32 	%f535, %f532, %f529, %f534;
	fma.rn.f32 	%f536, %f532, %f531, %f535;
	mov.f32 	%f537, 0f00000000;
	fma.rn.f32 	%f538, %f537, %f529, %f536;
	add.rn.f32 	%f539, %f533, %f538;
	neg.f32 	%f540, %f539;
	add.rn.f32 	%f541, %f533, %f540;
	add.rn.f32 	%f542, %f541, %f538;
	mov.b32 	%r239, %f539;
	setp.eq.s32 	%p78, %r239, 1118925336;
	add.s32 	%r240, %r239, -1;
	mov.b32 	%f543, %r240;
	add.f32 	%f544, %f542, 0f37000000;
	selp.f32 	%f105, %f544, %f542, %p78;
	selp.f32 	%f545, %f543, %f539, %p78;
	mov.f32 	%f546, 0f3FB8AA3B;
	mul.rn.f32 	%f547, %f545, %f546;
	cvt.rzi.f32.f32 	%f548, %f547;
	abs.f32 	%f549, %f548;
	setp.gt.f32 	%p79, %f549, 0f42FC0000;
	mov.b32 	%r241, %f548;
	and.b32  	%r242, %r241, -2147483648;
	or.b32  	%r243, %r242, 1123811328;
	mov.b32 	%f550, %r243;
	selp.f32 	%f551, %f550, %f548, %p79;
	mov.f32 	%f552, 0fBF317218;
	fma.rn.f32 	%f553, %f551, %f552, %f545;
	mov.f32 	%f554, 0f3102E308;
	fma.rn.f32 	%f555, %f551, %f554, %f553;
	mul.f32 	%f556, %f555, 0f3FB8AA3B;
	add.f32 	%f557, %f551, 0f4B40007F;
	mov.b32 	%r244, %f557;
	shl.b32 	%r245, %r244, 23;
	mov.b32 	%f558, %r245;
	ex2.approx.ftz.f32 	%f559, %f556;
	mul.f32 	%f106, %f559, %f558;
	setp.eq.f32 	%p80, %f106, 0f7F800000;
	mov.f32 	%f909, 0f7F800000;
	@%p80 bra 	$L__BB0_65;

	fma.rn.f32 	%f909, %f106, %f105, %f106;

$L__BB0_65:
	setp.lt.f32 	%p81, %f902, 0f00000000;
	and.pred  	%p3, %p81, %p52;
	setp.eq.f32 	%p83, %f902, 0f00000000;
	@%p83 bra 	$L__BB0_69;
	bra.uni 	$L__BB0_66;

$L__BB0_69:
	add.f32 	%f564, %f902, %f902;
	selp.f32 	%f911, %f564, 0f00000000, %p52;
	bra.uni 	$L__BB0_70;

$L__BB0_66:
	mov.b32 	%r246, %f909;
	xor.b32  	%r247, %r246, -2147483648;
	mov.b32 	%f560, %r247;
	selp.f32 	%f911, %f560, %f909, %p3;
	setp.geu.f32 	%p84, %f902, 0f00000000;
	@%p84 bra 	$L__BB0_70;

	mov.f32 	%f561, 0f3EE66666;
	cvt.rzi.f32.f32 	%f562, %f561;
	setp.eq.f32 	%p85, %f562, 0f3EE66666;
	@%p85 bra 	$L__BB0_70;

	mov.f32 	%f911, 0f7FFFFFFF;

$L__BB0_70:
	abs.f32 	%f879, %f902;
	add.f32 	%f565, %f879, 0f3EE66666;
	mov.b32 	%r248, %f565;
	setp.lt.s32 	%p87, %r248, 2139095040;
	@%p87 bra 	$L__BB0_75;

	abs.f32 	%f880, %f902;
	setp.gtu.f32 	%p88, %f880, 0f7F800000;
	@%p88 bra 	$L__BB0_74;
	bra.uni 	$L__BB0_72;

$L__BB0_74:
	add.f32 	%f911, %f902, 0f3EE66666;
	bra.uni 	$L__BB0_75;

$L__BB0_72:
	abs.f32 	%f881, %f902;
	setp.neu.f32 	%p89, %f881, 0f7F800000;
	@%p89 bra 	$L__BB0_75;

	selp.f32 	%f911, 0fFF800000, 0f7F800000, %p3;

$L__BB0_75:
	setp.eq.f32 	%p90, %f902, 0f3F800000;
	mov.f32 	%f567, 0f3F800000;
	selp.f32 	%f568, 0f3F800000, %f911, %p90;
	min.f32 	%f569, %f91, %f567;
	mov.f32 	%f570, 0f00000000;
	max.f32 	%f115, %f570, %f569;
	min.f32 	%f571, %f103, %f567;
	max.f32 	%f116, %f570, %f571;
	min.f32 	%f572, %f568, %f567;
	max.f32 	%f117, %f570, %f572;
	mov.f32 	%f576, 0f3ED55555;
	abs.f32 	%f119, %f115;
	setp.lt.f32 	%p91, %f119, 0f00800000;
	mul.f32 	%f578, %f119, 0f4B800000;
	selp.f32 	%f579, %f578, %f119, %p91;
	selp.f32 	%f580, 0fC3170000, 0fC2FE0000, %p91;
	mov.b32 	%r251, %f579;
	and.b32  	%r252, %r251, 8388607;
	or.b32  	%r253, %r252, 1065353216;
	mov.b32 	%f581, %r253;
	shr.u32 	%r254, %r251, 23;
	cvt.rn.f32.u32 	%f582, %r254;
	add.f32 	%f583, %f580, %f582;
	setp.gt.f32 	%p92, %f581, 0f3FB504F3;
	mul.f32 	%f584, %f581, 0f3F000000;
	add.f32 	%f585, %f583, 0f3F800000;
	selp.f32 	%f586, %f585, %f583, %p92;
	selp.f32 	%f587, %f584, %f581, %p92;
	add.f32 	%f588, %f587, 0fBF800000;
	add.f32 	%f589, %f587, 0f3F800000;
	rcp.approx.ftz.f32 	%f590, %f589;
	add.f32 	%f591, %f588, %f588;
	mul.f32 	%f592, %f591, %f590;
	mul.f32 	%f593, %f592, %f592;
	mov.f32 	%f594, 0f3C4CAF63;
	mov.f32 	%f595, 0f3B18F0FE;
	fma.rn.f32 	%f596, %f595, %f593, %f594;
	mov.f32 	%f597, 0f3DAAAABD;
	fma.rn.f32 	%f598, %f596, %f593, %f597;
	mul.rn.f32 	%f599, %f598, %f593;
	mul.rn.f32 	%f600, %f599, %f592;
	sub.f32 	%f601, %f588, %f592;
	add.f32 	%f602, %f601, %f601;
	neg.f32 	%f603, %f592;
	fma.rn.f32 	%f604, %f603, %f588, %f602;
	mul.rn.f32 	%f605, %f590, %f604;
	add.f32 	%f606, %f600, %f592;
	sub.f32 	%f607, %f592, %f606;
	add.f32 	%f608, %f600, %f607;
	add.f32 	%f609, %f605, %f608;
	add.f32 	%f610, %f606, %f609;
	sub.f32 	%f611, %f606, %f610;
	add.f32 	%f612, %f609, %f611;
	mov.f32 	%f613, 0f3F317200;
	mul.rn.f32 	%f614, %f586, %f613;
	mov.f32 	%f615, 0f35BFBE8E;
	mul.rn.f32 	%f616, %f586, %f615;
	add.f32 	%f617, %f614, %f610;
	sub.f32 	%f618, %f614, %f617;
	add.f32 	%f619, %f610, %f618;
	add.f32 	%f620, %f612, %f619;
	add.f32 	%f621, %f616, %f620;
	add.f32 	%f622, %f617, %f621;
	sub.f32 	%f623, %f617, %f622;
	add.f32 	%f624, %f621, %f623;
	mul.rn.f32 	%f625, %f576, %f622;
	neg.f32 	%f626, %f625;
	fma.rn.f32 	%f627, %f576, %f622, %f626;
	fma.rn.f32 	%f628, %f576, %f624, %f627;
	fma.rn.f32 	%f629, %f570, %f622, %f628;
	add.rn.f32 	%f630, %f625, %f629;
	neg.f32 	%f631, %f630;
	add.rn.f32 	%f632, %f625, %f631;
	add.rn.f32 	%f633, %f632, %f629;
	mov.b32 	%r255, %f630;
	setp.eq.s32 	%p93, %r255, 1118925336;
	add.s32 	%r256, %r255, -1;
	mov.b32 	%f634, %r256;
	add.f32 	%f635, %f633, 0f37000000;
	selp.f32 	%f120, %f635, %f633, %p93;
	selp.f32 	%f636, %f634, %f630, %p93;
	mov.f32 	%f637, 0f3FB8AA3B;
	mul.rn.f32 	%f638, %f636, %f637;
	cvt.rzi.f32.f32 	%f639, %f638;
	abs.f32 	%f640, %f639;
	setp.gt.f32 	%p94, %f640, 0f42FC0000;
	mov.b32 	%r257, %f639;
	and.b32  	%r258, %r257, -2147483648;
	or.b32  	%r259, %r258, 1123811328;
	mov.b32 	%f641, %r259;
	selp.f32 	%f642, %f641, %f639, %p94;
	mov.f32 	%f643, 0fBF317218;
	fma.rn.f32 	%f644, %f642, %f643, %f636;
	mov.f32 	%f645, 0f3102E308;
	fma.rn.f32 	%f646, %f642, %f645, %f644;
	mul.f32 	%f647, %f646, 0f3FB8AA3B;
	add.f32 	%f648, %f642, 0f4B40007F;
	mov.b32 	%r260, %f648;
	shl.b32 	%r261, %r260, 23;
	mov.b32 	%f649, %r261;
	ex2.approx.ftz.f32 	%f650, %f647;
	mul.f32 	%f121, %f650, %f649;
	setp.eq.f32 	%p95, %f121, 0f7F800000;
	mov.f32 	%f912, 0f7F800000;
	@%p95 bra 	$L__BB0_77;

	fma.rn.f32 	%f912, %f121, %f120, %f121;

$L__BB0_77:
	mov.f32 	%f866, 0f3E555555;
	cvt.rzi.f32.f32 	%f865, %f866;
	add.f32 	%f864, %f865, %f865;
	mov.f32 	%f863, 0f3ED55555;
	sub.f32 	%f862, %f863, %f864;
	abs.f32 	%f861, %f862;
	setp.lt.f32 	%p96, %f115, 0f00000000;
	setp.eq.f32 	%p97, %f861, 0f3F800000;
	and.pred  	%p4, %p96, %p97;
	setp.eq.f32 	%p98, %f115, 0f00000000;
	@%p98 bra 	$L__BB0_81;
	bra.uni 	$L__BB0_78;

$L__BB0_81:
	add.f32 	%f655, %f115, %f115;
	selp.f32 	%f914, %f655, 0f00000000, %p97;
	bra.uni 	$L__BB0_82;

$L__BB0_78:
	mov.b32 	%r262, %f912;
	xor.b32  	%r263, %r262, -2147483648;
	mov.b32 	%f651, %r263;
	selp.f32 	%f914, %f651, %f912, %p4;
	setp.geu.f32 	%p99, %f115, 0f00000000;
	@%p99 bra 	$L__BB0_82;

	mov.f32 	%f652, 0f3ED55555;
	cvt.rzi.f32.f32 	%f653, %f652;
	setp.eq.f32 	%p100, %f653, 0f3ED55555;
	@%p100 bra 	$L__BB0_82;

	mov.f32 	%f914, 0f7FFFFFFF;

$L__BB0_82:
	add.f32 	%f656, %f119, 0f3ED55555;
	mov.b32 	%r264, %f656;
	setp.lt.s32 	%p102, %r264, 2139095040;
	@%p102 bra 	$L__BB0_87;

	setp.gtu.f32 	%p103, %f119, 0f7F800000;
	@%p103 bra 	$L__BB0_86;
	bra.uni 	$L__BB0_84;

$L__BB0_86:
	add.f32 	%f914, %f115, 0f3ED55555;
	bra.uni 	$L__BB0_87;

$L__BB0_84:
	setp.neu.f32 	%p104, %f119, 0f7F800000;
	@%p104 bra 	$L__BB0_87;

	selp.f32 	%f914, 0fFF800000, 0f7F800000, %p4;

$L__BB0_87:
	abs.f32 	%f130, %f116;
	setp.lt.f32 	%p105, %f130, 0f00800000;
	mul.f32 	%f658, %f130, 0f4B800000;
	selp.f32 	%f659, %f658, %f130, %p105;
	selp.f32 	%f660, 0fC3170000, 0fC2FE0000, %p105;
	mov.b32 	%r265, %f659;
	and.b32  	%r266, %r265, 8388607;
	or.b32  	%r267, %r266, 1065353216;
	mov.b32 	%f661, %r267;
	shr.u32 	%r268, %r265, 23;
	cvt.rn.f32.u32 	%f662, %r268;
	add.f32 	%f663, %f660, %f662;
	setp.gt.f32 	%p106, %f661, 0f3FB504F3;
	mul.f32 	%f664, %f661, 0f3F000000;
	add.f32 	%f665, %f663, 0f3F800000;
	selp.f32 	%f666, %f665, %f663, %p106;
	selp.f32 	%f667, %f664, %f661, %p106;
	add.f32 	%f668, %f667, 0fBF800000;
	add.f32 	%f669, %f667, 0f3F800000;
	rcp.approx.ftz.f32 	%f670, %f669;
	add.f32 	%f671, %f668, %f668;
	mul.f32 	%f672, %f671, %f670;
	mul.f32 	%f673, %f672, %f672;
	mov.f32 	%f674, 0f3C4CAF63;
	mov.f32 	%f675, 0f3B18F0FE;
	fma.rn.f32 	%f676, %f675, %f673, %f674;
	mov.f32 	%f677, 0f3DAAAABD;
	fma.rn.f32 	%f678, %f676, %f673, %f677;
	mul.rn.f32 	%f679, %f678, %f673;
	mul.rn.f32 	%f680, %f679, %f672;
	sub.f32 	%f681, %f668, %f672;
	add.f32 	%f682, %f681, %f681;
	neg.f32 	%f683, %f672;
	fma.rn.f32 	%f684, %f683, %f668, %f682;
	mul.rn.f32 	%f685, %f670, %f684;
	add.f32 	%f686, %f680, %f672;
	sub.f32 	%f687, %f672, %f686;
	add.f32 	%f688, %f680, %f687;
	add.f32 	%f689, %f685, %f688;
	add.f32 	%f690, %f686, %f689;
	sub.f32 	%f691, %f686, %f690;
	add.f32 	%f692, %f689, %f691;
	mov.f32 	%f693, 0f3F317200;
	mul.rn.f32 	%f694, %f666, %f693;
	mov.f32 	%f695, 0f35BFBE8E;
	mul.rn.f32 	%f696, %f666, %f695;
	add.f32 	%f697, %f694, %f690;
	sub.f32 	%f698, %f694, %f697;
	add.f32 	%f699, %f690, %f698;
	add.f32 	%f700, %f692, %f699;
	add.f32 	%f701, %f696, %f700;
	add.f32 	%f702, %f697, %f701;
	sub.f32 	%f703, %f697, %f702;
	add.f32 	%f704, %f701, %f703;
	mov.f32 	%f705, 0f3ED55555;
	mul.rn.f32 	%f706, %f705, %f702;
	neg.f32 	%f707, %f706;
	fma.rn.f32 	%f708, %f705, %f702, %f707;
	fma.rn.f32 	%f709, %f705, %f704, %f708;
	mov.f32 	%f710, 0f00000000;
	fma.rn.f32 	%f711, %f710, %f702, %f709;
	add.rn.f32 	%f712, %f706, %f711;
	neg.f32 	%f713, %f712;
	add.rn.f32 	%f714, %f706, %f713;
	add.rn.f32 	%f715, %f714, %f711;
	mov.b32 	%r269, %f712;
	setp.eq.s32 	%p107, %r269, 1118925336;
	add.s32 	%r270, %r269, -1;
	mov.b32 	%f716, %r270;
	add.f32 	%f717, %f715, 0f37000000;
	selp.f32 	%f131, %f717, %f715, %p107;
	selp.f32 	%f718, %f716, %f712, %p107;
	mov.f32 	%f719, 0f3FB8AA3B;
	mul.rn.f32 	%f720, %f718, %f719;
	cvt.rzi.f32.f32 	%f721, %f720;
	abs.f32 	%f722, %f721;
	setp.gt.f32 	%p108, %f722, 0f42FC0000;
	mov.b32 	%r271, %f721;
	and.b32  	%r272, %r271, -2147483648;
	or.b32  	%r273, %r272, 1123811328;
	mov.b32 	%f723, %r273;
	selp.f32 	%f724, %f723, %f721, %p108;
	mov.f32 	%f725, 0fBF317218;
	fma.rn.f32 	%f726, %f724, %f725, %f718;
	mov.f32 	%f727, 0f3102E308;
	fma.rn.f32 	%f728, %f724, %f727, %f726;
	mul.f32 	%f729, %f728, 0f3FB8AA3B;
	add.f32 	%f730, %f724, 0f4B40007F;
	mov.b32 	%r274, %f730;
	shl.b32 	%r275, %r274, 23;
	mov.b32 	%f731, %r275;
	ex2.approx.ftz.f32 	%f732, %f729;
	mul.f32 	%f132, %f732, %f731;
	setp.eq.f32 	%p109, %f132, 0f7F800000;
	mov.f32 	%f915, 0f7F800000;
	@%p109 bra 	$L__BB0_89;

	fma.rn.f32 	%f915, %f132, %f131, %f132;

$L__BB0_89:
	setp.lt.f32 	%p110, %f116, 0f00000000;
	and.pred  	%p5, %p110, %p97;
	setp.eq.f32 	%p112, %f116, 0f00000000;
	@%p112 bra 	$L__BB0_93;
	bra.uni 	$L__BB0_90;

$L__BB0_93:
	add.f32 	%f737, %f116, %f116;
	selp.f32 	%f917, %f737, 0f00000000, %p97;
	bra.uni 	$L__BB0_94;

$L__BB0_90:
	mov.b32 	%r276, %f915;
	xor.b32  	%r277, %r276, -2147483648;
	mov.b32 	%f733, %r277;
	selp.f32 	%f917, %f733, %f915, %p5;
	setp.geu.f32 	%p113, %f116, 0f00000000;
	@%p113 bra 	$L__BB0_94;

	mov.f32 	%f734, 0f3ED55555;
	cvt.rzi.f32.f32 	%f735, %f734;
	setp.eq.f32 	%p114, %f735, 0f3ED55555;
	@%p114 bra 	$L__BB0_94;

	mov.f32 	%f917, 0f7FFFFFFF;

$L__BB0_94:
	add.f32 	%f738, %f130, 0f3ED55555;
	mov.b32 	%r278, %f738;
	setp.lt.s32 	%p116, %r278, 2139095040;
	@%p116 bra 	$L__BB0_99;

	setp.gtu.f32 	%p117, %f130, 0f7F800000;
	@%p117 bra 	$L__BB0_98;
	bra.uni 	$L__BB0_96;

$L__BB0_98:
	add.f32 	%f917, %f116, 0f3ED55555;
	bra.uni 	$L__BB0_99;

$L__BB0_96:
	setp.neu.f32 	%p118, %f130, 0f7F800000;
	@%p118 bra 	$L__BB0_99;

	selp.f32 	%f917, 0fFF800000, 0f7F800000, %p5;

$L__BB0_99:
	abs.f32 	%f141, %f117;
	setp.lt.f32 	%p119, %f141, 0f00800000;
	mul.f32 	%f740, %f141, 0f4B800000;
	selp.f32 	%f741, %f740, %f141, %p119;
	selp.f32 	%f742, 0fC3170000, 0fC2FE0000, %p119;
	mov.b32 	%r279, %f741;
	and.b32  	%r280, %r279, 8388607;
	or.b32  	%r281, %r280, 1065353216;
	mov.b32 	%f743, %r281;
	shr.u32 	%r282, %r279, 23;
	cvt.rn.f32.u32 	%f744, %r282;
	add.f32 	%f745, %f742, %f744;
	setp.gt.f32 	%p120, %f743, 0f3FB504F3;
	mul.f32 	%f746, %f743, 0f3F000000;
	add.f32 	%f747, %f745, 0f3F800000;
	selp.f32 	%f748, %f747, %f745, %p120;
	selp.f32 	%f749, %f746, %f743, %p120;
	add.f32 	%f750, %f749, 0fBF800000;
	add.f32 	%f751, %f749, 0f3F800000;
	rcp.approx.ftz.f32 	%f752, %f751;
	add.f32 	%f753, %f750, %f750;
	mul.f32 	%f754, %f753, %f752;
	mul.f32 	%f755, %f754, %f754;
	mov.f32 	%f756, 0f3C4CAF63;
	mov.f32 	%f757, 0f3B18F0FE;
	fma.rn.f32 	%f758, %f757, %f755, %f756;
	mov.f32 	%f759, 0f3DAAAABD;
	fma.rn.f32 	%f760, %f758, %f755, %f759;
	mul.rn.f32 	%f761, %f760, %f755;
	mul.rn.f32 	%f762, %f761, %f754;
	sub.f32 	%f763, %f750, %f754;
	add.f32 	%f764, %f763, %f763;
	neg.f32 	%f765, %f754;
	fma.rn.f32 	%f766, %f765, %f750, %f764;
	mul.rn.f32 	%f767, %f752, %f766;
	add.f32 	%f768, %f762, %f754;
	sub.f32 	%f769, %f754, %f768;
	add.f32 	%f770, %f762, %f769;
	add.f32 	%f771, %f767, %f770;
	add.f32 	%f772, %f768, %f771;
	sub.f32 	%f773, %f768, %f772;
	add.f32 	%f774, %f771, %f773;
	mov.f32 	%f775, 0f3F317200;
	mul.rn.f32 	%f776, %f748, %f775;
	mov.f32 	%f777, 0f35BFBE8E;
	mul.rn.f32 	%f778, %f748, %f777;
	add.f32 	%f779, %f776, %f772;
	sub.f32 	%f780, %f776, %f779;
	add.f32 	%f781, %f772, %f780;
	add.f32 	%f782, %f774, %f781;
	add.f32 	%f783, %f778, %f782;
	add.f32 	%f784, %f779, %f783;
	sub.f32 	%f785, %f779, %f784;
	add.f32 	%f786, %f783, %f785;
	mov.f32 	%f787, 0f3ED55555;
	mul.rn.f32 	%f788, %f787, %f784;
	neg.f32 	%f789, %f788;
	fma.rn.f32 	%f790, %f787, %f784, %f789;
	fma.rn.f32 	%f791, %f787, %f786, %f790;
	mov.f32 	%f792, 0f00000000;
	fma.rn.f32 	%f793, %f792, %f784, %f791;
	add.rn.f32 	%f794, %f788, %f793;
	neg.f32 	%f795, %f794;
	add.rn.f32 	%f796, %f788, %f795;
	add.rn.f32 	%f797, %f796, %f793;
	mov.b32 	%r283, %f794;
	setp.eq.s32 	%p121, %r283, 1118925336;
	add.s32 	%r284, %r283, -1;
	mov.b32 	%f798, %r284;
	add.f32 	%f799, %f797, 0f37000000;
	selp.f32 	%f142, %f799, %f797, %p121;
	selp.f32 	%f800, %f798, %f794, %p121;
	mov.f32 	%f801, 0f3FB8AA3B;
	mul.rn.f32 	%f802, %f800, %f801;
	cvt.rzi.f32.f32 	%f803, %f802;
	abs.f32 	%f804, %f803;
	setp.gt.f32 	%p122, %f804, 0f42FC0000;
	mov.b32 	%r285, %f803;
	and.b32  	%r286, %r285, -2147483648;
	or.b32  	%r287, %r286, 1123811328;
	mov.b32 	%f805, %r287;
	selp.f32 	%f806, %f805, %f803, %p122;
	mov.f32 	%f807, 0fBF317218;
	fma.rn.f32 	%f808, %f806, %f807, %f800;
	mov.f32 	%f809, 0f3102E308;
	fma.rn.f32 	%f810, %f806, %f809, %f808;
	mul.f32 	%f811, %f810, 0f3FB8AA3B;
	add.f32 	%f812, %f806, 0f4B40007F;
	mov.b32 	%r288, %f812;
	shl.b32 	%r289, %r288, 23;
	mov.b32 	%f813, %r289;
	ex2.approx.ftz.f32 	%f814, %f811;
	mul.f32 	%f143, %f814, %f813;
	setp.eq.f32 	%p123, %f143, 0f7F800000;
	mov.f32 	%f918, 0f7F800000;
	@%p123 bra 	$L__BB0_101;

	fma.rn.f32 	%f918, %f143, %f142, %f143;

$L__BB0_101:
	setp.lt.f32 	%p124, %f117, 0f00000000;
	and.pred  	%p6, %p124, %p97;
	setp.eq.f32 	%p126, %f117, 0f00000000;
	@%p126 bra 	$L__BB0_105;
	bra.uni 	$L__BB0_102;

$L__BB0_105:
	add.f32 	%f819, %f117, %f117;
	selp.f32 	%f920, %f819, 0f00000000, %p97;
	bra.uni 	$L__BB0_106;

$L__BB0_102:
	mov.b32 	%r290, %f918;
	xor.b32  	%r291, %r290, -2147483648;
	mov.b32 	%f815, %r291;
	selp.f32 	%f920, %f815, %f918, %p6;
	setp.geu.f32 	%p127, %f117, 0f00000000;
	@%p127 bra 	$L__BB0_106;

	mov.f32 	%f816, 0f3ED55555;
	cvt.rzi.f32.f32 	%f817, %f816;
	setp.eq.f32 	%p128, %f817, 0f3ED55555;
	@%p128 bra 	$L__BB0_106;

	mov.f32 	%f920, 0f7FFFFFFF;

$L__BB0_106:
	add.f32 	%f820, %f141, 0f3ED55555;
	mov.b32 	%r292, %f820;
	setp.lt.s32 	%p130, %r292, 2139095040;
	@%p130 bra 	$L__BB0_111;

	setp.gtu.f32 	%p131, %f141, 0f7F800000;
	@%p131 bra 	$L__BB0_110;
	bra.uni 	$L__BB0_108;

$L__BB0_110:
	add.f32 	%f920, %f117, 0f3ED55555;
	bra.uni 	$L__BB0_111;

$L__BB0_108:
	setp.neu.f32 	%p132, %f141, 0f7F800000;
	@%p132 bra 	$L__BB0_111;

	selp.f32 	%f920, 0fFF800000, 0f7F800000, %p6;

$L__BB0_111:
	ld.const.u64 	%rd84, [params+144];
	cvta.to.global.u64 	%rd83, %rd84;
	ld.const.u32 	%r315, [params+136];
	mad.lo.s32 	%r314, %r315, %r5, %r4;
	cvt.u64.u32 	%rd82, %r314;
	fma.rn.f32 	%f821, %f914, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p133, %f115, 0f3F800000;
	mov.f32 	%f822, 0f3F800000;
	selp.f32 	%f823, 0f3F7FFFFF, %f821, %p133;
	mul.f32 	%f824, %f115, 0f414EB852;
	setp.lt.f32 	%p134, %f115, 0f3B4D2E1C;
	selp.f32 	%f825, %f824, %f823, %p134;
	fma.rn.f32 	%f826, %f917, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p135, %f116, 0f3F800000;
	selp.f32 	%f827, 0f3F7FFFFF, %f826, %p135;
	mul.f32 	%f828, %f116, 0f414EB852;
	setp.lt.f32 	%p136, %f116, 0f3B4D2E1C;
	selp.f32 	%f829, %f828, %f827, %p136;
	fma.rn.f32 	%f830, %f920, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p137, %f117, 0f3F800000;
	selp.f32 	%f831, 0f3F7FFFFF, %f830, %p137;
	mul.f32 	%f832, %f117, 0f414EB852;
	setp.lt.f32 	%p138, %f117, 0f3B4D2E1C;
	selp.f32 	%f833, %f832, %f831, %p138;
	min.f32 	%f834, %f825, %f822;
	mov.f32 	%f835, 0f00000000;
	max.f32 	%f836, %f835, %f834;
	mul.f32 	%f837, %f836, 0f43800000;
	cvt.rzi.u32.f32 	%r293, %f837;
	min.u32 	%r294, %r293, 255;
	min.f32 	%f838, %f829, %f822;
	max.f32 	%f839, %f835, %f838;
	mul.f32 	%f840, %f839, 0f43800000;
	cvt.rzi.u32.f32 	%r295, %f840;
	min.u32 	%r296, %r295, 255;
	min.f32 	%f841, %f833, %f822;
	max.f32 	%f842, %f835, %f841;
	mul.f32 	%f843, %f842, 0f43800000;
	cvt.rzi.u32.f32 	%r297, %f843;
	min.u32 	%r298, %r297, 255;
	shl.b64 	%rd60, %rd82, 2;
	add.s64 	%rd61, %rd83, %rd60;
	cvt.u16.u32 	%rs23, %r298;
	cvt.u16.u32 	%rs24, %r296;
	cvt.u16.u32 	%rs25, %r294;
	mov.u16 	%rs26, 255;
	st.global.v4.u8 	[%rd61], {%rs25, %rs24, %rs23, %rs26};

$L__BB0_112:
	ld.const.u32 	%r316, [params+104];
	and.b32  	%r299, %r316, 4;
	setp.eq.s32 	%p139, %r299, 0;
	@%p139 bra 	$L__BB0_114;

	ld.const.u64 	%rd62, [params+224];
	cvta.to.global.u64 	%rd63, %rd62;
	ld.const.u32 	%r300, [params+216];
	mad.lo.s32 	%r301, %r300, %r5, %r4;
	mov.f32 	%f847, 0f3F800000;
	mul.wide.u32 	%rd64, %r301, 8;
	add.s64 	%rd65, %rd63, %rd64;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f847;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f902;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f901;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f900;}

	// end inline asm
	st.global.v4.u16 	[%rd65], {%rs27, %rs28, %rs29, %rs30};

$L__BB0_114:
	ld.const.u32 	%r317, [params+104];
	and.b32  	%r302, %r317, 16;
	setp.eq.s32 	%p140, %r302, 0;
	@%p140 bra 	$L__BB0_122;

	ld.const.u64 	%rd66, [params+240];
	cvta.to.global.u64 	%rd67, %rd66;
	ld.const.u32 	%r303, [params+232];
	mad.lo.s32 	%r304, %r303, %r5, %r4;
	mov.f32 	%f851, 0f3F800000;
	mul.wide.u32 	%rd68, %r304, 8;
	add.s64 	%rd69, %rd67, %rd68;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs34, %f851;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs33, %f66;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs32, %f65;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs31, %f64;}

	// end inline asm
	st.global.v4.u16 	[%rd69], {%rs31, %rs32, %rs33, %rs34};

$L__BB0_122:
	ret;

}