// // Generated by NVIDIA NVVM Compiler // // Compiler Build ID: CL-23083092 // Cuda compilation tools, release 9.1, V9.1.85 // Based on LLVM 3.4svn // .version 6.1 .target sm_30 .address_size 64 // .globl _Z6oxMainv .global .align 8 .b8 pixelID[8]; .global .align 8 .b8 resolution[8]; .global .align 4 .b8 normal[12]; .global .align 4 .b8 camPos[12]; .global .align 4 .b8 root[4]; .global .align 4 .u32 imageEnabled; .global .texref lightmap; .global .align 16 .b8 tileInfo[16]; .global .align 4 .u32 additive; .global .align 1 .b8 image_Mask[1]; .global .align 1 .b8 image_HDR[1]; .global .align 1 .b8 image_HDR2[1]; .global .align 1 .b8 uvpos[1]; .global .align 1 .b8 uvnormal[1]; .global .align 1 .b8 rnd_seeds[1]; .global .align 4 .u32 samples; .global .align 4 .f32 lightRadius; .global .align 4 .f32 intensity; .global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo9intensityE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; .global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; .global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename9intensityE[6] = {102, 108, 111, 97, 116, 0}; .global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum9intensityE = 4919; .global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; .global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic9intensityE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation9intensityE[1]; .const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; .visible .entry _Z6oxMainv( ) { .local .align 4 .b8 __local_depot0[32]; .reg .b64 %SP; .reg .b64 %SPL; .reg .pred %p<91>; .reg .b16 %rs<47>; .reg .f32 %f<453>; .reg .b32 %r<294>; .reg .b64 %rd<112>; mov.u64 %rd111, __local_depot0; cvta.local.u64 %SP, %rd111; ld.global.v2.u32 {%r91, %r92}, [pixelID]; cvt.u64.u32 %rd22, %r91; cvt.u64.u32 %rd23, %r92; mov.u64 %rd26, uvnormal; cvta.global.u64 %rd21, %rd26; mov.u32 %r89, 2; mov.u32 %r90, 4; mov.u64 %rd25, 0; // inline asm call (%rd20), _rt_buffer_get_64, (%rd21, %r89, %r90, %rd22, %rd23, %rd25, %rd25); // inline asm ld.u32 %r1, [%rd20]; shr.u32 %r95, %r1, 16; cvt.u16.u32 %rs1, %r95; and.b16 %rs3, %rs1, 255; cvt.u16.u32 %rs4, %r1; or.b16 %rs5, %rs4, %rs3; setp.eq.s16 %p3, %rs5, 0; mov.f32 %f427, 0f00000000; mov.f32 %f428, %f427; mov.f32 %f429, %f427; @%p3 bra BB0_2; ld.u8 %rs6, [%rd20+1]; and.b16 %rs8, %rs4, 255; cvt.rn.f32.u16 %f102, %rs8; div.rn.f32 %f103, %f102, 0f437F0000; fma.rn.f32 %f104, %f103, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f105, %rs6; div.rn.f32 %f106, %f105, 0f437F0000; fma.rn.f32 %f107, %f106, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f108, %rs3; div.rn.f32 %f109, %f108, 0f437F0000; fma.rn.f32 %f110, %f109, 0f40000000, 0fBF800000; mul.f32 %f111, %f107, %f107; fma.rn.f32 %f112, %f104, %f104, %f111; fma.rn.f32 %f113, %f110, %f110, %f112; sqrt.rn.f32 %f114, %f113; rcp.rn.f32 %f115, %f114; mul.f32 %f427, %f104, %f115; mul.f32 %f428, %f107, %f115; mul.f32 %f429, %f110, %f115; BB0_2: ld.global.v2.u32 {%r96, %r97}, [pixelID]; ld.global.v2.u32 {%r99, %r100}, [tileInfo]; add.s32 %r2, %r96, %r99; add.s32 %r3, %r97, %r100; setp.eq.f32 %p4, %f428, 0f00000000; setp.eq.f32 %p5, %f427, 0f00000000; and.pred %p6, %p5, %p4; setp.eq.f32 %p7, %f429, 0f00000000; and.pred %p8, %p6, %p7; @%p8 bra BB0_90; bra.uni BB0_3; BB0_90: ld.global.u8 %rs28, [imageEnabled]; and.b16 %rs29, %rs28, 4; setp.eq.s16 %p88, %rs29, 0; @%p88 bra BB0_94; ld.global.u32 %r256, [additive]; setp.eq.s32 %p89, %r256, 0; cvt.u64.u32 %rd18, %r2; cvt.u64.u32 %rd19, %r3; @%p89 bra BB0_93; mov.u64 %rd92, image_HDR; cvta.global.u64 %rd81, %rd92; mov.u32 %r260, 8; // inline asm call (%rd80), _rt_buffer_get_64, (%rd81, %r89, %r260, %rd18, %rd19, %rd25, %rd25); // inline asm ld.v4.u16 {%rs36, %rs37, %rs38, %rs39}, [%rd80]; // inline asm { cvt.f32.f16 %f417, %rs36;} // inline asm // inline asm { cvt.f32.f16 %f418, %rs37;} // inline asm // inline asm { cvt.f32.f16 %f419, %rs38;} // inline asm // inline asm call (%rd86), _rt_buffer_get_64, (%rd81, %r89, %r260, %rd18, %rd19, %rd25, %rd25); // inline asm add.f32 %f420, %f417, 0f00000000; add.f32 %f421, %f418, 0f00000000; add.f32 %f422, %f419, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs35, %f422;} // inline asm // inline asm { cvt.rn.f16.f32 %rs34, %f421;} // inline asm // inline asm { cvt.rn.f16.f32 %rs33, %f420;} // inline asm mov.u16 %rs40, 0; st.v4.u16 [%rd86], {%rs33, %rs34, %rs35, %rs40}; bra.uni BB0_94; BB0_3: ld.global.v2.u32 {%r108, %r109}, [pixelID]; cvt.u64.u32 %rd29, %r108; cvt.u64.u32 %rd30, %r109; mov.u64 %rd39, uvpos; cvta.global.u64 %rd28, %rd39; mov.u32 %r105, 12; // inline asm call (%rd27), _rt_buffer_get_64, (%rd28, %r89, %r105, %rd29, %rd30, %rd25, %rd25); // inline asm ld.f32 %f117, [%rd27+8]; ld.f32 %f118, [%rd27+4]; ld.f32 %f119, [%rd27]; mul.f32 %f120, %f119, 0f3456BF95; mul.f32 %f121, %f118, 0f3456BF95; mul.f32 %f122, %f117, 0f3456BF95; abs.f32 %f123, %f427; div.rn.f32 %f124, %f120, %f123; abs.f32 %f125, %f428; div.rn.f32 %f126, %f121, %f125; abs.f32 %f127, %f429; div.rn.f32 %f128, %f122, %f127; abs.f32 %f129, %f124; abs.f32 %f130, %f126; abs.f32 %f131, %f128; mov.f32 %f132, 0f38D1B717; max.f32 %f133, %f129, %f132; max.f32 %f134, %f130, %f132; max.f32 %f135, %f131, %f132; fma.rn.f32 %f7, %f427, %f133, %f119; fma.rn.f32 %f8, %f428, %f134, %f118; fma.rn.f32 %f9, %f429, %f135, %f117; setp.gt.f32 %p9, %f123, %f127; neg.f32 %f136, %f428; selp.f32 %f137, %f136, 0f00000000, %p9; neg.f32 %f138, %f429; selp.f32 %f139, %f427, %f138, %p9; selp.f32 %f140, 0f00000000, %f428, %p9; mul.f32 %f141, %f139, %f139; fma.rn.f32 %f142, %f137, %f137, %f141; fma.rn.f32 %f143, %f140, %f140, %f142; sqrt.rn.f32 %f144, %f143; rcp.rn.f32 %f145, %f144; mul.f32 %f10, %f137, %f145; mul.f32 %f11, %f139, %f145; mul.f32 %f12, %f140, %f145; ld.global.v2.u32 {%r112, %r113}, [pixelID]; cvt.u64.u32 %rd35, %r112; cvt.u64.u32 %rd36, %r113; mov.u64 %rd40, rnd_seeds; cvta.global.u64 %rd34, %rd40; // inline asm call (%rd33), _rt_buffer_get_64, (%rd34, %r89, %r90, %rd35, %rd36, %rd25, %rd25); // inline asm ld.global.u32 %r266, [samples]; mov.f32 %f444, 0f00000000; setp.lt.s32 %p10, %r266, 1; @%p10 bra BB0_55; cvt.rn.f32.s32 %f147, %r266; rcp.rn.f32 %f13, %f147; ld.u32 %r292, [%rd33]; mul.f32 %f14, %f7, 0f3456BF95; mul.f32 %f15, %f8, 0f3456BF95; mul.f32 %f16, %f9, 0f3456BF95; mul.f32 %f148, %f427, %f11; mul.f32 %f149, %f428, %f10; sub.f32 %f17, %f149, %f148; mul.f32 %f150, %f429, %f10; mul.f32 %f151, %f427, %f12; sub.f32 %f18, %f151, %f150; mul.f32 %f152, %f428, %f12; mul.f32 %f153, %f429, %f11; sub.f32 %f19, %f153, %f152; mov.f32 %f444, 0f00000000; mov.u32 %r267, 0; abs.f32 %f154, %f15; abs.f32 %f155, %f14; max.f32 %f156, %f155, %f154; abs.f32 %f157, %f16; max.f32 %f158, %f156, %f157; BB0_5: setp.lt.s32 %p11, %r266, 1; @%p11 bra BB0_54; cvt.rn.f32.s32 %f21, %r267; max.f32 %f22, %f158, %f132; mov.u32 %r269, 0; BB0_7: mad.lo.s32 %r118, %r292, 1664525, 1013904223; and.b32 %r119, %r118, 16777215; cvt.rn.f32.u32 %f160, %r119; fma.rn.f32 %f161, %f160, 0f33800000, %f21; mul.f32 %f162, %f13, %f161; mad.lo.s32 %r292, %r118, 1664525, 1013904223; and.b32 %r120, %r292, 16777215; cvt.rn.f32.u32 %f163, %r120; cvt.rn.f32.s32 %f164, %r269; fma.rn.f32 %f165, %f163, 0f33800000, %f164; mul.f32 %f166, %f13, %f165; sqrt.rn.f32 %f24, %f162; mul.f32 %f438, %f166, 0f40C90FDB; abs.f32 %f26, %f438; setp.neu.f32 %p12, %f26, 0f7F800000; mov.f32 %f432, %f438; @%p12 bra BB0_9; mov.f32 %f167, 0f00000000; mul.rn.f32 %f432, %f438, %f167; BB0_9: mul.f32 %f168, %f432, 0f3F22F983; cvt.rni.s32.f32 %r280, %f168; cvt.rn.f32.s32 %f169, %r280; neg.f32 %f170, %f169; mov.f32 %f171, 0f3FC90FDA; fma.rn.f32 %f172, %f170, %f171, %f432; mov.f32 %f173, 0f33A22168; fma.rn.f32 %f174, %f170, %f173, %f172; mov.f32 %f175, 0f27C234C5; fma.rn.f32 %f433, %f170, %f175, %f174; abs.f32 %f176, %f432; setp.leu.f32 %p13, %f176, 0f47CE4780; @%p13 bra BB0_20; mov.b32 %r13, %f432; shr.u32 %r14, %r13, 23; shl.b32 %r123, %r13, 8; or.b32 %r15, %r123, -2147483648; add.u64 %rd42, %SP, 0; cvta.to.local.u64 %rd108, %rd42; mov.u32 %r272, 0; mov.u64 %rd107, __cudart_i2opi_f; mov.u32 %r271, -6; BB0_11: .pragma "nounroll"; ld.const.u32 %r126, [%rd107]; // inline asm { mad.lo.cc.u32 %r124, %r126, %r15, %r272; madc.hi.u32 %r272, %r126, %r15, 0; } // inline asm st.local.u32 [%rd108], %r124; add.s64 %rd108, %rd108, 4; add.s64 %rd107, %rd107, 4; add.s32 %r271, %r271, 1; setp.ne.s32 %p14, %r271, 0; @%p14 bra BB0_11; and.b32 %r129, %r14, 255; add.s32 %r130, %r129, -128; shr.u32 %r131, %r130, 5; and.b32 %r20, %r13, -2147483648; cvta.to.local.u64 %rd44, %rd42; st.local.u32 [%rd44+24], %r272; mov.u32 %r132, 6; sub.s32 %r133, %r132, %r131; mul.wide.s32 %rd45, %r133, 4; add.s64 %rd8, %rd44, %rd45; ld.local.u32 %r273, [%rd8]; ld.local.u32 %r274, [%rd8+-4]; and.b32 %r23, %r14, 31; setp.eq.s32 %p15, %r23, 0; @%p15 bra BB0_14; mov.u32 %r134, 32; sub.s32 %r135, %r134, %r23; shr.u32 %r136, %r274, %r135; shl.b32 %r137, %r273, %r23; add.s32 %r273, %r136, %r137; ld.local.u32 %r138, [%rd8+-8]; shr.u32 %r139, %r138, %r135; shl.b32 %r140, %r274, %r23; add.s32 %r274, %r139, %r140; BB0_14: shr.u32 %r141, %r274, 30; shl.b32 %r142, %r273, 2; add.s32 %r275, %r141, %r142; shl.b32 %r29, %r274, 2; shr.u32 %r143, %r275, 31; shr.u32 %r144, %r273, 30; add.s32 %r30, %r143, %r144; setp.eq.s32 %p16, %r143, 0; @%p16 bra BB0_15; bra.uni BB0_16; BB0_15: mov.u32 %r276, %r20; mov.u32 %r277, %r29; bra.uni BB0_17; BB0_16: not.b32 %r145, %r275; neg.s32 %r277, %r29; setp.eq.s32 %p17, %r29, 0; selp.u32 %r146, 1, 0, %p17; add.s32 %r275, %r146, %r145; xor.b32 %r276, %r20, -2147483648; BB0_17: clz.b32 %r279, %r275; setp.eq.s32 %p18, %r279, 0; shl.b32 %r147, %r275, %r279; mov.u32 %r148, 32; sub.s32 %r149, %r148, %r279; shr.u32 %r150, %r277, %r149; add.s32 %r151, %r150, %r147; selp.b32 %r38, %r275, %r151, %p18; mov.u32 %r152, -921707870; mul.hi.u32 %r278, %r38, %r152; setp.eq.s32 %p19, %r20, 0; neg.s32 %r153, %r30; selp.b32 %r280, %r30, %r153, %p19; setp.lt.s32 %p20, %r278, 1; @%p20 bra BB0_19; mul.lo.s32 %r154, %r38, -921707870; shr.u32 %r155, %r154, 31; shl.b32 %r156, %r278, 1; add.s32 %r278, %r155, %r156; add.s32 %r279, %r279, 1; BB0_19: mov.u32 %r157, 126; sub.s32 %r158, %r157, %r279; shl.b32 %r159, %r158, 23; add.s32 %r160, %r278, 1; shr.u32 %r161, %r160, 7; add.s32 %r162, %r161, 1; shr.u32 %r163, %r162, 1; add.s32 %r164, %r163, %r159; or.b32 %r165, %r164, %r276; mov.b32 %f433, %r165; BB0_20: mul.rn.f32 %f32, %f433, %f433; add.s32 %r46, %r280, 1; and.b32 %r47, %r46, 1; setp.eq.s32 %p21, %r47, 0; @%p21 bra BB0_22; bra.uni BB0_21; BB0_22: mov.f32 %f179, 0f3C08839E; mov.f32 %f180, 0fB94CA1F9; fma.rn.f32 %f434, %f180, %f32, %f179; bra.uni BB0_23; BB0_21: mov.f32 %f177, 0fBAB6061A; mov.f32 %f178, 0f37CCF5CE; fma.rn.f32 %f434, %f178, %f32, %f177; BB0_23: @%p21 bra BB0_25; bra.uni BB0_24; BB0_25: mov.f32 %f184, 0fBE2AAAA3; fma.rn.f32 %f185, %f434, %f32, %f184; mov.f32 %f186, 0f00000000; fma.rn.f32 %f435, %f185, %f32, %f186; bra.uni BB0_26; BB0_24: mov.f32 %f181, 0f3D2AAAA5; fma.rn.f32 %f182, %f434, %f32, %f181; mov.f32 %f183, 0fBF000000; fma.rn.f32 %f435, %f182, %f32, %f183; BB0_26: fma.rn.f32 %f436, %f435, %f433, %f433; @%p21 bra BB0_28; mov.f32 %f187, 0f3F800000; fma.rn.f32 %f436, %f435, %f32, %f187; BB0_28: and.b32 %r166, %r46, 2; setp.eq.s32 %p24, %r166, 0; @%p24 bra BB0_30; mov.f32 %f188, 0f00000000; mov.f32 %f189, 0fBF800000; fma.rn.f32 %f436, %f436, %f189, %f188; BB0_30: @%p12 bra BB0_32; mov.f32 %f190, 0f00000000; mul.rn.f32 %f438, %f438, %f190; BB0_32: mul.f32 %f191, %f438, 0f3F22F983; cvt.rni.s32.f32 %r290, %f191; cvt.rn.f32.s32 %f192, %r290; neg.f32 %f193, %f192; fma.rn.f32 %f195, %f193, %f171, %f438; fma.rn.f32 %f197, %f193, %f173, %f195; fma.rn.f32 %f439, %f193, %f175, %f197; abs.f32 %f199, %f438; setp.leu.f32 %p26, %f199, 0f47CE4780; @%p26 bra BB0_43; mov.b32 %r49, %f438; shr.u32 %r50, %r49, 23; shl.b32 %r169, %r49, 8; or.b32 %r51, %r169, -2147483648; add.u64 %rd47, %SP, 0; cvta.to.local.u64 %rd110, %rd47; mov.u32 %r282, 0; mov.u64 %rd109, __cudart_i2opi_f; mov.u32 %r281, -6; BB0_34: .pragma "nounroll"; ld.const.u32 %r172, [%rd109]; // inline asm { mad.lo.cc.u32 %r170, %r172, %r51, %r282; madc.hi.u32 %r282, %r172, %r51, 0; } // inline asm st.local.u32 [%rd110], %r170; add.s64 %rd110, %rd110, 4; add.s64 %rd109, %rd109, 4; add.s32 %r281, %r281, 1; setp.ne.s32 %p27, %r281, 0; @%p27 bra BB0_34; and.b32 %r175, %r50, 255; add.s32 %r176, %r175, -128; shr.u32 %r177, %r176, 5; and.b32 %r56, %r49, -2147483648; cvta.to.local.u64 %rd49, %rd47; st.local.u32 [%rd49+24], %r282; mov.u32 %r178, 6; sub.s32 %r179, %r178, %r177; mul.wide.s32 %rd50, %r179, 4; add.s64 %rd14, %rd49, %rd50; ld.local.u32 %r283, [%rd14]; ld.local.u32 %r284, [%rd14+-4]; and.b32 %r59, %r50, 31; setp.eq.s32 %p28, %r59, 0; @%p28 bra BB0_37; mov.u32 %r180, 32; sub.s32 %r181, %r180, %r59; shr.u32 %r182, %r284, %r181; shl.b32 %r183, %r283, %r59; add.s32 %r283, %r182, %r183; ld.local.u32 %r184, [%rd14+-8]; shr.u32 %r185, %r184, %r181; shl.b32 %r186, %r284, %r59; add.s32 %r284, %r185, %r186; BB0_37: shr.u32 %r187, %r284, 30; shl.b32 %r188, %r283, 2; add.s32 %r285, %r187, %r188; shl.b32 %r65, %r284, 2; shr.u32 %r189, %r285, 31; shr.u32 %r190, %r283, 30; add.s32 %r66, %r189, %r190; setp.eq.s32 %p29, %r189, 0; @%p29 bra BB0_38; bra.uni BB0_39; BB0_38: mov.u32 %r286, %r56; mov.u32 %r287, %r65; bra.uni BB0_40; BB0_39: not.b32 %r191, %r285; neg.s32 %r287, %r65; setp.eq.s32 %p30, %r65, 0; selp.u32 %r192, 1, 0, %p30; add.s32 %r285, %r192, %r191; xor.b32 %r286, %r56, -2147483648; BB0_40: clz.b32 %r289, %r285; setp.eq.s32 %p31, %r289, 0; shl.b32 %r193, %r285, %r289; mov.u32 %r194, 32; sub.s32 %r195, %r194, %r289; shr.u32 %r196, %r287, %r195; add.s32 %r197, %r196, %r193; selp.b32 %r74, %r285, %r197, %p31; mov.u32 %r198, -921707870; mul.hi.u32 %r288, %r74, %r198; setp.eq.s32 %p32, %r56, 0; neg.s32 %r199, %r66; selp.b32 %r290, %r66, %r199, %p32; setp.lt.s32 %p33, %r288, 1; @%p33 bra BB0_42; mul.lo.s32 %r200, %r74, -921707870; shr.u32 %r201, %r200, 31; shl.b32 %r202, %r288, 1; add.s32 %r288, %r201, %r202; add.s32 %r289, %r289, 1; BB0_42: mov.u32 %r203, 126; sub.s32 %r204, %r203, %r289; shl.b32 %r205, %r204, 23; add.s32 %r206, %r288, 1; shr.u32 %r207, %r206, 7; add.s32 %r208, %r207, 1; shr.u32 %r209, %r208, 1; add.s32 %r210, %r209, %r205; or.b32 %r211, %r210, %r286; mov.b32 %f439, %r211; BB0_43: mul.rn.f32 %f49, %f439, %f439; and.b32 %r82, %r290, 1; setp.eq.s32 %p34, %r82, 0; @%p34 bra BB0_45; bra.uni BB0_44; BB0_45: mov.f32 %f202, 0f3C08839E; mov.f32 %f203, 0fB94CA1F9; fma.rn.f32 %f440, %f203, %f49, %f202; bra.uni BB0_46; BB0_44: mov.f32 %f200, 0fBAB6061A; mov.f32 %f201, 0f37CCF5CE; fma.rn.f32 %f440, %f201, %f49, %f200; BB0_46: @%p34 bra BB0_48; bra.uni BB0_47; BB0_48: mov.f32 %f207, 0fBE2AAAA3; fma.rn.f32 %f208, %f440, %f49, %f207; mov.f32 %f209, 0f00000000; fma.rn.f32 %f441, %f208, %f49, %f209; bra.uni BB0_49; BB0_47: mov.f32 %f204, 0f3D2AAAA5; fma.rn.f32 %f205, %f440, %f49, %f204; mov.f32 %f206, 0fBF000000; fma.rn.f32 %f441, %f205, %f49, %f206; BB0_49: fma.rn.f32 %f442, %f441, %f439, %f439; @%p34 bra BB0_51; mov.f32 %f210, 0f3F800000; fma.rn.f32 %f442, %f441, %f49, %f210; BB0_51: and.b32 %r212, %r290, 2; setp.eq.s32 %p37, %r212, 0; @%p37 bra BB0_53; mov.f32 %f211, 0f00000000; mov.f32 %f212, 0fBF800000; fma.rn.f32 %f442, %f442, %f212, %f211; BB0_53: mul.f32 %f221, %f24, %f436; add.u64 %rd51, %SP, 28; cvta.to.local.u64 %rd52, %rd51; mul.f32 %f222, %f221, %f221; mov.f32 %f223, 0f3F800000; sub.f32 %f224, %f223, %f222; mul.f32 %f225, %f24, %f442; mul.f32 %f226, %f225, %f225; sub.f32 %f227, %f224, %f226; mov.f32 %f228, 0f00000000; max.f32 %f229, %f228, %f227; sqrt.rn.f32 %f230, %f229; mul.f32 %f231, %f10, %f225; mul.f32 %f232, %f11, %f225; mul.f32 %f233, %f12, %f225; fma.rn.f32 %f234, %f19, %f221, %f231; fma.rn.f32 %f235, %f18, %f221, %f232; fma.rn.f32 %f236, %f17, %f221, %f233; fma.rn.f32 %f216, %f427, %f230, %f234; fma.rn.f32 %f217, %f428, %f230, %f235; fma.rn.f32 %f218, %f429, %f230, %f236; ld.global.f32 %f220, [lightRadius]; mov.u32 %r216, 1065353216; st.local.u32 [%rd52], %r216; ld.global.u32 %r213, [root]; mov.u32 %r214, 1; // inline asm call _rt_trace_64, (%r213, %f7, %f8, %f9, %f216, %f217, %f218, %r214, %f22, %f220, %rd51, %r90); // inline asm ld.local.f32 %f237, [%rd52]; add.f32 %f444, %f444, %f237; ld.global.u32 %r266, [samples]; add.s32 %r269, %r269, 1; setp.lt.s32 %p38, %r269, %r266; @%p38 bra BB0_7; BB0_54: add.s32 %r267, %r267, 1; setp.lt.s32 %p39, %r267, %r266; @%p39 bra BB0_5; BB0_55: mul.lo.s32 %r217, %r266, %r266; cvt.rn.f32.s32 %f238, %r217; div.rn.f32 %f64, %f444, %f238; ld.global.f32 %f65, [intensity]; setp.lt.f32 %p40, %f65, 0f00000000; @%p40 bra BB0_57; bra.uni BB0_56; BB0_57: neg.f32 %f67, %f65; setp.lt.f32 %p41, %f65, 0fBF800000; @%p41 bra BB0_59; bra.uni BB0_58; BB0_59: mul.f32 %f245, %f65, 0fBF000000; cvt.rzi.f32.f32 %f246, %f245; fma.rn.f32 %f247, %f246, 0fC0000000, %f67; abs.f32 %f69, %f247; abs.f32 %f70, %f64; setp.lt.f32 %p42, %f70, 0f00800000; mul.f32 %f248, %f70, 0f4B800000; selp.f32 %f249, 0fC3170000, 0fC2FE0000, %p42; selp.f32 %f250, %f248, %f70, %p42; mov.b32 %r218, %f250; and.b32 %r219, %r218, 8388607; or.b32 %r220, %r219, 1065353216; mov.b32 %f251, %r220; shr.u32 %r221, %r218, 23; cvt.rn.f32.u32 %f252, %r221; add.f32 %f253, %f249, %f252; setp.gt.f32 %p43, %f251, 0f3FB504F3; mul.f32 %f254, %f251, 0f3F000000; add.f32 %f255, %f253, 0f3F800000; selp.f32 %f256, %f254, %f251, %p43; selp.f32 %f257, %f255, %f253, %p43; add.f32 %f258, %f256, 0fBF800000; add.f32 %f244, %f256, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f243,%f244; // inline asm add.f32 %f259, %f258, %f258; mul.f32 %f260, %f243, %f259; mul.f32 %f261, %f260, %f260; mov.f32 %f262, 0f3C4CAF63; mov.f32 %f263, 0f3B18F0FE; fma.rn.f32 %f264, %f263, %f261, %f262; mov.f32 %f265, 0f3DAAAABD; fma.rn.f32 %f266, %f264, %f261, %f265; mul.rn.f32 %f267, %f266, %f261; mul.rn.f32 %f268, %f267, %f260; sub.f32 %f269, %f258, %f260; neg.f32 %f270, %f260; add.f32 %f271, %f269, %f269; fma.rn.f32 %f272, %f270, %f258, %f271; mul.rn.f32 %f273, %f243, %f272; add.f32 %f274, %f268, %f260; sub.f32 %f275, %f260, %f274; add.f32 %f276, %f268, %f275; add.f32 %f277, %f273, %f276; add.f32 %f278, %f274, %f277; sub.f32 %f279, %f274, %f278; add.f32 %f280, %f277, %f279; mov.f32 %f281, 0f3F317200; mul.rn.f32 %f282, %f257, %f281; mov.f32 %f283, 0f35BFBE8E; mul.rn.f32 %f284, %f257, %f283; add.f32 %f285, %f282, %f278; sub.f32 %f286, %f282, %f285; add.f32 %f287, %f278, %f286; add.f32 %f288, %f280, %f287; add.f32 %f289, %f284, %f288; add.f32 %f290, %f285, %f289; sub.f32 %f291, %f285, %f290; add.f32 %f292, %f289, %f291; abs.f32 %f71, %f67; setp.gt.f32 %p44, %f71, 0f77F684DF; mul.f32 %f293, %f65, 0fB9000000; selp.f32 %f294, %f293, %f67, %p44; mul.rn.f32 %f295, %f294, %f290; neg.f32 %f296, %f295; fma.rn.f32 %f297, %f294, %f290, %f296; fma.rn.f32 %f298, %f294, %f292, %f297; mov.f32 %f299, 0f00000000; fma.rn.f32 %f300, %f299, %f290, %f298; add.rn.f32 %f301, %f295, %f300; neg.f32 %f302, %f301; add.rn.f32 %f303, %f295, %f302; add.rn.f32 %f304, %f303, %f300; mov.b32 %r222, %f301; setp.eq.s32 %p45, %r222, 1118925336; add.s32 %r223, %r222, -1; mov.b32 %f305, %r223; add.f32 %f306, %f304, 0f37000000; selp.f32 %f307, %f305, %f301, %p45; selp.f32 %f72, %f306, %f304, %p45; mul.f32 %f308, %f307, 0f3FB8AA3B; cvt.rzi.f32.f32 %f309, %f308; mov.f32 %f310, 0fBF317200; fma.rn.f32 %f311, %f309, %f310, %f307; mov.f32 %f312, 0fB5BFBE8E; fma.rn.f32 %f313, %f309, %f312, %f311; mul.f32 %f314, %f313, 0f3FB8AA3B; ex2.approx.ftz.f32 %f315, %f314; add.f32 %f316, %f309, 0f00000000; ex2.approx.f32 %f317, %f316; mul.f32 %f318, %f315, %f317; setp.lt.f32 %p46, %f307, 0fC2D20000; selp.f32 %f319, 0f00000000, %f318, %p46; setp.gt.f32 %p47, %f307, 0f42D20000; selp.f32 %f446, 0f7F800000, %f319, %p47; setp.eq.f32 %p48, %f446, 0f7F800000; @%p48 bra BB0_61; fma.rn.f32 %f446, %f446, %f72, %f446; BB0_61: setp.lt.f32 %p49, %f64, 0f00000000; setp.eq.f32 %p50, %f69, 0f3F800000; and.pred %p1, %p49, %p50; mov.b32 %r224, %f446; xor.b32 %r225, %r224, -2147483648; mov.b32 %f320, %r225; selp.f32 %f448, %f320, %f446, %p1; setp.eq.f32 %p51, %f64, 0f00000000; @%p51 bra BB0_64; bra.uni BB0_62; BB0_64: add.f32 %f322, %f64, %f64; mov.b32 %r226, %f322; selp.b32 %r227, %r226, 0, %p50; or.b32 %r228, %r227, 2139095040; setp.gt.f32 %p55, %f65, 0f80000000; selp.b32 %r229, %r228, %r227, %p55; mov.b32 %f448, %r229; bra.uni BB0_65; BB0_56: add.f32 %f239, %f64, 0fBF800000; fma.rn.f32 %f240, %f65, %f239, 0f3F800000; cvt.sat.f32.f32 %f449, %f240; bra.uni BB0_73; BB0_58: add.f32 %f241, %f64, 0fBF800000; fma.rn.f32 %f242, %f241, %f67, 0f3F800000; cvt.sat.f32.f32 %f449, %f242; bra.uni BB0_73; BB0_93: mov.u64 %rd99, image_HDR; cvta.global.u64 %rd94, %rd99; mov.u32 %r262, 8; // inline asm call (%rd93), _rt_buffer_get_64, (%rd94, %r89, %r262, %rd18, %rd19, %rd25, %rd25); // inline asm mov.f32 %f423, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs41, %f423;} // inline asm mov.u16 %rs42, 0; st.v4.u16 [%rd93], {%rs41, %rs41, %rs41, %rs42}; BB0_94: ld.global.u8 %rs43, [imageEnabled]; and.b16 %rs44, %rs43, 8; setp.eq.s16 %p90, %rs44, 0; @%p90 bra BB0_96; cvt.u64.u32 %rd102, %r2; cvt.u64.u32 %rd103, %r3; mov.u64 %rd106, image_Mask; cvta.global.u64 %rd101, %rd106; // inline asm call (%rd100), _rt_buffer_get_64, (%rd101, %r89, %r89, %rd102, %rd103, %rd25, %rd25); // inline asm mov.f32 %f426, 0f00000000; cvt.rzi.u32.f32 %r265, %f426; cvt.u16.u32 %rs45, %r265; mov.u16 %rs46, 0; st.v2.u8 [%rd100], {%rs45, %rs46}; bra.uni BB0_96; BB0_62: setp.geu.f32 %p52, %f64, 0f00000000; @%p52 bra BB0_65; cvt.rzi.f32.f32 %f321, %f67; setp.neu.f32 %p53, %f321, %f67; selp.f32 %f448, 0f7FFFFFFF, %f448, %p53; BB0_65: add.f32 %f323, %f70, %f71; mov.b32 %r230, %f323; setp.lt.s32 %p56, %r230, 2139095040; @%p56 bra BB0_72; setp.gtu.f32 %p57, %f70, 0f7F800000; setp.gtu.f32 %p58, %f71, 0f7F800000; or.pred %p59, %p57, %p58; @%p59 bra BB0_71; bra.uni BB0_67; BB0_71: sub.f32 %f448, %f64, %f65; bra.uni BB0_72; BB0_67: setp.eq.f32 %p60, %f71, 0f7F800000; @%p60 bra BB0_70; bra.uni BB0_68; BB0_70: setp.gt.f32 %p63, %f70, 0f3F800000; selp.b32 %r234, 2139095040, 0, %p63; xor.b32 %r235, %r234, 2139095040; setp.gt.f32 %p64, %f65, 0f80000000; selp.b32 %r236, %r235, %r234, %p64; mov.b32 %f324, %r236; setp.eq.f32 %p65, %f64, 0fBF800000; selp.f32 %f448, 0f3F800000, %f324, %p65; bra.uni BB0_72; BB0_68: setp.neu.f32 %p61, %f70, 0f7F800000; @%p61 bra BB0_72; setp.gtu.f32 %p62, %f65, 0f80000000; selp.b32 %r231, 0, 2139095040, %p62; or.b32 %r232, %r231, -2147483648; selp.b32 %r233, %r232, %r231, %p1; mov.b32 %f448, %r233; BB0_72: setp.eq.f32 %p66, %f65, 0f80000000; setp.eq.f32 %p67, %f64, 0f3F800000; or.pred %p68, %p67, %p66; selp.f32 %f325, 0f3F800000, %f448, %p68; cvt.sat.f32.f32 %f449, %f325; BB0_73: ld.global.u8 %rs10, [imageEnabled]; and.b16 %rs11, %rs10, 4; setp.eq.s16 %p69, %rs11, 0; @%p69 bra BB0_77; ld.global.u32 %r237, [additive]; setp.eq.s32 %p70, %r237, 0; cvt.u64.u32 %rd15, %r2; cvt.u64.u32 %rd16, %r3; mov.f32 %f326, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs12, %f326;} // inline asm @%p70 bra BB0_76; mov.u64 %rd65, image_HDR; cvta.global.u64 %rd54, %rd65; mov.u32 %r241, 8; // inline asm call (%rd53), _rt_buffer_get_64, (%rd54, %r89, %r241, %rd15, %rd16, %rd25, %rd25); // inline asm ld.v4.u16 {%rs19, %rs20, %rs21, %rs22}, [%rd53]; // inline asm { cvt.f32.f16 %f327, %rs19;} // inline asm // inline asm { cvt.f32.f16 %f328, %rs20;} // inline asm // inline asm { cvt.f32.f16 %f329, %rs21;} // inline asm // inline asm call (%rd59), _rt_buffer_get_64, (%rd54, %r89, %r241, %rd15, %rd16, %rd25, %rd25); // inline asm add.f32 %f330, %f449, %f327; add.f32 %f331, %f449, %f328; add.f32 %f332, %f449, %f329; // inline asm { cvt.rn.f16.f32 %rs18, %f332;} // inline asm // inline asm { cvt.rn.f16.f32 %rs17, %f331;} // inline asm // inline asm { cvt.rn.f16.f32 %rs16, %f330;} // inline asm st.v4.u16 [%rd59], {%rs16, %rs17, %rs18, %rs12}; bra.uni BB0_77; BB0_76: mov.u64 %rd72, image_HDR; cvta.global.u64 %rd67, %rd72; mov.u32 %r243, 8; // inline asm call (%rd66), _rt_buffer_get_64, (%rd67, %r89, %r243, %rd15, %rd16, %rd25, %rd25); // inline asm // inline asm { cvt.rn.f16.f32 %rs23, %f449;} // inline asm st.v4.u16 [%rd66], {%rs23, %rs23, %rs23, %rs12}; BB0_77: ld.global.u8 %rs24, [imageEnabled]; and.b16 %rs25, %rs24, 8; setp.eq.s16 %p71, %rs25, 0; @%p71 bra BB0_96; cvt.u64.u32 %rd75, %r2; cvt.u64.u32 %rd76, %r3; mov.u64 %rd79, image_Mask; cvta.global.u64 %rd74, %rd79; // inline asm call (%rd73), _rt_buffer_get_64, (%rd74, %r89, %r89, %rd75, %rd76, %rd25, %rd25); // inline asm mov.f32 %f336, 0f3E68BA2E; cvt.rzi.f32.f32 %f337, %f336; fma.rn.f32 %f338, %f337, 0fC0000000, 0f3EE8BA2E; abs.f32 %f86, %f338; abs.f32 %f87, %f449; setp.lt.f32 %p72, %f87, 0f00800000; mul.f32 %f339, %f87, 0f4B800000; selp.f32 %f340, 0fC3170000, 0fC2FE0000, %p72; selp.f32 %f341, %f339, %f87, %p72; mov.b32 %r246, %f341; and.b32 %r247, %r246, 8388607; or.b32 %r248, %r247, 1065353216; mov.b32 %f342, %r248; shr.u32 %r249, %r246, 23; cvt.rn.f32.u32 %f343, %r249; add.f32 %f344, %f340, %f343; setp.gt.f32 %p73, %f342, 0f3FB504F3; mul.f32 %f345, %f342, 0f3F000000; add.f32 %f346, %f344, 0f3F800000; selp.f32 %f347, %f345, %f342, %p73; selp.f32 %f348, %f346, %f344, %p73; add.f32 %f349, %f347, 0fBF800000; add.f32 %f335, %f347, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f334,%f335; // inline asm add.f32 %f350, %f349, %f349; mul.f32 %f351, %f334, %f350; mul.f32 %f352, %f351, %f351; mov.f32 %f353, 0f3C4CAF63; mov.f32 %f354, 0f3B18F0FE; fma.rn.f32 %f355, %f354, %f352, %f353; mov.f32 %f356, 0f3DAAAABD; fma.rn.f32 %f357, %f355, %f352, %f356; mul.rn.f32 %f358, %f357, %f352; mul.rn.f32 %f359, %f358, %f351; sub.f32 %f360, %f349, %f351; neg.f32 %f361, %f351; add.f32 %f362, %f360, %f360; fma.rn.f32 %f363, %f361, %f349, %f362; mul.rn.f32 %f364, %f334, %f363; add.f32 %f365, %f359, %f351; sub.f32 %f366, %f351, %f365; add.f32 %f367, %f359, %f366; add.f32 %f368, %f364, %f367; add.f32 %f369, %f365, %f368; sub.f32 %f370, %f365, %f369; add.f32 %f371, %f368, %f370; mov.f32 %f372, 0f3F317200; mul.rn.f32 %f373, %f348, %f372; mov.f32 %f374, 0f35BFBE8E; mul.rn.f32 %f375, %f348, %f374; add.f32 %f376, %f373, %f369; sub.f32 %f377, %f373, %f376; add.f32 %f378, %f369, %f377; add.f32 %f379, %f371, %f378; add.f32 %f380, %f375, %f379; add.f32 %f381, %f376, %f380; sub.f32 %f382, %f376, %f381; add.f32 %f383, %f380, %f382; mov.f32 %f384, 0f3EE8BA2E; mul.rn.f32 %f385, %f384, %f381; neg.f32 %f386, %f385; fma.rn.f32 %f387, %f384, %f381, %f386; fma.rn.f32 %f388, %f384, %f383, %f387; mov.f32 %f389, 0f00000000; fma.rn.f32 %f390, %f389, %f381, %f388; add.rn.f32 %f391, %f385, %f390; neg.f32 %f392, %f391; add.rn.f32 %f393, %f385, %f392; add.rn.f32 %f394, %f393, %f390; mov.b32 %r250, %f391; setp.eq.s32 %p74, %r250, 1118925336; add.s32 %r251, %r250, -1; mov.b32 %f395, %r251; add.f32 %f396, %f394, 0f37000000; selp.f32 %f397, %f395, %f391, %p74; selp.f32 %f88, %f396, %f394, %p74; mul.f32 %f398, %f397, 0f3FB8AA3B; cvt.rzi.f32.f32 %f399, %f398; mov.f32 %f400, 0fBF317200; fma.rn.f32 %f401, %f399, %f400, %f397; mov.f32 %f402, 0fB5BFBE8E; fma.rn.f32 %f403, %f399, %f402, %f401; mul.f32 %f404, %f403, 0f3FB8AA3B; ex2.approx.ftz.f32 %f405, %f404; add.f32 %f406, %f399, 0f00000000; ex2.approx.f32 %f407, %f406; mul.f32 %f408, %f405, %f407; setp.lt.f32 %p75, %f397, 0fC2D20000; selp.f32 %f409, 0f00000000, %f408, %p75; setp.gt.f32 %p76, %f397, 0f42D20000; selp.f32 %f450, 0f7F800000, %f409, %p76; setp.eq.f32 %p77, %f450, 0f7F800000; @%p77 bra BB0_80; fma.rn.f32 %f450, %f450, %f88, %f450; BB0_80: setp.lt.f32 %p78, %f449, 0f00000000; setp.eq.f32 %p79, %f86, 0f3F800000; and.pred %p2, %p78, %p79; mov.b32 %r252, %f450; xor.b32 %r253, %r252, -2147483648; mov.b32 %f410, %r253; selp.f32 %f452, %f410, %f450, %p2; setp.eq.f32 %p80, %f449, 0f00000000; @%p80 bra BB0_83; bra.uni BB0_81; BB0_83: add.f32 %f413, %f449, %f449; selp.f32 %f452, %f413, 0f00000000, %p79; bra.uni BB0_84; BB0_81: setp.geu.f32 %p81, %f449, 0f00000000; @%p81 bra BB0_84; cvt.rzi.f32.f32 %f412, %f384; setp.neu.f32 %p82, %f412, 0f3EE8BA2E; selp.f32 %f452, 0f7FFFFFFF, %f452, %p82; BB0_84: add.f32 %f414, %f87, 0f3EE8BA2E; mov.b32 %r254, %f414; setp.lt.s32 %p84, %r254, 2139095040; @%p84 bra BB0_89; setp.gtu.f32 %p85, %f87, 0f7F800000; @%p85 bra BB0_88; bra.uni BB0_86; BB0_88: add.f32 %f452, %f449, 0f3EE8BA2E; bra.uni BB0_89; BB0_86: setp.neu.f32 %p86, %f87, 0f7F800000; @%p86 bra BB0_89; selp.f32 %f452, 0fFF800000, 0f7F800000, %p2; BB0_89: mul.f32 %f415, %f452, 0f437F0000; setp.eq.f32 %p87, %f449, 0f3F800000; selp.f32 %f416, 0f437F0000, %f415, %p87; cvt.rzi.u32.f32 %r255, %f416; cvt.u16.u32 %rs26, %r255; mov.u16 %rs27, 255; st.v2.u8 [%rd73], {%rs26, %rs27}; BB0_96: ret; }