// // Generated by NVIDIA NVVM Compiler // // Compiler Build ID: CL-23083092 // Cuda compilation tools, release 9.1, V9.1.85 // Based on LLVM 3.4svn // .version 6.1 .target sm_30 .address_size 64 // .globl _Z6oxMainv .global .align 8 .b8 pixelID[8]; .global .align 8 .b8 resolution[8]; .global .align 4 .b8 normal[12]; .global .align 4 .b8 camPos[12]; .global .align 4 .b8 root[4]; .global .align 4 .u32 imageEnabled; .global .texref lightmap; .global .align 16 .b8 tileInfo[16]; .global .align 4 .u32 additive; .global .align 1 .b8 image[1]; .global .align 1 .b8 image_HDR[1]; .global .align 1 .b8 image_HDR2[1]; .global .align 1 .b8 image_Mask[1]; .global .align 1 .b8 image_RNM0[1]; .global .align 1 .b8 image_RNM1[1]; .global .align 1 .b8 image_RNM2[1]; .global .align 1 .b8 image_RNM3[1]; .global .align 1 .b8 uvpos[1]; .global .align 1 .b8 uvnormal[1]; .global .align 4 .u32 ignoreNormal; .global .align 1 .b8 localLights[1]; .global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; .global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; .global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0}; .global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919; .global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; .global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1]; .visible .entry _Z6oxMainv( ) { .local .align 4 .b8 __local_depot0[4]; .reg .b64 %SP; .reg .b64 %SPL; .reg .pred %p<138>; .reg .b16 %rs<162>; .reg .f32 %f<1418>; .reg .b32 %r<250>; .reg .b64 %rd<272>; mov.u64 %rd271, __local_depot0; cvta.local.u64 %SP, %rd271; ld.global.v2.u32 {%r30, %r31}, [pixelID]; cvt.u64.u32 %rd10, %r30; cvt.u64.u32 %rd11, %r31; mov.u64 %rd14, uvnormal; cvta.global.u64 %rd9, %rd14; mov.u32 %r28, 2; mov.u32 %r29, 4; mov.u64 %rd13, 0; // inline asm call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13); // inline asm ld.u32 %r1, [%rd8]; shr.u32 %r34, %r1, 16; cvt.u16.u32 %rs1, %r34; and.b16 %rs9, %rs1, 255; cvt.u16.u32 %rs10, %r1; or.b16 %rs11, %rs10, %rs9; setp.eq.s16 %p8, %rs11, 0; mov.f32 %f1322, 0f00000000; mov.f32 %f1323, %f1322; mov.f32 %f1324, %f1322; @%p8 bra BB0_2; ld.u8 %rs12, [%rd8+1]; and.b16 %rs14, %rs10, 255; cvt.rn.f32.u16 %f275, %rs14; div.rn.f32 %f276, %f275, 0f437F0000; fma.rn.f32 %f277, %f276, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f278, %rs12; div.rn.f32 %f279, %f278, 0f437F0000; fma.rn.f32 %f280, %f279, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f281, %rs9; div.rn.f32 %f282, %f281, 0f437F0000; fma.rn.f32 %f283, %f282, 0f40000000, 0fBF800000; mul.f32 %f284, %f280, %f280; fma.rn.f32 %f285, %f277, %f277, %f284; fma.rn.f32 %f286, %f283, %f283, %f285; sqrt.rn.f32 %f287, %f286; rcp.rn.f32 %f288, %f287; mul.f32 %f1322, %f277, %f288; mul.f32 %f1323, %f280, %f288; mul.f32 %f1324, %f283, %f288; BB0_2: ld.global.v2.u32 {%r35, %r36}, [pixelID]; ld.global.v2.u32 {%r38, %r39}, [tileInfo]; add.s32 %r2, %r35, %r38; add.s32 %r3, %r36, %r39; setp.eq.f32 %p9, %f1323, 0f00000000; setp.eq.f32 %p10, %f1322, 0f00000000; and.pred %p11, %p10, %p9; setp.eq.f32 %p12, %f1324, 0f00000000; and.pred %p13, %p11, %p12; @%p13 bra BB0_111; bra.uni BB0_3; BB0_111: ld.global.u32 %r249, [imageEnabled]; and.b32 %r198, %r249, 1; setp.eq.b32 %p129, %r198, 1; @!%p129 bra BB0_113; bra.uni BB0_112; BB0_112: cvt.u64.u32 %rd159, %r2; cvt.u64.u32 %rd160, %r3; mov.u64 %rd163, image; cvta.global.u64 %rd158, %rd163; // inline asm call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13); // inline asm mov.u16 %rs93, 0; st.v4.u8 [%rd157], {%rs93, %rs93, %rs93, %rs93}; ld.global.u32 %r249, [imageEnabled]; BB0_113: and.b32 %r201, %r249, 8; setp.eq.s32 %p130, %r201, 0; @%p130 bra BB0_115; cvt.u64.u32 %rd167, %r3; cvt.u64.u32 %rd166, %r2; mov.u64 %rd170, image_Mask; cvta.global.u64 %rd165, %rd170; // inline asm call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13); // inline asm mov.f32 %f1283, 0f00000000; cvt.rzi.u32.f32 %r204, %f1283; cvt.u16.u32 %rs94, %r204; mov.u16 %rs95, 0; st.v2.u8 [%rd164], {%rs94, %rs95}; ld.global.u32 %r249, [imageEnabled]; BB0_115: cvt.u64.u32 %rd6, %r2; cvt.u64.u32 %rd7, %r3; and.b32 %r205, %r249, 4; setp.eq.s32 %p131, %r205, 0; @%p131 bra BB0_119; ld.global.u32 %r206, [additive]; setp.eq.s32 %p132, %r206, 0; @%p132 bra BB0_118; mov.u64 %rd183, image_HDR; cvta.global.u64 %rd172, %rd183; mov.u32 %r210, 8; // inline asm call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r210, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs102, %rs103, %rs104, %rs105}, [%rd171]; // inline asm { cvt.f32.f16 %f1284, %rs102;} // inline asm // inline asm { cvt.f32.f16 %f1285, %rs103;} // inline asm // inline asm { cvt.f32.f16 %f1286, %rs104;} // inline asm // inline asm call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r210, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1287, %f1284, 0f00000000; add.f32 %f1288, %f1285, 0f00000000; add.f32 %f1289, %f1286, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs101, %f1289;} // inline asm // inline asm { cvt.rn.f16.f32 %rs100, %f1288;} // inline asm // inline asm { cvt.rn.f16.f32 %rs99, %f1287;} // inline asm mov.u16 %rs106, 0; st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs106}; bra.uni BB0_119; BB0_3: ld.global.v2.u32 {%r47, %r48}, [pixelID]; cvt.u64.u32 %rd17, %r47; cvt.u64.u32 %rd18, %r48; mov.u64 %rd26, uvpos; cvta.global.u64 %rd16, %rd26; mov.u32 %r44, 12; // inline asm call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13); // inline asm ld.f32 %f9, [%rd15+8]; ld.f32 %f8, [%rd15+4]; ld.f32 %f7, [%rd15]; mul.f32 %f305, %f7, 0f3456BF95; mul.f32 %f306, %f8, 0f3456BF95; mul.f32 %f307, %f9, 0f3456BF95; abs.f32 %f308, %f1322; div.rn.f32 %f309, %f305, %f308; abs.f32 %f310, %f1323; div.rn.f32 %f311, %f306, %f310; abs.f32 %f312, %f1324; div.rn.f32 %f313, %f307, %f312; abs.f32 %f314, %f309; abs.f32 %f315, %f311; abs.f32 %f316, %f313; mov.f32 %f317, 0f38D1B717; max.f32 %f318, %f314, %f317; max.f32 %f319, %f315, %f317; max.f32 %f320, %f316, %f317; fma.rn.f32 %f10, %f1322, %f318, %f7; fma.rn.f32 %f11, %f1323, %f319, %f8; fma.rn.f32 %f12, %f1324, %f320, %f9; mov.u64 %rd27, localLights; cvta.global.u64 %rd25, %rd27; mov.u32 %r45, 1; mov.u32 %r46, 96; // inline asm call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46); // inline asm cvt.u32.u64 %r4, %rd21; setp.eq.s32 %p14, %r4, 0; mov.f32 %f1325, 0f00000000; mov.f32 %f1326, %f1325; mov.f32 %f1327, %f1325; mov.f32 %f1328, %f1325; mov.f32 %f1329, %f1325; mov.f32 %f1330, %f1325; mov.f32 %f1331, %f1325; mov.f32 %f1332, %f1325; mov.f32 %f1333, %f1325; mov.f32 %f1334, %f1325; mov.f32 %f1335, %f1325; mov.f32 %f1336, %f1325; mov.f32 %f1337, %f1325; mov.f32 %f1338, %f1325; mov.f32 %f1339, %f1325; mov.f32 %f1340, %f1325; @%p14 bra BB0_47; mov.f32 %f337, 0f40000000; cvt.rzi.f32.f32 %f338, %f337; add.f32 %f339, %f338, %f338; mov.f32 %f340, 0f40800000; sub.f32 %f341, %f340, %f339; abs.f32 %f13, %f341; mul.f32 %f14, %f10, 0f3456BF95; mul.f32 %f15, %f11, 0f3456BF95; mul.f32 %f16, %f12, 0f3456BF95; mov.f32 %f336, 0f00000000; mov.u32 %r241, 0; abs.f32 %f532, %f14; abs.f32 %f533, %f15; max.f32 %f534, %f532, %f533; abs.f32 %f535, %f16; max.f32 %f536, %f534, %f535; mov.f32 %f1325, %f336; mov.f32 %f1326, %f336; mov.f32 %f1327, %f336; mov.f32 %f1328, %f336; mov.f32 %f1329, %f336; mov.f32 %f1330, %f336; mov.f32 %f1331, %f336; mov.f32 %f1332, %f336; mov.f32 %f1333, %f336; mov.f32 %f1334, %f336; mov.f32 %f1335, %f336; mov.f32 %f1336, %f336; mov.f32 %f1337, %f336; mov.f32 %f1338, %f336; mov.f32 %f1339, %f336; mov.f32 %f1340, %f336; BB0_5: cvt.u64.u32 %rd30, %r241; // inline asm call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13); // inline asm ld.v4.f32 {%f344, %f345, %f346, %f347}, [%rd28+80]; ld.v4.f32 {%f348, %f349, %f350, %f351}, [%rd28+64]; ld.v4.f32 {%f352, %f353, %f354, %f355}, [%rd28+48]; ld.v4.f32 {%f356, %f1349, %f1350, %f359}, [%rd28+32]; ld.v4.f32 {%f360, %f361, %f362, %f363}, [%rd28+16]; ld.v4.f32 {%f364, %f365, %f366, %f367}, [%rd28]; mov.b32 %r6, %f347; sub.f32 %f57, %f365, %f7; sub.f32 %f59, %f366, %f8; sub.f32 %f61, %f367, %f9; mul.f32 %f369, %f59, %f59; fma.rn.f32 %f370, %f57, %f57, %f369; fma.rn.f32 %f371, %f61, %f61, %f370; sqrt.rn.f32 %f62, %f371; rcp.rn.f32 %f372, %f62; mul.f32 %f63, %f57, %f372; mul.f32 %f64, %f59, %f372; mul.f32 %f65, %f61, %f372; mul.f32 %f66, %f62, %f363; abs.f32 %f67, %f66; setp.lt.f32 %p15, %f67, 0f00800000; mul.f32 %f373, %f67, 0f4B800000; selp.f32 %f374, 0fC3170000, 0fC2FE0000, %p15; selp.f32 %f375, %f373, %f67, %p15; mov.b32 %r54, %f375; and.b32 %r55, %r54, 8388607; or.b32 %r56, %r55, 1065353216; mov.b32 %f376, %r56; shr.u32 %r57, %r54, 23; cvt.rn.f32.u32 %f377, %r57; add.f32 %f378, %f374, %f377; setp.gt.f32 %p16, %f376, 0f3FB504F3; mul.f32 %f379, %f376, 0f3F000000; add.f32 %f380, %f378, 0f3F800000; selp.f32 %f381, %f379, %f376, %p16; selp.f32 %f382, %f380, %f378, %p16; add.f32 %f383, %f381, 0fBF800000; add.f32 %f343, %f381, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f342,%f343; // inline asm add.f32 %f384, %f383, %f383; mul.f32 %f385, %f342, %f384; mul.f32 %f386, %f385, %f385; mov.f32 %f387, 0f3C4CAF63; mov.f32 %f388, 0f3B18F0FE; fma.rn.f32 %f389, %f388, %f386, %f387; mov.f32 %f390, 0f3DAAAABD; fma.rn.f32 %f391, %f389, %f386, %f390; mul.rn.f32 %f392, %f391, %f386; mul.rn.f32 %f393, %f392, %f385; sub.f32 %f394, %f383, %f385; neg.f32 %f395, %f385; add.f32 %f396, %f394, %f394; fma.rn.f32 %f397, %f395, %f383, %f396; mul.rn.f32 %f398, %f342, %f397; add.f32 %f399, %f393, %f385; sub.f32 %f400, %f385, %f399; add.f32 %f401, %f393, %f400; add.f32 %f402, %f398, %f401; add.f32 %f403, %f399, %f402; sub.f32 %f404, %f399, %f403; add.f32 %f405, %f402, %f404; mov.f32 %f406, 0f3F317200; mul.rn.f32 %f407, %f382, %f406; mov.f32 %f408, 0f35BFBE8E; mul.rn.f32 %f409, %f382, %f408; add.f32 %f410, %f407, %f403; sub.f32 %f411, %f407, %f410; add.f32 %f412, %f403, %f411; add.f32 %f413, %f405, %f412; add.f32 %f414, %f409, %f413; add.f32 %f415, %f410, %f414; sub.f32 %f416, %f410, %f415; add.f32 %f417, %f414, %f416; mul.rn.f32 %f68, %f340, %f415; neg.f32 %f419, %f68; fma.rn.f32 %f420, %f340, %f415, %f419; fma.rn.f32 %f421, %f340, %f417, %f420; fma.rn.f32 %f69, %f336, %f415, %f421; add.rn.f32 %f70, %f68, %f69; mov.b32 %r58, %f70; setp.eq.s32 %p1, %r58, 1118925336; add.s32 %r59, %r58, -1; mov.b32 %f423, %r59; selp.f32 %f424, %f423, %f70, %p1; mul.f32 %f425, %f424, 0f3FB8AA3B; cvt.rzi.f32.f32 %f426, %f425; mov.f32 %f427, 0fBF317200; fma.rn.f32 %f428, %f426, %f427, %f424; mov.f32 %f429, 0fB5BFBE8E; fma.rn.f32 %f430, %f426, %f429, %f428; mul.f32 %f431, %f430, 0f3FB8AA3B; ex2.approx.ftz.f32 %f432, %f431; add.f32 %f433, %f426, 0f00000000; ex2.approx.f32 %f434, %f433; mul.f32 %f435, %f432, %f434; setp.lt.f32 %p17, %f424, 0fC2D20000; selp.f32 %f436, 0f00000000, %f435, %p17; setp.gt.f32 %p18, %f424, 0f42D20000; selp.f32 %f1341, 0f7F800000, %f436, %p18; setp.eq.f32 %p19, %f1341, 0f7F800000; @%p19 bra BB0_7; neg.f32 %f437, %f70; add.rn.f32 %f438, %f68, %f437; add.rn.f32 %f439, %f438, %f69; add.f32 %f440, %f439, 0f37000000; selp.f32 %f441, %f440, %f439, %p1; fma.rn.f32 %f1341, %f1341, %f441, %f1341; BB0_7: setp.lt.f32 %p20, %f66, 0f00000000; setp.eq.f32 %p21, %f13, 0f3F800000; and.pred %p2, %p20, %p21; mov.b32 %r60, %f1341; xor.b32 %r61, %r60, -2147483648; mov.b32 %f442, %r61; selp.f32 %f1343, %f442, %f1341, %p2; setp.eq.f32 %p22, %f66, 0f00000000; @%p22 bra BB0_10; bra.uni BB0_8; BB0_10: add.f32 %f445, %f66, %f66; selp.f32 %f1343, %f445, 0f00000000, %p21; bra.uni BB0_11; BB0_8: setp.geu.f32 %p23, %f66, 0f00000000; @%p23 bra BB0_11; cvt.rzi.f32.f32 %f444, %f340; setp.neu.f32 %p24, %f444, 0f40800000; selp.f32 %f1343, 0f7FFFFFFF, %f1343, %p24; BB0_11: add.f32 %f446, %f67, 0f40800000; mov.b32 %r62, %f446; setp.lt.s32 %p26, %r62, 2139095040; @%p26 bra BB0_16; setp.gtu.f32 %p27, %f67, 0f7F800000; @%p27 bra BB0_15; bra.uni BB0_13; BB0_15: add.f32 %f1343, %f66, 0f40800000; bra.uni BB0_16; BB0_13: setp.neu.f32 %p28, %f67, 0f7F800000; @%p28 bra BB0_16; selp.f32 %f1343, 0fFF800000, 0f7F800000, %p2; BB0_16: mul.f32 %f447, %f62, %f361; mov.f32 %f1372, 0f3F800000; sub.f32 %f449, %f1372, %f1343; setp.eq.f32 %p29, %f66, 0f3F800000; selp.f32 %f450, 0f00000000, %f449, %p29; cvt.sat.f32.f32 %f451, %f450; fma.rn.f32 %f452, %f447, %f447, %f362; div.rn.f32 %f96, %f451, %f452; mul.f32 %f453, %f1323, %f64; fma.rn.f32 %f454, %f1322, %f63, %f453; fma.rn.f32 %f97, %f1324, %f65, %f454; setp.eq.f32 %p30, %f364, 0f3F800000; @%p30 bra BB0_23; bra.uni BB0_17; BB0_23: setp.leu.f32 %p34, %f359, 0f00000000; @%p34 bra BB0_19; setp.geu.f32 %p35, %f355, 0f00000000; @%p35 bra BB0_25; sub.f32 %f1321, %f367, %f9; sub.f32 %f1320, %f365, %f7; sub.f32 %f1319, %f366, %f8; mul.f32 %f477, %f345, %f1319; fma.rn.f32 %f478, %f344, %f1320, %f477; fma.rn.f32 %f479, %f346, %f1321, %f478; rcp.rn.f32 %f480, %f479; mul.f32 %f1344, %f1320, %f480; mul.f32 %f1345, %f1319, %f480; mul.f32 %f1346, %f1321, %f480; neg.f32 %f355, %f355; bra.uni BB0_27; BB0_17: setp.eq.f32 %p31, %f364, 0f40000000; @%p31 bra BB0_21; bra.uni BB0_18; BB0_21: setp.leu.f32 %p33, %f359, 0f00000000; @%p33 bra BB0_19; mul.f32 %f471, %f353, %f64; fma.rn.f32 %f472, %f352, %f63, %f471; mul.f32 %f473, %f349, %f64; fma.rn.f32 %f474, %f348, %f63, %f473; mul.f32 %f475, %f345, %f64; fma.rn.f32 %f476, %f344, %f63, %f475; fma.rn.f32 %f468, %f354, %f65, %f472; fma.rn.f32 %f469, %f350, %f65, %f474; fma.rn.f32 %f470, %f346, %f65, %f476; cvt.rzi.s32.f32 %r63, %f359; mov.u32 %r64, 6; mov.u32 %r65, 0; // inline asm call (%f464, %f465, %f466, %f467), _rt_texture_get_base_id, (%r63, %r64, %f468, %f469, %f470, %r65); // inline asm mul.f32 %f1348, %f356, %f464; mul.f32 %f1349, %f1349, %f465; mul.f32 %f1350, %f1350, %f466; bra.uni BB0_28; BB0_18: setp.neu.f32 %p32, %f364, 0f40800000; @%p32 bra BB0_19; mul.f32 %f455, %f344, %f63; mul.f32 %f456, %f345, %f64; neg.f32 %f457, %f456; sub.f32 %f458, %f457, %f455; mul.f32 %f459, %f346, %f65; sub.f32 %f460, %f458, %f459; fma.rn.f32 %f461, %f359, %f460, %f355; cvt.sat.f32.f32 %f462, %f461; mul.f32 %f463, %f462, %f462; mul.f32 %f1351, %f96, %f463; mov.f32 %f1348, %f356; bra.uni BB0_29; BB0_19: mov.f32 %f1348, %f356; bra.uni BB0_28; BB0_25: mov.f32 %f1344, %f63; mov.f32 %f1345, %f64; mov.f32 %f1346, %f65; BB0_27: mul.f32 %f489, %f346, %f65; mul.f32 %f490, %f345, %f64; neg.f32 %f491, %f490; mul.f32 %f492, %f344, %f63; sub.f32 %f493, %f491, %f492; sub.f32 %f494, %f493, %f489; setp.gt.f32 %p36, %f494, 0f00000000; selp.f32 %f495, 0f3F800000, 0f00000000, %p36; mul.f32 %f496, %f353, %f1345; fma.rn.f32 %f497, %f352, %f1344, %f496; mul.f32 %f498, %f349, %f1345; fma.rn.f32 %f499, %f348, %f1344, %f498; fma.rn.f32 %f500, %f354, %f1346, %f497; fma.rn.f32 %f501, %f350, %f1346, %f499; fma.rn.f32 %f502, %f355, %f500, 0f3F000000; mov.f32 %f503, 0f3F800000; sub.f32 %f485, %f503, %f502; fma.rn.f32 %f486, %f355, %f501, 0f3F000000; cvt.rzi.s32.f32 %r66, %f359; mov.f32 %f488, 0f00000000; // inline asm call (%f481, %f482, %f483, %f484), _rt_texture_get_f_id, (%r66, %r28, %f485, %f486, %f488, %f488); // inline asm mul.f32 %f504, %f495, %f481; mul.f32 %f505, %f495, %f482; mul.f32 %f506, %f495, %f483; mul.f32 %f1348, %f356, %f504; mul.f32 %f1349, %f1349, %f505; mul.f32 %f1350, %f1350, %f506; BB0_28: mov.f32 %f1351, %f96; BB0_29: max.f32 %f522, %f1348, %f1349; max.f32 %f523, %f522, %f1350; mul.f32 %f524, %f1351, %f523; setp.lt.f32 %p38, %f524, 0f3727C5AC; mov.pred %p137, -1; mov.f32 %f132, 0f00000000; mov.f32 %f1353, %f132; mov.f32 %f1354, %f132; mov.f32 %f1355, %f132; mov.f32 %f1356, %f132; mov.f32 %f1357, %f132; mov.f32 %f1358, %f132; mov.f32 %f1359, %f132; mov.f32 %f1360, %f132; mov.f32 %f1361, %f132; mov.f32 %f1362, %f132; mov.f32 %f1363, %f132; mov.f32 %f1364, %f132; mov.f32 %f1365, %f132; mov.f32 %f1366, %f132; @%p38 bra BB0_31; ld.global.u32 %r68, [ignoreNormal]; setp.eq.s32 %p40, %r68, 0; selp.f32 %f525, %f97, 0f3F800000, %p40; cvt.sat.f32.f32 %f526, %f525; mul.f32 %f527, %f1351, %f526; mul.f32 %f132, %f1348, %f527; mul.f32 %f1353, %f1349, %f527; mul.f32 %f1354, %f1350, %f527; mul.f32 %f528, %f1351, 0f3E800000; mul.f32 %f1355, %f1348, %f528; mul.f32 %f1356, %f1349, %f528; mul.f32 %f1357, %f1350, %f528; mul.f32 %f1358, %f63, %f1355; mul.f32 %f1359, %f63, %f1356; mul.f32 %f1360, %f63, %f1357; mul.f32 %f1361, %f64, %f1355; mul.f32 %f1362, %f64, %f1356; mul.f32 %f1363, %f64, %f1357; mul.f32 %f1364, %f65, %f1355; mul.f32 %f1365, %f65, %f1356; mul.f32 %f1366, %f65, %f1357; mov.pred %p137, 0; BB0_31: @%p137 bra BB0_46; setp.eq.s32 %p41, %r6, 0; mov.u16 %rs161, 0; @%p41 bra BB0_43; abs.s32 %r8, %r6; mov.f32 %f1371, 0f00000000; setp.lt.s32 %p42, %r8, 1; @%p42 bra BB0_42; max.f32 %f148, %f536, %f317; and.b32 %r9, %r8, 3; setp.eq.s32 %p43, %r9, 0; add.u64 %rd35, %SP, 0; cvta.to.local.u64 %rd2, %rd35; mov.f32 %f1371, 0f00000000; mov.u32 %r245, 0; @%p43 bra BB0_40; setp.eq.s32 %p44, %r9, 1; mov.f32 %f1368, 0f00000000; mov.u32 %r243, 0; @%p44 bra BB0_39; setp.eq.s32 %p45, %r9, 2; mov.f32 %f1367, 0f00000000; mov.u32 %r242, 0; @%p45 bra BB0_38; sub.f32 %f548, %f365, %f360; sub.f32 %f549, %f366, %f360; sub.f32 %f550, %f367, %f360; sub.f32 %f551, %f548, %f7; sub.f32 %f552, %f549, %f8; sub.f32 %f553, %f550, %f9; mul.f32 %f554, %f552, %f552; fma.rn.f32 %f555, %f551, %f551, %f554; fma.rn.f32 %f556, %f553, %f553, %f555; sqrt.rn.f32 %f547, %f556; rcp.rn.f32 %f557, %f547; mul.f32 %f543, %f557, %f551; mul.f32 %f544, %f557, %f552; mul.f32 %f545, %f557, %f553; ld.global.u32 %r76, [imageEnabled]; and.b32 %r77, %r76, 32; setp.eq.s32 %p46, %r77, 0; selp.f32 %f558, 0f3F800000, 0f41200000, %p46; mul.f32 %f546, %f558, %f148; mov.u32 %r78, 1065353216; st.local.u32 [%rd2], %r78; ld.global.u32 %r72, [root]; // inline asm call _rt_trace_64, (%r72, %f10, %f11, %f12, %f543, %f544, %f545, %r45, %f546, %f547, %rd35, %r29); // inline asm ld.local.f32 %f559, [%rd2]; add.f32 %f1367, %f559, 0f00000000; mov.u32 %r242, %r45; BB0_38: cvt.rn.f32.s32 %f568, %r242; mul.f32 %f569, %f568, 0f3DD32618; cvt.rmi.f32.f32 %f570, %f569; sub.f32 %f571, %f569, %f570; mul.f32 %f572, %f568, 0f3DD2F1AA; cvt.rmi.f32.f32 %f573, %f572; sub.f32 %f574, %f572, %f573; mul.f32 %f575, %f568, 0f3DC74539; cvt.rmi.f32.f32 %f576, %f575; sub.f32 %f577, %f575, %f576; add.f32 %f578, %f574, 0f4199851F; add.f32 %f579, %f577, 0f4199851F; add.f32 %f580, %f571, 0f4199851F; mul.f32 %f581, %f574, %f579; fma.rn.f32 %f582, %f571, %f578, %f581; fma.rn.f32 %f583, %f580, %f577, %f582; add.f32 %f584, %f571, %f583; add.f32 %f585, %f574, %f583; add.f32 %f586, %f577, %f583; add.f32 %f587, %f584, %f585; mul.f32 %f588, %f586, %f587; cvt.rmi.f32.f32 %f589, %f588; sub.f32 %f590, %f588, %f589; add.f32 %f591, %f584, %f586; mul.f32 %f592, %f585, %f591; cvt.rmi.f32.f32 %f593, %f592; sub.f32 %f594, %f592, %f593; add.f32 %f595, %f585, %f586; mul.f32 %f596, %f584, %f595; cvt.rmi.f32.f32 %f597, %f596; sub.f32 %f598, %f596, %f597; fma.rn.f32 %f599, %f590, 0f40000000, 0fBF800000; fma.rn.f32 %f600, %f594, 0f40000000, 0fBF800000; fma.rn.f32 %f601, %f598, 0f40000000, 0fBF800000; fma.rn.f32 %f602, %f360, %f599, %f365; fma.rn.f32 %f603, %f360, %f600, %f366; fma.rn.f32 %f604, %f360, %f601, %f367; sub.f32 %f605, %f602, %f7; sub.f32 %f606, %f603, %f8; sub.f32 %f607, %f604, %f9; mul.f32 %f608, %f606, %f606; fma.rn.f32 %f609, %f605, %f605, %f608; fma.rn.f32 %f610, %f607, %f607, %f609; sqrt.rn.f32 %f567, %f610; rcp.rn.f32 %f611, %f567; mul.f32 %f563, %f611, %f605; mul.f32 %f564, %f611, %f606; mul.f32 %f565, %f611, %f607; ld.global.u32 %r82, [imageEnabled]; and.b32 %r83, %r82, 32; setp.eq.s32 %p47, %r83, 0; selp.f32 %f612, 0f3F800000, 0f41200000, %p47; mul.f32 %f566, %f612, %f148; mov.u32 %r84, 1065353216; st.local.u32 [%rd2], %r84; ld.global.u32 %r79, [root]; // inline asm call _rt_trace_64, (%r79, %f10, %f11, %f12, %f563, %f564, %f565, %r45, %f566, %f567, %rd35, %r29); // inline asm ld.local.f32 %f613, [%rd2]; add.f32 %f1368, %f1367, %f613; add.s32 %r243, %r242, 1; BB0_39: cvt.rn.f32.s32 %f622, %r243; mul.f32 %f623, %f622, 0f3DD32618; cvt.rmi.f32.f32 %f624, %f623; sub.f32 %f625, %f623, %f624; mul.f32 %f626, %f622, 0f3DD2F1AA; cvt.rmi.f32.f32 %f627, %f626; sub.f32 %f628, %f626, %f627; mul.f32 %f629, %f622, 0f3DC74539; cvt.rmi.f32.f32 %f630, %f629; sub.f32 %f631, %f629, %f630; add.f32 %f632, %f628, 0f4199851F; add.f32 %f633, %f631, 0f4199851F; add.f32 %f634, %f625, 0f4199851F; mul.f32 %f635, %f628, %f633; fma.rn.f32 %f636, %f625, %f632, %f635; fma.rn.f32 %f637, %f634, %f631, %f636; add.f32 %f638, %f625, %f637; add.f32 %f639, %f628, %f637; add.f32 %f640, %f631, %f637; add.f32 %f641, %f638, %f639; mul.f32 %f642, %f640, %f641; cvt.rmi.f32.f32 %f643, %f642; sub.f32 %f644, %f642, %f643; add.f32 %f645, %f638, %f640; mul.f32 %f646, %f639, %f645; cvt.rmi.f32.f32 %f647, %f646; sub.f32 %f648, %f646, %f647; add.f32 %f649, %f639, %f640; mul.f32 %f650, %f638, %f649; cvt.rmi.f32.f32 %f651, %f650; sub.f32 %f652, %f650, %f651; fma.rn.f32 %f653, %f644, 0f40000000, 0fBF800000; fma.rn.f32 %f654, %f648, 0f40000000, 0fBF800000; fma.rn.f32 %f655, %f652, 0f40000000, 0fBF800000; fma.rn.f32 %f656, %f360, %f653, %f365; fma.rn.f32 %f657, %f360, %f654, %f366; fma.rn.f32 %f658, %f360, %f655, %f367; sub.f32 %f659, %f656, %f7; sub.f32 %f660, %f657, %f8; sub.f32 %f661, %f658, %f9; mul.f32 %f662, %f660, %f660; fma.rn.f32 %f663, %f659, %f659, %f662; fma.rn.f32 %f664, %f661, %f661, %f663; sqrt.rn.f32 %f621, %f664; rcp.rn.f32 %f665, %f621; mul.f32 %f617, %f665, %f659; mul.f32 %f618, %f665, %f660; mul.f32 %f619, %f665, %f661; ld.global.u32 %r88, [imageEnabled]; and.b32 %r89, %r88, 32; setp.eq.s32 %p48, %r89, 0; selp.f32 %f666, 0f3F800000, 0f41200000, %p48; mul.f32 %f620, %f666, %f148; mov.u32 %r90, 1065353216; st.local.u32 [%rd2], %r90; ld.global.u32 %r85, [root]; mov.u32 %r86, 1; // inline asm call _rt_trace_64, (%r85, %f10, %f11, %f12, %f617, %f618, %f619, %r86, %f620, %f621, %rd35, %r29); // inline asm ld.local.f32 %f667, [%rd2]; add.f32 %f1371, %f1368, %f667; add.s32 %r245, %r243, 1; BB0_40: setp.lt.u32 %p49, %r8, 4; @%p49 bra BB0_42; BB0_41: cvt.rn.f32.s32 %f700, %r245; mul.f32 %f701, %f700, 0f3DD32618; cvt.rmi.f32.f32 %f702, %f701; sub.f32 %f703, %f701, %f702; mul.f32 %f704, %f700, 0f3DD2F1AA; cvt.rmi.f32.f32 %f705, %f704; sub.f32 %f706, %f704, %f705; mul.f32 %f707, %f700, 0f3DC74539; cvt.rmi.f32.f32 %f708, %f707; sub.f32 %f709, %f707, %f708; add.f32 %f710, %f706, 0f4199851F; add.f32 %f711, %f709, 0f4199851F; add.f32 %f712, %f703, 0f4199851F; mul.f32 %f713, %f706, %f711; fma.rn.f32 %f714, %f703, %f710, %f713; fma.rn.f32 %f715, %f712, %f709, %f714; add.f32 %f716, %f703, %f715; add.f32 %f717, %f706, %f715; add.f32 %f718, %f709, %f715; add.f32 %f719, %f716, %f717; mul.f32 %f720, %f718, %f719; cvt.rmi.f32.f32 %f721, %f720; sub.f32 %f722, %f720, %f721; add.f32 %f723, %f716, %f718; mul.f32 %f724, %f717, %f723; cvt.rmi.f32.f32 %f725, %f724; sub.f32 %f726, %f724, %f725; add.f32 %f727, %f717, %f718; mul.f32 %f728, %f716, %f727; cvt.rmi.f32.f32 %f729, %f728; sub.f32 %f730, %f728, %f729; fma.rn.f32 %f731, %f722, 0f40000000, 0fBF800000; fma.rn.f32 %f732, %f726, 0f40000000, 0fBF800000; fma.rn.f32 %f733, %f730, 0f40000000, 0fBF800000; fma.rn.f32 %f734, %f360, %f731, %f365; fma.rn.f32 %f735, %f360, %f732, %f366; fma.rn.f32 %f736, %f360, %f733, %f367; sub.f32 %f737, %f734, %f7; sub.f32 %f738, %f735, %f8; sub.f32 %f739, %f736, %f9; mul.f32 %f740, %f738, %f738; fma.rn.f32 %f741, %f737, %f737, %f740; fma.rn.f32 %f742, %f739, %f739, %f741; sqrt.rn.f32 %f675, %f742; rcp.rn.f32 %f743, %f675; mul.f32 %f671, %f743, %f737; mul.f32 %f672, %f743, %f738; mul.f32 %f673, %f743, %f739; ld.global.u32 %r103, [imageEnabled]; and.b32 %r104, %r103, 32; setp.eq.s32 %p50, %r104, 0; selp.f32 %f744, 0f3F800000, 0f41200000, %p50; mul.f32 %f674, %f744, %f148; mov.u32 %r105, 1065353216; st.local.u32 [%rd2], %r105; ld.global.u32 %r91, [root]; mov.u32 %r101, 1; // inline asm call _rt_trace_64, (%r91, %f10, %f11, %f12, %f671, %f672, %f673, %r101, %f674, %f675, %rd35, %r29); // inline asm ld.local.f32 %f745, [%rd2]; add.f32 %f746, %f1371, %f745; add.s32 %r106, %r245, 1; cvt.rn.f32.s32 %f747, %r106; mul.f32 %f748, %f747, 0f3DD32618; cvt.rmi.f32.f32 %f749, %f748; sub.f32 %f750, %f748, %f749; mul.f32 %f751, %f747, 0f3DD2F1AA; cvt.rmi.f32.f32 %f752, %f751; sub.f32 %f753, %f751, %f752; mul.f32 %f754, %f747, 0f3DC74539; cvt.rmi.f32.f32 %f755, %f754; sub.f32 %f756, %f754, %f755; add.f32 %f757, %f753, 0f4199851F; add.f32 %f758, %f756, 0f4199851F; add.f32 %f759, %f750, 0f4199851F; mul.f32 %f760, %f753, %f758; fma.rn.f32 %f761, %f750, %f757, %f760; fma.rn.f32 %f762, %f759, %f756, %f761; add.f32 %f763, %f750, %f762; add.f32 %f764, %f753, %f762; add.f32 %f765, %f756, %f762; add.f32 %f766, %f763, %f764; mul.f32 %f767, %f765, %f766; cvt.rmi.f32.f32 %f768, %f767; sub.f32 %f769, %f767, %f768; add.f32 %f770, %f763, %f765; mul.f32 %f771, %f764, %f770; cvt.rmi.f32.f32 %f772, %f771; sub.f32 %f773, %f771, %f772; add.f32 %f774, %f764, %f765; mul.f32 %f775, %f763, %f774; cvt.rmi.f32.f32 %f776, %f775; sub.f32 %f777, %f775, %f776; fma.rn.f32 %f778, %f769, 0f40000000, 0fBF800000; fma.rn.f32 %f779, %f773, 0f40000000, 0fBF800000; fma.rn.f32 %f780, %f777, 0f40000000, 0fBF800000; fma.rn.f32 %f781, %f360, %f778, %f365; fma.rn.f32 %f782, %f360, %f779, %f366; fma.rn.f32 %f783, %f360, %f780, %f367; sub.f32 %f784, %f781, %f7; sub.f32 %f785, %f782, %f8; sub.f32 %f786, %f783, %f9; mul.f32 %f787, %f785, %f785; fma.rn.f32 %f788, %f784, %f784, %f787; fma.rn.f32 %f789, %f786, %f786, %f788; sqrt.rn.f32 %f683, %f789; rcp.rn.f32 %f790, %f683; mul.f32 %f679, %f790, %f784; mul.f32 %f680, %f790, %f785; mul.f32 %f681, %f790, %f786; ld.global.u32 %r107, [imageEnabled]; and.b32 %r108, %r107, 32; setp.eq.s32 %p51, %r108, 0; selp.f32 %f791, 0f3F800000, 0f41200000, %p51; mul.f32 %f682, %f791, %f148; st.local.u32 [%rd2], %r105; ld.global.u32 %r94, [root]; // inline asm call _rt_trace_64, (%r94, %f10, %f11, %f12, %f679, %f680, %f681, %r101, %f682, %f683, %rd35, %r29); // inline asm ld.local.f32 %f792, [%rd2]; add.f32 %f793, %f746, %f792; add.s32 %r109, %r245, 2; cvt.rn.f32.s32 %f794, %r109; mul.f32 %f795, %f794, 0f3DD32618; cvt.rmi.f32.f32 %f796, %f795; sub.f32 %f797, %f795, %f796; mul.f32 %f798, %f794, 0f3DD2F1AA; cvt.rmi.f32.f32 %f799, %f798; sub.f32 %f800, %f798, %f799; mul.f32 %f801, %f794, 0f3DC74539; cvt.rmi.f32.f32 %f802, %f801; sub.f32 %f803, %f801, %f802; add.f32 %f804, %f800, 0f4199851F; add.f32 %f805, %f803, 0f4199851F; add.f32 %f806, %f797, 0f4199851F; mul.f32 %f807, %f800, %f805; fma.rn.f32 %f808, %f797, %f804, %f807; fma.rn.f32 %f809, %f806, %f803, %f808; add.f32 %f810, %f797, %f809; add.f32 %f811, %f800, %f809; add.f32 %f812, %f803, %f809; add.f32 %f813, %f810, %f811; mul.f32 %f814, %f812, %f813; cvt.rmi.f32.f32 %f815, %f814; sub.f32 %f816, %f814, %f815; add.f32 %f817, %f810, %f812; mul.f32 %f818, %f811, %f817; cvt.rmi.f32.f32 %f819, %f818; sub.f32 %f820, %f818, %f819; add.f32 %f821, %f811, %f812; mul.f32 %f822, %f810, %f821; cvt.rmi.f32.f32 %f823, %f822; sub.f32 %f824, %f822, %f823; fma.rn.f32 %f825, %f816, 0f40000000, 0fBF800000; fma.rn.f32 %f826, %f820, 0f40000000, 0fBF800000; fma.rn.f32 %f827, %f824, 0f40000000, 0fBF800000; fma.rn.f32 %f828, %f360, %f825, %f365; fma.rn.f32 %f829, %f360, %f826, %f366; fma.rn.f32 %f830, %f360, %f827, %f367; sub.f32 %f831, %f828, %f7; sub.f32 %f832, %f829, %f8; sub.f32 %f833, %f830, %f9; mul.f32 %f834, %f832, %f832; fma.rn.f32 %f835, %f831, %f831, %f834; fma.rn.f32 %f836, %f833, %f833, %f835; sqrt.rn.f32 %f691, %f836; rcp.rn.f32 %f837, %f691; mul.f32 %f687, %f837, %f831; mul.f32 %f688, %f837, %f832; mul.f32 %f689, %f837, %f833; ld.global.u32 %r110, [imageEnabled]; and.b32 %r111, %r110, 32; setp.eq.s32 %p52, %r111, 0; selp.f32 %f838, 0f3F800000, 0f41200000, %p52; mul.f32 %f690, %f838, %f148; st.local.u32 [%rd2], %r105; ld.global.u32 %r97, [root]; // inline asm call _rt_trace_64, (%r97, %f10, %f11, %f12, %f687, %f688, %f689, %r101, %f690, %f691, %rd35, %r29); // inline asm ld.local.f32 %f839, [%rd2]; add.f32 %f840, %f793, %f839; add.s32 %r112, %r245, 3; cvt.rn.f32.s32 %f841, %r112; mul.f32 %f842, %f841, 0f3DD32618; cvt.rmi.f32.f32 %f843, %f842; sub.f32 %f844, %f842, %f843; mul.f32 %f845, %f841, 0f3DD2F1AA; cvt.rmi.f32.f32 %f846, %f845; sub.f32 %f847, %f845, %f846; mul.f32 %f848, %f841, 0f3DC74539; cvt.rmi.f32.f32 %f849, %f848; sub.f32 %f850, %f848, %f849; add.f32 %f851, %f847, 0f4199851F; add.f32 %f852, %f850, 0f4199851F; add.f32 %f853, %f844, 0f4199851F; mul.f32 %f854, %f847, %f852; fma.rn.f32 %f855, %f844, %f851, %f854; fma.rn.f32 %f856, %f853, %f850, %f855; add.f32 %f857, %f844, %f856; add.f32 %f858, %f847, %f856; add.f32 %f859, %f850, %f856; add.f32 %f860, %f857, %f858; mul.f32 %f861, %f859, %f860; cvt.rmi.f32.f32 %f862, %f861; sub.f32 %f863, %f861, %f862; add.f32 %f864, %f857, %f859; mul.f32 %f865, %f858, %f864; cvt.rmi.f32.f32 %f866, %f865; sub.f32 %f867, %f865, %f866; add.f32 %f868, %f858, %f859; mul.f32 %f869, %f857, %f868; cvt.rmi.f32.f32 %f870, %f869; sub.f32 %f871, %f869, %f870; fma.rn.f32 %f872, %f863, 0f40000000, 0fBF800000; fma.rn.f32 %f873, %f867, 0f40000000, 0fBF800000; fma.rn.f32 %f874, %f871, 0f40000000, 0fBF800000; fma.rn.f32 %f875, %f360, %f872, %f365; fma.rn.f32 %f876, %f360, %f873, %f366; fma.rn.f32 %f877, %f360, %f874, %f367; sub.f32 %f878, %f875, %f7; sub.f32 %f879, %f876, %f8; sub.f32 %f880, %f877, %f9; mul.f32 %f881, %f879, %f879; fma.rn.f32 %f882, %f878, %f878, %f881; fma.rn.f32 %f883, %f880, %f880, %f882; sqrt.rn.f32 %f699, %f883; rcp.rn.f32 %f884, %f699; mul.f32 %f695, %f884, %f878; mul.f32 %f696, %f884, %f879; mul.f32 %f697, %f884, %f880; ld.global.u32 %r113, [imageEnabled]; and.b32 %r114, %r113, 32; setp.eq.s32 %p53, %r114, 0; selp.f32 %f885, 0f3F800000, 0f41200000, %p53; mul.f32 %f698, %f885, %f148; st.local.u32 [%rd2], %r105; ld.global.u32 %r100, [root]; // inline asm call _rt_trace_64, (%r100, %f10, %f11, %f12, %f695, %f696, %f697, %r101, %f698, %f699, %rd35, %r29); // inline asm ld.local.f32 %f886, [%rd2]; add.f32 %f1371, %f840, %f886; add.s32 %r245, %r245, 4; setp.lt.s32 %p54, %r245, %r8; @%p54 bra BB0_41; BB0_42: cvt.rn.f32.s32 %f887, %r8; div.rn.f32 %f1372, %f1371, %f887; shr.u32 %r115, %r6, 31; cvt.u16.u32 %rs161, %r115; BB0_43: fma.rn.f32 %f1340, %f132, %f1372, %f1340; fma.rn.f32 %f1339, %f1353, %f1372, %f1339; fma.rn.f32 %f1338, %f1354, %f1372, %f1338; fma.rn.f32 %f1337, %f1355, %f1372, %f1337; fma.rn.f32 %f1336, %f1356, %f1372, %f1336; fma.rn.f32 %f1335, %f1357, %f1372, %f1335; fma.rn.f32 %f1334, %f1358, %f1372, %f1334; fma.rn.f32 %f1333, %f1359, %f1372, %f1333; fma.rn.f32 %f1332, %f1360, %f1372, %f1332; fma.rn.f32 %f1331, %f1361, %f1372, %f1331; fma.rn.f32 %f1330, %f1362, %f1372, %f1330; fma.rn.f32 %f1329, %f1363, %f1372, %f1329; fma.rn.f32 %f1328, %f1364, %f1372, %f1328; fma.rn.f32 %f1327, %f1365, %f1372, %f1327; fma.rn.f32 %f1326, %f1366, %f1372, %f1326; setp.eq.s16 %p55, %rs161, 0; @%p55 bra BB0_45; div.rn.f32 %f888, %f132, %f356; div.rn.f32 %f889, %f888, %f96; cvt.sat.f32.f32 %f890, %f889; mul.f32 %f1372, %f1372, %f890; BB0_45: add.f32 %f1325, %f1325, %f1372; BB0_46: add.s32 %r241, %r241, 1; setp.lt.u32 %p56, %r241, %r4; @%p56 bra BB0_5; BB0_47: ld.global.u32 %r247, [imageEnabled]; and.b32 %r116, %r247, 8; setp.eq.s32 %p57, %r116, 0; @%p57 bra BB0_60; cvt.sat.f32.f32 %f210, %f1325; cvt.u64.u32 %rd46, %r3; cvt.u64.u32 %rd45, %r2; mov.u64 %rd49, image_Mask; cvta.global.u64 %rd44, %rd49; // inline asm call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13); // inline asm mov.f32 %f893, 0f3E68BA2E; cvt.rzi.f32.f32 %f894, %f893; fma.rn.f32 %f895, %f894, 0fC0000000, 0f3EE8BA2E; abs.f32 %f211, %f895; abs.f32 %f212, %f210; setp.lt.f32 %p58, %f212, 0f00800000; mul.f32 %f896, %f212, 0f4B800000; selp.f32 %f897, 0fC3170000, 0fC2FE0000, %p58; selp.f32 %f898, %f896, %f212, %p58; mov.b32 %r119, %f898; and.b32 %r120, %r119, 8388607; or.b32 %r121, %r120, 1065353216; mov.b32 %f899, %r121; shr.u32 %r122, %r119, 23; cvt.rn.f32.u32 %f900, %r122; add.f32 %f901, %f897, %f900; setp.gt.f32 %p59, %f899, 0f3FB504F3; mul.f32 %f902, %f899, 0f3F000000; add.f32 %f903, %f901, 0f3F800000; selp.f32 %f904, %f902, %f899, %p59; selp.f32 %f905, %f903, %f901, %p59; add.f32 %f906, %f904, 0fBF800000; add.f32 %f892, %f904, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f891,%f892; // inline asm add.f32 %f907, %f906, %f906; mul.f32 %f908, %f891, %f907; mul.f32 %f909, %f908, %f908; mov.f32 %f910, 0f3C4CAF63; mov.f32 %f911, 0f3B18F0FE; fma.rn.f32 %f912, %f911, %f909, %f910; mov.f32 %f913, 0f3DAAAABD; fma.rn.f32 %f914, %f912, %f909, %f913; mul.rn.f32 %f915, %f914, %f909; mul.rn.f32 %f916, %f915, %f908; sub.f32 %f917, %f906, %f908; neg.f32 %f918, %f908; add.f32 %f919, %f917, %f917; fma.rn.f32 %f920, %f918, %f906, %f919; mul.rn.f32 %f921, %f891, %f920; add.f32 %f922, %f916, %f908; sub.f32 %f923, %f908, %f922; add.f32 %f924, %f916, %f923; add.f32 %f925, %f921, %f924; add.f32 %f926, %f922, %f925; sub.f32 %f927, %f922, %f926; add.f32 %f928, %f925, %f927; mov.f32 %f929, 0f3F317200; mul.rn.f32 %f930, %f905, %f929; mov.f32 %f931, 0f35BFBE8E; mul.rn.f32 %f932, %f905, %f931; add.f32 %f933, %f930, %f926; sub.f32 %f934, %f930, %f933; add.f32 %f935, %f926, %f934; add.f32 %f936, %f928, %f935; add.f32 %f937, %f932, %f936; add.f32 %f938, %f933, %f937; sub.f32 %f939, %f933, %f938; add.f32 %f940, %f937, %f939; mov.f32 %f941, 0f3EE8BA2E; mul.rn.f32 %f942, %f941, %f938; neg.f32 %f943, %f942; fma.rn.f32 %f944, %f941, %f938, %f943; fma.rn.f32 %f945, %f941, %f940, %f944; mov.f32 %f946, 0f00000000; fma.rn.f32 %f947, %f946, %f938, %f945; add.rn.f32 %f948, %f942, %f947; neg.f32 %f949, %f948; add.rn.f32 %f950, %f942, %f949; add.rn.f32 %f951, %f950, %f947; mov.b32 %r123, %f948; setp.eq.s32 %p60, %r123, 1118925336; add.s32 %r124, %r123, -1; mov.b32 %f952, %r124; add.f32 %f953, %f951, 0f37000000; selp.f32 %f954, %f952, %f948, %p60; selp.f32 %f213, %f953, %f951, %p60; mul.f32 %f955, %f954, 0f3FB8AA3B; cvt.rzi.f32.f32 %f956, %f955; mov.f32 %f957, 0fBF317200; fma.rn.f32 %f958, %f956, %f957, %f954; mov.f32 %f959, 0fB5BFBE8E; fma.rn.f32 %f960, %f956, %f959, %f958; mul.f32 %f961, %f960, 0f3FB8AA3B; ex2.approx.ftz.f32 %f962, %f961; add.f32 %f963, %f956, 0f00000000; ex2.approx.f32 %f964, %f963; mul.f32 %f965, %f962, %f964; setp.lt.f32 %p61, %f954, 0fC2D20000; selp.f32 %f966, 0f00000000, %f965, %p61; setp.gt.f32 %p62, %f954, 0f42D20000; selp.f32 %f1406, 0f7F800000, %f966, %p62; setp.eq.f32 %p63, %f1406, 0f7F800000; @%p63 bra BB0_50; fma.rn.f32 %f1406, %f1406, %f213, %f1406; BB0_50: setp.lt.f32 %p64, %f210, 0f00000000; setp.eq.f32 %p65, %f211, 0f3F800000; and.pred %p4, %p64, %p65; mov.b32 %r125, %f1406; xor.b32 %r126, %r125, -2147483648; mov.b32 %f967, %r126; selp.f32 %f1408, %f967, %f1406, %p4; setp.eq.f32 %p66, %f210, 0f00000000; @%p66 bra BB0_53; bra.uni BB0_51; BB0_53: add.f32 %f970, %f210, %f210; selp.f32 %f1408, %f970, 0f00000000, %p65; bra.uni BB0_54; BB0_118: mov.u64 %rd190, image_HDR; cvta.global.u64 %rd185, %rd190; mov.u32 %r212, 8; // inline asm call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r212, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1290, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs107, %f1290;} // inline asm mov.u16 %rs108, 0; st.v4.u16 [%rd184], {%rs107, %rs107, %rs107, %rs108}; BB0_119: ld.global.u32 %r213, [additive]; setp.eq.s32 %p133, %r213, 0; @%p133 bra BB0_121; mov.u64 %rd203, image_RNM0; cvta.global.u64 %rd192, %rd203; mov.u32 %r217, 8; // inline asm call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r217, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs115, %rs116, %rs117, %rs118}, [%rd191]; // inline asm { cvt.f32.f16 %f1291, %rs115;} // inline asm // inline asm { cvt.f32.f16 %f1292, %rs116;} // inline asm // inline asm { cvt.f32.f16 %f1293, %rs117;} // inline asm // inline asm call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r217, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1294, %f1291, 0f00000000; add.f32 %f1295, %f1292, 0f00000000; add.f32 %f1296, %f1293, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs114, %f1296;} // inline asm // inline asm { cvt.rn.f16.f32 %rs113, %f1295;} // inline asm // inline asm { cvt.rn.f16.f32 %rs112, %f1294;} // inline asm mov.u16 %rs119, 0; st.v4.u16 [%rd197], {%rs112, %rs113, %rs114, %rs119}; bra.uni BB0_122; BB0_121: mov.u64 %rd210, image_RNM0; cvta.global.u64 %rd205, %rd210; mov.u32 %r219, 8; // inline asm call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r219, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1297, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs120, %f1297;} // inline asm mov.u16 %rs121, 0; st.v4.u16 [%rd204], {%rs120, %rs120, %rs120, %rs121}; BB0_122: ld.global.u32 %r220, [additive]; setp.eq.s32 %p134, %r220, 0; @%p134 bra BB0_124; mov.u64 %rd223, image_RNM1; cvta.global.u64 %rd212, %rd223; mov.u32 %r224, 8; // inline asm call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r224, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs128, %rs129, %rs130, %rs131}, [%rd211]; // inline asm { cvt.f32.f16 %f1298, %rs128;} // inline asm // inline asm { cvt.f32.f16 %f1299, %rs129;} // inline asm // inline asm { cvt.f32.f16 %f1300, %rs130;} // inline asm // inline asm call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r224, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1301, %f1298, 0f00000000; add.f32 %f1302, %f1299, 0f00000000; add.f32 %f1303, %f1300, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs127, %f1303;} // inline asm // inline asm { cvt.rn.f16.f32 %rs126, %f1302;} // inline asm // inline asm { cvt.rn.f16.f32 %rs125, %f1301;} // inline asm mov.u16 %rs132, 0; st.v4.u16 [%rd217], {%rs125, %rs126, %rs127, %rs132}; bra.uni BB0_125; BB0_124: mov.u64 %rd230, image_RNM1; cvta.global.u64 %rd225, %rd230; mov.u32 %r226, 8; // inline asm call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r226, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1304, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs133, %f1304;} // inline asm mov.u16 %rs134, 0; st.v4.u16 [%rd224], {%rs133, %rs133, %rs133, %rs134}; BB0_125: ld.global.u32 %r227, [additive]; setp.eq.s32 %p135, %r227, 0; @%p135 bra BB0_127; mov.u64 %rd243, image_RNM2; cvta.global.u64 %rd232, %rd243; mov.u32 %r231, 8; // inline asm call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r231, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs141, %rs142, %rs143, %rs144}, [%rd231]; // inline asm { cvt.f32.f16 %f1305, %rs141;} // inline asm // inline asm { cvt.f32.f16 %f1306, %rs142;} // inline asm // inline asm { cvt.f32.f16 %f1307, %rs143;} // inline asm // inline asm call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r231, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1308, %f1305, 0f00000000; add.f32 %f1309, %f1306, 0f00000000; add.f32 %f1310, %f1307, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs140, %f1310;} // inline asm // inline asm { cvt.rn.f16.f32 %rs139, %f1309;} // inline asm // inline asm { cvt.rn.f16.f32 %rs138, %f1308;} // inline asm mov.u16 %rs145, 0; st.v4.u16 [%rd237], {%rs138, %rs139, %rs140, %rs145}; bra.uni BB0_128; BB0_127: mov.u64 %rd250, image_RNM2; cvta.global.u64 %rd245, %rd250; mov.u32 %r233, 8; // inline asm call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r233, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1311, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs146, %f1311;} // inline asm mov.u16 %rs147, 0; st.v4.u16 [%rd244], {%rs146, %rs146, %rs146, %rs147}; BB0_128: ld.global.u32 %r234, [additive]; setp.eq.s32 %p136, %r234, 0; @%p136 bra BB0_130; mov.u64 %rd263, image_RNM3; cvta.global.u64 %rd252, %rd263; mov.u32 %r238, 8; // inline asm call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r238, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs154, %rs155, %rs156, %rs157}, [%rd251]; // inline asm { cvt.f32.f16 %f1312, %rs154;} // inline asm // inline asm { cvt.f32.f16 %f1313, %rs155;} // inline asm // inline asm { cvt.f32.f16 %f1314, %rs156;} // inline asm // inline asm call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r238, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1315, %f1312, 0f00000000; add.f32 %f1316, %f1313, 0f00000000; add.f32 %f1317, %f1314, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs153, %f1317;} // inline asm // inline asm { cvt.rn.f16.f32 %rs152, %f1316;} // inline asm // inline asm { cvt.rn.f16.f32 %rs151, %f1315;} // inline asm mov.u16 %rs158, 0; st.v4.u16 [%rd257], {%rs151, %rs152, %rs153, %rs158}; bra.uni BB0_131; BB0_130: mov.u64 %rd270, image_RNM3; cvta.global.u64 %rd265, %rd270; mov.u32 %r240, 8; // inline asm call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r240, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1318, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs159, %f1318;} // inline asm mov.u16 %rs160, 0; st.v4.u16 [%rd264], {%rs159, %rs159, %rs159, %rs160}; bra.uni BB0_131; BB0_51: setp.geu.f32 %p67, %f210, 0f00000000; @%p67 bra BB0_54; cvt.rzi.f32.f32 %f969, %f941; setp.neu.f32 %p68, %f969, 0f3EE8BA2E; selp.f32 %f1408, 0f7FFFFFFF, %f1408, %p68; BB0_54: add.f32 %f971, %f212, 0f3EE8BA2E; mov.b32 %r127, %f971; setp.lt.s32 %p70, %r127, 2139095040; @%p70 bra BB0_59; setp.gtu.f32 %p71, %f212, 0f7F800000; @%p71 bra BB0_58; bra.uni BB0_56; BB0_58: add.f32 %f1408, %f210, 0f3EE8BA2E; bra.uni BB0_59; BB0_56: setp.neu.f32 %p72, %f212, 0f7F800000; @%p72 bra BB0_59; selp.f32 %f1408, 0fFF800000, 0f7F800000, %p4; BB0_59: mul.f32 %f972, %f1408, 0f437F0000; setp.eq.f32 %p73, %f210, 0f3F800000; selp.f32 %f973, 0f437F0000, %f972, %p73; cvt.rzi.u32.f32 %r128, %f973; cvt.u16.u32 %rs17, %r128; mov.u16 %rs18, 255; st.v2.u8 [%rd43], {%rs17, %rs18}; ld.global.u32 %r247, [imageEnabled]; BB0_60: and.b32 %r129, %r247, 1; setp.eq.b32 %p74, %r129, 1; @!%p74 bra BB0_95; bra.uni BB0_61; BB0_61: mov.f32 %f976, 0f3E666666; cvt.rzi.f32.f32 %f977, %f976; fma.rn.f32 %f978, %f977, 0fC0000000, 0f3EE66666; abs.f32 %f224, %f978; abs.f32 %f225, %f1340; setp.lt.f32 %p75, %f225, 0f00800000; mul.f32 %f979, %f225, 0f4B800000; selp.f32 %f980, 0fC3170000, 0fC2FE0000, %p75; selp.f32 %f981, %f979, %f225, %p75; mov.b32 %r130, %f981; and.b32 %r131, %r130, 8388607; or.b32 %r132, %r131, 1065353216; mov.b32 %f982, %r132; shr.u32 %r133, %r130, 23; cvt.rn.f32.u32 %f983, %r133; add.f32 %f984, %f980, %f983; setp.gt.f32 %p76, %f982, 0f3FB504F3; mul.f32 %f985, %f982, 0f3F000000; add.f32 %f986, %f984, 0f3F800000; selp.f32 %f987, %f985, %f982, %p76; selp.f32 %f988, %f986, %f984, %p76; add.f32 %f989, %f987, 0fBF800000; add.f32 %f975, %f987, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f974,%f975; // inline asm add.f32 %f990, %f989, %f989; mul.f32 %f991, %f974, %f990; mul.f32 %f992, %f991, %f991; mov.f32 %f993, 0f3C4CAF63; mov.f32 %f994, 0f3B18F0FE; fma.rn.f32 %f995, %f994, %f992, %f993; mov.f32 %f996, 0f3DAAAABD; fma.rn.f32 %f997, %f995, %f992, %f996; mul.rn.f32 %f998, %f997, %f992; mul.rn.f32 %f999, %f998, %f991; sub.f32 %f1000, %f989, %f991; neg.f32 %f1001, %f991; add.f32 %f1002, %f1000, %f1000; fma.rn.f32 %f1003, %f1001, %f989, %f1002; mul.rn.f32 %f1004, %f974, %f1003; add.f32 %f1005, %f999, %f991; sub.f32 %f1006, %f991, %f1005; add.f32 %f1007, %f999, %f1006; add.f32 %f1008, %f1004, %f1007; add.f32 %f1009, %f1005, %f1008; sub.f32 %f1010, %f1005, %f1009; add.f32 %f1011, %f1008, %f1010; mov.f32 %f1012, 0f3F317200; mul.rn.f32 %f1013, %f988, %f1012; mov.f32 %f1014, 0f35BFBE8E; mul.rn.f32 %f1015, %f988, %f1014; add.f32 %f1016, %f1013, %f1009; sub.f32 %f1017, %f1013, %f1016; add.f32 %f1018, %f1009, %f1017; add.f32 %f1019, %f1011, %f1018; add.f32 %f1020, %f1015, %f1019; add.f32 %f1021, %f1016, %f1020; sub.f32 %f1022, %f1016, %f1021; add.f32 %f1023, %f1020, %f1022; mov.f32 %f1024, 0f3EE66666; mul.rn.f32 %f1025, %f1024, %f1021; neg.f32 %f1026, %f1025; fma.rn.f32 %f1027, %f1024, %f1021, %f1026; fma.rn.f32 %f1028, %f1024, %f1023, %f1027; mov.f32 %f1029, 0f00000000; fma.rn.f32 %f1030, %f1029, %f1021, %f1028; add.rn.f32 %f1031, %f1025, %f1030; neg.f32 %f1032, %f1031; add.rn.f32 %f1033, %f1025, %f1032; add.rn.f32 %f1034, %f1033, %f1030; mov.b32 %r134, %f1031; setp.eq.s32 %p77, %r134, 1118925336; add.s32 %r135, %r134, -1; mov.b32 %f1035, %r135; add.f32 %f1036, %f1034, 0f37000000; selp.f32 %f1037, %f1035, %f1031, %p77; selp.f32 %f226, %f1036, %f1034, %p77; mul.f32 %f1038, %f1037, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1039, %f1038; mov.f32 %f1040, 0fBF317200; fma.rn.f32 %f1041, %f1039, %f1040, %f1037; mov.f32 %f1042, 0fB5BFBE8E; fma.rn.f32 %f1043, %f1039, %f1042, %f1041; mul.f32 %f1044, %f1043, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1045, %f1044; add.f32 %f1046, %f1039, 0f00000000; ex2.approx.f32 %f1047, %f1046; mul.f32 %f1048, %f1045, %f1047; setp.lt.f32 %p78, %f1037, 0fC2D20000; selp.f32 %f1049, 0f00000000, %f1048, %p78; setp.gt.f32 %p79, %f1037, 0f42D20000; selp.f32 %f1409, 0f7F800000, %f1049, %p79; setp.eq.f32 %p80, %f1409, 0f7F800000; @%p80 bra BB0_63; fma.rn.f32 %f1409, %f1409, %f226, %f1409; BB0_63: setp.lt.f32 %p81, %f1340, 0f00000000; setp.eq.f32 %p82, %f224, 0f3F800000; and.pred %p5, %p81, %p82; mov.b32 %r136, %f1409; xor.b32 %r137, %r136, -2147483648; mov.b32 %f1050, %r137; selp.f32 %f1411, %f1050, %f1409, %p5; setp.eq.f32 %p83, %f1340, 0f00000000; @%p83 bra BB0_66; bra.uni BB0_64; BB0_66: add.f32 %f1053, %f1340, %f1340; selp.f32 %f1411, %f1053, 0f00000000, %p82; bra.uni BB0_67; BB0_64: setp.geu.f32 %p84, %f1340, 0f00000000; @%p84 bra BB0_67; cvt.rzi.f32.f32 %f1052, %f1024; setp.neu.f32 %p85, %f1052, 0f3EE66666; selp.f32 %f1411, 0f7FFFFFFF, %f1411, %p85; BB0_67: add.f32 %f1054, %f225, 0f3EE66666; mov.b32 %r138, %f1054; setp.lt.s32 %p87, %r138, 2139095040; @%p87 bra BB0_72; setp.gtu.f32 %p88, %f225, 0f7F800000; @%p88 bra BB0_71; bra.uni BB0_69; BB0_71: add.f32 %f1411, %f1340, 0f3EE66666; bra.uni BB0_72; BB0_69: setp.neu.f32 %p89, %f225, 0f7F800000; @%p89 bra BB0_72; selp.f32 %f1411, 0fFF800000, 0f7F800000, %p5; BB0_72: setp.eq.f32 %p90, %f1340, 0f3F800000; selp.f32 %f237, 0f3F800000, %f1411, %p90; abs.f32 %f238, %f1339; setp.lt.f32 %p91, %f238, 0f00800000; mul.f32 %f1057, %f238, 0f4B800000; selp.f32 %f1058, 0fC3170000, 0fC2FE0000, %p91; selp.f32 %f1059, %f1057, %f238, %p91; mov.b32 %r139, %f1059; and.b32 %r140, %r139, 8388607; or.b32 %r141, %r140, 1065353216; mov.b32 %f1060, %r141; shr.u32 %r142, %r139, 23; cvt.rn.f32.u32 %f1061, %r142; add.f32 %f1062, %f1058, %f1061; setp.gt.f32 %p92, %f1060, 0f3FB504F3; mul.f32 %f1063, %f1060, 0f3F000000; add.f32 %f1064, %f1062, 0f3F800000; selp.f32 %f1065, %f1063, %f1060, %p92; selp.f32 %f1066, %f1064, %f1062, %p92; add.f32 %f1067, %f1065, 0fBF800000; add.f32 %f1056, %f1065, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1055,%f1056; // inline asm add.f32 %f1068, %f1067, %f1067; mul.f32 %f1069, %f1055, %f1068; mul.f32 %f1070, %f1069, %f1069; fma.rn.f32 %f1073, %f994, %f1070, %f993; fma.rn.f32 %f1075, %f1073, %f1070, %f996; mul.rn.f32 %f1076, %f1075, %f1070; mul.rn.f32 %f1077, %f1076, %f1069; sub.f32 %f1078, %f1067, %f1069; neg.f32 %f1079, %f1069; add.f32 %f1080, %f1078, %f1078; fma.rn.f32 %f1081, %f1079, %f1067, %f1080; mul.rn.f32 %f1082, %f1055, %f1081; add.f32 %f1083, %f1077, %f1069; sub.f32 %f1084, %f1069, %f1083; add.f32 %f1085, %f1077, %f1084; add.f32 %f1086, %f1082, %f1085; add.f32 %f1087, %f1083, %f1086; sub.f32 %f1088, %f1083, %f1087; add.f32 %f1089, %f1086, %f1088; mul.rn.f32 %f1091, %f1066, %f1012; mul.rn.f32 %f1093, %f1066, %f1014; add.f32 %f1094, %f1091, %f1087; sub.f32 %f1095, %f1091, %f1094; add.f32 %f1096, %f1087, %f1095; add.f32 %f1097, %f1089, %f1096; add.f32 %f1098, %f1093, %f1097; add.f32 %f1099, %f1094, %f1098; sub.f32 %f1100, %f1094, %f1099; add.f32 %f1101, %f1098, %f1100; mul.rn.f32 %f1103, %f1024, %f1099; neg.f32 %f1104, %f1103; fma.rn.f32 %f1105, %f1024, %f1099, %f1104; fma.rn.f32 %f1106, %f1024, %f1101, %f1105; fma.rn.f32 %f1108, %f1029, %f1099, %f1106; add.rn.f32 %f1109, %f1103, %f1108; neg.f32 %f1110, %f1109; add.rn.f32 %f1111, %f1103, %f1110; add.rn.f32 %f1112, %f1111, %f1108; mov.b32 %r143, %f1109; setp.eq.s32 %p93, %r143, 1118925336; add.s32 %r144, %r143, -1; mov.b32 %f1113, %r144; add.f32 %f1114, %f1112, 0f37000000; selp.f32 %f1115, %f1113, %f1109, %p93; selp.f32 %f239, %f1114, %f1112, %p93; mul.f32 %f1116, %f1115, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1117, %f1116; fma.rn.f32 %f1119, %f1117, %f1040, %f1115; fma.rn.f32 %f1121, %f1117, %f1042, %f1119; mul.f32 %f1122, %f1121, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1123, %f1122; add.f32 %f1124, %f1117, 0f00000000; ex2.approx.f32 %f1125, %f1124; mul.f32 %f1126, %f1123, %f1125; setp.lt.f32 %p94, %f1115, 0fC2D20000; selp.f32 %f1127, 0f00000000, %f1126, %p94; setp.gt.f32 %p95, %f1115, 0f42D20000; selp.f32 %f1412, 0f7F800000, %f1127, %p95; setp.eq.f32 %p96, %f1412, 0f7F800000; @%p96 bra BB0_74; fma.rn.f32 %f1412, %f1412, %f239, %f1412; BB0_74: setp.lt.f32 %p97, %f1339, 0f00000000; and.pred %p6, %p97, %p82; mov.b32 %r145, %f1412; xor.b32 %r146, %r145, -2147483648; mov.b32 %f1128, %r146; selp.f32 %f1414, %f1128, %f1412, %p6; setp.eq.f32 %p99, %f1339, 0f00000000; @%p99 bra BB0_77; bra.uni BB0_75; BB0_77: add.f32 %f1131, %f1339, %f1339; selp.f32 %f1414, %f1131, 0f00000000, %p82; bra.uni BB0_78; BB0_75: setp.geu.f32 %p100, %f1339, 0f00000000; @%p100 bra BB0_78; cvt.rzi.f32.f32 %f1130, %f1024; setp.neu.f32 %p101, %f1130, 0f3EE66666; selp.f32 %f1414, 0f7FFFFFFF, %f1414, %p101; BB0_78: add.f32 %f1132, %f238, 0f3EE66666; mov.b32 %r147, %f1132; setp.lt.s32 %p103, %r147, 2139095040; @%p103 bra BB0_83; setp.gtu.f32 %p104, %f238, 0f7F800000; @%p104 bra BB0_82; bra.uni BB0_80; BB0_82: add.f32 %f1414, %f1339, 0f3EE66666; bra.uni BB0_83; BB0_80: setp.neu.f32 %p105, %f238, 0f7F800000; @%p105 bra BB0_83; selp.f32 %f1414, 0fFF800000, 0f7F800000, %p6; BB0_83: setp.eq.f32 %p106, %f1339, 0f3F800000; selp.f32 %f250, 0f3F800000, %f1414, %p106; abs.f32 %f251, %f1338; setp.lt.f32 %p107, %f251, 0f00800000; mul.f32 %f1135, %f251, 0f4B800000; selp.f32 %f1136, 0fC3170000, 0fC2FE0000, %p107; selp.f32 %f1137, %f1135, %f251, %p107; mov.b32 %r148, %f1137; and.b32 %r149, %r148, 8388607; or.b32 %r150, %r149, 1065353216; mov.b32 %f1138, %r150; shr.u32 %r151, %r148, 23; cvt.rn.f32.u32 %f1139, %r151; add.f32 %f1140, %f1136, %f1139; setp.gt.f32 %p108, %f1138, 0f3FB504F3; mul.f32 %f1141, %f1138, 0f3F000000; add.f32 %f1142, %f1140, 0f3F800000; selp.f32 %f1143, %f1141, %f1138, %p108; selp.f32 %f1144, %f1142, %f1140, %p108; add.f32 %f1145, %f1143, 0fBF800000; add.f32 %f1134, %f1143, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1133,%f1134; // inline asm add.f32 %f1146, %f1145, %f1145; mul.f32 %f1147, %f1133, %f1146; mul.f32 %f1148, %f1147, %f1147; fma.rn.f32 %f1151, %f994, %f1148, %f993; fma.rn.f32 %f1153, %f1151, %f1148, %f996; mul.rn.f32 %f1154, %f1153, %f1148; mul.rn.f32 %f1155, %f1154, %f1147; sub.f32 %f1156, %f1145, %f1147; neg.f32 %f1157, %f1147; add.f32 %f1158, %f1156, %f1156; fma.rn.f32 %f1159, %f1157, %f1145, %f1158; mul.rn.f32 %f1160, %f1133, %f1159; add.f32 %f1161, %f1155, %f1147; sub.f32 %f1162, %f1147, %f1161; add.f32 %f1163, %f1155, %f1162; add.f32 %f1164, %f1160, %f1163; add.f32 %f1165, %f1161, %f1164; sub.f32 %f1166, %f1161, %f1165; add.f32 %f1167, %f1164, %f1166; mul.rn.f32 %f1169, %f1144, %f1012; mul.rn.f32 %f1171, %f1144, %f1014; add.f32 %f1172, %f1169, %f1165; sub.f32 %f1173, %f1169, %f1172; add.f32 %f1174, %f1165, %f1173; add.f32 %f1175, %f1167, %f1174; add.f32 %f1176, %f1171, %f1175; add.f32 %f1177, %f1172, %f1176; sub.f32 %f1178, %f1172, %f1177; add.f32 %f1179, %f1176, %f1178; mul.rn.f32 %f1181, %f1024, %f1177; neg.f32 %f1182, %f1181; fma.rn.f32 %f1183, %f1024, %f1177, %f1182; fma.rn.f32 %f1184, %f1024, %f1179, %f1183; fma.rn.f32 %f1186, %f1029, %f1177, %f1184; add.rn.f32 %f1187, %f1181, %f1186; neg.f32 %f1188, %f1187; add.rn.f32 %f1189, %f1181, %f1188; add.rn.f32 %f1190, %f1189, %f1186; mov.b32 %r152, %f1187; setp.eq.s32 %p109, %r152, 1118925336; add.s32 %r153, %r152, -1; mov.b32 %f1191, %r153; add.f32 %f1192, %f1190, 0f37000000; selp.f32 %f1193, %f1191, %f1187, %p109; selp.f32 %f252, %f1192, %f1190, %p109; mul.f32 %f1194, %f1193, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1195, %f1194; fma.rn.f32 %f1197, %f1195, %f1040, %f1193; fma.rn.f32 %f1199, %f1195, %f1042, %f1197; mul.f32 %f1200, %f1199, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1201, %f1200; add.f32 %f1202, %f1195, 0f00000000; ex2.approx.f32 %f1203, %f1202; mul.f32 %f1204, %f1201, %f1203; setp.lt.f32 %p110, %f1193, 0fC2D20000; selp.f32 %f1205, 0f00000000, %f1204, %p110; setp.gt.f32 %p111, %f1193, 0f42D20000; selp.f32 %f1415, 0f7F800000, %f1205, %p111; setp.eq.f32 %p112, %f1415, 0f7F800000; @%p112 bra BB0_85; fma.rn.f32 %f1415, %f1415, %f252, %f1415; BB0_85: setp.lt.f32 %p113, %f1338, 0f00000000; and.pred %p7, %p113, %p82; mov.b32 %r154, %f1415; xor.b32 %r155, %r154, -2147483648; mov.b32 %f1206, %r155; selp.f32 %f1417, %f1206, %f1415, %p7; setp.eq.f32 %p115, %f1338, 0f00000000; @%p115 bra BB0_88; bra.uni BB0_86; BB0_88: add.f32 %f1209, %f1338, %f1338; selp.f32 %f1417, %f1209, 0f00000000, %p82; bra.uni BB0_89; BB0_86: setp.geu.f32 %p116, %f1338, 0f00000000; @%p116 bra BB0_89; cvt.rzi.f32.f32 %f1208, %f1024; setp.neu.f32 %p117, %f1208, 0f3EE66666; selp.f32 %f1417, 0f7FFFFFFF, %f1417, %p117; BB0_89: add.f32 %f1210, %f251, 0f3EE66666; mov.b32 %r156, %f1210; setp.lt.s32 %p119, %r156, 2139095040; @%p119 bra BB0_94; setp.gtu.f32 %p120, %f251, 0f7F800000; @%p120 bra BB0_93; bra.uni BB0_91; BB0_93: add.f32 %f1417, %f1338, 0f3EE66666; bra.uni BB0_94; BB0_91: setp.neu.f32 %p121, %f251, 0f7F800000; @%p121 bra BB0_94; selp.f32 %f1417, 0fFF800000, 0f7F800000, %p7; BB0_94: setp.eq.f32 %p122, %f1338, 0f3F800000; selp.f32 %f1211, 0f3F800000, %f1417, %p122; cvt.u64.u32 %rd53, %r3; cvt.u64.u32 %rd52, %r2; mov.u64 %rd56, image; cvta.global.u64 %rd51, %rd56; // inline asm call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13); // inline asm cvt.sat.f32.f32 %f1212, %f1211; mul.f32 %f1213, %f1212, 0f437FFD71; cvt.rzi.u32.f32 %r159, %f1213; cvt.sat.f32.f32 %f1214, %f250; mul.f32 %f1215, %f1214, 0f437FFD71; cvt.rzi.u32.f32 %r160, %f1215; cvt.sat.f32.f32 %f1216, %f237; mul.f32 %f1217, %f1216, 0f437FFD71; cvt.rzi.u32.f32 %r161, %f1217; cvt.u16.u32 %rs19, %r159; cvt.u16.u32 %rs20, %r161; cvt.u16.u32 %rs21, %r160; mov.u16 %rs22, 255; st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22}; ld.global.u32 %r247, [imageEnabled]; BB0_95: cvt.u64.u32 %rd4, %r2; cvt.u64.u32 %rd5, %r3; and.b32 %r162, %r247, 4; setp.eq.s32 %p123, %r162, 0; @%p123 bra BB0_99; ld.global.u32 %r163, [additive]; setp.eq.s32 %p124, %r163, 0; mov.f32 %f1218, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs23, %f1218;} // inline asm @%p124 bra BB0_98; mov.u64 %rd69, image_HDR; cvta.global.u64 %rd58, %rd69; mov.u32 %r167, 8; // inline asm call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57]; // inline asm { cvt.f32.f16 %f1219, %rs30;} // inline asm // inline asm { cvt.f32.f16 %f1220, %rs31;} // inline asm // inline asm { cvt.f32.f16 %f1221, %rs32;} // inline asm // inline asm call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1222, %f1340, %f1219; add.f32 %f1223, %f1339, %f1220; add.f32 %f1224, %f1338, %f1221; // inline asm { cvt.rn.f16.f32 %rs29, %f1224;} // inline asm // inline asm { cvt.rn.f16.f32 %rs28, %f1223;} // inline asm // inline asm { cvt.rn.f16.f32 %rs27, %f1222;} // inline asm st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23}; bra.uni BB0_99; BB0_98: mov.u64 %rd76, image_HDR; cvta.global.u64 %rd71, %rd76; mov.u32 %r169, 8; // inline asm call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r169, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs36, %f1338;} // inline asm // inline asm { cvt.rn.f16.f32 %rs35, %f1339;} // inline asm // inline asm { cvt.rn.f16.f32 %rs34, %f1340;} // inline asm st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23}; BB0_99: mov.f32 %f1229, 0f34000000; max.f32 %f1230, %f1337, %f1229; div.rn.f32 %f1231, %f1334, %f1230; max.f32 %f1232, %f1336, %f1229; div.rn.f32 %f1233, %f1333, %f1232; max.f32 %f1234, %f1335, %f1229; div.rn.f32 %f1235, %f1332, %f1234; fma.rn.f32 %f263, %f1231, 0f3F000000, 0f3F000000; fma.rn.f32 %f264, %f1233, 0f3F000000, 0f3F000000; fma.rn.f32 %f265, %f1235, 0f3F000000, 0f3F000000; div.rn.f32 %f1236, %f1331, %f1230; div.rn.f32 %f1237, %f1330, %f1232; div.rn.f32 %f1238, %f1329, %f1234; fma.rn.f32 %f266, %f1236, 0f3F000000, 0f3F000000; fma.rn.f32 %f267, %f1237, 0f3F000000, 0f3F000000; fma.rn.f32 %f268, %f1238, 0f3F000000, 0f3F000000; div.rn.f32 %f1239, %f1328, %f1230; div.rn.f32 %f1240, %f1327, %f1232; div.rn.f32 %f1241, %f1326, %f1234; fma.rn.f32 %f269, %f1239, 0f3F000000, 0f3F000000; fma.rn.f32 %f270, %f1240, 0f3F000000, 0f3F000000; fma.rn.f32 %f271, %f1241, 0f3F000000, 0f3F000000; ld.global.u32 %r170, [additive]; setp.eq.s32 %p125, %r170, 0; mov.f32 %f1228, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs37, %f1228;} // inline asm @%p125 bra BB0_101; mov.u64 %rd89, image_RNM0; cvta.global.u64 %rd78, %rd89; mov.u32 %r174, 8; // inline asm call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r174, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd77]; // inline asm { cvt.f32.f16 %f1242, %rs44;} // inline asm // inline asm { cvt.f32.f16 %f1243, %rs45;} // inline asm // inline asm { cvt.f32.f16 %f1244, %rs46;} // inline asm // inline asm call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r174, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1245, %f1337, %f1242; add.f32 %f1246, %f1336, %f1243; add.f32 %f1247, %f1335, %f1244; // inline asm { cvt.rn.f16.f32 %rs43, %f1247;} // inline asm // inline asm { cvt.rn.f16.f32 %rs42, %f1246;} // inline asm // inline asm { cvt.rn.f16.f32 %rs41, %f1245;} // inline asm st.v4.u16 [%rd83], {%rs41, %rs42, %rs43, %rs37}; bra.uni BB0_102; BB0_101: mov.u64 %rd96, image_RNM0; cvta.global.u64 %rd91, %rd96; mov.u32 %r176, 8; // inline asm call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r176, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs50, %f1335;} // inline asm // inline asm { cvt.rn.f16.f32 %rs49, %f1336;} // inline asm // inline asm { cvt.rn.f16.f32 %rs48, %f1337;} // inline asm st.v4.u16 [%rd90], {%rs48, %rs49, %rs50, %rs37}; BB0_102: ld.global.u32 %r177, [additive]; setp.eq.s32 %p126, %r177, 0; // inline asm { cvt.rn.f16.f32 %rs51, %f1228;} // inline asm @%p126 bra BB0_104; mov.u64 %rd109, image_RNM1; cvta.global.u64 %rd98, %rd109; mov.u32 %r181, 8; // inline asm call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r181, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd97]; // inline asm { cvt.f32.f16 %f1252, %rs58;} // inline asm // inline asm { cvt.f32.f16 %f1253, %rs59;} // inline asm // inline asm { cvt.f32.f16 %f1254, %rs60;} // inline asm // inline asm call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r181, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1255, %f263, %f1252; add.f32 %f1256, %f264, %f1253; add.f32 %f1257, %f265, %f1254; // inline asm { cvt.rn.f16.f32 %rs57, %f1257;} // inline asm // inline asm { cvt.rn.f16.f32 %rs56, %f1256;} // inline asm // inline asm { cvt.rn.f16.f32 %rs55, %f1255;} // inline asm st.v4.u16 [%rd103], {%rs55, %rs56, %rs57, %rs51}; bra.uni BB0_105; BB0_104: mov.u64 %rd116, image_RNM1; cvta.global.u64 %rd111, %rd116; mov.u32 %r183, 8; // inline asm call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r183, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs64, %f265;} // inline asm // inline asm { cvt.rn.f16.f32 %rs63, %f264;} // inline asm // inline asm { cvt.rn.f16.f32 %rs62, %f263;} // inline asm st.v4.u16 [%rd110], {%rs62, %rs63, %rs64, %rs51}; BB0_105: ld.global.u32 %r184, [additive]; setp.eq.s32 %p127, %r184, 0; // inline asm { cvt.rn.f16.f32 %rs65, %f1228;} // inline asm @%p127 bra BB0_107; mov.u64 %rd129, image_RNM2; cvta.global.u64 %rd118, %rd129; mov.u32 %r188, 8; // inline asm call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r188, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd117]; // inline asm { cvt.f32.f16 %f1262, %rs72;} // inline asm // inline asm { cvt.f32.f16 %f1263, %rs73;} // inline asm // inline asm { cvt.f32.f16 %f1264, %rs74;} // inline asm // inline asm call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r188, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1265, %f266, %f1262; add.f32 %f1266, %f267, %f1263; add.f32 %f1267, %f268, %f1264; // inline asm { cvt.rn.f16.f32 %rs71, %f1267;} // inline asm // inline asm { cvt.rn.f16.f32 %rs70, %f1266;} // inline asm // inline asm { cvt.rn.f16.f32 %rs69, %f1265;} // inline asm st.v4.u16 [%rd123], {%rs69, %rs70, %rs71, %rs65}; bra.uni BB0_108; BB0_107: mov.u64 %rd136, image_RNM2; cvta.global.u64 %rd131, %rd136; mov.u32 %r190, 8; // inline asm call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r190, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs78, %f268;} // inline asm // inline asm { cvt.rn.f16.f32 %rs77, %f267;} // inline asm // inline asm { cvt.rn.f16.f32 %rs76, %f266;} // inline asm st.v4.u16 [%rd130], {%rs76, %rs77, %rs78, %rs65}; BB0_108: ld.global.u32 %r191, [additive]; setp.eq.s32 %p128, %r191, 0; // inline asm { cvt.rn.f16.f32 %rs79, %f1228;} // inline asm @%p128 bra BB0_110; mov.u64 %rd149, image_RNM3; cvta.global.u64 %rd138, %rd149; mov.u32 %r195, 8; // inline asm call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r195, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd137]; // inline asm { cvt.f32.f16 %f1272, %rs86;} // inline asm // inline asm { cvt.f32.f16 %f1273, %rs87;} // inline asm // inline asm { cvt.f32.f16 %f1274, %rs88;} // inline asm // inline asm call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r195, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1275, %f269, %f1272; add.f32 %f1276, %f270, %f1273; add.f32 %f1277, %f271, %f1274; // inline asm { cvt.rn.f16.f32 %rs85, %f1277;} // inline asm // inline asm { cvt.rn.f16.f32 %rs84, %f1276;} // inline asm // inline asm { cvt.rn.f16.f32 %rs83, %f1275;} // inline asm st.v4.u16 [%rd143], {%rs83, %rs84, %rs85, %rs79}; bra.uni BB0_131; BB0_110: mov.u64 %rd156, image_RNM3; cvta.global.u64 %rd151, %rd156; mov.u32 %r197, 8; // inline asm call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r197, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs92, %f271;} // inline asm // inline asm { cvt.rn.f16.f32 %rs91, %f270;} // inline asm // inline asm { cvt.rn.f16.f32 %rs90, %f269;} // inline asm st.v4.u16 [%rd150], {%rs90, %rs91, %rs92, %rs79}; BB0_131: ret; }