//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .texref albedoTex;
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 16 .b8 	__local_depot0[48];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<102>;
	.reg .b16 	%rs<33>;
	.reg .f32 	%f<610>;
	.reg .b32 	%r<310>;
	.reg .b64 	%rd<112>;


	mov.u64 	%rd111, __local_depot0;
	cvta.local.u64 	%SP, %rd111;
	ld.global.u32 	%r1, [samples];
	ld.global.v2.u32 	{%r96, %r97}, [pixelID];
	cvt.u64.u32	%rd17, %r96;
	cvt.u64.u32	%rd18, %r97;
	mov.u64 	%rd21, uvnormal;
	cvta.global.u64 	%rd16, %rd21;
	mov.u32 	%r94, 2;
	mov.u32 	%r95, 4;
	mov.u64 	%rd20, 0;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r94, %r95, %rd17, %rd18, %rd20, %rd20);
	// inline asm
	ld.u32 	%r2, [%rd15];
	shr.u32 	%r100, %r2, 16;
	cvt.u16.u32	%rs1, %r100;
	and.b16  	%rs2, %rs1, 255;
	cvt.u16.u32	%rs3, %r2;
	or.b16  	%rs4, %rs3, %rs2;
	setp.eq.s16	%p6, %rs4, 0;
	mov.f32 	%f577, 0f00000000;
	mov.f32 	%f578, %f577;
	mov.f32 	%f579, %f577;
	@%p6 bra 	BB0_2;

	ld.u8 	%rs5, [%rd15+1];
	and.b16  	%rs7, %rs3, 255;
	cvt.rn.f32.u16	%f125, %rs7;
	div.rn.f32 	%f126, %f125, 0f437F0000;
	fma.rn.f32 	%f127, %f126, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f128, %rs5;
	div.rn.f32 	%f129, %f128, 0f437F0000;
	fma.rn.f32 	%f130, %f129, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f131, %rs2;
	div.rn.f32 	%f132, %f131, 0f437F0000;
	fma.rn.f32 	%f133, %f132, 0f40000000, 0fBF800000;
	mul.f32 	%f134, %f130, %f130;
	fma.rn.f32 	%f135, %f127, %f127, %f134;
	fma.rn.f32 	%f136, %f133, %f133, %f135;
	sqrt.rn.f32 	%f137, %f136;
	rcp.rn.f32 	%f138, %f137;
	mul.f32 	%f577, %f127, %f138;
	mul.f32 	%f578, %f130, %f138;
	mul.f32 	%f579, %f133, %f138;

BB0_2:
	ld.global.v2.u32 	{%r101, %r102}, [pixelID];
	ld.global.v2.u32 	{%r104, %r105}, [tileInfo];
	add.s32 	%r3, %r101, %r104;
	add.s32 	%r4, %r102, %r105;
	setp.eq.f32	%p7, %f578, 0f00000000;
	setp.eq.f32	%p8, %f577, 0f00000000;
	and.pred  	%p9, %p8, %p7;
	setp.eq.f32	%p10, %f579, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	@%p11 bra 	BB0_96;
	bra.uni 	BB0_3;

BB0_96:
	ld.global.u32 	%r309, [imageEnabled];
	and.b32  	%r267, %r309, 1;
	setp.eq.b32	%p98, %r267, 1;
	@!%p98 bra 	BB0_98;
	bra.uni 	BB0_97;

BB0_97:
	cvt.u64.u32	%rd85, %r3;
	cvt.u64.u32	%rd86, %r4;
	mov.u64 	%rd89, image;
	cvta.global.u64 	%rd84, %rd89;
	mov.u64 	%rd88, 0;
	// inline asm
	call (%rd83), _rt_buffer_get_64, (%rd84, %r94, %r95, %rd85, %rd86, %rd88, %rd88);
	// inline asm
	mov.u16 	%rs28, 0;
	st.v4.u8 	[%rd83], {%rs28, %rs28, %rs28, %rs28};
	ld.global.u32 	%r309, [imageEnabled];

BB0_98:
	and.b32  	%r270, %r309, 4;
	setp.eq.s32	%p99, %r270, 0;
	@%p99 bra 	BB0_100;

	cvt.u64.u32	%rd92, %r3;
	cvt.u64.u32	%rd93, %r4;
	mov.u64 	%rd96, image_HDR;
	cvta.global.u64 	%rd91, %rd96;
	mov.u32 	%r272, 8;
	mov.u64 	%rd95, 0;
	// inline asm
	call (%rd90), _rt_buffer_get_64, (%rd91, %r94, %r272, %rd92, %rd93, %rd95, %rd95);
	// inline asm
	mov.f32 	%f545, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f545;}

	// inline asm
	mov.u16 	%rs30, 0;
	st.v4.u16 	[%rd90], {%rs29, %rs29, %rs29, %rs30};
	ld.global.u32 	%r309, [imageEnabled];

BB0_100:
	and.b32  	%r273, %r309, 16;
	setp.eq.s32	%p100, %r273, 0;
	@%p100 bra 	BB0_102;

	cvt.u64.u32	%rd99, %r3;
	cvt.u64.u32	%rd100, %r4;
	mov.u64 	%rd103, image_HDR2;
	cvta.global.u64 	%rd98, %rd103;
	mov.u32 	%r275, 8;
	mov.u64 	%rd102, 0;
	// inline asm
	call (%rd97), _rt_buffer_get_64, (%rd98, %r94, %r275, %rd99, %rd100, %rd102, %rd102);
	// inline asm
	mov.f32 	%f546, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs31, %f546;}

	// inline asm
	mov.u16 	%rs32, 0;
	st.v4.u16 	[%rd97], {%rs31, %rs31, %rs31, %rs32};
	bra.uni 	BB0_102;

BB0_3:
	ld.global.v2.u32 	{%r115, %r116}, [pixelID];
	cvt.u64.u32	%rd24, %r115;
	cvt.u64.u32	%rd25, %r116;
	mov.u64 	%rd40, lightmapDirect;
	cvta.global.u64 	%rd23, %rd40;
	mov.u32 	%r110, 8;
	// inline asm
	call (%rd22), _rt_buffer_get_64, (%rd23, %r94, %r110, %rd24, %rd25, %rd20, %rd20);
	// inline asm
	ld.v4.u16 	{%rs12, %rs13, %rs14, %rs15}, [%rd22];
	// inline asm
	{  cvt.f32.f16 %f139, %rs12;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f140, %rs13;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f141, %rs14;}

	// inline asm
	ld.global.v2.u32 	{%r119, %r120}, [pixelID];
	cvt.u64.u32	%rd30, %r119;
	cvt.u64.u32	%rd31, %r120;
	mov.u64 	%rd41, uvpos;
	cvta.global.u64 	%rd29, %rd41;
	mov.u32 	%r112, 12;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd29, %r94, %r112, %rd30, %rd31, %rd20, %rd20);
	// inline asm
	ld.f32 	%f145, [%rd28+8];
	ld.f32 	%f146, [%rd28+4];
	ld.f32 	%f147, [%rd28];
	mul.f32 	%f148, %f147, 0f3456BF95;
	mul.f32 	%f149, %f146, 0f3456BF95;
	mul.f32 	%f150, %f145, 0f3456BF95;
	abs.f32 	%f151, %f577;
	div.rn.f32 	%f152, %f148, %f151;
	abs.f32 	%f153, %f578;
	div.rn.f32 	%f154, %f149, %f153;
	abs.f32 	%f155, %f579;
	div.rn.f32 	%f156, %f150, %f155;
	abs.f32 	%f157, %f152;
	abs.f32 	%f158, %f154;
	abs.f32 	%f159, %f156;
	mov.f32 	%f160, 0f38D1B717;
	max.f32 	%f161, %f157, %f160;
	max.f32 	%f162, %f158, %f160;
	max.f32 	%f163, %f159, %f160;
	fma.rn.f32 	%f10, %f577, %f161, %f147;
	fma.rn.f32 	%f11, %f578, %f162, %f146;
	fma.rn.f32 	%f12, %f579, %f163, %f145;
	setp.gt.f32	%p12, %f151, %f155;
	neg.f32 	%f164, %f578;
	selp.f32	%f165, %f164, 0f00000000, %p12;
	neg.f32 	%f166, %f579;
	selp.f32	%f167, %f577, %f166, %p12;
	selp.f32	%f168, 0f00000000, %f578, %p12;
	mul.f32 	%f169, %f167, %f167;
	fma.rn.f32 	%f170, %f165, %f165, %f169;
	fma.rn.f32 	%f171, %f168, %f168, %f170;
	sqrt.rn.f32 	%f172, %f171;
	rcp.rn.f32 	%f173, %f172;
	mul.f32 	%f13, %f165, %f173;
	mul.f32 	%f14, %f167, %f173;
	mul.f32 	%f15, %f168, %f173;
	ld.global.v2.u32 	{%r123, %r124}, [pixelID];
	cvt.u64.u32	%rd36, %r123;
	cvt.u64.u32	%rd37, %r124;
	mov.u64 	%rd42, rnd_seeds;
	cvta.global.u64 	%rd35, %rd42;
	// inline asm
	call (%rd34), _rt_buffer_get_64, (%rd35, %r94, %r95, %rd36, %rd37, %rd20, %rd20);
	// inline asm
	mov.f32 	%f583, 0f00000000;
	setp.lt.s32	%p13, %r1, 1;
	mov.f32 	%f584, %f583;
	mov.f32 	%f585, %f583;
	@%p13 bra 	BB0_54;

	cvt.rn.f32.s32	%f177, %r1;
	rcp.rn.f32 	%f16, %f177;
	ld.u32 	%r285, [%rd34];
	mul.f32 	%f17, %f10, 0f3456BF95;
	mul.f32 	%f18, %f11, 0f3456BF95;
	mul.f32 	%f19, %f12, 0f3456BF95;
	mul.f32 	%f178, %f577, %f14;
	mul.f32 	%f179, %f578, %f13;
	sub.f32 	%f20, %f179, %f178;
	mul.f32 	%f180, %f579, %f13;
	mul.f32 	%f181, %f577, %f15;
	sub.f32 	%f21, %f181, %f180;
	mul.f32 	%f182, %f578, %f15;
	mul.f32 	%f183, %f579, %f14;
	sub.f32 	%f22, %f183, %f182;
	mov.f32 	%f583, 0f00000000;
	mov.u32 	%r127, 0;
	abs.f32 	%f184, %f18;
	abs.f32 	%f185, %f17;
	max.f32 	%f186, %f185, %f184;
	abs.f32 	%f187, %f19;
	max.f32 	%f188, %f186, %f187;
	mov.u32 	%r282, %r127;
	mov.f32 	%f584, %f583;
	mov.f32 	%f585, %f583;

BB0_5:
	cvt.rn.f32.s32	%f26, %r282;
	max.f32 	%f27, %f188, %f160;
	mov.u32 	%r284, %r127;

BB0_6:
	mad.lo.s32 	%r129, %r285, 1664525, 1013904223;
	and.b32  	%r130, %r129, 16777215;
	cvt.rn.f32.u32	%f190, %r130;
	fma.rn.f32 	%f191, %f190, 0f33800000, %f26;
	mul.f32 	%f192, %f16, %f191;
	mad.lo.s32 	%r285, %r129, 1664525, 1013904223;
	and.b32  	%r131, %r285, 16777215;
	cvt.rn.f32.u32	%f193, %r131;
	cvt.rn.f32.s32	%f194, %r284;
	fma.rn.f32 	%f195, %f193, 0f33800000, %f194;
	mul.f32 	%f196, %f16, %f195;
	sqrt.rn.f32 	%f31, %f192;
	mul.f32 	%f592, %f196, 0f40C90FDB;
	abs.f32 	%f33, %f592;
	setp.neu.f32	%p14, %f33, 0f7F800000;
	mov.f32 	%f586, %f592;
	@%p14 bra 	BB0_8;

	mov.f32 	%f197, 0f00000000;
	mul.rn.f32 	%f586, %f592, %f197;

BB0_8:
	mul.f32 	%f198, %f586, 0f3F22F983;
	cvt.rni.s32.f32	%r295, %f198;
	cvt.rn.f32.s32	%f199, %r295;
	neg.f32 	%f200, %f199;
	mov.f32 	%f201, 0f3FC90FDA;
	fma.rn.f32 	%f202, %f200, %f201, %f586;
	mov.f32 	%f203, 0f33A22168;
	fma.rn.f32 	%f204, %f200, %f203, %f202;
	mov.f32 	%f205, 0f27C234C5;
	fma.rn.f32 	%f587, %f200, %f205, %f204;
	abs.f32 	%f206, %f586;
	setp.leu.f32	%p15, %f206, 0f47CE4780;
	@%p15 bra 	BB0_19;

	add.u64 	%rd44, %SP, 0;
	cvta.to.local.u64 	%rd3, %rd44;
	mov.b32 	 %r12, %f586;
	shr.u32 	%r13, %r12, 23;
	shl.b32 	%r134, %r12, 8;
	or.b32  	%r14, %r134, -2147483648;
	mov.u32 	%r286, 0;
	mov.u64 	%rd107, %rd3;
	mov.u64 	%rd108, %rd20;
	mov.u32 	%r287, %r286;

BB0_10:
	.pragma "nounroll";
	shl.b64 	%rd45, %rd108, 2;
	mov.u64 	%rd46, __cudart_i2opi_f;
	add.s64 	%rd47, %rd46, %rd45;
	ld.const.u32 	%r137, [%rd47];
	// inline asm
	{
	mad.lo.cc.u32   %r135, %r137, %r14, %r287;
	madc.hi.u32     %r287, %r137, %r14,  0;
	}
	// inline asm
	st.local.u32 	[%rd107], %r135;
	add.s32 	%r286, %r286, 1;
	cvt.s64.s32	%rd108, %r286;
	mul.wide.s32 	%rd50, %r286, 4;
	add.s64 	%rd107, %rd3, %rd50;
	setp.ne.s32	%p16, %r286, 6;
	@%p16 bra 	BB0_10;

	and.b32  	%r140, %r13, 255;
	add.s32 	%r141, %r140, -128;
	shr.u32 	%r142, %r141, 5;
	and.b32  	%r19, %r12, -2147483648;
	cvta.to.local.u64 	%rd52, %rd44;
	st.local.u32 	[%rd52+24], %r287;
	mov.u32 	%r143, 6;
	sub.s32 	%r144, %r143, %r142;
	mul.wide.s32 	%rd53, %r144, 4;
	add.s64 	%rd8, %rd52, %rd53;
	ld.local.u32 	%r288, [%rd8];
	ld.local.u32 	%r289, [%rd8+-4];
	and.b32  	%r22, %r13, 31;
	setp.eq.s32	%p17, %r22, 0;
	@%p17 bra 	BB0_13;

	mov.u32 	%r145, 32;
	sub.s32 	%r146, %r145, %r22;
	shr.u32 	%r147, %r289, %r146;
	shl.b32 	%r148, %r288, %r22;
	add.s32 	%r288, %r147, %r148;
	ld.local.u32 	%r149, [%rd8+-8];
	shr.u32 	%r150, %r149, %r146;
	shl.b32 	%r151, %r289, %r22;
	add.s32 	%r289, %r150, %r151;

BB0_13:
	shr.u32 	%r152, %r289, 30;
	shl.b32 	%r153, %r288, 2;
	add.s32 	%r290, %r152, %r153;
	shl.b32 	%r28, %r289, 2;
	shr.u32 	%r154, %r290, 31;
	shr.u32 	%r155, %r288, 30;
	add.s32 	%r29, %r154, %r155;
	setp.eq.s32	%p18, %r154, 0;
	@%p18 bra 	BB0_14;
	bra.uni 	BB0_15;

BB0_14:
	mov.u32 	%r291, %r19;
	mov.u32 	%r292, %r28;
	bra.uni 	BB0_16;

BB0_15:
	not.b32 	%r156, %r290;
	neg.s32 	%r292, %r28;
	setp.eq.s32	%p19, %r28, 0;
	selp.u32	%r157, 1, 0, %p19;
	add.s32 	%r290, %r157, %r156;
	xor.b32  	%r291, %r19, -2147483648;

BB0_16:
	clz.b32 	%r294, %r290;
	setp.eq.s32	%p20, %r294, 0;
	shl.b32 	%r158, %r290, %r294;
	mov.u32 	%r159, 32;
	sub.s32 	%r160, %r159, %r294;
	shr.u32 	%r161, %r292, %r160;
	add.s32 	%r162, %r161, %r158;
	selp.b32	%r37, %r290, %r162, %p20;
	mov.u32 	%r163, -921707870;
	mul.hi.u32 	%r293, %r37, %r163;
	setp.eq.s32	%p21, %r19, 0;
	neg.s32 	%r164, %r29;
	selp.b32	%r295, %r29, %r164, %p21;
	setp.lt.s32	%p22, %r293, 1;
	@%p22 bra 	BB0_18;

	mul.lo.s32 	%r165, %r37, -921707870;
	shr.u32 	%r166, %r165, 31;
	shl.b32 	%r167, %r293, 1;
	add.s32 	%r293, %r166, %r167;
	add.s32 	%r294, %r294, 1;

BB0_18:
	mov.u32 	%r168, 126;
	sub.s32 	%r169, %r168, %r294;
	shl.b32 	%r170, %r169, 23;
	add.s32 	%r171, %r293, 1;
	shr.u32 	%r172, %r171, 7;
	add.s32 	%r173, %r172, 1;
	shr.u32 	%r174, %r173, 1;
	add.s32 	%r175, %r174, %r170;
	or.b32  	%r176, %r175, %r291;
	mov.b32 	 %f587, %r176;

BB0_19:
	mul.rn.f32 	%f39, %f587, %f587;
	add.s32 	%r45, %r295, 1;
	and.b32  	%r46, %r45, 1;
	setp.eq.s32	%p23, %r46, 0;
	@%p23 bra 	BB0_21;
	bra.uni 	BB0_20;

BB0_21:
	mov.f32 	%f209, 0f3C08839E;
	mov.f32 	%f210, 0fB94CA1F9;
	fma.rn.f32 	%f588, %f210, %f39, %f209;
	bra.uni 	BB0_22;

BB0_20:
	mov.f32 	%f207, 0fBAB6061A;
	mov.f32 	%f208, 0f37CCF5CE;
	fma.rn.f32 	%f588, %f208, %f39, %f207;

BB0_22:
	@%p23 bra 	BB0_24;
	bra.uni 	BB0_23;

BB0_24:
	mov.f32 	%f214, 0fBE2AAAA3;
	fma.rn.f32 	%f215, %f588, %f39, %f214;
	mov.f32 	%f216, 0f00000000;
	fma.rn.f32 	%f589, %f215, %f39, %f216;
	bra.uni 	BB0_25;

BB0_23:
	mov.f32 	%f211, 0f3D2AAAA5;
	fma.rn.f32 	%f212, %f588, %f39, %f211;
	mov.f32 	%f213, 0fBF000000;
	fma.rn.f32 	%f589, %f212, %f39, %f213;

BB0_25:
	fma.rn.f32 	%f590, %f589, %f587, %f587;
	@%p23 bra 	BB0_27;

	mov.f32 	%f217, 0f3F800000;
	fma.rn.f32 	%f590, %f589, %f39, %f217;

BB0_27:
	and.b32  	%r177, %r45, 2;
	setp.eq.s32	%p26, %r177, 0;
	@%p26 bra 	BB0_29;

	mov.f32 	%f218, 0f00000000;
	mov.f32 	%f219, 0fBF800000;
	fma.rn.f32 	%f590, %f590, %f219, %f218;

BB0_29:
	@%p14 bra 	BB0_31;

	mov.f32 	%f220, 0f00000000;
	mul.rn.f32 	%f592, %f592, %f220;

BB0_31:
	mul.f32 	%f221, %f592, 0f3F22F983;
	cvt.rni.s32.f32	%r305, %f221;
	cvt.rn.f32.s32	%f222, %r305;
	neg.f32 	%f223, %f222;
	fma.rn.f32 	%f225, %f223, %f201, %f592;
	fma.rn.f32 	%f227, %f223, %f203, %f225;
	fma.rn.f32 	%f593, %f223, %f205, %f227;
	abs.f32 	%f229, %f592;
	setp.leu.f32	%p28, %f229, 0f47CE4780;
	@%p28 bra 	BB0_42;

	mov.b32 	 %r48, %f592;
	shr.u32 	%r49, %r48, 23;
	shl.b32 	%r180, %r48, 8;
	or.b32  	%r50, %r180, -2147483648;
	add.u64 	%rd55, %SP, 0;
	cvta.to.local.u64 	%rd110, %rd55;
	mov.u32 	%r297, 0;
	mov.u64 	%rd109, __cudart_i2opi_f;
	mov.u32 	%r296, -6;

BB0_33:
	.pragma "nounroll";
	ld.const.u32 	%r183, [%rd109];
	// inline asm
	{
	mad.lo.cc.u32   %r181, %r183, %r50, %r297;
	madc.hi.u32     %r297, %r183, %r50,  0;
	}
	// inline asm
	st.local.u32 	[%rd110], %r181;
	add.s64 	%rd110, %rd110, 4;
	add.s64 	%rd109, %rd109, 4;
	add.s32 	%r296, %r296, 1;
	setp.ne.s32	%p29, %r296, 0;
	@%p29 bra 	BB0_33;

	and.b32  	%r186, %r49, 255;
	add.s32 	%r187, %r186, -128;
	shr.u32 	%r188, %r187, 5;
	and.b32  	%r55, %r48, -2147483648;
	cvta.to.local.u64 	%rd57, %rd55;
	st.local.u32 	[%rd57+24], %r297;
	mov.u32 	%r189, 6;
	sub.s32 	%r190, %r189, %r188;
	mul.wide.s32 	%rd58, %r190, 4;
	add.s64 	%rd14, %rd57, %rd58;
	ld.local.u32 	%r298, [%rd14];
	ld.local.u32 	%r299, [%rd14+-4];
	and.b32  	%r58, %r49, 31;
	setp.eq.s32	%p30, %r58, 0;
	@%p30 bra 	BB0_36;

	mov.u32 	%r191, 32;
	sub.s32 	%r192, %r191, %r58;
	shr.u32 	%r193, %r299, %r192;
	shl.b32 	%r194, %r298, %r58;
	add.s32 	%r298, %r193, %r194;
	ld.local.u32 	%r195, [%rd14+-8];
	shr.u32 	%r196, %r195, %r192;
	shl.b32 	%r197, %r299, %r58;
	add.s32 	%r299, %r196, %r197;

BB0_36:
	shr.u32 	%r198, %r299, 30;
	shl.b32 	%r199, %r298, 2;
	add.s32 	%r300, %r198, %r199;
	shl.b32 	%r64, %r299, 2;
	shr.u32 	%r200, %r300, 31;
	shr.u32 	%r201, %r298, 30;
	add.s32 	%r65, %r200, %r201;
	setp.eq.s32	%p31, %r200, 0;
	@%p31 bra 	BB0_37;
	bra.uni 	BB0_38;

BB0_37:
	mov.u32 	%r301, %r55;
	mov.u32 	%r302, %r64;
	bra.uni 	BB0_39;

BB0_38:
	not.b32 	%r202, %r300;
	neg.s32 	%r302, %r64;
	setp.eq.s32	%p32, %r64, 0;
	selp.u32	%r203, 1, 0, %p32;
	add.s32 	%r300, %r203, %r202;
	xor.b32  	%r301, %r55, -2147483648;

BB0_39:
	clz.b32 	%r304, %r300;
	setp.eq.s32	%p33, %r304, 0;
	shl.b32 	%r204, %r300, %r304;
	mov.u32 	%r205, 32;
	sub.s32 	%r206, %r205, %r304;
	shr.u32 	%r207, %r302, %r206;
	add.s32 	%r208, %r207, %r204;
	selp.b32	%r73, %r300, %r208, %p33;
	mov.u32 	%r209, -921707870;
	mul.hi.u32 	%r303, %r73, %r209;
	setp.eq.s32	%p34, %r55, 0;
	neg.s32 	%r210, %r65;
	selp.b32	%r305, %r65, %r210, %p34;
	setp.lt.s32	%p35, %r303, 1;
	@%p35 bra 	BB0_41;

	mul.lo.s32 	%r211, %r73, -921707870;
	shr.u32 	%r212, %r211, 31;
	shl.b32 	%r213, %r303, 1;
	add.s32 	%r303, %r212, %r213;
	add.s32 	%r304, %r304, 1;

BB0_41:
	mov.u32 	%r214, 126;
	sub.s32 	%r215, %r214, %r304;
	shl.b32 	%r216, %r215, 23;
	add.s32 	%r217, %r303, 1;
	shr.u32 	%r218, %r217, 7;
	add.s32 	%r219, %r218, 1;
	shr.u32 	%r220, %r219, 1;
	add.s32 	%r221, %r220, %r216;
	or.b32  	%r222, %r221, %r301;
	mov.b32 	 %f593, %r222;

BB0_42:
	mul.rn.f32 	%f56, %f593, %f593;
	and.b32  	%r81, %r305, 1;
	setp.eq.s32	%p36, %r81, 0;
	@%p36 bra 	BB0_44;
	bra.uni 	BB0_43;

BB0_44:
	mov.f32 	%f232, 0f3C08839E;
	mov.f32 	%f233, 0fB94CA1F9;
	fma.rn.f32 	%f594, %f233, %f56, %f232;
	bra.uni 	BB0_45;

BB0_43:
	mov.f32 	%f230, 0fBAB6061A;
	mov.f32 	%f231, 0f37CCF5CE;
	fma.rn.f32 	%f594, %f231, %f56, %f230;

BB0_45:
	@%p36 bra 	BB0_47;
	bra.uni 	BB0_46;

BB0_47:
	mov.f32 	%f237, 0fBE2AAAA3;
	fma.rn.f32 	%f238, %f594, %f56, %f237;
	mov.f32 	%f239, 0f00000000;
	fma.rn.f32 	%f595, %f238, %f56, %f239;
	bra.uni 	BB0_48;

BB0_46:
	mov.f32 	%f234, 0f3D2AAAA5;
	fma.rn.f32 	%f235, %f594, %f56, %f234;
	mov.f32 	%f236, 0fBF000000;
	fma.rn.f32 	%f595, %f235, %f56, %f236;

BB0_48:
	fma.rn.f32 	%f596, %f595, %f593, %f593;
	@%p36 bra 	BB0_50;

	mov.f32 	%f240, 0f3F800000;
	fma.rn.f32 	%f596, %f595, %f56, %f240;

BB0_50:
	and.b32  	%r223, %r305, 2;
	setp.eq.s32	%p39, %r223, 0;
	@%p39 bra 	BB0_52;

	mov.f32 	%f241, 0f00000000;
	mov.f32 	%f242, 0fBF800000;
	fma.rn.f32 	%f596, %f596, %f242, %f241;

BB0_52:
	mul.f32 	%f251, %f31, %f590;
	add.u64 	%rd59, %SP, 32;
	cvta.to.local.u64 	%rd60, %rd59;
	mul.f32 	%f252, %f251, %f251;
	mov.f32 	%f253, 0f3F800000;
	sub.f32 	%f254, %f253, %f252;
	mul.f32 	%f255, %f31, %f596;
	mul.f32 	%f256, %f255, %f255;
	sub.f32 	%f257, %f254, %f256;
	mov.f32 	%f258, 0f00000000;
	max.f32 	%f259, %f258, %f257;
	sqrt.rn.f32 	%f260, %f259;
	mul.f32 	%f261, %f13, %f255;
	mul.f32 	%f262, %f14, %f255;
	mul.f32 	%f263, %f15, %f255;
	fma.rn.f32 	%f264, %f22, %f251, %f261;
	fma.rn.f32 	%f265, %f21, %f251, %f262;
	fma.rn.f32 	%f266, %f20, %f251, %f263;
	fma.rn.f32 	%f246, %f577, %f260, %f264;
	fma.rn.f32 	%f247, %f578, %f260, %f265;
	fma.rn.f32 	%f248, %f579, %f260, %f266;
	mov.f32 	%f267, 0f7F7FFFFF;
	st.local.v4.f32 	[%rd60], {%f253, %f253, %f253, %f267};
	ld.global.u32 	%r224, [root];
	mov.u32 	%r225, 0;
	mov.f32 	%f250, 0f6C4ECB8F;
	mov.u32 	%r226, 16;
	// inline asm
	call _rt_trace_64, (%r224, %f10, %f11, %f12, %f246, %f247, %f248, %r225, %f27, %f250, %rd59, %r226);
	// inline asm
	ld.local.v4.f32 	{%f268, %f269, %f270, %f271}, [%rd60];
	setp.ltu.f32	%p40, %f271, 0f00000000;
	selp.f32	%f276, %f268, 0f00000000, %p40;
	selp.f32	%f277, %f269, 0f00000000, %p40;
	selp.f32	%f278, %f270, 0f00000000, %p40;
	add.f32 	%f585, %f585, %f276;
	add.f32 	%f584, %f584, %f277;
	add.f32 	%f583, %f583, %f278;
	add.s32 	%r284, %r284, 1;
	setp.lt.s32	%p41, %r284, %r1;
	@%p41 bra 	BB0_6;

	add.s32 	%r282, %r282, 1;
	setp.lt.s32	%p42, %r282, %r1;
	@%p42 bra 	BB0_5;

BB0_54:
	cvt.rn.f32.u32	%f279, %r4;
	cvt.rn.f32.u32	%f280, %r3;
	tex.2d.v4.f32.f32	{%f281, %f282, %f283, %f284}, [albedoTex, {%f280, %f279}];
	mul.lo.s32 	%r227, %r1, %r1;
	cvt.rn.f32.s32	%f285, %r227;
	rcp.rn.f32 	%f286, %f285;
	mul.f32 	%f287, %f585, %f286;
	mul.f32 	%f288, %f584, %f286;
	mul.f32 	%f289, %f583, %f286;
	mul.f32 	%f74, %f287, %f281;
	mul.f32 	%f75, %f288, %f282;
	mul.f32 	%f76, %f289, %f283;
	add.f32 	%f77, %f139, %f74;
	add.f32 	%f78, %f140, %f75;
	add.f32 	%f79, %f141, %f76;
	abs.f32 	%f290, %f77;
	setp.gtu.f32	%p44, %f290, 0f7F800000;
	mov.pred 	%p101, -1;
	@%p44 bra 	BB0_57;

	abs.f32 	%f291, %f78;
	setp.gtu.f32	%p46, %f291, 0f7F800000;
	@%p46 bra 	BB0_57;

	abs.f32 	%f292, %f79;
	setp.gtu.f32	%p101, %f292, 0f7F800000;

BB0_57:
	selp.f32	%f80, 0f00000000, %f77, %p101;
	selp.f32	%f81, 0f00000000, %f78, %p101;
	selp.f32	%f82, 0f00000000, %f79, %p101;
	ld.global.u32 	%r307, [imageEnabled];
	and.b32  	%r228, %r307, 1;
	setp.eq.b32	%p47, %r228, 1;
	@!%p47 bra 	BB0_92;
	bra.uni 	BB0_58;

BB0_58:
	mov.f32 	%f295, 0f3E666666;
	cvt.rzi.f32.f32	%f296, %f295;
	fma.rn.f32 	%f297, %f296, 0fC0000000, 0f3EE66666;
	abs.f32 	%f83, %f297;
	abs.f32 	%f84, %f80;
	setp.lt.f32	%p48, %f84, 0f00800000;
	mul.f32 	%f298, %f84, 0f4B800000;
	selp.f32	%f299, 0fC3170000, 0fC2FE0000, %p48;
	selp.f32	%f300, %f298, %f84, %p48;
	mov.b32 	 %r229, %f300;
	and.b32  	%r230, %r229, 8388607;
	or.b32  	%r231, %r230, 1065353216;
	mov.b32 	 %f301, %r231;
	shr.u32 	%r232, %r229, 23;
	cvt.rn.f32.u32	%f302, %r232;
	add.f32 	%f303, %f299, %f302;
	setp.gt.f32	%p49, %f301, 0f3FB504F3;
	mul.f32 	%f304, %f301, 0f3F000000;
	add.f32 	%f305, %f303, 0f3F800000;
	selp.f32	%f306, %f304, %f301, %p49;
	selp.f32	%f307, %f305, %f303, %p49;
	add.f32 	%f308, %f306, 0fBF800000;
	add.f32 	%f294, %f306, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f293,%f294;
	// inline asm
	add.f32 	%f309, %f308, %f308;
	mul.f32 	%f310, %f293, %f309;
	mul.f32 	%f311, %f310, %f310;
	mov.f32 	%f312, 0f3C4CAF63;
	mov.f32 	%f313, 0f3B18F0FE;
	fma.rn.f32 	%f314, %f313, %f311, %f312;
	mov.f32 	%f315, 0f3DAAAABD;
	fma.rn.f32 	%f316, %f314, %f311, %f315;
	mul.rn.f32 	%f317, %f316, %f311;
	mul.rn.f32 	%f318, %f317, %f310;
	sub.f32 	%f319, %f308, %f310;
	neg.f32 	%f320, %f310;
	add.f32 	%f321, %f319, %f319;
	fma.rn.f32 	%f322, %f320, %f308, %f321;
	mul.rn.f32 	%f323, %f293, %f322;
	add.f32 	%f324, %f318, %f310;
	sub.f32 	%f325, %f310, %f324;
	add.f32 	%f326, %f318, %f325;
	add.f32 	%f327, %f323, %f326;
	add.f32 	%f328, %f324, %f327;
	sub.f32 	%f329, %f324, %f328;
	add.f32 	%f330, %f327, %f329;
	mov.f32 	%f331, 0f3F317200;
	mul.rn.f32 	%f332, %f307, %f331;
	mov.f32 	%f333, 0f35BFBE8E;
	mul.rn.f32 	%f334, %f307, %f333;
	add.f32 	%f335, %f332, %f328;
	sub.f32 	%f336, %f332, %f335;
	add.f32 	%f337, %f328, %f336;
	add.f32 	%f338, %f330, %f337;
	add.f32 	%f339, %f334, %f338;
	add.f32 	%f340, %f335, %f339;
	sub.f32 	%f341, %f335, %f340;
	add.f32 	%f342, %f339, %f341;
	mov.f32 	%f343, 0f3EE66666;
	mul.rn.f32 	%f344, %f343, %f340;
	neg.f32 	%f345, %f344;
	fma.rn.f32 	%f346, %f343, %f340, %f345;
	fma.rn.f32 	%f347, %f343, %f342, %f346;
	mov.f32 	%f348, 0f00000000;
	fma.rn.f32 	%f349, %f348, %f340, %f347;
	add.rn.f32 	%f350, %f344, %f349;
	neg.f32 	%f351, %f350;
	add.rn.f32 	%f352, %f344, %f351;
	add.rn.f32 	%f353, %f352, %f349;
	mov.b32 	 %r233, %f350;
	setp.eq.s32	%p50, %r233, 1118925336;
	add.s32 	%r234, %r233, -1;
	mov.b32 	 %f354, %r234;
	add.f32 	%f355, %f353, 0f37000000;
	selp.f32	%f356, %f354, %f350, %p50;
	selp.f32	%f85, %f355, %f353, %p50;
	mul.f32 	%f357, %f356, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f358, %f357;
	mov.f32 	%f359, 0fBF317200;
	fma.rn.f32 	%f360, %f358, %f359, %f356;
	mov.f32 	%f361, 0fB5BFBE8E;
	fma.rn.f32 	%f362, %f358, %f361, %f360;
	mul.f32 	%f363, %f362, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f364, %f363;
	add.f32 	%f365, %f358, 0f00000000;
	ex2.approx.f32 	%f366, %f365;
	mul.f32 	%f367, %f364, %f366;
	setp.lt.f32	%p51, %f356, 0fC2D20000;
	selp.f32	%f368, 0f00000000, %f367, %p51;
	setp.gt.f32	%p52, %f356, 0f42D20000;
	selp.f32	%f601, 0f7F800000, %f368, %p52;
	setp.eq.f32	%p53, %f601, 0f7F800000;
	@%p53 bra 	BB0_60;

	fma.rn.f32 	%f601, %f601, %f85, %f601;

BB0_60:
	setp.lt.f32	%p54, %f80, 0f00000000;
	setp.eq.f32	%p55, %f83, 0f3F800000;
	and.pred  	%p3, %p54, %p55;
	mov.b32 	 %r235, %f601;
	xor.b32  	%r236, %r235, -2147483648;
	mov.b32 	 %f369, %r236;
	selp.f32	%f603, %f369, %f601, %p3;
	setp.eq.f32	%p56, %f80, 0f00000000;
	@%p56 bra 	BB0_63;
	bra.uni 	BB0_61;

BB0_63:
	add.f32 	%f372, %f80, %f80;
	selp.f32	%f603, %f372, 0f00000000, %p55;
	bra.uni 	BB0_64;

BB0_61:
	setp.geu.f32	%p57, %f80, 0f00000000;
	@%p57 bra 	BB0_64;

	mov.f32 	%f570, 0f3EE66666;
	cvt.rzi.f32.f32	%f371, %f570;
	setp.neu.f32	%p58, %f371, 0f3EE66666;
	selp.f32	%f603, 0f7FFFFFFF, %f603, %p58;

BB0_64:
	abs.f32 	%f547, %f80;
	add.f32 	%f373, %f547, 0f3EE66666;
	mov.b32 	 %r237, %f373;
	setp.lt.s32	%p60, %r237, 2139095040;
	@%p60 bra 	BB0_69;

	abs.f32 	%f568, %f80;
	setp.gtu.f32	%p61, %f568, 0f7F800000;
	@%p61 bra 	BB0_68;
	bra.uni 	BB0_66;

BB0_68:
	add.f32 	%f603, %f80, 0f3EE66666;
	bra.uni 	BB0_69;

BB0_66:
	abs.f32 	%f569, %f80;
	setp.neu.f32	%p62, %f569, 0f7F800000;
	@%p62 bra 	BB0_69;

	selp.f32	%f603, 0fFF800000, 0f7F800000, %p3;

BB0_69:
	mov.f32 	%f556, 0fB5BFBE8E;
	mov.f32 	%f555, 0fBF317200;
	mov.f32 	%f554, 0f00000000;
	mov.f32 	%f553, 0f35BFBE8E;
	mov.f32 	%f552, 0f3F317200;
	mov.f32 	%f551, 0f3DAAAABD;
	mov.f32 	%f550, 0f3C4CAF63;
	mov.f32 	%f549, 0f3B18F0FE;
	mov.f32 	%f548, 0f3EE66666;
	setp.eq.f32	%p63, %f80, 0f3F800000;
	selp.f32	%f96, 0f3F800000, %f603, %p63;
	abs.f32 	%f97, %f81;
	setp.lt.f32	%p64, %f97, 0f00800000;
	mul.f32 	%f376, %f97, 0f4B800000;
	selp.f32	%f377, 0fC3170000, 0fC2FE0000, %p64;
	selp.f32	%f378, %f376, %f97, %p64;
	mov.b32 	 %r238, %f378;
	and.b32  	%r239, %r238, 8388607;
	or.b32  	%r240, %r239, 1065353216;
	mov.b32 	 %f379, %r240;
	shr.u32 	%r241, %r238, 23;
	cvt.rn.f32.u32	%f380, %r241;
	add.f32 	%f381, %f377, %f380;
	setp.gt.f32	%p65, %f379, 0f3FB504F3;
	mul.f32 	%f382, %f379, 0f3F000000;
	add.f32 	%f383, %f381, 0f3F800000;
	selp.f32	%f384, %f382, %f379, %p65;
	selp.f32	%f385, %f383, %f381, %p65;
	add.f32 	%f386, %f384, 0fBF800000;
	add.f32 	%f375, %f384, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f374,%f375;
	// inline asm
	add.f32 	%f387, %f386, %f386;
	mul.f32 	%f388, %f374, %f387;
	mul.f32 	%f389, %f388, %f388;
	fma.rn.f32 	%f392, %f549, %f389, %f550;
	fma.rn.f32 	%f394, %f392, %f389, %f551;
	mul.rn.f32 	%f395, %f394, %f389;
	mul.rn.f32 	%f396, %f395, %f388;
	sub.f32 	%f397, %f386, %f388;
	neg.f32 	%f398, %f388;
	add.f32 	%f399, %f397, %f397;
	fma.rn.f32 	%f400, %f398, %f386, %f399;
	mul.rn.f32 	%f401, %f374, %f400;
	add.f32 	%f402, %f396, %f388;
	sub.f32 	%f403, %f388, %f402;
	add.f32 	%f404, %f396, %f403;
	add.f32 	%f405, %f401, %f404;
	add.f32 	%f406, %f402, %f405;
	sub.f32 	%f407, %f402, %f406;
	add.f32 	%f408, %f405, %f407;
	mul.rn.f32 	%f410, %f385, %f552;
	mul.rn.f32 	%f412, %f385, %f553;
	add.f32 	%f413, %f410, %f406;
	sub.f32 	%f414, %f410, %f413;
	add.f32 	%f415, %f406, %f414;
	add.f32 	%f416, %f408, %f415;
	add.f32 	%f417, %f412, %f416;
	add.f32 	%f418, %f413, %f417;
	sub.f32 	%f419, %f413, %f418;
	add.f32 	%f420, %f417, %f419;
	mul.rn.f32 	%f422, %f548, %f418;
	neg.f32 	%f423, %f422;
	fma.rn.f32 	%f424, %f548, %f418, %f423;
	fma.rn.f32 	%f425, %f548, %f420, %f424;
	fma.rn.f32 	%f427, %f554, %f418, %f425;
	add.rn.f32 	%f428, %f422, %f427;
	neg.f32 	%f429, %f428;
	add.rn.f32 	%f430, %f422, %f429;
	add.rn.f32 	%f431, %f430, %f427;
	mov.b32 	 %r242, %f428;
	setp.eq.s32	%p66, %r242, 1118925336;
	add.s32 	%r243, %r242, -1;
	mov.b32 	 %f432, %r243;
	add.f32 	%f433, %f431, 0f37000000;
	selp.f32	%f434, %f432, %f428, %p66;
	selp.f32	%f98, %f433, %f431, %p66;
	mul.f32 	%f435, %f434, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f436, %f435;
	fma.rn.f32 	%f438, %f436, %f555, %f434;
	fma.rn.f32 	%f440, %f436, %f556, %f438;
	mul.f32 	%f441, %f440, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f442, %f441;
	add.f32 	%f443, %f436, 0f00000000;
	ex2.approx.f32 	%f444, %f443;
	mul.f32 	%f445, %f442, %f444;
	setp.lt.f32	%p67, %f434, 0fC2D20000;
	selp.f32	%f446, 0f00000000, %f445, %p67;
	setp.gt.f32	%p68, %f434, 0f42D20000;
	selp.f32	%f604, 0f7F800000, %f446, %p68;
	setp.eq.f32	%p69, %f604, 0f7F800000;
	@%p69 bra 	BB0_71;

	fma.rn.f32 	%f604, %f604, %f98, %f604;

BB0_71:
	setp.lt.f32	%p70, %f81, 0f00000000;
	and.pred  	%p4, %p70, %p55;
	mov.b32 	 %r244, %f604;
	xor.b32  	%r245, %r244, -2147483648;
	mov.b32 	 %f447, %r245;
	selp.f32	%f606, %f447, %f604, %p4;
	setp.eq.f32	%p72, %f81, 0f00000000;
	@%p72 bra 	BB0_74;
	bra.uni 	BB0_72;

BB0_74:
	add.f32 	%f450, %f81, %f81;
	selp.f32	%f606, %f450, 0f00000000, %p55;
	bra.uni 	BB0_75;

BB0_72:
	setp.geu.f32	%p73, %f81, 0f00000000;
	@%p73 bra 	BB0_75;

	mov.f32 	%f567, 0f3EE66666;
	cvt.rzi.f32.f32	%f449, %f567;
	setp.neu.f32	%p74, %f449, 0f3EE66666;
	selp.f32	%f606, 0f7FFFFFFF, %f606, %p74;

BB0_75:
	abs.f32 	%f571, %f81;
	add.f32 	%f451, %f571, 0f3EE66666;
	mov.b32 	 %r246, %f451;
	setp.lt.s32	%p76, %r246, 2139095040;
	@%p76 bra 	BB0_80;

	abs.f32 	%f572, %f81;
	setp.gtu.f32	%p77, %f572, 0f7F800000;
	@%p77 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f606, %f81, 0f3EE66666;
	bra.uni 	BB0_80;

BB0_77:
	abs.f32 	%f573, %f81;
	setp.neu.f32	%p78, %f573, 0f7F800000;
	@%p78 bra 	BB0_80;

	selp.f32	%f606, 0fFF800000, 0f7F800000, %p4;

BB0_80:
	mov.f32 	%f565, 0fB5BFBE8E;
	mov.f32 	%f564, 0fBF317200;
	mov.f32 	%f563, 0f00000000;
	mov.f32 	%f562, 0f35BFBE8E;
	mov.f32 	%f561, 0f3F317200;
	mov.f32 	%f560, 0f3DAAAABD;
	mov.f32 	%f559, 0f3C4CAF63;
	mov.f32 	%f558, 0f3B18F0FE;
	mov.f32 	%f557, 0f3EE66666;
	setp.eq.f32	%p79, %f81, 0f3F800000;
	selp.f32	%f109, 0f3F800000, %f606, %p79;
	abs.f32 	%f110, %f82;
	setp.lt.f32	%p80, %f110, 0f00800000;
	mul.f32 	%f454, %f110, 0f4B800000;
	selp.f32	%f455, 0fC3170000, 0fC2FE0000, %p80;
	selp.f32	%f456, %f454, %f110, %p80;
	mov.b32 	 %r247, %f456;
	and.b32  	%r248, %r247, 8388607;
	or.b32  	%r249, %r248, 1065353216;
	mov.b32 	 %f457, %r249;
	shr.u32 	%r250, %r247, 23;
	cvt.rn.f32.u32	%f458, %r250;
	add.f32 	%f459, %f455, %f458;
	setp.gt.f32	%p81, %f457, 0f3FB504F3;
	mul.f32 	%f460, %f457, 0f3F000000;
	add.f32 	%f461, %f459, 0f3F800000;
	selp.f32	%f462, %f460, %f457, %p81;
	selp.f32	%f463, %f461, %f459, %p81;
	add.f32 	%f464, %f462, 0fBF800000;
	add.f32 	%f453, %f462, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f452,%f453;
	// inline asm
	add.f32 	%f465, %f464, %f464;
	mul.f32 	%f466, %f452, %f465;
	mul.f32 	%f467, %f466, %f466;
	fma.rn.f32 	%f470, %f558, %f467, %f559;
	fma.rn.f32 	%f472, %f470, %f467, %f560;
	mul.rn.f32 	%f473, %f472, %f467;
	mul.rn.f32 	%f474, %f473, %f466;
	sub.f32 	%f475, %f464, %f466;
	neg.f32 	%f476, %f466;
	add.f32 	%f477, %f475, %f475;
	fma.rn.f32 	%f478, %f476, %f464, %f477;
	mul.rn.f32 	%f479, %f452, %f478;
	add.f32 	%f480, %f474, %f466;
	sub.f32 	%f481, %f466, %f480;
	add.f32 	%f482, %f474, %f481;
	add.f32 	%f483, %f479, %f482;
	add.f32 	%f484, %f480, %f483;
	sub.f32 	%f485, %f480, %f484;
	add.f32 	%f486, %f483, %f485;
	mul.rn.f32 	%f488, %f463, %f561;
	mul.rn.f32 	%f490, %f463, %f562;
	add.f32 	%f491, %f488, %f484;
	sub.f32 	%f492, %f488, %f491;
	add.f32 	%f493, %f484, %f492;
	add.f32 	%f494, %f486, %f493;
	add.f32 	%f495, %f490, %f494;
	add.f32 	%f496, %f491, %f495;
	sub.f32 	%f497, %f491, %f496;
	add.f32 	%f498, %f495, %f497;
	mul.rn.f32 	%f500, %f557, %f496;
	neg.f32 	%f501, %f500;
	fma.rn.f32 	%f502, %f557, %f496, %f501;
	fma.rn.f32 	%f503, %f557, %f498, %f502;
	fma.rn.f32 	%f505, %f563, %f496, %f503;
	add.rn.f32 	%f506, %f500, %f505;
	neg.f32 	%f507, %f506;
	add.rn.f32 	%f508, %f500, %f507;
	add.rn.f32 	%f509, %f508, %f505;
	mov.b32 	 %r251, %f506;
	setp.eq.s32	%p82, %r251, 1118925336;
	add.s32 	%r252, %r251, -1;
	mov.b32 	 %f510, %r252;
	add.f32 	%f511, %f509, 0f37000000;
	selp.f32	%f512, %f510, %f506, %p82;
	selp.f32	%f111, %f511, %f509, %p82;
	mul.f32 	%f513, %f512, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f514, %f513;
	fma.rn.f32 	%f516, %f514, %f564, %f512;
	fma.rn.f32 	%f518, %f514, %f565, %f516;
	mul.f32 	%f519, %f518, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f520, %f519;
	add.f32 	%f521, %f514, 0f00000000;
	ex2.approx.f32 	%f522, %f521;
	mul.f32 	%f523, %f520, %f522;
	setp.lt.f32	%p83, %f512, 0fC2D20000;
	selp.f32	%f524, 0f00000000, %f523, %p83;
	setp.gt.f32	%p84, %f512, 0f42D20000;
	selp.f32	%f607, 0f7F800000, %f524, %p84;
	setp.eq.f32	%p85, %f607, 0f7F800000;
	@%p85 bra 	BB0_82;

	fma.rn.f32 	%f607, %f607, %f111, %f607;

BB0_82:
	setp.lt.f32	%p86, %f82, 0f00000000;
	and.pred  	%p5, %p86, %p55;
	mov.b32 	 %r253, %f607;
	xor.b32  	%r254, %r253, -2147483648;
	mov.b32 	 %f525, %r254;
	selp.f32	%f609, %f525, %f607, %p5;
	setp.eq.f32	%p88, %f82, 0f00000000;
	@%p88 bra 	BB0_85;
	bra.uni 	BB0_83;

BB0_85:
	add.f32 	%f528, %f82, %f82;
	selp.f32	%f609, %f528, 0f00000000, %p55;
	bra.uni 	BB0_86;

BB0_83:
	setp.geu.f32	%p89, %f82, 0f00000000;
	@%p89 bra 	BB0_86;

	mov.f32 	%f566, 0f3EE66666;
	cvt.rzi.f32.f32	%f527, %f566;
	setp.neu.f32	%p90, %f527, 0f3EE66666;
	selp.f32	%f609, 0f7FFFFFFF, %f609, %p90;

BB0_86:
	abs.f32 	%f574, %f82;
	add.f32 	%f529, %f574, 0f3EE66666;
	mov.b32 	 %r255, %f529;
	setp.lt.s32	%p92, %r255, 2139095040;
	@%p92 bra 	BB0_91;

	abs.f32 	%f575, %f82;
	setp.gtu.f32	%p93, %f575, 0f7F800000;
	@%p93 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f609, %f82, 0f3EE66666;
	bra.uni 	BB0_91;

BB0_88:
	abs.f32 	%f576, %f82;
	setp.neu.f32	%p94, %f576, 0f7F800000;
	@%p94 bra 	BB0_91;

	selp.f32	%f609, 0fFF800000, 0f7F800000, %p5;

BB0_91:
	mov.u32 	%r277, 4;
	mov.u64 	%rd104, 0;
	mov.u32 	%r276, 2;
	setp.eq.f32	%p95, %f82, 0f3F800000;
	selp.f32	%f530, 0f3F800000, %f609, %p95;
	cvt.u64.u32	%rd65, %r4;
	cvt.u64.u32	%rd64, %r3;
	mov.u64 	%rd68, image;
	cvta.global.u64 	%rd63, %rd68;
	// inline asm
	call (%rd62), _rt_buffer_get_64, (%rd63, %r276, %r277, %rd64, %rd65, %rd104, %rd104);
	// inline asm
	cvt.sat.f32.f32	%f531, %f530;
	mul.f32 	%f532, %f531, 0f437FFD71;
	cvt.rzi.u32.f32	%r258, %f532;
	cvt.sat.f32.f32	%f533, %f109;
	mul.f32 	%f534, %f533, 0f437FFD71;
	cvt.rzi.u32.f32	%r259, %f534;
	cvt.sat.f32.f32	%f535, %f96;
	mul.f32 	%f536, %f535, 0f437FFD71;
	cvt.rzi.u32.f32	%r260, %f536;
	cvt.u16.u32	%rs16, %r258;
	cvt.u16.u32	%rs17, %r260;
	cvt.u16.u32	%rs18, %r259;
	mov.u16 	%rs19, 255;
	st.v4.u8 	[%rd62], {%rs16, %rs18, %rs17, %rs19};
	ld.global.u32 	%r307, [imageEnabled];

BB0_92:
	and.b32  	%r261, %r307, 4;
	setp.eq.s32	%p96, %r261, 0;
	@%p96 bra 	BB0_94;

	mov.u32 	%r279, 8;
	mov.u64 	%rd105, 0;
	mov.u32 	%r278, 2;
	cvt.u64.u32	%rd71, %r3;
	cvt.u64.u32	%rd72, %r4;
	mov.u64 	%rd75, image_HDR;
	cvta.global.u64 	%rd70, %rd75;
	// inline asm
	call (%rd69), _rt_buffer_get_64, (%rd70, %r278, %r279, %rd71, %rd72, %rd105, %rd105);
	// inline asm
	mov.f32 	%f540, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f540;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs22, %f82;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs21, %f81;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs20, %f80;}

	// inline asm
	st.v4.u16 	[%rd69], {%rs20, %rs21, %rs22, %rs23};
	ld.global.u32 	%r307, [imageEnabled];

BB0_94:
	and.b32  	%r264, %r307, 16;
	setp.eq.s32	%p97, %r264, 0;
	@%p97 bra 	BB0_102;

	mov.u32 	%r281, 8;
	mov.u64 	%rd106, 0;
	mov.u32 	%r280, 2;
	cvt.u64.u32	%rd78, %r3;
	cvt.u64.u32	%rd79, %r4;
	mov.u64 	%rd82, image_HDR2;
	cvta.global.u64 	%rd77, %rd82;
	// inline asm
	call (%rd76), _rt_buffer_get_64, (%rd77, %r280, %r281, %rd78, %rd79, %rd106, %rd106);
	// inline asm
	mov.f32 	%f544, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f544;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f76;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f75;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs24, %f74;}

	// inline asm
	st.v4.u16 	[%rd76], {%rs24, %rs25, %rs26, %rs27};

BB0_102:
	ret;
}