//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<85>;
	.reg .b16 	%rs<56>;
	.reg .f32 	%f<476>;
	.reg .b32 	%r<279>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<82>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r50), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r51), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.f32 	%f1, [params+700];
	ld.const.u64 	%rd21, [params+400];
	cvta.to.global.u64 	%rd22, %rd21;
	ld.const.u32 	%r56, [params+392];
	mad.lo.s32 	%r57, %r56, %r51, %r50;
	mul.wide.u32 	%rd23, %r57, 4;
	add.s64 	%rd2, %rd22, %rd23;
	ld.global.v2.u8 	{%rs7, %rs55}, [%rd2];
	or.b16  	%rs9, %rs7, %rs55;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p3, %rs10, 0;
	@%p3 bra 	$L__BB0_2;

	ld.global.u8 	%rs54, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs54, [%rd2+2];
	setp.eq.s16 	%p4, %rs54, 0;
	mov.f32 	%f448, 0f00000000;
	mov.u16 	%rs55, 0;
	mov.f32 	%f449, %f448;
	mov.f32 	%f450, %f448;
	@%p4 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f102, %rs7;
	div.rn.f32 	%f103, %f102, 0f437F0000;
	fma.rn.f32 	%f104, %f103, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs55, 255;
	cvt.rn.f32.u16 	%f105, %rs13;
	div.rn.f32 	%f106, %f105, 0f437F0000;
	fma.rn.f32 	%f107, %f106, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f108, %rs54;
	div.rn.f32 	%f109, %f108, 0f437F0000;
	fma.rn.f32 	%f110, %f109, 0f40000000, 0fBF800000;
	mul.f32 	%f111, %f107, %f107;
	fma.rn.f32 	%f112, %f104, %f104, %f111;
	fma.rn.f32 	%f113, %f110, %f110, %f112;
	sqrt.rn.f32 	%f114, %f113;
	rcp.rn.f32 	%f115, %f114;
	mul.f32 	%f450, %f115, %f110;
	mul.f32 	%f449, %f115, %f107;
	mul.f32 	%f448, %f104, %f115;

$L__BB0_4:
	ld.const.v2.u32 	{%r58, %r59}, [params];
	add.s32 	%r3, %r58, %r50;
	add.s32 	%r4, %r59, %r51;
	setp.eq.f32 	%p5, %f448, 0f00000000;
	setp.eq.f32 	%p6, %f449, 0f00000000;
	and.pred  	%p7, %p5, %p6;
	setp.eq.f32 	%p8, %f450, 0f00000000;
	and.pred  	%p9, %p8, %p7;
	@%p9 bra 	$L__BB0_73;
	bra.uni 	$L__BB0_5;

$L__BB0_73:
	ld.const.u32 	%r49, [params+104];
	and.b32  	%r256, %r49, 4;
	setp.eq.s32 	%p81, %r256, 0;
	@%p81 bra 	$L__BB0_77;

	ld.const.u32 	%r257, [params+108];
	setp.eq.s32 	%p82, %r257, 0;
	ld.const.u64 	%rd66, [params+224];
	cvta.to.global.u64 	%rd67, %rd66;
	ld.const.u32 	%r258, [params+216];
	mad.lo.s32 	%r259, %r258, %r4, %r3;
	mul.wide.u32 	%rd68, %r259, 8;
	add.s64 	%rd19, %rd67, %rd68;
	@%p82 bra 	$L__BB0_76;

	ld.global.v4.u16 	{%rs42, %rs43, %rs44, %rs45}, [%rd19];
	// begin inline asm
	{  cvt.f32.f16 %f438, %rs42;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f439, %rs43;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f440, %rs44;}

	// end inline asm
	add.f32 	%f441, %f438, 0f00000000;
	add.f32 	%f442, %f439, 0f00000000;
	add.f32 	%f443, %f440, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs41, %f443;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs40, %f442;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs39, %f441;}

	// end inline asm
	mov.u16 	%rs46, 0;
	st.global.v4.u16 	[%rd19], {%rs39, %rs40, %rs41, %rs46};
	bra.uni 	$L__BB0_77;

$L__BB0_5:
	ld.const.u64 	%rd24, [params+432];
	cvta.to.global.u64 	%rd25, %rd24;
	ld.const.u32 	%r62, [params+424];
	mad.lo.s32 	%r63, %r62, %r51, %r50;
	mul.wide.u32 	%rd26, %r63, 12;
	add.s64 	%rd27, %rd25, %rd26;
	ld.global.f32 	%f120, [%rd27];
	mul.f32 	%f121, %f120, 0f3456BF95;
	ld.global.f32 	%f122, [%rd27+4];
	mul.f32 	%f123, %f122, 0f3456BF95;
	ld.global.f32 	%f124, [%rd27+8];
	mul.f32 	%f125, %f124, 0f3456BF95;
	abs.f32 	%f126, %f448;
	div.rn.f32 	%f127, %f121, %f126;
	abs.f32 	%f128, %f449;
	div.rn.f32 	%f129, %f123, %f128;
	abs.f32 	%f130, %f450;
	div.rn.f32 	%f131, %f125, %f130;
	abs.f32 	%f132, %f127;
	abs.f32 	%f133, %f129;
	abs.f32 	%f134, %f131;
	mov.f32 	%f135, 0f38D1B717;
	max.f32 	%f136, %f132, %f135;
	max.f32 	%f137, %f133, %f135;
	max.f32 	%f138, %f134, %f135;
	fma.rn.f32 	%f11, %f448, %f136, %f120;
	fma.rn.f32 	%f12, %f449, %f137, %f122;
	fma.rn.f32 	%f13, %f450, %f138, %f124;
	setp.gt.f32 	%p10, %f126, %f130;
	neg.f32 	%f139, %f449;
	selp.f32 	%f140, %f139, 0f00000000, %p10;
	mov.f32 	%f458, 0f00000000;
	neg.f32 	%f141, %f450;
	selp.f32 	%f142, %f448, %f141, %p10;
	selp.f32 	%f143, 0f00000000, %f449, %p10;
	mul.f32 	%f144, %f142, %f142;
	fma.rn.f32 	%f145, %f140, %f140, %f144;
	fma.rn.f32 	%f146, %f143, %f143, %f145;
	sqrt.rn.f32 	%f147, %f146;
	rcp.rn.f32 	%f148, %f147;
	mul.f32 	%f14, %f140, %f148;
	mul.f32 	%f15, %f142, %f148;
	mul.f32 	%f16, %f143, %f148;
	ld.const.u64 	%rd28, [params+128];
	cvta.to.global.u64 	%rd29, %rd28;
	ld.const.u32 	%r64, [params+120];
	mad.lo.s32 	%r65, %r64, %r51, %r50;
	mul.wide.u32 	%rd30, %r65, 4;
	add.s64 	%rd3, %rd29, %rd30;
	ld.const.u32 	%r5, [params+540];
	setp.lt.s32 	%p11, %r5, 1;
	mov.f32 	%f457, %f458;
	mov.f32 	%f456, %f458;
	mov.f32 	%f455, %f458;
	@%p11 bra 	$L__BB0_34;

	cvt.rn.f32.s32 	%f153, %r5;
	rcp.rn.f32 	%f17, %f153;
	ld.global.u32 	%r271, [%rd3];
	mul.f32 	%f18, %f11, 0f3456BF95;
	mul.f32 	%f19, %f12, 0f3456BF95;
	mul.f32 	%f20, %f13, 0f3456BF95;
	ld.const.u64 	%rd4, [params+96];
	mul.f32 	%f154, %f448, %f15;
	mul.f32 	%f155, %f449, %f14;
	sub.f32 	%f21, %f155, %f154;
	mul.f32 	%f156, %f450, %f14;
	mul.f32 	%f157, %f448, %f16;
	sub.f32 	%f22, %f157, %f156;
	mul.f32 	%f158, %f449, %f16;
	mul.f32 	%f159, %f450, %f15;
	sub.f32 	%f23, %f159, %f158;
	mov.u32 	%r66, 0;
	add.s64 	%rd5, %rd1, 24;
	mov.u64 	%rd31, __cudart_i2opi_f;
	abs.f32 	%f225, %f19;
	abs.f32 	%f226, %f18;
	max.f32 	%f227, %f226, %f225;
	abs.f32 	%f228, %f20;
	max.f32 	%f229, %f227, %f228;
	mov.u32 	%r268, %r66;

$L__BB0_7:
	cvt.rn.f32.s32 	%f28, %r268;
	mov.u32 	%r270, %r66;

$L__BB0_8:
	mad.lo.s32 	%r68, %r271, 1664525, 1013904223;
	and.b32  	%r69, %r68, 16777215;
	cvt.rn.f32.u32 	%f160, %r69;
	fma.rn.f32 	%f161, %f160, 0f33800000, %f28;
	mul.f32 	%f162, %f17, %f161;
	mad.lo.s32 	%r271, %r68, 1664525, 1013904223;
	and.b32  	%r70, %r271, 16777215;
	cvt.rn.f32.u32 	%f163, %r70;
	cvt.rn.f32.s32 	%f164, %r270;
	fma.rn.f32 	%f165, %f163, 0f33800000, %f164;
	mul.f32 	%f166, %f17, %f165;
	sqrt.rn.f32 	%f33, %f162;
	mul.f32 	%f34, %f166, 0f40C90FDB;
	mul.f32 	%f167, %f34, 0f3F22F983;
	cvt.rni.s32.f32 	%r278, %f167;
	cvt.rn.f32.s32 	%f168, %r278;
	mov.f32 	%f169, 0fBFC90FDA;
	fma.rn.f32 	%f170, %f168, %f169, %f34;
	mov.f32 	%f171, 0fB3A22168;
	fma.rn.f32 	%f172, %f168, %f171, %f170;
	mov.f32 	%f173, 0fA7C234C5;
	fma.rn.f32 	%f462, %f168, %f173, %f172;
	abs.f32 	%f36, %f34;
	setp.ltu.f32 	%p12, %f36, 0f47CE4780;
	mov.u32 	%r275, %r278;
	mov.f32 	%f459, %f462;
	@%p12 bra 	$L__BB0_16;

	setp.eq.f32 	%p13, %f36, 0f7F800000;
	@%p13 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f176, 0f00000000;
	mul.rn.f32 	%f459, %f34, %f176;
	mov.u32 	%r275, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r13, %f34;
	bfe.u32 	%r72, %r13, 23, 8;
	add.s32 	%r14, %r72, -128;
	shl.b32 	%r73, %r13, 8;
	or.b32  	%r15, %r73, -2147483648;
	shr.u32 	%r16, %r14, 5;
	mov.u64 	%rd79, 0;
	mov.u32 	%r272, 0;
	mov.u64 	%rd77, %rd1;
	mov.u64 	%rd78, %rd31;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r74, [%rd78];
	mad.wide.u32 	%rd33, %r74, %r15, %rd79;
	shr.u64 	%rd79, %rd33, 32;
	st.local.u32 	[%rd77], %rd33;
	add.s64 	%rd78, %rd78, 4;
	add.s64 	%rd77, %rd77, 4;
	add.s32 	%r272, %r272, 1;
	setp.ne.s32 	%p14, %r272, 6;
	@%p14 bra 	$L__BB0_11;

	st.local.u32 	[%rd5], %rd79;
	mov.u32 	%r75, 4;
	sub.s32 	%r19, %r75, %r16;
	mov.u32 	%r76, 6;
	sub.s32 	%r77, %r76, %r16;
	mul.wide.s32 	%rd34, %r77, 4;
	add.s64 	%rd35, %rd1, %rd34;
	ld.local.u32 	%r273, [%rd35];
	ld.local.u32 	%r274, [%rd35+-4];
	and.b32  	%r22, %r14, 31;
	setp.eq.s32 	%p15, %r22, 0;
	@%p15 bra 	$L__BB0_14;

	mov.u32 	%r78, 32;
	sub.s32 	%r79, %r78, %r22;
	shr.u32 	%r80, %r274, %r79;
	shl.b32 	%r81, %r273, %r22;
	add.s32 	%r273, %r80, %r81;
	mul.wide.s32 	%rd36, %r19, 4;
	add.s64 	%rd37, %rd1, %rd36;
	ld.local.u32 	%r82, [%rd37];
	shr.u32 	%r83, %r82, %r79;
	shl.b32 	%r84, %r274, %r22;
	add.s32 	%r274, %r83, %r84;

$L__BB0_14:
	and.b32  	%r85, %r13, -2147483648;
	shr.u32 	%r86, %r274, 30;
	shl.b32 	%r87, %r273, 2;
	or.b32  	%r88, %r86, %r87;
	shr.u32 	%r89, %r88, 31;
	shr.u32 	%r90, %r273, 30;
	add.s32 	%r91, %r89, %r90;
	neg.s32 	%r92, %r91;
	setp.eq.s32 	%p16, %r85, 0;
	selp.b32 	%r275, %r91, %r92, %p16;
	setp.ne.s32 	%p17, %r89, 0;
	xor.b32  	%r93, %r85, -2147483648;
	selp.b32 	%r94, %r93, %r85, %p17;
	selp.b32 	%r95, -1, 0, %p17;
	xor.b32  	%r96, %r88, %r95;
	shl.b32 	%r97, %r274, 2;
	xor.b32  	%r98, %r97, %r95;
	cvt.u64.u32 	%rd38, %r96;
	cvt.u64.u32 	%rd39, %r98;
	bfi.b64 	%rd40, %rd38, %rd39, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd40;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f174, %fd2;
	setp.eq.s32 	%p18, %r94, 0;
	neg.f32 	%f175, %f174;
	selp.f32 	%f459, %f174, %f175, %p18;

$L__BB0_16:
	add.s32 	%r29, %r275, 1;
	and.b32  	%r30, %r29, 1;
	setp.eq.s32 	%p19, %r30, 0;
	selp.f32 	%f40, %f459, 0f3F800000, %p19;
	mul.rn.f32 	%f41, %f459, %f459;
	mov.f32 	%f460, 0fB94D4153;
	@%p19 bra 	$L__BB0_18;

	mov.f32 	%f178, 0fBAB607ED;
	mov.f32 	%f179, 0f37CBAC00;
	fma.rn.f32 	%f460, %f179, %f41, %f178;

$L__BB0_18:
	selp.f32 	%f180, 0f3C0885E4, 0f3D2AAABB, %p19;
	fma.rn.f32 	%f181, %f460, %f41, %f180;
	selp.f32 	%f182, 0fBE2AAAA8, 0fBEFFFFFF, %p19;
	fma.rn.f32 	%f183, %f181, %f41, %f182;
	mov.f32 	%f184, 0f00000000;
	fma.rn.f32 	%f185, %f41, %f40, %f184;
	fma.rn.f32 	%f461, %f183, %f185, %f40;
	and.b32  	%r100, %r29, 2;
	setp.eq.s32 	%p21, %r100, 0;
	@%p21 bra 	$L__BB0_20;

	mov.f32 	%f187, 0fBF800000;
	fma.rn.f32 	%f461, %f461, %f187, %f184;

$L__BB0_20:
	@%p12 bra 	$L__BB0_28;

	setp.eq.f32 	%p23, %f36, 0f7F800000;
	@%p23 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f190, 0f00000000;
	mul.rn.f32 	%f462, %f34, %f190;
	mov.u32 	%r278, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r31, %f34;
	bfe.u32 	%r101, %r31, 23, 8;
	add.s32 	%r32, %r101, -128;
	shl.b32 	%r102, %r31, 8;
	or.b32  	%r33, %r102, -2147483648;
	shr.u32 	%r34, %r32, 5;
	mov.u64 	%rd80, 0;
	mov.u64 	%rd81, %rd80;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd43, %rd80, 2;
	mov.u64 	%rd44, __cudart_i2opi_f;
	add.s64 	%rd45, %rd44, %rd43;
	ld.global.nc.u32 	%r103, [%rd45];
	mad.wide.u32 	%rd46, %r103, %r33, %rd81;
	shr.u64 	%rd81, %rd46, 32;
	add.s64 	%rd47, %rd1, %rd43;
	st.local.u32 	[%rd47], %rd46;
	cvt.u32.u64 	%r104, %rd80;
	add.s32 	%r105, %r104, 1;
	cvt.s64.s32 	%rd80, %r105;
	setp.ne.s32 	%p24, %r105, 6;
	@%p24 bra 	$L__BB0_23;

	st.local.u32 	[%rd5], %rd81;
	mov.u32 	%r106, 4;
	sub.s32 	%r35, %r106, %r34;
	mov.u32 	%r107, 6;
	sub.s32 	%r108, %r107, %r34;
	mul.wide.s32 	%rd48, %r108, 4;
	add.s64 	%rd49, %rd1, %rd48;
	ld.local.u32 	%r276, [%rd49];
	ld.local.u32 	%r277, [%rd49+-4];
	and.b32  	%r38, %r32, 31;
	setp.eq.s32 	%p25, %r38, 0;
	@%p25 bra 	$L__BB0_26;

	mov.u32 	%r109, 32;
	sub.s32 	%r110, %r109, %r38;
	shr.u32 	%r111, %r277, %r110;
	shl.b32 	%r112, %r276, %r38;
	add.s32 	%r276, %r111, %r112;
	mul.wide.s32 	%rd50, %r35, 4;
	add.s64 	%rd51, %rd1, %rd50;
	ld.local.u32 	%r113, [%rd51];
	shr.u32 	%r114, %r113, %r110;
	shl.b32 	%r115, %r277, %r38;
	add.s32 	%r277, %r114, %r115;

$L__BB0_26:
	and.b32  	%r116, %r31, -2147483648;
	shr.u32 	%r117, %r277, 30;
	shl.b32 	%r118, %r276, 2;
	or.b32  	%r119, %r117, %r118;
	shr.u32 	%r120, %r119, 31;
	shr.u32 	%r121, %r276, 30;
	add.s32 	%r122, %r120, %r121;
	neg.s32 	%r123, %r122;
	setp.eq.s32 	%p26, %r116, 0;
	selp.b32 	%r278, %r122, %r123, %p26;
	setp.ne.s32 	%p27, %r120, 0;
	xor.b32  	%r124, %r116, -2147483648;
	selp.b32 	%r125, %r124, %r116, %p27;
	selp.b32 	%r126, -1, 0, %p27;
	xor.b32  	%r127, %r119, %r126;
	shl.b32 	%r128, %r277, 2;
	xor.b32  	%r129, %r128, %r126;
	cvt.u64.u32 	%rd52, %r127;
	cvt.u64.u32 	%rd53, %r129;
	bfi.b64 	%rd54, %rd52, %rd53, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd54;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f188, %fd4;
	setp.eq.s32 	%p28, %r125, 0;
	neg.f32 	%f189, %f188;
	selp.f32 	%f462, %f188, %f189, %p28;

$L__BB0_28:
	mul.f32 	%f50, %f33, %f461;
	and.b32  	%r45, %r278, 1;
	setp.eq.s32 	%p29, %r45, 0;
	selp.f32 	%f51, %f462, 0f3F800000, %p29;
	mul.rn.f32 	%f52, %f462, %f462;
	mov.f32 	%f463, 0fB94D4153;
	@%p29 bra 	$L__BB0_30;

	mov.f32 	%f192, 0fBAB607ED;
	mov.f32 	%f193, 0f37CBAC00;
	fma.rn.f32 	%f463, %f193, %f52, %f192;

$L__BB0_30:
	selp.f32 	%f194, 0f3C0885E4, 0f3D2AAABB, %p29;
	fma.rn.f32 	%f195, %f463, %f52, %f194;
	selp.f32 	%f196, 0fBE2AAAA8, 0fBEFFFFFF, %p29;
	fma.rn.f32 	%f197, %f195, %f52, %f196;
	mov.f32 	%f198, 0f00000000;
	fma.rn.f32 	%f199, %f52, %f51, %f198;
	fma.rn.f32 	%f464, %f197, %f199, %f51;
	and.b32  	%r131, %r278, 2;
	setp.eq.s32 	%p31, %r131, 0;
	@%p31 bra 	$L__BB0_32;

	mov.f32 	%f201, 0fBF800000;
	fma.rn.f32 	%f464, %f464, %f201, %f198;

$L__BB0_32:
	mul.f32 	%f211, %f50, %f50;
	mov.f32 	%f212, 0f3F800000;
	sub.f32 	%f213, %f212, %f211;
	mul.f32 	%f214, %f33, %f464;
	mul.f32 	%f215, %f214, %f214;
	sub.f32 	%f216, %f213, %f215;
	max.f32 	%f217, %f198, %f216;
	sqrt.rn.f32 	%f218, %f217;
	mul.f32 	%f219, %f14, %f214;
	mul.f32 	%f220, %f15, %f214;
	mul.f32 	%f221, %f16, %f214;
	fma.rn.f32 	%f222, %f23, %f50, %f219;
	fma.rn.f32 	%f223, %f22, %f50, %f220;
	fma.rn.f32 	%f224, %f21, %f50, %f221;
	fma.rn.f32 	%f205, %f448, %f218, %f222;
	fma.rn.f32 	%f206, %f449, %f218, %f223;
	fma.rn.f32 	%f207, %f450, %f218, %f224;
	mov.f32 	%f230, 0f38D1B717;
	max.f32 	%f208, %f229, %f230;
	mov.u32 	%r168, 2;
	mov.u32 	%r170, 1;
	mov.u32 	%r171, 1065353216;
	mov.u32 	%r202, 0;
	// begin inline asm
	call(%r132,%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163),_optix_trace_typed_32,(%r202,%rd4,%f11,%f12,%f13,%f205,%f206,%f207,%f208,%f1,%f198,%r170,%r202,%r170,%r168,%r170,%r170,%r171,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202,%r202);
	// end inline asm
	mov.b32 	%f231, %r132;
	add.f32 	%f455, %f455, %f231;
	fma.rn.f32 	%f458, %f205, %f231, %f458;
	fma.rn.f32 	%f457, %f206, %f231, %f457;
	fma.rn.f32 	%f456, %f207, %f231, %f456;
	add.s32 	%r270, %r270, 1;
	setp.lt.s32 	%p32, %r270, %r5;
	@%p32 bra 	$L__BB0_8;

	add.s32 	%r268, %r268, 1;
	setp.lt.s32 	%p33, %r268, %r5;
	@%p33 bra 	$L__BB0_7;

$L__BB0_34:
	mul.lo.s32 	%r203, %r5, %r5;
	cvt.rn.f32.s32 	%f232, %r203;
	div.rn.f32 	%f66, %f455, %f232;
	ld.const.f32 	%f67, [params+704];
	setp.lt.f32 	%p34, %f67, 0f00000000;
	@%p34 bra 	$L__BB0_36;
	bra.uni 	$L__BB0_35;

$L__BB0_36:
	neg.f32 	%f69, %f67;
	setp.lt.f32 	%p35, %f67, 0fBF800000;
	@%p35 bra 	$L__BB0_38;
	bra.uni 	$L__BB0_37;

$L__BB0_38:
	mul.f32 	%f238, %f67, 0fBF000000;
	cvt.rzi.f32.f32 	%f239, %f238;
	add.f32 	%f240, %f239, %f239;
	sub.f32 	%f241, %f69, %f240;
	abs.f32 	%f71, %f241;
	abs.f32 	%f72, %f66;
	setp.lt.f32 	%p36, %f72, 0f00800000;
	mul.f32 	%f242, %f72, 0f4B800000;
	selp.f32 	%f243, %f242, %f72, %p36;
	selp.f32 	%f244, 0fC3170000, 0fC2FE0000, %p36;
	mov.b32 	%r204, %f243;
	and.b32  	%r205, %r204, 8388607;
	or.b32  	%r206, %r205, 1065353216;
	mov.b32 	%f245, %r206;
	shr.u32 	%r207, %r204, 23;
	cvt.rn.f32.u32 	%f246, %r207;
	add.f32 	%f247, %f244, %f246;
	setp.gt.f32 	%p37, %f245, 0f3FB504F3;
	mul.f32 	%f248, %f245, 0f3F000000;
	add.f32 	%f249, %f247, 0f3F800000;
	selp.f32 	%f250, %f249, %f247, %p37;
	selp.f32 	%f251, %f248, %f245, %p37;
	add.f32 	%f252, %f251, 0fBF800000;
	add.f32 	%f253, %f251, 0f3F800000;
	rcp.approx.ftz.f32 	%f254, %f253;
	add.f32 	%f255, %f252, %f252;
	mul.f32 	%f256, %f255, %f254;
	mul.f32 	%f257, %f256, %f256;
	mov.f32 	%f258, 0f3C4CAF63;
	mov.f32 	%f259, 0f3B18F0FE;
	fma.rn.f32 	%f260, %f259, %f257, %f258;
	mov.f32 	%f261, 0f3DAAAABD;
	fma.rn.f32 	%f262, %f260, %f257, %f261;
	mul.rn.f32 	%f263, %f262, %f257;
	mul.rn.f32 	%f264, %f263, %f256;
	sub.f32 	%f265, %f252, %f256;
	add.f32 	%f266, %f265, %f265;
	neg.f32 	%f267, %f256;
	fma.rn.f32 	%f268, %f267, %f252, %f266;
	mul.rn.f32 	%f269, %f254, %f268;
	add.f32 	%f270, %f264, %f256;
	sub.f32 	%f271, %f256, %f270;
	add.f32 	%f272, %f264, %f271;
	add.f32 	%f273, %f269, %f272;
	add.f32 	%f274, %f270, %f273;
	sub.f32 	%f275, %f270, %f274;
	add.f32 	%f276, %f273, %f275;
	mov.f32 	%f277, 0f3F317200;
	mul.rn.f32 	%f278, %f250, %f277;
	mov.f32 	%f279, 0f35BFBE8E;
	mul.rn.f32 	%f280, %f250, %f279;
	add.f32 	%f281, %f278, %f274;
	sub.f32 	%f282, %f278, %f281;
	add.f32 	%f283, %f274, %f282;
	add.f32 	%f284, %f276, %f283;
	add.f32 	%f285, %f280, %f284;
	add.f32 	%f286, %f281, %f285;
	sub.f32 	%f287, %f281, %f286;
	add.f32 	%f288, %f285, %f287;
	abs.f32 	%f73, %f69;
	setp.gt.f32 	%p38, %f73, 0f77F684DF;
	mul.f32 	%f289, %f67, 0fB9000000;
	selp.f32 	%f290, %f289, %f69, %p38;
	mul.rn.f32 	%f291, %f290, %f286;
	neg.f32 	%f292, %f291;
	fma.rn.f32 	%f293, %f290, %f286, %f292;
	fma.rn.f32 	%f294, %f290, %f288, %f293;
	mov.f32 	%f295, 0f00000000;
	fma.rn.f32 	%f296, %f295, %f286, %f294;
	add.rn.f32 	%f297, %f291, %f296;
	neg.f32 	%f298, %f297;
	add.rn.f32 	%f299, %f291, %f298;
	add.rn.f32 	%f300, %f299, %f296;
	mov.b32 	%r208, %f297;
	setp.eq.s32 	%p39, %r208, 1118925336;
	add.s32 	%r209, %r208, -1;
	mov.b32 	%f301, %r209;
	add.f32 	%f302, %f300, 0f37000000;
	selp.f32 	%f74, %f302, %f300, %p39;
	selp.f32 	%f303, %f301, %f297, %p39;
	mov.f32 	%f304, 0f3FB8AA3B;
	mul.rn.f32 	%f305, %f303, %f304;
	cvt.rzi.f32.f32 	%f306, %f305;
	abs.f32 	%f307, %f306;
	setp.gt.f32 	%p40, %f307, 0f42FC0000;
	mov.b32 	%r210, %f306;
	and.b32  	%r211, %r210, -2147483648;
	or.b32  	%r212, %r211, 1123811328;
	mov.b32 	%f308, %r212;
	selp.f32 	%f309, %f308, %f306, %p40;
	mov.f32 	%f310, 0fBF317218;
	fma.rn.f32 	%f311, %f309, %f310, %f303;
	mov.f32 	%f312, 0f3102E308;
	fma.rn.f32 	%f313, %f309, %f312, %f311;
	mul.f32 	%f314, %f313, 0f3FB8AA3B;
	add.f32 	%f315, %f309, 0f4B40007F;
	mov.b32 	%r213, %f315;
	shl.b32 	%r214, %r213, 23;
	mov.b32 	%f316, %r214;
	ex2.approx.ftz.f32 	%f317, %f314;
	mul.f32 	%f75, %f317, %f316;
	setp.eq.f32 	%p41, %f75, 0f7F800000;
	mov.f32 	%f469, 0f7F800000;
	@%p41 bra 	$L__BB0_40;

	fma.rn.f32 	%f469, %f75, %f74, %f75;

$L__BB0_40:
	setp.lt.f32 	%p42, %f66, 0f00000000;
	setp.eq.f32 	%p43, %f71, 0f3F800000;
	and.pred  	%p1, %p42, %p43;
	setp.eq.f32 	%p44, %f66, 0f00000000;
	@%p44 bra 	$L__BB0_44;
	bra.uni 	$L__BB0_41;

$L__BB0_44:
	add.f32 	%f321, %f66, %f66;
	mov.b32 	%r217, %f321;
	selp.b32 	%r218, %r217, 0, %p43;
	or.b32  	%r219, %r218, 2139095040;
	setp.gt.f32 	%p48, %f67, 0f80000000;
	selp.b32 	%r220, %r219, %r218, %p48;
	mov.b32 	%f471, %r220;
	bra.uni 	$L__BB0_45;

$L__BB0_35:
	add.f32 	%f233, %f66, 0fBF800000;
	fma.rn.f32 	%f234, %f67, %f233, 0f3F800000;
	cvt.sat.f32.f32 	%f472, %f234;
	bra.uni 	$L__BB0_53;

$L__BB0_37:
	add.f32 	%f235, %f66, 0fBF800000;
	fma.rn.f32 	%f236, %f235, %f69, 0f3F800000;
	cvt.sat.f32.f32 	%f472, %f236;
	bra.uni 	$L__BB0_53;

$L__BB0_76:
	mov.f32 	%f446, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs49, %f446;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs48, %f446;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs47, %f446;}

	// end inline asm
	mov.u16 	%rs50, 0;
	st.global.v4.u16 	[%rd19], {%rs47, %rs48, %rs49, %rs50};

$L__BB0_77:
	and.b32  	%r260, %r49, 8;
	setp.eq.s32 	%p83, %r260, 0;
	@%p83 bra 	$L__BB0_79;

	ld.const.u64 	%rd69, [params+192];
	cvta.to.global.u64 	%rd70, %rd69;
	ld.const.u32 	%r261, [params+184];
	mad.lo.s32 	%r262, %r261, %r4, %r3;
	mov.f32 	%f447, 0f00000000;
	cvt.rzi.u32.f32 	%r263, %f447;
	mul.wide.u32 	%rd71, %r262, 2;
	add.s64 	%rd72, %rd70, %rd71;
	mov.u16 	%rs51, 0;
	cvt.u16.u32 	%rs52, %r263;
	st.global.v2.u8 	[%rd72], {%rs52, %rs51};

$L__BB0_79:
	and.b32  	%r264, %r49, 64;
	setp.eq.s32 	%p84, %r264, 0;
	@%p84 bra 	$L__BB0_81;

	ld.const.u64 	%rd73, [params+208];
	cvta.to.global.u64 	%rd74, %rd73;
	ld.const.u32 	%r265, [params+200];
	mad.lo.s32 	%r266, %r265, %r4, %r3;
	mul.wide.u32 	%rd75, %r266, 4;
	add.s64 	%rd76, %rd74, %rd75;
	mov.u16 	%rs53, 0;
	st.global.v4.u8 	[%rd76], {%rs53, %rs53, %rs53, %rs53};
	bra.uni 	$L__BB0_81;

$L__BB0_41:
	mov.b32 	%r215, %f469;
	xor.b32  	%r216, %r215, -2147483648;
	mov.b32 	%f318, %r216;
	selp.f32 	%f471, %f318, %f469, %p1;
	setp.geu.f32 	%p45, %f66, 0f00000000;
	@%p45 bra 	$L__BB0_45;

	cvt.rzi.f32.f32 	%f319, %f69;
	setp.eq.f32 	%p46, %f319, %f69;
	@%p46 bra 	$L__BB0_45;

	mov.f32 	%f471, 0f7FFFFFFF;

$L__BB0_45:
	add.f32 	%f322, %f72, %f73;
	mov.b32 	%r221, %f322;
	setp.lt.s32 	%p49, %r221, 2139095040;
	@%p49 bra 	$L__BB0_52;

	setp.gtu.f32 	%p50, %f72, 0f7F800000;
	setp.gtu.f32 	%p51, %f73, 0f7F800000;
	or.pred  	%p52, %p50, %p51;
	@%p52 bra 	$L__BB0_51;
	bra.uni 	$L__BB0_47;

$L__BB0_51:
	sub.f32 	%f471, %f66, %f67;
	bra.uni 	$L__BB0_52;

$L__BB0_47:
	setp.eq.f32 	%p53, %f73, 0f7F800000;
	@%p53 bra 	$L__BB0_50;
	bra.uni 	$L__BB0_48;

$L__BB0_50:
	setp.gt.f32 	%p56, %f72, 0f3F800000;
	selp.b32 	%r225, 2139095040, 0, %p56;
	xor.b32  	%r226, %r225, 2139095040;
	setp.gt.f32 	%p57, %f67, 0f80000000;
	selp.b32 	%r227, %r226, %r225, %p57;
	mov.b32 	%f323, %r227;
	setp.eq.f32 	%p58, %f66, 0fBF800000;
	selp.f32 	%f471, 0f3F800000, %f323, %p58;
	bra.uni 	$L__BB0_52;

$L__BB0_48:
	setp.neu.f32 	%p54, %f72, 0f7F800000;
	@%p54 bra 	$L__BB0_52;

	setp.le.f32 	%p55, %f67, 0f80000000;
	selp.b32 	%r222, 2139095040, 0, %p55;
	or.b32  	%r223, %r222, -2147483648;
	selp.b32 	%r224, %r223, %r222, %p1;
	mov.b32 	%f471, %r224;

$L__BB0_52:
	setp.eq.f32 	%p59, %f67, 0f80000000;
	setp.eq.f32 	%p60, %f66, 0f3F800000;
	or.pred  	%p61, %p59, %p60;
	selp.f32 	%f324, 0f3F800000, %f471, %p61;
	cvt.sat.f32.f32 	%f472, %f324;

$L__BB0_53:
	ld.const.u32 	%r48, [params+104];
	and.b32  	%r228, %r48, 4;
	setp.eq.s32 	%p62, %r228, 0;
	@%p62 bra 	$L__BB0_57;

	ld.const.u32 	%r229, [params+108];
	setp.eq.s32 	%p63, %r229, 0;
	ld.const.u64 	%rd56, [params+224];
	cvta.to.global.u64 	%rd57, %rd56;
	ld.const.u32 	%r230, [params+216];
	mad.lo.s32 	%r231, %r230, %r4, %r3;
	mul.wide.u32 	%rd58, %r231, 8;
	add.s64 	%rd16, %rd57, %rd58;
	@%p63 bra 	$L__BB0_56;

	ld.global.v4.u16 	{%rs22, %rs23, %rs24, %rs25}, [%rd16];
	// begin inline asm
	{  cvt.f32.f16 %f325, %rs22;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f326, %rs23;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f327, %rs24;}

	// end inline asm
	add.f32 	%f328, %f472, %f325;
	add.f32 	%f329, %f472, %f326;
	add.f32 	%f330, %f472, %f327;
	mov.f32 	%f331, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs20, %f330;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs19, %f329;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs18, %f328;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs21, %f331;}

	// end inline asm
	st.global.v4.u16 	[%rd16], {%rs18, %rs19, %rs20, %rs21};
	bra.uni 	$L__BB0_57;

$L__BB0_56:
	mov.f32 	%f335, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f335;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f472;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f472;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs26, %f472;}

	// end inline asm
	st.global.v4.u16 	[%rd16], {%rs26, %rs27, %rs28, %rs29};

$L__BB0_57:
	and.b32  	%r232, %r48, 8;
	setp.eq.s32 	%p64, %r232, 0;
	@%p64 bra 	$L__BB0_71;

	ld.const.u64 	%rd59, [params+192];
	cvta.to.global.u64 	%rd17, %rd59;
	ld.const.u32 	%r233, [params+184];
	mad.lo.s32 	%r234, %r233, %r4, %r3;
	cvt.u64.u32 	%rd18, %r234;
	mov.f32 	%f337, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f338, %f337;
	add.f32 	%f339, %f338, %f338;
	mov.f32 	%f340, 0f3EE8BA2E;
	sub.f32 	%f341, %f340, %f339;
	abs.f32 	%f87, %f341;
	abs.f32 	%f88, %f472;
	setp.lt.f32 	%p65, %f88, 0f00800000;
	mul.f32 	%f342, %f88, 0f4B800000;
	selp.f32 	%f343, %f342, %f88, %p65;
	selp.f32 	%f344, 0fC3170000, 0fC2FE0000, %p65;
	mov.b32 	%r235, %f343;
	and.b32  	%r236, %r235, 8388607;
	or.b32  	%r237, %r236, 1065353216;
	mov.b32 	%f345, %r237;
	shr.u32 	%r238, %r235, 23;
	cvt.rn.f32.u32 	%f346, %r238;
	add.f32 	%f347, %f344, %f346;
	setp.gt.f32 	%p66, %f345, 0f3FB504F3;
	mul.f32 	%f348, %f345, 0f3F000000;
	add.f32 	%f349, %f347, 0f3F800000;
	selp.f32 	%f350, %f349, %f347, %p66;
	selp.f32 	%f351, %f348, %f345, %p66;
	add.f32 	%f352, %f351, 0fBF800000;
	add.f32 	%f353, %f351, 0f3F800000;
	rcp.approx.ftz.f32 	%f354, %f353;
	add.f32 	%f355, %f352, %f352;
	mul.f32 	%f356, %f355, %f354;
	mul.f32 	%f357, %f356, %f356;
	mov.f32 	%f358, 0f3C4CAF63;
	mov.f32 	%f359, 0f3B18F0FE;
	fma.rn.f32 	%f360, %f359, %f357, %f358;
	mov.f32 	%f361, 0f3DAAAABD;
	fma.rn.f32 	%f362, %f360, %f357, %f361;
	mul.rn.f32 	%f363, %f362, %f357;
	mul.rn.f32 	%f364, %f363, %f356;
	sub.f32 	%f365, %f352, %f356;
	add.f32 	%f366, %f365, %f365;
	neg.f32 	%f367, %f356;
	fma.rn.f32 	%f368, %f367, %f352, %f366;
	mul.rn.f32 	%f369, %f354, %f368;
	add.f32 	%f370, %f364, %f356;
	sub.f32 	%f371, %f356, %f370;
	add.f32 	%f372, %f364, %f371;
	add.f32 	%f373, %f369, %f372;
	add.f32 	%f374, %f370, %f373;
	sub.f32 	%f375, %f370, %f374;
	add.f32 	%f376, %f373, %f375;
	mov.f32 	%f377, 0f3F317200;
	mul.rn.f32 	%f378, %f350, %f377;
	mov.f32 	%f379, 0f35BFBE8E;
	mul.rn.f32 	%f380, %f350, %f379;
	add.f32 	%f381, %f378, %f374;
	sub.f32 	%f382, %f378, %f381;
	add.f32 	%f383, %f374, %f382;
	add.f32 	%f384, %f376, %f383;
	add.f32 	%f385, %f380, %f384;
	add.f32 	%f386, %f381, %f385;
	sub.f32 	%f387, %f381, %f386;
	add.f32 	%f388, %f385, %f387;
	mul.rn.f32 	%f389, %f340, %f386;
	neg.f32 	%f390, %f389;
	fma.rn.f32 	%f391, %f340, %f386, %f390;
	fma.rn.f32 	%f392, %f340, %f388, %f391;
	mov.f32 	%f393, 0f00000000;
	fma.rn.f32 	%f394, %f393, %f386, %f392;
	add.rn.f32 	%f395, %f389, %f394;
	neg.f32 	%f396, %f395;
	add.rn.f32 	%f397, %f389, %f396;
	add.rn.f32 	%f398, %f397, %f394;
	mov.b32 	%r239, %f395;
	setp.eq.s32 	%p67, %r239, 1118925336;
	add.s32 	%r240, %r239, -1;
	mov.b32 	%f399, %r240;
	add.f32 	%f400, %f398, 0f37000000;
	selp.f32 	%f89, %f400, %f398, %p67;
	selp.f32 	%f401, %f399, %f395, %p67;
	mov.f32 	%f402, 0f3FB8AA3B;
	mul.rn.f32 	%f403, %f401, %f402;
	cvt.rzi.f32.f32 	%f404, %f403;
	abs.f32 	%f405, %f404;
	setp.gt.f32 	%p68, %f405, 0f42FC0000;
	mov.b32 	%r241, %f404;
	and.b32  	%r242, %r241, -2147483648;
	or.b32  	%r243, %r242, 1123811328;
	mov.b32 	%f406, %r243;
	selp.f32 	%f407, %f406, %f404, %p68;
	mov.f32 	%f408, 0fBF317218;
	fma.rn.f32 	%f409, %f407, %f408, %f401;
	mov.f32 	%f410, 0f3102E308;
	fma.rn.f32 	%f411, %f407, %f410, %f409;
	mul.f32 	%f412, %f411, 0f3FB8AA3B;
	add.f32 	%f413, %f407, 0f4B40007F;
	mov.b32 	%r244, %f413;
	shl.b32 	%r245, %r244, 23;
	mov.b32 	%f414, %r245;
	ex2.approx.ftz.f32 	%f415, %f412;
	mul.f32 	%f90, %f415, %f414;
	setp.eq.f32 	%p69, %f90, 0f7F800000;
	mov.f32 	%f473, 0f7F800000;
	@%p69 bra 	$L__BB0_60;

	fma.rn.f32 	%f473, %f90, %f89, %f90;

$L__BB0_60:
	setp.lt.f32 	%p70, %f472, 0f00000000;
	setp.eq.f32 	%p71, %f87, 0f3F800000;
	and.pred  	%p2, %p70, %p71;
	setp.eq.f32 	%p72, %f472, 0f00000000;
	@%p72 bra 	$L__BB0_64;
	bra.uni 	$L__BB0_61;

$L__BB0_64:
	add.f32 	%f420, %f472, %f472;
	selp.f32 	%f475, %f420, 0f00000000, %p71;
	bra.uni 	$L__BB0_65;

$L__BB0_61:
	mov.b32 	%r246, %f473;
	xor.b32  	%r247, %r246, -2147483648;
	mov.b32 	%f416, %r247;
	selp.f32 	%f475, %f416, %f473, %p2;
	setp.geu.f32 	%p73, %f472, 0f00000000;
	@%p73 bra 	$L__BB0_65;

	mov.f32 	%f417, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f418, %f417;
	setp.eq.f32 	%p74, %f418, 0f3EE8BA2E;
	@%p74 bra 	$L__BB0_65;

	mov.f32 	%f475, 0f7FFFFFFF;

$L__BB0_65:
	add.f32 	%f421, %f88, 0f3EE8BA2E;
	mov.b32 	%r248, %f421;
	setp.lt.s32 	%p76, %r248, 2139095040;
	@%p76 bra 	$L__BB0_70;

	setp.gtu.f32 	%p77, %f88, 0f7F800000;
	@%p77 bra 	$L__BB0_69;
	bra.uni 	$L__BB0_67;

$L__BB0_69:
	add.f32 	%f475, %f472, 0f3EE8BA2E;
	bra.uni 	$L__BB0_70;

$L__BB0_67:
	setp.neu.f32 	%p78, %f88, 0f7F800000;
	@%p78 bra 	$L__BB0_70;

	selp.f32 	%f475, 0fFF800000, 0f7F800000, %p2;

$L__BB0_70:
	mul.f32 	%f422, %f475, 0f437F0000;
	setp.eq.f32 	%p79, %f472, 0f3F800000;
	selp.f32 	%f423, 0f437F0000, %f422, %p79;
	cvt.rzi.u32.f32 	%r249, %f423;
	shl.b64 	%rd60, %rd18, 1;
	add.s64 	%rd61, %rd17, %rd60;
	cvt.u16.u32 	%rs30, %r249;
	mov.u16 	%rs31, 255;
	st.global.v2.u8 	[%rd61], {%rs30, %rs31};

$L__BB0_71:
	ld.const.u32 	%r267, [params+104];
	and.b32  	%r250, %r267, 64;
	setp.eq.s32 	%p80, %r250, 0;
	@%p80 bra 	$L__BB0_81;

	mul.f32 	%f424, %f457, %f457;
	fma.rn.f32 	%f425, %f458, %f458, %f424;
	fma.rn.f32 	%f426, %f456, %f456, %f425;
	sqrt.rn.f32 	%f427, %f426;
	rcp.rn.f32 	%f428, %f427;
	mul.f32 	%f429, %f458, %f428;
	mul.f32 	%f430, %f457, %f428;
	mul.f32 	%f431, %f456, %f428;
	ld.const.u64 	%rd62, [params+208];
	cvta.to.global.u64 	%rd63, %rd62;
	ld.const.u32 	%r251, [params+200];
	mad.lo.s32 	%r252, %r251, %r4, %r3;
	fma.rn.f32 	%f432, %f429, 0f3F000000, 0f3F000000;
	mul.f32 	%f433, %f432, 0f437F0000;
	cvt.rzi.u32.f32 	%r253, %f433;
	fma.rn.f32 	%f434, %f430, 0f3F000000, 0f3F000000;
	mul.f32 	%f435, %f434, 0f437F0000;
	cvt.rzi.u32.f32 	%r254, %f435;
	fma.rn.f32 	%f436, %f431, 0f3F000000, 0f3F000000;
	mul.f32 	%f437, %f436, 0f437F0000;
	cvt.rzi.u32.f32 	%r255, %f437;
	mul.wide.u32 	%rd64, %r252, 4;
	add.s64 	%rd65, %rd63, %rd64;
	cvt.u16.u32 	%rs32, %r255;
	cvt.u16.u32 	%rs33, %r254;
	cvt.u16.u32 	%rs34, %r253;
	mov.u16 	%rs35, 255;
	st.global.v4.u8 	[%rd65], {%rs34, %rs33, %rs32, %rs35};

$L__BB0_81:
	ret;

}