//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 ignoreNormal;
.global .align 1 .b8 localLights[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[12];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<134>;
	.reg .b16 	%rs<63>;
	.reg .f32 	%f<1333>;
	.reg .b32 	%r<207>;
	.reg .b64 	%rd<126>;


	mov.u64 	%rd125, __local_depot0;
	cvta.local.u64 	%SP, %rd125;
	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
	cvt.u64.u32	%rd10, %r30;
	cvt.u64.u32	%rd11, %r31;
	mov.u64 	%rd14, uvnormal;
	cvta.global.u64 	%rd9, %rd14;
	mov.u32 	%r28, 2;
	mov.u32 	%r29, 4;
	mov.u64 	%rd13, 0;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
	// inline asm
	ld.u32 	%r1, [%rd8];
	shr.u32 	%r34, %r1, 16;
	cvt.u16.u32	%rs1, %r34;
	and.b16  	%rs5, %rs1, 255;
	cvt.u16.u32	%rs6, %r1;
	or.b16  	%rs7, %rs6, %rs5;
	setp.eq.s16	%p8, %rs7, 0;
	mov.f32 	%f1258, 0f00000000;
	mov.f32 	%f1259, %f1258;
	mov.f32 	%f1260, %f1258;
	@%p8 bra 	BB0_2;

	ld.u8 	%rs8, [%rd8+1];
	and.b16  	%rs10, %rs6, 255;
	cvt.rn.f32.u16	%f242, %rs10;
	div.rn.f32 	%f243, %f242, 0f437F0000;
	fma.rn.f32 	%f244, %f243, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f245, %rs8;
	div.rn.f32 	%f246, %f245, 0f437F0000;
	fma.rn.f32 	%f247, %f246, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f248, %rs5;
	div.rn.f32 	%f249, %f248, 0f437F0000;
	fma.rn.f32 	%f250, %f249, 0f40000000, 0fBF800000;
	mul.f32 	%f251, %f247, %f247;
	fma.rn.f32 	%f252, %f244, %f244, %f251;
	fma.rn.f32 	%f253, %f250, %f250, %f252;
	sqrt.rn.f32 	%f254, %f253;
	rcp.rn.f32 	%f255, %f254;
	mul.f32 	%f1258, %f244, %f255;
	mul.f32 	%f1259, %f247, %f255;
	mul.f32 	%f1260, %f250, %f255;

BB0_2:
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	ld.global.v2.u32 	{%r38, %r39}, [tileInfo];
	add.s32 	%r2, %r35, %r38;
	add.s32 	%r3, %r36, %r39;
	setp.eq.f32	%p9, %f1259, 0f00000000;
	setp.eq.f32	%p10, %f1258, 0f00000000;
	and.pred  	%p11, %p10, %p9;
	setp.eq.f32	%p12, %f1260, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB0_103;
	bra.uni 	BB0_3;

BB0_103:
	ld.global.u32 	%r206, [imageEnabled];
	and.b32  	%r179, %r206, 1;
	setp.eq.b32	%p128, %r179, 1;
	@!%p128 bra 	BB0_105;
	bra.uni 	BB0_104;

BB0_104:
	cvt.u64.u32	%rd86, %r2;
	cvt.u64.u32	%rd87, %r3;
	mov.u64 	%rd90, image;
	cvta.global.u64 	%rd85, %rd90;
	// inline asm
	call (%rd84), _rt_buffer_get_64, (%rd85, %r28, %r29, %rd86, %rd87, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs43, 0;
	st.v4.u8 	[%rd84], {%rs43, %rs43, %rs43, %rs43};
	ld.global.u32 	%r206, [imageEnabled];

BB0_105:
	and.b32  	%r182, %r206, 8;
	setp.eq.s32	%p129, %r182, 0;
	@%p129 bra 	BB0_107;

	cvt.u64.u32	%rd93, %r2;
	cvt.u64.u32	%rd94, %r3;
	mov.u64 	%rd97, image_Mask;
	cvta.global.u64 	%rd92, %rd97;
	// inline asm
	call (%rd91), _rt_buffer_get_64, (%rd92, %r28, %r28, %rd93, %rd94, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1247, 0f00000000;
	cvt.rzi.u32.f32	%r185, %f1247;
	cvt.u16.u32	%rs44, %r185;
	mov.u16 	%rs45, 0;
	st.v2.u8 	[%rd91], {%rs44, %rs45};
	ld.global.u32 	%r206, [imageEnabled];

BB0_107:
	and.b32  	%r186, %r206, 4;
	setp.eq.s32	%p130, %r186, 0;
	@%p130 bra 	BB0_111;

	ld.global.u32 	%r187, [additive];
	setp.eq.s32	%p131, %r187, 0;
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	@%p131 bra 	BB0_110;

	mov.u64 	%rd110, image_HDR;
	cvta.global.u64 	%rd99, %rd110;
	mov.u32 	%r191, 8;
	// inline asm
	call (%rd98), _rt_buffer_get_64, (%rd99, %r28, %r191, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs52, %rs53, %rs54, %rs55}, [%rd98];
	// inline asm
	{  cvt.f32.f16 %f1248, %rs52;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1249, %rs53;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1250, %rs54;}

	// inline asm
	// inline asm
	call (%rd104), _rt_buffer_get_64, (%rd99, %r28, %r191, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1251, %f1248, 0f00000000;
	add.f32 	%f1252, %f1249, 0f00000000;
	add.f32 	%f1253, %f1250, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1253;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f1252;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs49, %f1251;}

	// inline asm
	mov.u16 	%rs56, 0;
	st.v4.u16 	[%rd104], {%rs49, %rs50, %rs51, %rs56};
	bra.uni 	BB0_111;

BB0_3:
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd17, %r47;
	cvt.u64.u32	%rd18, %r48;
	mov.u64 	%rd26, uvpos;
	cvta.global.u64 	%rd16, %rd26;
	mov.u32 	%r44, 12;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
	// inline asm
	ld.f32 	%f9, [%rd15+8];
	ld.f32 	%f8, [%rd15+4];
	ld.f32 	%f7, [%rd15];
	mul.f32 	%f263, %f7, 0f3456BF95;
	mul.f32 	%f264, %f8, 0f3456BF95;
	mul.f32 	%f265, %f9, 0f3456BF95;
	abs.f32 	%f266, %f1258;
	div.rn.f32 	%f267, %f263, %f266;
	abs.f32 	%f268, %f1259;
	div.rn.f32 	%f269, %f264, %f268;
	abs.f32 	%f270, %f1260;
	div.rn.f32 	%f271, %f265, %f270;
	abs.f32 	%f272, %f267;
	abs.f32 	%f273, %f269;
	abs.f32 	%f274, %f271;
	mov.f32 	%f275, 0f38D1B717;
	max.f32 	%f276, %f272, %f275;
	max.f32 	%f277, %f273, %f275;
	max.f32 	%f278, %f274, %f275;
	fma.rn.f32 	%f10, %f1258, %f276, %f7;
	fma.rn.f32 	%f11, %f1259, %f277, %f8;
	fma.rn.f32 	%f12, %f1260, %f278, %f9;
	ld.global.v2.u32 	{%r51, %r52}, [pixelID];
	cvt.rn.f32.u32	%f13, %r51;
	cvt.rn.f32.u32	%f14, %r52;
	mov.u64 	%rd27, localLights;
	cvta.global.u64 	%rd25, %rd27;
	mov.u32 	%r45, 1;
	mov.u32 	%r46, 96;
	// inline asm
	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
	// inline asm
	cvt.u32.u64	%r4, %rd21;
	setp.eq.s32	%p14, %r4, 0;
	mov.f32 	%f1261, 0f00000000;
	mov.f32 	%f22, %f1261;
	mov.f32 	%f23, %f1261;
	mov.f32 	%f24, %f1261;
	mov.f32 	%f1265, %f1261;
	mov.f32 	%f1266, %f1261;
	mov.f32 	%f1267, %f1261;
	@%p14 bra 	BB0_49;

	mov.f32 	%f286, 0f40000000;
	cvt.rzi.f32.f32	%f287, %f286;
	add.f32 	%f288, %f287, %f287;
	mov.f32 	%f289, 0f40800000;
	sub.f32 	%f290, %f289, %f288;
	abs.f32 	%f15, %f290;
	mul.f32 	%f16, %f10, 0f3456BF95;
	mul.f32 	%f17, %f11, 0f3456BF95;
	mul.f32 	%f18, %f12, 0f3456BF95;
	mul.f32 	%f19, %f13, 0f3DD32618;
	mul.f32 	%f20, %f14, 0f3DD2F1AA;
	mov.f32 	%f285, 0f00000000;
	mov.u32 	%r198, 0;
	abs.f32 	%f476, %f16;
	abs.f32 	%f477, %f17;
	max.f32 	%f478, %f476, %f477;
	abs.f32 	%f479, %f18;
	max.f32 	%f480, %f478, %f479;
	mov.f32 	%f1261, %f285;
	mov.f32 	%f22, %f285;
	mov.f32 	%f23, %f285;
	mov.f32 	%f24, %f285;
	mov.f32 	%f1265, %f285;
	mov.f32 	%f1266, %f285;
	mov.f32 	%f1267, %f285;

BB0_5:
	cvt.u64.u32	%rd30, %r198;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
	// inline asm
	ld.v4.f32 	{%f293, %f294, %f295, %f296}, [%rd28+80];
	ld.v4.f32 	{%f297, %f298, %f299, %f300}, [%rd28+64];
	ld.v4.f32 	{%f301, %f302, %f303, %f304}, [%rd28+48];
	ld.v4.f32 	{%f305, %f1276, %f1277, %f308}, [%rd28+32];
	ld.v4.f32 	{%f309, %f310, %f311, %f312}, [%rd28+16];
	ld.v4.f32 	{%f313, %f314, %f315, %f316}, [%rd28];
	mov.b32 	 %r6, %f296;
	sub.f32 	%f52, %f314, %f7;
	sub.f32 	%f54, %f315, %f8;
	sub.f32 	%f56, %f316, %f9;
	mul.f32 	%f318, %f54, %f54;
	fma.rn.f32 	%f319, %f52, %f52, %f318;
	fma.rn.f32 	%f320, %f56, %f56, %f319;
	sqrt.rn.f32 	%f57, %f320;
	rcp.rn.f32 	%f321, %f57;
	mul.f32 	%f58, %f52, %f321;
	mul.f32 	%f59, %f54, %f321;
	mul.f32 	%f60, %f56, %f321;
	mul.f32 	%f61, %f57, %f312;
	abs.f32 	%f62, %f61;
	setp.lt.f32	%p15, %f62, 0f00800000;
	mul.f32 	%f322, %f62, 0f4B800000;
	selp.f32	%f323, 0fC3170000, 0fC2FE0000, %p15;
	selp.f32	%f324, %f322, %f62, %p15;
	mov.b32 	 %r58, %f324;
	and.b32  	%r59, %r58, 8388607;
	or.b32  	%r60, %r59, 1065353216;
	mov.b32 	 %f325, %r60;
	shr.u32 	%r61, %r58, 23;
	cvt.rn.f32.u32	%f326, %r61;
	add.f32 	%f327, %f323, %f326;
	setp.gt.f32	%p16, %f325, 0f3FB504F3;
	mul.f32 	%f328, %f325, 0f3F000000;
	add.f32 	%f329, %f327, 0f3F800000;
	selp.f32	%f330, %f328, %f325, %p16;
	selp.f32	%f331, %f329, %f327, %p16;
	add.f32 	%f332, %f330, 0fBF800000;
	add.f32 	%f292, %f330, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f291,%f292;
	// inline asm
	add.f32 	%f333, %f332, %f332;
	mul.f32 	%f334, %f291, %f333;
	mul.f32 	%f335, %f334, %f334;
	mov.f32 	%f336, 0f3C4CAF63;
	mov.f32 	%f337, 0f3B18F0FE;
	fma.rn.f32 	%f338, %f337, %f335, %f336;
	mov.f32 	%f339, 0f3DAAAABD;
	fma.rn.f32 	%f340, %f338, %f335, %f339;
	mul.rn.f32 	%f341, %f340, %f335;
	mul.rn.f32 	%f342, %f341, %f334;
	sub.f32 	%f343, %f332, %f334;
	neg.f32 	%f344, %f334;
	add.f32 	%f345, %f343, %f343;
	fma.rn.f32 	%f346, %f344, %f332, %f345;
	mul.rn.f32 	%f347, %f291, %f346;
	add.f32 	%f348, %f342, %f334;
	sub.f32 	%f349, %f334, %f348;
	add.f32 	%f350, %f342, %f349;
	add.f32 	%f351, %f347, %f350;
	add.f32 	%f352, %f348, %f351;
	sub.f32 	%f353, %f348, %f352;
	add.f32 	%f354, %f351, %f353;
	mov.f32 	%f355, 0f3F317200;
	mul.rn.f32 	%f356, %f331, %f355;
	mov.f32 	%f357, 0f35BFBE8E;
	mul.rn.f32 	%f358, %f331, %f357;
	add.f32 	%f359, %f356, %f352;
	sub.f32 	%f360, %f356, %f359;
	add.f32 	%f361, %f352, %f360;
	add.f32 	%f362, %f354, %f361;
	add.f32 	%f363, %f358, %f362;
	add.f32 	%f364, %f359, %f363;
	sub.f32 	%f365, %f359, %f364;
	add.f32 	%f366, %f363, %f365;
	mul.rn.f32 	%f63, %f289, %f364;
	neg.f32 	%f368, %f63;
	fma.rn.f32 	%f369, %f289, %f364, %f368;
	fma.rn.f32 	%f370, %f289, %f366, %f369;
	fma.rn.f32 	%f64, %f285, %f364, %f370;
	add.rn.f32 	%f65, %f63, %f64;
	mov.b32 	 %r62, %f65;
	setp.eq.s32	%p1, %r62, 1118925336;
	add.s32 	%r63, %r62, -1;
	mov.b32 	 %f372, %r63;
	selp.f32	%f373, %f372, %f65, %p1;
	mul.f32 	%f374, %f373, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f375, %f374;
	mov.f32 	%f376, 0fBF317200;
	fma.rn.f32 	%f377, %f375, %f376, %f373;
	mov.f32 	%f378, 0fB5BFBE8E;
	fma.rn.f32 	%f379, %f375, %f378, %f377;
	mul.f32 	%f380, %f379, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f381, %f380;
	add.f32 	%f382, %f375, 0f00000000;
	ex2.approx.f32 	%f383, %f382;
	mul.f32 	%f384, %f381, %f383;
	setp.lt.f32	%p17, %f373, 0fC2D20000;
	selp.f32	%f385, 0f00000000, %f384, %p17;
	setp.gt.f32	%p18, %f373, 0f42D20000;
	selp.f32	%f1268, 0f7F800000, %f385, %p18;
	setp.eq.f32	%p19, %f1268, 0f7F800000;
	@%p19 bra 	BB0_7;

	neg.f32 	%f386, %f65;
	add.rn.f32 	%f387, %f63, %f386;
	add.rn.f32 	%f388, %f387, %f64;
	add.f32 	%f389, %f388, 0f37000000;
	selp.f32	%f390, %f389, %f388, %p1;
	fma.rn.f32 	%f1268, %f1268, %f390, %f1268;

BB0_7:
	setp.lt.f32	%p20, %f61, 0f00000000;
	setp.eq.f32	%p21, %f15, 0f3F800000;
	and.pred  	%p2, %p20, %p21;
	mov.b32 	 %r64, %f1268;
	xor.b32  	%r65, %r64, -2147483648;
	mov.b32 	 %f391, %r65;
	selp.f32	%f1270, %f391, %f1268, %p2;
	setp.eq.f32	%p22, %f61, 0f00000000;
	@%p22 bra 	BB0_10;
	bra.uni 	BB0_8;

BB0_10:
	add.f32 	%f394, %f61, %f61;
	selp.f32	%f1270, %f394, 0f00000000, %p21;
	bra.uni 	BB0_11;

BB0_8:
	setp.geu.f32	%p23, %f61, 0f00000000;
	@%p23 bra 	BB0_11;

	cvt.rzi.f32.f32	%f393, %f289;
	setp.neu.f32	%p24, %f393, 0f40800000;
	selp.f32	%f1270, 0f7FFFFFFF, %f1270, %p24;

BB0_11:
	add.f32 	%f395, %f62, 0f40800000;
	mov.b32 	 %r66, %f395;
	setp.lt.s32	%p26, %r66, 2139095040;
	@%p26 bra 	BB0_16;

	setp.gtu.f32	%p27, %f62, 0f7F800000;
	@%p27 bra 	BB0_15;
	bra.uni 	BB0_13;

BB0_15:
	add.f32 	%f1270, %f61, 0f40800000;
	bra.uni 	BB0_16;

BB0_13:
	setp.neu.f32	%p28, %f62, 0f7F800000;
	@%p28 bra 	BB0_16;

	selp.f32	%f1270, 0fFF800000, 0f7F800000, %p2;

BB0_16:
	mul.f32 	%f396, %f57, %f310;
	mov.f32 	%f1300, 0f3F800000;
	sub.f32 	%f398, %f1300, %f1270;
	setp.eq.f32	%p29, %f61, 0f3F800000;
	selp.f32	%f399, 0f00000000, %f398, %p29;
	cvt.sat.f32.f32	%f400, %f399;
	fma.rn.f32 	%f401, %f396, %f396, %f311;
	div.rn.f32 	%f91, %f400, %f401;
	mul.f32 	%f402, %f1259, %f59;
	fma.rn.f32 	%f403, %f1258, %f58, %f402;
	fma.rn.f32 	%f404, %f1260, %f60, %f403;
	ld.global.u32 	%r67, [ignoreNormal];
	setp.eq.s32	%p30, %r67, 0;
	selp.f32	%f405, %f404, 0f3F800000, %p30;
	cvt.sat.f32.f32	%f92, %f405;
	setp.eq.f32	%p31, %f313, 0f3F800000;
	@%p31 bra 	BB0_23;
	bra.uni 	BB0_17;

BB0_23:
	setp.leu.f32	%p35, %f308, 0f00000000;
	@%p35 bra 	BB0_19;

	setp.geu.f32	%p36, %f304, 0f00000000;
	@%p36 bra 	BB0_25;

	sub.f32 	%f1257, %f316, %f9;
	sub.f32 	%f1256, %f314, %f7;
	sub.f32 	%f1255, %f315, %f8;
	mul.f32 	%f428, %f294, %f1255;
	fma.rn.f32 	%f429, %f293, %f1256, %f428;
	fma.rn.f32 	%f430, %f295, %f1257, %f429;
	rcp.rn.f32 	%f431, %f430;
	mul.f32 	%f1271, %f1256, %f431;
	mul.f32 	%f1272, %f1255, %f431;
	mul.f32 	%f1273, %f1257, %f431;
	neg.f32 	%f304, %f304;
	bra.uni 	BB0_27;

BB0_17:
	setp.eq.f32	%p32, %f313, 0f40000000;
	@%p32 bra 	BB0_21;
	bra.uni 	BB0_18;

BB0_21:
	setp.leu.f32	%p34, %f308, 0f00000000;
	@%p34 bra 	BB0_19;

	mul.f32 	%f422, %f302, %f59;
	fma.rn.f32 	%f423, %f301, %f58, %f422;
	mul.f32 	%f424, %f298, %f59;
	fma.rn.f32 	%f425, %f297, %f58, %f424;
	mul.f32 	%f426, %f294, %f59;
	fma.rn.f32 	%f427, %f293, %f58, %f426;
	fma.rn.f32 	%f419, %f303, %f60, %f423;
	fma.rn.f32 	%f420, %f299, %f60, %f425;
	fma.rn.f32 	%f421, %f295, %f60, %f427;
	cvt.rzi.s32.f32	%r68, %f308;
	mov.u32 	%r69, 6;
	mov.u32 	%r70, 0;
	// inline asm
	call (%f415, %f416, %f417, %f418), _rt_texture_get_base_id, (%r68, %r69, %f419, %f420, %f421, %r70);
	// inline asm
	mul.f32 	%f1275, %f305, %f415;
	mul.f32 	%f1276, %f1276, %f416;
	mul.f32 	%f1277, %f1277, %f417;
	bra.uni 	BB0_28;

BB0_18:
	setp.neu.f32	%p33, %f313, 0f40800000;
	@%p33 bra 	BB0_19;

	mul.f32 	%f406, %f293, %f58;
	mul.f32 	%f407, %f294, %f59;
	neg.f32 	%f408, %f407;
	sub.f32 	%f409, %f408, %f406;
	mul.f32 	%f410, %f295, %f60;
	sub.f32 	%f411, %f409, %f410;
	fma.rn.f32 	%f412, %f308, %f411, %f304;
	cvt.sat.f32.f32	%f413, %f412;
	mul.f32 	%f414, %f413, %f413;
	mul.f32 	%f1278, %f91, %f414;
	mov.f32 	%f1275, %f305;
	bra.uni 	BB0_29;

BB0_19:
	mov.f32 	%f1275, %f305;
	bra.uni 	BB0_28;

BB0_25:
	mov.f32 	%f1271, %f58;
	mov.f32 	%f1272, %f59;
	mov.f32 	%f1273, %f60;

BB0_27:
	mul.f32 	%f440, %f295, %f60;
	mul.f32 	%f441, %f294, %f59;
	neg.f32 	%f442, %f441;
	mul.f32 	%f443, %f293, %f58;
	sub.f32 	%f444, %f442, %f443;
	sub.f32 	%f445, %f444, %f440;
	setp.gt.f32	%p37, %f445, 0f00000000;
	selp.f32	%f446, 0f3F800000, 0f00000000, %p37;
	mul.f32 	%f447, %f302, %f1272;
	fma.rn.f32 	%f448, %f301, %f1271, %f447;
	mul.f32 	%f449, %f298, %f1272;
	fma.rn.f32 	%f450, %f297, %f1271, %f449;
	fma.rn.f32 	%f451, %f303, %f1273, %f448;
	fma.rn.f32 	%f452, %f299, %f1273, %f450;
	fma.rn.f32 	%f453, %f304, %f451, 0f3F000000;
	mov.f32 	%f454, 0f3F800000;
	sub.f32 	%f436, %f454, %f453;
	fma.rn.f32 	%f437, %f304, %f452, 0f3F000000;
	cvt.rzi.s32.f32	%r71, %f308;
	mov.f32 	%f439, 0f00000000;
	// inline asm
	call (%f432, %f433, %f434, %f435), _rt_texture_get_f_id, (%r71, %r28, %f436, %f437, %f439, %f439);
	// inline asm
	mul.f32 	%f455, %f446, %f432;
	mul.f32 	%f456, %f446, %f433;
	mul.f32 	%f457, %f446, %f434;
	mul.f32 	%f1275, %f305, %f455;
	mul.f32 	%f1276, %f1276, %f456;
	mul.f32 	%f1277, %f1277, %f457;

BB0_28:
	mov.f32 	%f1278, %f91;

BB0_29:
	max.f32 	%f464, %f1275, %f1276;
	max.f32 	%f465, %f464, %f1277;
	mul.f32 	%f112, %f92, %f1278;
	mul.f32 	%f466, %f112, %f465;
	setp.lt.f32	%p39, %f466, 0f3727C5AC;
	mov.pred 	%p133, -1;
	mov.f32 	%f119, 0f00000000;
	mov.f32 	%f120, %f119;
	mov.f32 	%f121, %f119;
	mov.f32 	%f122, %f119;
	mov.f32 	%f123, %f119;
	mov.f32 	%f124, %f119;
	@%p39 bra 	BB0_31;

	mul.f32 	%f119, %f1275, %f112;
	mul.f32 	%f120, %f1276, %f112;
	mul.f32 	%f121, %f1277, %f112;
	ld.global.u8 	%rs12, [imageEnabled];
	and.b16  	%rs13, %rs12, 64;
	setp.eq.s16	%p41, %rs13, 0;
	selp.f32	%f122, 0f00000000, %f58, %p41;
	selp.f32	%f123, 0f00000000, %f59, %p41;
	selp.f32	%f124, 0f00000000, %f60, %p41;
	mov.pred 	%p133, 0;

BB0_31:
	@%p133 bra 	BB0_48;

	setp.eq.s32	%p42, %r6, 0;
	mov.u16 	%rs62, 0;
	mov.f32 	%f1301, %f1300;
	mov.f32 	%f1302, %f1300;
	@%p42 bra 	BB0_43;

	abs.s32 	%r8, %r6;
	mov.f32 	%f1297, 0f00000000;
	setp.lt.s32	%p43, %r8, 1;
	mov.f32 	%f1298, %f1297;
	mov.f32 	%f1299, %f1297;
	@%p43 bra 	BB0_42;

	max.f32 	%f126, %f480, %f275;
	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p44, %r9, 0;
	add.u64 	%rd35, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd35;
	mov.f32 	%f1297, 0f00000000;
	mov.u32 	%r202, 0;
	mov.f32 	%f1298, %f1297;
	mov.f32 	%f1299, %f1297;
	@%p44 bra 	BB0_40;

	setp.eq.s32	%p45, %r9, 1;
	mov.f32 	%f1288, 0f00000000;
	mov.u32 	%r200, 0;
	mov.f32 	%f1289, %f1288;
	mov.f32 	%f1290, %f1288;
	@%p45 bra 	BB0_39;

	setp.eq.s32	%p46, %r9, 2;
	mov.f32 	%f1285, 0f00000000;
	mov.u32 	%r199, 0;
	mov.f32 	%f1286, %f1285;
	mov.f32 	%f1287, %f1285;
	@%p46 bra 	BB0_38;

	cvt.rmi.f32.f32	%f496, %f19;
	sub.f32 	%f497, %f19, %f496;
	cvt.rmi.f32.f32	%f498, %f20;
	sub.f32 	%f499, %f20, %f498;
	add.f32 	%f500, %f499, 0f420551EC;
	add.f32 	%f501, %f497, 0f420551EC;
	mul.f32 	%f502, %f497, %f500;
	fma.rn.f32 	%f503, %f499, %f501, %f502;
	add.f32 	%f504, %f503, 0f00000000;
	add.f32 	%f505, %f497, %f504;
	add.f32 	%f506, %f499, %f504;
	add.f32 	%f507, %f505, %f506;
	mul.f32 	%f508, %f504, %f507;
	cvt.rmi.f32.f32	%f509, %f508;
	sub.f32 	%f510, %f508, %f509;
	add.f32 	%f511, %f505, %f505;
	mul.f32 	%f512, %f506, %f511;
	cvt.rmi.f32.f32	%f513, %f512;
	sub.f32 	%f514, %f512, %f513;
	mul.f32 	%f515, %f505, %f507;
	cvt.rmi.f32.f32	%f516, %f515;
	sub.f32 	%f517, %f515, %f516;
	fma.rn.f32 	%f518, %f510, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f519, %f514, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f520, %f517, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f521, %f309, %f518, %f314;
	fma.rn.f32 	%f522, %f309, %f519, %f315;
	fma.rn.f32 	%f523, %f309, %f520, %f316;
	sub.f32 	%f524, %f521, %f7;
	sub.f32 	%f525, %f522, %f8;
	sub.f32 	%f526, %f523, %f9;
	mul.f32 	%f527, %f525, %f525;
	fma.rn.f32 	%f528, %f524, %f524, %f527;
	fma.rn.f32 	%f529, %f526, %f526, %f528;
	sqrt.rn.f32 	%f495, %f529;
	rcp.rn.f32 	%f530, %f495;
	mul.f32 	%f491, %f530, %f524;
	mul.f32 	%f492, %f530, %f525;
	mul.f32 	%f493, %f530, %f526;
	ld.global.u32 	%r80, [imageEnabled];
	and.b32  	%r81, %r80, 32;
	setp.eq.s32	%p47, %r81, 0;
	selp.f32	%f531, 0f3F800000, 0f41200000, %p47;
	mul.f32 	%f494, %f531, %f126;
	mov.u32 	%r82, 1065353216;
	st.local.u32 	[%rd2+8], %r82;
	st.local.u32 	[%rd2+4], %r82;
	st.local.u32 	[%rd2], %r82;
	ld.global.u32 	%r76, [root];
	// inline asm
	call _rt_trace_64, (%r76, %f10, %f11, %f12, %f491, %f492, %f493, %r45, %f494, %f495, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f532, [%rd2];
	add.f32 	%f1287, %f532, 0f00000000;
	ld.local.f32 	%f533, [%rd2+4];
	add.f32 	%f1286, %f533, 0f00000000;
	ld.local.f32 	%f534, [%rd2+8];
	add.f32 	%f1285, %f534, 0f00000000;
	mov.u32 	%r199, %r45;

BB0_38:
	cvt.rn.f32.s32	%f543, %r199;
	add.f32 	%f544, %f13, %f543;
	sub.f32 	%f545, %f14, %f543;
	mul.f32 	%f546, %f544, 0f3DD32618;
	cvt.rmi.f32.f32	%f547, %f546;
	sub.f32 	%f548, %f546, %f547;
	mul.f32 	%f549, %f545, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f550, %f549;
	sub.f32 	%f551, %f549, %f550;
	mul.f32 	%f552, %f543, 0f3DC74539;
	cvt.rmi.f32.f32	%f553, %f552;
	sub.f32 	%f554, %f552, %f553;
	add.f32 	%f555, %f551, 0f420551EC;
	add.f32 	%f556, %f548, 0f420551EC;
	add.f32 	%f557, %f554, 0f420551EC;
	mul.f32 	%f558, %f548, %f555;
	fma.rn.f32 	%f559, %f551, %f556, %f558;
	fma.rn.f32 	%f560, %f554, %f557, %f559;
	add.f32 	%f561, %f548, %f560;
	add.f32 	%f562, %f551, %f560;
	add.f32 	%f563, %f554, %f560;
	add.f32 	%f564, %f561, %f562;
	mul.f32 	%f565, %f563, %f564;
	cvt.rmi.f32.f32	%f566, %f565;
	sub.f32 	%f567, %f565, %f566;
	add.f32 	%f568, %f561, %f561;
	mul.f32 	%f569, %f562, %f568;
	cvt.rmi.f32.f32	%f570, %f569;
	sub.f32 	%f571, %f569, %f570;
	mul.f32 	%f572, %f561, %f564;
	cvt.rmi.f32.f32	%f573, %f572;
	sub.f32 	%f574, %f572, %f573;
	fma.rn.f32 	%f575, %f567, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f576, %f571, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f577, %f574, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f578, %f309, %f575, %f314;
	fma.rn.f32 	%f579, %f309, %f576, %f315;
	fma.rn.f32 	%f580, %f309, %f577, %f316;
	sub.f32 	%f581, %f578, %f7;
	sub.f32 	%f582, %f579, %f8;
	sub.f32 	%f583, %f580, %f9;
	mul.f32 	%f584, %f582, %f582;
	fma.rn.f32 	%f585, %f581, %f581, %f584;
	fma.rn.f32 	%f586, %f583, %f583, %f585;
	sqrt.rn.f32 	%f542, %f586;
	rcp.rn.f32 	%f587, %f542;
	mul.f32 	%f538, %f587, %f581;
	mul.f32 	%f539, %f587, %f582;
	mul.f32 	%f540, %f587, %f583;
	ld.global.u32 	%r86, [imageEnabled];
	and.b32  	%r87, %r86, 32;
	setp.eq.s32	%p48, %r87, 0;
	selp.f32	%f588, 0f3F800000, 0f41200000, %p48;
	mul.f32 	%f541, %f588, %f126;
	mov.u32 	%r88, 1065353216;
	st.local.u32 	[%rd2+8], %r88;
	st.local.u32 	[%rd2+4], %r88;
	st.local.u32 	[%rd2], %r88;
	ld.global.u32 	%r83, [root];
	// inline asm
	call _rt_trace_64, (%r83, %f10, %f11, %f12, %f538, %f539, %f540, %r45, %f541, %f542, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f589, [%rd2];
	add.f32 	%f1290, %f1287, %f589;
	ld.local.f32 	%f590, [%rd2+4];
	add.f32 	%f1289, %f1286, %f590;
	ld.local.f32 	%f591, [%rd2+8];
	add.f32 	%f1288, %f1285, %f591;
	add.s32 	%r200, %r199, 1;

BB0_39:
	cvt.rn.f32.s32	%f600, %r200;
	add.f32 	%f601, %f13, %f600;
	sub.f32 	%f602, %f14, %f600;
	mul.f32 	%f603, %f601, 0f3DD32618;
	cvt.rmi.f32.f32	%f604, %f603;
	sub.f32 	%f605, %f603, %f604;
	mul.f32 	%f606, %f602, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f607, %f606;
	sub.f32 	%f608, %f606, %f607;
	mul.f32 	%f609, %f600, 0f3DC74539;
	cvt.rmi.f32.f32	%f610, %f609;
	sub.f32 	%f611, %f609, %f610;
	add.f32 	%f612, %f608, 0f420551EC;
	add.f32 	%f613, %f605, 0f420551EC;
	add.f32 	%f614, %f611, 0f420551EC;
	mul.f32 	%f615, %f605, %f612;
	fma.rn.f32 	%f616, %f608, %f613, %f615;
	fma.rn.f32 	%f617, %f611, %f614, %f616;
	add.f32 	%f618, %f605, %f617;
	add.f32 	%f619, %f608, %f617;
	add.f32 	%f620, %f611, %f617;
	add.f32 	%f621, %f618, %f619;
	mul.f32 	%f622, %f620, %f621;
	cvt.rmi.f32.f32	%f623, %f622;
	sub.f32 	%f624, %f622, %f623;
	add.f32 	%f625, %f618, %f618;
	mul.f32 	%f626, %f619, %f625;
	cvt.rmi.f32.f32	%f627, %f626;
	sub.f32 	%f628, %f626, %f627;
	mul.f32 	%f629, %f618, %f621;
	cvt.rmi.f32.f32	%f630, %f629;
	sub.f32 	%f631, %f629, %f630;
	fma.rn.f32 	%f632, %f624, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f633, %f628, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f634, %f631, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f635, %f309, %f632, %f314;
	fma.rn.f32 	%f636, %f309, %f633, %f315;
	fma.rn.f32 	%f637, %f309, %f634, %f316;
	sub.f32 	%f638, %f635, %f7;
	sub.f32 	%f639, %f636, %f8;
	sub.f32 	%f640, %f637, %f9;
	mul.f32 	%f641, %f639, %f639;
	fma.rn.f32 	%f642, %f638, %f638, %f641;
	fma.rn.f32 	%f643, %f640, %f640, %f642;
	sqrt.rn.f32 	%f599, %f643;
	rcp.rn.f32 	%f644, %f599;
	mul.f32 	%f595, %f644, %f638;
	mul.f32 	%f596, %f644, %f639;
	mul.f32 	%f597, %f644, %f640;
	ld.global.u32 	%r92, [imageEnabled];
	and.b32  	%r93, %r92, 32;
	setp.eq.s32	%p49, %r93, 0;
	selp.f32	%f645, 0f3F800000, 0f41200000, %p49;
	mul.f32 	%f598, %f645, %f126;
	mov.u32 	%r94, 1065353216;
	st.local.u32 	[%rd2+8], %r94;
	st.local.u32 	[%rd2+4], %r94;
	st.local.u32 	[%rd2], %r94;
	ld.global.u32 	%r89, [root];
	mov.u32 	%r90, 1;
	// inline asm
	call _rt_trace_64, (%r89, %f10, %f11, %f12, %f595, %f596, %f597, %r90, %f598, %f599, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f646, [%rd2];
	add.f32 	%f1299, %f1290, %f646;
	ld.local.f32 	%f647, [%rd2+4];
	add.f32 	%f1298, %f1289, %f647;
	ld.local.f32 	%f648, [%rd2+8];
	add.f32 	%f1297, %f1288, %f648;
	add.s32 	%r202, %r200, 1;

BB0_40:
	setp.lt.u32	%p50, %r8, 4;
	@%p50 bra 	BB0_42;

BB0_41:
	cvt.rn.f32.s32	%f681, %r202;
	add.f32 	%f682, %f13, %f681;
	sub.f32 	%f683, %f14, %f681;
	mul.f32 	%f684, %f682, 0f3DD32618;
	cvt.rmi.f32.f32	%f685, %f684;
	sub.f32 	%f686, %f684, %f685;
	mul.f32 	%f687, %f683, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f688, %f687;
	sub.f32 	%f689, %f687, %f688;
	mul.f32 	%f690, %f681, 0f3DC74539;
	cvt.rmi.f32.f32	%f691, %f690;
	sub.f32 	%f692, %f690, %f691;
	add.f32 	%f693, %f689, 0f420551EC;
	add.f32 	%f694, %f686, 0f420551EC;
	add.f32 	%f695, %f692, 0f420551EC;
	mul.f32 	%f696, %f686, %f693;
	fma.rn.f32 	%f697, %f689, %f694, %f696;
	fma.rn.f32 	%f698, %f692, %f695, %f697;
	add.f32 	%f699, %f686, %f698;
	add.f32 	%f700, %f689, %f698;
	add.f32 	%f701, %f692, %f698;
	add.f32 	%f702, %f699, %f700;
	mul.f32 	%f703, %f701, %f702;
	cvt.rmi.f32.f32	%f704, %f703;
	sub.f32 	%f705, %f703, %f704;
	add.f32 	%f706, %f699, %f699;
	mul.f32 	%f707, %f700, %f706;
	cvt.rmi.f32.f32	%f708, %f707;
	sub.f32 	%f709, %f707, %f708;
	mul.f32 	%f710, %f699, %f702;
	cvt.rmi.f32.f32	%f711, %f710;
	sub.f32 	%f712, %f710, %f711;
	fma.rn.f32 	%f713, %f705, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f714, %f709, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f715, %f712, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f716, %f309, %f713, %f314;
	fma.rn.f32 	%f717, %f309, %f714, %f315;
	fma.rn.f32 	%f718, %f309, %f715, %f316;
	sub.f32 	%f719, %f716, %f7;
	sub.f32 	%f720, %f717, %f8;
	sub.f32 	%f721, %f718, %f9;
	mul.f32 	%f722, %f720, %f720;
	fma.rn.f32 	%f723, %f719, %f719, %f722;
	fma.rn.f32 	%f724, %f721, %f721, %f723;
	sqrt.rn.f32 	%f656, %f724;
	rcp.rn.f32 	%f725, %f656;
	mul.f32 	%f652, %f725, %f719;
	mul.f32 	%f653, %f725, %f720;
	mul.f32 	%f654, %f725, %f721;
	ld.global.u32 	%r107, [imageEnabled];
	and.b32  	%r108, %r107, 32;
	setp.eq.s32	%p51, %r108, 0;
	selp.f32	%f726, 0f3F800000, 0f41200000, %p51;
	mul.f32 	%f655, %f726, %f126;
	mov.u32 	%r109, 1065353216;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r95, [root];
	mov.u32 	%r105, 1;
	// inline asm
	call _rt_trace_64, (%r95, %f10, %f11, %f12, %f652, %f653, %f654, %r105, %f655, %f656, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f727, [%rd2];
	add.f32 	%f728, %f1299, %f727;
	ld.local.f32 	%f729, [%rd2+4];
	add.f32 	%f730, %f1298, %f729;
	ld.local.f32 	%f731, [%rd2+8];
	add.f32 	%f732, %f1297, %f731;
	add.s32 	%r110, %r202, 1;
	cvt.rn.f32.s32	%f733, %r110;
	add.f32 	%f734, %f13, %f733;
	sub.f32 	%f735, %f14, %f733;
	mul.f32 	%f736, %f734, 0f3DD32618;
	cvt.rmi.f32.f32	%f737, %f736;
	sub.f32 	%f738, %f736, %f737;
	mul.f32 	%f739, %f735, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f740, %f739;
	sub.f32 	%f741, %f739, %f740;
	mul.f32 	%f742, %f733, 0f3DC74539;
	cvt.rmi.f32.f32	%f743, %f742;
	sub.f32 	%f744, %f742, %f743;
	add.f32 	%f745, %f741, 0f420551EC;
	add.f32 	%f746, %f738, 0f420551EC;
	add.f32 	%f747, %f744, 0f420551EC;
	mul.f32 	%f748, %f738, %f745;
	fma.rn.f32 	%f749, %f741, %f746, %f748;
	fma.rn.f32 	%f750, %f744, %f747, %f749;
	add.f32 	%f751, %f738, %f750;
	add.f32 	%f752, %f741, %f750;
	add.f32 	%f753, %f744, %f750;
	add.f32 	%f754, %f751, %f752;
	mul.f32 	%f755, %f753, %f754;
	cvt.rmi.f32.f32	%f756, %f755;
	sub.f32 	%f757, %f755, %f756;
	add.f32 	%f758, %f751, %f751;
	mul.f32 	%f759, %f752, %f758;
	cvt.rmi.f32.f32	%f760, %f759;
	sub.f32 	%f761, %f759, %f760;
	mul.f32 	%f762, %f751, %f754;
	cvt.rmi.f32.f32	%f763, %f762;
	sub.f32 	%f764, %f762, %f763;
	fma.rn.f32 	%f765, %f757, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f766, %f761, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f767, %f764, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f768, %f309, %f765, %f314;
	fma.rn.f32 	%f769, %f309, %f766, %f315;
	fma.rn.f32 	%f770, %f309, %f767, %f316;
	sub.f32 	%f771, %f768, %f7;
	sub.f32 	%f772, %f769, %f8;
	sub.f32 	%f773, %f770, %f9;
	mul.f32 	%f774, %f772, %f772;
	fma.rn.f32 	%f775, %f771, %f771, %f774;
	fma.rn.f32 	%f776, %f773, %f773, %f775;
	sqrt.rn.f32 	%f664, %f776;
	rcp.rn.f32 	%f777, %f664;
	mul.f32 	%f660, %f777, %f771;
	mul.f32 	%f661, %f777, %f772;
	mul.f32 	%f662, %f777, %f773;
	ld.global.u32 	%r111, [imageEnabled];
	and.b32  	%r112, %r111, 32;
	setp.eq.s32	%p52, %r112, 0;
	selp.f32	%f778, 0f3F800000, 0f41200000, %p52;
	mul.f32 	%f663, %f778, %f126;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r98, [root];
	// inline asm
	call _rt_trace_64, (%r98, %f10, %f11, %f12, %f660, %f661, %f662, %r105, %f663, %f664, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f779, [%rd2];
	add.f32 	%f780, %f728, %f779;
	ld.local.f32 	%f781, [%rd2+4];
	add.f32 	%f782, %f730, %f781;
	ld.local.f32 	%f783, [%rd2+8];
	add.f32 	%f784, %f732, %f783;
	add.s32 	%r113, %r202, 2;
	cvt.rn.f32.s32	%f785, %r113;
	add.f32 	%f786, %f13, %f785;
	sub.f32 	%f787, %f14, %f785;
	mul.f32 	%f788, %f786, 0f3DD32618;
	cvt.rmi.f32.f32	%f789, %f788;
	sub.f32 	%f790, %f788, %f789;
	mul.f32 	%f791, %f787, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f792, %f791;
	sub.f32 	%f793, %f791, %f792;
	mul.f32 	%f794, %f785, 0f3DC74539;
	cvt.rmi.f32.f32	%f795, %f794;
	sub.f32 	%f796, %f794, %f795;
	add.f32 	%f797, %f793, 0f420551EC;
	add.f32 	%f798, %f790, 0f420551EC;
	add.f32 	%f799, %f796, 0f420551EC;
	mul.f32 	%f800, %f790, %f797;
	fma.rn.f32 	%f801, %f793, %f798, %f800;
	fma.rn.f32 	%f802, %f796, %f799, %f801;
	add.f32 	%f803, %f790, %f802;
	add.f32 	%f804, %f793, %f802;
	add.f32 	%f805, %f796, %f802;
	add.f32 	%f806, %f803, %f804;
	mul.f32 	%f807, %f805, %f806;
	cvt.rmi.f32.f32	%f808, %f807;
	sub.f32 	%f809, %f807, %f808;
	add.f32 	%f810, %f803, %f803;
	mul.f32 	%f811, %f804, %f810;
	cvt.rmi.f32.f32	%f812, %f811;
	sub.f32 	%f813, %f811, %f812;
	mul.f32 	%f814, %f803, %f806;
	cvt.rmi.f32.f32	%f815, %f814;
	sub.f32 	%f816, %f814, %f815;
	fma.rn.f32 	%f817, %f809, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f818, %f813, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f819, %f816, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f820, %f309, %f817, %f314;
	fma.rn.f32 	%f821, %f309, %f818, %f315;
	fma.rn.f32 	%f822, %f309, %f819, %f316;
	sub.f32 	%f823, %f820, %f7;
	sub.f32 	%f824, %f821, %f8;
	sub.f32 	%f825, %f822, %f9;
	mul.f32 	%f826, %f824, %f824;
	fma.rn.f32 	%f827, %f823, %f823, %f826;
	fma.rn.f32 	%f828, %f825, %f825, %f827;
	sqrt.rn.f32 	%f672, %f828;
	rcp.rn.f32 	%f829, %f672;
	mul.f32 	%f668, %f829, %f823;
	mul.f32 	%f669, %f829, %f824;
	mul.f32 	%f670, %f829, %f825;
	ld.global.u32 	%r114, [imageEnabled];
	and.b32  	%r115, %r114, 32;
	setp.eq.s32	%p53, %r115, 0;
	selp.f32	%f830, 0f3F800000, 0f41200000, %p53;
	mul.f32 	%f671, %f830, %f126;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r101, [root];
	// inline asm
	call _rt_trace_64, (%r101, %f10, %f11, %f12, %f668, %f669, %f670, %r105, %f671, %f672, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f831, [%rd2];
	add.f32 	%f832, %f780, %f831;
	ld.local.f32 	%f833, [%rd2+4];
	add.f32 	%f834, %f782, %f833;
	ld.local.f32 	%f835, [%rd2+8];
	add.f32 	%f836, %f784, %f835;
	add.s32 	%r116, %r202, 3;
	cvt.rn.f32.s32	%f837, %r116;
	add.f32 	%f838, %f13, %f837;
	sub.f32 	%f839, %f14, %f837;
	mul.f32 	%f840, %f838, 0f3DD32618;
	cvt.rmi.f32.f32	%f841, %f840;
	sub.f32 	%f842, %f840, %f841;
	mul.f32 	%f843, %f839, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f844, %f843;
	sub.f32 	%f845, %f843, %f844;
	mul.f32 	%f846, %f837, 0f3DC74539;
	cvt.rmi.f32.f32	%f847, %f846;
	sub.f32 	%f848, %f846, %f847;
	add.f32 	%f849, %f845, 0f420551EC;
	add.f32 	%f850, %f842, 0f420551EC;
	add.f32 	%f851, %f848, 0f420551EC;
	mul.f32 	%f852, %f842, %f849;
	fma.rn.f32 	%f853, %f845, %f850, %f852;
	fma.rn.f32 	%f854, %f848, %f851, %f853;
	add.f32 	%f855, %f842, %f854;
	add.f32 	%f856, %f845, %f854;
	add.f32 	%f857, %f848, %f854;
	add.f32 	%f858, %f855, %f856;
	mul.f32 	%f859, %f857, %f858;
	cvt.rmi.f32.f32	%f860, %f859;
	sub.f32 	%f861, %f859, %f860;
	add.f32 	%f862, %f855, %f855;
	mul.f32 	%f863, %f856, %f862;
	cvt.rmi.f32.f32	%f864, %f863;
	sub.f32 	%f865, %f863, %f864;
	mul.f32 	%f866, %f855, %f858;
	cvt.rmi.f32.f32	%f867, %f866;
	sub.f32 	%f868, %f866, %f867;
	fma.rn.f32 	%f869, %f861, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f870, %f865, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f871, %f868, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f872, %f309, %f869, %f314;
	fma.rn.f32 	%f873, %f309, %f870, %f315;
	fma.rn.f32 	%f874, %f309, %f871, %f316;
	sub.f32 	%f875, %f872, %f7;
	sub.f32 	%f876, %f873, %f8;
	sub.f32 	%f877, %f874, %f9;
	mul.f32 	%f878, %f876, %f876;
	fma.rn.f32 	%f879, %f875, %f875, %f878;
	fma.rn.f32 	%f880, %f877, %f877, %f879;
	sqrt.rn.f32 	%f680, %f880;
	rcp.rn.f32 	%f881, %f680;
	mul.f32 	%f676, %f881, %f875;
	mul.f32 	%f677, %f881, %f876;
	mul.f32 	%f678, %f881, %f877;
	ld.global.u32 	%r117, [imageEnabled];
	and.b32  	%r118, %r117, 32;
	setp.eq.s32	%p54, %r118, 0;
	selp.f32	%f882, 0f3F800000, 0f41200000, %p54;
	mul.f32 	%f679, %f882, %f126;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r104, [root];
	// inline asm
	call _rt_trace_64, (%r104, %f10, %f11, %f12, %f676, %f677, %f678, %r105, %f679, %f680, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f883, [%rd2];
	add.f32 	%f1299, %f832, %f883;
	ld.local.f32 	%f884, [%rd2+4];
	add.f32 	%f1298, %f834, %f884;
	ld.local.f32 	%f885, [%rd2+8];
	add.f32 	%f1297, %f836, %f885;
	add.s32 	%r202, %r202, 4;
	setp.lt.s32	%p55, %r202, %r8;
	@%p55 bra 	BB0_41;

BB0_42:
	cvt.rn.f32.s32	%f886, %r8;
	rcp.rn.f32 	%f887, %f886;
	mul.f32 	%f1300, %f1299, %f887;
	mul.f32 	%f1301, %f1298, %f887;
	mul.f32 	%f1302, %f1297, %f887;
	shr.u32 	%r119, %r6, 31;
	cvt.u16.u32	%rs62, %r119;

BB0_43:
	fma.rn.f32 	%f1267, %f119, %f1300, %f1267;
	fma.rn.f32 	%f1266, %f120, %f1301, %f1266;
	fma.rn.f32 	%f1265, %f121, %f1302, %f1265;
	ld.global.u8 	%rs15, [imageEnabled];
	and.b16  	%rs16, %rs15, 64;
	setp.eq.s16	%p56, %rs16, 0;
	@%p56 bra 	BB0_45;

	mul.f32 	%f888, %f120, 0f3F372474;
	fma.rn.f32 	%f889, %f119, 0f3E59999A, %f888;
	fma.rn.f32 	%f890, %f121, 0f3D93A92A, %f889;
	fma.rn.f32 	%f24, %f122, %f890, %f24;
	fma.rn.f32 	%f23, %f123, %f890, %f23;
	fma.rn.f32 	%f22, %f890, %f124, %f22;

BB0_45:
	setp.eq.s16	%p57, %rs62, 0;
	@%p57 bra 	BB0_47;

	div.rn.f32 	%f891, %f119, %f305;
	div.rn.f32 	%f892, %f891, %f91;
	cvt.sat.f32.f32	%f893, %f892;
	mul.f32 	%f1300, %f1300, %f893;

BB0_47:
	add.f32 	%f1261, %f1261, %f1300;

BB0_48:
	add.s32 	%r198, %r198, 1;
	setp.lt.u32	%p58, %r198, %r4;
	@%p58 bra 	BB0_5;

BB0_49:
	ld.global.u32 	%r204, [imageEnabled];
	and.b32  	%r120, %r204, 8;
	setp.eq.s32	%p59, %r120, 0;
	@%p59 bra 	BB0_62;

	cvt.sat.f32.f32	%f186, %f1261;
	cvt.u64.u32	%rd46, %r3;
	cvt.u64.u32	%rd45, %r2;
	mov.u64 	%rd49, image_Mask;
	cvta.global.u64 	%rd44, %rd49;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
	// inline asm
	mov.f32 	%f896, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f897, %f896;
	fma.rn.f32 	%f898, %f897, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f187, %f898;
	abs.f32 	%f188, %f186;
	setp.lt.f32	%p60, %f188, 0f00800000;
	mul.f32 	%f899, %f188, 0f4B800000;
	selp.f32	%f900, 0fC3170000, 0fC2FE0000, %p60;
	selp.f32	%f901, %f899, %f188, %p60;
	mov.b32 	 %r123, %f901;
	and.b32  	%r124, %r123, 8388607;
	or.b32  	%r125, %r124, 1065353216;
	mov.b32 	 %f902, %r125;
	shr.u32 	%r126, %r123, 23;
	cvt.rn.f32.u32	%f903, %r126;
	add.f32 	%f904, %f900, %f903;
	setp.gt.f32	%p61, %f902, 0f3FB504F3;
	mul.f32 	%f905, %f902, 0f3F000000;
	add.f32 	%f906, %f904, 0f3F800000;
	selp.f32	%f907, %f905, %f902, %p61;
	selp.f32	%f908, %f906, %f904, %p61;
	add.f32 	%f909, %f907, 0fBF800000;
	add.f32 	%f895, %f907, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f894,%f895;
	// inline asm
	add.f32 	%f910, %f909, %f909;
	mul.f32 	%f911, %f894, %f910;
	mul.f32 	%f912, %f911, %f911;
	mov.f32 	%f913, 0f3C4CAF63;
	mov.f32 	%f914, 0f3B18F0FE;
	fma.rn.f32 	%f915, %f914, %f912, %f913;
	mov.f32 	%f916, 0f3DAAAABD;
	fma.rn.f32 	%f917, %f915, %f912, %f916;
	mul.rn.f32 	%f918, %f917, %f912;
	mul.rn.f32 	%f919, %f918, %f911;
	sub.f32 	%f920, %f909, %f911;
	neg.f32 	%f921, %f911;
	add.f32 	%f922, %f920, %f920;
	fma.rn.f32 	%f923, %f921, %f909, %f922;
	mul.rn.f32 	%f924, %f894, %f923;
	add.f32 	%f925, %f919, %f911;
	sub.f32 	%f926, %f911, %f925;
	add.f32 	%f927, %f919, %f926;
	add.f32 	%f928, %f924, %f927;
	add.f32 	%f929, %f925, %f928;
	sub.f32 	%f930, %f925, %f929;
	add.f32 	%f931, %f928, %f930;
	mov.f32 	%f932, 0f3F317200;
	mul.rn.f32 	%f933, %f908, %f932;
	mov.f32 	%f934, 0f35BFBE8E;
	mul.rn.f32 	%f935, %f908, %f934;
	add.f32 	%f936, %f933, %f929;
	sub.f32 	%f937, %f933, %f936;
	add.f32 	%f938, %f929, %f937;
	add.f32 	%f939, %f931, %f938;
	add.f32 	%f940, %f935, %f939;
	add.f32 	%f941, %f936, %f940;
	sub.f32 	%f942, %f936, %f941;
	add.f32 	%f943, %f940, %f942;
	mov.f32 	%f944, 0f3EE8BA2E;
	mul.rn.f32 	%f945, %f944, %f941;
	neg.f32 	%f946, %f945;
	fma.rn.f32 	%f947, %f944, %f941, %f946;
	fma.rn.f32 	%f948, %f944, %f943, %f947;
	mov.f32 	%f949, 0f00000000;
	fma.rn.f32 	%f950, %f949, %f941, %f948;
	add.rn.f32 	%f951, %f945, %f950;
	neg.f32 	%f952, %f951;
	add.rn.f32 	%f953, %f945, %f952;
	add.rn.f32 	%f954, %f953, %f950;
	mov.b32 	 %r127, %f951;
	setp.eq.s32	%p62, %r127, 1118925336;
	add.s32 	%r128, %r127, -1;
	mov.b32 	 %f955, %r128;
	add.f32 	%f956, %f954, 0f37000000;
	selp.f32	%f957, %f955, %f951, %p62;
	selp.f32	%f189, %f956, %f954, %p62;
	mul.f32 	%f958, %f957, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f959, %f958;
	mov.f32 	%f960, 0fBF317200;
	fma.rn.f32 	%f961, %f959, %f960, %f957;
	mov.f32 	%f962, 0fB5BFBE8E;
	fma.rn.f32 	%f963, %f959, %f962, %f961;
	mul.f32 	%f964, %f963, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f965, %f964;
	add.f32 	%f966, %f959, 0f00000000;
	ex2.approx.f32 	%f967, %f966;
	mul.f32 	%f968, %f965, %f967;
	setp.lt.f32	%p63, %f957, 0fC2D20000;
	selp.f32	%f969, 0f00000000, %f968, %p63;
	setp.gt.f32	%p64, %f957, 0f42D20000;
	selp.f32	%f1321, 0f7F800000, %f969, %p64;
	setp.eq.f32	%p65, %f1321, 0f7F800000;
	@%p65 bra 	BB0_52;

	fma.rn.f32 	%f1321, %f1321, %f189, %f1321;

BB0_52:
	setp.lt.f32	%p66, %f186, 0f00000000;
	setp.eq.f32	%p67, %f187, 0f3F800000;
	and.pred  	%p4, %p66, %p67;
	mov.b32 	 %r129, %f1321;
	xor.b32  	%r130, %r129, -2147483648;
	mov.b32 	 %f970, %r130;
	selp.f32	%f1323, %f970, %f1321, %p4;
	setp.eq.f32	%p68, %f186, 0f00000000;
	@%p68 bra 	BB0_55;
	bra.uni 	BB0_53;

BB0_55:
	add.f32 	%f973, %f186, %f186;
	selp.f32	%f1323, %f973, 0f00000000, %p67;
	bra.uni 	BB0_56;

BB0_110:
	mov.u64 	%rd117, image_HDR;
	cvta.global.u64 	%rd112, %rd117;
	mov.u32 	%r193, 8;
	// inline asm
	call (%rd111), _rt_buffer_get_64, (%rd112, %r28, %r193, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1254, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f1254;}

	// inline asm
	mov.u16 	%rs58, 0;
	st.v4.u16 	[%rd111], {%rs57, %rs57, %rs57, %rs58};

BB0_111:
	ld.global.u8 	%rs59, [imageEnabled];
	and.b16  	%rs60, %rs59, 64;
	setp.eq.s16	%p132, %rs60, 0;
	@%p132 bra 	BB0_113;

	cvt.u64.u32	%rd120, %r2;
	cvt.u64.u32	%rd121, %r3;
	mov.u64 	%rd124, image_Dir;
	cvta.global.u64 	%rd119, %rd124;
	// inline asm
	call (%rd118), _rt_buffer_get_64, (%rd119, %r28, %r29, %rd120, %rd121, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs61, 0;
	st.v4.u8 	[%rd118], {%rs61, %rs61, %rs61, %rs61};
	bra.uni 	BB0_113;

BB0_53:
	setp.geu.f32	%p69, %f186, 0f00000000;
	@%p69 bra 	BB0_56;

	cvt.rzi.f32.f32	%f972, %f944;
	setp.neu.f32	%p70, %f972, 0f3EE8BA2E;
	selp.f32	%f1323, 0f7FFFFFFF, %f1323, %p70;

BB0_56:
	add.f32 	%f974, %f188, 0f3EE8BA2E;
	mov.b32 	 %r131, %f974;
	setp.lt.s32	%p72, %r131, 2139095040;
	@%p72 bra 	BB0_61;

	setp.gtu.f32	%p73, %f188, 0f7F800000;
	@%p73 bra 	BB0_60;
	bra.uni 	BB0_58;

BB0_60:
	add.f32 	%f1323, %f186, 0f3EE8BA2E;
	bra.uni 	BB0_61;

BB0_58:
	setp.neu.f32	%p74, %f188, 0f7F800000;
	@%p74 bra 	BB0_61;

	selp.f32	%f1323, 0fFF800000, 0f7F800000, %p4;

BB0_61:
	mul.f32 	%f975, %f1323, 0f437F0000;
	setp.eq.f32	%p75, %f186, 0f3F800000;
	selp.f32	%f976, 0f437F0000, %f975, %p75;
	cvt.rzi.u32.f32	%r132, %f976;
	cvt.u16.u32	%rs17, %r132;
	mov.u16 	%rs18, 255;
	st.v2.u8 	[%rd43], {%rs17, %rs18};
	ld.global.u32 	%r204, [imageEnabled];

BB0_62:
	and.b32  	%r133, %r204, 1;
	setp.eq.b32	%p76, %r133, 1;
	@!%p76 bra 	BB0_97;
	bra.uni 	BB0_63;

BB0_63:
	mov.f32 	%f979, 0f3E666666;
	cvt.rzi.f32.f32	%f980, %f979;
	fma.rn.f32 	%f981, %f980, 0fC0000000, 0f3EE66666;
	abs.f32 	%f200, %f981;
	abs.f32 	%f201, %f1267;
	setp.lt.f32	%p77, %f201, 0f00800000;
	mul.f32 	%f982, %f201, 0f4B800000;
	selp.f32	%f983, 0fC3170000, 0fC2FE0000, %p77;
	selp.f32	%f984, %f982, %f201, %p77;
	mov.b32 	 %r134, %f984;
	and.b32  	%r135, %r134, 8388607;
	or.b32  	%r136, %r135, 1065353216;
	mov.b32 	 %f985, %r136;
	shr.u32 	%r137, %r134, 23;
	cvt.rn.f32.u32	%f986, %r137;
	add.f32 	%f987, %f983, %f986;
	setp.gt.f32	%p78, %f985, 0f3FB504F3;
	mul.f32 	%f988, %f985, 0f3F000000;
	add.f32 	%f989, %f987, 0f3F800000;
	selp.f32	%f990, %f988, %f985, %p78;
	selp.f32	%f991, %f989, %f987, %p78;
	add.f32 	%f992, %f990, 0fBF800000;
	add.f32 	%f978, %f990, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f977,%f978;
	// inline asm
	add.f32 	%f993, %f992, %f992;
	mul.f32 	%f994, %f977, %f993;
	mul.f32 	%f995, %f994, %f994;
	mov.f32 	%f996, 0f3C4CAF63;
	mov.f32 	%f997, 0f3B18F0FE;
	fma.rn.f32 	%f998, %f997, %f995, %f996;
	mov.f32 	%f999, 0f3DAAAABD;
	fma.rn.f32 	%f1000, %f998, %f995, %f999;
	mul.rn.f32 	%f1001, %f1000, %f995;
	mul.rn.f32 	%f1002, %f1001, %f994;
	sub.f32 	%f1003, %f992, %f994;
	neg.f32 	%f1004, %f994;
	add.f32 	%f1005, %f1003, %f1003;
	fma.rn.f32 	%f1006, %f1004, %f992, %f1005;
	mul.rn.f32 	%f1007, %f977, %f1006;
	add.f32 	%f1008, %f1002, %f994;
	sub.f32 	%f1009, %f994, %f1008;
	add.f32 	%f1010, %f1002, %f1009;
	add.f32 	%f1011, %f1007, %f1010;
	add.f32 	%f1012, %f1008, %f1011;
	sub.f32 	%f1013, %f1008, %f1012;
	add.f32 	%f1014, %f1011, %f1013;
	mov.f32 	%f1015, 0f3F317200;
	mul.rn.f32 	%f1016, %f991, %f1015;
	mov.f32 	%f1017, 0f35BFBE8E;
	mul.rn.f32 	%f1018, %f991, %f1017;
	add.f32 	%f1019, %f1016, %f1012;
	sub.f32 	%f1020, %f1016, %f1019;
	add.f32 	%f1021, %f1012, %f1020;
	add.f32 	%f1022, %f1014, %f1021;
	add.f32 	%f1023, %f1018, %f1022;
	add.f32 	%f1024, %f1019, %f1023;
	sub.f32 	%f1025, %f1019, %f1024;
	add.f32 	%f1026, %f1023, %f1025;
	mov.f32 	%f1027, 0f3EE66666;
	mul.rn.f32 	%f1028, %f1027, %f1024;
	neg.f32 	%f1029, %f1028;
	fma.rn.f32 	%f1030, %f1027, %f1024, %f1029;
	fma.rn.f32 	%f1031, %f1027, %f1026, %f1030;
	mov.f32 	%f1032, 0f00000000;
	fma.rn.f32 	%f1033, %f1032, %f1024, %f1031;
	add.rn.f32 	%f1034, %f1028, %f1033;
	neg.f32 	%f1035, %f1034;
	add.rn.f32 	%f1036, %f1028, %f1035;
	add.rn.f32 	%f1037, %f1036, %f1033;
	mov.b32 	 %r138, %f1034;
	setp.eq.s32	%p79, %r138, 1118925336;
	add.s32 	%r139, %r138, -1;
	mov.b32 	 %f1038, %r139;
	add.f32 	%f1039, %f1037, 0f37000000;
	selp.f32	%f1040, %f1038, %f1034, %p79;
	selp.f32	%f202, %f1039, %f1037, %p79;
	mul.f32 	%f1041, %f1040, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1042, %f1041;
	mov.f32 	%f1043, 0fBF317200;
	fma.rn.f32 	%f1044, %f1042, %f1043, %f1040;
	mov.f32 	%f1045, 0fB5BFBE8E;
	fma.rn.f32 	%f1046, %f1042, %f1045, %f1044;
	mul.f32 	%f1047, %f1046, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1048, %f1047;
	add.f32 	%f1049, %f1042, 0f00000000;
	ex2.approx.f32 	%f1050, %f1049;
	mul.f32 	%f1051, %f1048, %f1050;
	setp.lt.f32	%p80, %f1040, 0fC2D20000;
	selp.f32	%f1052, 0f00000000, %f1051, %p80;
	setp.gt.f32	%p81, %f1040, 0f42D20000;
	selp.f32	%f1324, 0f7F800000, %f1052, %p81;
	setp.eq.f32	%p82, %f1324, 0f7F800000;
	@%p82 bra 	BB0_65;

	fma.rn.f32 	%f1324, %f1324, %f202, %f1324;

BB0_65:
	setp.lt.f32	%p83, %f1267, 0f00000000;
	setp.eq.f32	%p84, %f200, 0f3F800000;
	and.pred  	%p5, %p83, %p84;
	mov.b32 	 %r140, %f1324;
	xor.b32  	%r141, %r140, -2147483648;
	mov.b32 	 %f1053, %r141;
	selp.f32	%f1326, %f1053, %f1324, %p5;
	setp.eq.f32	%p85, %f1267, 0f00000000;
	@%p85 bra 	BB0_68;
	bra.uni 	BB0_66;

BB0_68:
	add.f32 	%f1056, %f1267, %f1267;
	selp.f32	%f1326, %f1056, 0f00000000, %p84;
	bra.uni 	BB0_69;

BB0_66:
	setp.geu.f32	%p86, %f1267, 0f00000000;
	@%p86 bra 	BB0_69;

	cvt.rzi.f32.f32	%f1055, %f1027;
	setp.neu.f32	%p87, %f1055, 0f3EE66666;
	selp.f32	%f1326, 0f7FFFFFFF, %f1326, %p87;

BB0_69:
	add.f32 	%f1057, %f201, 0f3EE66666;
	mov.b32 	 %r142, %f1057;
	setp.lt.s32	%p89, %r142, 2139095040;
	@%p89 bra 	BB0_74;

	setp.gtu.f32	%p90, %f201, 0f7F800000;
	@%p90 bra 	BB0_73;
	bra.uni 	BB0_71;

BB0_73:
	add.f32 	%f1326, %f1267, 0f3EE66666;
	bra.uni 	BB0_74;

BB0_71:
	setp.neu.f32	%p91, %f201, 0f7F800000;
	@%p91 bra 	BB0_74;

	selp.f32	%f1326, 0fFF800000, 0f7F800000, %p5;

BB0_74:
	setp.eq.f32	%p92, %f1267, 0f3F800000;
	selp.f32	%f213, 0f3F800000, %f1326, %p92;
	abs.f32 	%f214, %f1266;
	setp.lt.f32	%p93, %f214, 0f00800000;
	mul.f32 	%f1060, %f214, 0f4B800000;
	selp.f32	%f1061, 0fC3170000, 0fC2FE0000, %p93;
	selp.f32	%f1062, %f1060, %f214, %p93;
	mov.b32 	 %r143, %f1062;
	and.b32  	%r144, %r143, 8388607;
	or.b32  	%r145, %r144, 1065353216;
	mov.b32 	 %f1063, %r145;
	shr.u32 	%r146, %r143, 23;
	cvt.rn.f32.u32	%f1064, %r146;
	add.f32 	%f1065, %f1061, %f1064;
	setp.gt.f32	%p94, %f1063, 0f3FB504F3;
	mul.f32 	%f1066, %f1063, 0f3F000000;
	add.f32 	%f1067, %f1065, 0f3F800000;
	selp.f32	%f1068, %f1066, %f1063, %p94;
	selp.f32	%f1069, %f1067, %f1065, %p94;
	add.f32 	%f1070, %f1068, 0fBF800000;
	add.f32 	%f1059, %f1068, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1058,%f1059;
	// inline asm
	add.f32 	%f1071, %f1070, %f1070;
	mul.f32 	%f1072, %f1058, %f1071;
	mul.f32 	%f1073, %f1072, %f1072;
	fma.rn.f32 	%f1076, %f997, %f1073, %f996;
	fma.rn.f32 	%f1078, %f1076, %f1073, %f999;
	mul.rn.f32 	%f1079, %f1078, %f1073;
	mul.rn.f32 	%f1080, %f1079, %f1072;
	sub.f32 	%f1081, %f1070, %f1072;
	neg.f32 	%f1082, %f1072;
	add.f32 	%f1083, %f1081, %f1081;
	fma.rn.f32 	%f1084, %f1082, %f1070, %f1083;
	mul.rn.f32 	%f1085, %f1058, %f1084;
	add.f32 	%f1086, %f1080, %f1072;
	sub.f32 	%f1087, %f1072, %f1086;
	add.f32 	%f1088, %f1080, %f1087;
	add.f32 	%f1089, %f1085, %f1088;
	add.f32 	%f1090, %f1086, %f1089;
	sub.f32 	%f1091, %f1086, %f1090;
	add.f32 	%f1092, %f1089, %f1091;
	mul.rn.f32 	%f1094, %f1069, %f1015;
	mul.rn.f32 	%f1096, %f1069, %f1017;
	add.f32 	%f1097, %f1094, %f1090;
	sub.f32 	%f1098, %f1094, %f1097;
	add.f32 	%f1099, %f1090, %f1098;
	add.f32 	%f1100, %f1092, %f1099;
	add.f32 	%f1101, %f1096, %f1100;
	add.f32 	%f1102, %f1097, %f1101;
	sub.f32 	%f1103, %f1097, %f1102;
	add.f32 	%f1104, %f1101, %f1103;
	mul.rn.f32 	%f1106, %f1027, %f1102;
	neg.f32 	%f1107, %f1106;
	fma.rn.f32 	%f1108, %f1027, %f1102, %f1107;
	fma.rn.f32 	%f1109, %f1027, %f1104, %f1108;
	fma.rn.f32 	%f1111, %f1032, %f1102, %f1109;
	add.rn.f32 	%f1112, %f1106, %f1111;
	neg.f32 	%f1113, %f1112;
	add.rn.f32 	%f1114, %f1106, %f1113;
	add.rn.f32 	%f1115, %f1114, %f1111;
	mov.b32 	 %r147, %f1112;
	setp.eq.s32	%p95, %r147, 1118925336;
	add.s32 	%r148, %r147, -1;
	mov.b32 	 %f1116, %r148;
	add.f32 	%f1117, %f1115, 0f37000000;
	selp.f32	%f1118, %f1116, %f1112, %p95;
	selp.f32	%f215, %f1117, %f1115, %p95;
	mul.f32 	%f1119, %f1118, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1120, %f1119;
	fma.rn.f32 	%f1122, %f1120, %f1043, %f1118;
	fma.rn.f32 	%f1124, %f1120, %f1045, %f1122;
	mul.f32 	%f1125, %f1124, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1126, %f1125;
	add.f32 	%f1127, %f1120, 0f00000000;
	ex2.approx.f32 	%f1128, %f1127;
	mul.f32 	%f1129, %f1126, %f1128;
	setp.lt.f32	%p96, %f1118, 0fC2D20000;
	selp.f32	%f1130, 0f00000000, %f1129, %p96;
	setp.gt.f32	%p97, %f1118, 0f42D20000;
	selp.f32	%f1327, 0f7F800000, %f1130, %p97;
	setp.eq.f32	%p98, %f1327, 0f7F800000;
	@%p98 bra 	BB0_76;

	fma.rn.f32 	%f1327, %f1327, %f215, %f1327;

BB0_76:
	setp.lt.f32	%p99, %f1266, 0f00000000;
	and.pred  	%p6, %p99, %p84;
	mov.b32 	 %r149, %f1327;
	xor.b32  	%r150, %r149, -2147483648;
	mov.b32 	 %f1131, %r150;
	selp.f32	%f1329, %f1131, %f1327, %p6;
	setp.eq.f32	%p101, %f1266, 0f00000000;
	@%p101 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f1134, %f1266, %f1266;
	selp.f32	%f1329, %f1134, 0f00000000, %p84;
	bra.uni 	BB0_80;

BB0_77:
	setp.geu.f32	%p102, %f1266, 0f00000000;
	@%p102 bra 	BB0_80;

	cvt.rzi.f32.f32	%f1133, %f1027;
	setp.neu.f32	%p103, %f1133, 0f3EE66666;
	selp.f32	%f1329, 0f7FFFFFFF, %f1329, %p103;

BB0_80:
	add.f32 	%f1135, %f214, 0f3EE66666;
	mov.b32 	 %r151, %f1135;
	setp.lt.s32	%p105, %r151, 2139095040;
	@%p105 bra 	BB0_85;

	setp.gtu.f32	%p106, %f214, 0f7F800000;
	@%p106 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f1329, %f1266, 0f3EE66666;
	bra.uni 	BB0_85;

BB0_82:
	setp.neu.f32	%p107, %f214, 0f7F800000;
	@%p107 bra 	BB0_85;

	selp.f32	%f1329, 0fFF800000, 0f7F800000, %p6;

BB0_85:
	setp.eq.f32	%p108, %f1266, 0f3F800000;
	selp.f32	%f226, 0f3F800000, %f1329, %p108;
	abs.f32 	%f227, %f1265;
	setp.lt.f32	%p109, %f227, 0f00800000;
	mul.f32 	%f1138, %f227, 0f4B800000;
	selp.f32	%f1139, 0fC3170000, 0fC2FE0000, %p109;
	selp.f32	%f1140, %f1138, %f227, %p109;
	mov.b32 	 %r152, %f1140;
	and.b32  	%r153, %r152, 8388607;
	or.b32  	%r154, %r153, 1065353216;
	mov.b32 	 %f1141, %r154;
	shr.u32 	%r155, %r152, 23;
	cvt.rn.f32.u32	%f1142, %r155;
	add.f32 	%f1143, %f1139, %f1142;
	setp.gt.f32	%p110, %f1141, 0f3FB504F3;
	mul.f32 	%f1144, %f1141, 0f3F000000;
	add.f32 	%f1145, %f1143, 0f3F800000;
	selp.f32	%f1146, %f1144, %f1141, %p110;
	selp.f32	%f1147, %f1145, %f1143, %p110;
	add.f32 	%f1148, %f1146, 0fBF800000;
	add.f32 	%f1137, %f1146, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1136,%f1137;
	// inline asm
	add.f32 	%f1149, %f1148, %f1148;
	mul.f32 	%f1150, %f1136, %f1149;
	mul.f32 	%f1151, %f1150, %f1150;
	fma.rn.f32 	%f1154, %f997, %f1151, %f996;
	fma.rn.f32 	%f1156, %f1154, %f1151, %f999;
	mul.rn.f32 	%f1157, %f1156, %f1151;
	mul.rn.f32 	%f1158, %f1157, %f1150;
	sub.f32 	%f1159, %f1148, %f1150;
	neg.f32 	%f1160, %f1150;
	add.f32 	%f1161, %f1159, %f1159;
	fma.rn.f32 	%f1162, %f1160, %f1148, %f1161;
	mul.rn.f32 	%f1163, %f1136, %f1162;
	add.f32 	%f1164, %f1158, %f1150;
	sub.f32 	%f1165, %f1150, %f1164;
	add.f32 	%f1166, %f1158, %f1165;
	add.f32 	%f1167, %f1163, %f1166;
	add.f32 	%f1168, %f1164, %f1167;
	sub.f32 	%f1169, %f1164, %f1168;
	add.f32 	%f1170, %f1167, %f1169;
	mul.rn.f32 	%f1172, %f1147, %f1015;
	mul.rn.f32 	%f1174, %f1147, %f1017;
	add.f32 	%f1175, %f1172, %f1168;
	sub.f32 	%f1176, %f1172, %f1175;
	add.f32 	%f1177, %f1168, %f1176;
	add.f32 	%f1178, %f1170, %f1177;
	add.f32 	%f1179, %f1174, %f1178;
	add.f32 	%f1180, %f1175, %f1179;
	sub.f32 	%f1181, %f1175, %f1180;
	add.f32 	%f1182, %f1179, %f1181;
	mul.rn.f32 	%f1184, %f1027, %f1180;
	neg.f32 	%f1185, %f1184;
	fma.rn.f32 	%f1186, %f1027, %f1180, %f1185;
	fma.rn.f32 	%f1187, %f1027, %f1182, %f1186;
	fma.rn.f32 	%f1189, %f1032, %f1180, %f1187;
	add.rn.f32 	%f1190, %f1184, %f1189;
	neg.f32 	%f1191, %f1190;
	add.rn.f32 	%f1192, %f1184, %f1191;
	add.rn.f32 	%f1193, %f1192, %f1189;
	mov.b32 	 %r156, %f1190;
	setp.eq.s32	%p111, %r156, 1118925336;
	add.s32 	%r157, %r156, -1;
	mov.b32 	 %f1194, %r157;
	add.f32 	%f1195, %f1193, 0f37000000;
	selp.f32	%f1196, %f1194, %f1190, %p111;
	selp.f32	%f228, %f1195, %f1193, %p111;
	mul.f32 	%f1197, %f1196, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1198, %f1197;
	fma.rn.f32 	%f1200, %f1198, %f1043, %f1196;
	fma.rn.f32 	%f1202, %f1198, %f1045, %f1200;
	mul.f32 	%f1203, %f1202, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1204, %f1203;
	add.f32 	%f1205, %f1198, 0f00000000;
	ex2.approx.f32 	%f1206, %f1205;
	mul.f32 	%f1207, %f1204, %f1206;
	setp.lt.f32	%p112, %f1196, 0fC2D20000;
	selp.f32	%f1208, 0f00000000, %f1207, %p112;
	setp.gt.f32	%p113, %f1196, 0f42D20000;
	selp.f32	%f1330, 0f7F800000, %f1208, %p113;
	setp.eq.f32	%p114, %f1330, 0f7F800000;
	@%p114 bra 	BB0_87;

	fma.rn.f32 	%f1330, %f1330, %f228, %f1330;

BB0_87:
	setp.lt.f32	%p115, %f1265, 0f00000000;
	and.pred  	%p7, %p115, %p84;
	mov.b32 	 %r158, %f1330;
	xor.b32  	%r159, %r158, -2147483648;
	mov.b32 	 %f1209, %r159;
	selp.f32	%f1332, %f1209, %f1330, %p7;
	setp.eq.f32	%p117, %f1265, 0f00000000;
	@%p117 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f1212, %f1265, %f1265;
	selp.f32	%f1332, %f1212, 0f00000000, %p84;
	bra.uni 	BB0_91;

BB0_88:
	setp.geu.f32	%p118, %f1265, 0f00000000;
	@%p118 bra 	BB0_91;

	cvt.rzi.f32.f32	%f1211, %f1027;
	setp.neu.f32	%p119, %f1211, 0f3EE66666;
	selp.f32	%f1332, 0f7FFFFFFF, %f1332, %p119;

BB0_91:
	add.f32 	%f1213, %f227, 0f3EE66666;
	mov.b32 	 %r160, %f1213;
	setp.lt.s32	%p121, %r160, 2139095040;
	@%p121 bra 	BB0_96;

	setp.gtu.f32	%p122, %f227, 0f7F800000;
	@%p122 bra 	BB0_95;
	bra.uni 	BB0_93;

BB0_95:
	add.f32 	%f1332, %f1265, 0f3EE66666;
	bra.uni 	BB0_96;

BB0_93:
	setp.neu.f32	%p123, %f227, 0f7F800000;
	@%p123 bra 	BB0_96;

	selp.f32	%f1332, 0fFF800000, 0f7F800000, %p7;

BB0_96:
	mov.u32 	%r196, 4;
	setp.eq.f32	%p124, %f1265, 0f3F800000;
	selp.f32	%f1214, 0f3F800000, %f1332, %p124;
	cvt.u64.u32	%rd53, %r3;
	cvt.u64.u32	%rd52, %r2;
	mov.u64 	%rd56, image;
	cvta.global.u64 	%rd51, %rd56;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r196, %rd52, %rd53, %rd13, %rd13);
	// inline asm
	cvt.sat.f32.f32	%f1215, %f1214;
	mul.f32 	%f1216, %f1215, 0f437FFD71;
	cvt.rzi.u32.f32	%r163, %f1216;
	cvt.sat.f32.f32	%f1217, %f226;
	mul.f32 	%f1218, %f1217, 0f437FFD71;
	cvt.rzi.u32.f32	%r164, %f1218;
	cvt.sat.f32.f32	%f1219, %f213;
	mul.f32 	%f1220, %f1219, 0f437FFD71;
	cvt.rzi.u32.f32	%r165, %f1220;
	cvt.u16.u32	%rs19, %r163;
	cvt.u16.u32	%rs20, %r165;
	cvt.u16.u32	%rs21, %r164;
	mov.u16 	%rs22, 255;
	st.v4.u8 	[%rd50], {%rs19, %rs21, %rs20, %rs22};
	ld.global.u32 	%r204, [imageEnabled];

BB0_97:
	and.b32  	%r166, %r204, 4;
	setp.eq.s32	%p125, %r166, 0;
	@%p125 bra 	BB0_101;

	ld.global.u32 	%r167, [additive];
	setp.eq.s32	%p126, %r167, 0;
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	mov.f32 	%f1221, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f1221;}

	// inline asm
	@%p126 bra 	BB0_100;

	mov.u64 	%rd69, image_HDR;
	cvta.global.u64 	%rd58, %rd69;
	mov.u32 	%r171, 8;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd57];
	// inline asm
	{  cvt.f32.f16 %f1222, %rs30;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1223, %rs31;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1224, %rs32;}

	// inline asm
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1225, %f1267, %f1222;
	add.f32 	%f1226, %f1266, %f1223;
	add.f32 	%f1227, %f1265, %f1224;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f1227;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f1226;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f1225;}

	// inline asm
	st.v4.u16 	[%rd63], {%rs27, %rs28, %rs29, %rs23};
	bra.uni 	BB0_101;

BB0_100:
	mov.u64 	%rd76, image_HDR;
	cvta.global.u64 	%rd71, %rd76;
	mov.u32 	%r173, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r173, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f1265;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs35, %f1266;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f1267;}

	// inline asm
	st.v4.u16 	[%rd70], {%rs34, %rs35, %rs36, %rs23};

BB0_101:
	ld.global.u8 	%rs37, [imageEnabled];
	and.b16  	%rs38, %rs37, 64;
	setp.eq.s16	%p127, %rs38, 0;
	@%p127 bra 	BB0_113;

	mov.u32 	%r197, 4;
	mul.f32 	%f1231, %f23, %f23;
	fma.rn.f32 	%f1232, %f24, %f24, %f1231;
	fma.rn.f32 	%f1233, %f22, %f22, %f1232;
	sqrt.rn.f32 	%f1234, %f1233;
	rcp.rn.f32 	%f1235, %f1234;
	mul.f32 	%f1236, %f24, %f1235;
	mul.f32 	%f1237, %f23, %f1235;
	mul.f32 	%f1238, %f22, %f1235;
	cvt.u64.u32	%rd80, %r3;
	cvt.u64.u32	%rd79, %r2;
	mov.u64 	%rd83, image_Dir;
	cvta.global.u64 	%rd78, %rd83;
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r197, %rd79, %rd80, %rd13, %rd13);
	// inline asm
	fma.rn.f32 	%f1239, %f1236, 0f3F000000, 0f3F000000;
	mul.f32 	%f1240, %f1239, 0f437F0000;
	cvt.rzi.u32.f32	%r176, %f1240;
	fma.rn.f32 	%f1241, %f1237, 0f3F000000, 0f3F000000;
	mul.f32 	%f1242, %f1241, 0f437F0000;
	cvt.rzi.u32.f32	%r177, %f1242;
	fma.rn.f32 	%f1243, %f1238, 0f3F000000, 0f3F000000;
	mul.f32 	%f1244, %f1243, 0f437F0000;
	cvt.rzi.u32.f32	%r178, %f1244;
	cvt.u16.u32	%rs39, %r178;
	cvt.u16.u32	%rs40, %r177;
	cvt.u16.u32	%rs41, %r176;
	mov.u16 	%rs42, 255;
	st.v4.u8 	[%rd77], {%rs41, %rs40, %rs39, %rs42};

BB0_113:
	ret;
}