//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<193>;
	.reg .b16 	%rs<181>;
	.reg .f32 	%f<1482>;
	.reg .b32 	%r<375>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<116>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r53), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r54), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u64 	%rd29, [params+400];
	cvta.to.global.u64 	%rd30, %rd29;
	ld.const.u32 	%r59, [params+392];
	mad.lo.s32 	%r60, %r59, %r54, %r53;
	mul.wide.u32 	%rd31, %r60, 4;
	add.s64 	%rd2, %rd30, %rd31;
	ld.global.v2.u8 	{%rs16, %rs176}, [%rd2];
	or.b16  	%rs18, %rs16, %rs176;
	and.b16  	%rs19, %rs18, 255;
	setp.eq.s16 	%p9, %rs19, 0;
	@%p9 bra 	$L__BB0_2;

	ld.global.u8 	%rs175, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs175, [%rd2+2];
	setp.eq.s16 	%p10, %rs175, 0;
	mov.f32 	%f1428, 0f00000000;
	mov.u16 	%rs176, 0;
	mov.f32 	%f1429, %f1428;
	mov.f32 	%f1430, %f1428;
	@%p10 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f224, %rs16;
	div.rn.f32 	%f225, %f224, 0f437F0000;
	fma.rn.f32 	%f226, %f225, 0f40000000, 0fBF800000;
	and.b16  	%rs22, %rs176, 255;
	cvt.rn.f32.u16 	%f227, %rs22;
	div.rn.f32 	%f228, %f227, 0f437F0000;
	fma.rn.f32 	%f229, %f228, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f230, %rs175;
	div.rn.f32 	%f231, %f230, 0f437F0000;
	fma.rn.f32 	%f232, %f231, 0f40000000, 0fBF800000;
	mul.f32 	%f233, %f229, %f229;
	fma.rn.f32 	%f234, %f226, %f226, %f233;
	fma.rn.f32 	%f235, %f232, %f232, %f234;
	sqrt.rn.f32 	%f236, %f235;
	rcp.rn.f32 	%f237, %f236;
	mul.f32 	%f1430, %f237, %f232;
	mul.f32 	%f1429, %f237, %f229;
	mul.f32 	%f1428, %f226, %f237;

$L__BB0_4:
	ld.const.v2.u32 	{%r61, %r62}, [params];
	add.s32 	%r3, %r61, %r53;
	add.s32 	%r4, %r62, %r54;
	setp.eq.f32 	%p11, %f1428, 0f00000000;
	setp.eq.f32 	%p12, %f1429, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	setp.eq.f32 	%p14, %f1430, 0f00000000;
	and.pred  	%p15, %p14, %p13;
	@%p15 bra 	$L__BB0_157;
	bra.uni 	$L__BB0_5;

$L__BB0_157:
	ld.const.u32 	%r50, [params+104];
	and.b32  	%r344, %r50, 1;
	setp.eq.b32 	%p183, %r344, 1;
	mov.pred 	%p184, 0;
	xor.pred  	%p185, %p183, %p184;
	not.pred 	%p186, %p185;
	@%p186 bra 	$L__BB0_159;

	ld.const.u64 	%rd87, [params+144];
	cvta.to.global.u64 	%rd88, %rd87;
	ld.const.u32 	%r345, [params+136];
	mad.lo.s32 	%r346, %r345, %r4, %r3;
	mul.wide.u32 	%rd89, %r346, 4;
	add.s64 	%rd90, %rd88, %rd89;
	mov.u16 	%rs112, 0;
	st.global.v4.u8 	[%rd90], {%rs112, %rs112, %rs112, %rs112};

$L__BB0_159:
	and.b32  	%r347, %r50, 8;
	setp.eq.s32 	%p187, %r347, 0;
	@%p187 bra 	$L__BB0_161;

	ld.const.u64 	%rd91, [params+192];
	cvta.to.global.u64 	%rd92, %rd91;
	ld.const.u32 	%r348, [params+184];
	mad.lo.s32 	%r349, %r348, %r4, %r3;
	mov.f32 	%f1324, 0f00000000;
	cvt.rzi.u32.f32 	%r350, %f1324;
	mul.wide.u32 	%rd93, %r349, 2;
	add.s64 	%rd94, %rd92, %rd93;
	mov.u16 	%rs113, 0;
	cvt.u16.u32 	%rs114, %r350;
	st.global.v2.u8 	[%rd94], {%rs114, %rs113};

$L__BB0_161:
	and.b32  	%r351, %r50, 4;
	setp.eq.s32 	%p188, %r351, 0;
	ld.const.u32 	%r374, [params+108];
	@%p188 bra 	$L__BB0_165;

	setp.eq.s32 	%p189, %r374, 0;
	ld.const.u64 	%rd95, [params+224];
	cvta.to.global.u64 	%rd96, %rd95;
	ld.const.u32 	%r352, [params+216];
	mad.lo.s32 	%r353, %r352, %r4, %r3;
	mul.wide.u32 	%rd97, %r353, 8;
	add.s64 	%rd24, %rd96, %rd97;
	@%p189 bra 	$L__BB0_164;

	ld.global.v4.u16 	{%rs121, %rs122, %rs123, %rs124}, [%rd24];
	// begin inline asm
	{  cvt.f32.f16 %f1325, %rs121;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1326, %rs122;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1327, %rs123;}

	// end inline asm
	add.f32 	%f1328, %f1325, 0f00000000;
	add.f32 	%f1329, %f1326, 0f00000000;
	add.f32 	%f1330, %f1327, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs120, %f1330;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs119, %f1329;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs118, %f1328;}

	// end inline asm
	mov.u16 	%rs125, 0;
	st.global.v4.u16 	[%rd24], {%rs118, %rs119, %rs120, %rs125};
	bra.uni 	$L__BB0_165;

$L__BB0_5:
	ld.const.v4.f32 	{%f241, %f242, %f243, %f244}, [params+512];
	neg.f32 	%f245, %f242;
	neg.f32 	%f246, %f243;
	mul.f32 	%f247, %f1428, %f241;
	mul.f32 	%f248, %f1429, %f245;
	sub.f32 	%f249, %f248, %f247;
	mul.f32 	%f250, %f1430, %f243;
	sub.f32 	%f13, %f249, %f250;
	ld.const.u64 	%rd32, [params+432];
	cvta.to.global.u64 	%rd33, %rd32;
	ld.const.u32 	%r65, [params+424];
	mad.lo.s32 	%r66, %r65, %r54, %r53;
	mul.wide.u32 	%rd34, %r66, 12;
	add.s64 	%rd35, %rd33, %rd34;
	ld.global.f32 	%f14, [%rd35];
	mul.f32 	%f251, %f14, 0f3456BF95;
	ld.global.f32 	%f15, [%rd35+4];
	mul.f32 	%f252, %f15, 0f3456BF95;
	ld.global.f32 	%f16, [%rd35+8];
	mul.f32 	%f253, %f16, 0f3456BF95;
	abs.f32 	%f254, %f1428;
	div.rn.f32 	%f255, %f251, %f254;
	abs.f32 	%f256, %f1429;
	div.rn.f32 	%f257, %f252, %f256;
	abs.f32 	%f258, %f1430;
	div.rn.f32 	%f259, %f253, %f258;
	abs.f32 	%f260, %f255;
	abs.f32 	%f261, %f257;
	abs.f32 	%f262, %f259;
	mov.f32 	%f263, 0f38D1B717;
	max.f32 	%f264, %f260, %f263;
	max.f32 	%f265, %f261, %f263;
	max.f32 	%f266, %f262, %f263;
	fma.rn.f32 	%f17, %f1428, %f264, %f14;
	fma.rn.f32 	%f18, %f1429, %f265, %f15;
	fma.rn.f32 	%f19, %f1430, %f266, %f16;
	abs.f32 	%f267, %f241;
	abs.f32 	%f268, %f243;
	setp.gt.f32 	%p16, %f267, %f268;
	selp.f32 	%f269, %f245, 0f00000000, %p16;
	mov.f32 	%f1436, 0f00000000;
	selp.f32 	%f270, %f241, %f246, %p16;
	selp.f32 	%f271, 0f00000000, %f242, %p16;
	mul.f32 	%f272, %f270, %f270;
	fma.rn.f32 	%f273, %f269, %f269, %f272;
	fma.rn.f32 	%f274, %f271, %f271, %f273;
	sqrt.rn.f32 	%f275, %f274;
	rcp.rn.f32 	%f276, %f275;
	mul.f32 	%f20, %f269, %f276;
	mul.f32 	%f21, %f270, %f276;
	mul.f32 	%f22, %f271, %f276;
	mul.f32 	%f277, %f243, %f21;
	mul.f32 	%f278, %f242, %f22;
	sub.f32 	%f23, %f277, %f278;
	mul.f32 	%f279, %f241, %f22;
	mul.f32 	%f280, %f243, %f20;
	sub.f32 	%f24, %f279, %f280;
	mul.f32 	%f281, %f242, %f20;
	mul.f32 	%f282, %f241, %f21;
	sub.f32 	%f25, %f281, %f282;
	ld.const.u32 	%r5, [params+540];
	setp.lt.s32 	%p17, %r5, 1;
	mov.f32 	%f1435, %f1436;
	mov.f32 	%f1434, %f1436;
	@%p17 bra 	$L__BB0_34;

	ld.const.u64 	%rd36, [params+128];
	ld.const.u32 	%r68, [params+120];
	cvt.rn.f32.s32 	%f286, %r5;
	rcp.rn.f32 	%f26, %f286;
	mad.lo.s32 	%r69, %r68, %r54, %r53;
	cvta.to.global.u64 	%rd37, %rd36;
	mul.wide.u32 	%rd38, %r69, 4;
	add.s64 	%rd39, %rd37, %rd38;
	ld.global.u32 	%r366, [%rd39];
	ld.const.f32 	%f27, [params+536];
	ld.const.u8 	%rs24, [params+104];
	and.b16  	%rs25, %rs24, 32;
	setp.eq.s16 	%p18, %rs25, 0;
	mov.u32 	%r67, 0;
	selp.f32 	%f28, 0f3F800000, 0f41200000, %p18;
	mul.f32 	%f29, %f17, 0f3456BF95;
	mul.f32 	%f30, %f18, 0f3456BF95;
	mul.f32 	%f31, %f19, 0f3456BF95;
	ld.const.u64 	%rd3, [params+96];
	add.s64 	%rd4, %rd1, 24;
	mov.u64 	%rd40, __cudart_i2opi_f;
	abs.f32 	%f369, %f30;
	abs.f32 	%f370, %f29;
	max.f32 	%f371, %f370, %f369;
	abs.f32 	%f372, %f31;
	max.f32 	%f373, %f371, %f372;
	mov.u32 	%r363, %r67;

$L__BB0_7:
	mov.u32 	%r365, %r67;

$L__BB0_8:
	cvt.rn.f32.s32 	%f1376, %r363;
	mad.lo.s32 	%r71, %r366, 1664525, 1013904223;
	and.b32  	%r72, %r71, 16777215;
	cvt.rn.f32.u32 	%f287, %r72;
	fma.rn.f32 	%f288, %f287, 0f33800000, %f1376;
	mul.f32 	%f289, %f26, %f288;
	mad.lo.s32 	%r366, %r71, 1664525, 1013904223;
	and.b32  	%r73, %r366, 16777215;
	cvt.rn.f32.u32 	%f290, %r73;
	cvt.rn.f32.s32 	%f291, %r365;
	fma.rn.f32 	%f292, %f290, 0f33800000, %f291;
	mul.f32 	%f293, %f26, %f292;
	sqrt.rn.f32 	%f39, %f289;
	mul.f32 	%f40, %f293, 0f40C90FDB;
	mul.f32 	%f294, %f40, 0f3F22F983;
	cvt.rni.s32.f32 	%r373, %f294;
	cvt.rn.f32.s32 	%f295, %r373;
	mov.f32 	%f296, 0fBFC90FDA;
	fma.rn.f32 	%f297, %f295, %f296, %f40;
	mov.f32 	%f298, 0fB3A22168;
	fma.rn.f32 	%f299, %f295, %f298, %f297;
	mov.f32 	%f300, 0fA7C234C5;
	fma.rn.f32 	%f1440, %f295, %f300, %f299;
	abs.f32 	%f42, %f40;
	setp.ltu.f32 	%p19, %f42, 0f47CE4780;
	mov.u32 	%r370, %r373;
	mov.f32 	%f1437, %f1440;
	@%p19 bra 	$L__BB0_16;

	setp.eq.f32 	%p20, %f42, 0f7F800000;
	@%p20 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f303, 0f00000000;
	mul.rn.f32 	%f1437, %f40, %f303;
	mov.u32 	%r370, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r13, %f40;
	bfe.u32 	%r75, %r13, 23, 8;
	add.s32 	%r14, %r75, -128;
	shl.b32 	%r76, %r13, 8;
	or.b32  	%r15, %r76, -2147483648;
	shr.u32 	%r16, %r14, 5;
	mov.u64 	%rd113, 0;
	mov.u32 	%r367, 0;
	mov.u64 	%rd111, %rd1;
	mov.u64 	%rd112, %rd40;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r77, [%rd112];
	mad.wide.u32 	%rd42, %r77, %r15, %rd113;
	shr.u64 	%rd113, %rd42, 32;
	st.local.u32 	[%rd111], %rd42;
	add.s64 	%rd112, %rd112, 4;
	add.s64 	%rd111, %rd111, 4;
	add.s32 	%r367, %r367, 1;
	setp.ne.s32 	%p21, %r367, 6;
	@%p21 bra 	$L__BB0_11;

	st.local.u32 	[%rd4], %rd113;
	mov.u32 	%r78, 4;
	sub.s32 	%r19, %r78, %r16;
	mov.u32 	%r79, 6;
	sub.s32 	%r80, %r79, %r16;
	mul.wide.s32 	%rd43, %r80, 4;
	add.s64 	%rd44, %rd1, %rd43;
	ld.local.u32 	%r368, [%rd44];
	ld.local.u32 	%r369, [%rd44+-4];
	and.b32  	%r22, %r14, 31;
	setp.eq.s32 	%p22, %r22, 0;
	@%p22 bra 	$L__BB0_14;

	mov.u32 	%r81, 32;
	sub.s32 	%r82, %r81, %r22;
	shr.u32 	%r83, %r369, %r82;
	shl.b32 	%r84, %r368, %r22;
	add.s32 	%r368, %r83, %r84;
	mul.wide.s32 	%rd45, %r19, 4;
	add.s64 	%rd46, %rd1, %rd45;
	ld.local.u32 	%r85, [%rd46];
	shr.u32 	%r86, %r85, %r82;
	shl.b32 	%r87, %r369, %r22;
	add.s32 	%r369, %r86, %r87;

$L__BB0_14:
	and.b32  	%r88, %r13, -2147483648;
	shr.u32 	%r89, %r369, 30;
	shl.b32 	%r90, %r368, 2;
	or.b32  	%r91, %r89, %r90;
	shr.u32 	%r92, %r91, 31;
	shr.u32 	%r93, %r368, 30;
	add.s32 	%r94, %r92, %r93;
	neg.s32 	%r95, %r94;
	setp.eq.s32 	%p23, %r88, 0;
	selp.b32 	%r370, %r94, %r95, %p23;
	setp.ne.s32 	%p24, %r92, 0;
	xor.b32  	%r96, %r88, -2147483648;
	selp.b32 	%r97, %r96, %r88, %p24;
	selp.b32 	%r98, -1, 0, %p24;
	xor.b32  	%r99, %r91, %r98;
	shl.b32 	%r100, %r369, 2;
	xor.b32  	%r101, %r100, %r98;
	cvt.u64.u32 	%rd47, %r99;
	cvt.u64.u32 	%rd48, %r101;
	bfi.b64 	%rd49, %rd47, %rd48, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd49;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f301, %fd2;
	setp.eq.s32 	%p25, %r97, 0;
	neg.f32 	%f302, %f301;
	selp.f32 	%f1437, %f301, %f302, %p25;

$L__BB0_16:
	add.s32 	%r29, %r370, 1;
	and.b32  	%r30, %r29, 1;
	setp.eq.s32 	%p26, %r30, 0;
	selp.f32 	%f46, %f1437, 0f3F800000, %p26;
	mul.rn.f32 	%f47, %f1437, %f1437;
	mov.f32 	%f1438, 0fB94D4153;
	@%p26 bra 	$L__BB0_18;

	mov.f32 	%f305, 0fBAB607ED;
	mov.f32 	%f306, 0f37CBAC00;
	fma.rn.f32 	%f1438, %f306, %f47, %f305;

$L__BB0_18:
	selp.f32 	%f307, 0f3C0885E4, 0f3D2AAABB, %p26;
	fma.rn.f32 	%f308, %f1438, %f47, %f307;
	selp.f32 	%f309, 0fBE2AAAA8, 0fBEFFFFFF, %p26;
	fma.rn.f32 	%f310, %f308, %f47, %f309;
	mov.f32 	%f311, 0f00000000;
	fma.rn.f32 	%f312, %f47, %f46, %f311;
	fma.rn.f32 	%f1439, %f310, %f312, %f46;
	and.b32  	%r103, %r29, 2;
	setp.eq.s32 	%p28, %r103, 0;
	@%p28 bra 	$L__BB0_20;

	mov.f32 	%f314, 0fBF800000;
	fma.rn.f32 	%f1439, %f1439, %f314, %f311;

$L__BB0_20:
	@%p19 bra 	$L__BB0_28;

	setp.eq.f32 	%p30, %f42, 0f7F800000;
	@%p30 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f317, 0f00000000;
	mul.rn.f32 	%f1440, %f40, %f317;
	mov.u32 	%r373, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r31, %f40;
	bfe.u32 	%r104, %r31, 23, 8;
	add.s32 	%r32, %r104, -128;
	shl.b32 	%r105, %r31, 8;
	or.b32  	%r33, %r105, -2147483648;
	shr.u32 	%r34, %r32, 5;
	mov.u64 	%rd114, 0;
	mov.u64 	%rd115, %rd114;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd52, %rd114, 2;
	mov.u64 	%rd53, __cudart_i2opi_f;
	add.s64 	%rd54, %rd53, %rd52;
	ld.global.nc.u32 	%r106, [%rd54];
	mad.wide.u32 	%rd55, %r106, %r33, %rd115;
	shr.u64 	%rd115, %rd55, 32;
	add.s64 	%rd56, %rd1, %rd52;
	st.local.u32 	[%rd56], %rd55;
	cvt.u32.u64 	%r107, %rd114;
	add.s32 	%r108, %r107, 1;
	cvt.s64.s32 	%rd114, %r108;
	setp.ne.s32 	%p31, %r108, 6;
	@%p31 bra 	$L__BB0_23;

	st.local.u32 	[%rd4], %rd115;
	mov.u32 	%r109, 4;
	sub.s32 	%r35, %r109, %r34;
	mov.u32 	%r110, 6;
	sub.s32 	%r111, %r110, %r34;
	mul.wide.s32 	%rd57, %r111, 4;
	add.s64 	%rd58, %rd1, %rd57;
	ld.local.u32 	%r371, [%rd58];
	ld.local.u32 	%r372, [%rd58+-4];
	and.b32  	%r38, %r32, 31;
	setp.eq.s32 	%p32, %r38, 0;
	@%p32 bra 	$L__BB0_26;

	mov.u32 	%r112, 32;
	sub.s32 	%r113, %r112, %r38;
	shr.u32 	%r114, %r372, %r113;
	shl.b32 	%r115, %r371, %r38;
	add.s32 	%r371, %r114, %r115;
	mul.wide.s32 	%rd59, %r35, 4;
	add.s64 	%rd60, %rd1, %rd59;
	ld.local.u32 	%r116, [%rd60];
	shr.u32 	%r117, %r116, %r113;
	shl.b32 	%r118, %r372, %r38;
	add.s32 	%r372, %r117, %r118;

$L__BB0_26:
	and.b32  	%r119, %r31, -2147483648;
	shr.u32 	%r120, %r372, 30;
	shl.b32 	%r121, %r371, 2;
	or.b32  	%r122, %r120, %r121;
	shr.u32 	%r123, %r122, 31;
	shr.u32 	%r124, %r371, 30;
	add.s32 	%r125, %r123, %r124;
	neg.s32 	%r126, %r125;
	setp.eq.s32 	%p33, %r119, 0;
	selp.b32 	%r373, %r125, %r126, %p33;
	setp.ne.s32 	%p34, %r123, 0;
	xor.b32  	%r127, %r119, -2147483648;
	selp.b32 	%r128, %r127, %r119, %p34;
	selp.b32 	%r129, -1, 0, %p34;
	xor.b32  	%r130, %r122, %r129;
	shl.b32 	%r131, %r372, 2;
	xor.b32  	%r132, %r131, %r129;
	cvt.u64.u32 	%rd61, %r130;
	cvt.u64.u32 	%rd62, %r132;
	bfi.b64 	%rd63, %rd61, %rd62, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd63;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f315, %fd4;
	setp.eq.s32 	%p35, %r128, 0;
	neg.f32 	%f316, %f315;
	selp.f32 	%f1440, %f315, %f316, %p35;

$L__BB0_28:
	mul.f32 	%f56, %f39, %f1439;
	and.b32  	%r45, %r373, 1;
	setp.eq.s32 	%p36, %r45, 0;
	selp.f32 	%f57, %f1440, 0f3F800000, %p36;
	mul.rn.f32 	%f58, %f1440, %f1440;
	mov.f32 	%f1441, 0fB94D4153;
	@%p36 bra 	$L__BB0_30;

	mov.f32 	%f319, 0fBAB607ED;
	mov.f32 	%f320, 0f37CBAC00;
	fma.rn.f32 	%f1441, %f320, %f58, %f319;

$L__BB0_30:
	selp.f32 	%f321, 0f3C0885E4, 0f3D2AAABB, %p36;
	fma.rn.f32 	%f322, %f1441, %f58, %f321;
	selp.f32 	%f323, 0fBE2AAAA8, 0fBEFFFFFF, %p36;
	fma.rn.f32 	%f324, %f322, %f58, %f323;
	mov.f32 	%f325, 0f00000000;
	fma.rn.f32 	%f326, %f58, %f57, %f325;
	fma.rn.f32 	%f1442, %f324, %f326, %f57;
	and.b32  	%r134, %r373, 2;
	setp.eq.s32 	%p38, %r134, 0;
	@%p38 bra 	$L__BB0_32;

	mov.f32 	%f328, 0fBF800000;
	fma.rn.f32 	%f1442, %f1442, %f328, %f325;

$L__BB0_32:
	mul.f32 	%f338, %f56, %f56;
	mov.f32 	%f339, 0f3F800000;
	sub.f32 	%f340, %f339, %f338;
	mul.f32 	%f341, %f39, %f1442;
	mul.f32 	%f342, %f341, %f341;
	sub.f32 	%f343, %f340, %f342;
	max.f32 	%f344, %f325, %f343;
	sqrt.rn.f32 	%f345, %f344;
	mul.f32 	%f346, %f20, %f341;
	mul.f32 	%f347, %f21, %f341;
	mul.f32 	%f348, %f22, %f341;
	fma.rn.f32 	%f349, %f23, %f56, %f346;
	fma.rn.f32 	%f350, %f24, %f56, %f347;
	fma.rn.f32 	%f351, %f25, %f56, %f348;
	fma.rn.f32 	%f352, %f241, %f345, %f349;
	fma.rn.f32 	%f353, %f242, %f345, %f350;
	fma.rn.f32 	%f354, %f243, %f345, %f351;
	add.f32 	%f355, %f241, %f352;
	add.f32 	%f356, %f242, %f353;
	add.f32 	%f357, %f243, %f354;
	mul.f32 	%f358, %f27, %f355;
	mul.f32 	%f359, %f27, %f356;
	mul.f32 	%f360, %f27, %f357;
	sub.f32 	%f361, %f358, %f241;
	sub.f32 	%f362, %f359, %f242;
	sub.f32 	%f363, %f360, %f243;
	mul.f32 	%f364, %f362, %f362;
	fma.rn.f32 	%f365, %f361, %f361, %f364;
	fma.rn.f32 	%f366, %f363, %f363, %f365;
	sqrt.rn.f32 	%f367, %f366;
	rcp.rn.f32 	%f368, %f367;
	mul.f32 	%f332, %f368, %f361;
	mul.f32 	%f333, %f368, %f362;
	mul.f32 	%f334, %f368, %f363;
	mov.f32 	%f374, 0f38D1B717;
	max.f32 	%f375, %f373, %f374;
	mul.f32 	%f335, %f28, %f375;
	mov.f32 	%f336, 0f6C4ECB8F;
	mov.u32 	%r171, 2;
	mov.u32 	%r172, 1;
	mov.u32 	%r173, 3;
	mov.u32 	%r176, 1065353216;
	mov.u32 	%r205, 0;
	// begin inline asm
	call(%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166),_optix_trace_typed_32,(%r205,%rd3,%f17,%f18,%f19,%f332,%f333,%f334,%f335,%f336,%f325,%r172,%r205,%r172,%r171,%r172,%r173,%r176,%r176,%r176,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205);
	// end inline asm
	mov.b32 	%f376, %r135;
	mov.b32 	%f377, %r136;
	mov.b32 	%f378, %r137;
	add.f32 	%f1436, %f1436, %f376;
	add.f32 	%f1435, %f1435, %f377;
	add.f32 	%f1434, %f1434, %f378;
	add.s32 	%r365, %r365, 1;
	setp.lt.s32 	%p39, %r365, %r5;
	@%p39 bra 	$L__BB0_8;

	add.s32 	%r363, %r363, 1;
	setp.lt.s32 	%p40, %r363, %r5;
	@%p40 bra 	$L__BB0_7;

$L__BB0_34:
	setp.eq.s32 	%p41, %r5, 0;
	mov.f32 	%f1446, 0f3F800000;
	mov.f32 	%f1447, %f1446;
	mov.f32 	%f1448, %f1446;
	@%p41 bra 	$L__BB0_36;

	mul.lo.s32 	%r206, %r5, %r5;
	cvt.rn.f32.s32 	%f382, %r206;
	rcp.rn.f32 	%f383, %f382;
	mul.f32 	%f1446, %f1436, %f383;
	mul.f32 	%f1447, %f1435, %f383;
	mul.f32 	%f1448, %f1434, %f383;

$L__BB0_36:
	mul.f32 	%f385, %f15, %f24;
	fma.rn.f32 	%f386, %f14, %f23, %f385;
	fma.rn.f32 	%f387, %f16, %f25, %f386;
	ld.const.v4.f32 	{%f388, %f389, %f390, %f391}, [params+560];
	fma.rn.f32 	%f396, %f387, %f388, %f390;
	mul.f32 	%f397, %f15, %f21;
	fma.rn.f32 	%f398, %f14, %f20, %f397;
	fma.rn.f32 	%f399, %f16, %f22, %f398;
	fma.rn.f32 	%f400, %f399, %f389, %f391;
	ld.const.u64 	%rd65, [params+552];
	tex.2d.v4.f32.f32 	{%f401, %f402, %f403, %f404}, [%rd65, {%f396, %f400}];
	min.f32 	%f405, %f401, %f402;
	min.f32 	%f406, %f405, %f403;
	mul.f32 	%f76, %f1446, %f406;
	ld.const.f32 	%f407, [params+524];
	mul.f32 	%f408, %f1446, %f407;
	ld.const.v2.f32 	{%f409, %f410}, [params+528];
	mul.f32 	%f413, %f1447, %f409;
	mul.f32 	%f414, %f1448, %f410;
	mul.f32 	%f77, %f401, %f408;
	mul.f32 	%f78, %f402, %f413;
	mul.f32 	%f79, %f403, %f414;
	cvt.sat.f32.f32 	%f415, %f13;
	mul.f32 	%f80, %f77, %f415;
	mul.f32 	%f81, %f78, %f415;
	mul.f32 	%f82, %f415, %f79;
	fma.rn.f32 	%f416, %f13, 0f3F000000, 0f3F000000;
	cvt.sat.f32.f32 	%f417, %f416;
	add.f32 	%f83, %f417, %f417;
	mov.f32 	%f421, 0f41A00000;
	abs.f32 	%f85, %f83;
	setp.lt.f32 	%p42, %f85, 0f00800000;
	mul.f32 	%f423, %f85, 0f4B800000;
	selp.f32 	%f424, %f423, %f85, %p42;
	selp.f32 	%f425, 0fC3170000, 0fC2FE0000, %p42;
	mov.b32 	%r207, %f424;
	and.b32  	%r208, %r207, 8388607;
	or.b32  	%r209, %r208, 1065353216;
	mov.b32 	%f426, %r209;
	shr.u32 	%r210, %r207, 23;
	cvt.rn.f32.u32 	%f427, %r210;
	add.f32 	%f428, %f425, %f427;
	setp.gt.f32 	%p43, %f426, 0f3FB504F3;
	mul.f32 	%f429, %f426, 0f3F000000;
	add.f32 	%f430, %f428, 0f3F800000;
	selp.f32 	%f431, %f430, %f428, %p43;
	selp.f32 	%f432, %f429, %f426, %p43;
	add.f32 	%f433, %f432, 0fBF800000;
	add.f32 	%f434, %f432, 0f3F800000;
	rcp.approx.ftz.f32 	%f435, %f434;
	add.f32 	%f436, %f433, %f433;
	mul.f32 	%f437, %f436, %f435;
	mul.f32 	%f438, %f437, %f437;
	mov.f32 	%f439, 0f3C4CAF63;
	mov.f32 	%f440, 0f3B18F0FE;
	fma.rn.f32 	%f441, %f440, %f438, %f439;
	mov.f32 	%f442, 0f3DAAAABD;
	fma.rn.f32 	%f443, %f441, %f438, %f442;
	mul.rn.f32 	%f444, %f443, %f438;
	mul.rn.f32 	%f445, %f444, %f437;
	sub.f32 	%f446, %f433, %f437;
	add.f32 	%f447, %f446, %f446;
	neg.f32 	%f448, %f437;
	fma.rn.f32 	%f449, %f448, %f433, %f447;
	mul.rn.f32 	%f450, %f435, %f449;
	add.f32 	%f451, %f445, %f437;
	sub.f32 	%f452, %f437, %f451;
	add.f32 	%f453, %f445, %f452;
	add.f32 	%f454, %f450, %f453;
	add.f32 	%f455, %f451, %f454;
	sub.f32 	%f456, %f451, %f455;
	add.f32 	%f457, %f454, %f456;
	mov.f32 	%f458, 0f3F317200;
	mul.rn.f32 	%f459, %f431, %f458;
	mov.f32 	%f460, 0f35BFBE8E;
	mul.rn.f32 	%f461, %f431, %f460;
	add.f32 	%f462, %f459, %f455;
	sub.f32 	%f463, %f459, %f462;
	add.f32 	%f464, %f455, %f463;
	add.f32 	%f465, %f457, %f464;
	add.f32 	%f466, %f461, %f465;
	add.f32 	%f467, %f462, %f466;
	sub.f32 	%f468, %f462, %f467;
	add.f32 	%f469, %f466, %f468;
	mul.rn.f32 	%f470, %f421, %f467;
	neg.f32 	%f471, %f470;
	fma.rn.f32 	%f472, %f421, %f467, %f471;
	fma.rn.f32 	%f473, %f421, %f469, %f472;
	mov.f32 	%f474, 0f00000000;
	fma.rn.f32 	%f475, %f474, %f467, %f473;
	add.rn.f32 	%f476, %f470, %f475;
	neg.f32 	%f477, %f476;
	add.rn.f32 	%f478, %f470, %f477;
	add.rn.f32 	%f479, %f478, %f475;
	mov.b32 	%r211, %f476;
	setp.eq.s32 	%p44, %r211, 1118925336;
	add.s32 	%r212, %r211, -1;
	mov.b32 	%f480, %r212;
	add.f32 	%f481, %f479, 0f37000000;
	selp.f32 	%f86, %f481, %f479, %p44;
	selp.f32 	%f482, %f480, %f476, %p44;
	mov.f32 	%f483, 0f3FB8AA3B;
	mul.rn.f32 	%f484, %f482, %f483;
	cvt.rzi.f32.f32 	%f485, %f484;
	abs.f32 	%f486, %f485;
	setp.gt.f32 	%p45, %f486, 0f42FC0000;
	mov.b32 	%r213, %f485;
	and.b32  	%r214, %r213, -2147483648;
	or.b32  	%r215, %r214, 1123811328;
	mov.b32 	%f487, %r215;
	selp.f32 	%f488, %f487, %f485, %p45;
	mov.f32 	%f489, 0fBF317218;
	fma.rn.f32 	%f490, %f488, %f489, %f482;
	mov.f32 	%f491, 0f3102E308;
	fma.rn.f32 	%f492, %f488, %f491, %f490;
	mul.f32 	%f493, %f492, 0f3FB8AA3B;
	add.f32 	%f494, %f488, 0f4B40007F;
	mov.b32 	%r216, %f494;
	shl.b32 	%r217, %r216, 23;
	mov.b32 	%f495, %r217;
	ex2.approx.ftz.f32 	%f496, %f493;
	mul.f32 	%f87, %f496, %f495;
	setp.eq.f32 	%p46, %f87, 0f7F800000;
	mov.f32 	%f1449, 0f7F800000;
	@%p46 bra 	$L__BB0_38;

	fma.rn.f32 	%f1449, %f87, %f86, %f87;

$L__BB0_38:
	mov.f32 	%f1382, 0f41200000;
	cvt.rzi.f32.f32 	%f1381, %f1382;
	add.f32 	%f1380, %f1381, %f1381;
	mov.f32 	%f1379, 0f41A00000;
	sub.f32 	%f1378, %f1379, %f1380;
	abs.f32 	%f1377, %f1378;
	setp.lt.f32 	%p47, %f83, 0f00000000;
	setp.eq.f32 	%p48, %f1377, 0f3F800000;
	and.pred  	%p1, %p47, %p48;
	setp.eq.f32 	%p49, %f83, 0f00000000;
	@%p49 bra 	$L__BB0_42;
	bra.uni 	$L__BB0_39;

$L__BB0_42:
	add.f32 	%f501, %f83, %f83;
	selp.f32 	%f1451, %f501, 0f00000000, %p48;
	bra.uni 	$L__BB0_43;

$L__BB0_39:
	mov.b32 	%r218, %f1449;
	xor.b32  	%r219, %r218, -2147483648;
	mov.b32 	%f497, %r219;
	selp.f32 	%f1451, %f497, %f1449, %p1;
	setp.geu.f32 	%p50, %f83, 0f00000000;
	@%p50 bra 	$L__BB0_43;

	mov.f32 	%f498, 0f41A00000;
	cvt.rzi.f32.f32 	%f499, %f498;
	setp.eq.f32 	%p51, %f499, 0f41A00000;
	@%p51 bra 	$L__BB0_43;

	mov.f32 	%f1451, 0f7FFFFFFF;

$L__BB0_43:
	abs.f32 	%f1383, %f83;
	add.f32 	%f502, %f1383, 0f41A00000;
	mov.b32 	%r220, %f502;
	setp.lt.s32 	%p53, %r220, 2139095040;
	@%p53 bra 	$L__BB0_48;

	abs.f32 	%f1384, %f83;
	setp.gtu.f32 	%p54, %f1384, 0f7F800000;
	@%p54 bra 	$L__BB0_47;
	bra.uni 	$L__BB0_45;

$L__BB0_47:
	add.f32 	%f1451, %f83, 0f41A00000;
	bra.uni 	$L__BB0_48;

$L__BB0_45:
	abs.f32 	%f1385, %f83;
	setp.neu.f32 	%p55, %f1385, 0f7F800000;
	@%p55 bra 	$L__BB0_48;

	selp.f32 	%f1451, 0fFF800000, 0f7F800000, %p1;

$L__BB0_48:
	setp.eq.f32 	%p56, %f83, 0f3F800000;
	selp.f32 	%f503, 0f3F800000, %f1451, %p56;
	cvt.sat.f32.f32 	%f504, %f503;
	mul.f32 	%f96, %f77, %f504;
	mul.f32 	%f97, %f78, %f504;
	mul.f32 	%f98, %f79, %f504;
	ld.const.u32 	%r48, [params+104];
	and.b32  	%r221, %r48, 8;
	setp.eq.s32 	%p57, %r221, 0;
	@%p57 bra 	$L__BB0_62;

	ld.const.u32 	%r222, [params+184];
	mad.lo.s32 	%r223, %r222, %r4, %r3;
	cvt.u64.u32 	%rd16, %r223;
	mov.f32 	%f509, 0f3EE8BA2E;
	abs.f32 	%f100, %f76;
	setp.lt.f32 	%p58, %f100, 0f00800000;
	mul.f32 	%f511, %f100, 0f4B800000;
	selp.f32 	%f512, %f511, %f100, %p58;
	selp.f32 	%f513, 0fC3170000, 0fC2FE0000, %p58;
	mov.b32 	%r224, %f512;
	and.b32  	%r225, %r224, 8388607;
	or.b32  	%r226, %r225, 1065353216;
	mov.b32 	%f514, %r226;
	shr.u32 	%r227, %r224, 23;
	cvt.rn.f32.u32 	%f515, %r227;
	add.f32 	%f516, %f513, %f515;
	setp.gt.f32 	%p59, %f514, 0f3FB504F3;
	mul.f32 	%f517, %f514, 0f3F000000;
	add.f32 	%f518, %f516, 0f3F800000;
	selp.f32 	%f519, %f518, %f516, %p59;
	selp.f32 	%f520, %f517, %f514, %p59;
	add.f32 	%f521, %f520, 0fBF800000;
	add.f32 	%f522, %f520, 0f3F800000;
	rcp.approx.ftz.f32 	%f523, %f522;
	add.f32 	%f524, %f521, %f521;
	mul.f32 	%f525, %f524, %f523;
	mul.f32 	%f526, %f525, %f525;
	mov.f32 	%f527, 0f3C4CAF63;
	mov.f32 	%f528, 0f3B18F0FE;
	fma.rn.f32 	%f529, %f528, %f526, %f527;
	mov.f32 	%f530, 0f3DAAAABD;
	fma.rn.f32 	%f531, %f529, %f526, %f530;
	mul.rn.f32 	%f532, %f531, %f526;
	mul.rn.f32 	%f533, %f532, %f525;
	sub.f32 	%f534, %f521, %f525;
	add.f32 	%f535, %f534, %f534;
	neg.f32 	%f536, %f525;
	fma.rn.f32 	%f537, %f536, %f521, %f535;
	mul.rn.f32 	%f538, %f523, %f537;
	add.f32 	%f539, %f533, %f525;
	sub.f32 	%f540, %f525, %f539;
	add.f32 	%f541, %f533, %f540;
	add.f32 	%f542, %f538, %f541;
	add.f32 	%f543, %f539, %f542;
	sub.f32 	%f544, %f539, %f543;
	add.f32 	%f545, %f542, %f544;
	mov.f32 	%f546, 0f3F317200;
	mul.rn.f32 	%f547, %f519, %f546;
	mov.f32 	%f548, 0f35BFBE8E;
	mul.rn.f32 	%f549, %f519, %f548;
	add.f32 	%f550, %f547, %f543;
	sub.f32 	%f551, %f547, %f550;
	add.f32 	%f552, %f543, %f551;
	add.f32 	%f553, %f545, %f552;
	add.f32 	%f554, %f549, %f553;
	add.f32 	%f555, %f550, %f554;
	sub.f32 	%f556, %f550, %f555;
	add.f32 	%f557, %f554, %f556;
	mul.rn.f32 	%f558, %f509, %f555;
	neg.f32 	%f559, %f558;
	fma.rn.f32 	%f560, %f509, %f555, %f559;
	fma.rn.f32 	%f561, %f509, %f557, %f560;
	mov.f32 	%f562, 0f00000000;
	fma.rn.f32 	%f563, %f562, %f555, %f561;
	add.rn.f32 	%f564, %f558, %f563;
	neg.f32 	%f565, %f564;
	add.rn.f32 	%f566, %f558, %f565;
	add.rn.f32 	%f567, %f566, %f563;
	mov.b32 	%r228, %f564;
	setp.eq.s32 	%p60, %r228, 1118925336;
	add.s32 	%r229, %r228, -1;
	mov.b32 	%f568, %r229;
	add.f32 	%f569, %f567, 0f37000000;
	selp.f32 	%f101, %f569, %f567, %p60;
	selp.f32 	%f570, %f568, %f564, %p60;
	mov.f32 	%f571, 0f3FB8AA3B;
	mul.rn.f32 	%f572, %f570, %f571;
	cvt.rzi.f32.f32 	%f573, %f572;
	abs.f32 	%f574, %f573;
	setp.gt.f32 	%p61, %f574, 0f42FC0000;
	mov.b32 	%r230, %f573;
	and.b32  	%r231, %r230, -2147483648;
	or.b32  	%r232, %r231, 1123811328;
	mov.b32 	%f575, %r232;
	selp.f32 	%f576, %f575, %f573, %p61;
	mov.f32 	%f577, 0fBF317218;
	fma.rn.f32 	%f578, %f576, %f577, %f570;
	mov.f32 	%f579, 0f3102E308;
	fma.rn.f32 	%f580, %f576, %f579, %f578;
	mul.f32 	%f581, %f580, 0f3FB8AA3B;
	add.f32 	%f582, %f576, 0f4B40007F;
	mov.b32 	%r233, %f582;
	shl.b32 	%r234, %r233, 23;
	mov.b32 	%f583, %r234;
	ex2.approx.ftz.f32 	%f584, %f581;
	mul.f32 	%f102, %f584, %f583;
	setp.eq.f32 	%p62, %f102, 0f7F800000;
	mov.f32 	%f1452, 0f7F800000;
	@%p62 bra 	$L__BB0_51;

	fma.rn.f32 	%f1452, %f102, %f101, %f102;

$L__BB0_51:
	mov.f32 	%f1427, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f1426, %f1427;
	add.f32 	%f1425, %f1426, %f1426;
	mov.f32 	%f1424, 0f3EE8BA2E;
	sub.f32 	%f1423, %f1424, %f1425;
	abs.f32 	%f1422, %f1423;
	setp.lt.f32 	%p63, %f76, 0f00000000;
	setp.eq.f32 	%p64, %f1422, 0f3F800000;
	and.pred  	%p2, %p63, %p64;
	setp.eq.f32 	%p65, %f76, 0f00000000;
	@%p65 bra 	$L__BB0_55;
	bra.uni 	$L__BB0_52;

$L__BB0_55:
	add.f32 	%f589, %f76, %f76;
	selp.f32 	%f1454, %f589, 0f00000000, %p64;
	bra.uni 	$L__BB0_56;

$L__BB0_164:
	mov.f32 	%f1333, 0f00000000;
	mov.u32 	%r374, 0;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs128, %f1333;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs127, %f1333;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs126, %f1333;}

	// end inline asm
	mov.u16 	%rs129, 0;
	st.global.v4.u16 	[%rd24], {%rs126, %rs127, %rs128, %rs129};

$L__BB0_165:
	ld.const.u64 	%rd98, [params+256];
	cvta.to.global.u64 	%rd99, %rd98;
	ld.const.u32 	%r355, [params+248];
	mad.lo.s32 	%r356, %r355, %r4, %r3;
	mul.wide.u32 	%rd100, %r356, 8;
	add.s64 	%rd25, %rd99, %rd100;
	setp.eq.s32 	%p190, %r374, 0;
	@%p190 bra 	$L__BB0_167;

	ld.global.v4.u16 	{%rs136, %rs137, %rs138, %rs139}, [%rd25];
	// begin inline asm
	{  cvt.f32.f16 %f1334, %rs136;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1335, %rs137;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1336, %rs138;}

	// end inline asm
	add.f32 	%f1337, %f1334, 0f00000000;
	add.f32 	%f1338, %f1335, 0f00000000;
	add.f32 	%f1339, %f1336, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs135, %f1339;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs134, %f1338;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs133, %f1337;}

	// end inline asm
	mov.u16 	%rs140, 0;
	st.global.v4.u16 	[%rd25], {%rs133, %rs134, %rs135, %rs140};
	bra.uni 	$L__BB0_168;

$L__BB0_167:
	mov.f32 	%f1342, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs143, %f1342;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs142, %f1342;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs141, %f1342;}

	// end inline asm
	mov.u16 	%rs144, 0;
	st.global.v4.u16 	[%rd25], {%rs141, %rs142, %rs143, %rs144};

$L__BB0_168:
	ld.const.u64 	%rd101, [params+272];
	cvta.to.global.u64 	%rd102, %rd101;
	ld.const.u32 	%r357, [params+264];
	mad.lo.s32 	%r358, %r357, %r4, %r3;
	mul.wide.u32 	%rd103, %r358, 8;
	add.s64 	%rd26, %rd102, %rd103;
	@%p190 bra 	$L__BB0_170;

	ld.global.v4.u16 	{%rs151, %rs152, %rs153, %rs154}, [%rd26];
	// begin inline asm
	{  cvt.f32.f16 %f1343, %rs151;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1344, %rs152;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1345, %rs153;}

	// end inline asm
	add.f32 	%f1346, %f1343, 0f00000000;
	add.f32 	%f1347, %f1344, 0f00000000;
	add.f32 	%f1348, %f1345, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs150, %f1348;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs149, %f1347;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs148, %f1346;}

	// end inline asm
	mov.u16 	%rs155, 0;
	st.global.v4.u16 	[%rd26], {%rs148, %rs149, %rs150, %rs155};
	bra.uni 	$L__BB0_171;

$L__BB0_170:
	mov.f32 	%f1351, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs158, %f1351;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs157, %f1351;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs156, %f1351;}

	// end inline asm
	mov.u16 	%rs159, 0;
	st.global.v4.u16 	[%rd26], {%rs156, %rs157, %rs158, %rs159};

$L__BB0_171:
	ld.const.u64 	%rd104, [params+288];
	cvta.to.global.u64 	%rd105, %rd104;
	ld.const.u32 	%r359, [params+280];
	mad.lo.s32 	%r360, %r359, %r4, %r3;
	mul.wide.u32 	%rd106, %r360, 8;
	add.s64 	%rd27, %rd105, %rd106;
	@%p190 bra 	$L__BB0_173;

	ld.global.v4.u16 	{%rs166, %rs167, %rs168, %rs169}, [%rd27];
	// begin inline asm
	{  cvt.f32.f16 %f1352, %rs166;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1353, %rs167;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1354, %rs168;}

	// end inline asm
	add.f32 	%f1355, %f1352, 0f00000000;
	add.f32 	%f1356, %f1353, 0f00000000;
	add.f32 	%f1357, %f1354, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs165, %f1357;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs164, %f1356;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs163, %f1355;}

	// end inline asm
	mov.u16 	%rs170, 0;
	st.global.v4.u16 	[%rd27], {%rs163, %rs164, %rs165, %rs170};
	bra.uni 	$L__BB0_174;

$L__BB0_173:
	mov.f32 	%f1360, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs173, %f1360;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs172, %f1360;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs171, %f1360;}

	// end inline asm
	mov.u16 	%rs174, 0;
	st.global.v4.u16 	[%rd27], {%rs171, %rs172, %rs173, %rs174};
	bra.uni 	$L__BB0_174;

$L__BB0_52:
	mov.b32 	%r235, %f1452;
	xor.b32  	%r236, %r235, -2147483648;
	mov.b32 	%f585, %r236;
	selp.f32 	%f1454, %f585, %f1452, %p2;
	setp.geu.f32 	%p66, %f76, 0f00000000;
	@%p66 bra 	$L__BB0_56;

	mov.f32 	%f586, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f587, %f586;
	setp.eq.f32 	%p67, %f587, 0f3EE8BA2E;
	@%p67 bra 	$L__BB0_56;

	mov.f32 	%f1454, 0f7FFFFFFF;

$L__BB0_56:
	abs.f32 	%f1386, %f76;
	add.f32 	%f590, %f1386, 0f3EE8BA2E;
	mov.b32 	%r237, %f590;
	setp.lt.s32 	%p69, %r237, 2139095040;
	@%p69 bra 	$L__BB0_61;

	abs.f32 	%f1387, %f76;
	setp.gtu.f32 	%p70, %f1387, 0f7F800000;
	@%p70 bra 	$L__BB0_60;
	bra.uni 	$L__BB0_58;

$L__BB0_60:
	add.f32 	%f1454, %f76, 0f3EE8BA2E;
	bra.uni 	$L__BB0_61;

$L__BB0_58:
	abs.f32 	%f1388, %f76;
	setp.neu.f32 	%p71, %f1388, 0f7F800000;
	@%p71 bra 	$L__BB0_61;

	selp.f32 	%f1454, 0fFF800000, 0f7F800000, %p2;

$L__BB0_61:
	ld.const.u64 	%rd110, [params+192];
	cvta.to.global.u64 	%rd109, %rd110;
	mul.f32 	%f591, %f1454, 0f437F0000;
	setp.eq.f32 	%p72, %f76, 0f3F800000;
	selp.f32 	%f592, 0f437F0000, %f591, %p72;
	cvt.rzi.u32.f32 	%r238, %f592;
	shl.b64 	%rd67, %rd16, 1;
	add.s64 	%rd68, %rd109, %rd67;
	cvt.u16.u32 	%rs26, %r238;
	mov.u16 	%rs27, 255;
	st.global.v2.u8 	[%rd68], {%rs26, %rs27};

$L__BB0_62:
	ld.const.u32 	%r362, [params+104];
	and.b32  	%r239, %r362, 1;
	setp.eq.b32 	%p73, %r239, 1;
	mov.pred 	%p74, 0;
	xor.pred  	%p75, %p73, %p74;
	not.pred 	%p76, %p75;
	@%p76 bra 	$L__BB0_136;

	mov.f32 	%f597, 0f3EE66666;
	abs.f32 	%f112, %f80;
	setp.lt.f32 	%p77, %f112, 0f00800000;
	mul.f32 	%f599, %f112, 0f4B800000;
	selp.f32 	%f600, %f599, %f112, %p77;
	selp.f32 	%f601, 0fC3170000, 0fC2FE0000, %p77;
	mov.b32 	%r240, %f600;
	and.b32  	%r241, %r240, 8388607;
	or.b32  	%r242, %r241, 1065353216;
	mov.b32 	%f602, %r242;
	shr.u32 	%r243, %r240, 23;
	cvt.rn.f32.u32 	%f603, %r243;
	add.f32 	%f604, %f601, %f603;
	setp.gt.f32 	%p78, %f602, 0f3FB504F3;
	mul.f32 	%f605, %f602, 0f3F000000;
	add.f32 	%f606, %f604, 0f3F800000;
	selp.f32 	%f607, %f606, %f604, %p78;
	selp.f32 	%f608, %f605, %f602, %p78;
	add.f32 	%f609, %f608, 0fBF800000;
	add.f32 	%f610, %f608, 0f3F800000;
	rcp.approx.ftz.f32 	%f611, %f610;
	add.f32 	%f612, %f609, %f609;
	mul.f32 	%f613, %f612, %f611;
	mul.f32 	%f614, %f613, %f613;
	mov.f32 	%f615, 0f3C4CAF63;
	mov.f32 	%f616, 0f3B18F0FE;
	fma.rn.f32 	%f617, %f616, %f614, %f615;
	mov.f32 	%f618, 0f3DAAAABD;
	fma.rn.f32 	%f619, %f617, %f614, %f618;
	mul.rn.f32 	%f620, %f619, %f614;
	mul.rn.f32 	%f621, %f620, %f613;
	sub.f32 	%f622, %f609, %f613;
	add.f32 	%f623, %f622, %f622;
	neg.f32 	%f624, %f613;
	fma.rn.f32 	%f625, %f624, %f609, %f623;
	mul.rn.f32 	%f626, %f611, %f625;
	add.f32 	%f627, %f621, %f613;
	sub.f32 	%f628, %f613, %f627;
	add.f32 	%f629, %f621, %f628;
	add.f32 	%f630, %f626, %f629;
	add.f32 	%f631, %f627, %f630;
	sub.f32 	%f632, %f627, %f631;
	add.f32 	%f633, %f630, %f632;
	mov.f32 	%f634, 0f3F317200;
	mul.rn.f32 	%f635, %f607, %f634;
	mov.f32 	%f636, 0f35BFBE8E;
	mul.rn.f32 	%f637, %f607, %f636;
	add.f32 	%f638, %f635, %f631;
	sub.f32 	%f639, %f635, %f638;
	add.f32 	%f640, %f631, %f639;
	add.f32 	%f641, %f633, %f640;
	add.f32 	%f642, %f637, %f641;
	add.f32 	%f643, %f638, %f642;
	sub.f32 	%f644, %f638, %f643;
	add.f32 	%f645, %f642, %f644;
	mul.rn.f32 	%f646, %f597, %f643;
	neg.f32 	%f647, %f646;
	fma.rn.f32 	%f648, %f597, %f643, %f647;
	fma.rn.f32 	%f649, %f597, %f645, %f648;
	mov.f32 	%f650, 0f00000000;
	fma.rn.f32 	%f651, %f650, %f643, %f649;
	add.rn.f32 	%f652, %f646, %f651;
	neg.f32 	%f653, %f652;
	add.rn.f32 	%f654, %f646, %f653;
	add.rn.f32 	%f655, %f654, %f651;
	mov.b32 	%r244, %f652;
	setp.eq.s32 	%p79, %r244, 1118925336;
	add.s32 	%r245, %r244, -1;
	mov.b32 	%f656, %r245;
	add.f32 	%f657, %f655, 0f37000000;
	selp.f32 	%f113, %f657, %f655, %p79;
	selp.f32 	%f658, %f656, %f652, %p79;
	mov.f32 	%f659, 0f3FB8AA3B;
	mul.rn.f32 	%f660, %f658, %f659;
	cvt.rzi.f32.f32 	%f661, %f660;
	abs.f32 	%f662, %f661;
	setp.gt.f32 	%p80, %f662, 0f42FC0000;
	mov.b32 	%r246, %f661;
	and.b32  	%r247, %r246, -2147483648;
	or.b32  	%r248, %r247, 1123811328;
	mov.b32 	%f663, %r248;
	selp.f32 	%f664, %f663, %f661, %p80;
	mov.f32 	%f665, 0fBF317218;
	fma.rn.f32 	%f666, %f664, %f665, %f658;
	mov.f32 	%f667, 0f3102E308;
	fma.rn.f32 	%f668, %f664, %f667, %f666;
	mul.f32 	%f669, %f668, 0f3FB8AA3B;
	add.f32 	%f670, %f664, 0f4B40007F;
	mov.b32 	%r249, %f670;
	shl.b32 	%r250, %r249, 23;
	mov.b32 	%f671, %r250;
	ex2.approx.ftz.f32 	%f672, %f669;
	mul.f32 	%f114, %f672, %f671;
	setp.eq.f32 	%p81, %f114, 0f7F800000;
	mov.f32 	%f1455, 0f7F800000;
	@%p81 bra 	$L__BB0_65;

	fma.rn.f32 	%f1455, %f114, %f113, %f114;

$L__BB0_65:
	mov.f32 	%f1394, 0f3E666666;
	cvt.rzi.f32.f32 	%f1393, %f1394;
	add.f32 	%f1392, %f1393, %f1393;
	mov.f32 	%f1391, 0f3EE66666;
	sub.f32 	%f1390, %f1391, %f1392;
	abs.f32 	%f1389, %f1390;
	setp.lt.f32 	%p82, %f80, 0f00000000;
	setp.eq.f32 	%p83, %f1389, 0f3F800000;
	and.pred  	%p3, %p82, %p83;
	setp.eq.f32 	%p84, %f80, 0f00000000;
	@%p84 bra 	$L__BB0_69;
	bra.uni 	$L__BB0_66;

$L__BB0_69:
	add.f32 	%f677, %f80, %f80;
	selp.f32 	%f1457, %f677, 0f00000000, %p83;
	bra.uni 	$L__BB0_70;

$L__BB0_66:
	mov.b32 	%r251, %f1455;
	xor.b32  	%r252, %r251, -2147483648;
	mov.b32 	%f673, %r252;
	selp.f32 	%f1457, %f673, %f1455, %p3;
	setp.geu.f32 	%p85, %f80, 0f00000000;
	@%p85 bra 	$L__BB0_70;

	mov.f32 	%f674, 0f3EE66666;
	cvt.rzi.f32.f32 	%f675, %f674;
	setp.eq.f32 	%p86, %f675, 0f3EE66666;
	@%p86 bra 	$L__BB0_70;

	mov.f32 	%f1457, 0f7FFFFFFF;

$L__BB0_70:
	abs.f32 	%f1395, %f80;
	add.f32 	%f678, %f1395, 0f3EE66666;
	mov.b32 	%r253, %f678;
	setp.lt.s32 	%p88, %r253, 2139095040;
	@%p88 bra 	$L__BB0_75;

	abs.f32 	%f1396, %f80;
	setp.gtu.f32 	%p89, %f1396, 0f7F800000;
	@%p89 bra 	$L__BB0_74;
	bra.uni 	$L__BB0_72;

$L__BB0_74:
	add.f32 	%f1457, %f80, 0f3EE66666;
	bra.uni 	$L__BB0_75;

$L__BB0_72:
	abs.f32 	%f1397, %f80;
	setp.neu.f32 	%p90, %f1397, 0f7F800000;
	@%p90 bra 	$L__BB0_75;

	selp.f32 	%f1457, 0fFF800000, 0f7F800000, %p3;

$L__BB0_75:
	setp.eq.f32 	%p91, %f80, 0f3F800000;
	selp.f32 	%f123, 0f3F800000, %f1457, %p91;
	abs.f32 	%f124, %f81;
	setp.lt.f32 	%p92, %f124, 0f00800000;
	mul.f32 	%f680, %f124, 0f4B800000;
	selp.f32 	%f681, %f680, %f124, %p92;
	selp.f32 	%f682, 0fC3170000, 0fC2FE0000, %p92;
	mov.b32 	%r254, %f681;
	and.b32  	%r255, %r254, 8388607;
	or.b32  	%r256, %r255, 1065353216;
	mov.b32 	%f683, %r256;
	shr.u32 	%r257, %r254, 23;
	cvt.rn.f32.u32 	%f684, %r257;
	add.f32 	%f685, %f682, %f684;
	setp.gt.f32 	%p93, %f683, 0f3FB504F3;
	mul.f32 	%f686, %f683, 0f3F000000;
	add.f32 	%f687, %f685, 0f3F800000;
	selp.f32 	%f688, %f687, %f685, %p93;
	selp.f32 	%f689, %f686, %f683, %p93;
	add.f32 	%f690, %f689, 0fBF800000;
	add.f32 	%f691, %f689, 0f3F800000;
	rcp.approx.ftz.f32 	%f692, %f691;
	add.f32 	%f693, %f690, %f690;
	mul.f32 	%f694, %f693, %f692;
	mul.f32 	%f695, %f694, %f694;
	mov.f32 	%f696, 0f3C4CAF63;
	mov.f32 	%f697, 0f3B18F0FE;
	fma.rn.f32 	%f698, %f697, %f695, %f696;
	mov.f32 	%f699, 0f3DAAAABD;
	fma.rn.f32 	%f700, %f698, %f695, %f699;
	mul.rn.f32 	%f701, %f700, %f695;
	mul.rn.f32 	%f702, %f701, %f694;
	sub.f32 	%f703, %f690, %f694;
	add.f32 	%f704, %f703, %f703;
	neg.f32 	%f705, %f694;
	fma.rn.f32 	%f706, %f705, %f690, %f704;
	mul.rn.f32 	%f707, %f692, %f706;
	add.f32 	%f708, %f702, %f694;
	sub.f32 	%f709, %f694, %f708;
	add.f32 	%f710, %f702, %f709;
	add.f32 	%f711, %f707, %f710;
	add.f32 	%f712, %f708, %f711;
	sub.f32 	%f713, %f708, %f712;
	add.f32 	%f714, %f711, %f713;
	mov.f32 	%f715, 0f3F317200;
	mul.rn.f32 	%f716, %f688, %f715;
	mov.f32 	%f717, 0f35BFBE8E;
	mul.rn.f32 	%f718, %f688, %f717;
	add.f32 	%f719, %f716, %f712;
	sub.f32 	%f720, %f716, %f719;
	add.f32 	%f721, %f712, %f720;
	add.f32 	%f722, %f714, %f721;
	add.f32 	%f723, %f718, %f722;
	add.f32 	%f724, %f719, %f723;
	sub.f32 	%f725, %f719, %f724;
	add.f32 	%f726, %f723, %f725;
	mov.f32 	%f727, 0f3EE66666;
	mul.rn.f32 	%f728, %f727, %f724;
	neg.f32 	%f729, %f728;
	fma.rn.f32 	%f730, %f727, %f724, %f729;
	fma.rn.f32 	%f731, %f727, %f726, %f730;
	mov.f32 	%f732, 0f00000000;
	fma.rn.f32 	%f733, %f732, %f724, %f731;
	add.rn.f32 	%f734, %f728, %f733;
	neg.f32 	%f735, %f734;
	add.rn.f32 	%f736, %f728, %f735;
	add.rn.f32 	%f737, %f736, %f733;
	mov.b32 	%r258, %f734;
	setp.eq.s32 	%p94, %r258, 1118925336;
	add.s32 	%r259, %r258, -1;
	mov.b32 	%f738, %r259;
	add.f32 	%f739, %f737, 0f37000000;
	selp.f32 	%f125, %f739, %f737, %p94;
	selp.f32 	%f740, %f738, %f734, %p94;
	mov.f32 	%f741, 0f3FB8AA3B;
	mul.rn.f32 	%f742, %f740, %f741;
	cvt.rzi.f32.f32 	%f743, %f742;
	abs.f32 	%f744, %f743;
	setp.gt.f32 	%p95, %f744, 0f42FC0000;
	mov.b32 	%r260, %f743;
	and.b32  	%r261, %r260, -2147483648;
	or.b32  	%r262, %r261, 1123811328;
	mov.b32 	%f745, %r262;
	selp.f32 	%f746, %f745, %f743, %p95;
	mov.f32 	%f747, 0fBF317218;
	fma.rn.f32 	%f748, %f746, %f747, %f740;
	mov.f32 	%f749, 0f3102E308;
	fma.rn.f32 	%f750, %f746, %f749, %f748;
	mul.f32 	%f751, %f750, 0f3FB8AA3B;
	add.f32 	%f752, %f746, 0f4B40007F;
	mov.b32 	%r263, %f752;
	shl.b32 	%r264, %r263, 23;
	mov.b32 	%f753, %r264;
	ex2.approx.ftz.f32 	%f754, %f751;
	mul.f32 	%f126, %f754, %f753;
	setp.eq.f32 	%p96, %f126, 0f7F800000;
	mov.f32 	%f1458, 0f7F800000;
	@%p96 bra 	$L__BB0_77;

	fma.rn.f32 	%f1458, %f126, %f125, %f126;

$L__BB0_77:
	setp.lt.f32 	%p97, %f81, 0f00000000;
	and.pred  	%p4, %p97, %p83;
	setp.eq.f32 	%p99, %f81, 0f00000000;
	@%p99 bra 	$L__BB0_81;
	bra.uni 	$L__BB0_78;

$L__BB0_81:
	add.f32 	%f759, %f81, %f81;
	selp.f32 	%f1460, %f759, 0f00000000, %p83;
	bra.uni 	$L__BB0_82;

$L__BB0_78:
	mov.b32 	%r265, %f1458;
	xor.b32  	%r266, %r265, -2147483648;
	mov.b32 	%f755, %r266;
	selp.f32 	%f1460, %f755, %f1458, %p4;
	setp.geu.f32 	%p100, %f81, 0f00000000;
	@%p100 bra 	$L__BB0_82;

	mov.f32 	%f756, 0f3EE66666;
	cvt.rzi.f32.f32 	%f757, %f756;
	setp.eq.f32 	%p101, %f757, 0f3EE66666;
	@%p101 bra 	$L__BB0_82;

	mov.f32 	%f1460, 0f7FFFFFFF;

$L__BB0_82:
	abs.f32 	%f1398, %f81;
	add.f32 	%f760, %f1398, 0f3EE66666;
	mov.b32 	%r267, %f760;
	setp.lt.s32 	%p103, %r267, 2139095040;
	@%p103 bra 	$L__BB0_87;

	abs.f32 	%f1399, %f81;
	setp.gtu.f32 	%p104, %f1399, 0f7F800000;
	@%p104 bra 	$L__BB0_86;
	bra.uni 	$L__BB0_84;

$L__BB0_86:
	add.f32 	%f1460, %f81, 0f3EE66666;
	bra.uni 	$L__BB0_87;

$L__BB0_84:
	abs.f32 	%f1400, %f81;
	setp.neu.f32 	%p105, %f1400, 0f7F800000;
	@%p105 bra 	$L__BB0_87;

	selp.f32 	%f1460, 0fFF800000, 0f7F800000, %p4;

$L__BB0_87:
	setp.eq.f32 	%p106, %f81, 0f3F800000;
	selp.f32 	%f135, 0f3F800000, %f1460, %p106;
	abs.f32 	%f136, %f82;
	setp.lt.f32 	%p107, %f136, 0f00800000;
	mul.f32 	%f762, %f136, 0f4B800000;
	selp.f32 	%f763, %f762, %f136, %p107;
	selp.f32 	%f764, 0fC3170000, 0fC2FE0000, %p107;
	mov.b32 	%r268, %f763;
	and.b32  	%r269, %r268, 8388607;
	or.b32  	%r270, %r269, 1065353216;
	mov.b32 	%f765, %r270;
	shr.u32 	%r271, %r268, 23;
	cvt.rn.f32.u32 	%f766, %r271;
	add.f32 	%f767, %f764, %f766;
	setp.gt.f32 	%p108, %f765, 0f3FB504F3;
	mul.f32 	%f768, %f765, 0f3F000000;
	add.f32 	%f769, %f767, 0f3F800000;
	selp.f32 	%f770, %f769, %f767, %p108;
	selp.f32 	%f771, %f768, %f765, %p108;
	add.f32 	%f772, %f771, 0fBF800000;
	add.f32 	%f773, %f771, 0f3F800000;
	rcp.approx.ftz.f32 	%f774, %f773;
	add.f32 	%f775, %f772, %f772;
	mul.f32 	%f776, %f775, %f774;
	mul.f32 	%f777, %f776, %f776;
	mov.f32 	%f778, 0f3C4CAF63;
	mov.f32 	%f779, 0f3B18F0FE;
	fma.rn.f32 	%f780, %f779, %f777, %f778;
	mov.f32 	%f781, 0f3DAAAABD;
	fma.rn.f32 	%f782, %f780, %f777, %f781;
	mul.rn.f32 	%f783, %f782, %f777;
	mul.rn.f32 	%f784, %f783, %f776;
	sub.f32 	%f785, %f772, %f776;
	add.f32 	%f786, %f785, %f785;
	neg.f32 	%f787, %f776;
	fma.rn.f32 	%f788, %f787, %f772, %f786;
	mul.rn.f32 	%f789, %f774, %f788;
	add.f32 	%f790, %f784, %f776;
	sub.f32 	%f791, %f776, %f790;
	add.f32 	%f792, %f784, %f791;
	add.f32 	%f793, %f789, %f792;
	add.f32 	%f794, %f790, %f793;
	sub.f32 	%f795, %f790, %f794;
	add.f32 	%f796, %f793, %f795;
	mov.f32 	%f797, 0f3F317200;
	mul.rn.f32 	%f798, %f770, %f797;
	mov.f32 	%f799, 0f35BFBE8E;
	mul.rn.f32 	%f800, %f770, %f799;
	add.f32 	%f801, %f798, %f794;
	sub.f32 	%f802, %f798, %f801;
	add.f32 	%f803, %f794, %f802;
	add.f32 	%f804, %f796, %f803;
	add.f32 	%f805, %f800, %f804;
	add.f32 	%f806, %f801, %f805;
	sub.f32 	%f807, %f801, %f806;
	add.f32 	%f808, %f805, %f807;
	mov.f32 	%f809, 0f3EE66666;
	mul.rn.f32 	%f810, %f809, %f806;
	neg.f32 	%f811, %f810;
	fma.rn.f32 	%f812, %f809, %f806, %f811;
	fma.rn.f32 	%f813, %f809, %f808, %f812;
	mov.f32 	%f814, 0f00000000;
	fma.rn.f32 	%f815, %f814, %f806, %f813;
	add.rn.f32 	%f816, %f810, %f815;
	neg.f32 	%f817, %f816;
	add.rn.f32 	%f818, %f810, %f817;
	add.rn.f32 	%f819, %f818, %f815;
	mov.b32 	%r272, %f816;
	setp.eq.s32 	%p109, %r272, 1118925336;
	add.s32 	%r273, %r272, -1;
	mov.b32 	%f820, %r273;
	add.f32 	%f821, %f819, 0f37000000;
	selp.f32 	%f137, %f821, %f819, %p109;
	selp.f32 	%f822, %f820, %f816, %p109;
	mov.f32 	%f823, 0f3FB8AA3B;
	mul.rn.f32 	%f824, %f822, %f823;
	cvt.rzi.f32.f32 	%f825, %f824;
	abs.f32 	%f826, %f825;
	setp.gt.f32 	%p110, %f826, 0f42FC0000;
	mov.b32 	%r274, %f825;
	and.b32  	%r275, %r274, -2147483648;
	or.b32  	%r276, %r275, 1123811328;
	mov.b32 	%f827, %r276;
	selp.f32 	%f828, %f827, %f825, %p110;
	mov.f32 	%f829, 0fBF317218;
	fma.rn.f32 	%f830, %f828, %f829, %f822;
	mov.f32 	%f831, 0f3102E308;
	fma.rn.f32 	%f832, %f828, %f831, %f830;
	mul.f32 	%f833, %f832, 0f3FB8AA3B;
	add.f32 	%f834, %f828, 0f4B40007F;
	mov.b32 	%r277, %f834;
	shl.b32 	%r278, %r277, 23;
	mov.b32 	%f835, %r278;
	ex2.approx.ftz.f32 	%f836, %f833;
	mul.f32 	%f138, %f836, %f835;
	setp.eq.f32 	%p111, %f138, 0f7F800000;
	mov.f32 	%f1461, 0f7F800000;
	@%p111 bra 	$L__BB0_89;

	fma.rn.f32 	%f1461, %f138, %f137, %f138;

$L__BB0_89:
	setp.lt.f32 	%p112, %f82, 0f00000000;
	and.pred  	%p5, %p112, %p83;
	setp.eq.f32 	%p114, %f82, 0f00000000;
	@%p114 bra 	$L__BB0_93;
	bra.uni 	$L__BB0_90;

$L__BB0_93:
	add.f32 	%f841, %f82, %f82;
	selp.f32 	%f1463, %f841, 0f00000000, %p83;
	bra.uni 	$L__BB0_94;

$L__BB0_90:
	mov.b32 	%r279, %f1461;
	xor.b32  	%r280, %r279, -2147483648;
	mov.b32 	%f837, %r280;
	selp.f32 	%f1463, %f837, %f1461, %p5;
	setp.geu.f32 	%p115, %f82, 0f00000000;
	@%p115 bra 	$L__BB0_94;

	mov.f32 	%f838, 0f3EE66666;
	cvt.rzi.f32.f32 	%f839, %f838;
	setp.eq.f32 	%p116, %f839, 0f3EE66666;
	@%p116 bra 	$L__BB0_94;

	mov.f32 	%f1463, 0f7FFFFFFF;

$L__BB0_94:
	abs.f32 	%f1401, %f82;
	add.f32 	%f842, %f1401, 0f3EE66666;
	mov.b32 	%r281, %f842;
	setp.lt.s32 	%p118, %r281, 2139095040;
	@%p118 bra 	$L__BB0_99;

	abs.f32 	%f1402, %f82;
	setp.gtu.f32 	%p119, %f1402, 0f7F800000;
	@%p119 bra 	$L__BB0_98;
	bra.uni 	$L__BB0_96;

$L__BB0_98:
	add.f32 	%f1463, %f82, 0f3EE66666;
	bra.uni 	$L__BB0_99;

$L__BB0_96:
	abs.f32 	%f1403, %f82;
	setp.neu.f32 	%p120, %f1403, 0f7F800000;
	@%p120 bra 	$L__BB0_99;

	selp.f32 	%f1463, 0fFF800000, 0f7F800000, %p5;

$L__BB0_99:
	setp.eq.f32 	%p121, %f82, 0f3F800000;
	mov.f32 	%f844, 0f3F800000;
	selp.f32 	%f845, 0f3F800000, %f1463, %p121;
	ld.const.u32 	%r282, [params+136];
	mad.lo.s32 	%r283, %r282, %r4, %r3;
	cvt.u64.u32 	%rd18, %r283;
	min.f32 	%f846, %f123, %f844;
	mov.f32 	%f847, 0f00000000;
	max.f32 	%f147, %f847, %f846;
	min.f32 	%f848, %f135, %f844;
	max.f32 	%f148, %f847, %f848;
	min.f32 	%f849, %f845, %f844;
	max.f32 	%f149, %f847, %f849;
	mov.f32 	%f853, 0f3ED55555;
	abs.f32 	%f151, %f147;
	setp.lt.f32 	%p122, %f151, 0f00800000;
	mul.f32 	%f855, %f151, 0f4B800000;
	selp.f32 	%f856, %f855, %f151, %p122;
	selp.f32 	%f857, 0fC3170000, 0fC2FE0000, %p122;
	mov.b32 	%r284, %f856;
	and.b32  	%r285, %r284, 8388607;
	or.b32  	%r286, %r285, 1065353216;
	mov.b32 	%f858, %r286;
	shr.u32 	%r287, %r284, 23;
	cvt.rn.f32.u32 	%f859, %r287;
	add.f32 	%f860, %f857, %f859;
	setp.gt.f32 	%p123, %f858, 0f3FB504F3;
	mul.f32 	%f861, %f858, 0f3F000000;
	add.f32 	%f862, %f860, 0f3F800000;
	selp.f32 	%f863, %f862, %f860, %p123;
	selp.f32 	%f864, %f861, %f858, %p123;
	add.f32 	%f865, %f864, 0fBF800000;
	add.f32 	%f866, %f864, 0f3F800000;
	rcp.approx.ftz.f32 	%f867, %f866;
	add.f32 	%f868, %f865, %f865;
	mul.f32 	%f869, %f868, %f867;
	mul.f32 	%f870, %f869, %f869;
	mov.f32 	%f871, 0f3C4CAF63;
	mov.f32 	%f872, 0f3B18F0FE;
	fma.rn.f32 	%f873, %f872, %f870, %f871;
	mov.f32 	%f874, 0f3DAAAABD;
	fma.rn.f32 	%f875, %f873, %f870, %f874;
	mul.rn.f32 	%f876, %f875, %f870;
	mul.rn.f32 	%f877, %f876, %f869;
	sub.f32 	%f878, %f865, %f869;
	add.f32 	%f879, %f878, %f878;
	neg.f32 	%f880, %f869;
	fma.rn.f32 	%f881, %f880, %f865, %f879;
	mul.rn.f32 	%f882, %f867, %f881;
	add.f32 	%f883, %f877, %f869;
	sub.f32 	%f884, %f869, %f883;
	add.f32 	%f885, %f877, %f884;
	add.f32 	%f886, %f882, %f885;
	add.f32 	%f887, %f883, %f886;
	sub.f32 	%f888, %f883, %f887;
	add.f32 	%f889, %f886, %f888;
	mov.f32 	%f890, 0f3F317200;
	mul.rn.f32 	%f891, %f863, %f890;
	mov.f32 	%f892, 0f35BFBE8E;
	mul.rn.f32 	%f893, %f863, %f892;
	add.f32 	%f894, %f891, %f887;
	sub.f32 	%f895, %f891, %f894;
	add.f32 	%f896, %f887, %f895;
	add.f32 	%f897, %f889, %f896;
	add.f32 	%f898, %f893, %f897;
	add.f32 	%f899, %f894, %f898;
	sub.f32 	%f900, %f894, %f899;
	add.f32 	%f901, %f898, %f900;
	mul.rn.f32 	%f902, %f853, %f899;
	neg.f32 	%f903, %f902;
	fma.rn.f32 	%f904, %f853, %f899, %f903;
	fma.rn.f32 	%f905, %f853, %f901, %f904;
	fma.rn.f32 	%f906, %f847, %f899, %f905;
	add.rn.f32 	%f907, %f902, %f906;
	neg.f32 	%f908, %f907;
	add.rn.f32 	%f909, %f902, %f908;
	add.rn.f32 	%f910, %f909, %f906;
	mov.b32 	%r288, %f907;
	setp.eq.s32 	%p124, %r288, 1118925336;
	add.s32 	%r289, %r288, -1;
	mov.b32 	%f911, %r289;
	add.f32 	%f912, %f910, 0f37000000;
	selp.f32 	%f152, %f912, %f910, %p124;
	selp.f32 	%f913, %f911, %f907, %p124;
	mov.f32 	%f914, 0f3FB8AA3B;
	mul.rn.f32 	%f915, %f913, %f914;
	cvt.rzi.f32.f32 	%f916, %f915;
	abs.f32 	%f917, %f916;
	setp.gt.f32 	%p125, %f917, 0f42FC0000;
	mov.b32 	%r290, %f916;
	and.b32  	%r291, %r290, -2147483648;
	or.b32  	%r292, %r291, 1123811328;
	mov.b32 	%f918, %r292;
	selp.f32 	%f919, %f918, %f916, %p125;
	mov.f32 	%f920, 0fBF317218;
	fma.rn.f32 	%f921, %f919, %f920, %f913;
	mov.f32 	%f922, 0f3102E308;
	fma.rn.f32 	%f923, %f919, %f922, %f921;
	mul.f32 	%f924, %f923, 0f3FB8AA3B;
	add.f32 	%f925, %f919, 0f4B40007F;
	mov.b32 	%r293, %f925;
	shl.b32 	%r294, %r293, 23;
	mov.b32 	%f926, %r294;
	ex2.approx.ftz.f32 	%f927, %f924;
	mul.f32 	%f153, %f927, %f926;
	setp.eq.f32 	%p126, %f153, 0f7F800000;
	mov.f32 	%f1464, 0f7F800000;
	@%p126 bra 	$L__BB0_101;

	fma.rn.f32 	%f1464, %f153, %f152, %f153;

$L__BB0_101:
	mov.f32 	%f1366, 0f3E555555;
	cvt.rzi.f32.f32 	%f1365, %f1366;
	add.f32 	%f1364, %f1365, %f1365;
	mov.f32 	%f1363, 0f3ED55555;
	sub.f32 	%f1362, %f1363, %f1364;
	abs.f32 	%f1361, %f1362;
	setp.lt.f32 	%p127, %f147, 0f00000000;
	setp.eq.f32 	%p128, %f1361, 0f3F800000;
	and.pred  	%p6, %p127, %p128;
	setp.eq.f32 	%p129, %f147, 0f00000000;
	@%p129 bra 	$L__BB0_105;
	bra.uni 	$L__BB0_102;

$L__BB0_105:
	add.f32 	%f932, %f147, %f147;
	selp.f32 	%f1466, %f932, 0f00000000, %p128;
	bra.uni 	$L__BB0_106;

$L__BB0_102:
	mov.b32 	%r295, %f1464;
	xor.b32  	%r296, %r295, -2147483648;
	mov.b32 	%f928, %r296;
	selp.f32 	%f1466, %f928, %f1464, %p6;
	setp.geu.f32 	%p130, %f147, 0f00000000;
	@%p130 bra 	$L__BB0_106;

	mov.f32 	%f929, 0f3ED55555;
	cvt.rzi.f32.f32 	%f930, %f929;
	setp.eq.f32 	%p131, %f930, 0f3ED55555;
	@%p131 bra 	$L__BB0_106;

	mov.f32 	%f1466, 0f7FFFFFFF;

$L__BB0_106:
	mov.f32 	%f1369, 0f00000000;
	max.f32 	%f1368, %f1369, %f846;
	abs.f32 	%f1367, %f1368;
	add.f32 	%f933, %f1367, 0f3ED55555;
	mov.b32 	%r297, %f933;
	setp.lt.s32 	%p133, %r297, 2139095040;
	@%p133 bra 	$L__BB0_111;

	mov.f32 	%f1372, 0f00000000;
	max.f32 	%f1371, %f1372, %f846;
	abs.f32 	%f1370, %f1371;
	setp.gtu.f32 	%p134, %f1370, 0f7F800000;
	@%p134 bra 	$L__BB0_110;
	bra.uni 	$L__BB0_108;

$L__BB0_110:
	add.f32 	%f1466, %f147, 0f3ED55555;
	bra.uni 	$L__BB0_111;

$L__BB0_108:
	mov.f32 	%f1375, 0f00000000;
	max.f32 	%f1374, %f1375, %f846;
	abs.f32 	%f1373, %f1374;
	setp.neu.f32 	%p135, %f1373, 0f7F800000;
	@%p135 bra 	$L__BB0_111;

	selp.f32 	%f1466, 0fFF800000, 0f7F800000, %p6;

$L__BB0_111:
	abs.f32 	%f162, %f148;
	setp.lt.f32 	%p136, %f162, 0f00800000;
	mul.f32 	%f935, %f162, 0f4B800000;
	selp.f32 	%f936, %f935, %f162, %p136;
	selp.f32 	%f937, 0fC3170000, 0fC2FE0000, %p136;
	mov.b32 	%r298, %f936;
	and.b32  	%r299, %r298, 8388607;
	or.b32  	%r300, %r299, 1065353216;
	mov.b32 	%f938, %r300;
	shr.u32 	%r301, %r298, 23;
	cvt.rn.f32.u32 	%f939, %r301;
	add.f32 	%f940, %f937, %f939;
	setp.gt.f32 	%p137, %f938, 0f3FB504F3;
	mul.f32 	%f941, %f938, 0f3F000000;
	add.f32 	%f942, %f940, 0f3F800000;
	selp.f32 	%f943, %f942, %f940, %p137;
	selp.f32 	%f944, %f941, %f938, %p137;
	add.f32 	%f945, %f944, 0fBF800000;
	add.f32 	%f946, %f944, 0f3F800000;
	rcp.approx.ftz.f32 	%f947, %f946;
	add.f32 	%f948, %f945, %f945;
	mul.f32 	%f949, %f948, %f947;
	mul.f32 	%f950, %f949, %f949;
	mov.f32 	%f951, 0f3C4CAF63;
	mov.f32 	%f952, 0f3B18F0FE;
	fma.rn.f32 	%f953, %f952, %f950, %f951;
	mov.f32 	%f954, 0f3DAAAABD;
	fma.rn.f32 	%f955, %f953, %f950, %f954;
	mul.rn.f32 	%f956, %f955, %f950;
	mul.rn.f32 	%f957, %f956, %f949;
	sub.f32 	%f958, %f945, %f949;
	add.f32 	%f959, %f958, %f958;
	neg.f32 	%f960, %f949;
	fma.rn.f32 	%f961, %f960, %f945, %f959;
	mul.rn.f32 	%f962, %f947, %f961;
	add.f32 	%f963, %f957, %f949;
	sub.f32 	%f964, %f949, %f963;
	add.f32 	%f965, %f957, %f964;
	add.f32 	%f966, %f962, %f965;
	add.f32 	%f967, %f963, %f966;
	sub.f32 	%f968, %f963, %f967;
	add.f32 	%f969, %f966, %f968;
	mov.f32 	%f970, 0f3F317200;
	mul.rn.f32 	%f971, %f943, %f970;
	mov.f32 	%f972, 0f35BFBE8E;
	mul.rn.f32 	%f973, %f943, %f972;
	add.f32 	%f974, %f971, %f967;
	sub.f32 	%f975, %f971, %f974;
	add.f32 	%f976, %f967, %f975;
	add.f32 	%f977, %f969, %f976;
	add.f32 	%f978, %f973, %f977;
	add.f32 	%f979, %f974, %f978;
	sub.f32 	%f980, %f974, %f979;
	add.f32 	%f981, %f978, %f980;
	mov.f32 	%f982, 0f3ED55555;
	mul.rn.f32 	%f983, %f982, %f979;
	neg.f32 	%f984, %f983;
	fma.rn.f32 	%f985, %f982, %f979, %f984;
	fma.rn.f32 	%f986, %f982, %f981, %f985;
	mov.f32 	%f987, 0f00000000;
	fma.rn.f32 	%f988, %f987, %f979, %f986;
	add.rn.f32 	%f989, %f983, %f988;
	neg.f32 	%f990, %f989;
	add.rn.f32 	%f991, %f983, %f990;
	add.rn.f32 	%f992, %f991, %f988;
	mov.b32 	%r302, %f989;
	setp.eq.s32 	%p138, %r302, 1118925336;
	add.s32 	%r303, %r302, -1;
	mov.b32 	%f993, %r303;
	add.f32 	%f994, %f992, 0f37000000;
	selp.f32 	%f163, %f994, %f992, %p138;
	selp.f32 	%f995, %f993, %f989, %p138;
	mov.f32 	%f996, 0f3FB8AA3B;
	mul.rn.f32 	%f997, %f995, %f996;
	cvt.rzi.f32.f32 	%f998, %f997;
	abs.f32 	%f999, %f998;
	setp.gt.f32 	%p139, %f999, 0f42FC0000;
	mov.b32 	%r304, %f998;
	and.b32  	%r305, %r304, -2147483648;
	or.b32  	%r306, %r305, 1123811328;
	mov.b32 	%f1000, %r306;
	selp.f32 	%f1001, %f1000, %f998, %p139;
	mov.f32 	%f1002, 0fBF317218;
	fma.rn.f32 	%f1003, %f1001, %f1002, %f995;
	mov.f32 	%f1004, 0f3102E308;
	fma.rn.f32 	%f1005, %f1001, %f1004, %f1003;
	mul.f32 	%f1006, %f1005, 0f3FB8AA3B;
	add.f32 	%f1007, %f1001, 0f4B40007F;
	mov.b32 	%r307, %f1007;
	shl.b32 	%r308, %r307, 23;
	mov.b32 	%f1008, %r308;
	ex2.approx.ftz.f32 	%f1009, %f1006;
	mul.f32 	%f164, %f1009, %f1008;
	setp.eq.f32 	%p140, %f164, 0f7F800000;
	mov.f32 	%f1467, 0f7F800000;
	@%p140 bra 	$L__BB0_113;

	fma.rn.f32 	%f1467, %f164, %f163, %f164;

$L__BB0_113:
	setp.lt.f32 	%p141, %f148, 0f00000000;
	and.pred  	%p7, %p141, %p128;
	setp.eq.f32 	%p143, %f148, 0f00000000;
	@%p143 bra 	$L__BB0_117;
	bra.uni 	$L__BB0_114;

$L__BB0_117:
	add.f32 	%f1014, %f148, %f148;
	selp.f32 	%f1469, %f1014, 0f00000000, %p128;
	bra.uni 	$L__BB0_118;

$L__BB0_114:
	mov.b32 	%r309, %f1467;
	xor.b32  	%r310, %r309, -2147483648;
	mov.b32 	%f1010, %r310;
	selp.f32 	%f1469, %f1010, %f1467, %p7;
	setp.geu.f32 	%p144, %f148, 0f00000000;
	@%p144 bra 	$L__BB0_118;

	mov.f32 	%f1011, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1012, %f1011;
	setp.eq.f32 	%p145, %f1012, 0f3ED55555;
	@%p145 bra 	$L__BB0_118;

	mov.f32 	%f1469, 0f7FFFFFFF;

$L__BB0_118:
	mov.f32 	%f1406, 0f00000000;
	max.f32 	%f1405, %f1406, %f848;
	abs.f32 	%f1404, %f1405;
	add.f32 	%f1015, %f1404, 0f3ED55555;
	mov.b32 	%r311, %f1015;
	setp.lt.s32 	%p147, %r311, 2139095040;
	@%p147 bra 	$L__BB0_123;

	mov.f32 	%f1409, 0f00000000;
	max.f32 	%f1408, %f1409, %f848;
	abs.f32 	%f1407, %f1408;
	setp.gtu.f32 	%p148, %f1407, 0f7F800000;
	@%p148 bra 	$L__BB0_122;
	bra.uni 	$L__BB0_120;

$L__BB0_122:
	add.f32 	%f1469, %f148, 0f3ED55555;
	bra.uni 	$L__BB0_123;

$L__BB0_120:
	mov.f32 	%f1412, 0f00000000;
	max.f32 	%f1411, %f1412, %f848;
	abs.f32 	%f1410, %f1411;
	setp.neu.f32 	%p149, %f1410, 0f7F800000;
	@%p149 bra 	$L__BB0_123;

	selp.f32 	%f1469, 0fFF800000, 0f7F800000, %p7;

$L__BB0_123:
	abs.f32 	%f173, %f149;
	setp.lt.f32 	%p150, %f173, 0f00800000;
	mul.f32 	%f1017, %f173, 0f4B800000;
	selp.f32 	%f1018, %f1017, %f173, %p150;
	selp.f32 	%f1019, 0fC3170000, 0fC2FE0000, %p150;
	mov.b32 	%r312, %f1018;
	and.b32  	%r313, %r312, 8388607;
	or.b32  	%r314, %r313, 1065353216;
	mov.b32 	%f1020, %r314;
	shr.u32 	%r315, %r312, 23;
	cvt.rn.f32.u32 	%f1021, %r315;
	add.f32 	%f1022, %f1019, %f1021;
	setp.gt.f32 	%p151, %f1020, 0f3FB504F3;
	mul.f32 	%f1023, %f1020, 0f3F000000;
	add.f32 	%f1024, %f1022, 0f3F800000;
	selp.f32 	%f1025, %f1024, %f1022, %p151;
	selp.f32 	%f1026, %f1023, %f1020, %p151;
	add.f32 	%f1027, %f1026, 0fBF800000;
	add.f32 	%f1028, %f1026, 0f3F800000;
	rcp.approx.ftz.f32 	%f1029, %f1028;
	add.f32 	%f1030, %f1027, %f1027;
	mul.f32 	%f1031, %f1030, %f1029;
	mul.f32 	%f1032, %f1031, %f1031;
	mov.f32 	%f1033, 0f3C4CAF63;
	mov.f32 	%f1034, 0f3B18F0FE;
	fma.rn.f32 	%f1035, %f1034, %f1032, %f1033;
	mov.f32 	%f1036, 0f3DAAAABD;
	fma.rn.f32 	%f1037, %f1035, %f1032, %f1036;
	mul.rn.f32 	%f1038, %f1037, %f1032;
	mul.rn.f32 	%f1039, %f1038, %f1031;
	sub.f32 	%f1040, %f1027, %f1031;
	add.f32 	%f1041, %f1040, %f1040;
	neg.f32 	%f1042, %f1031;
	fma.rn.f32 	%f1043, %f1042, %f1027, %f1041;
	mul.rn.f32 	%f1044, %f1029, %f1043;
	add.f32 	%f1045, %f1039, %f1031;
	sub.f32 	%f1046, %f1031, %f1045;
	add.f32 	%f1047, %f1039, %f1046;
	add.f32 	%f1048, %f1044, %f1047;
	add.f32 	%f1049, %f1045, %f1048;
	sub.f32 	%f1050, %f1045, %f1049;
	add.f32 	%f1051, %f1048, %f1050;
	mov.f32 	%f1052, 0f3F317200;
	mul.rn.f32 	%f1053, %f1025, %f1052;
	mov.f32 	%f1054, 0f35BFBE8E;
	mul.rn.f32 	%f1055, %f1025, %f1054;
	add.f32 	%f1056, %f1053, %f1049;
	sub.f32 	%f1057, %f1053, %f1056;
	add.f32 	%f1058, %f1049, %f1057;
	add.f32 	%f1059, %f1051, %f1058;
	add.f32 	%f1060, %f1055, %f1059;
	add.f32 	%f1061, %f1056, %f1060;
	sub.f32 	%f1062, %f1056, %f1061;
	add.f32 	%f1063, %f1060, %f1062;
	mov.f32 	%f1064, 0f3ED55555;
	mul.rn.f32 	%f1065, %f1064, %f1061;
	neg.f32 	%f1066, %f1065;
	fma.rn.f32 	%f1067, %f1064, %f1061, %f1066;
	fma.rn.f32 	%f1068, %f1064, %f1063, %f1067;
	mov.f32 	%f1069, 0f00000000;
	fma.rn.f32 	%f1070, %f1069, %f1061, %f1068;
	add.rn.f32 	%f1071, %f1065, %f1070;
	neg.f32 	%f1072, %f1071;
	add.rn.f32 	%f1073, %f1065, %f1072;
	add.rn.f32 	%f1074, %f1073, %f1070;
	mov.b32 	%r316, %f1071;
	setp.eq.s32 	%p152, %r316, 1118925336;
	add.s32 	%r317, %r316, -1;
	mov.b32 	%f1075, %r317;
	add.f32 	%f1076, %f1074, 0f37000000;
	selp.f32 	%f174, %f1076, %f1074, %p152;
	selp.f32 	%f1077, %f1075, %f1071, %p152;
	mov.f32 	%f1078, 0f3FB8AA3B;
	mul.rn.f32 	%f1079, %f1077, %f1078;
	cvt.rzi.f32.f32 	%f1080, %f1079;
	abs.f32 	%f1081, %f1080;
	setp.gt.f32 	%p153, %f1081, 0f42FC0000;
	mov.b32 	%r318, %f1080;
	and.b32  	%r319, %r318, -2147483648;
	or.b32  	%r320, %r319, 1123811328;
	mov.b32 	%f1082, %r320;
	selp.f32 	%f1083, %f1082, %f1080, %p153;
	mov.f32 	%f1084, 0fBF317218;
	fma.rn.f32 	%f1085, %f1083, %f1084, %f1077;
	mov.f32 	%f1086, 0f3102E308;
	fma.rn.f32 	%f1087, %f1083, %f1086, %f1085;
	mul.f32 	%f1088, %f1087, 0f3FB8AA3B;
	add.f32 	%f1089, %f1083, 0f4B40007F;
	mov.b32 	%r321, %f1089;
	shl.b32 	%r322, %r321, 23;
	mov.b32 	%f1090, %r322;
	ex2.approx.ftz.f32 	%f1091, %f1088;
	mul.f32 	%f175, %f1091, %f1090;
	setp.eq.f32 	%p154, %f175, 0f7F800000;
	mov.f32 	%f1470, 0f7F800000;
	@%p154 bra 	$L__BB0_125;

	fma.rn.f32 	%f1470, %f175, %f174, %f175;

$L__BB0_125:
	setp.lt.f32 	%p155, %f149, 0f00000000;
	and.pred  	%p8, %p155, %p128;
	setp.eq.f32 	%p157, %f149, 0f00000000;
	@%p157 bra 	$L__BB0_129;
	bra.uni 	$L__BB0_126;

$L__BB0_129:
	add.f32 	%f1096, %f149, %f149;
	selp.f32 	%f1472, %f1096, 0f00000000, %p128;
	bra.uni 	$L__BB0_130;

$L__BB0_126:
	mov.b32 	%r323, %f1470;
	xor.b32  	%r324, %r323, -2147483648;
	mov.b32 	%f1092, %r324;
	selp.f32 	%f1472, %f1092, %f1470, %p8;
	setp.geu.f32 	%p158, %f149, 0f00000000;
	@%p158 bra 	$L__BB0_130;

	mov.f32 	%f1093, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1094, %f1093;
	setp.eq.f32 	%p159, %f1094, 0f3ED55555;
	@%p159 bra 	$L__BB0_130;

	mov.f32 	%f1472, 0f7FFFFFFF;

$L__BB0_130:
	mov.f32 	%f1415, 0f00000000;
	max.f32 	%f1414, %f1415, %f849;
	abs.f32 	%f1413, %f1414;
	add.f32 	%f1097, %f1413, 0f3ED55555;
	mov.b32 	%r325, %f1097;
	setp.lt.s32 	%p161, %r325, 2139095040;
	@%p161 bra 	$L__BB0_135;

	mov.f32 	%f1418, 0f00000000;
	max.f32 	%f1417, %f1418, %f849;
	abs.f32 	%f1416, %f1417;
	setp.gtu.f32 	%p162, %f1416, 0f7F800000;
	@%p162 bra 	$L__BB0_134;
	bra.uni 	$L__BB0_132;

$L__BB0_134:
	add.f32 	%f1472, %f149, 0f3ED55555;
	bra.uni 	$L__BB0_135;

$L__BB0_132:
	mov.f32 	%f1421, 0f00000000;
	max.f32 	%f1420, %f1421, %f849;
	abs.f32 	%f1419, %f1420;
	setp.neu.f32 	%p163, %f1419, 0f7F800000;
	@%p163 bra 	$L__BB0_135;

	selp.f32 	%f1472, 0fFF800000, 0f7F800000, %p8;

$L__BB0_135:
	ld.const.u64 	%rd108, [params+144];
	cvta.to.global.u64 	%rd107, %rd108;
	fma.rn.f32 	%f1098, %f1466, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p164, %f147, 0f3F800000;
	mov.f32 	%f1099, 0f3F800000;
	selp.f32 	%f1100, 0f3F7FFFFF, %f1098, %p164;
	mul.f32 	%f1101, %f147, 0f414EB852;
	setp.lt.f32 	%p165, %f147, 0f3B4D2E1C;
	selp.f32 	%f1102, %f1101, %f1100, %p165;
	fma.rn.f32 	%f1103, %f1469, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p166, %f148, 0f3F800000;
	selp.f32 	%f1104, 0f3F7FFFFF, %f1103, %p166;
	mul.f32 	%f1105, %f148, 0f414EB852;
	setp.lt.f32 	%p167, %f148, 0f3B4D2E1C;
	selp.f32 	%f1106, %f1105, %f1104, %p167;
	fma.rn.f32 	%f1107, %f1472, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p168, %f149, 0f3F800000;
	selp.f32 	%f1108, 0f3F7FFFFF, %f1107, %p168;
	mul.f32 	%f1109, %f149, 0f414EB852;
	setp.lt.f32 	%p169, %f149, 0f3B4D2E1C;
	selp.f32 	%f1110, %f1109, %f1108, %p169;
	min.f32 	%f1111, %f1102, %f1099;
	mov.f32 	%f1112, 0f00000000;
	max.f32 	%f1113, %f1112, %f1111;
	mul.f32 	%f1114, %f1113, 0f43800000;
	cvt.rzi.u32.f32 	%r326, %f1114;
	min.u32 	%r327, %r326, 255;
	min.f32 	%f1115, %f1106, %f1099;
	max.f32 	%f1116, %f1112, %f1115;
	mul.f32 	%f1117, %f1116, 0f43800000;
	cvt.rzi.u32.f32 	%r328, %f1117;
	min.u32 	%r329, %r328, 255;
	min.f32 	%f1118, %f1110, %f1099;
	max.f32 	%f1119, %f1112, %f1118;
	mul.f32 	%f1120, %f1119, 0f43800000;
	cvt.rzi.u32.f32 	%r330, %f1120;
	min.u32 	%r331, %r330, 255;
	shl.b64 	%rd70, %rd18, 2;
	add.s64 	%rd71, %rd107, %rd70;
	cvt.u16.u32 	%rs28, %r331;
	cvt.u16.u32 	%rs29, %r329;
	cvt.u16.u32 	%rs30, %r327;
	mov.u16 	%rs31, 255;
	st.global.v4.u8 	[%rd71], {%rs30, %rs29, %rs28, %rs31};

$L__BB0_136:
	ld.const.u32 	%r361, [params+104];
	and.b32  	%r332, %r361, 4;
	setp.eq.s32 	%p170, %r332, 0;
	@%p170 bra 	$L__BB0_140;

	ld.const.u32 	%r333, [params+108];
	setp.eq.s32 	%p171, %r333, 0;
	ld.const.u64 	%rd72, [params+224];
	cvta.to.global.u64 	%rd73, %rd72;
	ld.const.u32 	%r334, [params+216];
	mad.lo.s32 	%r335, %r334, %r4, %r3;
	mul.wide.u32 	%rd74, %r335, 8;
	add.s64 	%rd19, %rd73, %rd74;
	@%p171 bra 	$L__BB0_139;

	ld.global.v4.u16 	{%rs39, %rs40, %rs41, %rs42}, [%rd19];
	// begin inline asm
	{  cvt.f32.f16 %f1121, %rs39;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1122, %rs40;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1123, %rs41;}

	// end inline asm
	add.f32 	%f1124, %f80, %f1121;
	add.f32 	%f1125, %f81, %f1122;
	add.f32 	%f1126, %f82, %f1123;
	mov.f32 	%f1127, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs37, %f1126;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs36, %f1125;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs35, %f1124;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs38, %f1127;}

	// end inline asm
	st.global.v4.u16 	[%rd19], {%rs35, %rs36, %rs37, %rs38};
	bra.uni 	$L__BB0_140;

$L__BB0_139:
	mov.f32 	%f1131, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs46, %f1131;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs45, %f82;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f81;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs43, %f80;}

	// end inline asm
	st.global.v4.u16 	[%rd19], {%rs43, %rs44, %rs45, %rs46};

$L__BB0_140:
	ld.const.u64 	%rd75, [params+464];
	cvta.to.global.u64 	%rd76, %rd75;
	ld.const.u32 	%r336, [params+456];
	mad.lo.s32 	%r337, %r336, %r54, %r53;
	mul.wide.u32 	%rd77, %r337, 4;
	add.s64 	%rd20, %rd76, %rd77;
	ld.global.v2.u8 	{%rs47, %rs179}, [%rd20];
	or.b16  	%rs49, %rs47, %rs179;
	and.b16  	%rs50, %rs49, 255;
	setp.eq.s16 	%p172, %rs50, 0;
	@%p172 bra 	$L__BB0_142;

	ld.global.u8 	%rs177, [%rd20+2];
	bra.uni 	$L__BB0_143;

$L__BB0_142:
	ld.global.u8 	%rs177, [%rd20+2];
	setp.eq.s16 	%p173, %rs177, 0;
	mov.f32 	%f1473, 0f00000000;
	mov.u16 	%rs179, 0;
	mov.u16 	%rs180, %rs179;
	mov.f32 	%f1474, %f1473;
	mov.f32 	%f1475, %f1473;
	@%p173 bra 	$L__BB0_144;

$L__BB0_143:
	mov.u16 	%rs180, %rs179;
	cvt.rn.f32.u16 	%f1135, %rs47;
	div.rn.f32 	%f1136, %f1135, 0f437F0000;
	fma.rn.f32 	%f1137, %f1136, 0f40000000, 0fBF800000;
	and.b16  	%rs55, %rs180, 255;
	cvt.rn.f32.u16 	%f1138, %rs55;
	div.rn.f32 	%f1139, %f1138, 0f437F0000;
	fma.rn.f32 	%f1140, %f1139, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f1141, %rs177;
	div.rn.f32 	%f1142, %f1141, 0f437F0000;
	fma.rn.f32 	%f1143, %f1142, 0f40000000, 0fBF800000;
	mul.f32 	%f1144, %f1140, %f1140;
	fma.rn.f32 	%f1145, %f1137, %f1137, %f1144;
	fma.rn.f32 	%f1146, %f1143, %f1143, %f1145;
	sqrt.rn.f32 	%f1147, %f1146;
	rcp.rn.f32 	%f1148, %f1147;
	mul.f32 	%f1475, %f1148, %f1143;
	mul.f32 	%f1474, %f1148, %f1140;
	mul.f32 	%f1473, %f1137, %f1148;
	mov.u16 	%rs179, %rs177;

$L__BB0_144:
	mul.f32 	%f1152, %f1429, %f1475;
	mul.f32 	%f1153, %f1430, %f1474;
	sub.f32 	%f1154, %f1152, %f1153;
	mul.f32 	%f1155, %f1430, %f1473;
	mul.f32 	%f1156, %f1428, %f1475;
	sub.f32 	%f1157, %f1155, %f1156;
	mul.f32 	%f1158, %f1428, %f1474;
	mul.f32 	%f1159, %f1429, %f1473;
	sub.f32 	%f1160, %f1158, %f1159;
	ld.global.u8 	%rs57, [%rd20+3];
	setp.eq.s16 	%p174, %rs57, 0;
	selp.f32 	%f190, 0fBF800000, 0f3F800000, %p174;
	mul.f32 	%f1161, %f1154, %f190;
	mul.f32 	%f1162, %f1157, %f190;
	mul.f32 	%f1163, %f1160, %f190;
	mul.f32 	%f1164, %f1161, 0f00000000;
	mul.f32 	%f1165, %f1162, 0f00000000;
	mul.f32 	%f1166, %f1163, 0f00000000;
	fma.rn.f32 	%f1167, %f1473, 0f3F5105EC, %f1164;
	fma.rn.f32 	%f1168, %f1474, 0f3F5105EC, %f1165;
	fma.rn.f32 	%f1169, %f1475, 0f3F5105EC, %f1166;
	mul.f32 	%f191, %f1428, 0f3F13CD3A;
	add.f32 	%f192, %f191, %f1167;
	mul.f32 	%f193, %f1429, 0f3F13CD3A;
	add.f32 	%f194, %f193, %f1168;
	mul.f32 	%f195, %f1430, 0f3F13CD3A;
	add.f32 	%f196, %f195, %f1169;
	or.b16  	%rs58, %rs47, %rs180;
	or.b16  	%rs15, %rs58, %rs179;
	and.b16  	%rs59, %rs15, 255;
	setp.eq.s16 	%p175, %rs59, 0;
	mov.f32 	%f1479, 0f00000000;
	mov.f32 	%f1476, %f1479;
	mov.f32 	%f1477, %f1479;
	mov.f32 	%f1478, %f1479;
	@%p175 bra 	$L__BB0_146;

	cvt.rn.f32.u16 	%f1170, %rs47;
	div.rn.f32 	%f1171, %f1170, 0f437F0000;
	fma.rn.f32 	%f1172, %f1171, 0f40000000, 0fBF800000;
	and.b16  	%rs61, %rs180, 255;
	cvt.rn.f32.u16 	%f1173, %rs61;
	div.rn.f32 	%f1174, %f1173, 0f437F0000;
	fma.rn.f32 	%f1175, %f1174, 0f40000000, 0fBF800000;
	and.b16  	%rs62, %rs179, 255;
	cvt.rn.f32.u16 	%f1176, %rs62;
	div.rn.f32 	%f1177, %f1176, 0f437F0000;
	fma.rn.f32 	%f1178, %f1177, 0f40000000, 0fBF800000;
	mul.f32 	%f1179, %f1175, %f1175;
	fma.rn.f32 	%f1180, %f1172, %f1172, %f1179;
	fma.rn.f32 	%f1181, %f1178, %f1178, %f1180;
	sqrt.rn.f32 	%f1182, %f1181;
	rcp.rn.f32 	%f1183, %f1182;
	mul.f32 	%f1478, %f1183, %f1178;
	mul.f32 	%f1477, %f1183, %f1175;
	mul.f32 	%f1476, %f1172, %f1183;

$L__BB0_146:
	mul.f32 	%f1187, %f1429, %f1478;
	mul.f32 	%f1188, %f1430, %f1477;
	sub.f32 	%f1189, %f1187, %f1188;
	mul.f32 	%f1190, %f1430, %f1476;
	mul.f32 	%f1191, %f1428, %f1478;
	sub.f32 	%f1192, %f1190, %f1191;
	mul.f32 	%f1193, %f1428, %f1477;
	mul.f32 	%f1194, %f1429, %f1476;
	sub.f32 	%f1195, %f1193, %f1194;
	mul.f32 	%f1196, %f1189, %f190;
	mul.f32 	%f1197, %f1192, %f190;
	mul.f32 	%f1198, %f1195, %f190;
	mul.f32 	%f1199, %f1476, 0f3ED105EC;
	mul.f32 	%f1200, %f1477, 0f3ED105EC;
	mul.f32 	%f1201, %f1478, 0f3ED105EC;
	mul.f32 	%f1202, %f1196, 0f3F3504F3;
	mul.f32 	%f1203, %f1197, 0f3F3504F3;
	mul.f32 	%f1204, %f1198, 0f3F3504F3;
	sub.f32 	%f1205, %f1202, %f1199;
	sub.f32 	%f1206, %f1203, %f1200;
	sub.f32 	%f1207, %f1204, %f1201;
	add.f32 	%f203, %f191, %f1205;
	add.f32 	%f204, %f193, %f1206;
	add.f32 	%f205, %f195, %f1207;
	mov.f32 	%f1480, %f1479;
	mov.f32 	%f1481, %f1479;
	@%p175 bra 	$L__BB0_148;

	cvt.rn.f32.u16 	%f1208, %rs47;
	div.rn.f32 	%f1209, %f1208, 0f437F0000;
	fma.rn.f32 	%f1210, %f1209, 0f40000000, 0fBF800000;
	and.b16  	%rs65, %rs180, 255;
	cvt.rn.f32.u16 	%f1211, %rs65;
	div.rn.f32 	%f1212, %f1211, 0f437F0000;
	fma.rn.f32 	%f1213, %f1212, 0f40000000, 0fBF800000;
	and.b16  	%rs66, %rs179, 255;
	cvt.rn.f32.u16 	%f1214, %rs66;
	div.rn.f32 	%f1215, %f1214, 0f437F0000;
	fma.rn.f32 	%f1216, %f1215, 0f40000000, 0fBF800000;
	mul.f32 	%f1217, %f1213, %f1213;
	fma.rn.f32 	%f1218, %f1210, %f1210, %f1217;
	fma.rn.f32 	%f1219, %f1216, %f1216, %f1218;
	sqrt.rn.f32 	%f1220, %f1219;
	rcp.rn.f32 	%f1221, %f1220;
	mul.f32 	%f1481, %f1221, %f1216;
	mul.f32 	%f1480, %f1221, %f1213;
	mul.f32 	%f1479, %f1210, %f1221;

$L__BB0_148:
	mul.f32 	%f1222, %f1429, %f1481;
	mul.f32 	%f1223, %f1430, %f1480;
	sub.f32 	%f1224, %f1222, %f1223;
	mul.f32 	%f1225, %f1430, %f1479;
	mul.f32 	%f1226, %f1428, %f1481;
	sub.f32 	%f1227, %f1225, %f1226;
	mul.f32 	%f1228, %f1428, %f1480;
	mul.f32 	%f1229, %f1429, %f1479;
	sub.f32 	%f1230, %f1228, %f1229;
	mul.f32 	%f1231, %f1224, %f190;
	mul.f32 	%f1232, %f1227, %f190;
	mul.f32 	%f1233, %f1230, %f190;
	mul.f32 	%f1234, %f1479, 0f3ED105EC;
	mul.f32 	%f1235, %f1480, 0f3ED105EC;
	mul.f32 	%f1236, %f1481, 0f3ED105EC;
	mul.f32 	%f1237, %f1231, 0fBF3504F3;
	mul.f32 	%f1238, %f1232, 0fBF3504F3;
	mul.f32 	%f1239, %f1233, 0fBF3504F3;
	sub.f32 	%f1240, %f1237, %f1234;
	sub.f32 	%f1241, %f1238, %f1235;
	sub.f32 	%f1242, %f1239, %f1236;
	add.f32 	%f1243, %f191, %f1240;
	add.f32 	%f1244, %f193, %f1241;
	add.f32 	%f1245, %f195, %f1242;
	mul.f32 	%f1246, %f194, %f242;
	neg.f32 	%f1247, %f1246;
	mul.f32 	%f1248, %f192, %f241;
	sub.f32 	%f1249, %f1247, %f1248;
	mul.f32 	%f1250, %f196, %f243;
	sub.f32 	%f1251, %f1249, %f1250;
	cvt.sat.f32.f32 	%f1252, %f1251;
	mul.f32 	%f1253, %f96, %f1252;
	mul.f32 	%f1254, %f97, %f1252;
	mul.f32 	%f1255, %f98, %f1252;
	mul.f32 	%f1256, %f204, %f242;
	neg.f32 	%f1257, %f1256;
	mul.f32 	%f1258, %f203, %f241;
	sub.f32 	%f1259, %f1257, %f1258;
	mul.f32 	%f1260, %f205, %f243;
	sub.f32 	%f1261, %f1259, %f1260;
	cvt.sat.f32.f32 	%f1262, %f1261;
	mul.f32 	%f1263, %f96, %f1262;
	mul.f32 	%f1264, %f97, %f1262;
	mul.f32 	%f1265, %f98, %f1262;
	mul.f32 	%f1266, %f1243, %f241;
	mul.f32 	%f1267, %f1244, %f242;
	neg.f32 	%f1268, %f1267;
	sub.f32 	%f1269, %f1268, %f1266;
	mul.f32 	%f1270, %f1245, %f243;
	sub.f32 	%f1271, %f1269, %f1270;
	cvt.sat.f32.f32 	%f1272, %f1271;
	mul.f32 	%f1273, %f96, %f1272;
	mul.f32 	%f1274, %f97, %f1272;
	mul.f32 	%f1275, %f98, %f1272;
	add.f32 	%f1276, %f1253, %f1263;
	add.f32 	%f1277, %f1254, %f1264;
	add.f32 	%f1278, %f1255, %f1265;
	add.f32 	%f1279, %f1276, %f1273;
	add.f32 	%f1280, %f1277, %f1274;
	add.f32 	%f1281, %f1278, %f1275;
	mul.f32 	%f1282, %f1279, 0f3F13CD3A;
	mul.f32 	%f1283, %f1280, 0f3F13CD3A;
	mul.f32 	%f1284, %f1281, 0f3F13CD3A;
	div.rn.f32 	%f1285, %f80, %f1282;
	div.rn.f32 	%f1286, %f81, %f1283;
	div.rn.f32 	%f1287, %f82, %f1284;
	setp.eq.f32 	%p177, %f80, 0f00000000;
	selp.f32 	%f1288, 0f00000000, %f1285, %p177;
	setp.eq.f32 	%p178, %f81, 0f00000000;
	selp.f32 	%f1289, 0f00000000, %f1286, %p178;
	setp.eq.f32 	%p179, %f82, 0f00000000;
	selp.f32 	%f1290, 0f00000000, %f1287, %p179;
	mul.f32 	%f212, %f1253, %f1288;
	mul.f32 	%f213, %f1254, %f1289;
	mul.f32 	%f214, %f1255, %f1290;
	mul.f32 	%f215, %f1263, %f1288;
	mul.f32 	%f216, %f1264, %f1289;
	mul.f32 	%f217, %f1265, %f1290;
	mul.f32 	%f218, %f1273, %f1288;
	mul.f32 	%f219, %f1274, %f1289;
	mul.f32 	%f220, %f1275, %f1290;
	ld.const.u32 	%r49, [params+108];
	setp.eq.s32 	%p180, %r49, 0;
	ld.const.u64 	%rd78, [params+256];
	cvta.to.global.u64 	%rd79, %rd78;
	ld.const.u32 	%r338, [params+248];
	mad.lo.s32 	%r339, %r338, %r4, %r3;
	mul.wide.u32 	%rd80, %r339, 8;
	add.s64 	%rd21, %rd79, %rd80;
	@%p180 bra 	$L__BB0_150;

	ld.global.v4.u16 	{%rs74, %rs75, %rs76, %rs77}, [%rd21];
	// begin inline asm
	{  cvt.f32.f16 %f1291, %rs74;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1292, %rs75;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1293, %rs76;}

	// end inline asm
	add.f32 	%f1294, %f212, %f1291;
	add.f32 	%f1295, %f213, %f1292;
	add.f32 	%f1296, %f214, %f1293;
	mov.f32 	%f1297, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs72, %f1296;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs71, %f1295;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs70, %f1294;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs73, %f1297;}

	// end inline asm
	st.global.v4.u16 	[%rd21], {%rs70, %rs71, %rs72, %rs73};
	bra.uni 	$L__BB0_151;

$L__BB0_150:
	mov.f32 	%f1301, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs81, %f1301;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs80, %f214;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs79, %f213;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs78, %f212;}

	// end inline asm
	st.global.v4.u16 	[%rd21], {%rs78, %rs79, %rs80, %rs81};

$L__BB0_151:
	ld.const.u64 	%rd81, [params+272];
	cvta.to.global.u64 	%rd82, %rd81;
	ld.const.u32 	%r340, [params+264];
	mad.lo.s32 	%r341, %r340, %r4, %r3;
	mul.wide.u32 	%rd83, %r341, 8;
	add.s64 	%rd22, %rd82, %rd83;
	@%p180 bra 	$L__BB0_153;

	ld.global.v4.u16 	{%rs89, %rs90, %rs91, %rs92}, [%rd22];
	// begin inline asm
	{  cvt.f32.f16 %f1302, %rs89;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1303, %rs90;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1304, %rs91;}

	// end inline asm
	add.f32 	%f1305, %f215, %f1302;
	add.f32 	%f1306, %f216, %f1303;
	add.f32 	%f1307, %f217, %f1304;
	mov.f32 	%f1308, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs87, %f1307;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs86, %f1306;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs85, %f1305;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs88, %f1308;}

	// end inline asm
	st.global.v4.u16 	[%rd22], {%rs85, %rs86, %rs87, %rs88};
	bra.uni 	$L__BB0_154;

$L__BB0_153:
	mov.f32 	%f1312, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs96, %f1312;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs95, %f217;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs94, %f216;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs93, %f215;}

	// end inline asm
	st.global.v4.u16 	[%rd22], {%rs93, %rs94, %rs95, %rs96};

$L__BB0_154:
	ld.const.u64 	%rd84, [params+288];
	cvta.to.global.u64 	%rd85, %rd84;
	ld.const.u32 	%r342, [params+280];
	mad.lo.s32 	%r343, %r342, %r4, %r3;
	mul.wide.u32 	%rd86, %r343, 8;
	add.s64 	%rd23, %rd85, %rd86;
	@%p180 bra 	$L__BB0_156;

	ld.global.v4.u16 	{%rs104, %rs105, %rs106, %rs107}, [%rd23];
	// begin inline asm
	{  cvt.f32.f16 %f1313, %rs104;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1314, %rs105;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1315, %rs106;}

	// end inline asm
	add.f32 	%f1316, %f218, %f1313;
	add.f32 	%f1317, %f219, %f1314;
	add.f32 	%f1318, %f220, %f1315;
	mov.f32 	%f1319, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs102, %f1318;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs101, %f1317;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs100, %f1316;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs103, %f1319;}

	// end inline asm
	st.global.v4.u16 	[%rd23], {%rs100, %rs101, %rs102, %rs103};
	bra.uni 	$L__BB0_174;

$L__BB0_156:
	mov.f32 	%f1323, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs111, %f1323;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs110, %f220;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs109, %f219;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs108, %f218;}

	// end inline asm
	st.global.v4.u16 	[%rd23], {%rs108, %rs109, %rs110, %rs111};

$L__BB0_174:
	ret;

}