//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<154>;
	.reg .b16 	%rs<55>;
	.reg .f32 	%f<1026>;
	.reg .b32 	%r<342>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<102>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r51), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r52), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u32 	%r3, [params+540];
	ld.const.u64 	%rd19, [params+400];
	cvta.to.global.u64 	%rd20, %rd19;
	ld.const.u32 	%r57, [params+392];
	mad.lo.s32 	%r58, %r57, %r52, %r51;
	mul.wide.u32 	%rd21, %r58, 4;
	add.s64 	%rd2, %rd20, %rd21;
	ld.global.v2.u8 	{%rs7, %rs54}, [%rd2];
	or.b16  	%rs9, %rs7, %rs54;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p7, %rs10, 0;
	@%p7 bra 	$L__BB0_2;

	ld.global.u8 	%rs53, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs53, [%rd2+2];
	setp.eq.s16 	%p8, %rs53, 0;
	mov.f32 	%f975, 0f00000000;
	mov.u16 	%rs54, 0;
	mov.f32 	%f976, %f975;
	mov.f32 	%f977, %f975;
	@%p8 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f181, %rs7;
	div.rn.f32 	%f182, %f181, 0f437F0000;
	fma.rn.f32 	%f183, %f182, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs54, 255;
	cvt.rn.f32.u16 	%f184, %rs13;
	div.rn.f32 	%f185, %f184, 0f437F0000;
	fma.rn.f32 	%f186, %f185, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f187, %rs53;
	div.rn.f32 	%f188, %f187, 0f437F0000;
	fma.rn.f32 	%f189, %f188, 0f40000000, 0fBF800000;
	mul.f32 	%f190, %f186, %f186;
	fma.rn.f32 	%f191, %f183, %f183, %f190;
	fma.rn.f32 	%f192, %f189, %f189, %f191;
	sqrt.rn.f32 	%f193, %f192;
	rcp.rn.f32 	%f194, %f193;
	mul.f32 	%f977, %f194, %f189;
	mul.f32 	%f976, %f194, %f186;
	mul.f32 	%f975, %f183, %f194;

$L__BB0_4:
	ld.const.v2.u32 	{%r59, %r60}, [params];
	add.s32 	%r4, %r59, %r51;
	add.s32 	%r5, %r60, %r52;
	setp.eq.f32 	%p9, %f975, 0f00000000;
	setp.eq.f32 	%p10, %f976, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	setp.eq.f32 	%p12, %f977, 0f00000000;
	and.pred  	%p13, %p12, %p11;
	@%p13 bra 	$L__BB0_123;
	bra.uni 	$L__BB0_5;

$L__BB0_123:
	ld.const.u32 	%r50, [params+104];
	and.b32  	%r314, %r50, 1;
	setp.eq.b32 	%p147, %r314, 1;
	mov.pred 	%p148, 0;
	xor.pred  	%p149, %p147, %p148;
	not.pred 	%p150, %p149;
	@%p150 bra 	$L__BB0_125;

	ld.const.u64 	%rd78, [params+144];
	cvta.to.global.u64 	%rd79, %rd78;
	ld.const.u32 	%r315, [params+136];
	mad.lo.s32 	%r316, %r315, %r5, %r4;
	mul.wide.u32 	%rd80, %r316, 4;
	add.s64 	%rd81, %rd79, %rd80;
	mov.u16 	%rs43, 0;
	st.global.v4.u8 	[%rd81], {%rs43, %rs43, %rs43, %rs43};

$L__BB0_125:
	and.b32  	%r317, %r50, 4;
	setp.eq.s32 	%p151, %r317, 0;
	@%p151 bra 	$L__BB0_127;

	ld.const.u64 	%rd82, [params+224];
	cvta.to.global.u64 	%rd83, %rd82;
	ld.const.u32 	%r318, [params+216];
	mad.lo.s32 	%r319, %r318, %r5, %r4;
	mov.f32 	%f943, 0f00000000;
	mul.wide.u32 	%rd84, %r319, 8;
	add.s64 	%rd85, %rd83, %rd84;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs46, %f943;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs45, %f943;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f943;}

	// end inline asm
	mov.u16 	%rs47, 0;
	st.global.v4.u16 	[%rd85], {%rs44, %rs45, %rs46, %rs47};

$L__BB0_127:
	and.b32  	%r320, %r50, 16;
	setp.eq.s32 	%p152, %r320, 0;
	@%p152 bra 	$L__BB0_129;

	ld.const.u64 	%rd86, [params+240];
	cvta.to.global.u64 	%rd87, %rd86;
	ld.const.u32 	%r321, [params+232];
	mad.lo.s32 	%r322, %r321, %r5, %r4;
	mov.f32 	%f946, 0f00000000;
	mul.wide.u32 	%rd88, %r322, 8;
	add.s64 	%rd89, %rd87, %rd88;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f946;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs49, %f946;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs48, %f946;}

	// end inline asm
	mov.u16 	%rs51, 0;
	st.global.v4.u16 	[%rd89], {%rs48, %rs49, %rs50, %rs51};

$L__BB0_129:
	and.b32  	%r323, %r50, 64;
	setp.eq.s32 	%p153, %r323, 0;
	@%p153 bra 	$L__BB0_131;

	ld.const.u64 	%rd90, [params+208];
	cvta.to.global.u64 	%rd91, %rd90;
	ld.const.u32 	%r324, [params+200];
	mad.lo.s32 	%r325, %r324, %r5, %r4;
	mul.wide.u32 	%rd92, %r325, 4;
	add.s64 	%rd93, %rd91, %rd92;
	mov.u16 	%rs52, 0;
	st.global.v4.u8 	[%rd93], {%rs52, %rs52, %rs52, %rs52};
	bra.uni 	$L__BB0_131;

$L__BB0_5:
	ld.const.u64 	%rd22, [params+496];
	cvta.to.global.u64 	%rd23, %rd22;
	ld.const.u32 	%r63, [params+488];
	mad.lo.s32 	%r64, %r63, %r52, %r51;
	mul.wide.u32 	%rd24, %r64, 8;
	add.s64 	%rd25, %rd23, %rd24;
	ld.global.v4.u16 	{%rs19, %rs20, %rs21, %rs22}, [%rd25];
	// begin inline asm
	{  cvt.f32.f16 %f195, %rs19;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f196, %rs20;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f197, %rs21;}

	// end inline asm
	ld.const.u64 	%rd26, [params+432];
	cvta.to.global.u64 	%rd27, %rd26;
	ld.const.u32 	%r65, [params+424];
	mad.lo.s32 	%r66, %r65, %r52, %r51;
	mul.wide.u32 	%rd28, %r66, 12;
	add.s64 	%rd29, %rd27, %rd28;
	ld.global.f32 	%f205, [%rd29];
	mul.f32 	%f206, %f205, 0f3456BF95;
	ld.global.f32 	%f207, [%rd29+4];
	mul.f32 	%f208, %f207, 0f3456BF95;
	ld.global.f32 	%f209, [%rd29+8];
	mul.f32 	%f210, %f209, 0f3456BF95;
	abs.f32 	%f211, %f975;
	div.rn.f32 	%f212, %f206, %f211;
	abs.f32 	%f213, %f976;
	div.rn.f32 	%f214, %f208, %f213;
	abs.f32 	%f215, %f977;
	div.rn.f32 	%f216, %f210, %f215;
	abs.f32 	%f217, %f212;
	abs.f32 	%f218, %f214;
	abs.f32 	%f219, %f216;
	mov.f32 	%f220, 0f38D1B717;
	max.f32 	%f221, %f217, %f220;
	max.f32 	%f222, %f218, %f220;
	max.f32 	%f223, %f219, %f220;
	fma.rn.f32 	%f13, %f975, %f221, %f205;
	fma.rn.f32 	%f14, %f976, %f222, %f207;
	fma.rn.f32 	%f15, %f977, %f223, %f209;
	setp.gt.f32 	%p14, %f211, %f215;
	neg.f32 	%f224, %f976;
	selp.f32 	%f225, %f224, 0f00000000, %p14;
	mov.f32 	%f989, 0f00000000;
	neg.f32 	%f226, %f977;
	selp.f32 	%f227, %f975, %f226, %p14;
	selp.f32 	%f228, 0f00000000, %f976, %p14;
	mul.f32 	%f229, %f227, %f227;
	fma.rn.f32 	%f230, %f225, %f225, %f229;
	fma.rn.f32 	%f231, %f228, %f228, %f230;
	sqrt.rn.f32 	%f232, %f231;
	rcp.rn.f32 	%f233, %f232;
	mul.f32 	%f16, %f225, %f233;
	mul.f32 	%f17, %f227, %f233;
	mul.f32 	%f18, %f228, %f233;
	ld.const.u64 	%rd30, [params+128];
	cvta.to.global.u64 	%rd31, %rd30;
	ld.const.u32 	%r67, [params+120];
	mad.lo.s32 	%r68, %r67, %r52, %r51;
	mul.wide.u32 	%rd32, %r68, 4;
	add.s64 	%rd3, %rd31, %rd32;
	setp.lt.s32 	%p15, %r3, 1;
	mov.f32 	%f988, %f989;
	mov.f32 	%f987, %f989;
	mov.f32 	%f986, %f989;
	mov.f32 	%f985, %f989;
	mov.f32 	%f984, %f989;
	@%p15 bra 	$L__BB0_34;

	cvt.rn.f32.s32 	%f240, %r3;
	rcp.rn.f32 	%f19, %f240;
	ld.global.u32 	%r334, [%rd3];
	mul.f32 	%f20, %f13, 0f3456BF95;
	mul.f32 	%f21, %f14, 0f3456BF95;
	mul.f32 	%f22, %f15, 0f3456BF95;
	ld.const.u64 	%rd4, [params+96];
	mul.f32 	%f241, %f975, %f17;
	mul.f32 	%f242, %f976, %f16;
	sub.f32 	%f23, %f242, %f241;
	mul.f32 	%f243, %f977, %f16;
	mul.f32 	%f244, %f975, %f18;
	sub.f32 	%f24, %f244, %f243;
	mul.f32 	%f245, %f976, %f18;
	mul.f32 	%f246, %f977, %f17;
	sub.f32 	%f25, %f246, %f245;
	mov.u32 	%r69, 0;
	add.s64 	%rd5, %rd1, 24;
	mov.u64 	%rd33, __cudart_i2opi_f;
	abs.f32 	%f309, %f21;
	abs.f32 	%f310, %f20;
	max.f32 	%f311, %f310, %f309;
	abs.f32 	%f312, %f22;
	max.f32 	%f313, %f311, %f312;
	mov.u32 	%r331, %r69;

$L__BB0_7:
	mov.u32 	%r333, %r69;

$L__BB0_8:
	cvt.rn.f32.s32 	%f959, %r331;
	mad.lo.s32 	%r71, %r334, 1664525, 1013904223;
	and.b32  	%r72, %r71, 16777215;
	cvt.rn.f32.u32 	%f247, %r72;
	fma.rn.f32 	%f248, %f247, 0f33800000, %f959;
	mul.f32 	%f39, %f19, %f248;
	mad.lo.s32 	%r334, %r71, 1664525, 1013904223;
	and.b32  	%r73, %r334, 16777215;
	cvt.rn.f32.u32 	%f249, %r73;
	cvt.rn.f32.s32 	%f250, %r333;
	fma.rn.f32 	%f251, %f249, 0f33800000, %f250;
	mul.f32 	%f252, %f19, %f251;
	mul.f32 	%f253, %f39, %f39;
	mov.f32 	%f254, 0f3F800000;
	sub.f32 	%f255, %f254, %f253;
	mov.f32 	%f256, 0f00000000;
	max.f32 	%f257, %f256, %f255;
	sqrt.rn.f32 	%f40, %f257;
	mul.f32 	%f41, %f252, 0f40C90FDB;
	mul.f32 	%f258, %f41, 0f3F22F983;
	cvt.rni.s32.f32 	%r341, %f258;
	cvt.rn.f32.s32 	%f259, %r341;
	mov.f32 	%f260, 0fBFC90FDA;
	fma.rn.f32 	%f261, %f259, %f260, %f41;
	mov.f32 	%f262, 0fB3A22168;
	fma.rn.f32 	%f263, %f259, %f262, %f261;
	mov.f32 	%f264, 0fA7C234C5;
	fma.rn.f32 	%f993, %f259, %f264, %f263;
	abs.f32 	%f43, %f41;
	setp.ltu.f32 	%p16, %f43, 0f47CE4780;
	mov.u32 	%r338, %r341;
	mov.f32 	%f990, %f993;
	@%p16 bra 	$L__BB0_16;

	setp.eq.f32 	%p17, %f43, 0f7F800000;
	@%p17 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f267, 0f00000000;
	mul.rn.f32 	%f990, %f41, %f267;
	mov.u32 	%r338, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r13, %f41;
	bfe.u32 	%r75, %r13, 23, 8;
	add.s32 	%r14, %r75, -128;
	shl.b32 	%r76, %r13, 8;
	or.b32  	%r15, %r76, -2147483648;
	shr.u32 	%r16, %r14, 5;
	mov.u64 	%rd99, 0;
	mov.u32 	%r335, 0;
	mov.u64 	%rd97, %rd1;
	mov.u64 	%rd98, %rd33;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r77, [%rd98];
	mad.wide.u32 	%rd35, %r77, %r15, %rd99;
	shr.u64 	%rd99, %rd35, 32;
	st.local.u32 	[%rd97], %rd35;
	add.s64 	%rd98, %rd98, 4;
	add.s64 	%rd97, %rd97, 4;
	add.s32 	%r335, %r335, 1;
	setp.ne.s32 	%p18, %r335, 6;
	@%p18 bra 	$L__BB0_11;

	st.local.u32 	[%rd5], %rd99;
	mov.u32 	%r78, 4;
	sub.s32 	%r19, %r78, %r16;
	mov.u32 	%r79, 6;
	sub.s32 	%r80, %r79, %r16;
	mul.wide.s32 	%rd36, %r80, 4;
	add.s64 	%rd37, %rd1, %rd36;
	ld.local.u32 	%r336, [%rd37];
	ld.local.u32 	%r337, [%rd37+-4];
	and.b32  	%r22, %r14, 31;
	setp.eq.s32 	%p19, %r22, 0;
	@%p19 bra 	$L__BB0_14;

	mov.u32 	%r81, 32;
	sub.s32 	%r82, %r81, %r22;
	shr.u32 	%r83, %r337, %r82;
	shl.b32 	%r84, %r336, %r22;
	add.s32 	%r336, %r83, %r84;
	mul.wide.s32 	%rd38, %r19, 4;
	add.s64 	%rd39, %rd1, %rd38;
	ld.local.u32 	%r85, [%rd39];
	shr.u32 	%r86, %r85, %r82;
	shl.b32 	%r87, %r337, %r22;
	add.s32 	%r337, %r86, %r87;

$L__BB0_14:
	and.b32  	%r88, %r13, -2147483648;
	shr.u32 	%r89, %r337, 30;
	shl.b32 	%r90, %r336, 2;
	or.b32  	%r91, %r89, %r90;
	shr.u32 	%r92, %r91, 31;
	shr.u32 	%r93, %r336, 30;
	add.s32 	%r94, %r92, %r93;
	neg.s32 	%r95, %r94;
	setp.eq.s32 	%p20, %r88, 0;
	selp.b32 	%r338, %r94, %r95, %p20;
	setp.ne.s32 	%p21, %r92, 0;
	xor.b32  	%r96, %r88, -2147483648;
	selp.b32 	%r97, %r96, %r88, %p21;
	selp.b32 	%r98, -1, 0, %p21;
	xor.b32  	%r99, %r91, %r98;
	shl.b32 	%r100, %r337, 2;
	xor.b32  	%r101, %r100, %r98;
	cvt.u64.u32 	%rd40, %r99;
	cvt.u64.u32 	%rd41, %r101;
	bfi.b64 	%rd42, %rd40, %rd41, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd42;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f265, %fd2;
	setp.eq.s32 	%p22, %r97, 0;
	neg.f32 	%f266, %f265;
	selp.f32 	%f990, %f265, %f266, %p22;

$L__BB0_16:
	add.s32 	%r29, %r338, 1;
	and.b32  	%r30, %r29, 1;
	setp.eq.s32 	%p23, %r30, 0;
	selp.f32 	%f47, %f990, 0f3F800000, %p23;
	mul.rn.f32 	%f48, %f990, %f990;
	mov.f32 	%f991, 0fB94D4153;
	@%p23 bra 	$L__BB0_18;

	mov.f32 	%f269, 0fBAB607ED;
	mov.f32 	%f270, 0f37CBAC00;
	fma.rn.f32 	%f991, %f270, %f48, %f269;

$L__BB0_18:
	selp.f32 	%f271, 0f3C0885E4, 0f3D2AAABB, %p23;
	fma.rn.f32 	%f272, %f991, %f48, %f271;
	selp.f32 	%f273, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
	fma.rn.f32 	%f274, %f272, %f48, %f273;
	mov.f32 	%f275, 0f00000000;
	fma.rn.f32 	%f276, %f48, %f47, %f275;
	fma.rn.f32 	%f992, %f274, %f276, %f47;
	and.b32  	%r103, %r29, 2;
	setp.eq.s32 	%p25, %r103, 0;
	@%p25 bra 	$L__BB0_20;

	mov.f32 	%f278, 0fBF800000;
	fma.rn.f32 	%f992, %f992, %f278, %f275;

$L__BB0_20:
	@%p16 bra 	$L__BB0_28;

	setp.eq.f32 	%p27, %f43, 0f7F800000;
	@%p27 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f281, 0f00000000;
	mul.rn.f32 	%f993, %f41, %f281;
	mov.u32 	%r341, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r31, %f41;
	bfe.u32 	%r104, %r31, 23, 8;
	add.s32 	%r32, %r104, -128;
	shl.b32 	%r105, %r31, 8;
	or.b32  	%r33, %r105, -2147483648;
	shr.u32 	%r34, %r32, 5;
	mov.u64 	%rd100, 0;
	mov.u64 	%rd101, %rd100;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd45, %rd100, 2;
	mov.u64 	%rd46, __cudart_i2opi_f;
	add.s64 	%rd47, %rd46, %rd45;
	ld.global.nc.u32 	%r106, [%rd47];
	mad.wide.u32 	%rd48, %r106, %r33, %rd101;
	shr.u64 	%rd101, %rd48, 32;
	add.s64 	%rd49, %rd1, %rd45;
	st.local.u32 	[%rd49], %rd48;
	cvt.u32.u64 	%r107, %rd100;
	add.s32 	%r108, %r107, 1;
	cvt.s64.s32 	%rd100, %r108;
	setp.ne.s32 	%p28, %r108, 6;
	@%p28 bra 	$L__BB0_23;

	st.local.u32 	[%rd5], %rd101;
	mov.u32 	%r109, 4;
	sub.s32 	%r35, %r109, %r34;
	mov.u32 	%r110, 6;
	sub.s32 	%r111, %r110, %r34;
	mul.wide.s32 	%rd50, %r111, 4;
	add.s64 	%rd51, %rd1, %rd50;
	ld.local.u32 	%r339, [%rd51];
	ld.local.u32 	%r340, [%rd51+-4];
	and.b32  	%r38, %r32, 31;
	setp.eq.s32 	%p29, %r38, 0;
	@%p29 bra 	$L__BB0_26;

	mov.u32 	%r112, 32;
	sub.s32 	%r113, %r112, %r38;
	shr.u32 	%r114, %r340, %r113;
	shl.b32 	%r115, %r339, %r38;
	add.s32 	%r339, %r114, %r115;
	mul.wide.s32 	%rd52, %r35, 4;
	add.s64 	%rd53, %rd1, %rd52;
	ld.local.u32 	%r116, [%rd53];
	shr.u32 	%r117, %r116, %r113;
	shl.b32 	%r118, %r340, %r38;
	add.s32 	%r340, %r117, %r118;

$L__BB0_26:
	and.b32  	%r119, %r31, -2147483648;
	shr.u32 	%r120, %r340, 30;
	shl.b32 	%r121, %r339, 2;
	or.b32  	%r122, %r120, %r121;
	shr.u32 	%r123, %r122, 31;
	shr.u32 	%r124, %r339, 30;
	add.s32 	%r125, %r123, %r124;
	neg.s32 	%r126, %r125;
	setp.eq.s32 	%p30, %r119, 0;
	selp.b32 	%r341, %r125, %r126, %p30;
	setp.ne.s32 	%p31, %r123, 0;
	xor.b32  	%r127, %r119, -2147483648;
	selp.b32 	%r128, %r127, %r119, %p31;
	selp.b32 	%r129, -1, 0, %p31;
	xor.b32  	%r130, %r122, %r129;
	shl.b32 	%r131, %r340, 2;
	xor.b32  	%r132, %r131, %r129;
	cvt.u64.u32 	%rd54, %r130;
	cvt.u64.u32 	%rd55, %r132;
	bfi.b64 	%rd56, %rd54, %rd55, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd56;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f279, %fd4;
	setp.eq.s32 	%p32, %r128, 0;
	neg.f32 	%f280, %f279;
	selp.f32 	%f993, %f279, %f280, %p32;

$L__BB0_28:
	mul.f32 	%f57, %f40, %f992;
	and.b32  	%r45, %r341, 1;
	setp.eq.s32 	%p33, %r45, 0;
	selp.f32 	%f58, %f993, 0f3F800000, %p33;
	mul.rn.f32 	%f59, %f993, %f993;
	mov.f32 	%f994, 0fB94D4153;
	@%p33 bra 	$L__BB0_30;

	mov.f32 	%f283, 0fBAB607ED;
	mov.f32 	%f284, 0f37CBAC00;
	fma.rn.f32 	%f994, %f284, %f59, %f283;

$L__BB0_30:
	selp.f32 	%f285, 0f3C0885E4, 0f3D2AAABB, %p33;
	fma.rn.f32 	%f286, %f994, %f59, %f285;
	selp.f32 	%f287, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
	fma.rn.f32 	%f288, %f286, %f59, %f287;
	mov.f32 	%f289, 0f00000000;
	fma.rn.f32 	%f290, %f59, %f58, %f289;
	fma.rn.f32 	%f995, %f288, %f290, %f58;
	and.b32  	%r134, %r341, 2;
	setp.eq.s32 	%p35, %r134, 0;
	@%p35 bra 	$L__BB0_32;

	mov.f32 	%f292, 0fBF800000;
	fma.rn.f32 	%f995, %f995, %f292, %f289;

$L__BB0_32:
	mul.f32 	%f302, %f40, %f995;
	mul.f32 	%f303, %f16, %f302;
	mul.f32 	%f304, %f17, %f302;
	mul.f32 	%f305, %f18, %f302;
	fma.rn.f32 	%f306, %f25, %f57, %f303;
	fma.rn.f32 	%f307, %f24, %f57, %f304;
	fma.rn.f32 	%f308, %f23, %f57, %f305;
	fma.rn.f32 	%f296, %f975, %f39, %f306;
	fma.rn.f32 	%f297, %f976, %f39, %f307;
	fma.rn.f32 	%f298, %f977, %f39, %f308;
	mov.f32 	%f314, 0f38D1B717;
	max.f32 	%f299, %f313, %f314;
	mov.f32 	%f300, 0f6C4ECB8F;
	mov.u32 	%r168, 1;
	mov.u32 	%r171, 2;
	mov.u32 	%r173, 3;
	mov.u32 	%r205, 0;
	// begin inline asm
	call(%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166),_optix_trace_typed_32,(%r205,%rd4,%f13,%f14,%f15,%f296,%f297,%f298,%f299,%f300,%f289,%r168,%r205,%r205,%r171,%r205,%r173,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205);
	// end inline asm
	mov.b32 	%f315, %r135;
	mov.b32 	%f316, %r136;
	mov.b32 	%f317, %r137;
	mul.f32 	%f318, %f316, 0f3F372474;
	fma.rn.f32 	%f319, %f315, 0f3E59999A, %f318;
	fma.rn.f32 	%f320, %f317, 0f3D93A92A, %f319;
	fma.rn.f32 	%f989, %f296, %f320, %f989;
	fma.rn.f32 	%f988, %f297, %f320, %f988;
	fma.rn.f32 	%f987, %f298, %f320, %f987;
	mul.f32 	%f321, %f976, %f297;
	fma.rn.f32 	%f322, %f975, %f296, %f321;
	fma.rn.f32 	%f323, %f977, %f298, %f322;
	cvt.sat.f32.f32 	%f324, %f323;
	fma.rn.f32 	%f986, %f324, %f315, %f986;
	fma.rn.f32 	%f985, %f324, %f316, %f985;
	fma.rn.f32 	%f984, %f324, %f317, %f984;
	add.s32 	%r333, %r333, 1;
	setp.lt.s32 	%p36, %r333, %r3;
	@%p36 bra 	$L__BB0_8;

	add.s32 	%r331, %r331, 1;
	setp.lt.s32 	%p37, %r331, %r3;
	@%p37 bra 	$L__BB0_7;

$L__BB0_34:
	mov.f32 	%f1002, 0f00000000;
	mul.lo.s32 	%r206, %r3, %r3;
	cvt.rn.f32.s32 	%f328, %r206;
	rcp.rn.f32 	%f329, %f328;
	mul.f32 	%f330, %f329, %f986;
	mul.f32 	%f331, %f329, %f985;
	mul.f32 	%f332, %f329, %f984;
	fma.rn.f32 	%f333, %f329, %f986, %f330;
	fma.rn.f32 	%f334, %f329, %f985, %f331;
	fma.rn.f32 	%f335, %f329, %f984, %f332;
	ld.const.u64 	%rd58, [params+504];
	cvt.rn.f32.u32 	%f336, %r5;
	cvt.rn.f32.u32 	%f337, %r4;
	tex.2d.v4.f32.f32 	{%f338, %f339, %f340, %f341}, [%rd58, {%f337, %f336}];
	mul.f32 	%f77, %f333, %f338;
	mul.f32 	%f78, %f334, %f339;
	mul.f32 	%f79, %f335, %f340;
	add.f32 	%f80, %f195, %f77;
	add.f32 	%f81, %f196, %f78;
	add.f32 	%f82, %f197, %f79;
	abs.f32 	%f342, %f80;
	setp.gtu.f32 	%p38, %f342, 0f7F800000;
	mov.f32 	%f1003, %f1002;
	mov.f32 	%f1004, %f1002;
	@%p38 bra 	$L__BB0_38;

	mov.f32 	%f1002, 0f00000000;
	abs.f32 	%f346, %f81;
	setp.gtu.f32 	%p39, %f346, 0f7F800000;
	@%p39 bra 	$L__BB0_38;

	mov.f32 	%f1002, 0f00000000;
	abs.f32 	%f350, %f82;
	setp.gtu.f32 	%p40, %f350, 0f7F800000;
	mov.f32 	%f1003, %f1002;
	mov.f32 	%f1004, %f1002;
	@%p40 bra 	$L__BB0_38;

	mov.f32 	%f1002, %f80;
	mov.f32 	%f1003, %f81;
	mov.f32 	%f1004, %f82;

$L__BB0_38:
	ld.const.u32 	%r48, [params+104];
	and.b32  	%r207, %r48, 1;
	setp.eq.b32 	%p41, %r207, 1;
	mov.pred 	%p42, 0;
	xor.pred  	%p43, %p41, %p42;
	not.pred 	%p44, %p43;
	@%p44 bra 	$L__BB0_112;

	mov.f32 	%f355, 0f3EE66666;
	abs.f32 	%f93, %f1002;
	setp.lt.f32 	%p45, %f93, 0f00800000;
	mul.f32 	%f357, %f93, 0f4B800000;
	selp.f32 	%f358, %f357, %f93, %p45;
	selp.f32 	%f359, 0fC3170000, 0fC2FE0000, %p45;
	mov.b32 	%r208, %f358;
	and.b32  	%r209, %r208, 8388607;
	or.b32  	%r210, %r209, 1065353216;
	mov.b32 	%f360, %r210;
	shr.u32 	%r211, %r208, 23;
	cvt.rn.f32.u32 	%f361, %r211;
	add.f32 	%f362, %f359, %f361;
	setp.gt.f32 	%p46, %f360, 0f3FB504F3;
	mul.f32 	%f363, %f360, 0f3F000000;
	add.f32 	%f364, %f362, 0f3F800000;
	selp.f32 	%f365, %f364, %f362, %p46;
	selp.f32 	%f366, %f363, %f360, %p46;
	add.f32 	%f367, %f366, 0fBF800000;
	add.f32 	%f368, %f366, 0f3F800000;
	rcp.approx.ftz.f32 	%f369, %f368;
	add.f32 	%f370, %f367, %f367;
	mul.f32 	%f371, %f370, %f369;
	mul.f32 	%f372, %f371, %f371;
	mov.f32 	%f373, 0f3C4CAF63;
	mov.f32 	%f374, 0f3B18F0FE;
	fma.rn.f32 	%f375, %f374, %f372, %f373;
	mov.f32 	%f376, 0f3DAAAABD;
	fma.rn.f32 	%f377, %f375, %f372, %f376;
	mul.rn.f32 	%f378, %f377, %f372;
	mul.rn.f32 	%f379, %f378, %f371;
	sub.f32 	%f380, %f367, %f371;
	add.f32 	%f381, %f380, %f380;
	neg.f32 	%f382, %f371;
	fma.rn.f32 	%f383, %f382, %f367, %f381;
	mul.rn.f32 	%f384, %f369, %f383;
	add.f32 	%f385, %f379, %f371;
	sub.f32 	%f386, %f371, %f385;
	add.f32 	%f387, %f379, %f386;
	add.f32 	%f388, %f384, %f387;
	add.f32 	%f389, %f385, %f388;
	sub.f32 	%f390, %f385, %f389;
	add.f32 	%f391, %f388, %f390;
	mov.f32 	%f392, 0f3F317200;
	mul.rn.f32 	%f393, %f365, %f392;
	mov.f32 	%f394, 0f35BFBE8E;
	mul.rn.f32 	%f395, %f365, %f394;
	add.f32 	%f396, %f393, %f389;
	sub.f32 	%f397, %f393, %f396;
	add.f32 	%f398, %f389, %f397;
	add.f32 	%f399, %f391, %f398;
	add.f32 	%f400, %f395, %f399;
	add.f32 	%f401, %f396, %f400;
	sub.f32 	%f402, %f396, %f401;
	add.f32 	%f403, %f400, %f402;
	mul.rn.f32 	%f404, %f355, %f401;
	neg.f32 	%f405, %f404;
	fma.rn.f32 	%f406, %f355, %f401, %f405;
	fma.rn.f32 	%f407, %f355, %f403, %f406;
	mov.f32 	%f408, 0f00000000;
	fma.rn.f32 	%f409, %f408, %f401, %f407;
	add.rn.f32 	%f410, %f404, %f409;
	neg.f32 	%f411, %f410;
	add.rn.f32 	%f412, %f404, %f411;
	add.rn.f32 	%f413, %f412, %f409;
	mov.b32 	%r212, %f410;
	setp.eq.s32 	%p47, %r212, 1118925336;
	add.s32 	%r213, %r212, -1;
	mov.b32 	%f414, %r213;
	add.f32 	%f415, %f413, 0f37000000;
	selp.f32 	%f94, %f415, %f413, %p47;
	selp.f32 	%f416, %f414, %f410, %p47;
	mov.f32 	%f417, 0f3FB8AA3B;
	mul.rn.f32 	%f418, %f416, %f417;
	cvt.rzi.f32.f32 	%f419, %f418;
	abs.f32 	%f420, %f419;
	setp.gt.f32 	%p48, %f420, 0f42FC0000;
	mov.b32 	%r214, %f419;
	and.b32  	%r215, %r214, -2147483648;
	or.b32  	%r216, %r215, 1123811328;
	mov.b32 	%f421, %r216;
	selp.f32 	%f422, %f421, %f419, %p48;
	mov.f32 	%f423, 0fBF317218;
	fma.rn.f32 	%f424, %f422, %f423, %f416;
	mov.f32 	%f425, 0f3102E308;
	fma.rn.f32 	%f426, %f422, %f425, %f424;
	mul.f32 	%f427, %f426, 0f3FB8AA3B;
	add.f32 	%f428, %f422, 0f4B40007F;
	mov.b32 	%r217, %f428;
	shl.b32 	%r218, %r217, 23;
	mov.b32 	%f429, %r218;
	ex2.approx.ftz.f32 	%f430, %f427;
	mul.f32 	%f95, %f430, %f429;
	setp.eq.f32 	%p49, %f95, 0f7F800000;
	mov.f32 	%f1005, 0f7F800000;
	@%p49 bra 	$L__BB0_41;

	fma.rn.f32 	%f1005, %f95, %f94, %f95;

$L__BB0_41:
	mov.f32 	%f965, 0f3E666666;
	cvt.rzi.f32.f32 	%f964, %f965;
	add.f32 	%f963, %f964, %f964;
	mov.f32 	%f962, 0f3EE66666;
	sub.f32 	%f961, %f962, %f963;
	abs.f32 	%f960, %f961;
	setp.lt.f32 	%p50, %f1002, 0f00000000;
	setp.eq.f32 	%p51, %f960, 0f3F800000;
	and.pred  	%p1, %p50, %p51;
	setp.eq.f32 	%p52, %f1002, 0f00000000;
	@%p52 bra 	$L__BB0_45;
	bra.uni 	$L__BB0_42;

$L__BB0_45:
	add.f32 	%f435, %f1002, %f1002;
	selp.f32 	%f1007, %f435, 0f00000000, %p51;
	bra.uni 	$L__BB0_46;

$L__BB0_42:
	mov.b32 	%r219, %f1005;
	xor.b32  	%r220, %r219, -2147483648;
	mov.b32 	%f431, %r220;
	selp.f32 	%f1007, %f431, %f1005, %p1;
	setp.geu.f32 	%p53, %f1002, 0f00000000;
	@%p53 bra 	$L__BB0_46;

	mov.f32 	%f432, 0f3EE66666;
	cvt.rzi.f32.f32 	%f433, %f432;
	setp.eq.f32 	%p54, %f433, 0f3EE66666;
	@%p54 bra 	$L__BB0_46;

	mov.f32 	%f1007, 0f7FFFFFFF;

$L__BB0_46:
	abs.f32 	%f966, %f1002;
	add.f32 	%f436, %f966, 0f3EE66666;
	mov.b32 	%r221, %f436;
	setp.lt.s32 	%p56, %r221, 2139095040;
	@%p56 bra 	$L__BB0_51;

	abs.f32 	%f967, %f1002;
	setp.gtu.f32 	%p57, %f967, 0f7F800000;
	@%p57 bra 	$L__BB0_50;
	bra.uni 	$L__BB0_48;

$L__BB0_50:
	add.f32 	%f1007, %f1002, 0f3EE66666;
	bra.uni 	$L__BB0_51;

$L__BB0_48:
	abs.f32 	%f968, %f1002;
	setp.neu.f32 	%p58, %f968, 0f7F800000;
	@%p58 bra 	$L__BB0_51;

	selp.f32 	%f1007, 0fFF800000, 0f7F800000, %p1;

$L__BB0_51:
	setp.eq.f32 	%p59, %f1002, 0f3F800000;
	selp.f32 	%f104, 0f3F800000, %f1007, %p59;
	abs.f32 	%f105, %f1003;
	setp.lt.f32 	%p60, %f105, 0f00800000;
	mul.f32 	%f438, %f105, 0f4B800000;
	selp.f32 	%f439, %f438, %f105, %p60;
	selp.f32 	%f440, 0fC3170000, 0fC2FE0000, %p60;
	mov.b32 	%r222, %f439;
	and.b32  	%r223, %r222, 8388607;
	or.b32  	%r224, %r223, 1065353216;
	mov.b32 	%f441, %r224;
	shr.u32 	%r225, %r222, 23;
	cvt.rn.f32.u32 	%f442, %r225;
	add.f32 	%f443, %f440, %f442;
	setp.gt.f32 	%p61, %f441, 0f3FB504F3;
	mul.f32 	%f444, %f441, 0f3F000000;
	add.f32 	%f445, %f443, 0f3F800000;
	selp.f32 	%f446, %f445, %f443, %p61;
	selp.f32 	%f447, %f444, %f441, %p61;
	add.f32 	%f448, %f447, 0fBF800000;
	add.f32 	%f449, %f447, 0f3F800000;
	rcp.approx.ftz.f32 	%f450, %f449;
	add.f32 	%f451, %f448, %f448;
	mul.f32 	%f452, %f451, %f450;
	mul.f32 	%f453, %f452, %f452;
	mov.f32 	%f454, 0f3C4CAF63;
	mov.f32 	%f455, 0f3B18F0FE;
	fma.rn.f32 	%f456, %f455, %f453, %f454;
	mov.f32 	%f457, 0f3DAAAABD;
	fma.rn.f32 	%f458, %f456, %f453, %f457;
	mul.rn.f32 	%f459, %f458, %f453;
	mul.rn.f32 	%f460, %f459, %f452;
	sub.f32 	%f461, %f448, %f452;
	add.f32 	%f462, %f461, %f461;
	neg.f32 	%f463, %f452;
	fma.rn.f32 	%f464, %f463, %f448, %f462;
	mul.rn.f32 	%f465, %f450, %f464;
	add.f32 	%f466, %f460, %f452;
	sub.f32 	%f467, %f452, %f466;
	add.f32 	%f468, %f460, %f467;
	add.f32 	%f469, %f465, %f468;
	add.f32 	%f470, %f466, %f469;
	sub.f32 	%f471, %f466, %f470;
	add.f32 	%f472, %f469, %f471;
	mov.f32 	%f473, 0f3F317200;
	mul.rn.f32 	%f474, %f446, %f473;
	mov.f32 	%f475, 0f35BFBE8E;
	mul.rn.f32 	%f476, %f446, %f475;
	add.f32 	%f477, %f474, %f470;
	sub.f32 	%f478, %f474, %f477;
	add.f32 	%f479, %f470, %f478;
	add.f32 	%f480, %f472, %f479;
	add.f32 	%f481, %f476, %f480;
	add.f32 	%f482, %f477, %f481;
	sub.f32 	%f483, %f477, %f482;
	add.f32 	%f484, %f481, %f483;
	mov.f32 	%f485, 0f3EE66666;
	mul.rn.f32 	%f486, %f485, %f482;
	neg.f32 	%f487, %f486;
	fma.rn.f32 	%f488, %f485, %f482, %f487;
	fma.rn.f32 	%f489, %f485, %f484, %f488;
	mov.f32 	%f490, 0f00000000;
	fma.rn.f32 	%f491, %f490, %f482, %f489;
	add.rn.f32 	%f492, %f486, %f491;
	neg.f32 	%f493, %f492;
	add.rn.f32 	%f494, %f486, %f493;
	add.rn.f32 	%f495, %f494, %f491;
	mov.b32 	%r226, %f492;
	setp.eq.s32 	%p62, %r226, 1118925336;
	add.s32 	%r227, %r226, -1;
	mov.b32 	%f496, %r227;
	add.f32 	%f497, %f495, 0f37000000;
	selp.f32 	%f106, %f497, %f495, %p62;
	selp.f32 	%f498, %f496, %f492, %p62;
	mov.f32 	%f499, 0f3FB8AA3B;
	mul.rn.f32 	%f500, %f498, %f499;
	cvt.rzi.f32.f32 	%f501, %f500;
	abs.f32 	%f502, %f501;
	setp.gt.f32 	%p63, %f502, 0f42FC0000;
	mov.b32 	%r228, %f501;
	and.b32  	%r229, %r228, -2147483648;
	or.b32  	%r230, %r229, 1123811328;
	mov.b32 	%f503, %r230;
	selp.f32 	%f504, %f503, %f501, %p63;
	mov.f32 	%f505, 0fBF317218;
	fma.rn.f32 	%f506, %f504, %f505, %f498;
	mov.f32 	%f507, 0f3102E308;
	fma.rn.f32 	%f508, %f504, %f507, %f506;
	mul.f32 	%f509, %f508, 0f3FB8AA3B;
	add.f32 	%f510, %f504, 0f4B40007F;
	mov.b32 	%r231, %f510;
	shl.b32 	%r232, %r231, 23;
	mov.b32 	%f511, %r232;
	ex2.approx.ftz.f32 	%f512, %f509;
	mul.f32 	%f107, %f512, %f511;
	setp.eq.f32 	%p64, %f107, 0f7F800000;
	mov.f32 	%f1008, 0f7F800000;
	@%p64 bra 	$L__BB0_53;

	fma.rn.f32 	%f1008, %f107, %f106, %f107;

$L__BB0_53:
	setp.lt.f32 	%p65, %f1003, 0f00000000;
	and.pred  	%p2, %p65, %p51;
	setp.eq.f32 	%p67, %f1003, 0f00000000;
	@%p67 bra 	$L__BB0_57;
	bra.uni 	$L__BB0_54;

$L__BB0_57:
	add.f32 	%f517, %f1003, %f1003;
	selp.f32 	%f1010, %f517, 0f00000000, %p51;
	bra.uni 	$L__BB0_58;

$L__BB0_54:
	mov.b32 	%r233, %f1008;
	xor.b32  	%r234, %r233, -2147483648;
	mov.b32 	%f513, %r234;
	selp.f32 	%f1010, %f513, %f1008, %p2;
	setp.geu.f32 	%p68, %f1003, 0f00000000;
	@%p68 bra 	$L__BB0_58;

	mov.f32 	%f514, 0f3EE66666;
	cvt.rzi.f32.f32 	%f515, %f514;
	setp.eq.f32 	%p69, %f515, 0f3EE66666;
	@%p69 bra 	$L__BB0_58;

	mov.f32 	%f1010, 0f7FFFFFFF;

$L__BB0_58:
	abs.f32 	%f969, %f1003;
	add.f32 	%f518, %f969, 0f3EE66666;
	mov.b32 	%r235, %f518;
	setp.lt.s32 	%p71, %r235, 2139095040;
	@%p71 bra 	$L__BB0_63;

	abs.f32 	%f970, %f1003;
	setp.gtu.f32 	%p72, %f970, 0f7F800000;
	@%p72 bra 	$L__BB0_62;
	bra.uni 	$L__BB0_60;

$L__BB0_62:
	add.f32 	%f1010, %f1003, 0f3EE66666;
	bra.uni 	$L__BB0_63;

$L__BB0_60:
	abs.f32 	%f971, %f1003;
	setp.neu.f32 	%p73, %f971, 0f7F800000;
	@%p73 bra 	$L__BB0_63;

	selp.f32 	%f1010, 0fFF800000, 0f7F800000, %p2;

$L__BB0_63:
	setp.eq.f32 	%p74, %f1003, 0f3F800000;
	selp.f32 	%f116, 0f3F800000, %f1010, %p74;
	abs.f32 	%f117, %f1004;
	setp.lt.f32 	%p75, %f117, 0f00800000;
	mul.f32 	%f520, %f117, 0f4B800000;
	selp.f32 	%f521, %f520, %f117, %p75;
	selp.f32 	%f522, 0fC3170000, 0fC2FE0000, %p75;
	mov.b32 	%r236, %f521;
	and.b32  	%r237, %r236, 8388607;
	or.b32  	%r238, %r237, 1065353216;
	mov.b32 	%f523, %r238;
	shr.u32 	%r239, %r236, 23;
	cvt.rn.f32.u32 	%f524, %r239;
	add.f32 	%f525, %f522, %f524;
	setp.gt.f32 	%p76, %f523, 0f3FB504F3;
	mul.f32 	%f526, %f523, 0f3F000000;
	add.f32 	%f527, %f525, 0f3F800000;
	selp.f32 	%f528, %f527, %f525, %p76;
	selp.f32 	%f529, %f526, %f523, %p76;
	add.f32 	%f530, %f529, 0fBF800000;
	add.f32 	%f531, %f529, 0f3F800000;
	rcp.approx.ftz.f32 	%f532, %f531;
	add.f32 	%f533, %f530, %f530;
	mul.f32 	%f534, %f533, %f532;
	mul.f32 	%f535, %f534, %f534;
	mov.f32 	%f536, 0f3C4CAF63;
	mov.f32 	%f537, 0f3B18F0FE;
	fma.rn.f32 	%f538, %f537, %f535, %f536;
	mov.f32 	%f539, 0f3DAAAABD;
	fma.rn.f32 	%f540, %f538, %f535, %f539;
	mul.rn.f32 	%f541, %f540, %f535;
	mul.rn.f32 	%f542, %f541, %f534;
	sub.f32 	%f543, %f530, %f534;
	add.f32 	%f544, %f543, %f543;
	neg.f32 	%f545, %f534;
	fma.rn.f32 	%f546, %f545, %f530, %f544;
	mul.rn.f32 	%f547, %f532, %f546;
	add.f32 	%f548, %f542, %f534;
	sub.f32 	%f549, %f534, %f548;
	add.f32 	%f550, %f542, %f549;
	add.f32 	%f551, %f547, %f550;
	add.f32 	%f552, %f548, %f551;
	sub.f32 	%f553, %f548, %f552;
	add.f32 	%f554, %f551, %f553;
	mov.f32 	%f555, 0f3F317200;
	mul.rn.f32 	%f556, %f528, %f555;
	mov.f32 	%f557, 0f35BFBE8E;
	mul.rn.f32 	%f558, %f528, %f557;
	add.f32 	%f559, %f556, %f552;
	sub.f32 	%f560, %f556, %f559;
	add.f32 	%f561, %f552, %f560;
	add.f32 	%f562, %f554, %f561;
	add.f32 	%f563, %f558, %f562;
	add.f32 	%f564, %f559, %f563;
	sub.f32 	%f565, %f559, %f564;
	add.f32 	%f566, %f563, %f565;
	mov.f32 	%f567, 0f3EE66666;
	mul.rn.f32 	%f568, %f567, %f564;
	neg.f32 	%f569, %f568;
	fma.rn.f32 	%f570, %f567, %f564, %f569;
	fma.rn.f32 	%f571, %f567, %f566, %f570;
	mov.f32 	%f572, 0f00000000;
	fma.rn.f32 	%f573, %f572, %f564, %f571;
	add.rn.f32 	%f574, %f568, %f573;
	neg.f32 	%f575, %f574;
	add.rn.f32 	%f576, %f568, %f575;
	add.rn.f32 	%f577, %f576, %f573;
	mov.b32 	%r240, %f574;
	setp.eq.s32 	%p77, %r240, 1118925336;
	add.s32 	%r241, %r240, -1;
	mov.b32 	%f578, %r241;
	add.f32 	%f579, %f577, 0f37000000;
	selp.f32 	%f118, %f579, %f577, %p77;
	selp.f32 	%f580, %f578, %f574, %p77;
	mov.f32 	%f581, 0f3FB8AA3B;
	mul.rn.f32 	%f582, %f580, %f581;
	cvt.rzi.f32.f32 	%f583, %f582;
	abs.f32 	%f584, %f583;
	setp.gt.f32 	%p78, %f584, 0f42FC0000;
	mov.b32 	%r242, %f583;
	and.b32  	%r243, %r242, -2147483648;
	or.b32  	%r244, %r243, 1123811328;
	mov.b32 	%f585, %r244;
	selp.f32 	%f586, %f585, %f583, %p78;
	mov.f32 	%f587, 0fBF317218;
	fma.rn.f32 	%f588, %f586, %f587, %f580;
	mov.f32 	%f589, 0f3102E308;
	fma.rn.f32 	%f590, %f586, %f589, %f588;
	mul.f32 	%f591, %f590, 0f3FB8AA3B;
	add.f32 	%f592, %f586, 0f4B40007F;
	mov.b32 	%r245, %f592;
	shl.b32 	%r246, %r245, 23;
	mov.b32 	%f593, %r246;
	ex2.approx.ftz.f32 	%f594, %f591;
	mul.f32 	%f119, %f594, %f593;
	setp.eq.f32 	%p79, %f119, 0f7F800000;
	mov.f32 	%f1011, 0f7F800000;
	@%p79 bra 	$L__BB0_65;

	fma.rn.f32 	%f1011, %f119, %f118, %f119;

$L__BB0_65:
	setp.lt.f32 	%p80, %f1004, 0f00000000;
	and.pred  	%p3, %p80, %p51;
	setp.eq.f32 	%p82, %f1004, 0f00000000;
	@%p82 bra 	$L__BB0_69;
	bra.uni 	$L__BB0_66;

$L__BB0_69:
	add.f32 	%f599, %f1004, %f1004;
	selp.f32 	%f1013, %f599, 0f00000000, %p51;
	bra.uni 	$L__BB0_70;

$L__BB0_66:
	mov.b32 	%r247, %f1011;
	xor.b32  	%r248, %r247, -2147483648;
	mov.b32 	%f595, %r248;
	selp.f32 	%f1013, %f595, %f1011, %p3;
	setp.geu.f32 	%p83, %f1004, 0f00000000;
	@%p83 bra 	$L__BB0_70;

	mov.f32 	%f596, 0f3EE66666;
	cvt.rzi.f32.f32 	%f597, %f596;
	setp.eq.f32 	%p84, %f597, 0f3EE66666;
	@%p84 bra 	$L__BB0_70;

	mov.f32 	%f1013, 0f7FFFFFFF;

$L__BB0_70:
	abs.f32 	%f972, %f1004;
	add.f32 	%f600, %f972, 0f3EE66666;
	mov.b32 	%r249, %f600;
	setp.lt.s32 	%p86, %r249, 2139095040;
	@%p86 bra 	$L__BB0_75;

	abs.f32 	%f973, %f1004;
	setp.gtu.f32 	%p87, %f973, 0f7F800000;
	@%p87 bra 	$L__BB0_74;
	bra.uni 	$L__BB0_72;

$L__BB0_74:
	add.f32 	%f1013, %f1004, 0f3EE66666;
	bra.uni 	$L__BB0_75;

$L__BB0_72:
	abs.f32 	%f974, %f1004;
	setp.neu.f32 	%p88, %f974, 0f7F800000;
	@%p88 bra 	$L__BB0_75;

	selp.f32 	%f1013, 0fFF800000, 0f7F800000, %p3;

$L__BB0_75:
	setp.eq.f32 	%p89, %f1004, 0f3F800000;
	mov.f32 	%f602, 0f3F800000;
	selp.f32 	%f603, 0f3F800000, %f1013, %p89;
	min.f32 	%f604, %f104, %f602;
	mov.f32 	%f605, 0f00000000;
	max.f32 	%f128, %f605, %f604;
	min.f32 	%f606, %f116, %f602;
	max.f32 	%f129, %f605, %f606;
	min.f32 	%f607, %f603, %f602;
	max.f32 	%f130, %f605, %f607;
	mov.f32 	%f611, 0f3ED55555;
	abs.f32 	%f132, %f128;
	setp.lt.f32 	%p90, %f132, 0f00800000;
	mul.f32 	%f613, %f132, 0f4B800000;
	selp.f32 	%f614, %f613, %f132, %p90;
	selp.f32 	%f615, 0fC3170000, 0fC2FE0000, %p90;
	mov.b32 	%r252, %f614;
	and.b32  	%r253, %r252, 8388607;
	or.b32  	%r254, %r253, 1065353216;
	mov.b32 	%f616, %r254;
	shr.u32 	%r255, %r252, 23;
	cvt.rn.f32.u32 	%f617, %r255;
	add.f32 	%f618, %f615, %f617;
	setp.gt.f32 	%p91, %f616, 0f3FB504F3;
	mul.f32 	%f619, %f616, 0f3F000000;
	add.f32 	%f620, %f618, 0f3F800000;
	selp.f32 	%f621, %f620, %f618, %p91;
	selp.f32 	%f622, %f619, %f616, %p91;
	add.f32 	%f623, %f622, 0fBF800000;
	add.f32 	%f624, %f622, 0f3F800000;
	rcp.approx.ftz.f32 	%f625, %f624;
	add.f32 	%f626, %f623, %f623;
	mul.f32 	%f627, %f626, %f625;
	mul.f32 	%f628, %f627, %f627;
	mov.f32 	%f629, 0f3C4CAF63;
	mov.f32 	%f630, 0f3B18F0FE;
	fma.rn.f32 	%f631, %f630, %f628, %f629;
	mov.f32 	%f632, 0f3DAAAABD;
	fma.rn.f32 	%f633, %f631, %f628, %f632;
	mul.rn.f32 	%f634, %f633, %f628;
	mul.rn.f32 	%f635, %f634, %f627;
	sub.f32 	%f636, %f623, %f627;
	add.f32 	%f637, %f636, %f636;
	neg.f32 	%f638, %f627;
	fma.rn.f32 	%f639, %f638, %f623, %f637;
	mul.rn.f32 	%f640, %f625, %f639;
	add.f32 	%f641, %f635, %f627;
	sub.f32 	%f642, %f627, %f641;
	add.f32 	%f643, %f635, %f642;
	add.f32 	%f644, %f640, %f643;
	add.f32 	%f645, %f641, %f644;
	sub.f32 	%f646, %f641, %f645;
	add.f32 	%f647, %f644, %f646;
	mov.f32 	%f648, 0f3F317200;
	mul.rn.f32 	%f649, %f621, %f648;
	mov.f32 	%f650, 0f35BFBE8E;
	mul.rn.f32 	%f651, %f621, %f650;
	add.f32 	%f652, %f649, %f645;
	sub.f32 	%f653, %f649, %f652;
	add.f32 	%f654, %f645, %f653;
	add.f32 	%f655, %f647, %f654;
	add.f32 	%f656, %f651, %f655;
	add.f32 	%f657, %f652, %f656;
	sub.f32 	%f658, %f652, %f657;
	add.f32 	%f659, %f656, %f658;
	mul.rn.f32 	%f660, %f611, %f657;
	neg.f32 	%f661, %f660;
	fma.rn.f32 	%f662, %f611, %f657, %f661;
	fma.rn.f32 	%f663, %f611, %f659, %f662;
	fma.rn.f32 	%f664, %f605, %f657, %f663;
	add.rn.f32 	%f665, %f660, %f664;
	neg.f32 	%f666, %f665;
	add.rn.f32 	%f667, %f660, %f666;
	add.rn.f32 	%f668, %f667, %f664;
	mov.b32 	%r256, %f665;
	setp.eq.s32 	%p92, %r256, 1118925336;
	add.s32 	%r257, %r256, -1;
	mov.b32 	%f669, %r257;
	add.f32 	%f670, %f668, 0f37000000;
	selp.f32 	%f133, %f670, %f668, %p92;
	selp.f32 	%f671, %f669, %f665, %p92;
	mov.f32 	%f672, 0f3FB8AA3B;
	mul.rn.f32 	%f673, %f671, %f672;
	cvt.rzi.f32.f32 	%f674, %f673;
	abs.f32 	%f675, %f674;
	setp.gt.f32 	%p93, %f675, 0f42FC0000;
	mov.b32 	%r258, %f674;
	and.b32  	%r259, %r258, -2147483648;
	or.b32  	%r260, %r259, 1123811328;
	mov.b32 	%f676, %r260;
	selp.f32 	%f677, %f676, %f674, %p93;
	mov.f32 	%f678, 0fBF317218;
	fma.rn.f32 	%f679, %f677, %f678, %f671;
	mov.f32 	%f680, 0f3102E308;
	fma.rn.f32 	%f681, %f677, %f680, %f679;
	mul.f32 	%f682, %f681, 0f3FB8AA3B;
	add.f32 	%f683, %f677, 0f4B40007F;
	mov.b32 	%r261, %f683;
	shl.b32 	%r262, %r261, 23;
	mov.b32 	%f684, %r262;
	ex2.approx.ftz.f32 	%f685, %f682;
	mul.f32 	%f134, %f685, %f684;
	setp.eq.f32 	%p94, %f134, 0f7F800000;
	mov.f32 	%f1014, 0f7F800000;
	@%p94 bra 	$L__BB0_77;

	fma.rn.f32 	%f1014, %f134, %f133, %f134;

$L__BB0_77:
	mov.f32 	%f955, 0f3E555555;
	cvt.rzi.f32.f32 	%f954, %f955;
	add.f32 	%f953, %f954, %f954;
	mov.f32 	%f952, 0f3ED55555;
	sub.f32 	%f951, %f952, %f953;
	abs.f32 	%f950, %f951;
	setp.lt.f32 	%p95, %f128, 0f00000000;
	setp.eq.f32 	%p96, %f950, 0f3F800000;
	and.pred  	%p4, %p95, %p96;
	setp.eq.f32 	%p97, %f128, 0f00000000;
	@%p97 bra 	$L__BB0_81;
	bra.uni 	$L__BB0_78;

$L__BB0_81:
	add.f32 	%f690, %f128, %f128;
	selp.f32 	%f1016, %f690, 0f00000000, %p96;
	bra.uni 	$L__BB0_82;

$L__BB0_78:
	mov.b32 	%r263, %f1014;
	xor.b32  	%r264, %r263, -2147483648;
	mov.b32 	%f686, %r264;
	selp.f32 	%f1016, %f686, %f1014, %p4;
	setp.geu.f32 	%p98, %f128, 0f00000000;
	@%p98 bra 	$L__BB0_82;

	mov.f32 	%f687, 0f3ED55555;
	cvt.rzi.f32.f32 	%f688, %f687;
	setp.eq.f32 	%p99, %f688, 0f3ED55555;
	@%p99 bra 	$L__BB0_82;

	mov.f32 	%f1016, 0f7FFFFFFF;

$L__BB0_82:
	add.f32 	%f691, %f132, 0f3ED55555;
	mov.b32 	%r265, %f691;
	setp.lt.s32 	%p101, %r265, 2139095040;
	@%p101 bra 	$L__BB0_87;

	setp.gtu.f32 	%p102, %f132, 0f7F800000;
	@%p102 bra 	$L__BB0_86;
	bra.uni 	$L__BB0_84;

$L__BB0_86:
	add.f32 	%f1016, %f128, 0f3ED55555;
	bra.uni 	$L__BB0_87;

$L__BB0_84:
	setp.neu.f32 	%p103, %f132, 0f7F800000;
	@%p103 bra 	$L__BB0_87;

	selp.f32 	%f1016, 0fFF800000, 0f7F800000, %p4;

$L__BB0_87:
	abs.f32 	%f143, %f129;
	setp.lt.f32 	%p104, %f143, 0f00800000;
	mul.f32 	%f693, %f143, 0f4B800000;
	selp.f32 	%f694, %f693, %f143, %p104;
	selp.f32 	%f695, 0fC3170000, 0fC2FE0000, %p104;
	mov.b32 	%r266, %f694;
	and.b32  	%r267, %r266, 8388607;
	or.b32  	%r268, %r267, 1065353216;
	mov.b32 	%f696, %r268;
	shr.u32 	%r269, %r266, 23;
	cvt.rn.f32.u32 	%f697, %r269;
	add.f32 	%f698, %f695, %f697;
	setp.gt.f32 	%p105, %f696, 0f3FB504F3;
	mul.f32 	%f699, %f696, 0f3F000000;
	add.f32 	%f700, %f698, 0f3F800000;
	selp.f32 	%f701, %f700, %f698, %p105;
	selp.f32 	%f702, %f699, %f696, %p105;
	add.f32 	%f703, %f702, 0fBF800000;
	add.f32 	%f704, %f702, 0f3F800000;
	rcp.approx.ftz.f32 	%f705, %f704;
	add.f32 	%f706, %f703, %f703;
	mul.f32 	%f707, %f706, %f705;
	mul.f32 	%f708, %f707, %f707;
	mov.f32 	%f709, 0f3C4CAF63;
	mov.f32 	%f710, 0f3B18F0FE;
	fma.rn.f32 	%f711, %f710, %f708, %f709;
	mov.f32 	%f712, 0f3DAAAABD;
	fma.rn.f32 	%f713, %f711, %f708, %f712;
	mul.rn.f32 	%f714, %f713, %f708;
	mul.rn.f32 	%f715, %f714, %f707;
	sub.f32 	%f716, %f703, %f707;
	add.f32 	%f717, %f716, %f716;
	neg.f32 	%f718, %f707;
	fma.rn.f32 	%f719, %f718, %f703, %f717;
	mul.rn.f32 	%f720, %f705, %f719;
	add.f32 	%f721, %f715, %f707;
	sub.f32 	%f722, %f707, %f721;
	add.f32 	%f723, %f715, %f722;
	add.f32 	%f724, %f720, %f723;
	add.f32 	%f725, %f721, %f724;
	sub.f32 	%f726, %f721, %f725;
	add.f32 	%f727, %f724, %f726;
	mov.f32 	%f728, 0f3F317200;
	mul.rn.f32 	%f729, %f701, %f728;
	mov.f32 	%f730, 0f35BFBE8E;
	mul.rn.f32 	%f731, %f701, %f730;
	add.f32 	%f732, %f729, %f725;
	sub.f32 	%f733, %f729, %f732;
	add.f32 	%f734, %f725, %f733;
	add.f32 	%f735, %f727, %f734;
	add.f32 	%f736, %f731, %f735;
	add.f32 	%f737, %f732, %f736;
	sub.f32 	%f738, %f732, %f737;
	add.f32 	%f739, %f736, %f738;
	mov.f32 	%f740, 0f3ED55555;
	mul.rn.f32 	%f741, %f740, %f737;
	neg.f32 	%f742, %f741;
	fma.rn.f32 	%f743, %f740, %f737, %f742;
	fma.rn.f32 	%f744, %f740, %f739, %f743;
	mov.f32 	%f745, 0f00000000;
	fma.rn.f32 	%f746, %f745, %f737, %f744;
	add.rn.f32 	%f747, %f741, %f746;
	neg.f32 	%f748, %f747;
	add.rn.f32 	%f749, %f741, %f748;
	add.rn.f32 	%f750, %f749, %f746;
	mov.b32 	%r270, %f747;
	setp.eq.s32 	%p106, %r270, 1118925336;
	add.s32 	%r271, %r270, -1;
	mov.b32 	%f751, %r271;
	add.f32 	%f752, %f750, 0f37000000;
	selp.f32 	%f144, %f752, %f750, %p106;
	selp.f32 	%f753, %f751, %f747, %p106;
	mov.f32 	%f754, 0f3FB8AA3B;
	mul.rn.f32 	%f755, %f753, %f754;
	cvt.rzi.f32.f32 	%f756, %f755;
	abs.f32 	%f757, %f756;
	setp.gt.f32 	%p107, %f757, 0f42FC0000;
	mov.b32 	%r272, %f756;
	and.b32  	%r273, %r272, -2147483648;
	or.b32  	%r274, %r273, 1123811328;
	mov.b32 	%f758, %r274;
	selp.f32 	%f759, %f758, %f756, %p107;
	mov.f32 	%f760, 0fBF317218;
	fma.rn.f32 	%f761, %f759, %f760, %f753;
	mov.f32 	%f762, 0f3102E308;
	fma.rn.f32 	%f763, %f759, %f762, %f761;
	mul.f32 	%f764, %f763, 0f3FB8AA3B;
	add.f32 	%f765, %f759, 0f4B40007F;
	mov.b32 	%r275, %f765;
	shl.b32 	%r276, %r275, 23;
	mov.b32 	%f766, %r276;
	ex2.approx.ftz.f32 	%f767, %f764;
	mul.f32 	%f145, %f767, %f766;
	setp.eq.f32 	%p108, %f145, 0f7F800000;
	mov.f32 	%f1017, 0f7F800000;
	@%p108 bra 	$L__BB0_89;

	fma.rn.f32 	%f1017, %f145, %f144, %f145;

$L__BB0_89:
	setp.lt.f32 	%p109, %f129, 0f00000000;
	and.pred  	%p5, %p109, %p96;
	setp.eq.f32 	%p111, %f129, 0f00000000;
	@%p111 bra 	$L__BB0_93;
	bra.uni 	$L__BB0_90;

$L__BB0_93:
	add.f32 	%f772, %f129, %f129;
	selp.f32 	%f1019, %f772, 0f00000000, %p96;
	bra.uni 	$L__BB0_94;

$L__BB0_90:
	mov.b32 	%r277, %f1017;
	xor.b32  	%r278, %r277, -2147483648;
	mov.b32 	%f768, %r278;
	selp.f32 	%f1019, %f768, %f1017, %p5;
	setp.geu.f32 	%p112, %f129, 0f00000000;
	@%p112 bra 	$L__BB0_94;

	mov.f32 	%f769, 0f3ED55555;
	cvt.rzi.f32.f32 	%f770, %f769;
	setp.eq.f32 	%p113, %f770, 0f3ED55555;
	@%p113 bra 	$L__BB0_94;

	mov.f32 	%f1019, 0f7FFFFFFF;

$L__BB0_94:
	add.f32 	%f773, %f143, 0f3ED55555;
	mov.b32 	%r279, %f773;
	setp.lt.s32 	%p115, %r279, 2139095040;
	@%p115 bra 	$L__BB0_99;

	setp.gtu.f32 	%p116, %f143, 0f7F800000;
	@%p116 bra 	$L__BB0_98;
	bra.uni 	$L__BB0_96;

$L__BB0_98:
	add.f32 	%f1019, %f129, 0f3ED55555;
	bra.uni 	$L__BB0_99;

$L__BB0_96:
	setp.neu.f32 	%p117, %f143, 0f7F800000;
	@%p117 bra 	$L__BB0_99;

	selp.f32 	%f1019, 0fFF800000, 0f7F800000, %p5;

$L__BB0_99:
	abs.f32 	%f154, %f130;
	setp.lt.f32 	%p118, %f154, 0f00800000;
	mul.f32 	%f775, %f154, 0f4B800000;
	selp.f32 	%f776, %f775, %f154, %p118;
	selp.f32 	%f777, 0fC3170000, 0fC2FE0000, %p118;
	mov.b32 	%r280, %f776;
	and.b32  	%r281, %r280, 8388607;
	or.b32  	%r282, %r281, 1065353216;
	mov.b32 	%f778, %r282;
	shr.u32 	%r283, %r280, 23;
	cvt.rn.f32.u32 	%f779, %r283;
	add.f32 	%f780, %f777, %f779;
	setp.gt.f32 	%p119, %f778, 0f3FB504F3;
	mul.f32 	%f781, %f778, 0f3F000000;
	add.f32 	%f782, %f780, 0f3F800000;
	selp.f32 	%f783, %f782, %f780, %p119;
	selp.f32 	%f784, %f781, %f778, %p119;
	add.f32 	%f785, %f784, 0fBF800000;
	add.f32 	%f786, %f784, 0f3F800000;
	rcp.approx.ftz.f32 	%f787, %f786;
	add.f32 	%f788, %f785, %f785;
	mul.f32 	%f789, %f788, %f787;
	mul.f32 	%f790, %f789, %f789;
	mov.f32 	%f791, 0f3C4CAF63;
	mov.f32 	%f792, 0f3B18F0FE;
	fma.rn.f32 	%f793, %f792, %f790, %f791;
	mov.f32 	%f794, 0f3DAAAABD;
	fma.rn.f32 	%f795, %f793, %f790, %f794;
	mul.rn.f32 	%f796, %f795, %f790;
	mul.rn.f32 	%f797, %f796, %f789;
	sub.f32 	%f798, %f785, %f789;
	add.f32 	%f799, %f798, %f798;
	neg.f32 	%f800, %f789;
	fma.rn.f32 	%f801, %f800, %f785, %f799;
	mul.rn.f32 	%f802, %f787, %f801;
	add.f32 	%f803, %f797, %f789;
	sub.f32 	%f804, %f789, %f803;
	add.f32 	%f805, %f797, %f804;
	add.f32 	%f806, %f802, %f805;
	add.f32 	%f807, %f803, %f806;
	sub.f32 	%f808, %f803, %f807;
	add.f32 	%f809, %f806, %f808;
	mov.f32 	%f810, 0f3F317200;
	mul.rn.f32 	%f811, %f783, %f810;
	mov.f32 	%f812, 0f35BFBE8E;
	mul.rn.f32 	%f813, %f783, %f812;
	add.f32 	%f814, %f811, %f807;
	sub.f32 	%f815, %f811, %f814;
	add.f32 	%f816, %f807, %f815;
	add.f32 	%f817, %f809, %f816;
	add.f32 	%f818, %f813, %f817;
	add.f32 	%f819, %f814, %f818;
	sub.f32 	%f820, %f814, %f819;
	add.f32 	%f821, %f818, %f820;
	mov.f32 	%f822, 0f3ED55555;
	mul.rn.f32 	%f823, %f822, %f819;
	neg.f32 	%f824, %f823;
	fma.rn.f32 	%f825, %f822, %f819, %f824;
	fma.rn.f32 	%f826, %f822, %f821, %f825;
	mov.f32 	%f827, 0f00000000;
	fma.rn.f32 	%f828, %f827, %f819, %f826;
	add.rn.f32 	%f829, %f823, %f828;
	neg.f32 	%f830, %f829;
	add.rn.f32 	%f831, %f823, %f830;
	add.rn.f32 	%f832, %f831, %f828;
	mov.b32 	%r284, %f829;
	setp.eq.s32 	%p120, %r284, 1118925336;
	add.s32 	%r285, %r284, -1;
	mov.b32 	%f833, %r285;
	add.f32 	%f834, %f832, 0f37000000;
	selp.f32 	%f155, %f834, %f832, %p120;
	selp.f32 	%f835, %f833, %f829, %p120;
	mov.f32 	%f836, 0f3FB8AA3B;
	mul.rn.f32 	%f837, %f835, %f836;
	cvt.rzi.f32.f32 	%f838, %f837;
	abs.f32 	%f839, %f838;
	setp.gt.f32 	%p121, %f839, 0f42FC0000;
	mov.b32 	%r286, %f838;
	and.b32  	%r287, %r286, -2147483648;
	or.b32  	%r288, %r287, 1123811328;
	mov.b32 	%f840, %r288;
	selp.f32 	%f841, %f840, %f838, %p121;
	mov.f32 	%f842, 0fBF317218;
	fma.rn.f32 	%f843, %f841, %f842, %f835;
	mov.f32 	%f844, 0f3102E308;
	fma.rn.f32 	%f845, %f841, %f844, %f843;
	mul.f32 	%f846, %f845, 0f3FB8AA3B;
	add.f32 	%f847, %f841, 0f4B40007F;
	mov.b32 	%r289, %f847;
	shl.b32 	%r290, %r289, 23;
	mov.b32 	%f848, %r290;
	ex2.approx.ftz.f32 	%f849, %f846;
	mul.f32 	%f156, %f849, %f848;
	setp.eq.f32 	%p122, %f156, 0f7F800000;
	mov.f32 	%f1020, 0f7F800000;
	@%p122 bra 	$L__BB0_101;

	fma.rn.f32 	%f1020, %f156, %f155, %f156;

$L__BB0_101:
	setp.lt.f32 	%p123, %f130, 0f00000000;
	and.pred  	%p6, %p123, %p96;
	setp.eq.f32 	%p125, %f130, 0f00000000;
	@%p125 bra 	$L__BB0_105;
	bra.uni 	$L__BB0_102;

$L__BB0_105:
	add.f32 	%f854, %f130, %f130;
	selp.f32 	%f1022, %f854, 0f00000000, %p96;
	bra.uni 	$L__BB0_106;

$L__BB0_102:
	mov.b32 	%r291, %f1020;
	xor.b32  	%r292, %r291, -2147483648;
	mov.b32 	%f850, %r292;
	selp.f32 	%f1022, %f850, %f1020, %p6;
	setp.geu.f32 	%p126, %f130, 0f00000000;
	@%p126 bra 	$L__BB0_106;

	mov.f32 	%f851, 0f3ED55555;
	cvt.rzi.f32.f32 	%f852, %f851;
	setp.eq.f32 	%p127, %f852, 0f3ED55555;
	@%p127 bra 	$L__BB0_106;

	mov.f32 	%f1022, 0f7FFFFFFF;

$L__BB0_106:
	add.f32 	%f855, %f154, 0f3ED55555;
	mov.b32 	%r293, %f855;
	setp.lt.s32 	%p129, %r293, 2139095040;
	@%p129 bra 	$L__BB0_111;

	setp.gtu.f32 	%p130, %f154, 0f7F800000;
	@%p130 bra 	$L__BB0_110;
	bra.uni 	$L__BB0_108;

$L__BB0_110:
	add.f32 	%f1022, %f130, 0f3ED55555;
	bra.uni 	$L__BB0_111;

$L__BB0_108:
	setp.neu.f32 	%p131, %f154, 0f7F800000;
	@%p131 bra 	$L__BB0_111;

	selp.f32 	%f1022, 0fFF800000, 0f7F800000, %p6;

$L__BB0_111:
	ld.const.u64 	%rd96, [params+144];
	cvta.to.global.u64 	%rd95, %rd96;
	ld.const.u32 	%r327, [params+136];
	mad.lo.s32 	%r326, %r327, %r5, %r4;
	cvt.u64.u32 	%rd94, %r326;
	fma.rn.f32 	%f856, %f1016, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p132, %f128, 0f3F800000;
	mov.f32 	%f857, 0f3F800000;
	selp.f32 	%f858, 0f3F7FFFFF, %f856, %p132;
	mul.f32 	%f859, %f128, 0f414EB852;
	setp.lt.f32 	%p133, %f128, 0f3B4D2E1C;
	selp.f32 	%f860, %f859, %f858, %p133;
	fma.rn.f32 	%f861, %f1019, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p134, %f129, 0f3F800000;
	selp.f32 	%f862, 0f3F7FFFFF, %f861, %p134;
	mul.f32 	%f863, %f129, 0f414EB852;
	setp.lt.f32 	%p135, %f129, 0f3B4D2E1C;
	selp.f32 	%f864, %f863, %f862, %p135;
	fma.rn.f32 	%f865, %f1022, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p136, %f130, 0f3F800000;
	selp.f32 	%f866, 0f3F7FFFFF, %f865, %p136;
	mul.f32 	%f867, %f130, 0f414EB852;
	setp.lt.f32 	%p137, %f130, 0f3B4D2E1C;
	selp.f32 	%f868, %f867, %f866, %p137;
	min.f32 	%f869, %f860, %f857;
	mov.f32 	%f870, 0f00000000;
	max.f32 	%f871, %f870, %f869;
	mul.f32 	%f872, %f871, 0f43800000;
	cvt.rzi.u32.f32 	%r294, %f872;
	min.u32 	%r295, %r294, 255;
	min.f32 	%f873, %f864, %f857;
	max.f32 	%f874, %f870, %f873;
	mul.f32 	%f875, %f874, 0f43800000;
	cvt.rzi.u32.f32 	%r296, %f875;
	min.u32 	%r297, %r296, 255;
	min.f32 	%f876, %f868, %f857;
	max.f32 	%f877, %f870, %f876;
	mul.f32 	%f878, %f877, 0f43800000;
	cvt.rzi.u32.f32 	%r298, %f878;
	min.u32 	%r299, %r298, 255;
	shl.b64 	%rd60, %rd94, 2;
	add.s64 	%rd61, %rd95, %rd60;
	cvt.u16.u32 	%rs23, %r299;
	cvt.u16.u32 	%rs24, %r297;
	cvt.u16.u32 	%rs25, %r295;
	mov.u16 	%rs26, 255;
	st.global.v4.u8 	[%rd61], {%rs25, %rs24, %rs23, %rs26};

$L__BB0_112:
	ld.const.u32 	%r328, [params+104];
	and.b32  	%r300, %r328, 4;
	setp.eq.s32 	%p138, %r300, 0;
	@%p138 bra 	$L__BB0_114;

	ld.const.u64 	%rd62, [params+224];
	cvta.to.global.u64 	%rd63, %rd62;
	ld.const.u32 	%r301, [params+216];
	mad.lo.s32 	%r302, %r301, %r5, %r4;
	mov.f32 	%f882, 0f3F800000;
	mul.wide.u32 	%rd64, %r302, 8;
	add.s64 	%rd65, %rd63, %rd64;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f882;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f1004;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f1003;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f1002;}

	// end inline asm
	st.global.v4.u16 	[%rd65], {%rs27, %rs28, %rs29, %rs30};

$L__BB0_114:
	ld.const.u32 	%r329, [params+104];
	and.b32  	%r49, %r329, 16;
	setp.eq.s32 	%p139, %r49, 0;
	@%p139 bra 	$L__BB0_116;

	ld.const.u64 	%rd66, [params+240];
	cvta.to.global.u64 	%rd67, %rd66;
	ld.const.u32 	%r303, [params+232];
	mad.lo.s32 	%r304, %r303, %r5, %r4;
	mov.f32 	%f886, 0f3F800000;
	mul.wide.u32 	%rd68, %r304, 8;
	add.s64 	%rd69, %rd67, %rd68;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs34, %f886;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs33, %f79;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs32, %f78;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs31, %f77;}

	// end inline asm
	st.global.v4.u16 	[%rd69], {%rs31, %rs32, %rs33, %rs34};

$L__BB0_116:
	ld.const.u32 	%r330, [params+104];
	and.b32  	%r305, %r330, 64;
	setp.eq.s32 	%p140, %r305, 0;
	@%p140 bra 	$L__BB0_131;

	mul.f32 	%f887, %f196, 0f3F372474;
	fma.rn.f32 	%f888, %f195, 0f3E59999A, %f887;
	fma.rn.f32 	%f165, %f197, 0f3D93A92A, %f888;
	ld.const.u64 	%rd70, [params+680];
	cvta.to.global.u64 	%rd71, %rd70;
	ld.const.u32 	%r306, [params+672];
	mad.lo.s32 	%r307, %r306, %r5, %r4;
	mul.wide.u32 	%rd72, %r307, 4;
	add.s64 	%rd73, %rd71, %rd72;
	ld.global.v4.u8 	{%rs35, %rs36, %rs37, %rs38}, [%rd73];
	cvt.rn.f32.u16 	%f889, %rs35;
	div.rn.f32 	%f890, %f889, 0f437F0000;
	fma.rn.f32 	%f891, %f890, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f892, %rs36;
	div.rn.f32 	%f893, %f892, 0f437F0000;
	fma.rn.f32 	%f894, %f893, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f895, %rs37;
	div.rn.f32 	%f896, %f895, 0f437F0000;
	fma.rn.f32 	%f897, %f896, 0f40000000, 0fBF800000;
	mul.f32 	%f898, %f894, %f894;
	fma.rn.f32 	%f899, %f891, %f891, %f898;
	fma.rn.f32 	%f900, %f897, %f897, %f899;
	sqrt.rn.f32 	%f901, %f900;
	rcp.rn.f32 	%f902, %f901;
	mul.f32 	%f166, %f902, %f891;
	mul.f32 	%f167, %f902, %f894;
	mul.f32 	%f168, %f902, %f897;
	abs.f32 	%f903, %f989;
	setp.gt.f32 	%p141, %f903, 0f00000000;
	@%p141 bra 	$L__BB0_120;

	abs.f32 	%f904, %f988;
	setp.gt.f32 	%p142, %f904, 0f00000000;
	@%p142 bra 	$L__BB0_120;
	bra.uni 	$L__BB0_119;

$L__BB0_120:
	setp.ne.s32 	%p146, %r49, 0;
	mov.f32 	%f1023, %f989;
	mov.f32 	%f1024, %f988;
	mov.f32 	%f1025, %f987;
	@%p146 bra 	$L__BB0_122;

$L__BB0_121:
	mul.f32 	%f906, %f988, %f988;
	fma.rn.f32 	%f907, %f989, %f989, %f906;
	fma.rn.f32 	%f908, %f987, %f987, %f907;
	sqrt.rn.f32 	%f909, %f908;
	rcp.rn.f32 	%f910, %f909;
	mul.f32 	%f911, %f989, %f910;
	mul.f32 	%f912, %f988, %f910;
	mul.f32 	%f913, %f987, %f910;
	mul.f32 	%f914, %f78, 0f3F372474;
	fma.rn.f32 	%f915, %f77, 0f3E59999A, %f914;
	fma.rn.f32 	%f916, %f79, 0f3D93A92A, %f915;
	mul.f32 	%f917, %f916, %f911;
	mul.f32 	%f918, %f916, %f912;
	mul.f32 	%f919, %f916, %f913;
	fma.rn.f32 	%f1023, %f165, %f166, %f917;
	fma.rn.f32 	%f1024, %f165, %f167, %f918;
	fma.rn.f32 	%f1025, %f165, %f168, %f919;

$L__BB0_122:
	mul.f32 	%f920, %f1024, %f1024;
	fma.rn.f32 	%f921, %f1023, %f1023, %f920;
	fma.rn.f32 	%f922, %f1025, %f1025, %f921;
	sqrt.rn.f32 	%f923, %f922;
	rcp.rn.f32 	%f924, %f923;
	mul.f32 	%f925, %f1023, %f924;
	mul.f32 	%f926, %f1024, %f924;
	mul.f32 	%f927, %f1025, %f924;
	mul.f32 	%f928, %f976, %f926;
	fma.rn.f32 	%f929, %f975, %f925, %f928;
	fma.rn.f32 	%f930, %f977, %f927, %f929;
	fma.rn.f32 	%f931, %f930, 0f3F000000, 0f3F000000;
	mov.f32 	%f932, 0f3B808081;
	max.f32 	%f933, %f931, %f932;
	mul.f32 	%f934, %f933, 0f437F0000;
	cvt.rzi.s32.f32 	%r308, %f934;
	ld.const.u64 	%rd74, [params+208];
	cvta.to.global.u64 	%rd75, %rd74;
	ld.const.u32 	%r309, [params+200];
	mad.lo.s32 	%r310, %r309, %r5, %r4;
	fma.rn.f32 	%f935, %f925, 0f3F000000, 0f3F000000;
	mul.f32 	%f936, %f935, 0f437F0000;
	cvt.rzi.u32.f32 	%r311, %f936;
	fma.rn.f32 	%f937, %f926, 0f3F000000, 0f3F000000;
	mul.f32 	%f938, %f937, 0f437F0000;
	cvt.rzi.u32.f32 	%r312, %f938;
	fma.rn.f32 	%f939, %f927, 0f3F000000, 0f3F000000;
	mul.f32 	%f940, %f939, 0f437F0000;
	cvt.rzi.u32.f32 	%r313, %f940;
	mul.wide.u32 	%rd76, %r310, 4;
	add.s64 	%rd77, %rd75, %rd76;
	cvt.u16.u32 	%rs39, %r308;
	cvt.u16.u32 	%rs40, %r313;
	cvt.u16.u32 	%rs41, %r312;
	cvt.u16.u32 	%rs42, %r311;
	st.global.v4.u8 	[%rd77], {%rs42, %rs41, %rs40, %rs39};

$L__BB0_131:
	ret;

$L__BB0_119:
	abs.f32 	%f905, %f987;
	setp.leu.f32 	%p143, %f905, 0f00000000;
	setp.ne.s32 	%p144, %r49, 0;
	or.pred  	%p145, %p143, %p144;
	selp.f32 	%f1023, %f166, %f989, %p143;
	selp.f32 	%f1024, %f167, %f988, %p143;
	selp.f32 	%f1025, %f168, %f987, %p143;
	@%p145 bra 	$L__BB0_122;
	bra.uni 	$L__BB0_121;

}