//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 ignoreNormal;
.global .align 1 .b8 localLights[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[12];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<134>;
	.reg .b16 	%rs<63>;
	.reg .f32 	%f<1298>;
	.reg .b32 	%r<203>;
	.reg .b64 	%rd<126>;


	mov.u64 	%rd125, __local_depot0;
	cvta.local.u64 	%SP, %rd125;
	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
	cvt.u64.u32	%rd10, %r30;
	cvt.u64.u32	%rd11, %r31;
	mov.u64 	%rd14, uvnormal;
	cvta.global.u64 	%rd9, %rd14;
	mov.u32 	%r28, 2;
	mov.u32 	%r29, 4;
	mov.u64 	%rd13, 0;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
	// inline asm
	ld.u32 	%r1, [%rd8];
	shr.u32 	%r34, %r1, 16;
	cvt.u16.u32	%rs1, %r34;
	and.b16  	%rs5, %rs1, 255;
	cvt.u16.u32	%rs6, %r1;
	or.b16  	%rs7, %rs6, %rs5;
	setp.eq.s16	%p8, %rs7, 0;
	mov.f32 	%f1223, 0f00000000;
	mov.f32 	%f1224, %f1223;
	mov.f32 	%f1225, %f1223;
	@%p8 bra 	BB0_2;

	ld.u8 	%rs8, [%rd8+1];
	and.b16  	%rs10, %rs6, 255;
	cvt.rn.f32.u16	%f238, %rs10;
	div.rn.f32 	%f239, %f238, 0f437F0000;
	fma.rn.f32 	%f240, %f239, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f241, %rs8;
	div.rn.f32 	%f242, %f241, 0f437F0000;
	fma.rn.f32 	%f243, %f242, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f244, %rs5;
	div.rn.f32 	%f245, %f244, 0f437F0000;
	fma.rn.f32 	%f246, %f245, 0f40000000, 0fBF800000;
	mul.f32 	%f247, %f243, %f243;
	fma.rn.f32 	%f248, %f240, %f240, %f247;
	fma.rn.f32 	%f249, %f246, %f246, %f248;
	sqrt.rn.f32 	%f250, %f249;
	rcp.rn.f32 	%f251, %f250;
	mul.f32 	%f1223, %f240, %f251;
	mul.f32 	%f1224, %f243, %f251;
	mul.f32 	%f1225, %f246, %f251;

BB0_2:
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	ld.global.v2.u32 	{%r38, %r39}, [tileInfo];
	add.s32 	%r2, %r35, %r38;
	add.s32 	%r3, %r36, %r39;
	setp.eq.f32	%p9, %f1224, 0f00000000;
	setp.eq.f32	%p10, %f1223, 0f00000000;
	and.pred  	%p11, %p10, %p9;
	setp.eq.f32	%p12, %f1225, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB0_103;
	bra.uni 	BB0_3;

BB0_103:
	ld.global.u32 	%r202, [imageEnabled];
	and.b32  	%r175, %r202, 1;
	setp.eq.b32	%p128, %r175, 1;
	@!%p128 bra 	BB0_105;
	bra.uni 	BB0_104;

BB0_104:
	cvt.u64.u32	%rd86, %r2;
	cvt.u64.u32	%rd87, %r3;
	mov.u64 	%rd90, image;
	cvta.global.u64 	%rd85, %rd90;
	// inline asm
	call (%rd84), _rt_buffer_get_64, (%rd85, %r28, %r29, %rd86, %rd87, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs43, 0;
	st.v4.u8 	[%rd84], {%rs43, %rs43, %rs43, %rs43};
	ld.global.u32 	%r202, [imageEnabled];

BB0_105:
	and.b32  	%r178, %r202, 8;
	setp.eq.s32	%p129, %r178, 0;
	@%p129 bra 	BB0_107;

	cvt.u64.u32	%rd93, %r2;
	cvt.u64.u32	%rd94, %r3;
	mov.u64 	%rd97, image_Mask;
	cvta.global.u64 	%rd92, %rd97;
	// inline asm
	call (%rd91), _rt_buffer_get_64, (%rd92, %r28, %r28, %rd93, %rd94, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1212, 0f00000000;
	cvt.rzi.u32.f32	%r181, %f1212;
	cvt.u16.u32	%rs44, %r181;
	mov.u16 	%rs45, 0;
	st.v2.u8 	[%rd91], {%rs44, %rs45};
	ld.global.u32 	%r202, [imageEnabled];

BB0_107:
	and.b32  	%r182, %r202, 4;
	setp.eq.s32	%p130, %r182, 0;
	@%p130 bra 	BB0_111;

	ld.global.u32 	%r183, [additive];
	setp.eq.s32	%p131, %r183, 0;
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	@%p131 bra 	BB0_110;

	mov.u64 	%rd110, image_HDR;
	cvta.global.u64 	%rd99, %rd110;
	mov.u32 	%r187, 8;
	// inline asm
	call (%rd98), _rt_buffer_get_64, (%rd99, %r28, %r187, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs52, %rs53, %rs54, %rs55}, [%rd98];
	// inline asm
	{  cvt.f32.f16 %f1213, %rs52;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1214, %rs53;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1215, %rs54;}

	// inline asm
	// inline asm
	call (%rd104), _rt_buffer_get_64, (%rd99, %r28, %r187, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1216, %f1213, 0f00000000;
	add.f32 	%f1217, %f1214, 0f00000000;
	add.f32 	%f1218, %f1215, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1218;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f1217;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs49, %f1216;}

	// inline asm
	mov.u16 	%rs56, 0;
	st.v4.u16 	[%rd104], {%rs49, %rs50, %rs51, %rs56};
	bra.uni 	BB0_111;

BB0_3:
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd17, %r47;
	cvt.u64.u32	%rd18, %r48;
	mov.u64 	%rd26, uvpos;
	cvta.global.u64 	%rd16, %rd26;
	mov.u32 	%r44, 12;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
	// inline asm
	ld.f32 	%f9, [%rd15+8];
	ld.f32 	%f8, [%rd15+4];
	ld.f32 	%f7, [%rd15];
	mul.f32 	%f259, %f7, 0f3456BF95;
	mul.f32 	%f260, %f8, 0f3456BF95;
	mul.f32 	%f261, %f9, 0f3456BF95;
	abs.f32 	%f262, %f1223;
	div.rn.f32 	%f263, %f259, %f262;
	abs.f32 	%f264, %f1224;
	div.rn.f32 	%f265, %f260, %f264;
	abs.f32 	%f266, %f1225;
	div.rn.f32 	%f267, %f261, %f266;
	abs.f32 	%f268, %f263;
	abs.f32 	%f269, %f265;
	abs.f32 	%f270, %f267;
	mov.f32 	%f271, 0f38D1B717;
	max.f32 	%f272, %f268, %f271;
	max.f32 	%f273, %f269, %f271;
	max.f32 	%f274, %f270, %f271;
	fma.rn.f32 	%f10, %f1223, %f272, %f7;
	fma.rn.f32 	%f11, %f1224, %f273, %f8;
	fma.rn.f32 	%f12, %f1225, %f274, %f9;
	mov.u64 	%rd27, localLights;
	cvta.global.u64 	%rd25, %rd27;
	mov.u32 	%r45, 1;
	mov.u32 	%r46, 96;
	// inline asm
	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
	// inline asm
	cvt.u32.u64	%r4, %rd21;
	setp.eq.s32	%p14, %r4, 0;
	mov.f32 	%f1226, 0f00000000;
	mov.f32 	%f18, %f1226;
	mov.f32 	%f19, %f1226;
	mov.f32 	%f20, %f1226;
	mov.f32 	%f1230, %f1226;
	mov.f32 	%f1231, %f1226;
	mov.f32 	%f1232, %f1226;
	@%p14 bra 	BB0_49;

	mov.f32 	%f282, 0f40000000;
	cvt.rzi.f32.f32	%f283, %f282;
	add.f32 	%f284, %f283, %f283;
	mov.f32 	%f285, 0f40800000;
	sub.f32 	%f286, %f285, %f284;
	abs.f32 	%f13, %f286;
	mul.f32 	%f14, %f10, 0f3456BF95;
	mul.f32 	%f15, %f11, 0f3456BF95;
	mul.f32 	%f16, %f12, 0f3456BF95;
	mov.f32 	%f281, 0f00000000;
	mov.u32 	%r194, 0;
	abs.f32 	%f472, %f14;
	abs.f32 	%f473, %f15;
	max.f32 	%f474, %f472, %f473;
	abs.f32 	%f475, %f16;
	max.f32 	%f476, %f474, %f475;
	mov.f32 	%f1226, %f281;
	mov.f32 	%f18, %f281;
	mov.f32 	%f19, %f281;
	mov.f32 	%f20, %f281;
	mov.f32 	%f1230, %f281;
	mov.f32 	%f1231, %f281;
	mov.f32 	%f1232, %f281;

BB0_5:
	cvt.u64.u32	%rd30, %r194;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
	// inline asm
	ld.v4.f32 	{%f289, %f290, %f291, %f292}, [%rd28+80];
	ld.v4.f32 	{%f293, %f294, %f295, %f296}, [%rd28+64];
	ld.v4.f32 	{%f297, %f298, %f299, %f300}, [%rd28+48];
	ld.v4.f32 	{%f301, %f1241, %f1242, %f304}, [%rd28+32];
	ld.v4.f32 	{%f305, %f306, %f307, %f308}, [%rd28+16];
	ld.v4.f32 	{%f309, %f310, %f311, %f312}, [%rd28];
	mov.b32 	 %r6, %f292;
	sub.f32 	%f48, %f310, %f7;
	sub.f32 	%f50, %f311, %f8;
	sub.f32 	%f52, %f312, %f9;
	mul.f32 	%f314, %f50, %f50;
	fma.rn.f32 	%f315, %f48, %f48, %f314;
	fma.rn.f32 	%f316, %f52, %f52, %f315;
	sqrt.rn.f32 	%f53, %f316;
	rcp.rn.f32 	%f317, %f53;
	mul.f32 	%f54, %f48, %f317;
	mul.f32 	%f55, %f50, %f317;
	mul.f32 	%f56, %f52, %f317;
	mul.f32 	%f57, %f53, %f308;
	abs.f32 	%f58, %f57;
	setp.lt.f32	%p15, %f58, 0f00800000;
	mul.f32 	%f318, %f58, 0f4B800000;
	selp.f32	%f319, 0fC3170000, 0fC2FE0000, %p15;
	selp.f32	%f320, %f318, %f58, %p15;
	mov.b32 	 %r54, %f320;
	and.b32  	%r55, %r54, 8388607;
	or.b32  	%r56, %r55, 1065353216;
	mov.b32 	 %f321, %r56;
	shr.u32 	%r57, %r54, 23;
	cvt.rn.f32.u32	%f322, %r57;
	add.f32 	%f323, %f319, %f322;
	setp.gt.f32	%p16, %f321, 0f3FB504F3;
	mul.f32 	%f324, %f321, 0f3F000000;
	add.f32 	%f325, %f323, 0f3F800000;
	selp.f32	%f326, %f324, %f321, %p16;
	selp.f32	%f327, %f325, %f323, %p16;
	add.f32 	%f328, %f326, 0fBF800000;
	add.f32 	%f288, %f326, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f287,%f288;
	// inline asm
	add.f32 	%f329, %f328, %f328;
	mul.f32 	%f330, %f287, %f329;
	mul.f32 	%f331, %f330, %f330;
	mov.f32 	%f332, 0f3C4CAF63;
	mov.f32 	%f333, 0f3B18F0FE;
	fma.rn.f32 	%f334, %f333, %f331, %f332;
	mov.f32 	%f335, 0f3DAAAABD;
	fma.rn.f32 	%f336, %f334, %f331, %f335;
	mul.rn.f32 	%f337, %f336, %f331;
	mul.rn.f32 	%f338, %f337, %f330;
	sub.f32 	%f339, %f328, %f330;
	neg.f32 	%f340, %f330;
	add.f32 	%f341, %f339, %f339;
	fma.rn.f32 	%f342, %f340, %f328, %f341;
	mul.rn.f32 	%f343, %f287, %f342;
	add.f32 	%f344, %f338, %f330;
	sub.f32 	%f345, %f330, %f344;
	add.f32 	%f346, %f338, %f345;
	add.f32 	%f347, %f343, %f346;
	add.f32 	%f348, %f344, %f347;
	sub.f32 	%f349, %f344, %f348;
	add.f32 	%f350, %f347, %f349;
	mov.f32 	%f351, 0f3F317200;
	mul.rn.f32 	%f352, %f327, %f351;
	mov.f32 	%f353, 0f35BFBE8E;
	mul.rn.f32 	%f354, %f327, %f353;
	add.f32 	%f355, %f352, %f348;
	sub.f32 	%f356, %f352, %f355;
	add.f32 	%f357, %f348, %f356;
	add.f32 	%f358, %f350, %f357;
	add.f32 	%f359, %f354, %f358;
	add.f32 	%f360, %f355, %f359;
	sub.f32 	%f361, %f355, %f360;
	add.f32 	%f362, %f359, %f361;
	mul.rn.f32 	%f59, %f285, %f360;
	neg.f32 	%f364, %f59;
	fma.rn.f32 	%f365, %f285, %f360, %f364;
	fma.rn.f32 	%f366, %f285, %f362, %f365;
	fma.rn.f32 	%f60, %f281, %f360, %f366;
	add.rn.f32 	%f61, %f59, %f60;
	mov.b32 	 %r58, %f61;
	setp.eq.s32	%p1, %r58, 1118925336;
	add.s32 	%r59, %r58, -1;
	mov.b32 	 %f368, %r59;
	selp.f32	%f369, %f368, %f61, %p1;
	mul.f32 	%f370, %f369, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f371, %f370;
	mov.f32 	%f372, 0fBF317200;
	fma.rn.f32 	%f373, %f371, %f372, %f369;
	mov.f32 	%f374, 0fB5BFBE8E;
	fma.rn.f32 	%f375, %f371, %f374, %f373;
	mul.f32 	%f376, %f375, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f377, %f376;
	add.f32 	%f378, %f371, 0f00000000;
	ex2.approx.f32 	%f379, %f378;
	mul.f32 	%f380, %f377, %f379;
	setp.lt.f32	%p17, %f369, 0fC2D20000;
	selp.f32	%f381, 0f00000000, %f380, %p17;
	setp.gt.f32	%p18, %f369, 0f42D20000;
	selp.f32	%f1233, 0f7F800000, %f381, %p18;
	setp.eq.f32	%p19, %f1233, 0f7F800000;
	@%p19 bra 	BB0_7;

	neg.f32 	%f382, %f61;
	add.rn.f32 	%f383, %f59, %f382;
	add.rn.f32 	%f384, %f383, %f60;
	add.f32 	%f385, %f384, 0f37000000;
	selp.f32	%f386, %f385, %f384, %p1;
	fma.rn.f32 	%f1233, %f1233, %f386, %f1233;

BB0_7:
	setp.lt.f32	%p20, %f57, 0f00000000;
	setp.eq.f32	%p21, %f13, 0f3F800000;
	and.pred  	%p2, %p20, %p21;
	mov.b32 	 %r60, %f1233;
	xor.b32  	%r61, %r60, -2147483648;
	mov.b32 	 %f387, %r61;
	selp.f32	%f1235, %f387, %f1233, %p2;
	setp.eq.f32	%p22, %f57, 0f00000000;
	@%p22 bra 	BB0_10;
	bra.uni 	BB0_8;

BB0_10:
	add.f32 	%f390, %f57, %f57;
	selp.f32	%f1235, %f390, 0f00000000, %p21;
	bra.uni 	BB0_11;

BB0_8:
	setp.geu.f32	%p23, %f57, 0f00000000;
	@%p23 bra 	BB0_11;

	cvt.rzi.f32.f32	%f389, %f285;
	setp.neu.f32	%p24, %f389, 0f40800000;
	selp.f32	%f1235, 0f7FFFFFFF, %f1235, %p24;

BB0_11:
	add.f32 	%f391, %f58, 0f40800000;
	mov.b32 	 %r62, %f391;
	setp.lt.s32	%p26, %r62, 2139095040;
	@%p26 bra 	BB0_16;

	setp.gtu.f32	%p27, %f58, 0f7F800000;
	@%p27 bra 	BB0_15;
	bra.uni 	BB0_13;

BB0_15:
	add.f32 	%f1235, %f57, 0f40800000;
	bra.uni 	BB0_16;

BB0_13:
	setp.neu.f32	%p28, %f58, 0f7F800000;
	@%p28 bra 	BB0_16;

	selp.f32	%f1235, 0fFF800000, 0f7F800000, %p2;

BB0_16:
	mul.f32 	%f392, %f53, %f306;
	mov.f32 	%f1265, 0f3F800000;
	sub.f32 	%f394, %f1265, %f1235;
	setp.eq.f32	%p29, %f57, 0f3F800000;
	selp.f32	%f395, 0f00000000, %f394, %p29;
	cvt.sat.f32.f32	%f396, %f395;
	fma.rn.f32 	%f397, %f392, %f392, %f307;
	div.rn.f32 	%f87, %f396, %f397;
	mul.f32 	%f398, %f1224, %f55;
	fma.rn.f32 	%f399, %f1223, %f54, %f398;
	fma.rn.f32 	%f400, %f1225, %f56, %f399;
	ld.global.u32 	%r63, [ignoreNormal];
	setp.eq.s32	%p30, %r63, 0;
	selp.f32	%f401, %f400, 0f3F800000, %p30;
	cvt.sat.f32.f32	%f88, %f401;
	setp.eq.f32	%p31, %f309, 0f3F800000;
	@%p31 bra 	BB0_23;
	bra.uni 	BB0_17;

BB0_23:
	setp.leu.f32	%p35, %f304, 0f00000000;
	@%p35 bra 	BB0_19;

	setp.geu.f32	%p36, %f300, 0f00000000;
	@%p36 bra 	BB0_25;

	sub.f32 	%f1222, %f312, %f9;
	sub.f32 	%f1221, %f310, %f7;
	sub.f32 	%f1220, %f311, %f8;
	mul.f32 	%f424, %f290, %f1220;
	fma.rn.f32 	%f425, %f289, %f1221, %f424;
	fma.rn.f32 	%f426, %f291, %f1222, %f425;
	rcp.rn.f32 	%f427, %f426;
	mul.f32 	%f1236, %f1221, %f427;
	mul.f32 	%f1237, %f1220, %f427;
	mul.f32 	%f1238, %f1222, %f427;
	neg.f32 	%f300, %f300;
	bra.uni 	BB0_27;

BB0_17:
	setp.eq.f32	%p32, %f309, 0f40000000;
	@%p32 bra 	BB0_21;
	bra.uni 	BB0_18;

BB0_21:
	setp.leu.f32	%p34, %f304, 0f00000000;
	@%p34 bra 	BB0_19;

	mul.f32 	%f418, %f298, %f55;
	fma.rn.f32 	%f419, %f297, %f54, %f418;
	mul.f32 	%f420, %f294, %f55;
	fma.rn.f32 	%f421, %f293, %f54, %f420;
	mul.f32 	%f422, %f290, %f55;
	fma.rn.f32 	%f423, %f289, %f54, %f422;
	fma.rn.f32 	%f415, %f299, %f56, %f419;
	fma.rn.f32 	%f416, %f295, %f56, %f421;
	fma.rn.f32 	%f417, %f291, %f56, %f423;
	cvt.rzi.s32.f32	%r64, %f304;
	mov.u32 	%r65, 6;
	mov.u32 	%r66, 0;
	// inline asm
	call (%f411, %f412, %f413, %f414), _rt_texture_get_base_id, (%r64, %r65, %f415, %f416, %f417, %r66);
	// inline asm
	mul.f32 	%f1240, %f301, %f411;
	mul.f32 	%f1241, %f1241, %f412;
	mul.f32 	%f1242, %f1242, %f413;
	bra.uni 	BB0_28;

BB0_18:
	setp.neu.f32	%p33, %f309, 0f40800000;
	@%p33 bra 	BB0_19;

	mul.f32 	%f402, %f289, %f54;
	mul.f32 	%f403, %f290, %f55;
	neg.f32 	%f404, %f403;
	sub.f32 	%f405, %f404, %f402;
	mul.f32 	%f406, %f291, %f56;
	sub.f32 	%f407, %f405, %f406;
	fma.rn.f32 	%f408, %f304, %f407, %f300;
	cvt.sat.f32.f32	%f409, %f408;
	mul.f32 	%f410, %f409, %f409;
	mul.f32 	%f1243, %f87, %f410;
	mov.f32 	%f1240, %f301;
	bra.uni 	BB0_29;

BB0_19:
	mov.f32 	%f1240, %f301;
	bra.uni 	BB0_28;

BB0_25:
	mov.f32 	%f1236, %f54;
	mov.f32 	%f1237, %f55;
	mov.f32 	%f1238, %f56;

BB0_27:
	mul.f32 	%f436, %f291, %f56;
	mul.f32 	%f437, %f290, %f55;
	neg.f32 	%f438, %f437;
	mul.f32 	%f439, %f289, %f54;
	sub.f32 	%f440, %f438, %f439;
	sub.f32 	%f441, %f440, %f436;
	setp.gt.f32	%p37, %f441, 0f00000000;
	selp.f32	%f442, 0f3F800000, 0f00000000, %p37;
	mul.f32 	%f443, %f298, %f1237;
	fma.rn.f32 	%f444, %f297, %f1236, %f443;
	mul.f32 	%f445, %f294, %f1237;
	fma.rn.f32 	%f446, %f293, %f1236, %f445;
	fma.rn.f32 	%f447, %f299, %f1238, %f444;
	fma.rn.f32 	%f448, %f295, %f1238, %f446;
	fma.rn.f32 	%f449, %f300, %f447, 0f3F000000;
	mov.f32 	%f450, 0f3F800000;
	sub.f32 	%f432, %f450, %f449;
	fma.rn.f32 	%f433, %f300, %f448, 0f3F000000;
	cvt.rzi.s32.f32	%r67, %f304;
	mov.f32 	%f435, 0f00000000;
	// inline asm
	call (%f428, %f429, %f430, %f431), _rt_texture_get_f_id, (%r67, %r28, %f432, %f433, %f435, %f435);
	// inline asm
	mul.f32 	%f451, %f442, %f428;
	mul.f32 	%f452, %f442, %f429;
	mul.f32 	%f453, %f442, %f430;
	mul.f32 	%f1240, %f301, %f451;
	mul.f32 	%f1241, %f1241, %f452;
	mul.f32 	%f1242, %f1242, %f453;

BB0_28:
	mov.f32 	%f1243, %f87;

BB0_29:
	max.f32 	%f460, %f1240, %f1241;
	max.f32 	%f461, %f460, %f1242;
	mul.f32 	%f108, %f88, %f1243;
	mul.f32 	%f462, %f108, %f461;
	setp.lt.f32	%p39, %f462, 0f3727C5AC;
	mov.pred 	%p133, -1;
	mov.f32 	%f115, 0f00000000;
	mov.f32 	%f116, %f115;
	mov.f32 	%f117, %f115;
	mov.f32 	%f118, %f115;
	mov.f32 	%f119, %f115;
	mov.f32 	%f120, %f115;
	@%p39 bra 	BB0_31;

	mul.f32 	%f115, %f1240, %f108;
	mul.f32 	%f116, %f1241, %f108;
	mul.f32 	%f117, %f1242, %f108;
	ld.global.u8 	%rs12, [imageEnabled];
	and.b16  	%rs13, %rs12, 64;
	setp.eq.s16	%p41, %rs13, 0;
	selp.f32	%f118, 0f00000000, %f54, %p41;
	selp.f32	%f119, 0f00000000, %f55, %p41;
	selp.f32	%f120, 0f00000000, %f56, %p41;
	mov.pred 	%p133, 0;

BB0_31:
	@%p133 bra 	BB0_48;

	setp.eq.s32	%p42, %r6, 0;
	mov.u16 	%rs62, 0;
	mov.f32 	%f1266, %f1265;
	mov.f32 	%f1267, %f1265;
	@%p42 bra 	BB0_43;

	abs.s32 	%r8, %r6;
	mov.f32 	%f1262, 0f00000000;
	setp.lt.s32	%p43, %r8, 1;
	mov.f32 	%f1263, %f1262;
	mov.f32 	%f1264, %f1262;
	@%p43 bra 	BB0_42;

	max.f32 	%f122, %f476, %f271;
	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p44, %r9, 0;
	add.u64 	%rd35, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd35;
	mov.f32 	%f1262, 0f00000000;
	mov.u32 	%r198, 0;
	mov.f32 	%f1263, %f1262;
	mov.f32 	%f1264, %f1262;
	@%p44 bra 	BB0_40;

	setp.eq.s32	%p45, %r9, 1;
	mov.f32 	%f1253, 0f00000000;
	mov.u32 	%r196, 0;
	mov.f32 	%f1254, %f1253;
	mov.f32 	%f1255, %f1253;
	@%p45 bra 	BB0_39;

	setp.eq.s32	%p46, %r9, 2;
	mov.f32 	%f1250, 0f00000000;
	mov.u32 	%r195, 0;
	mov.f32 	%f1251, %f1250;
	mov.f32 	%f1252, %f1250;
	@%p46 bra 	BB0_38;

	sub.f32 	%f492, %f310, %f305;
	sub.f32 	%f493, %f311, %f305;
	sub.f32 	%f494, %f312, %f305;
	sub.f32 	%f495, %f492, %f7;
	sub.f32 	%f496, %f493, %f8;
	sub.f32 	%f497, %f494, %f9;
	mul.f32 	%f498, %f496, %f496;
	fma.rn.f32 	%f499, %f495, %f495, %f498;
	fma.rn.f32 	%f500, %f497, %f497, %f499;
	sqrt.rn.f32 	%f491, %f500;
	rcp.rn.f32 	%f501, %f491;
	mul.f32 	%f487, %f501, %f495;
	mul.f32 	%f488, %f501, %f496;
	mul.f32 	%f489, %f501, %f497;
	ld.global.u32 	%r76, [imageEnabled];
	and.b32  	%r77, %r76, 32;
	setp.eq.s32	%p47, %r77, 0;
	selp.f32	%f502, 0f3F800000, 0f41200000, %p47;
	mul.f32 	%f490, %f502, %f122;
	mov.u32 	%r78, 1065353216;
	st.local.u32 	[%rd2+8], %r78;
	st.local.u32 	[%rd2+4], %r78;
	st.local.u32 	[%rd2], %r78;
	ld.global.u32 	%r72, [root];
	// inline asm
	call _rt_trace_64, (%r72, %f10, %f11, %f12, %f487, %f488, %f489, %r45, %f490, %f491, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f503, [%rd2];
	add.f32 	%f1252, %f503, 0f00000000;
	ld.local.f32 	%f504, [%rd2+4];
	add.f32 	%f1251, %f504, 0f00000000;
	ld.local.f32 	%f505, [%rd2+8];
	add.f32 	%f1250, %f505, 0f00000000;
	mov.u32 	%r195, %r45;

BB0_38:
	cvt.rn.f32.s32	%f514, %r195;
	mul.f32 	%f515, %f514, 0f3DD32618;
	cvt.rmi.f32.f32	%f516, %f515;
	sub.f32 	%f517, %f515, %f516;
	mul.f32 	%f518, %f514, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f519, %f518;
	sub.f32 	%f520, %f518, %f519;
	mul.f32 	%f521, %f514, 0f3DC74539;
	cvt.rmi.f32.f32	%f522, %f521;
	sub.f32 	%f523, %f521, %f522;
	add.f32 	%f524, %f520, 0f4199851F;
	add.f32 	%f525, %f523, 0f4199851F;
	add.f32 	%f526, %f517, 0f4199851F;
	mul.f32 	%f527, %f520, %f525;
	fma.rn.f32 	%f528, %f517, %f524, %f527;
	fma.rn.f32 	%f529, %f526, %f523, %f528;
	add.f32 	%f530, %f517, %f529;
	add.f32 	%f531, %f520, %f529;
	add.f32 	%f532, %f523, %f529;
	add.f32 	%f533, %f530, %f531;
	mul.f32 	%f534, %f532, %f533;
	cvt.rmi.f32.f32	%f535, %f534;
	sub.f32 	%f536, %f534, %f535;
	add.f32 	%f537, %f530, %f532;
	mul.f32 	%f538, %f531, %f537;
	cvt.rmi.f32.f32	%f539, %f538;
	sub.f32 	%f540, %f538, %f539;
	add.f32 	%f541, %f531, %f532;
	mul.f32 	%f542, %f530, %f541;
	cvt.rmi.f32.f32	%f543, %f542;
	sub.f32 	%f544, %f542, %f543;
	fma.rn.f32 	%f545, %f536, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f546, %f540, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f547, %f544, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f548, %f305, %f545, %f310;
	fma.rn.f32 	%f549, %f305, %f546, %f311;
	fma.rn.f32 	%f550, %f305, %f547, %f312;
	sub.f32 	%f551, %f548, %f7;
	sub.f32 	%f552, %f549, %f8;
	sub.f32 	%f553, %f550, %f9;
	mul.f32 	%f554, %f552, %f552;
	fma.rn.f32 	%f555, %f551, %f551, %f554;
	fma.rn.f32 	%f556, %f553, %f553, %f555;
	sqrt.rn.f32 	%f513, %f556;
	rcp.rn.f32 	%f557, %f513;
	mul.f32 	%f509, %f557, %f551;
	mul.f32 	%f510, %f557, %f552;
	mul.f32 	%f511, %f557, %f553;
	ld.global.u32 	%r82, [imageEnabled];
	and.b32  	%r83, %r82, 32;
	setp.eq.s32	%p48, %r83, 0;
	selp.f32	%f558, 0f3F800000, 0f41200000, %p48;
	mul.f32 	%f512, %f558, %f122;
	mov.u32 	%r84, 1065353216;
	st.local.u32 	[%rd2+8], %r84;
	st.local.u32 	[%rd2+4], %r84;
	st.local.u32 	[%rd2], %r84;
	ld.global.u32 	%r79, [root];
	// inline asm
	call _rt_trace_64, (%r79, %f10, %f11, %f12, %f509, %f510, %f511, %r45, %f512, %f513, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f559, [%rd2];
	add.f32 	%f1255, %f1252, %f559;
	ld.local.f32 	%f560, [%rd2+4];
	add.f32 	%f1254, %f1251, %f560;
	ld.local.f32 	%f561, [%rd2+8];
	add.f32 	%f1253, %f1250, %f561;
	add.s32 	%r196, %r195, 1;

BB0_39:
	cvt.rn.f32.s32	%f570, %r196;
	mul.f32 	%f571, %f570, 0f3DD32618;
	cvt.rmi.f32.f32	%f572, %f571;
	sub.f32 	%f573, %f571, %f572;
	mul.f32 	%f574, %f570, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f575, %f574;
	sub.f32 	%f576, %f574, %f575;
	mul.f32 	%f577, %f570, 0f3DC74539;
	cvt.rmi.f32.f32	%f578, %f577;
	sub.f32 	%f579, %f577, %f578;
	add.f32 	%f580, %f576, 0f4199851F;
	add.f32 	%f581, %f579, 0f4199851F;
	add.f32 	%f582, %f573, 0f4199851F;
	mul.f32 	%f583, %f576, %f581;
	fma.rn.f32 	%f584, %f573, %f580, %f583;
	fma.rn.f32 	%f585, %f582, %f579, %f584;
	add.f32 	%f586, %f573, %f585;
	add.f32 	%f587, %f576, %f585;
	add.f32 	%f588, %f579, %f585;
	add.f32 	%f589, %f586, %f587;
	mul.f32 	%f590, %f588, %f589;
	cvt.rmi.f32.f32	%f591, %f590;
	sub.f32 	%f592, %f590, %f591;
	add.f32 	%f593, %f586, %f588;
	mul.f32 	%f594, %f587, %f593;
	cvt.rmi.f32.f32	%f595, %f594;
	sub.f32 	%f596, %f594, %f595;
	add.f32 	%f597, %f587, %f588;
	mul.f32 	%f598, %f586, %f597;
	cvt.rmi.f32.f32	%f599, %f598;
	sub.f32 	%f600, %f598, %f599;
	fma.rn.f32 	%f601, %f592, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f602, %f596, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f603, %f600, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f604, %f305, %f601, %f310;
	fma.rn.f32 	%f605, %f305, %f602, %f311;
	fma.rn.f32 	%f606, %f305, %f603, %f312;
	sub.f32 	%f607, %f604, %f7;
	sub.f32 	%f608, %f605, %f8;
	sub.f32 	%f609, %f606, %f9;
	mul.f32 	%f610, %f608, %f608;
	fma.rn.f32 	%f611, %f607, %f607, %f610;
	fma.rn.f32 	%f612, %f609, %f609, %f611;
	sqrt.rn.f32 	%f569, %f612;
	rcp.rn.f32 	%f613, %f569;
	mul.f32 	%f565, %f613, %f607;
	mul.f32 	%f566, %f613, %f608;
	mul.f32 	%f567, %f613, %f609;
	ld.global.u32 	%r88, [imageEnabled];
	and.b32  	%r89, %r88, 32;
	setp.eq.s32	%p49, %r89, 0;
	selp.f32	%f614, 0f3F800000, 0f41200000, %p49;
	mul.f32 	%f568, %f614, %f122;
	mov.u32 	%r90, 1065353216;
	st.local.u32 	[%rd2+8], %r90;
	st.local.u32 	[%rd2+4], %r90;
	st.local.u32 	[%rd2], %r90;
	ld.global.u32 	%r85, [root];
	mov.u32 	%r86, 1;
	// inline asm
	call _rt_trace_64, (%r85, %f10, %f11, %f12, %f565, %f566, %f567, %r86, %f568, %f569, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f615, [%rd2];
	add.f32 	%f1264, %f1255, %f615;
	ld.local.f32 	%f616, [%rd2+4];
	add.f32 	%f1263, %f1254, %f616;
	ld.local.f32 	%f617, [%rd2+8];
	add.f32 	%f1262, %f1253, %f617;
	add.s32 	%r198, %r196, 1;

BB0_40:
	setp.lt.u32	%p50, %r8, 4;
	@%p50 bra 	BB0_42;

BB0_41:
	cvt.rn.f32.s32	%f650, %r198;
	mul.f32 	%f651, %f650, 0f3DD32618;
	cvt.rmi.f32.f32	%f652, %f651;
	sub.f32 	%f653, %f651, %f652;
	mul.f32 	%f654, %f650, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f655, %f654;
	sub.f32 	%f656, %f654, %f655;
	mul.f32 	%f657, %f650, 0f3DC74539;
	cvt.rmi.f32.f32	%f658, %f657;
	sub.f32 	%f659, %f657, %f658;
	add.f32 	%f660, %f656, 0f4199851F;
	add.f32 	%f661, %f659, 0f4199851F;
	add.f32 	%f662, %f653, 0f4199851F;
	mul.f32 	%f663, %f656, %f661;
	fma.rn.f32 	%f664, %f653, %f660, %f663;
	fma.rn.f32 	%f665, %f662, %f659, %f664;
	add.f32 	%f666, %f653, %f665;
	add.f32 	%f667, %f656, %f665;
	add.f32 	%f668, %f659, %f665;
	add.f32 	%f669, %f666, %f667;
	mul.f32 	%f670, %f668, %f669;
	cvt.rmi.f32.f32	%f671, %f670;
	sub.f32 	%f672, %f670, %f671;
	add.f32 	%f673, %f666, %f668;
	mul.f32 	%f674, %f667, %f673;
	cvt.rmi.f32.f32	%f675, %f674;
	sub.f32 	%f676, %f674, %f675;
	add.f32 	%f677, %f667, %f668;
	mul.f32 	%f678, %f666, %f677;
	cvt.rmi.f32.f32	%f679, %f678;
	sub.f32 	%f680, %f678, %f679;
	fma.rn.f32 	%f681, %f672, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f682, %f676, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f683, %f680, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f684, %f305, %f681, %f310;
	fma.rn.f32 	%f685, %f305, %f682, %f311;
	fma.rn.f32 	%f686, %f305, %f683, %f312;
	sub.f32 	%f687, %f684, %f7;
	sub.f32 	%f688, %f685, %f8;
	sub.f32 	%f689, %f686, %f9;
	mul.f32 	%f690, %f688, %f688;
	fma.rn.f32 	%f691, %f687, %f687, %f690;
	fma.rn.f32 	%f692, %f689, %f689, %f691;
	sqrt.rn.f32 	%f625, %f692;
	rcp.rn.f32 	%f693, %f625;
	mul.f32 	%f621, %f693, %f687;
	mul.f32 	%f622, %f693, %f688;
	mul.f32 	%f623, %f693, %f689;
	ld.global.u32 	%r103, [imageEnabled];
	and.b32  	%r104, %r103, 32;
	setp.eq.s32	%p51, %r104, 0;
	selp.f32	%f694, 0f3F800000, 0f41200000, %p51;
	mul.f32 	%f624, %f694, %f122;
	mov.u32 	%r105, 1065353216;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r91, [root];
	mov.u32 	%r101, 1;
	// inline asm
	call _rt_trace_64, (%r91, %f10, %f11, %f12, %f621, %f622, %f623, %r101, %f624, %f625, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f695, [%rd2];
	add.f32 	%f696, %f1264, %f695;
	ld.local.f32 	%f697, [%rd2+4];
	add.f32 	%f698, %f1263, %f697;
	ld.local.f32 	%f699, [%rd2+8];
	add.f32 	%f700, %f1262, %f699;
	add.s32 	%r106, %r198, 1;
	cvt.rn.f32.s32	%f701, %r106;
	mul.f32 	%f702, %f701, 0f3DD32618;
	cvt.rmi.f32.f32	%f703, %f702;
	sub.f32 	%f704, %f702, %f703;
	mul.f32 	%f705, %f701, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f706, %f705;
	sub.f32 	%f707, %f705, %f706;
	mul.f32 	%f708, %f701, 0f3DC74539;
	cvt.rmi.f32.f32	%f709, %f708;
	sub.f32 	%f710, %f708, %f709;
	add.f32 	%f711, %f707, 0f4199851F;
	add.f32 	%f712, %f710, 0f4199851F;
	add.f32 	%f713, %f704, 0f4199851F;
	mul.f32 	%f714, %f707, %f712;
	fma.rn.f32 	%f715, %f704, %f711, %f714;
	fma.rn.f32 	%f716, %f713, %f710, %f715;
	add.f32 	%f717, %f704, %f716;
	add.f32 	%f718, %f707, %f716;
	add.f32 	%f719, %f710, %f716;
	add.f32 	%f720, %f717, %f718;
	mul.f32 	%f721, %f719, %f720;
	cvt.rmi.f32.f32	%f722, %f721;
	sub.f32 	%f723, %f721, %f722;
	add.f32 	%f724, %f717, %f719;
	mul.f32 	%f725, %f718, %f724;
	cvt.rmi.f32.f32	%f726, %f725;
	sub.f32 	%f727, %f725, %f726;
	add.f32 	%f728, %f718, %f719;
	mul.f32 	%f729, %f717, %f728;
	cvt.rmi.f32.f32	%f730, %f729;
	sub.f32 	%f731, %f729, %f730;
	fma.rn.f32 	%f732, %f723, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f733, %f727, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f734, %f731, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f735, %f305, %f732, %f310;
	fma.rn.f32 	%f736, %f305, %f733, %f311;
	fma.rn.f32 	%f737, %f305, %f734, %f312;
	sub.f32 	%f738, %f735, %f7;
	sub.f32 	%f739, %f736, %f8;
	sub.f32 	%f740, %f737, %f9;
	mul.f32 	%f741, %f739, %f739;
	fma.rn.f32 	%f742, %f738, %f738, %f741;
	fma.rn.f32 	%f743, %f740, %f740, %f742;
	sqrt.rn.f32 	%f633, %f743;
	rcp.rn.f32 	%f744, %f633;
	mul.f32 	%f629, %f744, %f738;
	mul.f32 	%f630, %f744, %f739;
	mul.f32 	%f631, %f744, %f740;
	ld.global.u32 	%r107, [imageEnabled];
	and.b32  	%r108, %r107, 32;
	setp.eq.s32	%p52, %r108, 0;
	selp.f32	%f745, 0f3F800000, 0f41200000, %p52;
	mul.f32 	%f632, %f745, %f122;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r94, [root];
	// inline asm
	call _rt_trace_64, (%r94, %f10, %f11, %f12, %f629, %f630, %f631, %r101, %f632, %f633, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f746, [%rd2];
	add.f32 	%f747, %f696, %f746;
	ld.local.f32 	%f748, [%rd2+4];
	add.f32 	%f749, %f698, %f748;
	ld.local.f32 	%f750, [%rd2+8];
	add.f32 	%f751, %f700, %f750;
	add.s32 	%r109, %r198, 2;
	cvt.rn.f32.s32	%f752, %r109;
	mul.f32 	%f753, %f752, 0f3DD32618;
	cvt.rmi.f32.f32	%f754, %f753;
	sub.f32 	%f755, %f753, %f754;
	mul.f32 	%f756, %f752, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f757, %f756;
	sub.f32 	%f758, %f756, %f757;
	mul.f32 	%f759, %f752, 0f3DC74539;
	cvt.rmi.f32.f32	%f760, %f759;
	sub.f32 	%f761, %f759, %f760;
	add.f32 	%f762, %f758, 0f4199851F;
	add.f32 	%f763, %f761, 0f4199851F;
	add.f32 	%f764, %f755, 0f4199851F;
	mul.f32 	%f765, %f758, %f763;
	fma.rn.f32 	%f766, %f755, %f762, %f765;
	fma.rn.f32 	%f767, %f764, %f761, %f766;
	add.f32 	%f768, %f755, %f767;
	add.f32 	%f769, %f758, %f767;
	add.f32 	%f770, %f761, %f767;
	add.f32 	%f771, %f768, %f769;
	mul.f32 	%f772, %f770, %f771;
	cvt.rmi.f32.f32	%f773, %f772;
	sub.f32 	%f774, %f772, %f773;
	add.f32 	%f775, %f768, %f770;
	mul.f32 	%f776, %f769, %f775;
	cvt.rmi.f32.f32	%f777, %f776;
	sub.f32 	%f778, %f776, %f777;
	add.f32 	%f779, %f769, %f770;
	mul.f32 	%f780, %f768, %f779;
	cvt.rmi.f32.f32	%f781, %f780;
	sub.f32 	%f782, %f780, %f781;
	fma.rn.f32 	%f783, %f774, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f784, %f778, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f785, %f782, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f786, %f305, %f783, %f310;
	fma.rn.f32 	%f787, %f305, %f784, %f311;
	fma.rn.f32 	%f788, %f305, %f785, %f312;
	sub.f32 	%f789, %f786, %f7;
	sub.f32 	%f790, %f787, %f8;
	sub.f32 	%f791, %f788, %f9;
	mul.f32 	%f792, %f790, %f790;
	fma.rn.f32 	%f793, %f789, %f789, %f792;
	fma.rn.f32 	%f794, %f791, %f791, %f793;
	sqrt.rn.f32 	%f641, %f794;
	rcp.rn.f32 	%f795, %f641;
	mul.f32 	%f637, %f795, %f789;
	mul.f32 	%f638, %f795, %f790;
	mul.f32 	%f639, %f795, %f791;
	ld.global.u32 	%r110, [imageEnabled];
	and.b32  	%r111, %r110, 32;
	setp.eq.s32	%p53, %r111, 0;
	selp.f32	%f796, 0f3F800000, 0f41200000, %p53;
	mul.f32 	%f640, %f796, %f122;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r97, [root];
	// inline asm
	call _rt_trace_64, (%r97, %f10, %f11, %f12, %f637, %f638, %f639, %r101, %f640, %f641, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f797, [%rd2];
	add.f32 	%f798, %f747, %f797;
	ld.local.f32 	%f799, [%rd2+4];
	add.f32 	%f800, %f749, %f799;
	ld.local.f32 	%f801, [%rd2+8];
	add.f32 	%f802, %f751, %f801;
	add.s32 	%r112, %r198, 3;
	cvt.rn.f32.s32	%f803, %r112;
	mul.f32 	%f804, %f803, 0f3DD32618;
	cvt.rmi.f32.f32	%f805, %f804;
	sub.f32 	%f806, %f804, %f805;
	mul.f32 	%f807, %f803, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f808, %f807;
	sub.f32 	%f809, %f807, %f808;
	mul.f32 	%f810, %f803, 0f3DC74539;
	cvt.rmi.f32.f32	%f811, %f810;
	sub.f32 	%f812, %f810, %f811;
	add.f32 	%f813, %f809, 0f4199851F;
	add.f32 	%f814, %f812, 0f4199851F;
	add.f32 	%f815, %f806, 0f4199851F;
	mul.f32 	%f816, %f809, %f814;
	fma.rn.f32 	%f817, %f806, %f813, %f816;
	fma.rn.f32 	%f818, %f815, %f812, %f817;
	add.f32 	%f819, %f806, %f818;
	add.f32 	%f820, %f809, %f818;
	add.f32 	%f821, %f812, %f818;
	add.f32 	%f822, %f819, %f820;
	mul.f32 	%f823, %f821, %f822;
	cvt.rmi.f32.f32	%f824, %f823;
	sub.f32 	%f825, %f823, %f824;
	add.f32 	%f826, %f819, %f821;
	mul.f32 	%f827, %f820, %f826;
	cvt.rmi.f32.f32	%f828, %f827;
	sub.f32 	%f829, %f827, %f828;
	add.f32 	%f830, %f820, %f821;
	mul.f32 	%f831, %f819, %f830;
	cvt.rmi.f32.f32	%f832, %f831;
	sub.f32 	%f833, %f831, %f832;
	fma.rn.f32 	%f834, %f825, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f835, %f829, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f836, %f833, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f837, %f305, %f834, %f310;
	fma.rn.f32 	%f838, %f305, %f835, %f311;
	fma.rn.f32 	%f839, %f305, %f836, %f312;
	sub.f32 	%f840, %f837, %f7;
	sub.f32 	%f841, %f838, %f8;
	sub.f32 	%f842, %f839, %f9;
	mul.f32 	%f843, %f841, %f841;
	fma.rn.f32 	%f844, %f840, %f840, %f843;
	fma.rn.f32 	%f845, %f842, %f842, %f844;
	sqrt.rn.f32 	%f649, %f845;
	rcp.rn.f32 	%f846, %f649;
	mul.f32 	%f645, %f846, %f840;
	mul.f32 	%f646, %f846, %f841;
	mul.f32 	%f647, %f846, %f842;
	ld.global.u32 	%r113, [imageEnabled];
	and.b32  	%r114, %r113, 32;
	setp.eq.s32	%p54, %r114, 0;
	selp.f32	%f847, 0f3F800000, 0f41200000, %p54;
	mul.f32 	%f648, %f847, %f122;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r100, [root];
	// inline asm
	call _rt_trace_64, (%r100, %f10, %f11, %f12, %f645, %f646, %f647, %r101, %f648, %f649, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f848, [%rd2];
	add.f32 	%f1264, %f798, %f848;
	ld.local.f32 	%f849, [%rd2+4];
	add.f32 	%f1263, %f800, %f849;
	ld.local.f32 	%f850, [%rd2+8];
	add.f32 	%f1262, %f802, %f850;
	add.s32 	%r198, %r198, 4;
	setp.lt.s32	%p55, %r198, %r8;
	@%p55 bra 	BB0_41;

BB0_42:
	cvt.rn.f32.s32	%f851, %r8;
	rcp.rn.f32 	%f852, %f851;
	mul.f32 	%f1265, %f1264, %f852;
	mul.f32 	%f1266, %f1263, %f852;
	mul.f32 	%f1267, %f1262, %f852;
	shr.u32 	%r115, %r6, 31;
	cvt.u16.u32	%rs62, %r115;

BB0_43:
	fma.rn.f32 	%f1232, %f115, %f1265, %f1232;
	fma.rn.f32 	%f1231, %f116, %f1266, %f1231;
	fma.rn.f32 	%f1230, %f117, %f1267, %f1230;
	ld.global.u8 	%rs15, [imageEnabled];
	and.b16  	%rs16, %rs15, 64;
	setp.eq.s16	%p56, %rs16, 0;
	@%p56 bra 	BB0_45;

	mul.f32 	%f853, %f116, 0f3F372474;
	fma.rn.f32 	%f854, %f115, 0f3E59999A, %f853;
	fma.rn.f32 	%f855, %f117, 0f3D93A92A, %f854;
	fma.rn.f32 	%f20, %f118, %f855, %f20;
	fma.rn.f32 	%f19, %f119, %f855, %f19;
	fma.rn.f32 	%f18, %f855, %f120, %f18;

BB0_45:
	setp.eq.s16	%p57, %rs62, 0;
	@%p57 bra 	BB0_47;

	div.rn.f32 	%f856, %f115, %f301;
	div.rn.f32 	%f857, %f856, %f87;
	cvt.sat.f32.f32	%f858, %f857;
	mul.f32 	%f1265, %f1265, %f858;

BB0_47:
	add.f32 	%f1226, %f1226, %f1265;

BB0_48:
	add.s32 	%r194, %r194, 1;
	setp.lt.u32	%p58, %r194, %r4;
	@%p58 bra 	BB0_5;

BB0_49:
	ld.global.u32 	%r200, [imageEnabled];
	and.b32  	%r116, %r200, 8;
	setp.eq.s32	%p59, %r116, 0;
	@%p59 bra 	BB0_62;

	cvt.sat.f32.f32	%f182, %f1226;
	cvt.u64.u32	%rd46, %r3;
	cvt.u64.u32	%rd45, %r2;
	mov.u64 	%rd49, image_Mask;
	cvta.global.u64 	%rd44, %rd49;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
	// inline asm
	mov.f32 	%f861, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f862, %f861;
	fma.rn.f32 	%f863, %f862, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f183, %f863;
	abs.f32 	%f184, %f182;
	setp.lt.f32	%p60, %f184, 0f00800000;
	mul.f32 	%f864, %f184, 0f4B800000;
	selp.f32	%f865, 0fC3170000, 0fC2FE0000, %p60;
	selp.f32	%f866, %f864, %f184, %p60;
	mov.b32 	 %r119, %f866;
	and.b32  	%r120, %r119, 8388607;
	or.b32  	%r121, %r120, 1065353216;
	mov.b32 	 %f867, %r121;
	shr.u32 	%r122, %r119, 23;
	cvt.rn.f32.u32	%f868, %r122;
	add.f32 	%f869, %f865, %f868;
	setp.gt.f32	%p61, %f867, 0f3FB504F3;
	mul.f32 	%f870, %f867, 0f3F000000;
	add.f32 	%f871, %f869, 0f3F800000;
	selp.f32	%f872, %f870, %f867, %p61;
	selp.f32	%f873, %f871, %f869, %p61;
	add.f32 	%f874, %f872, 0fBF800000;
	add.f32 	%f860, %f872, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f859,%f860;
	// inline asm
	add.f32 	%f875, %f874, %f874;
	mul.f32 	%f876, %f859, %f875;
	mul.f32 	%f877, %f876, %f876;
	mov.f32 	%f878, 0f3C4CAF63;
	mov.f32 	%f879, 0f3B18F0FE;
	fma.rn.f32 	%f880, %f879, %f877, %f878;
	mov.f32 	%f881, 0f3DAAAABD;
	fma.rn.f32 	%f882, %f880, %f877, %f881;
	mul.rn.f32 	%f883, %f882, %f877;
	mul.rn.f32 	%f884, %f883, %f876;
	sub.f32 	%f885, %f874, %f876;
	neg.f32 	%f886, %f876;
	add.f32 	%f887, %f885, %f885;
	fma.rn.f32 	%f888, %f886, %f874, %f887;
	mul.rn.f32 	%f889, %f859, %f888;
	add.f32 	%f890, %f884, %f876;
	sub.f32 	%f891, %f876, %f890;
	add.f32 	%f892, %f884, %f891;
	add.f32 	%f893, %f889, %f892;
	add.f32 	%f894, %f890, %f893;
	sub.f32 	%f895, %f890, %f894;
	add.f32 	%f896, %f893, %f895;
	mov.f32 	%f897, 0f3F317200;
	mul.rn.f32 	%f898, %f873, %f897;
	mov.f32 	%f899, 0f35BFBE8E;
	mul.rn.f32 	%f900, %f873, %f899;
	add.f32 	%f901, %f898, %f894;
	sub.f32 	%f902, %f898, %f901;
	add.f32 	%f903, %f894, %f902;
	add.f32 	%f904, %f896, %f903;
	add.f32 	%f905, %f900, %f904;
	add.f32 	%f906, %f901, %f905;
	sub.f32 	%f907, %f901, %f906;
	add.f32 	%f908, %f905, %f907;
	mov.f32 	%f909, 0f3EE8BA2E;
	mul.rn.f32 	%f910, %f909, %f906;
	neg.f32 	%f911, %f910;
	fma.rn.f32 	%f912, %f909, %f906, %f911;
	fma.rn.f32 	%f913, %f909, %f908, %f912;
	mov.f32 	%f914, 0f00000000;
	fma.rn.f32 	%f915, %f914, %f906, %f913;
	add.rn.f32 	%f916, %f910, %f915;
	neg.f32 	%f917, %f916;
	add.rn.f32 	%f918, %f910, %f917;
	add.rn.f32 	%f919, %f918, %f915;
	mov.b32 	 %r123, %f916;
	setp.eq.s32	%p62, %r123, 1118925336;
	add.s32 	%r124, %r123, -1;
	mov.b32 	 %f920, %r124;
	add.f32 	%f921, %f919, 0f37000000;
	selp.f32	%f922, %f920, %f916, %p62;
	selp.f32	%f185, %f921, %f919, %p62;
	mul.f32 	%f923, %f922, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f924, %f923;
	mov.f32 	%f925, 0fBF317200;
	fma.rn.f32 	%f926, %f924, %f925, %f922;
	mov.f32 	%f927, 0fB5BFBE8E;
	fma.rn.f32 	%f928, %f924, %f927, %f926;
	mul.f32 	%f929, %f928, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f930, %f929;
	add.f32 	%f931, %f924, 0f00000000;
	ex2.approx.f32 	%f932, %f931;
	mul.f32 	%f933, %f930, %f932;
	setp.lt.f32	%p63, %f922, 0fC2D20000;
	selp.f32	%f934, 0f00000000, %f933, %p63;
	setp.gt.f32	%p64, %f922, 0f42D20000;
	selp.f32	%f1286, 0f7F800000, %f934, %p64;
	setp.eq.f32	%p65, %f1286, 0f7F800000;
	@%p65 bra 	BB0_52;

	fma.rn.f32 	%f1286, %f1286, %f185, %f1286;

BB0_52:
	setp.lt.f32	%p66, %f182, 0f00000000;
	setp.eq.f32	%p67, %f183, 0f3F800000;
	and.pred  	%p4, %p66, %p67;
	mov.b32 	 %r125, %f1286;
	xor.b32  	%r126, %r125, -2147483648;
	mov.b32 	 %f935, %r126;
	selp.f32	%f1288, %f935, %f1286, %p4;
	setp.eq.f32	%p68, %f182, 0f00000000;
	@%p68 bra 	BB0_55;
	bra.uni 	BB0_53;

BB0_55:
	add.f32 	%f938, %f182, %f182;
	selp.f32	%f1288, %f938, 0f00000000, %p67;
	bra.uni 	BB0_56;

BB0_110:
	mov.u64 	%rd117, image_HDR;
	cvta.global.u64 	%rd112, %rd117;
	mov.u32 	%r189, 8;
	// inline asm
	call (%rd111), _rt_buffer_get_64, (%rd112, %r28, %r189, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1219, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f1219;}

	// inline asm
	mov.u16 	%rs58, 0;
	st.v4.u16 	[%rd111], {%rs57, %rs57, %rs57, %rs58};

BB0_111:
	ld.global.u8 	%rs59, [imageEnabled];
	and.b16  	%rs60, %rs59, 64;
	setp.eq.s16	%p132, %rs60, 0;
	@%p132 bra 	BB0_113;

	cvt.u64.u32	%rd120, %r2;
	cvt.u64.u32	%rd121, %r3;
	mov.u64 	%rd124, image_Dir;
	cvta.global.u64 	%rd119, %rd124;
	// inline asm
	call (%rd118), _rt_buffer_get_64, (%rd119, %r28, %r29, %rd120, %rd121, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs61, 0;
	st.v4.u8 	[%rd118], {%rs61, %rs61, %rs61, %rs61};
	bra.uni 	BB0_113;

BB0_53:
	setp.geu.f32	%p69, %f182, 0f00000000;
	@%p69 bra 	BB0_56;

	cvt.rzi.f32.f32	%f937, %f909;
	setp.neu.f32	%p70, %f937, 0f3EE8BA2E;
	selp.f32	%f1288, 0f7FFFFFFF, %f1288, %p70;

BB0_56:
	add.f32 	%f939, %f184, 0f3EE8BA2E;
	mov.b32 	 %r127, %f939;
	setp.lt.s32	%p72, %r127, 2139095040;
	@%p72 bra 	BB0_61;

	setp.gtu.f32	%p73, %f184, 0f7F800000;
	@%p73 bra 	BB0_60;
	bra.uni 	BB0_58;

BB0_60:
	add.f32 	%f1288, %f182, 0f3EE8BA2E;
	bra.uni 	BB0_61;

BB0_58:
	setp.neu.f32	%p74, %f184, 0f7F800000;
	@%p74 bra 	BB0_61;

	selp.f32	%f1288, 0fFF800000, 0f7F800000, %p4;

BB0_61:
	mul.f32 	%f940, %f1288, 0f437F0000;
	setp.eq.f32	%p75, %f182, 0f3F800000;
	selp.f32	%f941, 0f437F0000, %f940, %p75;
	cvt.rzi.u32.f32	%r128, %f941;
	cvt.u16.u32	%rs17, %r128;
	mov.u16 	%rs18, 255;
	st.v2.u8 	[%rd43], {%rs17, %rs18};
	ld.global.u32 	%r200, [imageEnabled];

BB0_62:
	and.b32  	%r129, %r200, 1;
	setp.eq.b32	%p76, %r129, 1;
	@!%p76 bra 	BB0_97;
	bra.uni 	BB0_63;

BB0_63:
	mov.f32 	%f944, 0f3E666666;
	cvt.rzi.f32.f32	%f945, %f944;
	fma.rn.f32 	%f946, %f945, 0fC0000000, 0f3EE66666;
	abs.f32 	%f196, %f946;
	abs.f32 	%f197, %f1232;
	setp.lt.f32	%p77, %f197, 0f00800000;
	mul.f32 	%f947, %f197, 0f4B800000;
	selp.f32	%f948, 0fC3170000, 0fC2FE0000, %p77;
	selp.f32	%f949, %f947, %f197, %p77;
	mov.b32 	 %r130, %f949;
	and.b32  	%r131, %r130, 8388607;
	or.b32  	%r132, %r131, 1065353216;
	mov.b32 	 %f950, %r132;
	shr.u32 	%r133, %r130, 23;
	cvt.rn.f32.u32	%f951, %r133;
	add.f32 	%f952, %f948, %f951;
	setp.gt.f32	%p78, %f950, 0f3FB504F3;
	mul.f32 	%f953, %f950, 0f3F000000;
	add.f32 	%f954, %f952, 0f3F800000;
	selp.f32	%f955, %f953, %f950, %p78;
	selp.f32	%f956, %f954, %f952, %p78;
	add.f32 	%f957, %f955, 0fBF800000;
	add.f32 	%f943, %f955, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f942,%f943;
	// inline asm
	add.f32 	%f958, %f957, %f957;
	mul.f32 	%f959, %f942, %f958;
	mul.f32 	%f960, %f959, %f959;
	mov.f32 	%f961, 0f3C4CAF63;
	mov.f32 	%f962, 0f3B18F0FE;
	fma.rn.f32 	%f963, %f962, %f960, %f961;
	mov.f32 	%f964, 0f3DAAAABD;
	fma.rn.f32 	%f965, %f963, %f960, %f964;
	mul.rn.f32 	%f966, %f965, %f960;
	mul.rn.f32 	%f967, %f966, %f959;
	sub.f32 	%f968, %f957, %f959;
	neg.f32 	%f969, %f959;
	add.f32 	%f970, %f968, %f968;
	fma.rn.f32 	%f971, %f969, %f957, %f970;
	mul.rn.f32 	%f972, %f942, %f971;
	add.f32 	%f973, %f967, %f959;
	sub.f32 	%f974, %f959, %f973;
	add.f32 	%f975, %f967, %f974;
	add.f32 	%f976, %f972, %f975;
	add.f32 	%f977, %f973, %f976;
	sub.f32 	%f978, %f973, %f977;
	add.f32 	%f979, %f976, %f978;
	mov.f32 	%f980, 0f3F317200;
	mul.rn.f32 	%f981, %f956, %f980;
	mov.f32 	%f982, 0f35BFBE8E;
	mul.rn.f32 	%f983, %f956, %f982;
	add.f32 	%f984, %f981, %f977;
	sub.f32 	%f985, %f981, %f984;
	add.f32 	%f986, %f977, %f985;
	add.f32 	%f987, %f979, %f986;
	add.f32 	%f988, %f983, %f987;
	add.f32 	%f989, %f984, %f988;
	sub.f32 	%f990, %f984, %f989;
	add.f32 	%f991, %f988, %f990;
	mov.f32 	%f992, 0f3EE66666;
	mul.rn.f32 	%f993, %f992, %f989;
	neg.f32 	%f994, %f993;
	fma.rn.f32 	%f995, %f992, %f989, %f994;
	fma.rn.f32 	%f996, %f992, %f991, %f995;
	mov.f32 	%f997, 0f00000000;
	fma.rn.f32 	%f998, %f997, %f989, %f996;
	add.rn.f32 	%f999, %f993, %f998;
	neg.f32 	%f1000, %f999;
	add.rn.f32 	%f1001, %f993, %f1000;
	add.rn.f32 	%f1002, %f1001, %f998;
	mov.b32 	 %r134, %f999;
	setp.eq.s32	%p79, %r134, 1118925336;
	add.s32 	%r135, %r134, -1;
	mov.b32 	 %f1003, %r135;
	add.f32 	%f1004, %f1002, 0f37000000;
	selp.f32	%f1005, %f1003, %f999, %p79;
	selp.f32	%f198, %f1004, %f1002, %p79;
	mul.f32 	%f1006, %f1005, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1007, %f1006;
	mov.f32 	%f1008, 0fBF317200;
	fma.rn.f32 	%f1009, %f1007, %f1008, %f1005;
	mov.f32 	%f1010, 0fB5BFBE8E;
	fma.rn.f32 	%f1011, %f1007, %f1010, %f1009;
	mul.f32 	%f1012, %f1011, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1013, %f1012;
	add.f32 	%f1014, %f1007, 0f00000000;
	ex2.approx.f32 	%f1015, %f1014;
	mul.f32 	%f1016, %f1013, %f1015;
	setp.lt.f32	%p80, %f1005, 0fC2D20000;
	selp.f32	%f1017, 0f00000000, %f1016, %p80;
	setp.gt.f32	%p81, %f1005, 0f42D20000;
	selp.f32	%f1289, 0f7F800000, %f1017, %p81;
	setp.eq.f32	%p82, %f1289, 0f7F800000;
	@%p82 bra 	BB0_65;

	fma.rn.f32 	%f1289, %f1289, %f198, %f1289;

BB0_65:
	setp.lt.f32	%p83, %f1232, 0f00000000;
	setp.eq.f32	%p84, %f196, 0f3F800000;
	and.pred  	%p5, %p83, %p84;
	mov.b32 	 %r136, %f1289;
	xor.b32  	%r137, %r136, -2147483648;
	mov.b32 	 %f1018, %r137;
	selp.f32	%f1291, %f1018, %f1289, %p5;
	setp.eq.f32	%p85, %f1232, 0f00000000;
	@%p85 bra 	BB0_68;
	bra.uni 	BB0_66;

BB0_68:
	add.f32 	%f1021, %f1232, %f1232;
	selp.f32	%f1291, %f1021, 0f00000000, %p84;
	bra.uni 	BB0_69;

BB0_66:
	setp.geu.f32	%p86, %f1232, 0f00000000;
	@%p86 bra 	BB0_69;

	cvt.rzi.f32.f32	%f1020, %f992;
	setp.neu.f32	%p87, %f1020, 0f3EE66666;
	selp.f32	%f1291, 0f7FFFFFFF, %f1291, %p87;

BB0_69:
	add.f32 	%f1022, %f197, 0f3EE66666;
	mov.b32 	 %r138, %f1022;
	setp.lt.s32	%p89, %r138, 2139095040;
	@%p89 bra 	BB0_74;

	setp.gtu.f32	%p90, %f197, 0f7F800000;
	@%p90 bra 	BB0_73;
	bra.uni 	BB0_71;

BB0_73:
	add.f32 	%f1291, %f1232, 0f3EE66666;
	bra.uni 	BB0_74;

BB0_71:
	setp.neu.f32	%p91, %f197, 0f7F800000;
	@%p91 bra 	BB0_74;

	selp.f32	%f1291, 0fFF800000, 0f7F800000, %p5;

BB0_74:
	setp.eq.f32	%p92, %f1232, 0f3F800000;
	selp.f32	%f209, 0f3F800000, %f1291, %p92;
	abs.f32 	%f210, %f1231;
	setp.lt.f32	%p93, %f210, 0f00800000;
	mul.f32 	%f1025, %f210, 0f4B800000;
	selp.f32	%f1026, 0fC3170000, 0fC2FE0000, %p93;
	selp.f32	%f1027, %f1025, %f210, %p93;
	mov.b32 	 %r139, %f1027;
	and.b32  	%r140, %r139, 8388607;
	or.b32  	%r141, %r140, 1065353216;
	mov.b32 	 %f1028, %r141;
	shr.u32 	%r142, %r139, 23;
	cvt.rn.f32.u32	%f1029, %r142;
	add.f32 	%f1030, %f1026, %f1029;
	setp.gt.f32	%p94, %f1028, 0f3FB504F3;
	mul.f32 	%f1031, %f1028, 0f3F000000;
	add.f32 	%f1032, %f1030, 0f3F800000;
	selp.f32	%f1033, %f1031, %f1028, %p94;
	selp.f32	%f1034, %f1032, %f1030, %p94;
	add.f32 	%f1035, %f1033, 0fBF800000;
	add.f32 	%f1024, %f1033, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1023,%f1024;
	// inline asm
	add.f32 	%f1036, %f1035, %f1035;
	mul.f32 	%f1037, %f1023, %f1036;
	mul.f32 	%f1038, %f1037, %f1037;
	fma.rn.f32 	%f1041, %f962, %f1038, %f961;
	fma.rn.f32 	%f1043, %f1041, %f1038, %f964;
	mul.rn.f32 	%f1044, %f1043, %f1038;
	mul.rn.f32 	%f1045, %f1044, %f1037;
	sub.f32 	%f1046, %f1035, %f1037;
	neg.f32 	%f1047, %f1037;
	add.f32 	%f1048, %f1046, %f1046;
	fma.rn.f32 	%f1049, %f1047, %f1035, %f1048;
	mul.rn.f32 	%f1050, %f1023, %f1049;
	add.f32 	%f1051, %f1045, %f1037;
	sub.f32 	%f1052, %f1037, %f1051;
	add.f32 	%f1053, %f1045, %f1052;
	add.f32 	%f1054, %f1050, %f1053;
	add.f32 	%f1055, %f1051, %f1054;
	sub.f32 	%f1056, %f1051, %f1055;
	add.f32 	%f1057, %f1054, %f1056;
	mul.rn.f32 	%f1059, %f1034, %f980;
	mul.rn.f32 	%f1061, %f1034, %f982;
	add.f32 	%f1062, %f1059, %f1055;
	sub.f32 	%f1063, %f1059, %f1062;
	add.f32 	%f1064, %f1055, %f1063;
	add.f32 	%f1065, %f1057, %f1064;
	add.f32 	%f1066, %f1061, %f1065;
	add.f32 	%f1067, %f1062, %f1066;
	sub.f32 	%f1068, %f1062, %f1067;
	add.f32 	%f1069, %f1066, %f1068;
	mul.rn.f32 	%f1071, %f992, %f1067;
	neg.f32 	%f1072, %f1071;
	fma.rn.f32 	%f1073, %f992, %f1067, %f1072;
	fma.rn.f32 	%f1074, %f992, %f1069, %f1073;
	fma.rn.f32 	%f1076, %f997, %f1067, %f1074;
	add.rn.f32 	%f1077, %f1071, %f1076;
	neg.f32 	%f1078, %f1077;
	add.rn.f32 	%f1079, %f1071, %f1078;
	add.rn.f32 	%f1080, %f1079, %f1076;
	mov.b32 	 %r143, %f1077;
	setp.eq.s32	%p95, %r143, 1118925336;
	add.s32 	%r144, %r143, -1;
	mov.b32 	 %f1081, %r144;
	add.f32 	%f1082, %f1080, 0f37000000;
	selp.f32	%f1083, %f1081, %f1077, %p95;
	selp.f32	%f211, %f1082, %f1080, %p95;
	mul.f32 	%f1084, %f1083, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1085, %f1084;
	fma.rn.f32 	%f1087, %f1085, %f1008, %f1083;
	fma.rn.f32 	%f1089, %f1085, %f1010, %f1087;
	mul.f32 	%f1090, %f1089, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1091, %f1090;
	add.f32 	%f1092, %f1085, 0f00000000;
	ex2.approx.f32 	%f1093, %f1092;
	mul.f32 	%f1094, %f1091, %f1093;
	setp.lt.f32	%p96, %f1083, 0fC2D20000;
	selp.f32	%f1095, 0f00000000, %f1094, %p96;
	setp.gt.f32	%p97, %f1083, 0f42D20000;
	selp.f32	%f1292, 0f7F800000, %f1095, %p97;
	setp.eq.f32	%p98, %f1292, 0f7F800000;
	@%p98 bra 	BB0_76;

	fma.rn.f32 	%f1292, %f1292, %f211, %f1292;

BB0_76:
	setp.lt.f32	%p99, %f1231, 0f00000000;
	and.pred  	%p6, %p99, %p84;
	mov.b32 	 %r145, %f1292;
	xor.b32  	%r146, %r145, -2147483648;
	mov.b32 	 %f1096, %r146;
	selp.f32	%f1294, %f1096, %f1292, %p6;
	setp.eq.f32	%p101, %f1231, 0f00000000;
	@%p101 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f1099, %f1231, %f1231;
	selp.f32	%f1294, %f1099, 0f00000000, %p84;
	bra.uni 	BB0_80;

BB0_77:
	setp.geu.f32	%p102, %f1231, 0f00000000;
	@%p102 bra 	BB0_80;

	cvt.rzi.f32.f32	%f1098, %f992;
	setp.neu.f32	%p103, %f1098, 0f3EE66666;
	selp.f32	%f1294, 0f7FFFFFFF, %f1294, %p103;

BB0_80:
	add.f32 	%f1100, %f210, 0f3EE66666;
	mov.b32 	 %r147, %f1100;
	setp.lt.s32	%p105, %r147, 2139095040;
	@%p105 bra 	BB0_85;

	setp.gtu.f32	%p106, %f210, 0f7F800000;
	@%p106 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f1294, %f1231, 0f3EE66666;
	bra.uni 	BB0_85;

BB0_82:
	setp.neu.f32	%p107, %f210, 0f7F800000;
	@%p107 bra 	BB0_85;

	selp.f32	%f1294, 0fFF800000, 0f7F800000, %p6;

BB0_85:
	setp.eq.f32	%p108, %f1231, 0f3F800000;
	selp.f32	%f222, 0f3F800000, %f1294, %p108;
	abs.f32 	%f223, %f1230;
	setp.lt.f32	%p109, %f223, 0f00800000;
	mul.f32 	%f1103, %f223, 0f4B800000;
	selp.f32	%f1104, 0fC3170000, 0fC2FE0000, %p109;
	selp.f32	%f1105, %f1103, %f223, %p109;
	mov.b32 	 %r148, %f1105;
	and.b32  	%r149, %r148, 8388607;
	or.b32  	%r150, %r149, 1065353216;
	mov.b32 	 %f1106, %r150;
	shr.u32 	%r151, %r148, 23;
	cvt.rn.f32.u32	%f1107, %r151;
	add.f32 	%f1108, %f1104, %f1107;
	setp.gt.f32	%p110, %f1106, 0f3FB504F3;
	mul.f32 	%f1109, %f1106, 0f3F000000;
	add.f32 	%f1110, %f1108, 0f3F800000;
	selp.f32	%f1111, %f1109, %f1106, %p110;
	selp.f32	%f1112, %f1110, %f1108, %p110;
	add.f32 	%f1113, %f1111, 0fBF800000;
	add.f32 	%f1102, %f1111, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1101,%f1102;
	// inline asm
	add.f32 	%f1114, %f1113, %f1113;
	mul.f32 	%f1115, %f1101, %f1114;
	mul.f32 	%f1116, %f1115, %f1115;
	fma.rn.f32 	%f1119, %f962, %f1116, %f961;
	fma.rn.f32 	%f1121, %f1119, %f1116, %f964;
	mul.rn.f32 	%f1122, %f1121, %f1116;
	mul.rn.f32 	%f1123, %f1122, %f1115;
	sub.f32 	%f1124, %f1113, %f1115;
	neg.f32 	%f1125, %f1115;
	add.f32 	%f1126, %f1124, %f1124;
	fma.rn.f32 	%f1127, %f1125, %f1113, %f1126;
	mul.rn.f32 	%f1128, %f1101, %f1127;
	add.f32 	%f1129, %f1123, %f1115;
	sub.f32 	%f1130, %f1115, %f1129;
	add.f32 	%f1131, %f1123, %f1130;
	add.f32 	%f1132, %f1128, %f1131;
	add.f32 	%f1133, %f1129, %f1132;
	sub.f32 	%f1134, %f1129, %f1133;
	add.f32 	%f1135, %f1132, %f1134;
	mul.rn.f32 	%f1137, %f1112, %f980;
	mul.rn.f32 	%f1139, %f1112, %f982;
	add.f32 	%f1140, %f1137, %f1133;
	sub.f32 	%f1141, %f1137, %f1140;
	add.f32 	%f1142, %f1133, %f1141;
	add.f32 	%f1143, %f1135, %f1142;
	add.f32 	%f1144, %f1139, %f1143;
	add.f32 	%f1145, %f1140, %f1144;
	sub.f32 	%f1146, %f1140, %f1145;
	add.f32 	%f1147, %f1144, %f1146;
	mul.rn.f32 	%f1149, %f992, %f1145;
	neg.f32 	%f1150, %f1149;
	fma.rn.f32 	%f1151, %f992, %f1145, %f1150;
	fma.rn.f32 	%f1152, %f992, %f1147, %f1151;
	fma.rn.f32 	%f1154, %f997, %f1145, %f1152;
	add.rn.f32 	%f1155, %f1149, %f1154;
	neg.f32 	%f1156, %f1155;
	add.rn.f32 	%f1157, %f1149, %f1156;
	add.rn.f32 	%f1158, %f1157, %f1154;
	mov.b32 	 %r152, %f1155;
	setp.eq.s32	%p111, %r152, 1118925336;
	add.s32 	%r153, %r152, -1;
	mov.b32 	 %f1159, %r153;
	add.f32 	%f1160, %f1158, 0f37000000;
	selp.f32	%f1161, %f1159, %f1155, %p111;
	selp.f32	%f224, %f1160, %f1158, %p111;
	mul.f32 	%f1162, %f1161, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1163, %f1162;
	fma.rn.f32 	%f1165, %f1163, %f1008, %f1161;
	fma.rn.f32 	%f1167, %f1163, %f1010, %f1165;
	mul.f32 	%f1168, %f1167, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1169, %f1168;
	add.f32 	%f1170, %f1163, 0f00000000;
	ex2.approx.f32 	%f1171, %f1170;
	mul.f32 	%f1172, %f1169, %f1171;
	setp.lt.f32	%p112, %f1161, 0fC2D20000;
	selp.f32	%f1173, 0f00000000, %f1172, %p112;
	setp.gt.f32	%p113, %f1161, 0f42D20000;
	selp.f32	%f1295, 0f7F800000, %f1173, %p113;
	setp.eq.f32	%p114, %f1295, 0f7F800000;
	@%p114 bra 	BB0_87;

	fma.rn.f32 	%f1295, %f1295, %f224, %f1295;

BB0_87:
	setp.lt.f32	%p115, %f1230, 0f00000000;
	and.pred  	%p7, %p115, %p84;
	mov.b32 	 %r154, %f1295;
	xor.b32  	%r155, %r154, -2147483648;
	mov.b32 	 %f1174, %r155;
	selp.f32	%f1297, %f1174, %f1295, %p7;
	setp.eq.f32	%p117, %f1230, 0f00000000;
	@%p117 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f1177, %f1230, %f1230;
	selp.f32	%f1297, %f1177, 0f00000000, %p84;
	bra.uni 	BB0_91;

BB0_88:
	setp.geu.f32	%p118, %f1230, 0f00000000;
	@%p118 bra 	BB0_91;

	cvt.rzi.f32.f32	%f1176, %f992;
	setp.neu.f32	%p119, %f1176, 0f3EE66666;
	selp.f32	%f1297, 0f7FFFFFFF, %f1297, %p119;

BB0_91:
	add.f32 	%f1178, %f223, 0f3EE66666;
	mov.b32 	 %r156, %f1178;
	setp.lt.s32	%p121, %r156, 2139095040;
	@%p121 bra 	BB0_96;

	setp.gtu.f32	%p122, %f223, 0f7F800000;
	@%p122 bra 	BB0_95;
	bra.uni 	BB0_93;

BB0_95:
	add.f32 	%f1297, %f1230, 0f3EE66666;
	bra.uni 	BB0_96;

BB0_93:
	setp.neu.f32	%p123, %f223, 0f7F800000;
	@%p123 bra 	BB0_96;

	selp.f32	%f1297, 0fFF800000, 0f7F800000, %p7;

BB0_96:
	mov.u32 	%r192, 4;
	setp.eq.f32	%p124, %f1230, 0f3F800000;
	selp.f32	%f1179, 0f3F800000, %f1297, %p124;
	cvt.u64.u32	%rd53, %r3;
	cvt.u64.u32	%rd52, %r2;
	mov.u64 	%rd56, image;
	cvta.global.u64 	%rd51, %rd56;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r192, %rd52, %rd53, %rd13, %rd13);
	// inline asm
	cvt.sat.f32.f32	%f1180, %f1179;
	mul.f32 	%f1181, %f1180, 0f437FFD71;
	cvt.rzi.u32.f32	%r159, %f1181;
	cvt.sat.f32.f32	%f1182, %f222;
	mul.f32 	%f1183, %f1182, 0f437FFD71;
	cvt.rzi.u32.f32	%r160, %f1183;
	cvt.sat.f32.f32	%f1184, %f209;
	mul.f32 	%f1185, %f1184, 0f437FFD71;
	cvt.rzi.u32.f32	%r161, %f1185;
	cvt.u16.u32	%rs19, %r159;
	cvt.u16.u32	%rs20, %r161;
	cvt.u16.u32	%rs21, %r160;
	mov.u16 	%rs22, 255;
	st.v4.u8 	[%rd50], {%rs19, %rs21, %rs20, %rs22};
	ld.global.u32 	%r200, [imageEnabled];

BB0_97:
	and.b32  	%r162, %r200, 4;
	setp.eq.s32	%p125, %r162, 0;
	@%p125 bra 	BB0_101;

	ld.global.u32 	%r163, [additive];
	setp.eq.s32	%p126, %r163, 0;
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	mov.f32 	%f1186, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f1186;}

	// inline asm
	@%p126 bra 	BB0_100;

	mov.u64 	%rd69, image_HDR;
	cvta.global.u64 	%rd58, %rd69;
	mov.u32 	%r167, 8;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd57];
	// inline asm
	{  cvt.f32.f16 %f1187, %rs30;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1188, %rs31;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1189, %rs32;}

	// inline asm
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1190, %f1232, %f1187;
	add.f32 	%f1191, %f1231, %f1188;
	add.f32 	%f1192, %f1230, %f1189;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f1192;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f1191;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f1190;}

	// inline asm
	st.v4.u16 	[%rd63], {%rs27, %rs28, %rs29, %rs23};
	bra.uni 	BB0_101;

BB0_100:
	mov.u64 	%rd76, image_HDR;
	cvta.global.u64 	%rd71, %rd76;
	mov.u32 	%r169, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r169, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f1230;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs35, %f1231;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f1232;}

	// inline asm
	st.v4.u16 	[%rd70], {%rs34, %rs35, %rs36, %rs23};

BB0_101:
	ld.global.u8 	%rs37, [imageEnabled];
	and.b16  	%rs38, %rs37, 64;
	setp.eq.s16	%p127, %rs38, 0;
	@%p127 bra 	BB0_113;

	mov.u32 	%r193, 4;
	mul.f32 	%f1196, %f19, %f19;
	fma.rn.f32 	%f1197, %f20, %f20, %f1196;
	fma.rn.f32 	%f1198, %f18, %f18, %f1197;
	sqrt.rn.f32 	%f1199, %f1198;
	rcp.rn.f32 	%f1200, %f1199;
	mul.f32 	%f1201, %f20, %f1200;
	mul.f32 	%f1202, %f19, %f1200;
	mul.f32 	%f1203, %f18, %f1200;
	cvt.u64.u32	%rd80, %r3;
	cvt.u64.u32	%rd79, %r2;
	mov.u64 	%rd83, image_Dir;
	cvta.global.u64 	%rd78, %rd83;
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r193, %rd79, %rd80, %rd13, %rd13);
	// inline asm
	fma.rn.f32 	%f1204, %f1201, 0f3F000000, 0f3F000000;
	mul.f32 	%f1205, %f1204, 0f437F0000;
	cvt.rzi.u32.f32	%r172, %f1205;
	fma.rn.f32 	%f1206, %f1202, 0f3F000000, 0f3F000000;
	mul.f32 	%f1207, %f1206, 0f437F0000;
	cvt.rzi.u32.f32	%r173, %f1207;
	fma.rn.f32 	%f1208, %f1203, 0f3F000000, 0f3F000000;
	mul.f32 	%f1209, %f1208, 0f437F0000;
	cvt.rzi.u32.f32	%r174, %f1209;
	cvt.u16.u32	%rs39, %r174;
	cvt.u16.u32	%rs40, %r173;
	cvt.u16.u32	%rs41, %r172;
	mov.u16 	%rs42, 255;
	st.v4.u8 	[%rd77], {%rs41, %rs40, %rs39, %rs42};

BB0_113:
	ret;
}