//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<256>;
	.reg .b16 	%rs<206>;
	.reg .f32 	%f<2136>;
	.reg .b32 	%r<1551>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<131>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r63), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r64), _optix_get_launch_index_y, ();
	// end inline asm
	// begin inline asm
	call (%r66), _optix_get_launch_dimension_x, ();
	// end inline asm
	// begin inline asm
	call (%r67), _optix_get_launch_dimension_y, ();
	// end inline asm
	ld.const.u64 	%rd29, [params+400];
	cvta.to.global.u64 	%rd30, %rd29;
	ld.const.u32 	%r69, [params+392];
	mad.lo.s32 	%r70, %r69, %r64, %r63;
	mul.wide.u32 	%rd31, %r70, 4;
	add.s64 	%rd2, %rd30, %rd31;
	ld.global.v2.u8 	{%rs24, %rs193}, [%rd2];
	or.b16  	%rs26, %rs24, %rs193;
	and.b16  	%rs27, %rs26, 255;
	setp.eq.s16 	%p9, %rs27, 0;
	@%p9 bra 	$L__BB0_2;

	ld.global.u8 	%rs192, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs192, [%rd2+2];
	setp.eq.s16 	%p10, %rs192, 0;
	mov.f32 	%f2043, 0f00000000;
	mov.u16 	%rs193, 0;
	mov.f32 	%f2044, %f2043;
	mov.f32 	%f2045, %f2043;
	@%p10 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f327, %rs24;
	div.rn.f32 	%f328, %f327, 0f437F0000;
	fma.rn.f32 	%f329, %f328, 0f40000000, 0fBF800000;
	and.b16  	%rs30, %rs193, 255;
	cvt.rn.f32.u16 	%f330, %rs30;
	div.rn.f32 	%f331, %f330, 0f437F0000;
	fma.rn.f32 	%f332, %f331, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f333, %rs192;
	div.rn.f32 	%f334, %f333, 0f437F0000;
	fma.rn.f32 	%f335, %f334, 0f40000000, 0fBF800000;
	mul.f32 	%f336, %f332, %f332;
	fma.rn.f32 	%f337, %f329, %f329, %f336;
	fma.rn.f32 	%f338, %f335, %f335, %f337;
	sqrt.rn.f32 	%f339, %f338;
	rcp.rn.f32 	%f340, %f339;
	mul.f32 	%f2045, %f340, %f335;
	mul.f32 	%f2044, %f340, %f332;
	mul.f32 	%f2043, %f329, %f340;

$L__BB0_4:
	ld.const.v2.u32 	{%r71, %r72}, [params];
	add.s32 	%r5, %r71, %r63;
	add.s32 	%r6, %r72, %r64;
	setp.eq.f32 	%p11, %f2043, 0f00000000;
	setp.eq.f32 	%p12, %f2044, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	setp.eq.f32 	%p14, %f2045, 0f00000000;
	and.pred  	%p15, %p14, %p13;
	@%p15 bra 	$L__BB0_175;
	bra.uni 	$L__BB0_5;

$L__BB0_175:
	ld.const.u32 	%r60, [params+104];
	and.b32  	%r1522, %r60, 1;
	setp.eq.b32 	%p246, %r1522, 1;
	mov.pred 	%p247, 0;
	xor.pred  	%p248, %p246, %p247;
	not.pred 	%p249, %p248;
	@%p249 bra 	$L__BB0_177;

	ld.const.u64 	%rd106, [params+144];
	cvta.to.global.u64 	%rd107, %rd106;
	ld.const.u32 	%r1523, [params+136];
	mad.lo.s32 	%r1524, %r1523, %r6, %r5;
	mul.wide.u32 	%rd108, %r1524, 4;
	add.s64 	%rd109, %rd107, %rd108;
	mov.u16 	%rs129, 0;
	st.global.v4.u8 	[%rd109], {%rs129, %rs129, %rs129, %rs129};

$L__BB0_177:
	and.b32  	%r1525, %r60, 8;
	setp.eq.s32 	%p250, %r1525, 0;
	@%p250 bra 	$L__BB0_179;

	ld.const.u64 	%rd110, [params+192];
	cvta.to.global.u64 	%rd111, %rd110;
	ld.const.u32 	%r1526, [params+184];
	mad.lo.s32 	%r1527, %r1526, %r6, %r5;
	mov.f32 	%f2005, 0f00000000;
	cvt.rzi.u32.f32 	%r1528, %f2005;
	mul.wide.u32 	%rd112, %r1527, 2;
	add.s64 	%rd113, %rd111, %rd112;
	mov.u16 	%rs130, 0;
	cvt.u16.u32 	%rs131, %r1528;
	st.global.v2.u8 	[%rd113], {%rs131, %rs130};

$L__BB0_179:
	and.b32  	%r1529, %r60, 4;
	setp.eq.s32 	%p251, %r1529, 0;
	ld.const.u32 	%r1550, [params+108];
	@%p251 bra 	$L__BB0_183;

	setp.eq.s32 	%p252, %r1550, 0;
	ld.const.u64 	%rd114, [params+224];
	cvta.to.global.u64 	%rd115, %rd114;
	ld.const.u32 	%r1530, [params+216];
	mad.lo.s32 	%r1531, %r1530, %r6, %r5;
	mul.wide.u32 	%rd116, %r1531, 8;
	add.s64 	%rd24, %rd115, %rd116;
	@%p252 bra 	$L__BB0_182;

	ld.global.v4.u16 	{%rs138, %rs139, %rs140, %rs141}, [%rd24];
	// begin inline asm
	{  cvt.f32.f16 %f2006, %rs138;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2007, %rs139;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2008, %rs140;}

	// end inline asm
	add.f32 	%f2009, %f2006, 0f00000000;
	add.f32 	%f2010, %f2007, 0f00000000;
	add.f32 	%f2011, %f2008, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs137, %f2011;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs136, %f2010;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs135, %f2009;}

	// end inline asm
	mov.u16 	%rs142, 0;
	st.global.v4.u16 	[%rd24], {%rs135, %rs136, %rs137, %rs142};
	bra.uni 	$L__BB0_183;

$L__BB0_5:
	ld.const.v4.f32 	{%f345, %f346, %f347, %f348}, [params+512];
	neg.f32 	%f349, %f346;
	neg.f32 	%f350, %f347;
	mul.f32 	%f351, %f2043, %f345;
	mul.f32 	%f352, %f2044, %f349;
	sub.f32 	%f353, %f352, %f351;
	mul.f32 	%f354, %f2045, %f347;
	sub.f32 	%f13, %f353, %f354;
	ld.const.u64 	%rd32, [params+432];
	cvta.to.global.u64 	%rd33, %rd32;
	ld.const.u32 	%r75, [params+424];
	mul.lo.s32 	%r76, %r75, %r64;
	add.s32 	%r77, %r76, %r63;
	mul.wide.u32 	%rd34, %r77, 12;
	add.s64 	%rd35, %rd33, %rd34;
	ld.global.f32 	%f355, [%rd35];
	mul.f32 	%f356, %f355, 0f3456BF95;
	ld.global.f32 	%f357, [%rd35+4];
	mul.f32 	%f358, %f357, 0f3456BF95;
	ld.global.f32 	%f359, [%rd35+8];
	mul.f32 	%f360, %f359, 0f3456BF95;
	abs.f32 	%f361, %f2043;
	div.rn.f32 	%f362, %f356, %f361;
	abs.f32 	%f363, %f2044;
	div.rn.f32 	%f364, %f358, %f363;
	abs.f32 	%f365, %f2045;
	div.rn.f32 	%f366, %f360, %f365;
	abs.f32 	%f367, %f362;
	abs.f32 	%f368, %f364;
	abs.f32 	%f369, %f366;
	mov.f32 	%f370, 0f38D1B717;
	max.f32 	%f371, %f367, %f370;
	max.f32 	%f372, %f368, %f370;
	max.f32 	%f373, %f369, %f370;
	fma.rn.f32 	%f14, %f2043, %f371, %f355;
	fma.rn.f32 	%f15, %f2044, %f372, %f357;
	fma.rn.f32 	%f16, %f2045, %f373, %f359;
	setp.gt.f32 	%p16, %f361, %f365;
	neg.f32 	%f374, %f2044;
	selp.f32 	%f375, %f374, 0f00000000, %p16;
	mov.f32 	%f2060, 0f00000000;
	neg.f32 	%f376, %f2045;
	selp.f32 	%f377, %f2043, %f376, %p16;
	selp.f32 	%f378, 0f00000000, %f2044, %p16;
	mul.f32 	%f379, %f377, %f377;
	fma.rn.f32 	%f380, %f375, %f375, %f379;
	fma.rn.f32 	%f381, %f378, %f378, %f380;
	sqrt.rn.f32 	%f382, %f381;
	rcp.rn.f32 	%f383, %f382;
	mul.f32 	%f17, %f375, %f383;
	mul.f32 	%f18, %f377, %f383;
	mul.f32 	%f19, %f378, %f383;
	mul.f32 	%f384, %f2045, %f18;
	mul.f32 	%f385, %f2044, %f19;
	sub.f32 	%f20, %f384, %f385;
	mul.f32 	%f386, %f2043, %f19;
	mul.f32 	%f387, %f2045, %f17;
	sub.f32 	%f21, %f386, %f387;
	mul.f32 	%f388, %f2044, %f17;
	mul.f32 	%f389, %f2043, %f18;
	sub.f32 	%f22, %f388, %f389;
	add.s32 	%r78, %r66, -1;
	add.s32 	%r79, %r63, 1;
	min.u32 	%r80, %r79, %r78;
	add.s32 	%r81, %r76, %r80;
	mul.wide.u32 	%rd36, %r81, 12;
	add.s64 	%rd37, %rd33, %rd36;
	ld.global.f32 	%f390, [%rd37];
	setp.eq.f32 	%p17, %f390, 0f00000000;
	ld.global.f32 	%f391, [%rd37+4];
	setp.eq.f32 	%p18, %f391, 0f00000000;
	and.pred  	%p19, %p17, %p18;
	ld.global.f32 	%f392, [%rd37+8];
	setp.eq.f32 	%p20, %f392, 0f00000000;
	and.pred  	%p21, %p19, %p20;
	selp.f32 	%f393, %f355, %f390, %p21;
	selp.f32 	%f394, %f357, %f391, %p21;
	selp.f32 	%f395, %f359, %f392, %p21;
	add.s32 	%r82, %r67, -1;
	add.s32 	%r83, %r64, 1;
	min.u32 	%r84, %r83, %r82;
	mad.lo.s32 	%r85, %r75, %r84, %r63;
	mul.wide.u32 	%rd38, %r85, 12;
	add.s64 	%rd39, %rd33, %rd38;
	ld.global.f32 	%f396, [%rd39];
	setp.eq.f32 	%p22, %f396, 0f00000000;
	ld.global.f32 	%f397, [%rd39+4];
	setp.eq.f32 	%p23, %f397, 0f00000000;
	and.pred  	%p24, %p22, %p23;
	ld.global.f32 	%f398, [%rd39+8];
	setp.eq.f32 	%p25, %f398, 0f00000000;
	and.pred  	%p26, %p24, %p25;
	selp.f32 	%f399, %f355, %f396, %p26;
	selp.f32 	%f400, %f357, %f397, %p26;
	selp.f32 	%f401, %f359, %f398, %p26;
	sub.f32 	%f402, %f393, %f355;
	sub.f32 	%f403, %f394, %f357;
	sub.f32 	%f404, %f395, %f359;
	sub.f32 	%f405, %f399, %f355;
	sub.f32 	%f406, %f400, %f357;
	sub.f32 	%f407, %f401, %f359;
	abs.f32 	%f408, %f402;
	abs.f32 	%f409, %f405;
	max.f32 	%f410, %f408, %f409;
	abs.f32 	%f411, %f403;
	abs.f32 	%f412, %f406;
	max.f32 	%f413, %f411, %f412;
	abs.f32 	%f414, %f404;
	abs.f32 	%f415, %f407;
	max.f32 	%f416, %f414, %f415;
	max.f32 	%f417, %f410, %f413;
	max.f32 	%f418, %f417, %f416;
	setp.eq.f32 	%p27, %f402, 0f00000000;
	setp.eq.f32 	%p28, %f403, 0f00000000;
	and.pred  	%p29, %p27, %p28;
	setp.eq.f32 	%p30, %f404, 0f00000000;
	and.pred  	%p31, %p30, %p29;
	setp.eq.f32 	%p32, %f405, 0f00000000;
	setp.eq.f32 	%p33, %f406, 0f00000000;
	and.pred  	%p34, %p32, %p33;
	setp.eq.f32 	%p35, %f407, 0f00000000;
	and.pred  	%p36, %p35, %p34;
	or.pred  	%p37, %p31, %p36;
	selp.f32 	%f23, 0f00000000, %f418, %p37;
	abs.f32 	%f419, %f345;
	abs.f32 	%f420, %f347;
	setp.gt.f32 	%p38, %f419, %f420;
	selp.f32 	%f421, %f349, 0f00000000, %p38;
	selp.f32 	%f422, %f345, %f350, %p38;
	selp.f32 	%f423, 0f00000000, %f346, %p38;
	mul.f32 	%f424, %f422, %f422;
	fma.rn.f32 	%f425, %f421, %f421, %f424;
	fma.rn.f32 	%f426, %f423, %f423, %f425;
	sqrt.rn.f32 	%f427, %f426;
	rcp.rn.f32 	%f428, %f427;
	mul.f32 	%f24, %f421, %f428;
	mul.f32 	%f25, %f422, %f428;
	mul.f32 	%f26, %f423, %f428;
	ld.const.u32 	%r7, [params+540];
	setp.lt.s32 	%p39, %r7, 1;
	mov.f32 	%f2061, %f2060;
	mov.f32 	%f2062, %f2060;
	mov.f32 	%f2063, %f2060;
	@%p39 bra 	$L__BB0_52;

	ld.const.u64 	%rd40, [params+128];
	ld.const.u32 	%r87, [params+120];
	cvt.rn.f32.s32 	%f433, %r7;
	rcp.rn.f32 	%f27, %f433;
	mad.lo.s32 	%r88, %r87, %r64, %r63;
	cvta.to.global.u64 	%rd41, %rd40;
	mul.wide.u32 	%rd42, %r88, 4;
	add.s64 	%rd43, %rd41, %rd42;
	ld.global.u32 	%r1542, [%rd43];
	ld.const.f32 	%f28, [params+536];
	ld.const.u8 	%rs32, [params+104];
	and.b16  	%rs33, %rs32, 32;
	setp.eq.s16 	%p40, %rs33, 0;
	mov.u32 	%r86, 0;
	selp.f32 	%f29, 0f3F800000, 0f41200000, %p40;
	mul.f32 	%f30, %f14, 0f3456BF95;
	mul.f32 	%f31, %f15, 0f3456BF95;
	mul.f32 	%f32, %f16, 0f3456BF95;
	ld.const.u64 	%rd3, [params+96];
	mul.f32 	%f434, %f345, %f25;
	mul.f32 	%f435, %f346, %f24;
	sub.f32 	%f33, %f435, %f434;
	mul.f32 	%f436, %f347, %f24;
	mul.f32 	%f437, %f345, %f26;
	sub.f32 	%f34, %f437, %f436;
	mul.f32 	%f438, %f346, %f26;
	mul.f32 	%f439, %f347, %f25;
	sub.f32 	%f35, %f439, %f438;
	abs.f32 	%f522, %f31;
	abs.f32 	%f523, %f30;
	max.f32 	%f524, %f523, %f522;
	abs.f32 	%f525, %f32;
	max.f32 	%f526, %f524, %f525;
	mov.u32 	%r1539, %r86;

$L__BB0_7:
	mov.u32 	%r1541, %r86;

$L__BB0_8:
	cvt.rn.f32.s32 	%f2042, %r1539;
	mad.lo.s32 	%r90, %r1542, 1664525, 1013904223;
	and.b32  	%r91, %r90, 16777215;
	cvt.rn.f32.u32 	%f440, %r91;
	fma.rn.f32 	%f441, %f440, 0f33800000, %f2042;
	mul.f32 	%f442, %f27, %f441;
	mad.lo.s32 	%r13, %r90, 1664525, 1013904223;
	and.b32  	%r92, %r13, 16777215;
	cvt.rn.f32.u32 	%f443, %r92;
	cvt.rn.f32.s32 	%f444, %r1541;
	fma.rn.f32 	%f445, %f443, 0f33800000, %f444;
	mul.f32 	%f446, %f27, %f445;
	sqrt.rn.f32 	%f45, %f442;
	mul.f32 	%f46, %f446, 0f40C90FDB;
	mul.f32 	%f447, %f46, 0f3F22F983;
	cvt.rni.s32.f32 	%r1549, %f447;
	cvt.rn.f32.s32 	%f448, %r1549;
	mov.f32 	%f449, 0fBFC90FDA;
	fma.rn.f32 	%f450, %f448, %f449, %f46;
	mov.f32 	%f451, 0fB3A22168;
	fma.rn.f32 	%f452, %f448, %f451, %f450;
	mov.f32 	%f453, 0fA7C234C5;
	fma.rn.f32 	%f2057, %f448, %f453, %f452;
	abs.f32 	%f48, %f46;
	setp.ltu.f32 	%p41, %f48, 0f47CE4780;
	add.s64 	%rd4, %rd1, 24;
	mov.u32 	%r1546, %r1549;
	mov.f32 	%f2054, %f2057;
	@%p41 bra 	$L__BB0_16;

	setp.eq.f32 	%p42, %f48, 0f7F800000;
	@%p42 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f456, 0f00000000;
	mul.rn.f32 	%f2054, %f46, %f456;
	mov.u32 	%r1546, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r15, %f46;
	bfe.u32 	%r94, %r15, 23, 8;
	add.s32 	%r16, %r94, -128;
	shl.b32 	%r95, %r15, 8;
	or.b32  	%r17, %r95, -2147483648;
	shr.u32 	%r18, %r16, 5;
	mov.u64 	%rd128, 0;
	mov.u32 	%r1543, 0;
	mov.u64 	%rd127, __cudart_i2opi_f;
	mov.u64 	%rd126, %rd1;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r96, [%rd127];
	mad.wide.u32 	%rd46, %r96, %r17, %rd128;
	shr.u64 	%rd128, %rd46, 32;
	st.local.u32 	[%rd126], %rd46;
	add.s64 	%rd127, %rd127, 4;
	add.s64 	%rd126, %rd126, 4;
	add.s32 	%r1543, %r1543, 1;
	setp.ne.s32 	%p43, %r1543, 6;
	@%p43 bra 	$L__BB0_11;

	st.local.u32 	[%rd4], %rd128;
	mov.u32 	%r97, 4;
	sub.s32 	%r21, %r97, %r18;
	mov.u32 	%r98, 6;
	sub.s32 	%r99, %r98, %r18;
	mul.wide.s32 	%rd47, %r99, 4;
	add.s64 	%rd48, %rd1, %rd47;
	ld.local.u32 	%r1544, [%rd48];
	ld.local.u32 	%r1545, [%rd48+-4];
	and.b32  	%r24, %r16, 31;
	setp.eq.s32 	%p44, %r24, 0;
	@%p44 bra 	$L__BB0_14;

	mov.u32 	%r100, 32;
	sub.s32 	%r101, %r100, %r24;
	shr.u32 	%r102, %r1545, %r101;
	shl.b32 	%r103, %r1544, %r24;
	add.s32 	%r1544, %r102, %r103;
	mul.wide.s32 	%rd49, %r21, 4;
	add.s64 	%rd50, %rd1, %rd49;
	ld.local.u32 	%r104, [%rd50];
	shr.u32 	%r105, %r104, %r101;
	shl.b32 	%r106, %r1545, %r24;
	add.s32 	%r1545, %r105, %r106;

$L__BB0_14:
	and.b32  	%r107, %r15, -2147483648;
	shr.u32 	%r108, %r1545, 30;
	shl.b32 	%r109, %r1544, 2;
	or.b32  	%r110, %r108, %r109;
	shr.u32 	%r111, %r110, 31;
	shr.u32 	%r112, %r1544, 30;
	add.s32 	%r113, %r111, %r112;
	neg.s32 	%r114, %r113;
	setp.eq.s32 	%p45, %r107, 0;
	selp.b32 	%r1546, %r113, %r114, %p45;
	setp.ne.s32 	%p46, %r111, 0;
	xor.b32  	%r115, %r107, -2147483648;
	selp.b32 	%r116, %r115, %r107, %p46;
	selp.b32 	%r117, -1, 0, %p46;
	xor.b32  	%r118, %r110, %r117;
	shl.b32 	%r119, %r1545, 2;
	xor.b32  	%r120, %r119, %r117;
	cvt.u64.u32 	%rd51, %r118;
	cvt.u64.u32 	%rd52, %r120;
	bfi.b64 	%rd53, %rd51, %rd52, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd53;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f454, %fd2;
	setp.eq.s32 	%p47, %r116, 0;
	neg.f32 	%f455, %f454;
	selp.f32 	%f2054, %f454, %f455, %p47;

$L__BB0_16:
	add.s32 	%r31, %r1546, 1;
	and.b32  	%r32, %r31, 1;
	setp.eq.s32 	%p48, %r32, 0;
	selp.f32 	%f52, %f2054, 0f3F800000, %p48;
	mul.rn.f32 	%f53, %f2054, %f2054;
	mov.f32 	%f2055, 0fB94D4153;
	@%p48 bra 	$L__BB0_18;

	mov.f32 	%f458, 0fBAB607ED;
	mov.f32 	%f459, 0f37CBAC00;
	fma.rn.f32 	%f2055, %f459, %f53, %f458;

$L__BB0_18:
	selp.f32 	%f460, 0f3C0885E4, 0f3D2AAABB, %p48;
	fma.rn.f32 	%f461, %f2055, %f53, %f460;
	selp.f32 	%f462, 0fBE2AAAA8, 0fBEFFFFFF, %p48;
	fma.rn.f32 	%f463, %f461, %f53, %f462;
	mov.f32 	%f464, 0f00000000;
	fma.rn.f32 	%f465, %f53, %f52, %f464;
	fma.rn.f32 	%f2056, %f463, %f465, %f52;
	and.b32  	%r122, %r31, 2;
	setp.eq.s32 	%p50, %r122, 0;
	@%p50 bra 	$L__BB0_20;

	mov.f32 	%f467, 0fBF800000;
	fma.rn.f32 	%f2056, %f2056, %f467, %f464;

$L__BB0_20:
	@%p41 bra 	$L__BB0_28;

	setp.eq.f32 	%p52, %f48, 0f7F800000;
	@%p52 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f470, 0f00000000;
	mul.rn.f32 	%f2057, %f46, %f470;
	mov.u32 	%r1549, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r33, %f46;
	bfe.u32 	%r123, %r33, 23, 8;
	add.s32 	%r34, %r123, -128;
	shl.b32 	%r124, %r33, 8;
	or.b32  	%r35, %r124, -2147483648;
	shr.u32 	%r36, %r34, 5;
	mov.u64 	%rd129, 0;
	mov.u64 	%rd130, %rd129;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd56, %rd129, 2;
	mov.u64 	%rd57, __cudart_i2opi_f;
	add.s64 	%rd58, %rd57, %rd56;
	ld.global.nc.u32 	%r125, [%rd58];
	mad.wide.u32 	%rd59, %r125, %r35, %rd130;
	shr.u64 	%rd130, %rd59, 32;
	add.s64 	%rd60, %rd1, %rd56;
	st.local.u32 	[%rd60], %rd59;
	cvt.u32.u64 	%r126, %rd129;
	add.s32 	%r127, %r126, 1;
	cvt.s64.s32 	%rd129, %r127;
	setp.ne.s32 	%p53, %r127, 6;
	@%p53 bra 	$L__BB0_23;

	st.local.u32 	[%rd4], %rd130;
	mov.u32 	%r128, 4;
	sub.s32 	%r37, %r128, %r36;
	mov.u32 	%r129, 6;
	sub.s32 	%r130, %r129, %r36;
	mul.wide.s32 	%rd61, %r130, 4;
	add.s64 	%rd62, %rd1, %rd61;
	ld.local.u32 	%r1547, [%rd62];
	ld.local.u32 	%r1548, [%rd62+-4];
	and.b32  	%r40, %r34, 31;
	setp.eq.s32 	%p54, %r40, 0;
	@%p54 bra 	$L__BB0_26;

	mov.u32 	%r131, 32;
	sub.s32 	%r132, %r131, %r40;
	shr.u32 	%r133, %r1548, %r132;
	shl.b32 	%r134, %r1547, %r40;
	add.s32 	%r1547, %r133, %r134;
	mul.wide.s32 	%rd63, %r37, 4;
	add.s64 	%rd64, %rd1, %rd63;
	ld.local.u32 	%r135, [%rd64];
	shr.u32 	%r136, %r135, %r132;
	shl.b32 	%r137, %r1548, %r40;
	add.s32 	%r1548, %r136, %r137;

$L__BB0_26:
	and.b32  	%r138, %r33, -2147483648;
	shr.u32 	%r139, %r1548, 30;
	shl.b32 	%r140, %r1547, 2;
	or.b32  	%r141, %r139, %r140;
	shr.u32 	%r142, %r141, 31;
	shr.u32 	%r143, %r1547, 30;
	add.s32 	%r144, %r142, %r143;
	neg.s32 	%r145, %r144;
	setp.eq.s32 	%p55, %r138, 0;
	selp.b32 	%r1549, %r144, %r145, %p55;
	setp.ne.s32 	%p56, %r142, 0;
	xor.b32  	%r146, %r138, -2147483648;
	selp.b32 	%r147, %r146, %r138, %p56;
	selp.b32 	%r148, -1, 0, %p56;
	xor.b32  	%r149, %r141, %r148;
	shl.b32 	%r150, %r1548, 2;
	xor.b32  	%r151, %r150, %r148;
	cvt.u64.u32 	%rd65, %r149;
	cvt.u64.u32 	%rd66, %r151;
	bfi.b64 	%rd67, %rd65, %rd66, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd67;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f468, %fd4;
	setp.eq.s32 	%p57, %r147, 0;
	neg.f32 	%f469, %f468;
	selp.f32 	%f2057, %f468, %f469, %p57;

$L__BB0_28:
	mul.f32 	%f62, %f45, %f2056;
	and.b32  	%r47, %r1549, 1;
	setp.eq.s32 	%p58, %r47, 0;
	selp.f32 	%f63, %f2057, 0f3F800000, %p58;
	mul.rn.f32 	%f64, %f2057, %f2057;
	mov.f32 	%f2058, 0fB94D4153;
	@%p58 bra 	$L__BB0_30;

	mov.f32 	%f472, 0fBAB607ED;
	mov.f32 	%f473, 0f37CBAC00;
	fma.rn.f32 	%f2058, %f473, %f64, %f472;

$L__BB0_30:
	selp.f32 	%f474, 0f3C0885E4, 0f3D2AAABB, %p58;
	fma.rn.f32 	%f475, %f2058, %f64, %f474;
	selp.f32 	%f476, 0fBE2AAAA8, 0fBEFFFFFF, %p58;
	fma.rn.f32 	%f477, %f475, %f64, %f476;
	mov.f32 	%f478, 0f00000000;
	fma.rn.f32 	%f479, %f64, %f63, %f478;
	fma.rn.f32 	%f2059, %f477, %f479, %f63;
	and.b32  	%r153, %r1549, 2;
	setp.eq.s32 	%p60, %r153, 0;
	@%p60 bra 	$L__BB0_32;

	mov.f32 	%f481, 0fBF800000;
	fma.rn.f32 	%f2059, %f2059, %f481, %f478;

$L__BB0_32:
	mul.f32 	%f491, %f62, %f62;
	mov.f32 	%f492, 0f3F800000;
	sub.f32 	%f493, %f492, %f491;
	mul.f32 	%f494, %f45, %f2059;
	mul.f32 	%f495, %f494, %f494;
	sub.f32 	%f496, %f493, %f495;
	max.f32 	%f497, %f478, %f496;
	sqrt.rn.f32 	%f498, %f497;
	mul.f32 	%f499, %f24, %f494;
	mul.f32 	%f500, %f25, %f494;
	mul.f32 	%f501, %f26, %f494;
	fma.rn.f32 	%f502, %f35, %f62, %f499;
	fma.rn.f32 	%f503, %f34, %f62, %f500;
	fma.rn.f32 	%f504, %f33, %f62, %f501;
	fma.rn.f32 	%f505, %f345, %f498, %f502;
	fma.rn.f32 	%f506, %f346, %f498, %f503;
	fma.rn.f32 	%f507, %f347, %f498, %f504;
	add.f32 	%f508, %f345, %f505;
	add.f32 	%f509, %f346, %f506;
	add.f32 	%f510, %f347, %f507;
	mul.f32 	%f511, %f28, %f508;
	mul.f32 	%f512, %f28, %f509;
	mul.f32 	%f513, %f28, %f510;
	sub.f32 	%f514, %f511, %f345;
	sub.f32 	%f515, %f512, %f346;
	sub.f32 	%f516, %f513, %f347;
	mul.f32 	%f517, %f515, %f515;
	fma.rn.f32 	%f518, %f514, %f514, %f517;
	fma.rn.f32 	%f519, %f516, %f516, %f518;
	sqrt.rn.f32 	%f520, %f519;
	rcp.rn.f32 	%f521, %f520;
	mul.f32 	%f70, %f521, %f514;
	mul.f32 	%f71, %f521, %f515;
	mul.f32 	%f72, %f521, %f516;
	mov.f32 	%f527, 0f38D1B717;
	max.f32 	%f528, %f526, %f527;
	mul.f32 	%f488, %f29, %f528;
	mad.lo.s32 	%r225, %r13, 1664525, 1013904223;
	and.b32  	%r226, %r225, 16777215;
	cvt.rn.f32.u32 	%f529, %r226;
	mul.f32 	%f530, %f529, 0f33800000;
	fma.rn.f32 	%f531, %f530, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r48, %r225, 1664525, 1013904223;
	and.b32  	%r227, %r48, 16777215;
	cvt.rn.f32.u32 	%f532, %r227;
	mul.f32 	%f533, %f532, 0f33800000;
	fma.rn.f32 	%f534, %f533, 0f40000000, 0fBF800000;
	mul.f32 	%f535, %f17, %f534;
	mul.f32 	%f536, %f18, %f534;
	mul.f32 	%f537, %f19, %f534;
	fma.rn.f32 	%f538, %f20, %f531, %f535;
	fma.rn.f32 	%f539, %f21, %f531, %f536;
	fma.rn.f32 	%f540, %f22, %f531, %f537;
	mul.f32 	%f541, %f539, %f539;
	fma.rn.f32 	%f542, %f538, %f538, %f541;
	fma.rn.f32 	%f543, %f540, %f540, %f542;
	sqrt.rn.f32 	%f544, %f543;
	rcp.rn.f32 	%f545, %f544;
	mul.f32 	%f546, %f538, %f545;
	mul.f32 	%f547, %f539, %f545;
	mul.f32 	%f548, %f540, %f545;
	mul.f32 	%f549, %f2044, %f548;
	mul.f32 	%f550, %f2045, %f547;
	sub.f32 	%f551, %f549, %f550;
	mul.f32 	%f552, %f2045, %f546;
	mul.f32 	%f553, %f2043, %f548;
	sub.f32 	%f554, %f552, %f553;
	mul.f32 	%f555, %f2043, %f547;
	mul.f32 	%f556, %f2044, %f546;
	sub.f32 	%f557, %f555, %f556;
	mul.f32 	%f558, %f546, 0f3E24A490;
	mul.f32 	%f559, %f547, 0f3E24A490;
	mul.f32 	%f560, %f548, 0f3E24A490;
	fma.rn.f32 	%f561, %f23, %f558, %f14;
	fma.rn.f32 	%f562, %f23, %f559, %f15;
	fma.rn.f32 	%f563, %f23, %f560, %f16;
	mul.f32 	%f564, %f551, 0fBECECEDE;
	mul.f32 	%f565, %f554, 0fBECECEDE;
	mul.f32 	%f566, %f557, 0fBECECEDE;
	fma.rn.f32 	%f74, %f23, %f564, %f561;
	fma.rn.f32 	%f75, %f23, %f565, %f562;
	fma.rn.f32 	%f76, %f23, %f566, %f563;
	sub.f32 	%f567, %f74, %f14;
	sub.f32 	%f568, %f75, %f15;
	sub.f32 	%f569, %f76, %f16;
	mul.f32 	%f570, %f568, %f568;
	fma.rn.f32 	%f571, %f567, %f567, %f570;
	fma.rn.f32 	%f572, %f569, %f569, %f571;
	sqrt.rn.f32 	%f489, %f572;
	rcp.rn.f32 	%f573, %f489;
	mul.f32 	%f485, %f573, %f567;
	mul.f32 	%f486, %f573, %f568;
	mul.f32 	%f487, %f573, %f569;
	mov.u32 	%r190, 2;
	mov.u32 	%r191, 1;
	mov.u32 	%r192, 3;
	mov.u32 	%r195, 1065353216;
	mov.u32 	%r224, 0;
	// begin inline asm
	call(%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166,%r167,%r168,%r169,%r170,%r171,%r172,%r173,%r174,%r175,%r176,%r177,%r178,%r179,%r180,%r181,%r182,%r183,%r184,%r185),_optix_trace_typed_32,(%r224,%rd3,%f14,%f15,%f16,%f485,%f486,%f487,%f488,%f489,%f478,%r191,%r224,%r191,%r190,%r191,%r192,%r195,%r195,%r195,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224);
	// end inline asm
	mov.b32 	%f574, %r154;
	mov.b32 	%f575, %r155;
	mov.b32 	%f576, %r156;
	setp.neu.f32 	%p61, %f574, 0f3F800000;
	setp.neu.f32 	%p62, %f575, 0f3F800000;
	or.pred  	%p63, %p61, %p62;
	setp.neu.f32 	%p64, %f576, 0f3F800000;
	mov.u16 	%rs195, 0;
	or.pred  	%p65, %p64, %p63;
	@%p65 bra 	$L__BB0_34;

	mov.f32 	%f584, 0f6C4ECB8F;
	mov.f32 	%f585, 0f00000000;
	// begin inline asm
	call(%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259),_optix_trace_typed_32,(%r224,%rd3,%f74,%f75,%f76,%f70,%f71,%f72,%f488,%f584,%f585,%r191,%r224,%r191,%r190,%r191,%r192,%r195,%r195,%r195,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224);
	// end inline asm
	mov.b32 	%f586, %r228;
	mov.b32 	%f587, %r229;
	mov.b32 	%f588, %r230;
	add.f32 	%f2060, %f2060, %f586;
	add.f32 	%f2061, %f2061, %f587;
	add.f32 	%f2062, %f2062, %f588;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_34:
	mad.lo.s32 	%r370, %r48, 1664525, 1013904223;
	and.b32  	%r371, %r370, 16777215;
	cvt.rn.f32.u32 	%f598, %r371;
	mul.f32 	%f599, %f598, 0f33800000;
	fma.rn.f32 	%f600, %f599, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r49, %r370, 1664525, 1013904223;
	and.b32  	%r372, %r49, 16777215;
	cvt.rn.f32.u32 	%f601, %r372;
	mul.f32 	%f602, %f601, 0f33800000;
	fma.rn.f32 	%f603, %f602, 0f40000000, 0fBF800000;
	mul.f32 	%f604, %f17, %f603;
	mul.f32 	%f605, %f18, %f603;
	mul.f32 	%f606, %f19, %f603;
	fma.rn.f32 	%f607, %f20, %f600, %f604;
	fma.rn.f32 	%f608, %f21, %f600, %f605;
	fma.rn.f32 	%f609, %f22, %f600, %f606;
	mul.f32 	%f610, %f608, %f608;
	fma.rn.f32 	%f611, %f607, %f607, %f610;
	fma.rn.f32 	%f612, %f609, %f609, %f611;
	sqrt.rn.f32 	%f613, %f612;
	rcp.rn.f32 	%f614, %f613;
	mul.f32 	%f615, %f607, %f614;
	mul.f32 	%f616, %f608, %f614;
	mul.f32 	%f617, %f609, %f614;
	mul.f32 	%f618, %f2044, %f617;
	mul.f32 	%f619, %f2045, %f616;
	sub.f32 	%f620, %f618, %f619;
	mul.f32 	%f621, %f2045, %f615;
	mul.f32 	%f622, %f2043, %f617;
	sub.f32 	%f623, %f621, %f622;
	mul.f32 	%f624, %f2043, %f616;
	mul.f32 	%f625, %f2044, %f615;
	sub.f32 	%f626, %f624, %f625;
	mul.f32 	%f627, %f615, 0fBE24A490;
	mul.f32 	%f628, %f616, 0fBE24A490;
	mul.f32 	%f629, %f617, 0fBE24A490;
	fma.rn.f32 	%f630, %f23, %f627, %f14;
	fma.rn.f32 	%f631, %f23, %f628, %f15;
	fma.rn.f32 	%f632, %f23, %f629, %f16;
	mul.f32 	%f633, %f620, 0f3ECACABC;
	mul.f32 	%f634, %f623, 0f3ECACABC;
	mul.f32 	%f635, %f626, 0f3ECACABC;
	fma.rn.f32 	%f85, %f23, %f633, %f630;
	fma.rn.f32 	%f86, %f23, %f634, %f631;
	fma.rn.f32 	%f87, %f23, %f635, %f632;
	sub.f32 	%f636, %f85, %f14;
	sub.f32 	%f637, %f86, %f15;
	sub.f32 	%f638, %f87, %f16;
	mul.f32 	%f639, %f637, %f637;
	fma.rn.f32 	%f640, %f636, %f636, %f639;
	fma.rn.f32 	%f641, %f638, %f638, %f640;
	sqrt.rn.f32 	%f596, %f641;
	rcp.rn.f32 	%f642, %f596;
	mul.f32 	%f592, %f642, %f636;
	mul.f32 	%f593, %f642, %f637;
	mul.f32 	%f594, %f642, %f638;
	mov.f32 	%f597, 0f00000000;
	// begin inline asm
	call(%r299,%r300,%r301,%r302,%r303,%r304,%r305,%r306,%r307,%r308,%r309,%r310,%r311,%r312,%r313,%r314,%r315,%r316,%r317,%r318,%r319,%r320,%r321,%r322,%r323,%r324,%r325,%r326,%r327,%r328,%r329,%r330),_optix_trace_typed_32,(%r224,%rd3,%f14,%f15,%f16,%f592,%f593,%f594,%f488,%f596,%f597,%r191,%r224,%r191,%r190,%r191,%r192,%r195,%r195,%r195,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224);
	// end inline asm
	mov.b32 	%f643, %r299;
	mov.b32 	%f644, %r300;
	mov.b32 	%f645, %r301;
	setp.neu.f32 	%p66, %f643, 0f3F800000;
	setp.neu.f32 	%p67, %f644, 0f3F800000;
	or.pred  	%p68, %p66, %p67;
	setp.neu.f32 	%p69, %f645, 0f3F800000;
	or.pred  	%p70, %p69, %p68;
	@%p70 bra 	$L__BB0_36;

	mov.f32 	%f653, 0f6C4ECB8F;
	mov.u32 	%r409, 2;
	mov.u32 	%r410, 1;
	mov.u32 	%r411, 3;
	mov.u32 	%r414, 1065353216;
	mov.u32 	%r443, 0;
	// begin inline asm
	call(%r373,%r374,%r375,%r376,%r377,%r378,%r379,%r380,%r381,%r382,%r383,%r384,%r385,%r386,%r387,%r388,%r389,%r390,%r391,%r392,%r393,%r394,%r395,%r396,%r397,%r398,%r399,%r400,%r401,%r402,%r403,%r404),_optix_trace_typed_32,(%r443,%rd3,%f85,%f86,%f87,%f70,%f71,%f72,%f488,%f653,%f597,%r410,%r443,%r410,%r409,%r410,%r411,%r414,%r414,%r414,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443);
	// end inline asm
	mov.b32 	%f655, %r373;
	mov.b32 	%f656, %r374;
	mov.b32 	%f657, %r375;
	add.f32 	%f2060, %f2060, %f655;
	add.f32 	%f2061, %f2061, %f656;
	add.f32 	%f2062, %f2062, %f657;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_36:
	mad.lo.s32 	%r515, %r49, 1664525, 1013904223;
	and.b32  	%r516, %r515, 16777215;
	cvt.rn.f32.u32 	%f667, %r516;
	mul.f32 	%f668, %f667, 0f33800000;
	fma.rn.f32 	%f669, %f668, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r50, %r515, 1664525, 1013904223;
	and.b32  	%r517, %r50, 16777215;
	cvt.rn.f32.u32 	%f670, %r517;
	mul.f32 	%f671, %f670, 0f33800000;
	fma.rn.f32 	%f672, %f671, 0f40000000, 0fBF800000;
	mul.f32 	%f673, %f17, %f672;
	mul.f32 	%f674, %f18, %f672;
	mul.f32 	%f675, %f19, %f672;
	fma.rn.f32 	%f676, %f20, %f669, %f673;
	fma.rn.f32 	%f677, %f21, %f669, %f674;
	fma.rn.f32 	%f678, %f22, %f669, %f675;
	mul.f32 	%f679, %f677, %f677;
	fma.rn.f32 	%f680, %f676, %f676, %f679;
	fma.rn.f32 	%f681, %f678, %f678, %f680;
	sqrt.rn.f32 	%f682, %f681;
	rcp.rn.f32 	%f683, %f682;
	mul.f32 	%f684, %f676, %f683;
	mul.f32 	%f685, %f677, %f683;
	mul.f32 	%f686, %f678, %f683;
	mul.f32 	%f687, %f2044, %f686;
	mul.f32 	%f688, %f2045, %f685;
	sub.f32 	%f689, %f687, %f688;
	mul.f32 	%f690, %f2045, %f684;
	mul.f32 	%f691, %f2043, %f686;
	sub.f32 	%f692, %f690, %f691;
	mul.f32 	%f693, %f2043, %f685;
	mul.f32 	%f694, %f2044, %f684;
	sub.f32 	%f695, %f693, %f694;
	mul.f32 	%f696, %f684, 0f3F23A3A8;
	mul.f32 	%f697, %f685, 0f3F23A3A8;
	mul.f32 	%f698, %f686, 0f3F23A3A8;
	fma.rn.f32 	%f699, %f23, %f696, %f14;
	fma.rn.f32 	%f700, %f23, %f697, %f15;
	fma.rn.f32 	%f701, %f23, %f698, %f16;
	mul.f32 	%f702, %f689, 0f3E24A490;
	mul.f32 	%f703, %f692, 0f3E24A490;
	mul.f32 	%f704, %f695, 0f3E24A490;
	fma.rn.f32 	%f96, %f23, %f702, %f699;
	fma.rn.f32 	%f97, %f23, %f703, %f700;
	fma.rn.f32 	%f98, %f23, %f704, %f701;
	sub.f32 	%f705, %f96, %f14;
	sub.f32 	%f706, %f97, %f15;
	sub.f32 	%f707, %f98, %f16;
	mul.f32 	%f708, %f706, %f706;
	fma.rn.f32 	%f709, %f705, %f705, %f708;
	fma.rn.f32 	%f710, %f707, %f707, %f709;
	sqrt.rn.f32 	%f665, %f710;
	rcp.rn.f32 	%f711, %f665;
	mul.f32 	%f661, %f711, %f705;
	mul.f32 	%f662, %f711, %f706;
	mul.f32 	%f663, %f711, %f707;
	mov.u32 	%r480, 2;
	mov.u32 	%r481, 1;
	mov.u32 	%r482, 3;
	mov.u32 	%r485, 1065353216;
	mov.u32 	%r514, 0;
	// begin inline asm
	call(%r444,%r445,%r446,%r447,%r448,%r449,%r450,%r451,%r452,%r453,%r454,%r455,%r456,%r457,%r458,%r459,%r460,%r461,%r462,%r463,%r464,%r465,%r466,%r467,%r468,%r469,%r470,%r471,%r472,%r473,%r474,%r475),_optix_trace_typed_32,(%r514,%rd3,%f14,%f15,%f16,%f661,%f662,%f663,%f488,%f665,%f597,%r481,%r514,%r481,%r480,%r481,%r482,%r485,%r485,%r485,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514);
	// end inline asm
	mov.b32 	%f712, %r444;
	mov.b32 	%f713, %r445;
	mov.b32 	%f714, %r446;
	setp.neu.f32 	%p71, %f712, 0f3F800000;
	setp.neu.f32 	%p72, %f713, 0f3F800000;
	or.pred  	%p73, %p71, %p72;
	setp.neu.f32 	%p74, %f714, 0f3F800000;
	or.pred  	%p75, %p74, %p73;
	@%p75 bra 	$L__BB0_38;

	mov.f32 	%f722, 0f6C4ECB8F;
	mov.f32 	%f723, 0f00000000;
	// begin inline asm
	call(%r518,%r519,%r520,%r521,%r522,%r523,%r524,%r525,%r526,%r527,%r528,%r529,%r530,%r531,%r532,%r533,%r534,%r535,%r536,%r537,%r538,%r539,%r540,%r541,%r542,%r543,%r544,%r545,%r546,%r547,%r548,%r549),_optix_trace_typed_32,(%r514,%rd3,%f96,%f97,%f98,%f70,%f71,%f72,%f488,%f722,%f723,%r481,%r514,%r481,%r480,%r481,%r482,%r485,%r485,%r485,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514);
	// end inline asm
	mov.b32 	%f724, %r518;
	mov.b32 	%f725, %r519;
	mov.b32 	%f726, %r520;
	add.f32 	%f2060, %f2060, %f724;
	add.f32 	%f2061, %f2061, %f725;
	add.f32 	%f2062, %f2062, %f726;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_38:
	mad.lo.s32 	%r660, %r50, 1664525, 1013904223;
	and.b32  	%r661, %r660, 16777215;
	cvt.rn.f32.u32 	%f736, %r661;
	mul.f32 	%f737, %f736, 0f33800000;
	fma.rn.f32 	%f738, %f737, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r51, %r660, 1664525, 1013904223;
	and.b32  	%r662, %r51, 16777215;
	cvt.rn.f32.u32 	%f739, %r662;
	mul.f32 	%f740, %f739, 0f33800000;
	fma.rn.f32 	%f741, %f740, 0f40000000, 0fBF800000;
	mul.f32 	%f742, %f17, %f741;
	mul.f32 	%f743, %f18, %f741;
	mul.f32 	%f744, %f19, %f741;
	fma.rn.f32 	%f745, %f20, %f738, %f742;
	fma.rn.f32 	%f746, %f21, %f738, %f743;
	fma.rn.f32 	%f747, %f22, %f738, %f744;
	mul.f32 	%f748, %f746, %f746;
	fma.rn.f32 	%f749, %f745, %f745, %f748;
	fma.rn.f32 	%f750, %f747, %f747, %f749;
	sqrt.rn.f32 	%f751, %f750;
	rcp.rn.f32 	%f752, %f751;
	mul.f32 	%f753, %f745, %f752;
	mul.f32 	%f754, %f746, %f752;
	mul.f32 	%f755, %f747, %f752;
	mul.f32 	%f756, %f2044, %f755;
	mul.f32 	%f757, %f2045, %f754;
	sub.f32 	%f758, %f756, %f757;
	mul.f32 	%f759, %f2045, %f753;
	mul.f32 	%f760, %f2043, %f755;
	sub.f32 	%f761, %f759, %f760;
	mul.f32 	%f762, %f2043, %f754;
	mul.f32 	%f763, %f2044, %f753;
	sub.f32 	%f764, %f762, %f763;
	mul.f32 	%f765, %f753, 0fBECECEDE;
	mul.f32 	%f766, %f754, 0fBECECEDE;
	mul.f32 	%f767, %f755, 0fBECECEDE;
	fma.rn.f32 	%f768, %f23, %f765, %f14;
	fma.rn.f32 	%f769, %f23, %f766, %f15;
	fma.rn.f32 	%f770, %f23, %f767, %f16;
	mul.f32 	%f771, %f758, 0fBF23A3A9;
	mul.f32 	%f772, %f761, 0fBF23A3A9;
	mul.f32 	%f773, %f764, 0fBF23A3A9;
	fma.rn.f32 	%f107, %f23, %f771, %f768;
	fma.rn.f32 	%f108, %f23, %f772, %f769;
	fma.rn.f32 	%f109, %f23, %f773, %f770;
	sub.f32 	%f774, %f107, %f14;
	sub.f32 	%f775, %f108, %f15;
	sub.f32 	%f776, %f109, %f16;
	mul.f32 	%f777, %f775, %f775;
	fma.rn.f32 	%f778, %f774, %f774, %f777;
	fma.rn.f32 	%f779, %f776, %f776, %f778;
	sqrt.rn.f32 	%f734, %f779;
	rcp.rn.f32 	%f780, %f734;
	mul.f32 	%f730, %f780, %f774;
	mul.f32 	%f731, %f780, %f775;
	mul.f32 	%f732, %f780, %f776;
	mov.f32 	%f735, 0f00000000;
	// begin inline asm
	call(%r589,%r590,%r591,%r592,%r593,%r594,%r595,%r596,%r597,%r598,%r599,%r600,%r601,%r602,%r603,%r604,%r605,%r606,%r607,%r608,%r609,%r610,%r611,%r612,%r613,%r614,%r615,%r616,%r617,%r618,%r619,%r620),_optix_trace_typed_32,(%r514,%rd3,%f14,%f15,%f16,%f730,%f731,%f732,%f488,%f734,%f735,%r481,%r514,%r481,%r480,%r481,%r482,%r485,%r485,%r485,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514);
	// end inline asm
	mov.b32 	%f781, %r589;
	mov.b32 	%f782, %r590;
	mov.b32 	%f783, %r591;
	setp.neu.f32 	%p76, %f781, 0f3F800000;
	setp.neu.f32 	%p77, %f782, 0f3F800000;
	or.pred  	%p78, %p76, %p77;
	setp.neu.f32 	%p79, %f783, 0f3F800000;
	or.pred  	%p80, %p79, %p78;
	@%p80 bra 	$L__BB0_40;

	mov.f32 	%f791, 0f6C4ECB8F;
	mov.u32 	%r699, 2;
	mov.u32 	%r700, 1;
	mov.u32 	%r701, 3;
	mov.u32 	%r704, 1065353216;
	mov.u32 	%r733, 0;
	// begin inline asm
	call(%r663,%r664,%r665,%r666,%r667,%r668,%r669,%r670,%r671,%r672,%r673,%r674,%r675,%r676,%r677,%r678,%r679,%r680,%r681,%r682,%r683,%r684,%r685,%r686,%r687,%r688,%r689,%r690,%r691,%r692,%r693,%r694),_optix_trace_typed_32,(%r733,%rd3,%f107,%f108,%f109,%f70,%f71,%f72,%f488,%f791,%f735,%r700,%r733,%r700,%r699,%r700,%r701,%r704,%r704,%r704,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733);
	// end inline asm
	mov.b32 	%f793, %r663;
	mov.b32 	%f794, %r664;
	mov.b32 	%f795, %r665;
	add.f32 	%f2060, %f2060, %f793;
	add.f32 	%f2061, %f2061, %f794;
	add.f32 	%f2062, %f2062, %f795;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_40:
	mad.lo.s32 	%r805, %r51, 1664525, 1013904223;
	and.b32  	%r806, %r805, 16777215;
	cvt.rn.f32.u32 	%f805, %r806;
	mul.f32 	%f806, %f805, 0f33800000;
	fma.rn.f32 	%f807, %f806, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r52, %r805, 1664525, 1013904223;
	and.b32  	%r807, %r52, 16777215;
	cvt.rn.f32.u32 	%f808, %r807;
	mul.f32 	%f809, %f808, 0f33800000;
	fma.rn.f32 	%f810, %f809, 0f40000000, 0fBF800000;
	mul.f32 	%f811, %f17, %f810;
	mul.f32 	%f812, %f18, %f810;
	mul.f32 	%f813, %f19, %f810;
	fma.rn.f32 	%f814, %f20, %f807, %f811;
	fma.rn.f32 	%f815, %f21, %f807, %f812;
	fma.rn.f32 	%f816, %f22, %f807, %f813;
	mul.f32 	%f817, %f815, %f815;
	fma.rn.f32 	%f818, %f814, %f814, %f817;
	fma.rn.f32 	%f819, %f816, %f816, %f818;
	sqrt.rn.f32 	%f820, %f819;
	rcp.rn.f32 	%f821, %f820;
	mul.f32 	%f822, %f814, %f821;
	mul.f32 	%f823, %f815, %f821;
	mul.f32 	%f824, %f816, %f821;
	mul.f32 	%f825, %f2044, %f824;
	mul.f32 	%f826, %f2045, %f823;
	sub.f32 	%f827, %f825, %f826;
	mul.f32 	%f828, %f2045, %f822;
	mul.f32 	%f829, %f2043, %f824;
	sub.f32 	%f830, %f828, %f829;
	mul.f32 	%f831, %f2043, %f823;
	mul.f32 	%f832, %f2044, %f822;
	sub.f32 	%f833, %f831, %f832;
	mul.f32 	%f834, %f822, 0fBF23A3A9;
	mul.f32 	%f835, %f823, 0fBF23A3A9;
	mul.f32 	%f836, %f824, 0fBF23A3A9;
	fma.rn.f32 	%f837, %f23, %f834, %f14;
	fma.rn.f32 	%f838, %f23, %f835, %f15;
	fma.rn.f32 	%f839, %f23, %f836, %f16;
	mul.f32 	%f840, %f827, 0f3F23A3A8;
	mul.f32 	%f841, %f830, 0f3F23A3A8;
	mul.f32 	%f842, %f833, 0f3F23A3A8;
	fma.rn.f32 	%f118, %f23, %f840, %f837;
	fma.rn.f32 	%f119, %f23, %f841, %f838;
	fma.rn.f32 	%f120, %f23, %f842, %f839;
	sub.f32 	%f843, %f118, %f14;
	sub.f32 	%f844, %f119, %f15;
	sub.f32 	%f845, %f120, %f16;
	mul.f32 	%f846, %f844, %f844;
	fma.rn.f32 	%f847, %f843, %f843, %f846;
	fma.rn.f32 	%f848, %f845, %f845, %f847;
	sqrt.rn.f32 	%f803, %f848;
	rcp.rn.f32 	%f849, %f803;
	mul.f32 	%f799, %f849, %f843;
	mul.f32 	%f800, %f849, %f844;
	mul.f32 	%f801, %f849, %f845;
	mov.u32 	%r770, 2;
	mov.u32 	%r771, 1;
	mov.u32 	%r772, 3;
	mov.u32 	%r775, 1065353216;
	mov.u32 	%r804, 0;
	// begin inline asm
	call(%r734,%r735,%r736,%r737,%r738,%r739,%r740,%r741,%r742,%r743,%r744,%r745,%r746,%r747,%r748,%r749,%r750,%r751,%r752,%r753,%r754,%r755,%r756,%r757,%r758,%r759,%r760,%r761,%r762,%r763,%r764,%r765),_optix_trace_typed_32,(%r804,%rd3,%f14,%f15,%f16,%f799,%f800,%f801,%f488,%f803,%f735,%r771,%r804,%r771,%r770,%r771,%r772,%r775,%r775,%r775,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804);
	// end inline asm
	mov.b32 	%f850, %r734;
	mov.b32 	%f851, %r735;
	mov.b32 	%f852, %r736;
	setp.neu.f32 	%p81, %f850, 0f3F800000;
	setp.neu.f32 	%p82, %f851, 0f3F800000;
	or.pred  	%p83, %p81, %p82;
	setp.neu.f32 	%p84, %f852, 0f3F800000;
	or.pred  	%p85, %p84, %p83;
	@%p85 bra 	$L__BB0_42;

	mov.f32 	%f860, 0f6C4ECB8F;
	mov.f32 	%f861, 0f00000000;
	// begin inline asm
	call(%r808,%r809,%r810,%r811,%r812,%r813,%r814,%r815,%r816,%r817,%r818,%r819,%r820,%r821,%r822,%r823,%r824,%r825,%r826,%r827,%r828,%r829,%r830,%r831,%r832,%r833,%r834,%r835,%r836,%r837,%r838,%r839),_optix_trace_typed_32,(%r804,%rd3,%f118,%f119,%f120,%f70,%f71,%f72,%f488,%f860,%f861,%r771,%r804,%r771,%r770,%r771,%r772,%r775,%r775,%r775,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804);
	// end inline asm
	mov.b32 	%f862, %r808;
	mov.b32 	%f863, %r809;
	mov.b32 	%f864, %r810;
	add.f32 	%f2060, %f2060, %f862;
	add.f32 	%f2061, %f2061, %f863;
	add.f32 	%f2062, %f2062, %f864;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_42:
	mad.lo.s32 	%r950, %r52, 1664525, 1013904223;
	and.b32  	%r951, %r950, 16777215;
	cvt.rn.f32.u32 	%f874, %r951;
	mul.f32 	%f875, %f874, 0f33800000;
	fma.rn.f32 	%f876, %f875, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r53, %r950, 1664525, 1013904223;
	and.b32  	%r952, %r53, 16777215;
	cvt.rn.f32.u32 	%f877, %r952;
	mul.f32 	%f878, %f877, 0f33800000;
	fma.rn.f32 	%f879, %f878, 0f40000000, 0fBF800000;
	mul.f32 	%f880, %f17, %f879;
	mul.f32 	%f881, %f18, %f879;
	mul.f32 	%f882, %f19, %f879;
	fma.rn.f32 	%f883, %f20, %f876, %f880;
	fma.rn.f32 	%f884, %f21, %f876, %f881;
	fma.rn.f32 	%f885, %f22, %f876, %f882;
	mul.f32 	%f886, %f884, %f884;
	fma.rn.f32 	%f887, %f883, %f883, %f886;
	fma.rn.f32 	%f888, %f885, %f885, %f887;
	sqrt.rn.f32 	%f889, %f888;
	rcp.rn.f32 	%f890, %f889;
	mul.f32 	%f891, %f883, %f890;
	mul.f32 	%f892, %f884, %f890;
	mul.f32 	%f893, %f885, %f890;
	mul.f32 	%f894, %f2044, %f893;
	mul.f32 	%f895, %f2045, %f892;
	sub.f32 	%f896, %f894, %f895;
	mul.f32 	%f897, %f2045, %f891;
	mul.f32 	%f898, %f2043, %f893;
	sub.f32 	%f899, %f897, %f898;
	mul.f32 	%f900, %f2043, %f892;
	mul.f32 	%f901, %f2044, %f891;
	sub.f32 	%f902, %f900, %f901;
	mul.f32 	%f903, %f891, 0fBF61E1E3;
	mul.f32 	%f904, %f892, 0fBF61E1E3;
	mul.f32 	%f905, %f893, 0fBF61E1E3;
	fma.rn.f32 	%f906, %f23, %f903, %f14;
	fma.rn.f32 	%f907, %f23, %f904, %f15;
	fma.rn.f32 	%f908, %f23, %f905, %f16;
	mul.f32 	%f909, %f896, 0fBE24A490;
	mul.f32 	%f910, %f899, 0fBE24A490;
	mul.f32 	%f911, %f902, 0fBE24A490;
	fma.rn.f32 	%f129, %f23, %f909, %f906;
	fma.rn.f32 	%f130, %f23, %f910, %f907;
	fma.rn.f32 	%f131, %f23, %f911, %f908;
	sub.f32 	%f912, %f129, %f14;
	sub.f32 	%f913, %f130, %f15;
	sub.f32 	%f914, %f131, %f16;
	mul.f32 	%f915, %f913, %f913;
	fma.rn.f32 	%f916, %f912, %f912, %f915;
	fma.rn.f32 	%f917, %f914, %f914, %f916;
	sqrt.rn.f32 	%f872, %f917;
	rcp.rn.f32 	%f918, %f872;
	mul.f32 	%f868, %f918, %f912;
	mul.f32 	%f869, %f918, %f913;
	mul.f32 	%f870, %f918, %f914;
	mov.f32 	%f873, 0f00000000;
	// begin inline asm
	call(%r879,%r880,%r881,%r882,%r883,%r884,%r885,%r886,%r887,%r888,%r889,%r890,%r891,%r892,%r893,%r894,%r895,%r896,%r897,%r898,%r899,%r900,%r901,%r902,%r903,%r904,%r905,%r906,%r907,%r908,%r909,%r910),_optix_trace_typed_32,(%r804,%rd3,%f14,%f15,%f16,%f868,%f869,%f870,%f488,%f872,%f873,%r771,%r804,%r771,%r770,%r771,%r772,%r775,%r775,%r775,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804);
	// end inline asm
	mov.b32 	%f919, %r879;
	mov.b32 	%f920, %r880;
	mov.b32 	%f921, %r881;
	setp.neu.f32 	%p86, %f919, 0f3F800000;
	setp.neu.f32 	%p87, %f920, 0f3F800000;
	or.pred  	%p88, %p86, %p87;
	setp.neu.f32 	%p89, %f921, 0f3F800000;
	or.pred  	%p90, %p89, %p88;
	@%p90 bra 	$L__BB0_44;

	mov.f32 	%f929, 0f6C4ECB8F;
	mov.u32 	%r989, 2;
	mov.u32 	%r990, 1;
	mov.u32 	%r991, 3;
	mov.u32 	%r994, 1065353216;
	mov.u32 	%r1023, 0;
	// begin inline asm
	call(%r953,%r954,%r955,%r956,%r957,%r958,%r959,%r960,%r961,%r962,%r963,%r964,%r965,%r966,%r967,%r968,%r969,%r970,%r971,%r972,%r973,%r974,%r975,%r976,%r977,%r978,%r979,%r980,%r981,%r982,%r983,%r984),_optix_trace_typed_32,(%r1023,%rd3,%f129,%f130,%f131,%f70,%f71,%f72,%f488,%f929,%f873,%r990,%r1023,%r990,%r989,%r990,%r991,%r994,%r994,%r994,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023);
	// end inline asm
	mov.b32 	%f931, %r953;
	mov.b32 	%f932, %r954;
	mov.b32 	%f933, %r955;
	add.f32 	%f2060, %f2060, %f931;
	add.f32 	%f2061, %f2061, %f932;
	add.f32 	%f2062, %f2062, %f933;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_44:
	mad.lo.s32 	%r1095, %r53, 1664525, 1013904223;
	and.b32  	%r1096, %r1095, 16777215;
	cvt.rn.f32.u32 	%f943, %r1096;
	mul.f32 	%f944, %f943, 0f33800000;
	fma.rn.f32 	%f945, %f944, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r54, %r1095, 1664525, 1013904223;
	and.b32  	%r1097, %r54, 16777215;
	cvt.rn.f32.u32 	%f946, %r1097;
	mul.f32 	%f947, %f946, 0f33800000;
	fma.rn.f32 	%f948, %f947, 0f40000000, 0fBF800000;
	mul.f32 	%f949, %f17, %f948;
	mul.f32 	%f950, %f18, %f948;
	mul.f32 	%f951, %f19, %f948;
	fma.rn.f32 	%f952, %f20, %f945, %f949;
	fma.rn.f32 	%f953, %f21, %f945, %f950;
	fma.rn.f32 	%f954, %f22, %f945, %f951;
	mul.f32 	%f955, %f953, %f953;
	fma.rn.f32 	%f956, %f952, %f952, %f955;
	fma.rn.f32 	%f957, %f954, %f954, %f956;
	sqrt.rn.f32 	%f958, %f957;
	rcp.rn.f32 	%f959, %f958;
	mul.f32 	%f960, %f952, %f959;
	mul.f32 	%f961, %f953, %f959;
	mul.f32 	%f962, %f954, %f959;
	mul.f32 	%f963, %f2044, %f962;
	mul.f32 	%f964, %f2045, %f961;
	sub.f32 	%f965, %f963, %f964;
	mul.f32 	%f966, %f2045, %f960;
	mul.f32 	%f967, %f2043, %f962;
	sub.f32 	%f968, %f966, %f967;
	mul.f32 	%f969, %f2043, %f961;
	mul.f32 	%f970, %f2044, %f960;
	sub.f32 	%f971, %f969, %f970;
	mul.f32 	%f972, %f960, 0f3ECACABC;
	mul.f32 	%f973, %f961, 0f3ECACABC;
	mul.f32 	%f974, %f962, 0f3ECACABC;
	fma.rn.f32 	%f975, %f23, %f972, %f14;
	fma.rn.f32 	%f976, %f23, %f973, %f15;
	fma.rn.f32 	%f977, %f23, %f974, %f16;
	mul.f32 	%f978, %f965, 0f3F61E1D2;
	mul.f32 	%f979, %f968, 0f3F61E1D2;
	mul.f32 	%f980, %f971, 0f3F61E1D2;
	fma.rn.f32 	%f140, %f23, %f978, %f975;
	fma.rn.f32 	%f141, %f23, %f979, %f976;
	fma.rn.f32 	%f142, %f23, %f980, %f977;
	sub.f32 	%f981, %f140, %f14;
	sub.f32 	%f982, %f141, %f15;
	sub.f32 	%f983, %f142, %f16;
	mul.f32 	%f984, %f982, %f982;
	fma.rn.f32 	%f985, %f981, %f981, %f984;
	fma.rn.f32 	%f986, %f983, %f983, %f985;
	sqrt.rn.f32 	%f941, %f986;
	rcp.rn.f32 	%f987, %f941;
	mul.f32 	%f937, %f987, %f981;
	mul.f32 	%f938, %f987, %f982;
	mul.f32 	%f939, %f987, %f983;
	mov.u32 	%r1060, 2;
	mov.u32 	%r1061, 1;
	mov.u32 	%r1062, 3;
	mov.u32 	%r1065, 1065353216;
	mov.u32 	%r1094, 0;
	// begin inline asm
	call(%r1024,%r1025,%r1026,%r1027,%r1028,%r1029,%r1030,%r1031,%r1032,%r1033,%r1034,%r1035,%r1036,%r1037,%r1038,%r1039,%r1040,%r1041,%r1042,%r1043,%r1044,%r1045,%r1046,%r1047,%r1048,%r1049,%r1050,%r1051,%r1052,%r1053,%r1054,%r1055),_optix_trace_typed_32,(%r1094,%rd3,%f14,%f15,%f16,%f937,%f938,%f939,%f488,%f941,%f873,%r1061,%r1094,%r1061,%r1060,%r1061,%r1062,%r1065,%r1065,%r1065,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094);
	// end inline asm
	mov.b32 	%f988, %r1024;
	mov.b32 	%f989, %r1025;
	mov.b32 	%f990, %r1026;
	setp.neu.f32 	%p91, %f988, 0f3F800000;
	setp.neu.f32 	%p92, %f989, 0f3F800000;
	or.pred  	%p93, %p91, %p92;
	setp.neu.f32 	%p94, %f990, 0f3F800000;
	or.pred  	%p95, %p94, %p93;
	@%p95 bra 	$L__BB0_46;

	mov.f32 	%f998, 0f6C4ECB8F;
	mov.f32 	%f999, 0f00000000;
	// begin inline asm
	call(%r1098,%r1099,%r1100,%r1101,%r1102,%r1103,%r1104,%r1105,%r1106,%r1107,%r1108,%r1109,%r1110,%r1111,%r1112,%r1113,%r1114,%r1115,%r1116,%r1117,%r1118,%r1119,%r1120,%r1121,%r1122,%r1123,%r1124,%r1125,%r1126,%r1127,%r1128,%r1129),_optix_trace_typed_32,(%r1094,%rd3,%f140,%f141,%f142,%f70,%f71,%f72,%f488,%f998,%f999,%r1061,%r1094,%r1061,%r1060,%r1061,%r1062,%r1065,%r1065,%r1065,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094);
	// end inline asm
	mov.b32 	%f1000, %r1098;
	mov.b32 	%f1001, %r1099;
	mov.b32 	%f1002, %r1100;
	add.f32 	%f2060, %f2060, %f1000;
	add.f32 	%f2061, %f2061, %f1001;
	add.f32 	%f2062, %f2062, %f1002;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_46:
	mad.lo.s32 	%r1240, %r54, 1664525, 1013904223;
	and.b32  	%r1241, %r1240, 16777215;
	cvt.rn.f32.u32 	%f1012, %r1241;
	mul.f32 	%f1013, %f1012, 0f33800000;
	fma.rn.f32 	%f1014, %f1013, 0f40000000, 0fBF800000;
	mad.lo.s32 	%r1542, %r1240, 1664525, 1013904223;
	and.b32  	%r1242, %r1542, 16777215;
	cvt.rn.f32.u32 	%f1015, %r1242;
	mul.f32 	%f1016, %f1015, 0f33800000;
	fma.rn.f32 	%f1017, %f1016, 0f40000000, 0fBF800000;
	mul.f32 	%f1018, %f17, %f1017;
	mul.f32 	%f1019, %f18, %f1017;
	mul.f32 	%f1020, %f19, %f1017;
	fma.rn.f32 	%f1021, %f20, %f1014, %f1018;
	fma.rn.f32 	%f1022, %f21, %f1014, %f1019;
	fma.rn.f32 	%f1023, %f22, %f1014, %f1020;
	mul.f32 	%f1024, %f1022, %f1022;
	fma.rn.f32 	%f1025, %f1021, %f1021, %f1024;
	fma.rn.f32 	%f1026, %f1023, %f1023, %f1025;
	sqrt.rn.f32 	%f1027, %f1026;
	rcp.rn.f32 	%f1028, %f1027;
	mul.f32 	%f1029, %f1021, %f1028;
	mul.f32 	%f1030, %f1022, %f1028;
	mul.f32 	%f1031, %f1023, %f1028;
	mul.f32 	%f1032, %f2044, %f1031;
	mul.f32 	%f1033, %f2045, %f1030;
	sub.f32 	%f1034, %f1032, %f1033;
	mul.f32 	%f1035, %f2045, %f1029;
	mul.f32 	%f1036, %f2043, %f1031;
	sub.f32 	%f1037, %f1035, %f1036;
	mul.f32 	%f1038, %f2043, %f1030;
	mul.f32 	%f1039, %f2044, %f1029;
	sub.f32 	%f1040, %f1038, %f1039;
	mul.f32 	%f1041, %f1029, 0f3F61E1D2;
	mul.f32 	%f1042, %f1030, 0f3F61E1D2;
	mul.f32 	%f1043, %f1031, 0f3F61E1D2;
	fma.rn.f32 	%f1044, %f23, %f1041, %f14;
	fma.rn.f32 	%f1045, %f23, %f1042, %f15;
	fma.rn.f32 	%f1046, %f23, %f1043, %f16;
	mul.f32 	%f1047, %f1034, 0fBF61E1E3;
	mul.f32 	%f1048, %f1037, 0fBF61E1E3;
	mul.f32 	%f1049, %f1040, 0fBF61E1E3;
	fma.rn.f32 	%f151, %f23, %f1047, %f1044;
	fma.rn.f32 	%f152, %f23, %f1048, %f1045;
	fma.rn.f32 	%f153, %f23, %f1049, %f1046;
	sub.f32 	%f1050, %f151, %f14;
	sub.f32 	%f1051, %f152, %f15;
	sub.f32 	%f1052, %f153, %f16;
	mul.f32 	%f1053, %f1051, %f1051;
	fma.rn.f32 	%f1054, %f1050, %f1050, %f1053;
	fma.rn.f32 	%f1055, %f1052, %f1052, %f1054;
	sqrt.rn.f32 	%f1010, %f1055;
	rcp.rn.f32 	%f1056, %f1010;
	mul.f32 	%f1006, %f1056, %f1050;
	mul.f32 	%f1007, %f1056, %f1051;
	mul.f32 	%f1008, %f1056, %f1052;
	mov.f32 	%f1011, 0f00000000;
	// begin inline asm
	call(%r1169,%r1170,%r1171,%r1172,%r1173,%r1174,%r1175,%r1176,%r1177,%r1178,%r1179,%r1180,%r1181,%r1182,%r1183,%r1184,%r1185,%r1186,%r1187,%r1188,%r1189,%r1190,%r1191,%r1192,%r1193,%r1194,%r1195,%r1196,%r1197,%r1198,%r1199,%r1200),_optix_trace_typed_32,(%r1094,%rd3,%f14,%f15,%f16,%f1006,%f1007,%f1008,%f488,%f1010,%f1011,%r1061,%r1094,%r1061,%r1060,%r1061,%r1062,%r1065,%r1065,%r1065,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094);
	// end inline asm
	mov.b32 	%f1057, %r1169;
	mov.b32 	%f1058, %r1170;
	mov.b32 	%f1059, %r1171;
	setp.neu.f32 	%p96, %f1057, 0f3F800000;
	setp.neu.f32 	%p97, %f1058, 0f3F800000;
	or.pred  	%p98, %p96, %p97;
	setp.neu.f32 	%p99, %f1059, 0f3F800000;
	or.pred  	%p100, %p99, %p98;
	@%p100 bra 	$L__BB0_48;

	mov.f32 	%f1067, 0f6C4ECB8F;
	mov.u32 	%r1279, 2;
	mov.u32 	%r1280, 1;
	mov.u32 	%r1281, 3;
	mov.u32 	%r1284, 1065353216;
	mov.u32 	%r1313, 0;
	// begin inline asm
	call(%r1243,%r1244,%r1245,%r1246,%r1247,%r1248,%r1249,%r1250,%r1251,%r1252,%r1253,%r1254,%r1255,%r1256,%r1257,%r1258,%r1259,%r1260,%r1261,%r1262,%r1263,%r1264,%r1265,%r1266,%r1267,%r1268,%r1269,%r1270,%r1271,%r1272,%r1273,%r1274),_optix_trace_typed_32,(%r1313,%rd3,%f151,%f152,%f153,%f70,%f71,%f72,%f488,%f1067,%f1011,%r1280,%r1313,%r1280,%r1279,%r1280,%r1281,%r1284,%r1284,%r1284,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313);
	// end inline asm
	mov.b32 	%f1069, %r1243;
	mov.b32 	%f1070, %r1244;
	mov.b32 	%f1071, %r1245;
	add.f32 	%f2060, %f2060, %f1069;
	add.f32 	%f2061, %f2061, %f1070;
	add.f32 	%f2062, %f2062, %f1071;
	add.f32 	%f2063, %f2063, 0f3F800000;
	mov.u16 	%rs195, 1;

$L__BB0_48:
	setp.ne.s16 	%p101, %rs195, 0;
	@%p101 bra 	$L__BB0_50;

	mov.f32 	%f1079, 0f6C4ECB8F;
	mov.f32 	%f1080, 0f00000000;
	mov.u32 	%r1350, 2;
	mov.u32 	%r1351, 1;
	mov.u32 	%r1352, 3;
	mov.u32 	%r1355, 1065353216;
	mov.u32 	%r1384, 0;
	// begin inline asm
	call(%r1314,%r1315,%r1316,%r1317,%r1318,%r1319,%r1320,%r1321,%r1322,%r1323,%r1324,%r1325,%r1326,%r1327,%r1328,%r1329,%r1330,%r1331,%r1332,%r1333,%r1334,%r1335,%r1336,%r1337,%r1338,%r1339,%r1340,%r1341,%r1342,%r1343,%r1344,%r1345),_optix_trace_typed_32,(%r1384,%rd3,%f14,%f15,%f16,%f70,%f71,%f72,%f488,%f1079,%f1080,%r1351,%r1384,%r1351,%r1350,%r1351,%r1352,%r1355,%r1355,%r1355,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384);
	// end inline asm
	mov.b32 	%f1081, %r1314;
	mov.b32 	%f1082, %r1315;
	mov.b32 	%f1083, %r1316;
	add.f32 	%f2060, %f2060, %f1081;
	add.f32 	%f2061, %f2061, %f1082;
	add.f32 	%f2062, %f2062, %f1083;
	add.f32 	%f2063, %f2063, 0f3F800000;

$L__BB0_50:
	add.s32 	%r1541, %r1541, 1;
	setp.lt.s32 	%p102, %r1541, %r7;
	@%p102 bra 	$L__BB0_8;

	add.s32 	%r1539, %r1539, 1;
	setp.lt.s32 	%p103, %r1539, %r7;
	@%p103 bra 	$L__BB0_7;

$L__BB0_52:
	setp.eq.s32 	%p104, %r7, 0;
	mov.f32 	%f2100, 0f3F800000;
	mov.f32 	%f2101, %f2100;
	mov.f32 	%f2102, %f2100;
	@%p104 bra 	$L__BB0_54;

	mov.f32 	%f1087, 0f3F800000;
	max.f32 	%f1088, %f2063, %f1087;
	rcp.rn.f32 	%f1089, %f1088;
	mul.f32 	%f2100, %f2060, %f1089;
	mul.f32 	%f2101, %f2061, %f1089;
	mul.f32 	%f2102, %f2062, %f1089;

$L__BB0_54:
	ld.const.f32 	%f1091, [params+524];
	mul.f32 	%f180, %f2100, %f1091;
	ld.const.v2.f32 	{%f1092, %f1093}, [params+528];
	mul.f32 	%f181, %f2101, %f1092;
	mul.f32 	%f182, %f2102, %f1093;
	cvt.sat.f32.f32 	%f1096, %f13;
	mul.f32 	%f183, %f180, %f1096;
	mul.f32 	%f184, %f181, %f1096;
	mul.f32 	%f185, %f182, %f1096;
	fma.rn.f32 	%f1097, %f13, 0f3F000000, 0f3F000000;
	cvt.sat.f32.f32 	%f1098, %f1097;
	add.f32 	%f186, %f1098, %f1098;
	mov.f32 	%f1099, 0f41200000;
	cvt.rzi.f32.f32 	%f1100, %f1099;
	add.f32 	%f1101, %f1100, %f1100;
	mov.f32 	%f1102, 0f41A00000;
	sub.f32 	%f1103, %f1102, %f1101;
	abs.f32 	%f187, %f1103;
	abs.f32 	%f188, %f186;
	setp.lt.f32 	%p105, %f188, 0f00800000;
	mul.f32 	%f1104, %f188, 0f4B800000;
	selp.f32 	%f1105, %f1104, %f188, %p105;
	selp.f32 	%f1106, 0fC3170000, 0fC2FE0000, %p105;
	mov.b32 	%r1385, %f1105;
	and.b32  	%r1386, %r1385, 8388607;
	or.b32  	%r1387, %r1386, 1065353216;
	mov.b32 	%f1107, %r1387;
	shr.u32 	%r1388, %r1385, 23;
	cvt.rn.f32.u32 	%f1108, %r1388;
	add.f32 	%f1109, %f1106, %f1108;
	setp.gt.f32 	%p106, %f1107, 0f3FB504F3;
	mul.f32 	%f1110, %f1107, 0f3F000000;
	add.f32 	%f1111, %f1109, 0f3F800000;
	selp.f32 	%f1112, %f1111, %f1109, %p106;
	selp.f32 	%f1113, %f1110, %f1107, %p106;
	add.f32 	%f1114, %f1113, 0fBF800000;
	add.f32 	%f1115, %f1113, 0f3F800000;
	rcp.approx.ftz.f32 	%f1116, %f1115;
	add.f32 	%f1117, %f1114, %f1114;
	mul.f32 	%f1118, %f1117, %f1116;
	mul.f32 	%f1119, %f1118, %f1118;
	mov.f32 	%f1120, 0f3C4CAF63;
	mov.f32 	%f1121, 0f3B18F0FE;
	fma.rn.f32 	%f1122, %f1121, %f1119, %f1120;
	mov.f32 	%f1123, 0f3DAAAABD;
	fma.rn.f32 	%f1124, %f1122, %f1119, %f1123;
	mul.rn.f32 	%f1125, %f1124, %f1119;
	mul.rn.f32 	%f1126, %f1125, %f1118;
	sub.f32 	%f1127, %f1114, %f1118;
	add.f32 	%f1128, %f1127, %f1127;
	neg.f32 	%f1129, %f1118;
	fma.rn.f32 	%f1130, %f1129, %f1114, %f1128;
	mul.rn.f32 	%f1131, %f1116, %f1130;
	add.f32 	%f1132, %f1126, %f1118;
	sub.f32 	%f1133, %f1118, %f1132;
	add.f32 	%f1134, %f1126, %f1133;
	add.f32 	%f1135, %f1131, %f1134;
	add.f32 	%f1136, %f1132, %f1135;
	sub.f32 	%f1137, %f1132, %f1136;
	add.f32 	%f1138, %f1135, %f1137;
	mov.f32 	%f1139, 0f3F317200;
	mul.rn.f32 	%f1140, %f1112, %f1139;
	mov.f32 	%f1141, 0f35BFBE8E;
	mul.rn.f32 	%f1142, %f1112, %f1141;
	add.f32 	%f1143, %f1140, %f1136;
	sub.f32 	%f1144, %f1140, %f1143;
	add.f32 	%f1145, %f1136, %f1144;
	add.f32 	%f1146, %f1138, %f1145;
	add.f32 	%f1147, %f1142, %f1146;
	add.f32 	%f1148, %f1143, %f1147;
	sub.f32 	%f1149, %f1143, %f1148;
	add.f32 	%f1150, %f1147, %f1149;
	mul.rn.f32 	%f1151, %f1102, %f1148;
	neg.f32 	%f1152, %f1151;
	fma.rn.f32 	%f1153, %f1102, %f1148, %f1152;
	fma.rn.f32 	%f1154, %f1102, %f1150, %f1153;
	mov.f32 	%f1155, 0f00000000;
	fma.rn.f32 	%f1156, %f1155, %f1148, %f1154;
	add.rn.f32 	%f1157, %f1151, %f1156;
	neg.f32 	%f1158, %f1157;
	add.rn.f32 	%f1159, %f1151, %f1158;
	add.rn.f32 	%f1160, %f1159, %f1156;
	mov.b32 	%r1389, %f1157;
	setp.eq.s32 	%p107, %r1389, 1118925336;
	add.s32 	%r1390, %r1389, -1;
	mov.b32 	%f1161, %r1390;
	add.f32 	%f1162, %f1160, 0f37000000;
	selp.f32 	%f189, %f1162, %f1160, %p107;
	selp.f32 	%f1163, %f1161, %f1157, %p107;
	mov.f32 	%f1164, 0f3FB8AA3B;
	mul.rn.f32 	%f1165, %f1163, %f1164;
	cvt.rzi.f32.f32 	%f1166, %f1165;
	abs.f32 	%f1167, %f1166;
	setp.gt.f32 	%p108, %f1167, 0f42FC0000;
	mov.b32 	%r1391, %f1166;
	and.b32  	%r1392, %r1391, -2147483648;
	or.b32  	%r1393, %r1392, 1123811328;
	mov.b32 	%f1168, %r1393;
	selp.f32 	%f1169, %f1168, %f1166, %p108;
	mov.f32 	%f1170, 0fBF317218;
	fma.rn.f32 	%f1171, %f1169, %f1170, %f1163;
	mov.f32 	%f1172, 0f3102E308;
	fma.rn.f32 	%f1173, %f1169, %f1172, %f1171;
	mul.f32 	%f1174, %f1173, 0f3FB8AA3B;
	add.f32 	%f1175, %f1169, 0f4B40007F;
	mov.b32 	%r1394, %f1175;
	shl.b32 	%r1395, %r1394, 23;
	mov.b32 	%f1176, %r1395;
	ex2.approx.ftz.f32 	%f1177, %f1174;
	mul.f32 	%f190, %f1177, %f1176;
	setp.eq.f32 	%p109, %f190, 0f7F800000;
	mov.f32 	%f2103, 0f7F800000;
	@%p109 bra 	$L__BB0_56;

	fma.rn.f32 	%f2103, %f190, %f189, %f190;

$L__BB0_56:
	setp.lt.f32 	%p110, %f186, 0f00000000;
	setp.eq.f32 	%p111, %f187, 0f3F800000;
	and.pred  	%p1, %p110, %p111;
	setp.eq.f32 	%p112, %f186, 0f00000000;
	@%p112 bra 	$L__BB0_60;
	bra.uni 	$L__BB0_57;

$L__BB0_60:
	add.f32 	%f1182, %f186, %f186;
	selp.f32 	%f2105, %f1182, 0f00000000, %p111;
	bra.uni 	$L__BB0_61;

$L__BB0_57:
	mov.b32 	%r1396, %f2103;
	xor.b32  	%r1397, %r1396, -2147483648;
	mov.b32 	%f1178, %r1397;
	selp.f32 	%f2105, %f1178, %f2103, %p1;
	setp.geu.f32 	%p113, %f186, 0f00000000;
	@%p113 bra 	$L__BB0_61;

	mov.f32 	%f1179, 0f41A00000;
	cvt.rzi.f32.f32 	%f1180, %f1179;
	setp.eq.f32 	%p114, %f1180, 0f41A00000;
	@%p114 bra 	$L__BB0_61;

	mov.f32 	%f2105, 0f7FFFFFFF;

$L__BB0_61:
	add.f32 	%f1183, %f188, 0f41A00000;
	mov.b32 	%r1398, %f1183;
	setp.lt.s32 	%p116, %r1398, 2139095040;
	@%p116 bra 	$L__BB0_66;

	setp.gtu.f32 	%p117, %f188, 0f7F800000;
	@%p117 bra 	$L__BB0_65;
	bra.uni 	$L__BB0_63;

$L__BB0_65:
	add.f32 	%f2105, %f186, 0f41A00000;
	bra.uni 	$L__BB0_66;

$L__BB0_63:
	setp.neu.f32 	%p118, %f188, 0f7F800000;
	@%p118 bra 	$L__BB0_66;

	selp.f32 	%f2105, 0fFF800000, 0f7F800000, %p1;

$L__BB0_66:
	setp.eq.f32 	%p119, %f186, 0f3F800000;
	selp.f32 	%f1184, 0f3F800000, %f2105, %p119;
	cvt.sat.f32.f32 	%f1185, %f1184;
	mul.f32 	%f199, %f180, %f1185;
	mul.f32 	%f200, %f181, %f1185;
	mul.f32 	%f201, %f182, %f1185;
	ld.const.u32 	%r58, [params+104];
	and.b32  	%r1399, %r58, 8;
	setp.eq.s32 	%p120, %r1399, 0;
	@%p120 bra 	$L__BB0_80;

	ld.const.u64 	%rd85, [params+192];
	cvta.to.global.u64 	%rd15, %rd85;
	ld.const.u32 	%r1400, [params+184];
	mad.lo.s32 	%r1401, %r1400, %r6, %r5;
	cvt.u64.u32 	%rd16, %r1401;
	mov.f32 	%f1187, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f1188, %f1187;
	add.f32 	%f1189, %f1188, %f1188;
	mov.f32 	%f1190, 0f3EE8BA2E;
	sub.f32 	%f1191, %f1190, %f1189;
	abs.f32 	%f202, %f1191;
	abs.f32 	%f203, %f2100;
	setp.lt.f32 	%p121, %f203, 0f00800000;
	mul.f32 	%f1192, %f203, 0f4B800000;
	selp.f32 	%f1193, %f1192, %f203, %p121;
	selp.f32 	%f1194, 0fC3170000, 0fC2FE0000, %p121;
	mov.b32 	%r1402, %f1193;
	and.b32  	%r1403, %r1402, 8388607;
	or.b32  	%r1404, %r1403, 1065353216;
	mov.b32 	%f1195, %r1404;
	shr.u32 	%r1405, %r1402, 23;
	cvt.rn.f32.u32 	%f1196, %r1405;
	add.f32 	%f1197, %f1194, %f1196;
	setp.gt.f32 	%p122, %f1195, 0f3FB504F3;
	mul.f32 	%f1198, %f1195, 0f3F000000;
	add.f32 	%f1199, %f1197, 0f3F800000;
	selp.f32 	%f1200, %f1199, %f1197, %p122;
	selp.f32 	%f1201, %f1198, %f1195, %p122;
	add.f32 	%f1202, %f1201, 0fBF800000;
	add.f32 	%f1203, %f1201, 0f3F800000;
	rcp.approx.ftz.f32 	%f1204, %f1203;
	add.f32 	%f1205, %f1202, %f1202;
	mul.f32 	%f1206, %f1205, %f1204;
	mul.f32 	%f1207, %f1206, %f1206;
	mov.f32 	%f1208, 0f3C4CAF63;
	mov.f32 	%f1209, 0f3B18F0FE;
	fma.rn.f32 	%f1210, %f1209, %f1207, %f1208;
	mov.f32 	%f1211, 0f3DAAAABD;
	fma.rn.f32 	%f1212, %f1210, %f1207, %f1211;
	mul.rn.f32 	%f1213, %f1212, %f1207;
	mul.rn.f32 	%f1214, %f1213, %f1206;
	sub.f32 	%f1215, %f1202, %f1206;
	add.f32 	%f1216, %f1215, %f1215;
	neg.f32 	%f1217, %f1206;
	fma.rn.f32 	%f1218, %f1217, %f1202, %f1216;
	mul.rn.f32 	%f1219, %f1204, %f1218;
	add.f32 	%f1220, %f1214, %f1206;
	sub.f32 	%f1221, %f1206, %f1220;
	add.f32 	%f1222, %f1214, %f1221;
	add.f32 	%f1223, %f1219, %f1222;
	add.f32 	%f1224, %f1220, %f1223;
	sub.f32 	%f1225, %f1220, %f1224;
	add.f32 	%f1226, %f1223, %f1225;
	mov.f32 	%f1227, 0f3F317200;
	mul.rn.f32 	%f1228, %f1200, %f1227;
	mov.f32 	%f1229, 0f35BFBE8E;
	mul.rn.f32 	%f1230, %f1200, %f1229;
	add.f32 	%f1231, %f1228, %f1224;
	sub.f32 	%f1232, %f1228, %f1231;
	add.f32 	%f1233, %f1224, %f1232;
	add.f32 	%f1234, %f1226, %f1233;
	add.f32 	%f1235, %f1230, %f1234;
	add.f32 	%f1236, %f1231, %f1235;
	sub.f32 	%f1237, %f1231, %f1236;
	add.f32 	%f1238, %f1235, %f1237;
	mul.rn.f32 	%f1239, %f1190, %f1236;
	neg.f32 	%f1240, %f1239;
	fma.rn.f32 	%f1241, %f1190, %f1236, %f1240;
	fma.rn.f32 	%f1242, %f1190, %f1238, %f1241;
	mov.f32 	%f1243, 0f00000000;
	fma.rn.f32 	%f1244, %f1243, %f1236, %f1242;
	add.rn.f32 	%f1245, %f1239, %f1244;
	neg.f32 	%f1246, %f1245;
	add.rn.f32 	%f1247, %f1239, %f1246;
	add.rn.f32 	%f1248, %f1247, %f1244;
	mov.b32 	%r1406, %f1245;
	setp.eq.s32 	%p123, %r1406, 1118925336;
	add.s32 	%r1407, %r1406, -1;
	mov.b32 	%f1249, %r1407;
	add.f32 	%f1250, %f1248, 0f37000000;
	selp.f32 	%f204, %f1250, %f1248, %p123;
	selp.f32 	%f1251, %f1249, %f1245, %p123;
	mov.f32 	%f1252, 0f3FB8AA3B;
	mul.rn.f32 	%f1253, %f1251, %f1252;
	cvt.rzi.f32.f32 	%f1254, %f1253;
	abs.f32 	%f1255, %f1254;
	setp.gt.f32 	%p124, %f1255, 0f42FC0000;
	mov.b32 	%r1408, %f1254;
	and.b32  	%r1409, %r1408, -2147483648;
	or.b32  	%r1410, %r1409, 1123811328;
	mov.b32 	%f1256, %r1410;
	selp.f32 	%f1257, %f1256, %f1254, %p124;
	mov.f32 	%f1258, 0fBF317218;
	fma.rn.f32 	%f1259, %f1257, %f1258, %f1251;
	mov.f32 	%f1260, 0f3102E308;
	fma.rn.f32 	%f1261, %f1257, %f1260, %f1259;
	mul.f32 	%f1262, %f1261, 0f3FB8AA3B;
	add.f32 	%f1263, %f1257, 0f4B40007F;
	mov.b32 	%r1411, %f1263;
	shl.b32 	%r1412, %r1411, 23;
	mov.b32 	%f1264, %r1412;
	ex2.approx.ftz.f32 	%f1265, %f1262;
	mul.f32 	%f205, %f1265, %f1264;
	setp.eq.f32 	%p125, %f205, 0f7F800000;
	mov.f32 	%f2106, 0f7F800000;
	@%p125 bra 	$L__BB0_69;

	fma.rn.f32 	%f2106, %f205, %f204, %f205;

$L__BB0_69:
	setp.lt.f32 	%p126, %f2100, 0f00000000;
	setp.eq.f32 	%p127, %f202, 0f3F800000;
	and.pred  	%p2, %p126, %p127;
	setp.eq.f32 	%p128, %f2100, 0f00000000;
	@%p128 bra 	$L__BB0_73;
	bra.uni 	$L__BB0_70;

$L__BB0_73:
	add.f32 	%f1270, %f2100, %f2100;
	selp.f32 	%f2108, %f1270, 0f00000000, %p127;
	bra.uni 	$L__BB0_74;

$L__BB0_182:
	mov.f32 	%f2014, 0f00000000;
	mov.u32 	%r1550, 0;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs145, %f2014;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs144, %f2014;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs143, %f2014;}

	// end inline asm
	mov.u16 	%rs146, 0;
	st.global.v4.u16 	[%rd24], {%rs143, %rs144, %rs145, %rs146};

$L__BB0_183:
	ld.const.u64 	%rd117, [params+256];
	cvta.to.global.u64 	%rd118, %rd117;
	ld.const.u32 	%r1533, [params+248];
	mad.lo.s32 	%r1534, %r1533, %r6, %r5;
	mul.wide.u32 	%rd119, %r1534, 8;
	add.s64 	%rd25, %rd118, %rd119;
	setp.eq.s32 	%p253, %r1550, 0;
	@%p253 bra 	$L__BB0_185;

	ld.global.v4.u16 	{%rs153, %rs154, %rs155, %rs156}, [%rd25];
	// begin inline asm
	{  cvt.f32.f16 %f2015, %rs153;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2016, %rs154;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2017, %rs155;}

	// end inline asm
	add.f32 	%f2018, %f2015, 0f00000000;
	add.f32 	%f2019, %f2016, 0f00000000;
	add.f32 	%f2020, %f2017, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs152, %f2020;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs151, %f2019;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs150, %f2018;}

	// end inline asm
	mov.u16 	%rs157, 0;
	st.global.v4.u16 	[%rd25], {%rs150, %rs151, %rs152, %rs157};
	bra.uni 	$L__BB0_186;

$L__BB0_185:
	mov.f32 	%f2023, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs160, %f2023;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs159, %f2023;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs158, %f2023;}

	// end inline asm
	mov.u16 	%rs161, 0;
	st.global.v4.u16 	[%rd25], {%rs158, %rs159, %rs160, %rs161};

$L__BB0_186:
	ld.const.u64 	%rd120, [params+272];
	cvta.to.global.u64 	%rd121, %rd120;
	ld.const.u32 	%r1535, [params+264];
	mad.lo.s32 	%r1536, %r1535, %r6, %r5;
	mul.wide.u32 	%rd122, %r1536, 8;
	add.s64 	%rd26, %rd121, %rd122;
	@%p253 bra 	$L__BB0_188;

	ld.global.v4.u16 	{%rs168, %rs169, %rs170, %rs171}, [%rd26];
	// begin inline asm
	{  cvt.f32.f16 %f2024, %rs168;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2025, %rs169;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2026, %rs170;}

	// end inline asm
	add.f32 	%f2027, %f2024, 0f00000000;
	add.f32 	%f2028, %f2025, 0f00000000;
	add.f32 	%f2029, %f2026, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs167, %f2029;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs166, %f2028;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs165, %f2027;}

	// end inline asm
	mov.u16 	%rs172, 0;
	st.global.v4.u16 	[%rd26], {%rs165, %rs166, %rs167, %rs172};
	bra.uni 	$L__BB0_189;

$L__BB0_188:
	mov.f32 	%f2032, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs175, %f2032;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs174, %f2032;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs173, %f2032;}

	// end inline asm
	mov.u16 	%rs176, 0;
	st.global.v4.u16 	[%rd26], {%rs173, %rs174, %rs175, %rs176};

$L__BB0_189:
	ld.const.u64 	%rd123, [params+288];
	cvta.to.global.u64 	%rd124, %rd123;
	ld.const.u32 	%r1537, [params+280];
	mad.lo.s32 	%r1538, %r1537, %r6, %r5;
	mul.wide.u32 	%rd125, %r1538, 8;
	add.s64 	%rd27, %rd124, %rd125;
	@%p253 bra 	$L__BB0_191;

	ld.global.v4.u16 	{%rs183, %rs184, %rs185, %rs186}, [%rd27];
	// begin inline asm
	{  cvt.f32.f16 %f2033, %rs183;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2034, %rs184;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f2035, %rs185;}

	// end inline asm
	add.f32 	%f2036, %f2033, 0f00000000;
	add.f32 	%f2037, %f2034, 0f00000000;
	add.f32 	%f2038, %f2035, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs182, %f2038;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs181, %f2037;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs180, %f2036;}

	// end inline asm
	mov.u16 	%rs187, 0;
	st.global.v4.u16 	[%rd27], {%rs180, %rs181, %rs182, %rs187};
	bra.uni 	$L__BB0_192;

$L__BB0_191:
	mov.f32 	%f2041, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs190, %f2041;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs189, %f2041;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs188, %f2041;}

	// end inline asm
	mov.u16 	%rs191, 0;
	st.global.v4.u16 	[%rd27], {%rs188, %rs189, %rs190, %rs191};
	bra.uni 	$L__BB0_192;

$L__BB0_70:
	mov.b32 	%r1413, %f2106;
	xor.b32  	%r1414, %r1413, -2147483648;
	mov.b32 	%f1266, %r1414;
	selp.f32 	%f2108, %f1266, %f2106, %p2;
	setp.geu.f32 	%p129, %f2100, 0f00000000;
	@%p129 bra 	$L__BB0_74;

	mov.f32 	%f1267, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f1268, %f1267;
	setp.eq.f32 	%p130, %f1268, 0f3EE8BA2E;
	@%p130 bra 	$L__BB0_74;

	mov.f32 	%f2108, 0f7FFFFFFF;

$L__BB0_74:
	add.f32 	%f1271, %f203, 0f3EE8BA2E;
	mov.b32 	%r1415, %f1271;
	setp.lt.s32 	%p132, %r1415, 2139095040;
	@%p132 bra 	$L__BB0_79;

	setp.gtu.f32 	%p133, %f203, 0f7F800000;
	@%p133 bra 	$L__BB0_78;
	bra.uni 	$L__BB0_76;

$L__BB0_78:
	add.f32 	%f2108, %f2100, 0f3EE8BA2E;
	bra.uni 	$L__BB0_79;

$L__BB0_76:
	setp.neu.f32 	%p134, %f203, 0f7F800000;
	@%p134 bra 	$L__BB0_79;

	selp.f32 	%f2108, 0fFF800000, 0f7F800000, %p2;

$L__BB0_79:
	mul.f32 	%f1272, %f2108, 0f437F0000;
	setp.eq.f32 	%p135, %f2100, 0f3F800000;
	selp.f32 	%f1273, 0f437F0000, %f1272, %p135;
	cvt.rzi.u32.f32 	%r1416, %f1273;
	shl.b64 	%rd86, %rd16, 1;
	add.s64 	%rd87, %rd15, %rd86;
	cvt.u16.u32 	%rs43, %r1416;
	mov.u16 	%rs44, 255;
	st.global.v2.u8 	[%rd87], {%rs43, %rs44};

$L__BB0_80:
	and.b32  	%r1417, %r58, 1;
	setp.eq.b32 	%p136, %r1417, 1;
	mov.pred 	%p137, 0;
	xor.pred  	%p138, %p136, %p137;
	not.pred 	%p139, %p138;
	@%p139 bra 	$L__BB0_154;

	mov.f32 	%f1275, 0f3E666666;
	cvt.rzi.f32.f32 	%f1276, %f1275;
	add.f32 	%f1277, %f1276, %f1276;
	mov.f32 	%f1278, 0f3EE66666;
	sub.f32 	%f1279, %f1278, %f1277;
	abs.f32 	%f214, %f1279;
	abs.f32 	%f215, %f183;
	setp.lt.f32 	%p140, %f215, 0f00800000;
	mul.f32 	%f1280, %f215, 0f4B800000;
	selp.f32 	%f1281, %f1280, %f215, %p140;
	selp.f32 	%f1282, 0fC3170000, 0fC2FE0000, %p140;
	mov.b32 	%r1418, %f1281;
	and.b32  	%r1419, %r1418, 8388607;
	or.b32  	%r1420, %r1419, 1065353216;
	mov.b32 	%f1283, %r1420;
	shr.u32 	%r1421, %r1418, 23;
	cvt.rn.f32.u32 	%f1284, %r1421;
	add.f32 	%f1285, %f1282, %f1284;
	setp.gt.f32 	%p141, %f1283, 0f3FB504F3;
	mul.f32 	%f1286, %f1283, 0f3F000000;
	add.f32 	%f1287, %f1285, 0f3F800000;
	selp.f32 	%f1288, %f1287, %f1285, %p141;
	selp.f32 	%f1289, %f1286, %f1283, %p141;
	add.f32 	%f1290, %f1289, 0fBF800000;
	add.f32 	%f1291, %f1289, 0f3F800000;
	rcp.approx.ftz.f32 	%f1292, %f1291;
	add.f32 	%f1293, %f1290, %f1290;
	mul.f32 	%f1294, %f1293, %f1292;
	mul.f32 	%f1295, %f1294, %f1294;
	mov.f32 	%f1296, 0f3C4CAF63;
	mov.f32 	%f1297, 0f3B18F0FE;
	fma.rn.f32 	%f1298, %f1297, %f1295, %f1296;
	mov.f32 	%f1299, 0f3DAAAABD;
	fma.rn.f32 	%f1300, %f1298, %f1295, %f1299;
	mul.rn.f32 	%f1301, %f1300, %f1295;
	mul.rn.f32 	%f1302, %f1301, %f1294;
	sub.f32 	%f1303, %f1290, %f1294;
	add.f32 	%f1304, %f1303, %f1303;
	neg.f32 	%f1305, %f1294;
	fma.rn.f32 	%f1306, %f1305, %f1290, %f1304;
	mul.rn.f32 	%f1307, %f1292, %f1306;
	add.f32 	%f1308, %f1302, %f1294;
	sub.f32 	%f1309, %f1294, %f1308;
	add.f32 	%f1310, %f1302, %f1309;
	add.f32 	%f1311, %f1307, %f1310;
	add.f32 	%f1312, %f1308, %f1311;
	sub.f32 	%f1313, %f1308, %f1312;
	add.f32 	%f1314, %f1311, %f1313;
	mov.f32 	%f1315, 0f3F317200;
	mul.rn.f32 	%f1316, %f1288, %f1315;
	mov.f32 	%f1317, 0f35BFBE8E;
	mul.rn.f32 	%f1318, %f1288, %f1317;
	add.f32 	%f1319, %f1316, %f1312;
	sub.f32 	%f1320, %f1316, %f1319;
	add.f32 	%f1321, %f1312, %f1320;
	add.f32 	%f1322, %f1314, %f1321;
	add.f32 	%f1323, %f1318, %f1322;
	add.f32 	%f1324, %f1319, %f1323;
	sub.f32 	%f1325, %f1319, %f1324;
	add.f32 	%f1326, %f1323, %f1325;
	mul.rn.f32 	%f1327, %f1278, %f1324;
	neg.f32 	%f1328, %f1327;
	fma.rn.f32 	%f1329, %f1278, %f1324, %f1328;
	fma.rn.f32 	%f1330, %f1278, %f1326, %f1329;
	mov.f32 	%f1331, 0f00000000;
	fma.rn.f32 	%f1332, %f1331, %f1324, %f1330;
	add.rn.f32 	%f1333, %f1327, %f1332;
	neg.f32 	%f1334, %f1333;
	add.rn.f32 	%f1335, %f1327, %f1334;
	add.rn.f32 	%f1336, %f1335, %f1332;
	mov.b32 	%r1422, %f1333;
	setp.eq.s32 	%p142, %r1422, 1118925336;
	add.s32 	%r1423, %r1422, -1;
	mov.b32 	%f1337, %r1423;
	add.f32 	%f1338, %f1336, 0f37000000;
	selp.f32 	%f216, %f1338, %f1336, %p142;
	selp.f32 	%f1339, %f1337, %f1333, %p142;
	mov.f32 	%f1340, 0f3FB8AA3B;
	mul.rn.f32 	%f1341, %f1339, %f1340;
	cvt.rzi.f32.f32 	%f1342, %f1341;
	abs.f32 	%f1343, %f1342;
	setp.gt.f32 	%p143, %f1343, 0f42FC0000;
	mov.b32 	%r1424, %f1342;
	and.b32  	%r1425, %r1424, -2147483648;
	or.b32  	%r1426, %r1425, 1123811328;
	mov.b32 	%f1344, %r1426;
	selp.f32 	%f1345, %f1344, %f1342, %p143;
	mov.f32 	%f1346, 0fBF317218;
	fma.rn.f32 	%f1347, %f1345, %f1346, %f1339;
	mov.f32 	%f1348, 0f3102E308;
	fma.rn.f32 	%f1349, %f1345, %f1348, %f1347;
	mul.f32 	%f1350, %f1349, 0f3FB8AA3B;
	add.f32 	%f1351, %f1345, 0f4B40007F;
	mov.b32 	%r1427, %f1351;
	shl.b32 	%r1428, %r1427, 23;
	mov.b32 	%f1352, %r1428;
	ex2.approx.ftz.f32 	%f1353, %f1350;
	mul.f32 	%f217, %f1353, %f1352;
	setp.eq.f32 	%p144, %f217, 0f7F800000;
	mov.f32 	%f2109, 0f7F800000;
	@%p144 bra 	$L__BB0_83;

	fma.rn.f32 	%f2109, %f217, %f216, %f217;

$L__BB0_83:
	setp.lt.f32 	%p145, %f183, 0f00000000;
	setp.eq.f32 	%p146, %f214, 0f3F800000;
	and.pred  	%p3, %p145, %p146;
	setp.eq.f32 	%p147, %f183, 0f00000000;
	@%p147 bra 	$L__BB0_87;
	bra.uni 	$L__BB0_84;

$L__BB0_87:
	add.f32 	%f1358, %f183, %f183;
	selp.f32 	%f2111, %f1358, 0f00000000, %p146;
	bra.uni 	$L__BB0_88;

$L__BB0_84:
	mov.b32 	%r1429, %f2109;
	xor.b32  	%r1430, %r1429, -2147483648;
	mov.b32 	%f1354, %r1430;
	selp.f32 	%f2111, %f1354, %f2109, %p3;
	setp.geu.f32 	%p148, %f183, 0f00000000;
	@%p148 bra 	$L__BB0_88;

	mov.f32 	%f1355, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1356, %f1355;
	setp.eq.f32 	%p149, %f1356, 0f3EE66666;
	@%p149 bra 	$L__BB0_88;

	mov.f32 	%f2111, 0f7FFFFFFF;

$L__BB0_88:
	add.f32 	%f1359, %f215, 0f3EE66666;
	mov.b32 	%r1431, %f1359;
	setp.lt.s32 	%p151, %r1431, 2139095040;
	@%p151 bra 	$L__BB0_93;

	setp.gtu.f32 	%p152, %f215, 0f7F800000;
	@%p152 bra 	$L__BB0_92;
	bra.uni 	$L__BB0_90;

$L__BB0_92:
	add.f32 	%f2111, %f183, 0f3EE66666;
	bra.uni 	$L__BB0_93;

$L__BB0_90:
	setp.neu.f32 	%p153, %f215, 0f7F800000;
	@%p153 bra 	$L__BB0_93;

	selp.f32 	%f2111, 0fFF800000, 0f7F800000, %p3;

$L__BB0_93:
	setp.eq.f32 	%p154, %f183, 0f3F800000;
	selp.f32 	%f226, 0f3F800000, %f2111, %p154;
	abs.f32 	%f227, %f184;
	setp.lt.f32 	%p155, %f227, 0f00800000;
	mul.f32 	%f1361, %f227, 0f4B800000;
	selp.f32 	%f1362, %f1361, %f227, %p155;
	selp.f32 	%f1363, 0fC3170000, 0fC2FE0000, %p155;
	mov.b32 	%r1432, %f1362;
	and.b32  	%r1433, %r1432, 8388607;
	or.b32  	%r1434, %r1433, 1065353216;
	mov.b32 	%f1364, %r1434;
	shr.u32 	%r1435, %r1432, 23;
	cvt.rn.f32.u32 	%f1365, %r1435;
	add.f32 	%f1366, %f1363, %f1365;
	setp.gt.f32 	%p156, %f1364, 0f3FB504F3;
	mul.f32 	%f1367, %f1364, 0f3F000000;
	add.f32 	%f1368, %f1366, 0f3F800000;
	selp.f32 	%f1369, %f1368, %f1366, %p156;
	selp.f32 	%f1370, %f1367, %f1364, %p156;
	add.f32 	%f1371, %f1370, 0fBF800000;
	add.f32 	%f1372, %f1370, 0f3F800000;
	rcp.approx.ftz.f32 	%f1373, %f1372;
	add.f32 	%f1374, %f1371, %f1371;
	mul.f32 	%f1375, %f1374, %f1373;
	mul.f32 	%f1376, %f1375, %f1375;
	mov.f32 	%f1377, 0f3C4CAF63;
	mov.f32 	%f1378, 0f3B18F0FE;
	fma.rn.f32 	%f1379, %f1378, %f1376, %f1377;
	mov.f32 	%f1380, 0f3DAAAABD;
	fma.rn.f32 	%f1381, %f1379, %f1376, %f1380;
	mul.rn.f32 	%f1382, %f1381, %f1376;
	mul.rn.f32 	%f1383, %f1382, %f1375;
	sub.f32 	%f1384, %f1371, %f1375;
	add.f32 	%f1385, %f1384, %f1384;
	neg.f32 	%f1386, %f1375;
	fma.rn.f32 	%f1387, %f1386, %f1371, %f1385;
	mul.rn.f32 	%f1388, %f1373, %f1387;
	add.f32 	%f1389, %f1383, %f1375;
	sub.f32 	%f1390, %f1375, %f1389;
	add.f32 	%f1391, %f1383, %f1390;
	add.f32 	%f1392, %f1388, %f1391;
	add.f32 	%f1393, %f1389, %f1392;
	sub.f32 	%f1394, %f1389, %f1393;
	add.f32 	%f1395, %f1392, %f1394;
	mov.f32 	%f1396, 0f3F317200;
	mul.rn.f32 	%f1397, %f1369, %f1396;
	mov.f32 	%f1398, 0f35BFBE8E;
	mul.rn.f32 	%f1399, %f1369, %f1398;
	add.f32 	%f1400, %f1397, %f1393;
	sub.f32 	%f1401, %f1397, %f1400;
	add.f32 	%f1402, %f1393, %f1401;
	add.f32 	%f1403, %f1395, %f1402;
	add.f32 	%f1404, %f1399, %f1403;
	add.f32 	%f1405, %f1400, %f1404;
	sub.f32 	%f1406, %f1400, %f1405;
	add.f32 	%f1407, %f1404, %f1406;
	mov.f32 	%f1408, 0f3EE66666;
	mul.rn.f32 	%f1409, %f1408, %f1405;
	neg.f32 	%f1410, %f1409;
	fma.rn.f32 	%f1411, %f1408, %f1405, %f1410;
	fma.rn.f32 	%f1412, %f1408, %f1407, %f1411;
	mov.f32 	%f1413, 0f00000000;
	fma.rn.f32 	%f1414, %f1413, %f1405, %f1412;
	add.rn.f32 	%f1415, %f1409, %f1414;
	neg.f32 	%f1416, %f1415;
	add.rn.f32 	%f1417, %f1409, %f1416;
	add.rn.f32 	%f1418, %f1417, %f1414;
	mov.b32 	%r1436, %f1415;
	setp.eq.s32 	%p157, %r1436, 1118925336;
	add.s32 	%r1437, %r1436, -1;
	mov.b32 	%f1419, %r1437;
	add.f32 	%f1420, %f1418, 0f37000000;
	selp.f32 	%f228, %f1420, %f1418, %p157;
	selp.f32 	%f1421, %f1419, %f1415, %p157;
	mov.f32 	%f1422, 0f3FB8AA3B;
	mul.rn.f32 	%f1423, %f1421, %f1422;
	cvt.rzi.f32.f32 	%f1424, %f1423;
	abs.f32 	%f1425, %f1424;
	setp.gt.f32 	%p158, %f1425, 0f42FC0000;
	mov.b32 	%r1438, %f1424;
	and.b32  	%r1439, %r1438, -2147483648;
	or.b32  	%r1440, %r1439, 1123811328;
	mov.b32 	%f1426, %r1440;
	selp.f32 	%f1427, %f1426, %f1424, %p158;
	mov.f32 	%f1428, 0fBF317218;
	fma.rn.f32 	%f1429, %f1427, %f1428, %f1421;
	mov.f32 	%f1430, 0f3102E308;
	fma.rn.f32 	%f1431, %f1427, %f1430, %f1429;
	mul.f32 	%f1432, %f1431, 0f3FB8AA3B;
	add.f32 	%f1433, %f1427, 0f4B40007F;
	mov.b32 	%r1441, %f1433;
	shl.b32 	%r1442, %r1441, 23;
	mov.b32 	%f1434, %r1442;
	ex2.approx.ftz.f32 	%f1435, %f1432;
	mul.f32 	%f229, %f1435, %f1434;
	setp.eq.f32 	%p159, %f229, 0f7F800000;
	mov.f32 	%f2112, 0f7F800000;
	@%p159 bra 	$L__BB0_95;

	fma.rn.f32 	%f2112, %f229, %f228, %f229;

$L__BB0_95:
	setp.lt.f32 	%p160, %f184, 0f00000000;
	and.pred  	%p4, %p160, %p146;
	setp.eq.f32 	%p162, %f184, 0f00000000;
	@%p162 bra 	$L__BB0_99;
	bra.uni 	$L__BB0_96;

$L__BB0_99:
	add.f32 	%f1440, %f184, %f184;
	selp.f32 	%f2114, %f1440, 0f00000000, %p146;
	bra.uni 	$L__BB0_100;

$L__BB0_96:
	mov.b32 	%r1443, %f2112;
	xor.b32  	%r1444, %r1443, -2147483648;
	mov.b32 	%f1436, %r1444;
	selp.f32 	%f2114, %f1436, %f2112, %p4;
	setp.geu.f32 	%p163, %f184, 0f00000000;
	@%p163 bra 	$L__BB0_100;

	mov.f32 	%f1437, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1438, %f1437;
	setp.eq.f32 	%p164, %f1438, 0f3EE66666;
	@%p164 bra 	$L__BB0_100;

	mov.f32 	%f2114, 0f7FFFFFFF;

$L__BB0_100:
	add.f32 	%f1441, %f227, 0f3EE66666;
	mov.b32 	%r1445, %f1441;
	setp.lt.s32 	%p166, %r1445, 2139095040;
	@%p166 bra 	$L__BB0_105;

	setp.gtu.f32 	%p167, %f227, 0f7F800000;
	@%p167 bra 	$L__BB0_104;
	bra.uni 	$L__BB0_102;

$L__BB0_104:
	add.f32 	%f2114, %f184, 0f3EE66666;
	bra.uni 	$L__BB0_105;

$L__BB0_102:
	setp.neu.f32 	%p168, %f227, 0f7F800000;
	@%p168 bra 	$L__BB0_105;

	selp.f32 	%f2114, 0fFF800000, 0f7F800000, %p4;

$L__BB0_105:
	setp.eq.f32 	%p169, %f184, 0f3F800000;
	selp.f32 	%f238, 0f3F800000, %f2114, %p169;
	abs.f32 	%f239, %f185;
	setp.lt.f32 	%p170, %f239, 0f00800000;
	mul.f32 	%f1443, %f239, 0f4B800000;
	selp.f32 	%f1444, %f1443, %f239, %p170;
	selp.f32 	%f1445, 0fC3170000, 0fC2FE0000, %p170;
	mov.b32 	%r1446, %f1444;
	and.b32  	%r1447, %r1446, 8388607;
	or.b32  	%r1448, %r1447, 1065353216;
	mov.b32 	%f1446, %r1448;
	shr.u32 	%r1449, %r1446, 23;
	cvt.rn.f32.u32 	%f1447, %r1449;
	add.f32 	%f1448, %f1445, %f1447;
	setp.gt.f32 	%p171, %f1446, 0f3FB504F3;
	mul.f32 	%f1449, %f1446, 0f3F000000;
	add.f32 	%f1450, %f1448, 0f3F800000;
	selp.f32 	%f1451, %f1450, %f1448, %p171;
	selp.f32 	%f1452, %f1449, %f1446, %p171;
	add.f32 	%f1453, %f1452, 0fBF800000;
	add.f32 	%f1454, %f1452, 0f3F800000;
	rcp.approx.ftz.f32 	%f1455, %f1454;
	add.f32 	%f1456, %f1453, %f1453;
	mul.f32 	%f1457, %f1456, %f1455;
	mul.f32 	%f1458, %f1457, %f1457;
	mov.f32 	%f1459, 0f3C4CAF63;
	mov.f32 	%f1460, 0f3B18F0FE;
	fma.rn.f32 	%f1461, %f1460, %f1458, %f1459;
	mov.f32 	%f1462, 0f3DAAAABD;
	fma.rn.f32 	%f1463, %f1461, %f1458, %f1462;
	mul.rn.f32 	%f1464, %f1463, %f1458;
	mul.rn.f32 	%f1465, %f1464, %f1457;
	sub.f32 	%f1466, %f1453, %f1457;
	add.f32 	%f1467, %f1466, %f1466;
	neg.f32 	%f1468, %f1457;
	fma.rn.f32 	%f1469, %f1468, %f1453, %f1467;
	mul.rn.f32 	%f1470, %f1455, %f1469;
	add.f32 	%f1471, %f1465, %f1457;
	sub.f32 	%f1472, %f1457, %f1471;
	add.f32 	%f1473, %f1465, %f1472;
	add.f32 	%f1474, %f1470, %f1473;
	add.f32 	%f1475, %f1471, %f1474;
	sub.f32 	%f1476, %f1471, %f1475;
	add.f32 	%f1477, %f1474, %f1476;
	mov.f32 	%f1478, 0f3F317200;
	mul.rn.f32 	%f1479, %f1451, %f1478;
	mov.f32 	%f1480, 0f35BFBE8E;
	mul.rn.f32 	%f1481, %f1451, %f1480;
	add.f32 	%f1482, %f1479, %f1475;
	sub.f32 	%f1483, %f1479, %f1482;
	add.f32 	%f1484, %f1475, %f1483;
	add.f32 	%f1485, %f1477, %f1484;
	add.f32 	%f1486, %f1481, %f1485;
	add.f32 	%f1487, %f1482, %f1486;
	sub.f32 	%f1488, %f1482, %f1487;
	add.f32 	%f1489, %f1486, %f1488;
	mov.f32 	%f1490, 0f3EE66666;
	mul.rn.f32 	%f1491, %f1490, %f1487;
	neg.f32 	%f1492, %f1491;
	fma.rn.f32 	%f1493, %f1490, %f1487, %f1492;
	fma.rn.f32 	%f1494, %f1490, %f1489, %f1493;
	mov.f32 	%f1495, 0f00000000;
	fma.rn.f32 	%f1496, %f1495, %f1487, %f1494;
	add.rn.f32 	%f1497, %f1491, %f1496;
	neg.f32 	%f1498, %f1497;
	add.rn.f32 	%f1499, %f1491, %f1498;
	add.rn.f32 	%f1500, %f1499, %f1496;
	mov.b32 	%r1450, %f1497;
	setp.eq.s32 	%p172, %r1450, 1118925336;
	add.s32 	%r1451, %r1450, -1;
	mov.b32 	%f1501, %r1451;
	add.f32 	%f1502, %f1500, 0f37000000;
	selp.f32 	%f240, %f1502, %f1500, %p172;
	selp.f32 	%f1503, %f1501, %f1497, %p172;
	mov.f32 	%f1504, 0f3FB8AA3B;
	mul.rn.f32 	%f1505, %f1503, %f1504;
	cvt.rzi.f32.f32 	%f1506, %f1505;
	abs.f32 	%f1507, %f1506;
	setp.gt.f32 	%p173, %f1507, 0f42FC0000;
	mov.b32 	%r1452, %f1506;
	and.b32  	%r1453, %r1452, -2147483648;
	or.b32  	%r1454, %r1453, 1123811328;
	mov.b32 	%f1508, %r1454;
	selp.f32 	%f1509, %f1508, %f1506, %p173;
	mov.f32 	%f1510, 0fBF317218;
	fma.rn.f32 	%f1511, %f1509, %f1510, %f1503;
	mov.f32 	%f1512, 0f3102E308;
	fma.rn.f32 	%f1513, %f1509, %f1512, %f1511;
	mul.f32 	%f1514, %f1513, 0f3FB8AA3B;
	add.f32 	%f1515, %f1509, 0f4B40007F;
	mov.b32 	%r1455, %f1515;
	shl.b32 	%r1456, %r1455, 23;
	mov.b32 	%f1516, %r1456;
	ex2.approx.ftz.f32 	%f1517, %f1514;
	mul.f32 	%f241, %f1517, %f1516;
	setp.eq.f32 	%p174, %f241, 0f7F800000;
	mov.f32 	%f2115, 0f7F800000;
	@%p174 bra 	$L__BB0_107;

	fma.rn.f32 	%f2115, %f241, %f240, %f241;

$L__BB0_107:
	setp.lt.f32 	%p175, %f185, 0f00000000;
	and.pred  	%p5, %p175, %p146;
	setp.eq.f32 	%p177, %f185, 0f00000000;
	@%p177 bra 	$L__BB0_111;
	bra.uni 	$L__BB0_108;

$L__BB0_111:
	add.f32 	%f1522, %f185, %f185;
	selp.f32 	%f2117, %f1522, 0f00000000, %p146;
	bra.uni 	$L__BB0_112;

$L__BB0_108:
	mov.b32 	%r1457, %f2115;
	xor.b32  	%r1458, %r1457, -2147483648;
	mov.b32 	%f1518, %r1458;
	selp.f32 	%f2117, %f1518, %f2115, %p5;
	setp.geu.f32 	%p178, %f185, 0f00000000;
	@%p178 bra 	$L__BB0_112;

	mov.f32 	%f1519, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1520, %f1519;
	setp.eq.f32 	%p179, %f1520, 0f3EE66666;
	@%p179 bra 	$L__BB0_112;

	mov.f32 	%f2117, 0f7FFFFFFF;

$L__BB0_112:
	add.f32 	%f1523, %f239, 0f3EE66666;
	mov.b32 	%r1459, %f1523;
	setp.lt.s32 	%p181, %r1459, 2139095040;
	@%p181 bra 	$L__BB0_117;

	setp.gtu.f32 	%p182, %f239, 0f7F800000;
	@%p182 bra 	$L__BB0_116;
	bra.uni 	$L__BB0_114;

$L__BB0_116:
	add.f32 	%f2117, %f185, 0f3EE66666;
	bra.uni 	$L__BB0_117;

$L__BB0_114:
	setp.neu.f32 	%p183, %f239, 0f7F800000;
	@%p183 bra 	$L__BB0_117;

	selp.f32 	%f2117, 0fFF800000, 0f7F800000, %p5;

$L__BB0_117:
	setp.eq.f32 	%p184, %f185, 0f3F800000;
	mov.f32 	%f1525, 0f3F800000;
	selp.f32 	%f1526, 0f3F800000, %f2117, %p184;
	ld.const.u64 	%rd88, [params+144];
	cvta.to.global.u64 	%rd17, %rd88;
	ld.const.u32 	%r1460, [params+136];
	mad.lo.s32 	%r1461, %r1460, %r6, %r5;
	cvt.u64.u32 	%rd18, %r1461;
	min.f32 	%f1527, %f226, %f1525;
	mov.f32 	%f1528, 0f00000000;
	max.f32 	%f250, %f1528, %f1527;
	min.f32 	%f1529, %f238, %f1525;
	max.f32 	%f251, %f1528, %f1529;
	min.f32 	%f1530, %f1526, %f1525;
	max.f32 	%f252, %f1528, %f1530;
	mov.f32 	%f1531, 0f3E555555;
	cvt.rzi.f32.f32 	%f1532, %f1531;
	add.f32 	%f1533, %f1532, %f1532;
	mov.f32 	%f1534, 0f3ED55555;
	sub.f32 	%f1535, %f1534, %f1533;
	abs.f32 	%f253, %f1535;
	abs.f32 	%f254, %f250;
	setp.lt.f32 	%p185, %f254, 0f00800000;
	mul.f32 	%f1536, %f254, 0f4B800000;
	selp.f32 	%f1537, %f1536, %f254, %p185;
	selp.f32 	%f1538, 0fC3170000, 0fC2FE0000, %p185;
	mov.b32 	%r1462, %f1537;
	and.b32  	%r1463, %r1462, 8388607;
	or.b32  	%r1464, %r1463, 1065353216;
	mov.b32 	%f1539, %r1464;
	shr.u32 	%r1465, %r1462, 23;
	cvt.rn.f32.u32 	%f1540, %r1465;
	add.f32 	%f1541, %f1538, %f1540;
	setp.gt.f32 	%p186, %f1539, 0f3FB504F3;
	mul.f32 	%f1542, %f1539, 0f3F000000;
	add.f32 	%f1543, %f1541, 0f3F800000;
	selp.f32 	%f1544, %f1543, %f1541, %p186;
	selp.f32 	%f1545, %f1542, %f1539, %p186;
	add.f32 	%f1546, %f1545, 0fBF800000;
	add.f32 	%f1547, %f1545, 0f3F800000;
	rcp.approx.ftz.f32 	%f1548, %f1547;
	add.f32 	%f1549, %f1546, %f1546;
	mul.f32 	%f1550, %f1549, %f1548;
	mul.f32 	%f1551, %f1550, %f1550;
	mov.f32 	%f1552, 0f3C4CAF63;
	mov.f32 	%f1553, 0f3B18F0FE;
	fma.rn.f32 	%f1554, %f1553, %f1551, %f1552;
	mov.f32 	%f1555, 0f3DAAAABD;
	fma.rn.f32 	%f1556, %f1554, %f1551, %f1555;
	mul.rn.f32 	%f1557, %f1556, %f1551;
	mul.rn.f32 	%f1558, %f1557, %f1550;
	sub.f32 	%f1559, %f1546, %f1550;
	add.f32 	%f1560, %f1559, %f1559;
	neg.f32 	%f1561, %f1550;
	fma.rn.f32 	%f1562, %f1561, %f1546, %f1560;
	mul.rn.f32 	%f1563, %f1548, %f1562;
	add.f32 	%f1564, %f1558, %f1550;
	sub.f32 	%f1565, %f1550, %f1564;
	add.f32 	%f1566, %f1558, %f1565;
	add.f32 	%f1567, %f1563, %f1566;
	add.f32 	%f1568, %f1564, %f1567;
	sub.f32 	%f1569, %f1564, %f1568;
	add.f32 	%f1570, %f1567, %f1569;
	mov.f32 	%f1571, 0f3F317200;
	mul.rn.f32 	%f1572, %f1544, %f1571;
	mov.f32 	%f1573, 0f35BFBE8E;
	mul.rn.f32 	%f1574, %f1544, %f1573;
	add.f32 	%f1575, %f1572, %f1568;
	sub.f32 	%f1576, %f1572, %f1575;
	add.f32 	%f1577, %f1568, %f1576;
	add.f32 	%f1578, %f1570, %f1577;
	add.f32 	%f1579, %f1574, %f1578;
	add.f32 	%f1580, %f1575, %f1579;
	sub.f32 	%f1581, %f1575, %f1580;
	add.f32 	%f1582, %f1579, %f1581;
	mul.rn.f32 	%f1583, %f1534, %f1580;
	neg.f32 	%f1584, %f1583;
	fma.rn.f32 	%f1585, %f1534, %f1580, %f1584;
	fma.rn.f32 	%f1586, %f1534, %f1582, %f1585;
	fma.rn.f32 	%f1587, %f1528, %f1580, %f1586;
	add.rn.f32 	%f1588, %f1583, %f1587;
	neg.f32 	%f1589, %f1588;
	add.rn.f32 	%f1590, %f1583, %f1589;
	add.rn.f32 	%f1591, %f1590, %f1587;
	mov.b32 	%r1466, %f1588;
	setp.eq.s32 	%p187, %r1466, 1118925336;
	add.s32 	%r1467, %r1466, -1;
	mov.b32 	%f1592, %r1467;
	add.f32 	%f1593, %f1591, 0f37000000;
	selp.f32 	%f255, %f1593, %f1591, %p187;
	selp.f32 	%f1594, %f1592, %f1588, %p187;
	mov.f32 	%f1595, 0f3FB8AA3B;
	mul.rn.f32 	%f1596, %f1594, %f1595;
	cvt.rzi.f32.f32 	%f1597, %f1596;
	abs.f32 	%f1598, %f1597;
	setp.gt.f32 	%p188, %f1598, 0f42FC0000;
	mov.b32 	%r1468, %f1597;
	and.b32  	%r1469, %r1468, -2147483648;
	or.b32  	%r1470, %r1469, 1123811328;
	mov.b32 	%f1599, %r1470;
	selp.f32 	%f1600, %f1599, %f1597, %p188;
	mov.f32 	%f1601, 0fBF317218;
	fma.rn.f32 	%f1602, %f1600, %f1601, %f1594;
	mov.f32 	%f1603, 0f3102E308;
	fma.rn.f32 	%f1604, %f1600, %f1603, %f1602;
	mul.f32 	%f1605, %f1604, 0f3FB8AA3B;
	add.f32 	%f1606, %f1600, 0f4B40007F;
	mov.b32 	%r1471, %f1606;
	shl.b32 	%r1472, %r1471, 23;
	mov.b32 	%f1607, %r1472;
	ex2.approx.ftz.f32 	%f1608, %f1605;
	mul.f32 	%f256, %f1608, %f1607;
	setp.eq.f32 	%p189, %f256, 0f7F800000;
	mov.f32 	%f2118, 0f7F800000;
	@%p189 bra 	$L__BB0_119;

	fma.rn.f32 	%f2118, %f256, %f255, %f256;

$L__BB0_119:
	setp.lt.f32 	%p190, %f250, 0f00000000;
	setp.eq.f32 	%p191, %f253, 0f3F800000;
	and.pred  	%p6, %p190, %p191;
	setp.eq.f32 	%p192, %f250, 0f00000000;
	@%p192 bra 	$L__BB0_123;
	bra.uni 	$L__BB0_120;

$L__BB0_123:
	add.f32 	%f1613, %f250, %f250;
	selp.f32 	%f2120, %f1613, 0f00000000, %p191;
	bra.uni 	$L__BB0_124;

$L__BB0_120:
	mov.b32 	%r1473, %f2118;
	xor.b32  	%r1474, %r1473, -2147483648;
	mov.b32 	%f1609, %r1474;
	selp.f32 	%f2120, %f1609, %f2118, %p6;
	setp.geu.f32 	%p193, %f250, 0f00000000;
	@%p193 bra 	$L__BB0_124;

	mov.f32 	%f1610, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1611, %f1610;
	setp.eq.f32 	%p194, %f1611, 0f3ED55555;
	@%p194 bra 	$L__BB0_124;

	mov.f32 	%f2120, 0f7FFFFFFF;

$L__BB0_124:
	add.f32 	%f1614, %f254, 0f3ED55555;
	mov.b32 	%r1475, %f1614;
	setp.lt.s32 	%p196, %r1475, 2139095040;
	@%p196 bra 	$L__BB0_129;

	setp.gtu.f32 	%p197, %f254, 0f7F800000;
	@%p197 bra 	$L__BB0_128;
	bra.uni 	$L__BB0_126;

$L__BB0_128:
	add.f32 	%f2120, %f250, 0f3ED55555;
	bra.uni 	$L__BB0_129;

$L__BB0_126:
	setp.neu.f32 	%p198, %f254, 0f7F800000;
	@%p198 bra 	$L__BB0_129;

	selp.f32 	%f2120, 0fFF800000, 0f7F800000, %p6;

$L__BB0_129:
	abs.f32 	%f265, %f251;
	setp.lt.f32 	%p199, %f265, 0f00800000;
	mul.f32 	%f1616, %f265, 0f4B800000;
	selp.f32 	%f1617, %f1616, %f265, %p199;
	selp.f32 	%f1618, 0fC3170000, 0fC2FE0000, %p199;
	mov.b32 	%r1476, %f1617;
	and.b32  	%r1477, %r1476, 8388607;
	or.b32  	%r1478, %r1477, 1065353216;
	mov.b32 	%f1619, %r1478;
	shr.u32 	%r1479, %r1476, 23;
	cvt.rn.f32.u32 	%f1620, %r1479;
	add.f32 	%f1621, %f1618, %f1620;
	setp.gt.f32 	%p200, %f1619, 0f3FB504F3;
	mul.f32 	%f1622, %f1619, 0f3F000000;
	add.f32 	%f1623, %f1621, 0f3F800000;
	selp.f32 	%f1624, %f1623, %f1621, %p200;
	selp.f32 	%f1625, %f1622, %f1619, %p200;
	add.f32 	%f1626, %f1625, 0fBF800000;
	add.f32 	%f1627, %f1625, 0f3F800000;
	rcp.approx.ftz.f32 	%f1628, %f1627;
	add.f32 	%f1629, %f1626, %f1626;
	mul.f32 	%f1630, %f1629, %f1628;
	mul.f32 	%f1631, %f1630, %f1630;
	mov.f32 	%f1632, 0f3C4CAF63;
	mov.f32 	%f1633, 0f3B18F0FE;
	fma.rn.f32 	%f1634, %f1633, %f1631, %f1632;
	mov.f32 	%f1635, 0f3DAAAABD;
	fma.rn.f32 	%f1636, %f1634, %f1631, %f1635;
	mul.rn.f32 	%f1637, %f1636, %f1631;
	mul.rn.f32 	%f1638, %f1637, %f1630;
	sub.f32 	%f1639, %f1626, %f1630;
	add.f32 	%f1640, %f1639, %f1639;
	neg.f32 	%f1641, %f1630;
	fma.rn.f32 	%f1642, %f1641, %f1626, %f1640;
	mul.rn.f32 	%f1643, %f1628, %f1642;
	add.f32 	%f1644, %f1638, %f1630;
	sub.f32 	%f1645, %f1630, %f1644;
	add.f32 	%f1646, %f1638, %f1645;
	add.f32 	%f1647, %f1643, %f1646;
	add.f32 	%f1648, %f1644, %f1647;
	sub.f32 	%f1649, %f1644, %f1648;
	add.f32 	%f1650, %f1647, %f1649;
	mov.f32 	%f1651, 0f3F317200;
	mul.rn.f32 	%f1652, %f1624, %f1651;
	mov.f32 	%f1653, 0f35BFBE8E;
	mul.rn.f32 	%f1654, %f1624, %f1653;
	add.f32 	%f1655, %f1652, %f1648;
	sub.f32 	%f1656, %f1652, %f1655;
	add.f32 	%f1657, %f1648, %f1656;
	add.f32 	%f1658, %f1650, %f1657;
	add.f32 	%f1659, %f1654, %f1658;
	add.f32 	%f1660, %f1655, %f1659;
	sub.f32 	%f1661, %f1655, %f1660;
	add.f32 	%f1662, %f1659, %f1661;
	mov.f32 	%f1663, 0f3ED55555;
	mul.rn.f32 	%f1664, %f1663, %f1660;
	neg.f32 	%f1665, %f1664;
	fma.rn.f32 	%f1666, %f1663, %f1660, %f1665;
	fma.rn.f32 	%f1667, %f1663, %f1662, %f1666;
	mov.f32 	%f1668, 0f00000000;
	fma.rn.f32 	%f1669, %f1668, %f1660, %f1667;
	add.rn.f32 	%f1670, %f1664, %f1669;
	neg.f32 	%f1671, %f1670;
	add.rn.f32 	%f1672, %f1664, %f1671;
	add.rn.f32 	%f1673, %f1672, %f1669;
	mov.b32 	%r1480, %f1670;
	setp.eq.s32 	%p201, %r1480, 1118925336;
	add.s32 	%r1481, %r1480, -1;
	mov.b32 	%f1674, %r1481;
	add.f32 	%f1675, %f1673, 0f37000000;
	selp.f32 	%f266, %f1675, %f1673, %p201;
	selp.f32 	%f1676, %f1674, %f1670, %p201;
	mov.f32 	%f1677, 0f3FB8AA3B;
	mul.rn.f32 	%f1678, %f1676, %f1677;
	cvt.rzi.f32.f32 	%f1679, %f1678;
	abs.f32 	%f1680, %f1679;
	setp.gt.f32 	%p202, %f1680, 0f42FC0000;
	mov.b32 	%r1482, %f1679;
	and.b32  	%r1483, %r1482, -2147483648;
	or.b32  	%r1484, %r1483, 1123811328;
	mov.b32 	%f1681, %r1484;
	selp.f32 	%f1682, %f1681, %f1679, %p202;
	mov.f32 	%f1683, 0fBF317218;
	fma.rn.f32 	%f1684, %f1682, %f1683, %f1676;
	mov.f32 	%f1685, 0f3102E308;
	fma.rn.f32 	%f1686, %f1682, %f1685, %f1684;
	mul.f32 	%f1687, %f1686, 0f3FB8AA3B;
	add.f32 	%f1688, %f1682, 0f4B40007F;
	mov.b32 	%r1485, %f1688;
	shl.b32 	%r1486, %r1485, 23;
	mov.b32 	%f1689, %r1486;
	ex2.approx.ftz.f32 	%f1690, %f1687;
	mul.f32 	%f267, %f1690, %f1689;
	setp.eq.f32 	%p203, %f267, 0f7F800000;
	mov.f32 	%f2121, 0f7F800000;
	@%p203 bra 	$L__BB0_131;

	fma.rn.f32 	%f2121, %f267, %f266, %f267;

$L__BB0_131:
	setp.lt.f32 	%p204, %f251, 0f00000000;
	and.pred  	%p7, %p204, %p191;
	setp.eq.f32 	%p206, %f251, 0f00000000;
	@%p206 bra 	$L__BB0_135;
	bra.uni 	$L__BB0_132;

$L__BB0_135:
	add.f32 	%f1695, %f251, %f251;
	selp.f32 	%f2123, %f1695, 0f00000000, %p191;
	bra.uni 	$L__BB0_136;

$L__BB0_132:
	mov.b32 	%r1487, %f2121;
	xor.b32  	%r1488, %r1487, -2147483648;
	mov.b32 	%f1691, %r1488;
	selp.f32 	%f2123, %f1691, %f2121, %p7;
	setp.geu.f32 	%p207, %f251, 0f00000000;
	@%p207 bra 	$L__BB0_136;

	mov.f32 	%f1692, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1693, %f1692;
	setp.eq.f32 	%p208, %f1693, 0f3ED55555;
	@%p208 bra 	$L__BB0_136;

	mov.f32 	%f2123, 0f7FFFFFFF;

$L__BB0_136:
	add.f32 	%f1696, %f265, 0f3ED55555;
	mov.b32 	%r1489, %f1696;
	setp.lt.s32 	%p210, %r1489, 2139095040;
	@%p210 bra 	$L__BB0_141;

	setp.gtu.f32 	%p211, %f265, 0f7F800000;
	@%p211 bra 	$L__BB0_140;
	bra.uni 	$L__BB0_138;

$L__BB0_140:
	add.f32 	%f2123, %f251, 0f3ED55555;
	bra.uni 	$L__BB0_141;

$L__BB0_138:
	setp.neu.f32 	%p212, %f265, 0f7F800000;
	@%p212 bra 	$L__BB0_141;

	selp.f32 	%f2123, 0fFF800000, 0f7F800000, %p7;

$L__BB0_141:
	abs.f32 	%f276, %f252;
	setp.lt.f32 	%p213, %f276, 0f00800000;
	mul.f32 	%f1698, %f276, 0f4B800000;
	selp.f32 	%f1699, %f1698, %f276, %p213;
	selp.f32 	%f1700, 0fC3170000, 0fC2FE0000, %p213;
	mov.b32 	%r1490, %f1699;
	and.b32  	%r1491, %r1490, 8388607;
	or.b32  	%r1492, %r1491, 1065353216;
	mov.b32 	%f1701, %r1492;
	shr.u32 	%r1493, %r1490, 23;
	cvt.rn.f32.u32 	%f1702, %r1493;
	add.f32 	%f1703, %f1700, %f1702;
	setp.gt.f32 	%p214, %f1701, 0f3FB504F3;
	mul.f32 	%f1704, %f1701, 0f3F000000;
	add.f32 	%f1705, %f1703, 0f3F800000;
	selp.f32 	%f1706, %f1705, %f1703, %p214;
	selp.f32 	%f1707, %f1704, %f1701, %p214;
	add.f32 	%f1708, %f1707, 0fBF800000;
	add.f32 	%f1709, %f1707, 0f3F800000;
	rcp.approx.ftz.f32 	%f1710, %f1709;
	add.f32 	%f1711, %f1708, %f1708;
	mul.f32 	%f1712, %f1711, %f1710;
	mul.f32 	%f1713, %f1712, %f1712;
	mov.f32 	%f1714, 0f3C4CAF63;
	mov.f32 	%f1715, 0f3B18F0FE;
	fma.rn.f32 	%f1716, %f1715, %f1713, %f1714;
	mov.f32 	%f1717, 0f3DAAAABD;
	fma.rn.f32 	%f1718, %f1716, %f1713, %f1717;
	mul.rn.f32 	%f1719, %f1718, %f1713;
	mul.rn.f32 	%f1720, %f1719, %f1712;
	sub.f32 	%f1721, %f1708, %f1712;
	add.f32 	%f1722, %f1721, %f1721;
	neg.f32 	%f1723, %f1712;
	fma.rn.f32 	%f1724, %f1723, %f1708, %f1722;
	mul.rn.f32 	%f1725, %f1710, %f1724;
	add.f32 	%f1726, %f1720, %f1712;
	sub.f32 	%f1727, %f1712, %f1726;
	add.f32 	%f1728, %f1720, %f1727;
	add.f32 	%f1729, %f1725, %f1728;
	add.f32 	%f1730, %f1726, %f1729;
	sub.f32 	%f1731, %f1726, %f1730;
	add.f32 	%f1732, %f1729, %f1731;
	mov.f32 	%f1733, 0f3F317200;
	mul.rn.f32 	%f1734, %f1706, %f1733;
	mov.f32 	%f1735, 0f35BFBE8E;
	mul.rn.f32 	%f1736, %f1706, %f1735;
	add.f32 	%f1737, %f1734, %f1730;
	sub.f32 	%f1738, %f1734, %f1737;
	add.f32 	%f1739, %f1730, %f1738;
	add.f32 	%f1740, %f1732, %f1739;
	add.f32 	%f1741, %f1736, %f1740;
	add.f32 	%f1742, %f1737, %f1741;
	sub.f32 	%f1743, %f1737, %f1742;
	add.f32 	%f1744, %f1741, %f1743;
	mov.f32 	%f1745, 0f3ED55555;
	mul.rn.f32 	%f1746, %f1745, %f1742;
	neg.f32 	%f1747, %f1746;
	fma.rn.f32 	%f1748, %f1745, %f1742, %f1747;
	fma.rn.f32 	%f1749, %f1745, %f1744, %f1748;
	mov.f32 	%f1750, 0f00000000;
	fma.rn.f32 	%f1751, %f1750, %f1742, %f1749;
	add.rn.f32 	%f1752, %f1746, %f1751;
	neg.f32 	%f1753, %f1752;
	add.rn.f32 	%f1754, %f1746, %f1753;
	add.rn.f32 	%f1755, %f1754, %f1751;
	mov.b32 	%r1494, %f1752;
	setp.eq.s32 	%p215, %r1494, 1118925336;
	add.s32 	%r1495, %r1494, -1;
	mov.b32 	%f1756, %r1495;
	add.f32 	%f1757, %f1755, 0f37000000;
	selp.f32 	%f277, %f1757, %f1755, %p215;
	selp.f32 	%f1758, %f1756, %f1752, %p215;
	mov.f32 	%f1759, 0f3FB8AA3B;
	mul.rn.f32 	%f1760, %f1758, %f1759;
	cvt.rzi.f32.f32 	%f1761, %f1760;
	abs.f32 	%f1762, %f1761;
	setp.gt.f32 	%p216, %f1762, 0f42FC0000;
	mov.b32 	%r1496, %f1761;
	and.b32  	%r1497, %r1496, -2147483648;
	or.b32  	%r1498, %r1497, 1123811328;
	mov.b32 	%f1763, %r1498;
	selp.f32 	%f1764, %f1763, %f1761, %p216;
	mov.f32 	%f1765, 0fBF317218;
	fma.rn.f32 	%f1766, %f1764, %f1765, %f1758;
	mov.f32 	%f1767, 0f3102E308;
	fma.rn.f32 	%f1768, %f1764, %f1767, %f1766;
	mul.f32 	%f1769, %f1768, 0f3FB8AA3B;
	add.f32 	%f1770, %f1764, 0f4B40007F;
	mov.b32 	%r1499, %f1770;
	shl.b32 	%r1500, %r1499, 23;
	mov.b32 	%f1771, %r1500;
	ex2.approx.ftz.f32 	%f1772, %f1769;
	mul.f32 	%f278, %f1772, %f1771;
	setp.eq.f32 	%p217, %f278, 0f7F800000;
	mov.f32 	%f2124, 0f7F800000;
	@%p217 bra 	$L__BB0_143;

	fma.rn.f32 	%f2124, %f278, %f277, %f278;

$L__BB0_143:
	setp.lt.f32 	%p218, %f252, 0f00000000;
	and.pred  	%p8, %p218, %p191;
	setp.eq.f32 	%p220, %f252, 0f00000000;
	@%p220 bra 	$L__BB0_147;
	bra.uni 	$L__BB0_144;

$L__BB0_147:
	add.f32 	%f1777, %f252, %f252;
	selp.f32 	%f2126, %f1777, 0f00000000, %p191;
	bra.uni 	$L__BB0_148;

$L__BB0_144:
	mov.b32 	%r1501, %f2124;
	xor.b32  	%r1502, %r1501, -2147483648;
	mov.b32 	%f1773, %r1502;
	selp.f32 	%f2126, %f1773, %f2124, %p8;
	setp.geu.f32 	%p221, %f252, 0f00000000;
	@%p221 bra 	$L__BB0_148;

	mov.f32 	%f1774, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1775, %f1774;
	setp.eq.f32 	%p222, %f1775, 0f3ED55555;
	@%p222 bra 	$L__BB0_148;

	mov.f32 	%f2126, 0f7FFFFFFF;

$L__BB0_148:
	add.f32 	%f1778, %f276, 0f3ED55555;
	mov.b32 	%r1503, %f1778;
	setp.lt.s32 	%p224, %r1503, 2139095040;
	@%p224 bra 	$L__BB0_153;

	setp.gtu.f32 	%p225, %f276, 0f7F800000;
	@%p225 bra 	$L__BB0_152;
	bra.uni 	$L__BB0_150;

$L__BB0_152:
	add.f32 	%f2126, %f252, 0f3ED55555;
	bra.uni 	$L__BB0_153;

$L__BB0_150:
	setp.neu.f32 	%p226, %f276, 0f7F800000;
	@%p226 bra 	$L__BB0_153;

	selp.f32 	%f2126, 0fFF800000, 0f7F800000, %p8;

$L__BB0_153:
	fma.rn.f32 	%f1779, %f2120, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p227, %f250, 0f3F800000;
	mov.f32 	%f1780, 0f3F800000;
	selp.f32 	%f1781, 0f3F7FFFFF, %f1779, %p227;
	mul.f32 	%f1782, %f250, 0f414EB852;
	setp.lt.f32 	%p228, %f250, 0f3B4D2E1C;
	selp.f32 	%f1783, %f1782, %f1781, %p228;
	fma.rn.f32 	%f1784, %f2123, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p229, %f251, 0f3F800000;
	selp.f32 	%f1785, 0f3F7FFFFF, %f1784, %p229;
	mul.f32 	%f1786, %f251, 0f414EB852;
	setp.lt.f32 	%p230, %f251, 0f3B4D2E1C;
	selp.f32 	%f1787, %f1786, %f1785, %p230;
	fma.rn.f32 	%f1788, %f2126, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p231, %f252, 0f3F800000;
	selp.f32 	%f1789, 0f3F7FFFFF, %f1788, %p231;
	mul.f32 	%f1790, %f252, 0f414EB852;
	setp.lt.f32 	%p232, %f252, 0f3B4D2E1C;
	selp.f32 	%f1791, %f1790, %f1789, %p232;
	min.f32 	%f1792, %f1783, %f1780;
	mov.f32 	%f1793, 0f00000000;
	max.f32 	%f1794, %f1793, %f1792;
	mul.f32 	%f1795, %f1794, 0f43800000;
	cvt.rzi.u32.f32 	%r1504, %f1795;
	min.u32 	%r1505, %r1504, 255;
	min.f32 	%f1796, %f1787, %f1780;
	max.f32 	%f1797, %f1793, %f1796;
	mul.f32 	%f1798, %f1797, 0f43800000;
	cvt.rzi.u32.f32 	%r1506, %f1798;
	min.u32 	%r1507, %r1506, 255;
	min.f32 	%f1799, %f1791, %f1780;
	max.f32 	%f1800, %f1793, %f1799;
	mul.f32 	%f1801, %f1800, 0f43800000;
	cvt.rzi.u32.f32 	%r1508, %f1801;
	min.u32 	%r1509, %r1508, 255;
	shl.b64 	%rd89, %rd18, 2;
	add.s64 	%rd90, %rd17, %rd89;
	cvt.u16.u32 	%rs45, %r1509;
	cvt.u16.u32 	%rs46, %r1507;
	cvt.u16.u32 	%rs47, %r1505;
	mov.u16 	%rs48, 255;
	st.global.v4.u8 	[%rd90], {%rs47, %rs46, %rs45, %rs48};

$L__BB0_154:
	and.b32  	%r1510, %r58, 4;
	setp.eq.s32 	%p233, %r1510, 0;
	@%p233 bra 	$L__BB0_158;

	ld.const.u32 	%r1511, [params+108];
	setp.eq.s32 	%p234, %r1511, 0;
	ld.const.u64 	%rd91, [params+224];
	cvta.to.global.u64 	%rd92, %rd91;
	ld.const.u32 	%r1512, [params+216];
	mad.lo.s32 	%r1513, %r1512, %r6, %r5;
	mul.wide.u32 	%rd93, %r1513, 8;
	add.s64 	%rd19, %rd92, %rd93;
	@%p234 bra 	$L__BB0_157;

	ld.global.v4.u16 	{%rs56, %rs57, %rs58, %rs59}, [%rd19];
	// begin inline asm
	{  cvt.f32.f16 %f1802, %rs56;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1803, %rs57;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1804, %rs58;}

	// end inline asm
	add.f32 	%f1805, %f183, %f1802;
	add.f32 	%f1806, %f184, %f1803;
	add.f32 	%f1807, %f185, %f1804;
	mov.f32 	%f1808, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs54, %f1807;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs53, %f1806;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs52, %f1805;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs55, %f1808;}

	// end inline asm
	st.global.v4.u16 	[%rd19], {%rs52, %rs53, %rs54, %rs55};
	bra.uni 	$L__BB0_158;

$L__BB0_157:
	mov.f32 	%f1812, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs63, %f1812;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs62, %f185;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs61, %f184;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs60, %f183;}

	// end inline asm
	st.global.v4.u16 	[%rd19], {%rs60, %rs61, %rs62, %rs63};

$L__BB0_158:
	ld.const.u64 	%rd94, [params+464];
	cvta.to.global.u64 	%rd95, %rd94;
	ld.const.u32 	%r1514, [params+456];
	mad.lo.s32 	%r1515, %r1514, %r64, %r63;
	mul.wide.u32 	%rd96, %r1515, 4;
	add.s64 	%rd20, %rd95, %rd96;
	ld.global.v2.u8 	{%rs64, %rs204}, [%rd20];
	or.b16  	%rs66, %rs64, %rs204;
	and.b16  	%rs67, %rs66, 255;
	setp.eq.s16 	%p235, %rs67, 0;
	@%p235 bra 	$L__BB0_160;

	ld.global.u8 	%rs202, [%rd20+2];
	bra.uni 	$L__BB0_161;

$L__BB0_160:
	ld.global.u8 	%rs202, [%rd20+2];
	setp.eq.s16 	%p236, %rs202, 0;
	mov.f32 	%f2127, 0f00000000;
	mov.u16 	%rs204, 0;
	mov.u16 	%rs205, %rs204;
	mov.f32 	%f2128, %f2127;
	mov.f32 	%f2129, %f2127;
	@%p236 bra 	$L__BB0_162;

$L__BB0_161:
	mov.u16 	%rs205, %rs204;
	cvt.rn.f32.u16 	%f1816, %rs64;
	div.rn.f32 	%f1817, %f1816, 0f437F0000;
	fma.rn.f32 	%f1818, %f1817, 0f40000000, 0fBF800000;
	and.b16  	%rs72, %rs205, 255;
	cvt.rn.f32.u16 	%f1819, %rs72;
	div.rn.f32 	%f1820, %f1819, 0f437F0000;
	fma.rn.f32 	%f1821, %f1820, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f1822, %rs202;
	div.rn.f32 	%f1823, %f1822, 0f437F0000;
	fma.rn.f32 	%f1824, %f1823, 0f40000000, 0fBF800000;
	mul.f32 	%f1825, %f1821, %f1821;
	fma.rn.f32 	%f1826, %f1818, %f1818, %f1825;
	fma.rn.f32 	%f1827, %f1824, %f1824, %f1826;
	sqrt.rn.f32 	%f1828, %f1827;
	rcp.rn.f32 	%f1829, %f1828;
	mul.f32 	%f2129, %f1829, %f1824;
	mul.f32 	%f2128, %f1829, %f1821;
	mul.f32 	%f2127, %f1818, %f1829;
	mov.u16 	%rs204, %rs202;

$L__BB0_162:
	mul.f32 	%f1833, %f2044, %f2129;
	mul.f32 	%f1834, %f2045, %f2128;
	sub.f32 	%f1835, %f1833, %f1834;
	mul.f32 	%f1836, %f2045, %f2127;
	mul.f32 	%f1837, %f2043, %f2129;
	sub.f32 	%f1838, %f1836, %f1837;
	mul.f32 	%f1839, %f2043, %f2128;
	mul.f32 	%f1840, %f2044, %f2127;
	sub.f32 	%f1841, %f1839, %f1840;
	ld.global.u8 	%rs74, [%rd20+3];
	setp.eq.s16 	%p237, %rs74, 0;
	selp.f32 	%f293, 0fBF800000, 0f3F800000, %p237;
	mul.f32 	%f1842, %f1835, %f293;
	mul.f32 	%f1843, %f1838, %f293;
	mul.f32 	%f1844, %f1841, %f293;
	mul.f32 	%f1845, %f1842, 0f00000000;
	mul.f32 	%f1846, %f1843, 0f00000000;
	mul.f32 	%f1847, %f1844, 0f00000000;
	fma.rn.f32 	%f1848, %f2127, 0f3F5105EC, %f1845;
	fma.rn.f32 	%f1849, %f2128, 0f3F5105EC, %f1846;
	fma.rn.f32 	%f1850, %f2129, 0f3F5105EC, %f1847;
	mul.f32 	%f294, %f2043, 0f3F13CD3A;
	add.f32 	%f295, %f294, %f1848;
	mul.f32 	%f296, %f2044, 0f3F13CD3A;
	add.f32 	%f297, %f296, %f1849;
	mul.f32 	%f298, %f2045, 0f3F13CD3A;
	add.f32 	%f299, %f298, %f1850;
	or.b16  	%rs75, %rs64, %rs205;
	or.b16  	%rs23, %rs75, %rs204;
	and.b16  	%rs76, %rs23, 255;
	setp.eq.s16 	%p238, %rs76, 0;
	mov.f32 	%f2133, 0f00000000;
	mov.f32 	%f2130, %f2133;
	mov.f32 	%f2131, %f2133;
	mov.f32 	%f2132, %f2133;
	@%p238 bra 	$L__BB0_164;

	cvt.rn.f32.u16 	%f1851, %rs64;
	div.rn.f32 	%f1852, %f1851, 0f437F0000;
	fma.rn.f32 	%f1853, %f1852, 0f40000000, 0fBF800000;
	and.b16  	%rs78, %rs205, 255;
	cvt.rn.f32.u16 	%f1854, %rs78;
	div.rn.f32 	%f1855, %f1854, 0f437F0000;
	fma.rn.f32 	%f1856, %f1855, 0f40000000, 0fBF800000;
	and.b16  	%rs79, %rs204, 255;
	cvt.rn.f32.u16 	%f1857, %rs79;
	div.rn.f32 	%f1858, %f1857, 0f437F0000;
	fma.rn.f32 	%f1859, %f1858, 0f40000000, 0fBF800000;
	mul.f32 	%f1860, %f1856, %f1856;
	fma.rn.f32 	%f1861, %f1853, %f1853, %f1860;
	fma.rn.f32 	%f1862, %f1859, %f1859, %f1861;
	sqrt.rn.f32 	%f1863, %f1862;
	rcp.rn.f32 	%f1864, %f1863;
	mul.f32 	%f2132, %f1864, %f1859;
	mul.f32 	%f2131, %f1864, %f1856;
	mul.f32 	%f2130, %f1853, %f1864;

$L__BB0_164:
	mul.f32 	%f1868, %f2044, %f2132;
	mul.f32 	%f1869, %f2045, %f2131;
	sub.f32 	%f1870, %f1868, %f1869;
	mul.f32 	%f1871, %f2045, %f2130;
	mul.f32 	%f1872, %f2043, %f2132;
	sub.f32 	%f1873, %f1871, %f1872;
	mul.f32 	%f1874, %f2043, %f2131;
	mul.f32 	%f1875, %f2044, %f2130;
	sub.f32 	%f1876, %f1874, %f1875;
	mul.f32 	%f1877, %f1870, %f293;
	mul.f32 	%f1878, %f1873, %f293;
	mul.f32 	%f1879, %f1876, %f293;
	mul.f32 	%f1880, %f2130, 0f3ED105EC;
	mul.f32 	%f1881, %f2131, 0f3ED105EC;
	mul.f32 	%f1882, %f2132, 0f3ED105EC;
	mul.f32 	%f1883, %f1877, 0f3F3504F3;
	mul.f32 	%f1884, %f1878, 0f3F3504F3;
	mul.f32 	%f1885, %f1879, 0f3F3504F3;
	sub.f32 	%f1886, %f1883, %f1880;
	sub.f32 	%f1887, %f1884, %f1881;
	sub.f32 	%f1888, %f1885, %f1882;
	add.f32 	%f306, %f294, %f1886;
	add.f32 	%f307, %f296, %f1887;
	add.f32 	%f308, %f298, %f1888;
	mov.f32 	%f2134, %f2133;
	mov.f32 	%f2135, %f2133;
	@%p238 bra 	$L__BB0_166;

	cvt.rn.f32.u16 	%f1889, %rs64;
	div.rn.f32 	%f1890, %f1889, 0f437F0000;
	fma.rn.f32 	%f1891, %f1890, 0f40000000, 0fBF800000;
	and.b16  	%rs82, %rs205, 255;
	cvt.rn.f32.u16 	%f1892, %rs82;
	div.rn.f32 	%f1893, %f1892, 0f437F0000;
	fma.rn.f32 	%f1894, %f1893, 0f40000000, 0fBF800000;
	and.b16  	%rs83, %rs204, 255;
	cvt.rn.f32.u16 	%f1895, %rs83;
	div.rn.f32 	%f1896, %f1895, 0f437F0000;
	fma.rn.f32 	%f1897, %f1896, 0f40000000, 0fBF800000;
	mul.f32 	%f1898, %f1894, %f1894;
	fma.rn.f32 	%f1899, %f1891, %f1891, %f1898;
	fma.rn.f32 	%f1900, %f1897, %f1897, %f1899;
	sqrt.rn.f32 	%f1901, %f1900;
	rcp.rn.f32 	%f1902, %f1901;
	mul.f32 	%f2135, %f1902, %f1897;
	mul.f32 	%f2134, %f1902, %f1894;
	mul.f32 	%f2133, %f1891, %f1902;

$L__BB0_166:
	mul.f32 	%f1903, %f2044, %f2135;
	mul.f32 	%f1904, %f2045, %f2134;
	sub.f32 	%f1905, %f1903, %f1904;
	mul.f32 	%f1906, %f2045, %f2133;
	mul.f32 	%f1907, %f2043, %f2135;
	sub.f32 	%f1908, %f1906, %f1907;
	mul.f32 	%f1909, %f2043, %f2134;
	mul.f32 	%f1910, %f2044, %f2133;
	sub.f32 	%f1911, %f1909, %f1910;
	mul.f32 	%f1912, %f1905, %f293;
	mul.f32 	%f1913, %f1908, %f293;
	mul.f32 	%f1914, %f1911, %f293;
	mul.f32 	%f1915, %f2133, 0f3ED105EC;
	mul.f32 	%f1916, %f2134, 0f3ED105EC;
	mul.f32 	%f1917, %f2135, 0f3ED105EC;
	mul.f32 	%f1918, %f1912, 0fBF3504F3;
	mul.f32 	%f1919, %f1913, 0fBF3504F3;
	mul.f32 	%f1920, %f1914, 0fBF3504F3;
	sub.f32 	%f1921, %f1918, %f1915;
	sub.f32 	%f1922, %f1919, %f1916;
	sub.f32 	%f1923, %f1920, %f1917;
	add.f32 	%f1924, %f294, %f1921;
	add.f32 	%f1925, %f296, %f1922;
	add.f32 	%f1926, %f298, %f1923;
	mul.f32 	%f1927, %f297, %f346;
	neg.f32 	%f1928, %f1927;
	mul.f32 	%f1929, %f295, %f345;
	sub.f32 	%f1930, %f1928, %f1929;
	mul.f32 	%f1931, %f299, %f347;
	sub.f32 	%f1932, %f1930, %f1931;
	cvt.sat.f32.f32 	%f1933, %f1932;
	mul.f32 	%f1934, %f199, %f1933;
	mul.f32 	%f1935, %f200, %f1933;
	mul.f32 	%f1936, %f201, %f1933;
	mul.f32 	%f1937, %f307, %f346;
	neg.f32 	%f1938, %f1937;
	mul.f32 	%f1939, %f306, %f345;
	sub.f32 	%f1940, %f1938, %f1939;
	mul.f32 	%f1941, %f308, %f347;
	sub.f32 	%f1942, %f1940, %f1941;
	cvt.sat.f32.f32 	%f1943, %f1942;
	mul.f32 	%f1944, %f199, %f1943;
	mul.f32 	%f1945, %f200, %f1943;
	mul.f32 	%f1946, %f201, %f1943;
	mul.f32 	%f1947, %f1924, %f345;
	mul.f32 	%f1948, %f1925, %f346;
	neg.f32 	%f1949, %f1948;
	sub.f32 	%f1950, %f1949, %f1947;
	mul.f32 	%f1951, %f1926, %f347;
	sub.f32 	%f1952, %f1950, %f1951;
	cvt.sat.f32.f32 	%f1953, %f1952;
	mul.f32 	%f1954, %f199, %f1953;
	mul.f32 	%f1955, %f200, %f1953;
	mul.f32 	%f1956, %f201, %f1953;
	add.f32 	%f1957, %f1934, %f1944;
	add.f32 	%f1958, %f1935, %f1945;
	add.f32 	%f1959, %f1936, %f1946;
	add.f32 	%f1960, %f1957, %f1954;
	add.f32 	%f1961, %f1958, %f1955;
	add.f32 	%f1962, %f1959, %f1956;
	mul.f32 	%f1963, %f1960, 0f3F13CD3A;
	mul.f32 	%f1964, %f1961, 0f3F13CD3A;
	mul.f32 	%f1965, %f1962, 0f3F13CD3A;
	div.rn.f32 	%f1966, %f183, %f1963;
	div.rn.f32 	%f1967, %f184, %f1964;
	div.rn.f32 	%f1968, %f185, %f1965;
	setp.eq.f32 	%p240, %f183, 0f00000000;
	selp.f32 	%f1969, 0f00000000, %f1966, %p240;
	setp.eq.f32 	%p241, %f184, 0f00000000;
	selp.f32 	%f1970, 0f00000000, %f1967, %p241;
	setp.eq.f32 	%p242, %f185, 0f00000000;
	selp.f32 	%f1971, 0f00000000, %f1968, %p242;
	mul.f32 	%f315, %f1934, %f1969;
	mul.f32 	%f316, %f1935, %f1970;
	mul.f32 	%f317, %f1936, %f1971;
	mul.f32 	%f318, %f1944, %f1969;
	mul.f32 	%f319, %f1945, %f1970;
	mul.f32 	%f320, %f1946, %f1971;
	mul.f32 	%f321, %f1954, %f1969;
	mul.f32 	%f322, %f1955, %f1970;
	mul.f32 	%f323, %f1956, %f1971;
	ld.const.u32 	%r59, [params+108];
	setp.eq.s32 	%p243, %r59, 0;
	ld.const.u64 	%rd97, [params+256];
	cvta.to.global.u64 	%rd98, %rd97;
	ld.const.u32 	%r1516, [params+248];
	mad.lo.s32 	%r1517, %r1516, %r6, %r5;
	mul.wide.u32 	%rd99, %r1517, 8;
	add.s64 	%rd21, %rd98, %rd99;
	@%p243 bra 	$L__BB0_168;

	ld.global.v4.u16 	{%rs91, %rs92, %rs93, %rs94}, [%rd21];
	// begin inline asm
	{  cvt.f32.f16 %f1972, %rs91;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1973, %rs92;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1974, %rs93;}

	// end inline asm
	add.f32 	%f1975, %f315, %f1972;
	add.f32 	%f1976, %f316, %f1973;
	add.f32 	%f1977, %f317, %f1974;
	mov.f32 	%f1978, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs89, %f1977;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs88, %f1976;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs87, %f1975;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs90, %f1978;}

	// end inline asm
	st.global.v4.u16 	[%rd21], {%rs87, %rs88, %rs89, %rs90};
	bra.uni 	$L__BB0_169;

$L__BB0_168:
	mov.f32 	%f1982, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs98, %f1982;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs97, %f317;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs96, %f316;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs95, %f315;}

	// end inline asm
	st.global.v4.u16 	[%rd21], {%rs95, %rs96, %rs97, %rs98};

$L__BB0_169:
	ld.const.u64 	%rd100, [params+272];
	cvta.to.global.u64 	%rd101, %rd100;
	ld.const.u32 	%r1518, [params+264];
	mad.lo.s32 	%r1519, %r1518, %r6, %r5;
	mul.wide.u32 	%rd102, %r1519, 8;
	add.s64 	%rd22, %rd101, %rd102;
	@%p243 bra 	$L__BB0_171;

	ld.global.v4.u16 	{%rs106, %rs107, %rs108, %rs109}, [%rd22];
	// begin inline asm
	{  cvt.f32.f16 %f1983, %rs106;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1984, %rs107;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1985, %rs108;}

	// end inline asm
	add.f32 	%f1986, %f318, %f1983;
	add.f32 	%f1987, %f319, %f1984;
	add.f32 	%f1988, %f320, %f1985;
	mov.f32 	%f1989, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs104, %f1988;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs103, %f1987;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs102, %f1986;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs105, %f1989;}

	// end inline asm
	st.global.v4.u16 	[%rd22], {%rs102, %rs103, %rs104, %rs105};
	bra.uni 	$L__BB0_172;

$L__BB0_171:
	mov.f32 	%f1993, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs113, %f1993;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs112, %f320;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs111, %f319;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs110, %f318;}

	// end inline asm
	st.global.v4.u16 	[%rd22], {%rs110, %rs111, %rs112, %rs113};

$L__BB0_172:
	ld.const.u64 	%rd103, [params+288];
	cvta.to.global.u64 	%rd104, %rd103;
	ld.const.u32 	%r1520, [params+280];
	mad.lo.s32 	%r1521, %r1520, %r6, %r5;
	mul.wide.u32 	%rd105, %r1521, 8;
	add.s64 	%rd23, %rd104, %rd105;
	@%p243 bra 	$L__BB0_174;

	ld.global.v4.u16 	{%rs121, %rs122, %rs123, %rs124}, [%rd23];
	// begin inline asm
	{  cvt.f32.f16 %f1994, %rs121;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1995, %rs122;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1996, %rs123;}

	// end inline asm
	add.f32 	%f1997, %f321, %f1994;
	add.f32 	%f1998, %f322, %f1995;
	add.f32 	%f1999, %f323, %f1996;
	mov.f32 	%f2000, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs119, %f1999;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs118, %f1998;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs117, %f1997;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs120, %f2000;}

	// end inline asm
	st.global.v4.u16 	[%rd23], {%rs117, %rs118, %rs119, %rs120};
	bra.uni 	$L__BB0_192;

$L__BB0_174:
	mov.f32 	%f2004, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs128, %f2004;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs127, %f323;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs126, %f322;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs125, %f321;}

	// end inline asm
	st.global.v4.u16 	[%rd23], {%rs125, %rs126, %rs127, %rs128};

$L__BB0_192:
	ret;

}