//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];

.visible .entry __raygen__oxMain()
{
	.reg .pred 	%p<179>;
	.reg .b16 	%rs<65>;
	.reg .f32 	%f<1369>;
	.reg .b32 	%r<418>;
	.reg .b64 	%rd<54>;


	// begin inline asm
	call (%r23), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r24), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u64 	%rd13, [params+400];
	cvta.to.global.u64 	%rd14, %rd13;
	ld.const.u32 	%r29, [params+392];
	mad.lo.s32 	%r30, %r29, %r24, %r23;
	mul.wide.u32 	%rd15, %r30, 4;
	add.s64 	%rd1, %rd14, %rd15;
	ld.global.v2.u8 	{%rs9, %rs63}, [%rd1];
	or.b16  	%rs11, %rs9, %rs63;
	and.b16  	%rs12, %rs11, 255;
	setp.eq.s16 	%p10, %rs12, 0;
	@%p10 bra 	$L__BB0_2;

	ld.global.u8 	%rs62, [%rd1+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs62, [%rd1+2];
	setp.eq.s16 	%p11, %rs62, 0;
	mov.f32 	%f1298, 0f00000000;
	mov.u16 	%rs63, 0;
	mov.f32 	%f1299, %f1298;
	mov.f32 	%f1300, %f1298;
	@%p11 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f221, %rs9;
	div.rn.f32 	%f222, %f221, 0f437F0000;
	fma.rn.f32 	%f223, %f222, 0f40000000, 0fBF800000;
	and.b16  	%rs15, %rs63, 255;
	cvt.rn.f32.u16 	%f224, %rs15;
	div.rn.f32 	%f225, %f224, 0f437F0000;
	fma.rn.f32 	%f226, %f225, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f227, %rs62;
	div.rn.f32 	%f228, %f227, 0f437F0000;
	fma.rn.f32 	%f229, %f228, 0f40000000, 0fBF800000;
	mul.f32 	%f230, %f226, %f226;
	fma.rn.f32 	%f231, %f223, %f223, %f230;
	fma.rn.f32 	%f232, %f229, %f229, %f231;
	sqrt.rn.f32 	%f233, %f232;
	rcp.rn.f32 	%f234, %f233;
	mul.f32 	%f1300, %f234, %f229;
	mul.f32 	%f1299, %f234, %f226;
	mul.f32 	%f1298, %f223, %f234;

$L__BB0_4:
	ld.const.v2.u32 	{%r31, %r32}, [params];
	add.s32 	%r3, %r31, %r23;
	add.s32 	%r4, %r32, %r24;
	setp.eq.f32 	%p12, %f1298, 0f00000000;
	setp.eq.f32 	%p13, %f1299, 0f00000000;
	and.pred  	%p14, %p12, %p13;
	setp.eq.f32 	%p15, %f1300, 0f00000000;
	and.pred  	%p16, %p15, %p14;
	@%p16 bra 	$L__BB0_141;
	bra.uni 	$L__BB0_5;

$L__BB0_141:
	ld.const.u32 	%r22, [params+104];
	and.b32  	%r399, %r22, 1;
	setp.eq.b32 	%p170, %r399, 1;
	mov.pred 	%p171, 0;
	xor.pred  	%p172, %p170, %p171;
	not.pred 	%p173, %p172;
	@%p173 bra 	$L__BB0_143;

	ld.const.u64 	%rd38, [params+144];
	cvta.to.global.u64 	%rd39, %rd38;
	ld.const.u32 	%r400, [params+136];
	mad.lo.s32 	%r401, %r400, %r4, %r3;
	mul.wide.u32 	%rd40, %r401, 4;
	add.s64 	%rd41, %rd39, %rd40;
	mov.u16 	%rs43, 0;
	st.global.v4.u8 	[%rd41], {%rs43, %rs43, %rs43, %rs43};

$L__BB0_143:
	and.b32  	%r402, %r22, 8;
	setp.eq.s32 	%p174, %r402, 0;
	@%p174 bra 	$L__BB0_145;

	ld.const.u64 	%rd42, [params+192];
	cvta.to.global.u64 	%rd43, %rd42;
	ld.const.u32 	%r403, [params+184];
	mad.lo.s32 	%r404, %r403, %r4, %r3;
	mov.f32 	%f1285, 0f00000000;
	cvt.rzi.u32.f32 	%r405, %f1285;
	mul.wide.u32 	%rd44, %r404, 2;
	add.s64 	%rd45, %rd43, %rd44;
	mov.u16 	%rs44, 0;
	cvt.u16.u32 	%rs45, %r405;
	st.global.v2.u8 	[%rd45], {%rs45, %rs44};

$L__BB0_145:
	and.b32  	%r406, %r22, 4;
	setp.eq.s32 	%p175, %r406, 0;
	@%p175 bra 	$L__BB0_149;

	ld.const.u32 	%r407, [params+108];
	setp.eq.s32 	%p176, %r407, 0;
	ld.const.u64 	%rd46, [params+224];
	cvta.to.global.u64 	%rd47, %rd46;
	ld.const.u32 	%r408, [params+216];
	mad.lo.s32 	%r409, %r408, %r4, %r3;
	mul.wide.u32 	%rd48, %r409, 8;
	add.s64 	%rd12, %rd47, %rd48;
	@%p176 bra 	$L__BB0_148;

	ld.global.v4.u16 	{%rs52, %rs53, %rs54, %rs55}, [%rd12];
	// begin inline asm
	{  cvt.f32.f16 %f1286, %rs52;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1287, %rs53;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1288, %rs54;}

	// end inline asm
	add.f32 	%f1289, %f1286, 0f00000000;
	add.f32 	%f1290, %f1287, 0f00000000;
	add.f32 	%f1291, %f1288, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs51, %f1291;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f1290;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs49, %f1289;}

	// end inline asm
	mov.u16 	%rs56, 0;
	st.global.v4.u16 	[%rd12], {%rs49, %rs50, %rs51, %rs56};
	bra.uni 	$L__BB0_149;

$L__BB0_5:
	ld.const.u64 	%rd16, [params+432];
	cvta.to.global.u64 	%rd17, %rd16;
	ld.const.u32 	%r35, [params+424];
	mad.lo.s32 	%r36, %r35, %r24, %r23;
	mul.wide.u32 	%rd18, %r36, 12;
	add.s64 	%rd19, %rd17, %rd18;
	ld.global.f32 	%f10, [%rd19];
	mul.f32 	%f235, %f10, 0f3456BF95;
	ld.global.f32 	%f11, [%rd19+4];
	mul.f32 	%f236, %f11, 0f3456BF95;
	ld.global.f32 	%f12, [%rd19+8];
	mul.f32 	%f237, %f12, 0f3456BF95;
	abs.f32 	%f238, %f1298;
	div.rn.f32 	%f239, %f235, %f238;
	abs.f32 	%f240, %f1299;
	div.rn.f32 	%f241, %f236, %f240;
	abs.f32 	%f242, %f1300;
	div.rn.f32 	%f243, %f237, %f242;
	abs.f32 	%f244, %f239;
	abs.f32 	%f245, %f241;
	abs.f32 	%f246, %f243;
	mov.f32 	%f247, 0f38D1B717;
	max.f32 	%f248, %f244, %f247;
	max.f32 	%f249, %f245, %f247;
	max.f32 	%f250, %f246, %f247;
	fma.rn.f32 	%f13, %f1298, %f248, %f10;
	fma.rn.f32 	%f14, %f1299, %f249, %f11;
	fma.rn.f32 	%f15, %f1300, %f250, %f12;
	ld.const.u32 	%r5, [params+600];
	setp.eq.s32 	%p17, %r5, 0;
	@%p17 bra 	$L__BB0_46;

	ld.const.u64 	%rd20, [params+608];
	cvta.to.global.u64 	%rd2, %rd20;
	mov.f32 	%f258, 0f40000000;
	cvt.rzi.f32.f32 	%f259, %f258;
	add.f32 	%f260, %f259, %f259;
	mov.f32 	%f261, 0f40800000;
	sub.f32 	%f262, %f261, %f260;
	abs.f32 	%f16, %f262;
	ld.const.u32 	%r6, [params+544];
	ld.const.u32 	%r417, [params+104];
	and.b32  	%r8, %r417, 64;
	and.b32  	%r38, %r417, 32;
	setp.eq.s32 	%p18, %r38, 0;
	mov.u32 	%r413, 0;
	selp.f32 	%f17, 0f3F800000, 0f41200000, %p18;
	mul.f32 	%f18, %f13, 0f3456BF95;
	mul.f32 	%f19, %f14, 0f3456BF95;
	mul.f32 	%f20, %f15, 0f3456BF95;
	mov.f32 	%f257, 0f00000000;
	ld.const.u64 	%rd3, [params+96];
	abs.f32 	%f447, %f18;
	abs.f32 	%f448, %f19;
	max.f32 	%f449, %f447, %f448;
	abs.f32 	%f450, %f20;
	max.f32 	%f451, %f449, %f450;
	mov.f32 	%f1340, %f257;
	mov.f32 	%f1339, %f257;
	mov.f32 	%f1338, %f257;
	mov.f32 	%f1337, %f257;
	mov.f32 	%f1336, %f257;
	mov.f32 	%f1335, %f257;
	mov.f32 	%f1334, %f257;

$L__BB0_7:
	mul.wide.u32 	%rd21, %r413, 112;
	add.s64 	%rd5, %rd2, %rd21;
	ld.global.v4.f32 	{%f264, %f265, %f266, %f267}, [%rd5];
	ld.global.v4.f32 	{%f271, %f272, %f273, %f274}, [%rd5+16];
	ld.global.v4.f32 	{%f277, %f1316, %f1317, %f280}, [%rd5+32];
	ld.global.v4.f32 	{%f281, %f282, %f283, %f1314}, [%rd5+48];
	ld.global.v4.f32 	{%f285, %f286, %f287, %f288}, [%rd5+64];
	ld.global.v4.u32 	{%r39, %r40, %r41, %r42}, [%rd5+80];
	mov.b32 	%f41, %r39;
	mov.b32 	%f42, %r40;
	mov.b32 	%f43, %r41;
	ld.global.u64 	%rd6, [%rd5+96];
	sub.f32 	%f44, %f265, %f10;
	sub.f32 	%f45, %f266, %f11;
	sub.f32 	%f46, %f267, %f12;
	mul.f32 	%f289, %f45, %f45;
	fma.rn.f32 	%f290, %f44, %f44, %f289;
	fma.rn.f32 	%f291, %f46, %f46, %f290;
	sqrt.rn.f32 	%f292, %f291;
	rcp.rn.f32 	%f293, %f292;
	mul.f32 	%f47, %f44, %f293;
	mul.f32 	%f48, %f45, %f293;
	mul.f32 	%f49, %f46, %f293;
	mul.f32 	%f50, %f292, %f272;
	mul.f32 	%f51, %f292, %f274;
	abs.f32 	%f52, %f51;
	setp.lt.f32 	%p19, %f52, 0f00800000;
	mul.f32 	%f294, %f52, 0f4B800000;
	selp.f32 	%f295, %f294, %f52, %p19;
	selp.f32 	%f296, 0fC3170000, 0fC2FE0000, %p19;
	mov.b32 	%r46, %f295;
	and.b32  	%r47, %r46, 8388607;
	or.b32  	%r48, %r47, 1065353216;
	mov.b32 	%f297, %r48;
	shr.u32 	%r49, %r46, 23;
	cvt.rn.f32.u32 	%f298, %r49;
	add.f32 	%f299, %f296, %f298;
	setp.gt.f32 	%p20, %f297, 0f3FB504F3;
	mul.f32 	%f300, %f297, 0f3F000000;
	add.f32 	%f301, %f299, 0f3F800000;
	selp.f32 	%f302, %f301, %f299, %p20;
	selp.f32 	%f303, %f300, %f297, %p20;
	add.f32 	%f304, %f303, 0fBF800000;
	add.f32 	%f305, %f303, 0f3F800000;
	rcp.approx.ftz.f32 	%f306, %f305;
	add.f32 	%f307, %f304, %f304;
	mul.f32 	%f308, %f307, %f306;
	mul.f32 	%f309, %f308, %f308;
	mov.f32 	%f310, 0f3C4CAF63;
	mov.f32 	%f311, 0f3B18F0FE;
	fma.rn.f32 	%f312, %f311, %f309, %f310;
	mov.f32 	%f313, 0f3DAAAABD;
	fma.rn.f32 	%f314, %f312, %f309, %f313;
	mul.rn.f32 	%f315, %f314, %f309;
	mul.rn.f32 	%f316, %f315, %f308;
	sub.f32 	%f317, %f304, %f308;
	add.f32 	%f318, %f317, %f317;
	neg.f32 	%f319, %f308;
	fma.rn.f32 	%f320, %f319, %f304, %f318;
	mul.rn.f32 	%f321, %f306, %f320;
	add.f32 	%f322, %f316, %f308;
	sub.f32 	%f323, %f308, %f322;
	add.f32 	%f324, %f316, %f323;
	add.f32 	%f325, %f321, %f324;
	add.f32 	%f326, %f322, %f325;
	sub.f32 	%f327, %f322, %f326;
	add.f32 	%f328, %f325, %f327;
	mov.f32 	%f329, 0f3F317200;
	mul.rn.f32 	%f330, %f302, %f329;
	mov.f32 	%f331, 0f35BFBE8E;
	mul.rn.f32 	%f332, %f302, %f331;
	add.f32 	%f333, %f330, %f326;
	sub.f32 	%f334, %f330, %f333;
	add.f32 	%f335, %f326, %f334;
	add.f32 	%f336, %f328, %f335;
	add.f32 	%f337, %f332, %f336;
	add.f32 	%f338, %f333, %f337;
	sub.f32 	%f339, %f333, %f338;
	add.f32 	%f340, %f337, %f339;
	mul.rn.f32 	%f342, %f261, %f338;
	neg.f32 	%f343, %f342;
	fma.rn.f32 	%f344, %f261, %f338, %f343;
	fma.rn.f32 	%f345, %f261, %f340, %f344;
	fma.rn.f32 	%f347, %f257, %f338, %f345;
	add.rn.f32 	%f348, %f342, %f347;
	neg.f32 	%f349, %f348;
	add.rn.f32 	%f350, %f342, %f349;
	add.rn.f32 	%f351, %f350, %f347;
	mov.b32 	%r50, %f348;
	setp.eq.s32 	%p21, %r50, 1118925336;
	add.s32 	%r51, %r50, -1;
	mov.b32 	%f352, %r51;
	add.f32 	%f353, %f351, 0f37000000;
	selp.f32 	%f53, %f353, %f351, %p21;
	selp.f32 	%f354, %f352, %f348, %p21;
	mov.f32 	%f355, 0f3FB8AA3B;
	mul.rn.f32 	%f356, %f354, %f355;
	cvt.rzi.f32.f32 	%f357, %f356;
	abs.f32 	%f358, %f357;
	setp.gt.f32 	%p22, %f358, 0f42FC0000;
	mov.b32 	%r52, %f357;
	and.b32  	%r53, %r52, -2147483648;
	or.b32  	%r54, %r53, 1123811328;
	mov.b32 	%f359, %r54;
	selp.f32 	%f360, %f359, %f357, %p22;
	mov.f32 	%f361, 0fBF317218;
	fma.rn.f32 	%f362, %f360, %f361, %f354;
	mov.f32 	%f363, 0f3102E308;
	fma.rn.f32 	%f364, %f360, %f363, %f362;
	mul.f32 	%f365, %f364, 0f3FB8AA3B;
	add.f32 	%f366, %f360, 0f4B40007F;
	mov.b32 	%r55, %f366;
	shl.b32 	%r56, %r55, 23;
	mov.b32 	%f367, %r56;
	ex2.approx.ftz.f32 	%f368, %f365;
	mul.f32 	%f54, %f368, %f367;
	setp.eq.f32 	%p23, %f54, 0f7F800000;
	mov.f32 	%f1308, 0f7F800000;
	@%p23 bra 	$L__BB0_9;

	fma.rn.f32 	%f1308, %f54, %f53, %f54;

$L__BB0_9:
	setp.lt.f32 	%p24, %f51, 0f00000000;
	setp.eq.f32 	%p25, %f16, 0f3F800000;
	and.pred  	%p1, %p24, %p25;
	setp.eq.f32 	%p26, %f51, 0f00000000;
	@%p26 bra 	$L__BB0_13;
	bra.uni 	$L__BB0_10;

$L__BB0_13:
	add.f32 	%f373, %f51, %f51;
	selp.f32 	%f1310, %f373, 0f00000000, %p25;
	bra.uni 	$L__BB0_14;

$L__BB0_10:
	mov.b32 	%r57, %f1308;
	xor.b32  	%r58, %r57, -2147483648;
	mov.b32 	%f369, %r58;
	selp.f32 	%f1310, %f369, %f1308, %p1;
	setp.geu.f32 	%p27, %f51, 0f00000000;
	@%p27 bra 	$L__BB0_14;

	mov.f32 	%f370, 0f40800000;
	cvt.rzi.f32.f32 	%f371, %f370;
	setp.eq.f32 	%p28, %f371, 0f40800000;
	@%p28 bra 	$L__BB0_14;

	mov.f32 	%f1310, 0f7FFFFFFF;

$L__BB0_14:
	abs.f32 	%f1295, %f51;
	add.f32 	%f374, %f1295, 0f40800000;
	mov.b32 	%r59, %f374;
	setp.lt.s32 	%p30, %r59, 2139095040;
	@%p30 bra 	$L__BB0_19;

	abs.f32 	%f1296, %f51;
	setp.gtu.f32 	%p31, %f1296, 0f7F800000;
	@%p31 bra 	$L__BB0_18;
	bra.uni 	$L__BB0_16;

$L__BB0_18:
	add.f32 	%f1310, %f51, 0f40800000;
	bra.uni 	$L__BB0_19;

$L__BB0_16:
	abs.f32 	%f1297, %f51;
	setp.neu.f32 	%p32, %f1297, 0f7F800000;
	@%p32 bra 	$L__BB0_19;

	selp.f32 	%f1310, 0fFF800000, 0f7F800000, %p1;

$L__BB0_19:
	mov.f32 	%f375, 0f3F800000;
	sub.f32 	%f376, %f375, %f1310;
	setp.eq.f32 	%p33, %f51, 0f3F800000;
	selp.f32 	%f377, 0f00000000, %f376, %p33;
	cvt.sat.f32.f32 	%f378, %f377;
	fma.rn.f32 	%f379, %f50, %f50, %f273;
	div.rn.f32 	%f63, %f378, %f379;
	mul.f32 	%f380, %f1299, %f48;
	fma.rn.f32 	%f381, %f1298, %f47, %f380;
	fma.rn.f32 	%f64, %f1300, %f49, %f381;
	setp.eq.f32 	%p34, %f264, 0f3F800000;
	@%p34 bra 	$L__BB0_25;
	bra.uni 	$L__BB0_20;

$L__BB0_25:
	setp.eq.s64 	%p38, %rd6, 0;
	mov.f32 	%f1315, %f277;
	mov.f32 	%f1318, %f63;
	@%p38 bra 	$L__BB0_29;

	setp.geu.f32 	%p39, %f1314, 0f00000000;
	mov.f32 	%f1311, %f47;
	mov.f32 	%f1312, %f48;
	mov.f32 	%f1313, %f49;
	@%p39 bra 	$L__BB0_28;

	mul.f32 	%f404, %f42, %f45;
	fma.rn.f32 	%f405, %f41, %f44, %f404;
	fma.rn.f32 	%f406, %f43, %f46, %f405;
	rcp.rn.f32 	%f407, %f406;
	mul.f32 	%f1311, %f44, %f407;
	mul.f32 	%f1312, %f45, %f407;
	mul.f32 	%f1313, %f46, %f407;
	neg.f32 	%f1314, %f1314;

$L__BB0_28:
	mul.f32 	%f408, %f43, %f49;
	mul.f32 	%f409, %f42, %f48;
	neg.f32 	%f410, %f409;
	mul.f32 	%f411, %f41, %f47;
	sub.f32 	%f412, %f410, %f411;
	sub.f32 	%f413, %f412, %f408;
	setp.gt.f32 	%p40, %f413, 0f00000000;
	selp.f32 	%f414, 0f3F800000, 0f00000000, %p40;
	mov.f32 	%f415, 0f3F800000;
	mul.f32 	%f416, %f282, %f1312;
	fma.rn.f32 	%f417, %f281, %f1311, %f416;
	mul.f32 	%f418, %f286, %f1312;
	fma.rn.f32 	%f419, %f285, %f1311, %f418;
	fma.rn.f32 	%f420, %f283, %f1313, %f417;
	fma.rn.f32 	%f421, %f287, %f1313, %f419;
	fma.rn.f32 	%f422, %f1314, %f420, 0f3F000000;
	sub.f32 	%f423, %f415, %f422;
	fma.rn.f32 	%f424, %f1314, %f421, 0f3F000000;
	tex.2d.v4.f32.f32 	{%f425, %f426, %f427, %f428}, [%rd6, {%f423, %f424}];
	mul.f32 	%f429, %f414, %f425;
	mul.f32 	%f430, %f414, %f426;
	mul.f32 	%f431, %f414, %f427;
	mul.f32 	%f1315, %f277, %f429;
	mul.f32 	%f1316, %f1316, %f430;
	mul.f32 	%f1317, %f1317, %f431;
	mov.f32 	%f1318, %f63;
	bra.uni 	$L__BB0_29;

$L__BB0_20:
	setp.eq.f32 	%p35, %f264, 0f40000000;
	@%p35 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_21;

$L__BB0_23:
	setp.eq.s64 	%p37, %rd6, 0;
	mov.f32 	%f1315, %f277;
	mov.f32 	%f1318, %f63;
	@%p37 bra 	$L__BB0_29;

	mul.f32 	%f391, %f282, %f48;
	fma.rn.f32 	%f392, %f281, %f47, %f391;
	mul.f32 	%f393, %f286, %f48;
	fma.rn.f32 	%f394, %f285, %f47, %f393;
	mul.f32 	%f395, %f42, %f48;
	fma.rn.f32 	%f396, %f41, %f47, %f395;
	fma.rn.f32 	%f397, %f283, %f49, %f392;
	fma.rn.f32 	%f398, %f287, %f49, %f394;
	fma.rn.f32 	%f399, %f43, %f49, %f396;
	tex.cube.v4.f32.f32 	{%f400, %f401, %f402, %f403}, [%rd6, {%f397, %f398, %f399, %f399}];
	mul.f32 	%f1315, %f277, %f400;
	mul.f32 	%f1316, %f1316, %f401;
	mul.f32 	%f1317, %f1317, %f402;
	mov.f32 	%f1318, %f63;
	bra.uni 	$L__BB0_29;

$L__BB0_21:
	setp.neu.f32 	%p36, %f264, 0f40800000;
	mov.f32 	%f1315, %f277;
	mov.f32 	%f1318, %f63;
	@%p36 bra 	$L__BB0_29;

	mul.f32 	%f382, %f41, %f47;
	mul.f32 	%f383, %f42, %f48;
	neg.f32 	%f384, %f383;
	sub.f32 	%f385, %f384, %f382;
	mul.f32 	%f386, %f43, %f49;
	sub.f32 	%f387, %f385, %f386;
	fma.rn.f32 	%f388, %f280, %f387, %f1314;
	cvt.sat.f32.f32 	%f389, %f388;
	mul.f32 	%f390, %f389, %f389;
	mul.f32 	%f1318, %f63, %f390;
	mov.f32 	%f1315, %f277;

$L__BB0_29:
	max.f32 	%f438, %f1315, %f1316;
	max.f32 	%f439, %f438, %f1317;
	setp.eq.s32 	%p42, %r6, 0;
	selp.f32 	%f440, %f64, 0f3F800000, %p42;
	cvt.sat.f32.f32 	%f441, %f440;
	mul.f32 	%f84, %f441, %f1318;
	mul.f32 	%f442, %f84, %f439;
	setp.lt.f32 	%p43, %f442, 0f3727C5AC;
	mov.pred 	%p178, -1;
	mov.f32 	%f1319, 0f00000000;
	mov.f32 	%f1320, %f1319;
	mov.f32 	%f1321, %f1319;
	mov.f32 	%f1322, %f1319;
	mov.f32 	%f1323, %f1319;
	mov.f32 	%f1324, %f1319;
	@%p43 bra 	$L__BB0_31;

	setp.eq.s32 	%p45, %r8, 0;
	mul.f32 	%f1319, %f1315, %f84;
	mul.f32 	%f1320, %f1316, %f84;
	mul.f32 	%f1321, %f1317, %f84;
	selp.f32 	%f1322, 0f00000000, %f47, %p45;
	selp.f32 	%f1323, 0f00000000, %f48, %p45;
	selp.f32 	%f1324, 0f00000000, %f49, %p45;
	mov.pred 	%p178, 0;

$L__BB0_31:
	@%p178 bra 	$L__BB0_45;

	setp.eq.s32 	%p46, %r42, 0;
	mov.u16 	%rs64, 0;
	mov.f32 	%f1333, 0f3F800000;
	@%p46 bra 	$L__BB0_40;

	abs.s32 	%r11, %r42;
	setp.lt.s32 	%p47, %r11, 1;
	mov.f32 	%f1326, 0f00000000;
	@%p47 bra 	$L__BB0_39;

	mov.f32 	%f452, 0f38D1B717;
	max.f32 	%f453, %f451, %f452;
	mul.f32 	%f97, %f17, %f453;
	and.b32  	%r12, %r11, 1;
	setp.eq.s32 	%p48, %r11, 1;
	mov.f32 	%f1326, 0f00000000;
	mov.u32 	%r416, 0;
	@%p48 bra 	$L__BB0_37;

	sub.s32 	%r415, %r11, %r12;

$L__BB0_36:
	cvt.rn.f32.s32 	%f473, %r416;
	mul.f32 	%f474, %f473, 0f3DD32618;
	cvt.rmi.f32.f32 	%f475, %f474;
	sub.f32 	%f476, %f474, %f475;
	mul.f32 	%f477, %f473, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f478, %f477;
	sub.f32 	%f479, %f477, %f478;
	mul.f32 	%f480, %f473, 0f3DC74539;
	cvt.rmi.f32.f32 	%f481, %f480;
	sub.f32 	%f482, %f480, %f481;
	add.f32 	%f483, %f479, 0f4199851F;
	add.f32 	%f484, %f482, 0f4199851F;
	add.f32 	%f485, %f476, 0f4199851F;
	mul.f32 	%f486, %f479, %f484;
	fma.rn.f32 	%f487, %f476, %f483, %f486;
	fma.rn.f32 	%f488, %f485, %f482, %f487;
	add.f32 	%f489, %f476, %f488;
	add.f32 	%f490, %f479, %f488;
	add.f32 	%f491, %f482, %f488;
	add.f32 	%f492, %f489, %f490;
	mul.f32 	%f493, %f491, %f492;
	cvt.rmi.f32.f32 	%f494, %f493;
	sub.f32 	%f495, %f493, %f494;
	add.f32 	%f496, %f489, %f491;
	mul.f32 	%f497, %f490, %f496;
	cvt.rmi.f32.f32 	%f498, %f497;
	sub.f32 	%f499, %f497, %f498;
	add.f32 	%f500, %f490, %f491;
	mul.f32 	%f501, %f489, %f500;
	cvt.rmi.f32.f32 	%f502, %f501;
	sub.f32 	%f503, %f501, %f502;
	fma.rn.f32 	%f504, %f495, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f505, %f499, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f506, %f503, 0f40000000, 0fBF800000;
	ld.global.f32 	%f507, [%rd5+16];
	ld.global.f32 	%f508, [%rd5+4];
	fma.rn.f32 	%f509, %f507, %f504, %f508;
	ld.global.f32 	%f510, [%rd5+8];
	fma.rn.f32 	%f511, %f507, %f505, %f510;
	ld.global.f32 	%f512, [%rd5+12];
	fma.rn.f32 	%f513, %f507, %f506, %f512;
	sub.f32 	%f514, %f509, %f10;
	sub.f32 	%f515, %f511, %f11;
	sub.f32 	%f516, %f513, %f12;
	mul.f32 	%f517, %f515, %f515;
	fma.rn.f32 	%f518, %f514, %f514, %f517;
	fma.rn.f32 	%f519, %f516, %f516, %f518;
	sqrt.rn.f32 	%f462, %f519;
	rcp.rn.f32 	%f520, %f462;
	mul.f32 	%f458, %f520, %f514;
	mul.f32 	%f459, %f520, %f515;
	mul.f32 	%f460, %f520, %f516;
	mov.f32 	%f472, 0f00000000;
	mov.u32 	%r169, 2;
	mov.u32 	%r171, 1;
	mov.u32 	%r172, 1065353216;
	mov.u32 	%r203, 0;
	// begin inline asm
	call(%r62,%r63,%r64,%r65,%r66,%r67,%r68,%r69,%r70,%r71,%r72,%r73,%r74,%r75,%r76,%r77,%r78,%r79,%r80,%r81,%r82,%r83,%r84,%r85,%r86,%r87,%r88,%r89,%r90,%r91,%r92,%r93),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f458,%f459,%f460,%f97,%f462,%f472,%r171,%r203,%r171,%r169,%r171,%r171,%r172,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f521, %r62;
	add.f32 	%f522, %f1326, %f521;
	add.s32 	%r204, %r416, 1;
	cvt.rn.f32.s32 	%f523, %r204;
	mul.f32 	%f524, %f523, 0f3DD32618;
	cvt.rmi.f32.f32 	%f525, %f524;
	sub.f32 	%f526, %f524, %f525;
	mul.f32 	%f527, %f523, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f528, %f527;
	sub.f32 	%f529, %f527, %f528;
	mul.f32 	%f530, %f523, 0f3DC74539;
	cvt.rmi.f32.f32 	%f531, %f530;
	sub.f32 	%f532, %f530, %f531;
	add.f32 	%f533, %f529, 0f4199851F;
	add.f32 	%f534, %f532, 0f4199851F;
	add.f32 	%f535, %f526, 0f4199851F;
	mul.f32 	%f536, %f529, %f534;
	fma.rn.f32 	%f537, %f526, %f533, %f536;
	fma.rn.f32 	%f538, %f535, %f532, %f537;
	add.f32 	%f539, %f526, %f538;
	add.f32 	%f540, %f529, %f538;
	add.f32 	%f541, %f532, %f538;
	add.f32 	%f542, %f539, %f540;
	mul.f32 	%f543, %f541, %f542;
	cvt.rmi.f32.f32 	%f544, %f543;
	sub.f32 	%f545, %f543, %f544;
	add.f32 	%f546, %f539, %f541;
	mul.f32 	%f547, %f540, %f546;
	cvt.rmi.f32.f32 	%f548, %f547;
	sub.f32 	%f549, %f547, %f548;
	add.f32 	%f550, %f540, %f541;
	mul.f32 	%f551, %f539, %f550;
	cvt.rmi.f32.f32 	%f552, %f551;
	sub.f32 	%f553, %f551, %f552;
	fma.rn.f32 	%f554, %f545, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f555, %f549, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f556, %f553, 0f40000000, 0fBF800000;
	ld.global.f32 	%f557, [%rd5+16];
	ld.global.f32 	%f558, [%rd5+4];
	fma.rn.f32 	%f559, %f557, %f554, %f558;
	ld.global.f32 	%f560, [%rd5+8];
	fma.rn.f32 	%f561, %f557, %f555, %f560;
	ld.global.f32 	%f562, [%rd5+12];
	fma.rn.f32 	%f563, %f557, %f556, %f562;
	sub.f32 	%f564, %f559, %f10;
	sub.f32 	%f565, %f561, %f11;
	sub.f32 	%f566, %f563, %f12;
	mul.f32 	%f567, %f565, %f565;
	fma.rn.f32 	%f568, %f564, %f564, %f567;
	fma.rn.f32 	%f569, %f566, %f566, %f568;
	sqrt.rn.f32 	%f471, %f569;
	rcp.rn.f32 	%f570, %f471;
	mul.f32 	%f467, %f570, %f564;
	mul.f32 	%f468, %f570, %f565;
	mul.f32 	%f469, %f570, %f566;
	// begin inline asm
	call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f467,%f468,%f469,%f97,%f471,%f472,%r171,%r203,%r171,%r169,%r171,%r171,%r172,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f571, %r133;
	add.f32 	%f1326, %f522, %f571;
	add.s32 	%r416, %r416, 2;
	add.s32 	%r415, %r415, -2;
	setp.ne.s32 	%p49, %r415, 0;
	@%p49 bra 	$L__BB0_36;

$L__BB0_37:
	setp.eq.s32 	%p50, %r12, 0;
	@%p50 bra 	$L__BB0_39;

	cvt.rn.f32.s32 	%f581, %r416;
	mul.f32 	%f582, %f581, 0f3DD32618;
	cvt.rmi.f32.f32 	%f583, %f582;
	sub.f32 	%f584, %f582, %f583;
	mul.f32 	%f585, %f581, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f586, %f585;
	sub.f32 	%f587, %f585, %f586;
	mul.f32 	%f588, %f581, 0f3DC74539;
	cvt.rmi.f32.f32 	%f589, %f588;
	sub.f32 	%f590, %f588, %f589;
	add.f32 	%f591, %f587, 0f4199851F;
	add.f32 	%f592, %f590, 0f4199851F;
	add.f32 	%f593, %f584, 0f4199851F;
	mul.f32 	%f594, %f587, %f592;
	fma.rn.f32 	%f595, %f584, %f591, %f594;
	fma.rn.f32 	%f596, %f593, %f590, %f595;
	add.f32 	%f597, %f584, %f596;
	add.f32 	%f598, %f587, %f596;
	add.f32 	%f599, %f590, %f596;
	add.f32 	%f600, %f597, %f598;
	mul.f32 	%f601, %f599, %f600;
	cvt.rmi.f32.f32 	%f602, %f601;
	sub.f32 	%f603, %f601, %f602;
	add.f32 	%f604, %f597, %f599;
	mul.f32 	%f605, %f598, %f604;
	cvt.rmi.f32.f32 	%f606, %f605;
	sub.f32 	%f607, %f605, %f606;
	add.f32 	%f608, %f598, %f599;
	mul.f32 	%f609, %f597, %f608;
	cvt.rmi.f32.f32 	%f610, %f609;
	sub.f32 	%f611, %f609, %f610;
	fma.rn.f32 	%f612, %f603, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f613, %f607, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f614, %f611, 0f40000000, 0fBF800000;
	ld.global.f32 	%f615, [%rd5+16];
	ld.global.f32 	%f616, [%rd5+4];
	fma.rn.f32 	%f617, %f615, %f612, %f616;
	ld.global.f32 	%f618, [%rd5+8];
	fma.rn.f32 	%f619, %f615, %f613, %f618;
	ld.global.f32 	%f620, [%rd5+12];
	fma.rn.f32 	%f621, %f615, %f614, %f620;
	sub.f32 	%f622, %f617, %f10;
	sub.f32 	%f623, %f619, %f11;
	sub.f32 	%f624, %f621, %f12;
	mul.f32 	%f625, %f623, %f623;
	fma.rn.f32 	%f626, %f622, %f622, %f625;
	fma.rn.f32 	%f627, %f624, %f624, %f626;
	sqrt.rn.f32 	%f579, %f627;
	rcp.rn.f32 	%f628, %f579;
	mul.f32 	%f575, %f628, %f622;
	mul.f32 	%f576, %f628, %f623;
	mul.f32 	%f577, %f628, %f624;
	mov.f32 	%f580, 0f00000000;
	mov.u32 	%r241, 2;
	mov.u32 	%r243, 1;
	mov.u32 	%r244, 1065353216;
	mov.u32 	%r275, 0;
	// begin inline asm
	call(%r205,%r206,%r207,%r208,%r209,%r210,%r211,%r212,%r213,%r214,%r215,%r216,%r217,%r218,%r219,%r220,%r221,%r222,%r223,%r224,%r225,%r226,%r227,%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236),_optix_trace_typed_32,(%r275,%rd3,%f13,%f14,%f15,%f575,%f576,%f577,%f97,%f579,%f580,%r243,%r275,%r243,%r241,%r243,%r243,%r244,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275);
	// end inline asm
	mov.b32 	%f629, %r205;
	add.f32 	%f1326, %f1326, %f629;

$L__BB0_39:
	cvt.rn.f32.s32 	%f630, %r11;
	div.rn.f32 	%f1333, %f1326, %f630;
	shr.u32 	%r276, %r42, 31;
	cvt.u16.u32 	%rs64, %r276;

$L__BB0_40:
	fma.rn.f32 	%f1334, %f1319, %f1333, %f1334;
	fma.rn.f32 	%f1335, %f1320, %f1333, %f1335;
	fma.rn.f32 	%f1336, %f1321, %f1333, %f1336;
	setp.eq.s32 	%p51, %r8, 0;
	@%p51 bra 	$L__BB0_42;

	mul.f32 	%f631, %f1320, 0f3F372474;
	fma.rn.f32 	%f632, %f1319, 0f3E59999A, %f631;
	fma.rn.f32 	%f633, %f1321, 0f3D93A92A, %f632;
	fma.rn.f32 	%f1337, %f1322, %f633, %f1337;
	fma.rn.f32 	%f1338, %f1323, %f633, %f1338;
	fma.rn.f32 	%f1339, %f633, %f1324, %f1339;

$L__BB0_42:
	setp.eq.s16 	%p52, %rs64, 0;
	@%p52 bra 	$L__BB0_44;

	div.rn.f32 	%f634, %f1319, %f277;
	div.rn.f32 	%f635, %f634, %f63;
	cvt.sat.f32.f32 	%f636, %f635;
	mul.f32 	%f1333, %f1333, %f636;

$L__BB0_44:
	add.f32 	%f1340, %f1340, %f1333;

$L__BB0_45:
	cvt.u64.u32 	%rd53, %r413;
	cvt.u32.u64 	%r277, %rd53;
	add.s32 	%r413, %r277, 1;
	setp.lt.u32 	%p53, %r413, %r5;
	@%p53 bra 	$L__BB0_7;
	bra.uni 	$L__BB0_47;

$L__BB0_46:
	mov.f32 	%f1334, 0f00000000;
	ld.const.u32 	%r417, [params+104];
	mov.f32 	%f1335, %f1334;
	mov.f32 	%f1336, %f1334;
	mov.f32 	%f1337, %f1334;
	mov.f32 	%f1338, %f1334;
	mov.f32 	%f1339, %f1334;
	mov.f32 	%f1340, %f1334;

$L__BB0_47:
	and.b32  	%r278, %r417, 8;
	setp.eq.s32 	%p54, %r278, 0;
	@%p54 bra 	$L__BB0_61;

	cvt.sat.f32.f32 	%f132, %f1340;
	ld.const.u64 	%rd25, [params+192];
	cvta.to.global.u64 	%rd7, %rd25;
	ld.const.u32 	%r279, [params+184];
	mad.lo.s32 	%r280, %r279, %r4, %r3;
	cvt.u64.u32 	%rd8, %r280;
	mov.f32 	%f645, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f646, %f645;
	add.f32 	%f647, %f646, %f646;
	mov.f32 	%f648, 0f3EE8BA2E;
	sub.f32 	%f649, %f648, %f647;
	abs.f32 	%f133, %f649;
	abs.f32 	%f134, %f132;
	setp.lt.f32 	%p55, %f134, 0f00800000;
	mul.f32 	%f650, %f134, 0f4B800000;
	selp.f32 	%f651, %f650, %f134, %p55;
	selp.f32 	%f652, 0fC3170000, 0fC2FE0000, %p55;
	mov.b32 	%r281, %f651;
	and.b32  	%r282, %r281, 8388607;
	or.b32  	%r283, %r282, 1065353216;
	mov.b32 	%f653, %r283;
	shr.u32 	%r284, %r281, 23;
	cvt.rn.f32.u32 	%f654, %r284;
	add.f32 	%f655, %f652, %f654;
	setp.gt.f32 	%p56, %f653, 0f3FB504F3;
	mul.f32 	%f656, %f653, 0f3F000000;
	add.f32 	%f657, %f655, 0f3F800000;
	selp.f32 	%f658, %f657, %f655, %p56;
	selp.f32 	%f659, %f656, %f653, %p56;
	add.f32 	%f660, %f659, 0fBF800000;
	add.f32 	%f661, %f659, 0f3F800000;
	rcp.approx.ftz.f32 	%f662, %f661;
	add.f32 	%f663, %f660, %f660;
	mul.f32 	%f664, %f663, %f662;
	mul.f32 	%f665, %f664, %f664;
	mov.f32 	%f666, 0f3C4CAF63;
	mov.f32 	%f667, 0f3B18F0FE;
	fma.rn.f32 	%f668, %f667, %f665, %f666;
	mov.f32 	%f669, 0f3DAAAABD;
	fma.rn.f32 	%f670, %f668, %f665, %f669;
	mul.rn.f32 	%f671, %f670, %f665;
	mul.rn.f32 	%f672, %f671, %f664;
	sub.f32 	%f673, %f660, %f664;
	add.f32 	%f674, %f673, %f673;
	neg.f32 	%f675, %f664;
	fma.rn.f32 	%f676, %f675, %f660, %f674;
	mul.rn.f32 	%f677, %f662, %f676;
	add.f32 	%f678, %f672, %f664;
	sub.f32 	%f679, %f664, %f678;
	add.f32 	%f680, %f672, %f679;
	add.f32 	%f681, %f677, %f680;
	add.f32 	%f682, %f678, %f681;
	sub.f32 	%f683, %f678, %f682;
	add.f32 	%f684, %f681, %f683;
	mov.f32 	%f685, 0f3F317200;
	mul.rn.f32 	%f686, %f658, %f685;
	mov.f32 	%f687, 0f35BFBE8E;
	mul.rn.f32 	%f688, %f658, %f687;
	add.f32 	%f689, %f686, %f682;
	sub.f32 	%f690, %f686, %f689;
	add.f32 	%f691, %f682, %f690;
	add.f32 	%f692, %f684, %f691;
	add.f32 	%f693, %f688, %f692;
	add.f32 	%f694, %f689, %f693;
	sub.f32 	%f695, %f689, %f694;
	add.f32 	%f696, %f693, %f695;
	mul.rn.f32 	%f697, %f648, %f694;
	neg.f32 	%f698, %f697;
	fma.rn.f32 	%f699, %f648, %f694, %f698;
	fma.rn.f32 	%f700, %f648, %f696, %f699;
	mov.f32 	%f701, 0f00000000;
	fma.rn.f32 	%f702, %f701, %f694, %f700;
	add.rn.f32 	%f703, %f697, %f702;
	neg.f32 	%f704, %f703;
	add.rn.f32 	%f705, %f697, %f704;
	add.rn.f32 	%f706, %f705, %f702;
	mov.b32 	%r285, %f703;
	setp.eq.s32 	%p57, %r285, 1118925336;
	add.s32 	%r286, %r285, -1;
	mov.b32 	%f707, %r286;
	add.f32 	%f708, %f706, 0f37000000;
	selp.f32 	%f135, %f708, %f706, %p57;
	selp.f32 	%f709, %f707, %f703, %p57;
	mov.f32 	%f710, 0f3FB8AA3B;
	mul.rn.f32 	%f711, %f709, %f710;
	cvt.rzi.f32.f32 	%f712, %f711;
	abs.f32 	%f713, %f712;
	setp.gt.f32 	%p58, %f713, 0f42FC0000;
	mov.b32 	%r287, %f712;
	and.b32  	%r288, %r287, -2147483648;
	or.b32  	%r289, %r288, 1123811328;
	mov.b32 	%f714, %r289;
	selp.f32 	%f715, %f714, %f712, %p58;
	mov.f32 	%f716, 0fBF317218;
	fma.rn.f32 	%f717, %f715, %f716, %f709;
	mov.f32 	%f718, 0f3102E308;
	fma.rn.f32 	%f719, %f715, %f718, %f717;
	mul.f32 	%f720, %f719, 0f3FB8AA3B;
	add.f32 	%f721, %f715, 0f4B40007F;
	mov.b32 	%r290, %f721;
	shl.b32 	%r291, %r290, 23;
	mov.b32 	%f722, %r291;
	ex2.approx.ftz.f32 	%f723, %f720;
	mul.f32 	%f136, %f723, %f722;
	setp.eq.f32 	%p59, %f136, 0f7F800000;
	mov.f32 	%f1348, 0f7F800000;
	@%p59 bra 	$L__BB0_50;

	fma.rn.f32 	%f1348, %f136, %f135, %f136;

$L__BB0_50:
	setp.lt.f32 	%p60, %f132, 0f00000000;
	setp.eq.f32 	%p61, %f133, 0f3F800000;
	and.pred  	%p3, %p60, %p61;
	setp.eq.f32 	%p62, %f132, 0f00000000;
	@%p62 bra 	$L__BB0_54;
	bra.uni 	$L__BB0_51;

$L__BB0_54:
	add.f32 	%f728, %f132, %f132;
	selp.f32 	%f1350, %f728, 0f00000000, %p61;
	bra.uni 	$L__BB0_55;

$L__BB0_148:
	mov.f32 	%f1294, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs59, %f1294;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs58, %f1294;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs57, %f1294;}

	// end inline asm
	mov.u16 	%rs60, 0;
	st.global.v4.u16 	[%rd12], {%rs57, %rs58, %rs59, %rs60};

$L__BB0_149:
	and.b32  	%r410, %r22, 64;
	setp.eq.s32 	%p177, %r410, 0;
	@%p177 bra 	$L__BB0_151;

	ld.const.u64 	%rd49, [params+208];
	cvta.to.global.u64 	%rd50, %rd49;
	ld.const.u32 	%r411, [params+200];
	mad.lo.s32 	%r412, %r411, %r4, %r3;
	mul.wide.u32 	%rd51, %r412, 4;
	add.s64 	%rd52, %rd50, %rd51;
	mov.u16 	%rs61, 0;
	st.global.v4.u8 	[%rd52], {%rs61, %rs61, %rs61, %rs61};
	bra.uni 	$L__BB0_151;

$L__BB0_51:
	mov.b32 	%r292, %f1348;
	xor.b32  	%r293, %r292, -2147483648;
	mov.b32 	%f724, %r293;
	selp.f32 	%f1350, %f724, %f1348, %p3;
	setp.geu.f32 	%p63, %f132, 0f00000000;
	@%p63 bra 	$L__BB0_55;

	mov.f32 	%f725, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f726, %f725;
	setp.eq.f32 	%p64, %f726, 0f3EE8BA2E;
	@%p64 bra 	$L__BB0_55;

	mov.f32 	%f1350, 0f7FFFFFFF;

$L__BB0_55:
	add.f32 	%f729, %f134, 0f3EE8BA2E;
	mov.b32 	%r294, %f729;
	setp.lt.s32 	%p66, %r294, 2139095040;
	@%p66 bra 	$L__BB0_60;

	setp.gtu.f32 	%p67, %f134, 0f7F800000;
	@%p67 bra 	$L__BB0_59;
	bra.uni 	$L__BB0_57;

$L__BB0_59:
	add.f32 	%f1350, %f132, 0f3EE8BA2E;
	bra.uni 	$L__BB0_60;

$L__BB0_57:
	setp.neu.f32 	%p68, %f134, 0f7F800000;
	@%p68 bra 	$L__BB0_60;

	selp.f32 	%f1350, 0fFF800000, 0f7F800000, %p3;

$L__BB0_60:
	mul.f32 	%f730, %f1350, 0f437F0000;
	setp.eq.f32 	%p69, %f132, 0f3F800000;
	selp.f32 	%f731, 0f437F0000, %f730, %p69;
	cvt.rzi.u32.f32 	%r295, %f731;
	shl.b64 	%rd26, %rd8, 1;
	add.s64 	%rd27, %rd7, %rd26;
	cvt.u16.u32 	%rs18, %r295;
	mov.u16 	%rs19, 255;
	st.global.v2.u8 	[%rd27], {%rs18, %rs19};

$L__BB0_61:
	and.b32  	%r296, %r417, 1;
	setp.eq.b32 	%p70, %r296, 1;
	mov.pred 	%p71, 0;
	xor.pred  	%p72, %p70, %p71;
	not.pred 	%p73, %p72;
	@%p73 bra 	$L__BB0_135;

	mov.f32 	%f733, 0f3E666666;
	cvt.rzi.f32.f32 	%f734, %f733;
	add.f32 	%f735, %f734, %f734;
	mov.f32 	%f736, 0f3EE66666;
	sub.f32 	%f737, %f736, %f735;
	abs.f32 	%f145, %f737;
	abs.f32 	%f146, %f1334;
	setp.lt.f32 	%p74, %f146, 0f00800000;
	mul.f32 	%f738, %f146, 0f4B800000;
	selp.f32 	%f739, %f738, %f146, %p74;
	selp.f32 	%f740, 0fC3170000, 0fC2FE0000, %p74;
	mov.b32 	%r297, %f739;
	and.b32  	%r298, %r297, 8388607;
	or.b32  	%r299, %r298, 1065353216;
	mov.b32 	%f741, %r299;
	shr.u32 	%r300, %r297, 23;
	cvt.rn.f32.u32 	%f742, %r300;
	add.f32 	%f743, %f740, %f742;
	setp.gt.f32 	%p75, %f741, 0f3FB504F3;
	mul.f32 	%f744, %f741, 0f3F000000;
	add.f32 	%f745, %f743, 0f3F800000;
	selp.f32 	%f746, %f745, %f743, %p75;
	selp.f32 	%f747, %f744, %f741, %p75;
	add.f32 	%f748, %f747, 0fBF800000;
	add.f32 	%f749, %f747, 0f3F800000;
	rcp.approx.ftz.f32 	%f750, %f749;
	add.f32 	%f751, %f748, %f748;
	mul.f32 	%f752, %f751, %f750;
	mul.f32 	%f753, %f752, %f752;
	mov.f32 	%f754, 0f3C4CAF63;
	mov.f32 	%f755, 0f3B18F0FE;
	fma.rn.f32 	%f756, %f755, %f753, %f754;
	mov.f32 	%f757, 0f3DAAAABD;
	fma.rn.f32 	%f758, %f756, %f753, %f757;
	mul.rn.f32 	%f759, %f758, %f753;
	mul.rn.f32 	%f760, %f759, %f752;
	sub.f32 	%f761, %f748, %f752;
	add.f32 	%f762, %f761, %f761;
	neg.f32 	%f763, %f752;
	fma.rn.f32 	%f764, %f763, %f748, %f762;
	mul.rn.f32 	%f765, %f750, %f764;
	add.f32 	%f766, %f760, %f752;
	sub.f32 	%f767, %f752, %f766;
	add.f32 	%f768, %f760, %f767;
	add.f32 	%f769, %f765, %f768;
	add.f32 	%f770, %f766, %f769;
	sub.f32 	%f771, %f766, %f770;
	add.f32 	%f772, %f769, %f771;
	mov.f32 	%f773, 0f3F317200;
	mul.rn.f32 	%f774, %f746, %f773;
	mov.f32 	%f775, 0f35BFBE8E;
	mul.rn.f32 	%f776, %f746, %f775;
	add.f32 	%f777, %f774, %f770;
	sub.f32 	%f778, %f774, %f777;
	add.f32 	%f779, %f770, %f778;
	add.f32 	%f780, %f772, %f779;
	add.f32 	%f781, %f776, %f780;
	add.f32 	%f782, %f777, %f781;
	sub.f32 	%f783, %f777, %f782;
	add.f32 	%f784, %f781, %f783;
	mul.rn.f32 	%f785, %f736, %f782;
	neg.f32 	%f786, %f785;
	fma.rn.f32 	%f787, %f736, %f782, %f786;
	fma.rn.f32 	%f788, %f736, %f784, %f787;
	mov.f32 	%f789, 0f00000000;
	fma.rn.f32 	%f790, %f789, %f782, %f788;
	add.rn.f32 	%f791, %f785, %f790;
	neg.f32 	%f792, %f791;
	add.rn.f32 	%f793, %f785, %f792;
	add.rn.f32 	%f794, %f793, %f790;
	mov.b32 	%r301, %f791;
	setp.eq.s32 	%p76, %r301, 1118925336;
	add.s32 	%r302, %r301, -1;
	mov.b32 	%f795, %r302;
	add.f32 	%f796, %f794, 0f37000000;
	selp.f32 	%f147, %f796, %f794, %p76;
	selp.f32 	%f797, %f795, %f791, %p76;
	mov.f32 	%f798, 0f3FB8AA3B;
	mul.rn.f32 	%f799, %f797, %f798;
	cvt.rzi.f32.f32 	%f800, %f799;
	abs.f32 	%f801, %f800;
	setp.gt.f32 	%p77, %f801, 0f42FC0000;
	mov.b32 	%r303, %f800;
	and.b32  	%r304, %r303, -2147483648;
	or.b32  	%r305, %r304, 1123811328;
	mov.b32 	%f802, %r305;
	selp.f32 	%f803, %f802, %f800, %p77;
	mov.f32 	%f804, 0fBF317218;
	fma.rn.f32 	%f805, %f803, %f804, %f797;
	mov.f32 	%f806, 0f3102E308;
	fma.rn.f32 	%f807, %f803, %f806, %f805;
	mul.f32 	%f808, %f807, 0f3FB8AA3B;
	add.f32 	%f809, %f803, 0f4B40007F;
	mov.b32 	%r306, %f809;
	shl.b32 	%r307, %r306, 23;
	mov.b32 	%f810, %r307;
	ex2.approx.ftz.f32 	%f811, %f808;
	mul.f32 	%f148, %f811, %f810;
	setp.eq.f32 	%p78, %f148, 0f7F800000;
	mov.f32 	%f1351, 0f7F800000;
	@%p78 bra 	$L__BB0_64;

	fma.rn.f32 	%f1351, %f148, %f147, %f148;

$L__BB0_64:
	setp.lt.f32 	%p79, %f1334, 0f00000000;
	setp.eq.f32 	%p80, %f145, 0f3F800000;
	and.pred  	%p4, %p79, %p80;
	setp.eq.f32 	%p81, %f1334, 0f00000000;
	@%p81 bra 	$L__BB0_68;
	bra.uni 	$L__BB0_65;

$L__BB0_68:
	add.f32 	%f816, %f1334, %f1334;
	selp.f32 	%f1353, %f816, 0f00000000, %p80;
	bra.uni 	$L__BB0_69;

$L__BB0_65:
	mov.b32 	%r308, %f1351;
	xor.b32  	%r309, %r308, -2147483648;
	mov.b32 	%f812, %r309;
	selp.f32 	%f1353, %f812, %f1351, %p4;
	setp.geu.f32 	%p82, %f1334, 0f00000000;
	@%p82 bra 	$L__BB0_69;

	mov.f32 	%f813, 0f3EE66666;
	cvt.rzi.f32.f32 	%f814, %f813;
	setp.eq.f32 	%p83, %f814, 0f3EE66666;
	@%p83 bra 	$L__BB0_69;

	mov.f32 	%f1353, 0f7FFFFFFF;

$L__BB0_69:
	add.f32 	%f817, %f146, 0f3EE66666;
	mov.b32 	%r310, %f817;
	setp.lt.s32 	%p85, %r310, 2139095040;
	@%p85 bra 	$L__BB0_74;

	setp.gtu.f32 	%p86, %f146, 0f7F800000;
	@%p86 bra 	$L__BB0_73;
	bra.uni 	$L__BB0_71;

$L__BB0_73:
	add.f32 	%f1353, %f1334, 0f3EE66666;
	bra.uni 	$L__BB0_74;

$L__BB0_71:
	setp.neu.f32 	%p87, %f146, 0f7F800000;
	@%p87 bra 	$L__BB0_74;

	selp.f32 	%f1353, 0fFF800000, 0f7F800000, %p4;

$L__BB0_74:
	setp.eq.f32 	%p88, %f1334, 0f3F800000;
	selp.f32 	%f157, 0f3F800000, %f1353, %p88;
	abs.f32 	%f158, %f1335;
	setp.lt.f32 	%p89, %f158, 0f00800000;
	mul.f32 	%f819, %f158, 0f4B800000;
	selp.f32 	%f820, %f819, %f158, %p89;
	selp.f32 	%f821, 0fC3170000, 0fC2FE0000, %p89;
	mov.b32 	%r311, %f820;
	and.b32  	%r312, %r311, 8388607;
	or.b32  	%r313, %r312, 1065353216;
	mov.b32 	%f822, %r313;
	shr.u32 	%r314, %r311, 23;
	cvt.rn.f32.u32 	%f823, %r314;
	add.f32 	%f824, %f821, %f823;
	setp.gt.f32 	%p90, %f822, 0f3FB504F3;
	mul.f32 	%f825, %f822, 0f3F000000;
	add.f32 	%f826, %f824, 0f3F800000;
	selp.f32 	%f827, %f826, %f824, %p90;
	selp.f32 	%f828, %f825, %f822, %p90;
	add.f32 	%f829, %f828, 0fBF800000;
	add.f32 	%f830, %f828, 0f3F800000;
	rcp.approx.ftz.f32 	%f831, %f830;
	add.f32 	%f832, %f829, %f829;
	mul.f32 	%f833, %f832, %f831;
	mul.f32 	%f834, %f833, %f833;
	mov.f32 	%f835, 0f3C4CAF63;
	mov.f32 	%f836, 0f3B18F0FE;
	fma.rn.f32 	%f837, %f836, %f834, %f835;
	mov.f32 	%f838, 0f3DAAAABD;
	fma.rn.f32 	%f839, %f837, %f834, %f838;
	mul.rn.f32 	%f840, %f839, %f834;
	mul.rn.f32 	%f841, %f840, %f833;
	sub.f32 	%f842, %f829, %f833;
	add.f32 	%f843, %f842, %f842;
	neg.f32 	%f844, %f833;
	fma.rn.f32 	%f845, %f844, %f829, %f843;
	mul.rn.f32 	%f846, %f831, %f845;
	add.f32 	%f847, %f841, %f833;
	sub.f32 	%f848, %f833, %f847;
	add.f32 	%f849, %f841, %f848;
	add.f32 	%f850, %f846, %f849;
	add.f32 	%f851, %f847, %f850;
	sub.f32 	%f852, %f847, %f851;
	add.f32 	%f853, %f850, %f852;
	mov.f32 	%f854, 0f3F317200;
	mul.rn.f32 	%f855, %f827, %f854;
	mov.f32 	%f856, 0f35BFBE8E;
	mul.rn.f32 	%f857, %f827, %f856;
	add.f32 	%f858, %f855, %f851;
	sub.f32 	%f859, %f855, %f858;
	add.f32 	%f860, %f851, %f859;
	add.f32 	%f861, %f853, %f860;
	add.f32 	%f862, %f857, %f861;
	add.f32 	%f863, %f858, %f862;
	sub.f32 	%f864, %f858, %f863;
	add.f32 	%f865, %f862, %f864;
	mov.f32 	%f866, 0f3EE66666;
	mul.rn.f32 	%f867, %f866, %f863;
	neg.f32 	%f868, %f867;
	fma.rn.f32 	%f869, %f866, %f863, %f868;
	fma.rn.f32 	%f870, %f866, %f865, %f869;
	mov.f32 	%f871, 0f00000000;
	fma.rn.f32 	%f872, %f871, %f863, %f870;
	add.rn.f32 	%f873, %f867, %f872;
	neg.f32 	%f874, %f873;
	add.rn.f32 	%f875, %f867, %f874;
	add.rn.f32 	%f876, %f875, %f872;
	mov.b32 	%r315, %f873;
	setp.eq.s32 	%p91, %r315, 1118925336;
	add.s32 	%r316, %r315, -1;
	mov.b32 	%f877, %r316;
	add.f32 	%f878, %f876, 0f37000000;
	selp.f32 	%f159, %f878, %f876, %p91;
	selp.f32 	%f879, %f877, %f873, %p91;
	mov.f32 	%f880, 0f3FB8AA3B;
	mul.rn.f32 	%f881, %f879, %f880;
	cvt.rzi.f32.f32 	%f882, %f881;
	abs.f32 	%f883, %f882;
	setp.gt.f32 	%p92, %f883, 0f42FC0000;
	mov.b32 	%r317, %f882;
	and.b32  	%r318, %r317, -2147483648;
	or.b32  	%r319, %r318, 1123811328;
	mov.b32 	%f884, %r319;
	selp.f32 	%f885, %f884, %f882, %p92;
	mov.f32 	%f886, 0fBF317218;
	fma.rn.f32 	%f887, %f885, %f886, %f879;
	mov.f32 	%f888, 0f3102E308;
	fma.rn.f32 	%f889, %f885, %f888, %f887;
	mul.f32 	%f890, %f889, 0f3FB8AA3B;
	add.f32 	%f891, %f885, 0f4B40007F;
	mov.b32 	%r320, %f891;
	shl.b32 	%r321, %r320, 23;
	mov.b32 	%f892, %r321;
	ex2.approx.ftz.f32 	%f893, %f890;
	mul.f32 	%f160, %f893, %f892;
	setp.eq.f32 	%p93, %f160, 0f7F800000;
	mov.f32 	%f1354, 0f7F800000;
	@%p93 bra 	$L__BB0_76;

	fma.rn.f32 	%f1354, %f160, %f159, %f160;

$L__BB0_76:
	setp.lt.f32 	%p94, %f1335, 0f00000000;
	and.pred  	%p5, %p94, %p80;
	setp.eq.f32 	%p96, %f1335, 0f00000000;
	@%p96 bra 	$L__BB0_80;
	bra.uni 	$L__BB0_77;

$L__BB0_80:
	add.f32 	%f898, %f1335, %f1335;
	selp.f32 	%f1356, %f898, 0f00000000, %p80;
	bra.uni 	$L__BB0_81;

$L__BB0_77:
	mov.b32 	%r322, %f1354;
	xor.b32  	%r323, %r322, -2147483648;
	mov.b32 	%f894, %r323;
	selp.f32 	%f1356, %f894, %f1354, %p5;
	setp.geu.f32 	%p97, %f1335, 0f00000000;
	@%p97 bra 	$L__BB0_81;

	mov.f32 	%f895, 0f3EE66666;
	cvt.rzi.f32.f32 	%f896, %f895;
	setp.eq.f32 	%p98, %f896, 0f3EE66666;
	@%p98 bra 	$L__BB0_81;

	mov.f32 	%f1356, 0f7FFFFFFF;

$L__BB0_81:
	add.f32 	%f899, %f158, 0f3EE66666;
	mov.b32 	%r324, %f899;
	setp.lt.s32 	%p100, %r324, 2139095040;
	@%p100 bra 	$L__BB0_86;

	setp.gtu.f32 	%p101, %f158, 0f7F800000;
	@%p101 bra 	$L__BB0_85;
	bra.uni 	$L__BB0_83;

$L__BB0_85:
	add.f32 	%f1356, %f1335, 0f3EE66666;
	bra.uni 	$L__BB0_86;

$L__BB0_83:
	setp.neu.f32 	%p102, %f158, 0f7F800000;
	@%p102 bra 	$L__BB0_86;

	selp.f32 	%f1356, 0fFF800000, 0f7F800000, %p5;

$L__BB0_86:
	setp.eq.f32 	%p103, %f1335, 0f3F800000;
	selp.f32 	%f169, 0f3F800000, %f1356, %p103;
	abs.f32 	%f170, %f1336;
	setp.lt.f32 	%p104, %f170, 0f00800000;
	mul.f32 	%f901, %f170, 0f4B800000;
	selp.f32 	%f902, %f901, %f170, %p104;
	selp.f32 	%f903, 0fC3170000, 0fC2FE0000, %p104;
	mov.b32 	%r325, %f902;
	and.b32  	%r326, %r325, 8388607;
	or.b32  	%r327, %r326, 1065353216;
	mov.b32 	%f904, %r327;
	shr.u32 	%r328, %r325, 23;
	cvt.rn.f32.u32 	%f905, %r328;
	add.f32 	%f906, %f903, %f905;
	setp.gt.f32 	%p105, %f904, 0f3FB504F3;
	mul.f32 	%f907, %f904, 0f3F000000;
	add.f32 	%f908, %f906, 0f3F800000;
	selp.f32 	%f909, %f908, %f906, %p105;
	selp.f32 	%f910, %f907, %f904, %p105;
	add.f32 	%f911, %f910, 0fBF800000;
	add.f32 	%f912, %f910, 0f3F800000;
	rcp.approx.ftz.f32 	%f913, %f912;
	add.f32 	%f914, %f911, %f911;
	mul.f32 	%f915, %f914, %f913;
	mul.f32 	%f916, %f915, %f915;
	mov.f32 	%f917, 0f3C4CAF63;
	mov.f32 	%f918, 0f3B18F0FE;
	fma.rn.f32 	%f919, %f918, %f916, %f917;
	mov.f32 	%f920, 0f3DAAAABD;
	fma.rn.f32 	%f921, %f919, %f916, %f920;
	mul.rn.f32 	%f922, %f921, %f916;
	mul.rn.f32 	%f923, %f922, %f915;
	sub.f32 	%f924, %f911, %f915;
	add.f32 	%f925, %f924, %f924;
	neg.f32 	%f926, %f915;
	fma.rn.f32 	%f927, %f926, %f911, %f925;
	mul.rn.f32 	%f928, %f913, %f927;
	add.f32 	%f929, %f923, %f915;
	sub.f32 	%f930, %f915, %f929;
	add.f32 	%f931, %f923, %f930;
	add.f32 	%f932, %f928, %f931;
	add.f32 	%f933, %f929, %f932;
	sub.f32 	%f934, %f929, %f933;
	add.f32 	%f935, %f932, %f934;
	mov.f32 	%f936, 0f3F317200;
	mul.rn.f32 	%f937, %f909, %f936;
	mov.f32 	%f938, 0f35BFBE8E;
	mul.rn.f32 	%f939, %f909, %f938;
	add.f32 	%f940, %f937, %f933;
	sub.f32 	%f941, %f937, %f940;
	add.f32 	%f942, %f933, %f941;
	add.f32 	%f943, %f935, %f942;
	add.f32 	%f944, %f939, %f943;
	add.f32 	%f945, %f940, %f944;
	sub.f32 	%f946, %f940, %f945;
	add.f32 	%f947, %f944, %f946;
	mov.f32 	%f948, 0f3EE66666;
	mul.rn.f32 	%f949, %f948, %f945;
	neg.f32 	%f950, %f949;
	fma.rn.f32 	%f951, %f948, %f945, %f950;
	fma.rn.f32 	%f952, %f948, %f947, %f951;
	mov.f32 	%f953, 0f00000000;
	fma.rn.f32 	%f954, %f953, %f945, %f952;
	add.rn.f32 	%f955, %f949, %f954;
	neg.f32 	%f956, %f955;
	add.rn.f32 	%f957, %f949, %f956;
	add.rn.f32 	%f958, %f957, %f954;
	mov.b32 	%r329, %f955;
	setp.eq.s32 	%p106, %r329, 1118925336;
	add.s32 	%r330, %r329, -1;
	mov.b32 	%f959, %r330;
	add.f32 	%f960, %f958, 0f37000000;
	selp.f32 	%f171, %f960, %f958, %p106;
	selp.f32 	%f961, %f959, %f955, %p106;
	mov.f32 	%f962, 0f3FB8AA3B;
	mul.rn.f32 	%f963, %f961, %f962;
	cvt.rzi.f32.f32 	%f964, %f963;
	abs.f32 	%f965, %f964;
	setp.gt.f32 	%p107, %f965, 0f42FC0000;
	mov.b32 	%r331, %f964;
	and.b32  	%r332, %r331, -2147483648;
	or.b32  	%r333, %r332, 1123811328;
	mov.b32 	%f966, %r333;
	selp.f32 	%f967, %f966, %f964, %p107;
	mov.f32 	%f968, 0fBF317218;
	fma.rn.f32 	%f969, %f967, %f968, %f961;
	mov.f32 	%f970, 0f3102E308;
	fma.rn.f32 	%f971, %f967, %f970, %f969;
	mul.f32 	%f972, %f971, 0f3FB8AA3B;
	add.f32 	%f973, %f967, 0f4B40007F;
	mov.b32 	%r334, %f973;
	shl.b32 	%r335, %r334, 23;
	mov.b32 	%f974, %r335;
	ex2.approx.ftz.f32 	%f975, %f972;
	mul.f32 	%f172, %f975, %f974;
	setp.eq.f32 	%p108, %f172, 0f7F800000;
	mov.f32 	%f1357, 0f7F800000;
	@%p108 bra 	$L__BB0_88;

	fma.rn.f32 	%f1357, %f172, %f171, %f172;

$L__BB0_88:
	setp.lt.f32 	%p109, %f1336, 0f00000000;
	and.pred  	%p6, %p109, %p80;
	setp.eq.f32 	%p111, %f1336, 0f00000000;
	@%p111 bra 	$L__BB0_92;
	bra.uni 	$L__BB0_89;

$L__BB0_92:
	add.f32 	%f980, %f1336, %f1336;
	selp.f32 	%f1359, %f980, 0f00000000, %p80;
	bra.uni 	$L__BB0_93;

$L__BB0_89:
	mov.b32 	%r336, %f1357;
	xor.b32  	%r337, %r336, -2147483648;
	mov.b32 	%f976, %r337;
	selp.f32 	%f1359, %f976, %f1357, %p6;
	setp.geu.f32 	%p112, %f1336, 0f00000000;
	@%p112 bra 	$L__BB0_93;

	mov.f32 	%f977, 0f3EE66666;
	cvt.rzi.f32.f32 	%f978, %f977;
	setp.eq.f32 	%p113, %f978, 0f3EE66666;
	@%p113 bra 	$L__BB0_93;

	mov.f32 	%f1359, 0f7FFFFFFF;

$L__BB0_93:
	add.f32 	%f981, %f170, 0f3EE66666;
	mov.b32 	%r338, %f981;
	setp.lt.s32 	%p115, %r338, 2139095040;
	@%p115 bra 	$L__BB0_98;

	setp.gtu.f32 	%p116, %f170, 0f7F800000;
	@%p116 bra 	$L__BB0_97;
	bra.uni 	$L__BB0_95;

$L__BB0_97:
	add.f32 	%f1359, %f1336, 0f3EE66666;
	bra.uni 	$L__BB0_98;

$L__BB0_95:
	setp.neu.f32 	%p117, %f170, 0f7F800000;
	@%p117 bra 	$L__BB0_98;

	selp.f32 	%f1359, 0fFF800000, 0f7F800000, %p6;

$L__BB0_98:
	setp.eq.f32 	%p118, %f1336, 0f3F800000;
	mov.f32 	%f983, 0f3F800000;
	selp.f32 	%f984, 0f3F800000, %f1359, %p118;
	ld.const.u64 	%rd28, [params+144];
	cvta.to.global.u64 	%rd9, %rd28;
	ld.const.u32 	%r339, [params+136];
	mad.lo.s32 	%r340, %r339, %r4, %r3;
	cvt.u64.u32 	%rd10, %r340;
	min.f32 	%f985, %f157, %f983;
	mov.f32 	%f986, 0f00000000;
	max.f32 	%f181, %f986, %f985;
	min.f32 	%f987, %f169, %f983;
	max.f32 	%f182, %f986, %f987;
	min.f32 	%f988, %f984, %f983;
	max.f32 	%f183, %f986, %f988;
	mov.f32 	%f989, 0f3E555555;
	cvt.rzi.f32.f32 	%f990, %f989;
	add.f32 	%f991, %f990, %f990;
	mov.f32 	%f992, 0f3ED55555;
	sub.f32 	%f993, %f992, %f991;
	abs.f32 	%f184, %f993;
	abs.f32 	%f185, %f181;
	setp.lt.f32 	%p119, %f185, 0f00800000;
	mul.f32 	%f994, %f185, 0f4B800000;
	selp.f32 	%f995, %f994, %f185, %p119;
	selp.f32 	%f996, 0fC3170000, 0fC2FE0000, %p119;
	mov.b32 	%r341, %f995;
	and.b32  	%r342, %r341, 8388607;
	or.b32  	%r343, %r342, 1065353216;
	mov.b32 	%f997, %r343;
	shr.u32 	%r344, %r341, 23;
	cvt.rn.f32.u32 	%f998, %r344;
	add.f32 	%f999, %f996, %f998;
	setp.gt.f32 	%p120, %f997, 0f3FB504F3;
	mul.f32 	%f1000, %f997, 0f3F000000;
	add.f32 	%f1001, %f999, 0f3F800000;
	selp.f32 	%f1002, %f1001, %f999, %p120;
	selp.f32 	%f1003, %f1000, %f997, %p120;
	add.f32 	%f1004, %f1003, 0fBF800000;
	add.f32 	%f1005, %f1003, 0f3F800000;
	rcp.approx.ftz.f32 	%f1006, %f1005;
	add.f32 	%f1007, %f1004, %f1004;
	mul.f32 	%f1008, %f1007, %f1006;
	mul.f32 	%f1009, %f1008, %f1008;
	mov.f32 	%f1010, 0f3C4CAF63;
	mov.f32 	%f1011, 0f3B18F0FE;
	fma.rn.f32 	%f1012, %f1011, %f1009, %f1010;
	mov.f32 	%f1013, 0f3DAAAABD;
	fma.rn.f32 	%f1014, %f1012, %f1009, %f1013;
	mul.rn.f32 	%f1015, %f1014, %f1009;
	mul.rn.f32 	%f1016, %f1015, %f1008;
	sub.f32 	%f1017, %f1004, %f1008;
	add.f32 	%f1018, %f1017, %f1017;
	neg.f32 	%f1019, %f1008;
	fma.rn.f32 	%f1020, %f1019, %f1004, %f1018;
	mul.rn.f32 	%f1021, %f1006, %f1020;
	add.f32 	%f1022, %f1016, %f1008;
	sub.f32 	%f1023, %f1008, %f1022;
	add.f32 	%f1024, %f1016, %f1023;
	add.f32 	%f1025, %f1021, %f1024;
	add.f32 	%f1026, %f1022, %f1025;
	sub.f32 	%f1027, %f1022, %f1026;
	add.f32 	%f1028, %f1025, %f1027;
	mov.f32 	%f1029, 0f3F317200;
	mul.rn.f32 	%f1030, %f1002, %f1029;
	mov.f32 	%f1031, 0f35BFBE8E;
	mul.rn.f32 	%f1032, %f1002, %f1031;
	add.f32 	%f1033, %f1030, %f1026;
	sub.f32 	%f1034, %f1030, %f1033;
	add.f32 	%f1035, %f1026, %f1034;
	add.f32 	%f1036, %f1028, %f1035;
	add.f32 	%f1037, %f1032, %f1036;
	add.f32 	%f1038, %f1033, %f1037;
	sub.f32 	%f1039, %f1033, %f1038;
	add.f32 	%f1040, %f1037, %f1039;
	mul.rn.f32 	%f1041, %f992, %f1038;
	neg.f32 	%f1042, %f1041;
	fma.rn.f32 	%f1043, %f992, %f1038, %f1042;
	fma.rn.f32 	%f1044, %f992, %f1040, %f1043;
	fma.rn.f32 	%f1045, %f986, %f1038, %f1044;
	add.rn.f32 	%f1046, %f1041, %f1045;
	neg.f32 	%f1047, %f1046;
	add.rn.f32 	%f1048, %f1041, %f1047;
	add.rn.f32 	%f1049, %f1048, %f1045;
	mov.b32 	%r345, %f1046;
	setp.eq.s32 	%p121, %r345, 1118925336;
	add.s32 	%r346, %r345, -1;
	mov.b32 	%f1050, %r346;
	add.f32 	%f1051, %f1049, 0f37000000;
	selp.f32 	%f186, %f1051, %f1049, %p121;
	selp.f32 	%f1052, %f1050, %f1046, %p121;
	mov.f32 	%f1053, 0f3FB8AA3B;
	mul.rn.f32 	%f1054, %f1052, %f1053;
	cvt.rzi.f32.f32 	%f1055, %f1054;
	abs.f32 	%f1056, %f1055;
	setp.gt.f32 	%p122, %f1056, 0f42FC0000;
	mov.b32 	%r347, %f1055;
	and.b32  	%r348, %r347, -2147483648;
	or.b32  	%r349, %r348, 1123811328;
	mov.b32 	%f1057, %r349;
	selp.f32 	%f1058, %f1057, %f1055, %p122;
	mov.f32 	%f1059, 0fBF317218;
	fma.rn.f32 	%f1060, %f1058, %f1059, %f1052;
	mov.f32 	%f1061, 0f3102E308;
	fma.rn.f32 	%f1062, %f1058, %f1061, %f1060;
	mul.f32 	%f1063, %f1062, 0f3FB8AA3B;
	add.f32 	%f1064, %f1058, 0f4B40007F;
	mov.b32 	%r350, %f1064;
	shl.b32 	%r351, %r350, 23;
	mov.b32 	%f1065, %r351;
	ex2.approx.ftz.f32 	%f1066, %f1063;
	mul.f32 	%f187, %f1066, %f1065;
	setp.eq.f32 	%p123, %f187, 0f7F800000;
	mov.f32 	%f1360, 0f7F800000;
	@%p123 bra 	$L__BB0_100;

	fma.rn.f32 	%f1360, %f187, %f186, %f187;

$L__BB0_100:
	setp.lt.f32 	%p124, %f181, 0f00000000;
	setp.eq.f32 	%p125, %f184, 0f3F800000;
	and.pred  	%p7, %p124, %p125;
	setp.eq.f32 	%p126, %f181, 0f00000000;
	@%p126 bra 	$L__BB0_104;
	bra.uni 	$L__BB0_101;

$L__BB0_104:
	add.f32 	%f1071, %f181, %f181;
	selp.f32 	%f1362, %f1071, 0f00000000, %p125;
	bra.uni 	$L__BB0_105;

$L__BB0_101:
	mov.b32 	%r352, %f1360;
	xor.b32  	%r353, %r352, -2147483648;
	mov.b32 	%f1067, %r353;
	selp.f32 	%f1362, %f1067, %f1360, %p7;
	setp.geu.f32 	%p127, %f181, 0f00000000;
	@%p127 bra 	$L__BB0_105;

	mov.f32 	%f1068, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1069, %f1068;
	setp.eq.f32 	%p128, %f1069, 0f3ED55555;
	@%p128 bra 	$L__BB0_105;

	mov.f32 	%f1362, 0f7FFFFFFF;

$L__BB0_105:
	add.f32 	%f1072, %f185, 0f3ED55555;
	mov.b32 	%r354, %f1072;
	setp.lt.s32 	%p130, %r354, 2139095040;
	@%p130 bra 	$L__BB0_110;

	setp.gtu.f32 	%p131, %f185, 0f7F800000;
	@%p131 bra 	$L__BB0_109;
	bra.uni 	$L__BB0_107;

$L__BB0_109:
	add.f32 	%f1362, %f181, 0f3ED55555;
	bra.uni 	$L__BB0_110;

$L__BB0_107:
	setp.neu.f32 	%p132, %f185, 0f7F800000;
	@%p132 bra 	$L__BB0_110;

	selp.f32 	%f1362, 0fFF800000, 0f7F800000, %p7;

$L__BB0_110:
	abs.f32 	%f196, %f182;
	setp.lt.f32 	%p133, %f196, 0f00800000;
	mul.f32 	%f1074, %f196, 0f4B800000;
	selp.f32 	%f1075, %f1074, %f196, %p133;
	selp.f32 	%f1076, 0fC3170000, 0fC2FE0000, %p133;
	mov.b32 	%r355, %f1075;
	and.b32  	%r356, %r355, 8388607;
	or.b32  	%r357, %r356, 1065353216;
	mov.b32 	%f1077, %r357;
	shr.u32 	%r358, %r355, 23;
	cvt.rn.f32.u32 	%f1078, %r358;
	add.f32 	%f1079, %f1076, %f1078;
	setp.gt.f32 	%p134, %f1077, 0f3FB504F3;
	mul.f32 	%f1080, %f1077, 0f3F000000;
	add.f32 	%f1081, %f1079, 0f3F800000;
	selp.f32 	%f1082, %f1081, %f1079, %p134;
	selp.f32 	%f1083, %f1080, %f1077, %p134;
	add.f32 	%f1084, %f1083, 0fBF800000;
	add.f32 	%f1085, %f1083, 0f3F800000;
	rcp.approx.ftz.f32 	%f1086, %f1085;
	add.f32 	%f1087, %f1084, %f1084;
	mul.f32 	%f1088, %f1087, %f1086;
	mul.f32 	%f1089, %f1088, %f1088;
	mov.f32 	%f1090, 0f3C4CAF63;
	mov.f32 	%f1091, 0f3B18F0FE;
	fma.rn.f32 	%f1092, %f1091, %f1089, %f1090;
	mov.f32 	%f1093, 0f3DAAAABD;
	fma.rn.f32 	%f1094, %f1092, %f1089, %f1093;
	mul.rn.f32 	%f1095, %f1094, %f1089;
	mul.rn.f32 	%f1096, %f1095, %f1088;
	sub.f32 	%f1097, %f1084, %f1088;
	add.f32 	%f1098, %f1097, %f1097;
	neg.f32 	%f1099, %f1088;
	fma.rn.f32 	%f1100, %f1099, %f1084, %f1098;
	mul.rn.f32 	%f1101, %f1086, %f1100;
	add.f32 	%f1102, %f1096, %f1088;
	sub.f32 	%f1103, %f1088, %f1102;
	add.f32 	%f1104, %f1096, %f1103;
	add.f32 	%f1105, %f1101, %f1104;
	add.f32 	%f1106, %f1102, %f1105;
	sub.f32 	%f1107, %f1102, %f1106;
	add.f32 	%f1108, %f1105, %f1107;
	mov.f32 	%f1109, 0f3F317200;
	mul.rn.f32 	%f1110, %f1082, %f1109;
	mov.f32 	%f1111, 0f35BFBE8E;
	mul.rn.f32 	%f1112, %f1082, %f1111;
	add.f32 	%f1113, %f1110, %f1106;
	sub.f32 	%f1114, %f1110, %f1113;
	add.f32 	%f1115, %f1106, %f1114;
	add.f32 	%f1116, %f1108, %f1115;
	add.f32 	%f1117, %f1112, %f1116;
	add.f32 	%f1118, %f1113, %f1117;
	sub.f32 	%f1119, %f1113, %f1118;
	add.f32 	%f1120, %f1117, %f1119;
	mov.f32 	%f1121, 0f3ED55555;
	mul.rn.f32 	%f1122, %f1121, %f1118;
	neg.f32 	%f1123, %f1122;
	fma.rn.f32 	%f1124, %f1121, %f1118, %f1123;
	fma.rn.f32 	%f1125, %f1121, %f1120, %f1124;
	mov.f32 	%f1126, 0f00000000;
	fma.rn.f32 	%f1127, %f1126, %f1118, %f1125;
	add.rn.f32 	%f1128, %f1122, %f1127;
	neg.f32 	%f1129, %f1128;
	add.rn.f32 	%f1130, %f1122, %f1129;
	add.rn.f32 	%f1131, %f1130, %f1127;
	mov.b32 	%r359, %f1128;
	setp.eq.s32 	%p135, %r359, 1118925336;
	add.s32 	%r360, %r359, -1;
	mov.b32 	%f1132, %r360;
	add.f32 	%f1133, %f1131, 0f37000000;
	selp.f32 	%f197, %f1133, %f1131, %p135;
	selp.f32 	%f1134, %f1132, %f1128, %p135;
	mov.f32 	%f1135, 0f3FB8AA3B;
	mul.rn.f32 	%f1136, %f1134, %f1135;
	cvt.rzi.f32.f32 	%f1137, %f1136;
	abs.f32 	%f1138, %f1137;
	setp.gt.f32 	%p136, %f1138, 0f42FC0000;
	mov.b32 	%r361, %f1137;
	and.b32  	%r362, %r361, -2147483648;
	or.b32  	%r363, %r362, 1123811328;
	mov.b32 	%f1139, %r363;
	selp.f32 	%f1140, %f1139, %f1137, %p136;
	mov.f32 	%f1141, 0fBF317218;
	fma.rn.f32 	%f1142, %f1140, %f1141, %f1134;
	mov.f32 	%f1143, 0f3102E308;
	fma.rn.f32 	%f1144, %f1140, %f1143, %f1142;
	mul.f32 	%f1145, %f1144, 0f3FB8AA3B;
	add.f32 	%f1146, %f1140, 0f4B40007F;
	mov.b32 	%r364, %f1146;
	shl.b32 	%r365, %r364, 23;
	mov.b32 	%f1147, %r365;
	ex2.approx.ftz.f32 	%f1148, %f1145;
	mul.f32 	%f198, %f1148, %f1147;
	setp.eq.f32 	%p137, %f198, 0f7F800000;
	mov.f32 	%f1363, 0f7F800000;
	@%p137 bra 	$L__BB0_112;

	fma.rn.f32 	%f1363, %f198, %f197, %f198;

$L__BB0_112:
	setp.lt.f32 	%p138, %f182, 0f00000000;
	and.pred  	%p8, %p138, %p125;
	setp.eq.f32 	%p140, %f182, 0f00000000;
	@%p140 bra 	$L__BB0_116;
	bra.uni 	$L__BB0_113;

$L__BB0_116:
	add.f32 	%f1153, %f182, %f182;
	selp.f32 	%f1365, %f1153, 0f00000000, %p125;
	bra.uni 	$L__BB0_117;

$L__BB0_113:
	mov.b32 	%r366, %f1363;
	xor.b32  	%r367, %r366, -2147483648;
	mov.b32 	%f1149, %r367;
	selp.f32 	%f1365, %f1149, %f1363, %p8;
	setp.geu.f32 	%p141, %f182, 0f00000000;
	@%p141 bra 	$L__BB0_117;

	mov.f32 	%f1150, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1151, %f1150;
	setp.eq.f32 	%p142, %f1151, 0f3ED55555;
	@%p142 bra 	$L__BB0_117;

	mov.f32 	%f1365, 0f7FFFFFFF;

$L__BB0_117:
	add.f32 	%f1154, %f196, 0f3ED55555;
	mov.b32 	%r368, %f1154;
	setp.lt.s32 	%p144, %r368, 2139095040;
	@%p144 bra 	$L__BB0_122;

	setp.gtu.f32 	%p145, %f196, 0f7F800000;
	@%p145 bra 	$L__BB0_121;
	bra.uni 	$L__BB0_119;

$L__BB0_121:
	add.f32 	%f1365, %f182, 0f3ED55555;
	bra.uni 	$L__BB0_122;

$L__BB0_119:
	setp.neu.f32 	%p146, %f196, 0f7F800000;
	@%p146 bra 	$L__BB0_122;

	selp.f32 	%f1365, 0fFF800000, 0f7F800000, %p8;

$L__BB0_122:
	abs.f32 	%f207, %f183;
	setp.lt.f32 	%p147, %f207, 0f00800000;
	mul.f32 	%f1156, %f207, 0f4B800000;
	selp.f32 	%f1157, %f1156, %f207, %p147;
	selp.f32 	%f1158, 0fC3170000, 0fC2FE0000, %p147;
	mov.b32 	%r369, %f1157;
	and.b32  	%r370, %r369, 8388607;
	or.b32  	%r371, %r370, 1065353216;
	mov.b32 	%f1159, %r371;
	shr.u32 	%r372, %r369, 23;
	cvt.rn.f32.u32 	%f1160, %r372;
	add.f32 	%f1161, %f1158, %f1160;
	setp.gt.f32 	%p148, %f1159, 0f3FB504F3;
	mul.f32 	%f1162, %f1159, 0f3F000000;
	add.f32 	%f1163, %f1161, 0f3F800000;
	selp.f32 	%f1164, %f1163, %f1161, %p148;
	selp.f32 	%f1165, %f1162, %f1159, %p148;
	add.f32 	%f1166, %f1165, 0fBF800000;
	add.f32 	%f1167, %f1165, 0f3F800000;
	rcp.approx.ftz.f32 	%f1168, %f1167;
	add.f32 	%f1169, %f1166, %f1166;
	mul.f32 	%f1170, %f1169, %f1168;
	mul.f32 	%f1171, %f1170, %f1170;
	mov.f32 	%f1172, 0f3C4CAF63;
	mov.f32 	%f1173, 0f3B18F0FE;
	fma.rn.f32 	%f1174, %f1173, %f1171, %f1172;
	mov.f32 	%f1175, 0f3DAAAABD;
	fma.rn.f32 	%f1176, %f1174, %f1171, %f1175;
	mul.rn.f32 	%f1177, %f1176, %f1171;
	mul.rn.f32 	%f1178, %f1177, %f1170;
	sub.f32 	%f1179, %f1166, %f1170;
	add.f32 	%f1180, %f1179, %f1179;
	neg.f32 	%f1181, %f1170;
	fma.rn.f32 	%f1182, %f1181, %f1166, %f1180;
	mul.rn.f32 	%f1183, %f1168, %f1182;
	add.f32 	%f1184, %f1178, %f1170;
	sub.f32 	%f1185, %f1170, %f1184;
	add.f32 	%f1186, %f1178, %f1185;
	add.f32 	%f1187, %f1183, %f1186;
	add.f32 	%f1188, %f1184, %f1187;
	sub.f32 	%f1189, %f1184, %f1188;
	add.f32 	%f1190, %f1187, %f1189;
	mov.f32 	%f1191, 0f3F317200;
	mul.rn.f32 	%f1192, %f1164, %f1191;
	mov.f32 	%f1193, 0f35BFBE8E;
	mul.rn.f32 	%f1194, %f1164, %f1193;
	add.f32 	%f1195, %f1192, %f1188;
	sub.f32 	%f1196, %f1192, %f1195;
	add.f32 	%f1197, %f1188, %f1196;
	add.f32 	%f1198, %f1190, %f1197;
	add.f32 	%f1199, %f1194, %f1198;
	add.f32 	%f1200, %f1195, %f1199;
	sub.f32 	%f1201, %f1195, %f1200;
	add.f32 	%f1202, %f1199, %f1201;
	mov.f32 	%f1203, 0f3ED55555;
	mul.rn.f32 	%f1204, %f1203, %f1200;
	neg.f32 	%f1205, %f1204;
	fma.rn.f32 	%f1206, %f1203, %f1200, %f1205;
	fma.rn.f32 	%f1207, %f1203, %f1202, %f1206;
	mov.f32 	%f1208, 0f00000000;
	fma.rn.f32 	%f1209, %f1208, %f1200, %f1207;
	add.rn.f32 	%f1210, %f1204, %f1209;
	neg.f32 	%f1211, %f1210;
	add.rn.f32 	%f1212, %f1204, %f1211;
	add.rn.f32 	%f1213, %f1212, %f1209;
	mov.b32 	%r373, %f1210;
	setp.eq.s32 	%p149, %r373, 1118925336;
	add.s32 	%r374, %r373, -1;
	mov.b32 	%f1214, %r374;
	add.f32 	%f1215, %f1213, 0f37000000;
	selp.f32 	%f208, %f1215, %f1213, %p149;
	selp.f32 	%f1216, %f1214, %f1210, %p149;
	mov.f32 	%f1217, 0f3FB8AA3B;
	mul.rn.f32 	%f1218, %f1216, %f1217;
	cvt.rzi.f32.f32 	%f1219, %f1218;
	abs.f32 	%f1220, %f1219;
	setp.gt.f32 	%p150, %f1220, 0f42FC0000;
	mov.b32 	%r375, %f1219;
	and.b32  	%r376, %r375, -2147483648;
	or.b32  	%r377, %r376, 1123811328;
	mov.b32 	%f1221, %r377;
	selp.f32 	%f1222, %f1221, %f1219, %p150;
	mov.f32 	%f1223, 0fBF317218;
	fma.rn.f32 	%f1224, %f1222, %f1223, %f1216;
	mov.f32 	%f1225, 0f3102E308;
	fma.rn.f32 	%f1226, %f1222, %f1225, %f1224;
	mul.f32 	%f1227, %f1226, 0f3FB8AA3B;
	add.f32 	%f1228, %f1222, 0f4B40007F;
	mov.b32 	%r378, %f1228;
	shl.b32 	%r379, %r378, 23;
	mov.b32 	%f1229, %r379;
	ex2.approx.ftz.f32 	%f1230, %f1227;
	mul.f32 	%f209, %f1230, %f1229;
	setp.eq.f32 	%p151, %f209, 0f7F800000;
	mov.f32 	%f1366, 0f7F800000;
	@%p151 bra 	$L__BB0_124;

	fma.rn.f32 	%f1366, %f209, %f208, %f209;

$L__BB0_124:
	setp.lt.f32 	%p152, %f183, 0f00000000;
	and.pred  	%p9, %p152, %p125;
	setp.eq.f32 	%p154, %f183, 0f00000000;
	@%p154 bra 	$L__BB0_128;
	bra.uni 	$L__BB0_125;

$L__BB0_128:
	add.f32 	%f1235, %f183, %f183;
	selp.f32 	%f1368, %f1235, 0f00000000, %p125;
	bra.uni 	$L__BB0_129;

$L__BB0_125:
	mov.b32 	%r380, %f1366;
	xor.b32  	%r381, %r380, -2147483648;
	mov.b32 	%f1231, %r381;
	selp.f32 	%f1368, %f1231, %f1366, %p9;
	setp.geu.f32 	%p155, %f183, 0f00000000;
	@%p155 bra 	$L__BB0_129;

	mov.f32 	%f1232, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1233, %f1232;
	setp.eq.f32 	%p156, %f1233, 0f3ED55555;
	@%p156 bra 	$L__BB0_129;

	mov.f32 	%f1368, 0f7FFFFFFF;

$L__BB0_129:
	add.f32 	%f1236, %f207, 0f3ED55555;
	mov.b32 	%r382, %f1236;
	setp.lt.s32 	%p158, %r382, 2139095040;
	@%p158 bra 	$L__BB0_134;

	setp.gtu.f32 	%p159, %f207, 0f7F800000;
	@%p159 bra 	$L__BB0_133;
	bra.uni 	$L__BB0_131;

$L__BB0_133:
	add.f32 	%f1368, %f183, 0f3ED55555;
	bra.uni 	$L__BB0_134;

$L__BB0_131:
	setp.neu.f32 	%p160, %f207, 0f7F800000;
	@%p160 bra 	$L__BB0_134;

	selp.f32 	%f1368, 0fFF800000, 0f7F800000, %p9;

$L__BB0_134:
	fma.rn.f32 	%f1237, %f1362, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p161, %f181, 0f3F800000;
	mov.f32 	%f1238, 0f3F800000;
	selp.f32 	%f1239, 0f3F7FFFFF, %f1237, %p161;
	mul.f32 	%f1240, %f181, 0f414EB852;
	setp.lt.f32 	%p162, %f181, 0f3B4D2E1C;
	selp.f32 	%f1241, %f1240, %f1239, %p162;
	fma.rn.f32 	%f1242, %f1365, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p163, %f182, 0f3F800000;
	selp.f32 	%f1243, 0f3F7FFFFF, %f1242, %p163;
	mul.f32 	%f1244, %f182, 0f414EB852;
	setp.lt.f32 	%p164, %f182, 0f3B4D2E1C;
	selp.f32 	%f1245, %f1244, %f1243, %p164;
	fma.rn.f32 	%f1246, %f1368, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p165, %f183, 0f3F800000;
	selp.f32 	%f1247, 0f3F7FFFFF, %f1246, %p165;
	mul.f32 	%f1248, %f183, 0f414EB852;
	setp.lt.f32 	%p166, %f183, 0f3B4D2E1C;
	selp.f32 	%f1249, %f1248, %f1247, %p166;
	min.f32 	%f1250, %f1241, %f1238;
	mov.f32 	%f1251, 0f00000000;
	max.f32 	%f1252, %f1251, %f1250;
	mul.f32 	%f1253, %f1252, 0f43800000;
	cvt.rzi.u32.f32 	%r383, %f1253;
	min.u32 	%r384, %r383, 255;
	min.f32 	%f1254, %f1245, %f1238;
	max.f32 	%f1255, %f1251, %f1254;
	mul.f32 	%f1256, %f1255, 0f43800000;
	cvt.rzi.u32.f32 	%r385, %f1256;
	min.u32 	%r386, %r385, 255;
	min.f32 	%f1257, %f1249, %f1238;
	max.f32 	%f1258, %f1251, %f1257;
	mul.f32 	%f1259, %f1258, 0f43800000;
	cvt.rzi.u32.f32 	%r387, %f1259;
	min.u32 	%r388, %r387, 255;
	shl.b64 	%rd29, %rd10, 2;
	add.s64 	%rd30, %rd9, %rd29;
	cvt.u16.u32 	%rs20, %r388;
	cvt.u16.u32 	%rs21, %r386;
	cvt.u16.u32 	%rs22, %r384;
	mov.u16 	%rs23, 255;
	st.global.v4.u8 	[%rd30], {%rs22, %rs21, %rs20, %rs23};

$L__BB0_135:
	and.b32  	%r389, %r417, 4;
	setp.eq.s32 	%p167, %r389, 0;
	@%p167 bra 	$L__BB0_139;

	ld.const.u32 	%r390, [params+108];
	setp.eq.s32 	%p168, %r390, 0;
	ld.const.u64 	%rd31, [params+224];
	cvta.to.global.u64 	%rd32, %rd31;
	ld.const.u32 	%r391, [params+216];
	mad.lo.s32 	%r392, %r391, %r4, %r3;
	mul.wide.u32 	%rd33, %r392, 8;
	add.s64 	%rd11, %rd32, %rd33;
	@%p168 bra 	$L__BB0_138;

	ld.global.v4.u16 	{%rs31, %rs32, %rs33, %rs34}, [%rd11];
	// begin inline asm
	{  cvt.f32.f16 %f1260, %rs31;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1261, %rs32;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1262, %rs33;}

	// end inline asm
	add.f32 	%f1263, %f1334, %f1260;
	add.f32 	%f1264, %f1335, %f1261;
	add.f32 	%f1265, %f1336, %f1262;
	mov.f32 	%f1266, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f1265;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f1264;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f1263;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f1266;}

	// end inline asm
	st.global.v4.u16 	[%rd11], {%rs27, %rs28, %rs29, %rs30};
	bra.uni 	$L__BB0_139;

$L__BB0_138:
	mov.f32 	%f1270, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs38, %f1270;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs37, %f1336;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs36, %f1335;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs35, %f1334;}

	// end inline asm
	st.global.v4.u16 	[%rd11], {%rs35, %rs36, %rs37, %rs38};

$L__BB0_139:
	and.b32  	%r393, %r417, 64;
	setp.eq.s32 	%p169, %r393, 0;
	@%p169 bra 	$L__BB0_151;

	mul.f32 	%f1271, %f1338, %f1338;
	fma.rn.f32 	%f1272, %f1337, %f1337, %f1271;
	fma.rn.f32 	%f1273, %f1339, %f1339, %f1272;
	sqrt.rn.f32 	%f1274, %f1273;
	rcp.rn.f32 	%f1275, %f1274;
	mul.f32 	%f1276, %f1337, %f1275;
	mul.f32 	%f1277, %f1338, %f1275;
	mul.f32 	%f1278, %f1339, %f1275;
	ld.const.u64 	%rd34, [params+208];
	cvta.to.global.u64 	%rd35, %rd34;
	ld.const.u32 	%r394, [params+200];
	mad.lo.s32 	%r395, %r394, %r4, %r3;
	fma.rn.f32 	%f1279, %f1276, 0f3F000000, 0f3F000000;
	mul.f32 	%f1280, %f1279, 0f437F0000;
	cvt.rzi.u32.f32 	%r396, %f1280;
	fma.rn.f32 	%f1281, %f1277, 0f3F000000, 0f3F000000;
	mul.f32 	%f1282, %f1281, 0f437F0000;
	cvt.rzi.u32.f32 	%r397, %f1282;
	fma.rn.f32 	%f1283, %f1278, 0f3F000000, 0f3F000000;
	mul.f32 	%f1284, %f1283, 0f437F0000;
	cvt.rzi.u32.f32 	%r398, %f1284;
	mul.wide.u32 	%rd36, %r395, 4;
	add.s64 	%rd37, %rd35, %rd36;
	cvt.u16.u32 	%rs39, %r398;
	cvt.u16.u32 	%rs40, %r397;
	cvt.u16.u32 	%rs41, %r396;
	mov.u16 	%rs42, 255;
	st.global.v4.u8 	[%rd37], {%rs41, %rs40, %rs39, %rs42};

$L__BB0_151:
	ret;

}