//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<148>;
	.reg .b16 	%rs<57>;
	.reg .f32 	%f<986>;
	.reg .b32 	%r<333>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<85>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r51), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r52), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u32 	%r3, [params+540];
	ld.const.u64 	%rd21, [params+400];
	cvta.to.global.u64 	%rd22, %rd21;
	ld.const.u32 	%r57, [params+392];
	mad.lo.s32 	%r58, %r57, %r52, %r51;
	mul.wide.u32 	%rd23, %r58, 4;
	add.s64 	%rd2, %rd22, %rd23;
	ld.global.v2.u8 	{%rs7, %rs56}, [%rd2];
	or.b16  	%rs9, %rs7, %rs56;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p7, %rs10, 0;
	@%p7 bra 	$L__BB0_2;

	ld.global.u8 	%rs55, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs55, [%rd2+2];
	setp.eq.s16 	%p8, %rs55, 0;
	mov.f32 	%f935, 0f00000000;
	mov.u16 	%rs56, 0;
	mov.f32 	%f936, %f935;
	mov.f32 	%f937, %f935;
	@%p8 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f162, %rs7;
	div.rn.f32 	%f163, %f162, 0f437F0000;
	fma.rn.f32 	%f164, %f163, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs56, 255;
	cvt.rn.f32.u16 	%f165, %rs13;
	div.rn.f32 	%f166, %f165, 0f437F0000;
	fma.rn.f32 	%f167, %f166, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f168, %rs55;
	div.rn.f32 	%f169, %f168, 0f437F0000;
	fma.rn.f32 	%f170, %f169, 0f40000000, 0fBF800000;
	mul.f32 	%f171, %f167, %f167;
	fma.rn.f32 	%f172, %f164, %f164, %f171;
	fma.rn.f32 	%f173, %f170, %f170, %f172;
	sqrt.rn.f32 	%f174, %f173;
	rcp.rn.f32 	%f175, %f174;
	mul.f32 	%f937, %f175, %f170;
	mul.f32 	%f936, %f175, %f167;
	mul.f32 	%f935, %f164, %f175;

$L__BB0_4:
	ld.const.v2.u32 	{%r59, %r60}, [params];
	add.s32 	%r4, %r59, %r51;
	add.s32 	%r5, %r60, %r52;
	setp.eq.f32 	%p9, %f935, 0f00000000;
	setp.eq.f32 	%p10, %f936, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	setp.eq.f32 	%p12, %f937, 0f00000000;
	and.pred  	%p13, %p12, %p11;
	@%p13 bra 	$L__BB0_116;
	bra.uni 	$L__BB0_5;

$L__BB0_116:
	ld.const.u32 	%r50, [params+104];
	and.b32  	%r308, %r50, 1;
	setp.eq.b32 	%p141, %r308, 1;
	mov.pred 	%p142, 0;
	xor.pred  	%p143, %p141, %p142;
	not.pred 	%p144, %p143;
	@%p144 bra 	$L__BB0_118;

	ld.const.u64 	%rd66, [params+144];
	cvta.to.global.u64 	%rd67, %rd66;
	ld.const.u32 	%r309, [params+136];
	mad.lo.s32 	%r310, %r309, %r5, %r4;
	mul.wide.u32 	%rd68, %r310, 4;
	add.s64 	%rd69, %rd67, %rd68;
	mov.u16 	%rs38, 0;
	st.global.v4.u8 	[%rd69], {%rs38, %rs38, %rs38, %rs38};

$L__BB0_118:
	and.b32  	%r311, %r50, 4;
	setp.eq.s32 	%p145, %r311, 0;
	@%p145 bra 	$L__BB0_122;

	ld.const.u32 	%r312, [params+108];
	setp.eq.s32 	%p146, %r312, 0;
	ld.const.u64 	%rd70, [params+224];
	cvta.to.global.u64 	%rd71, %rd70;
	ld.const.u32 	%r313, [params+216];
	mad.lo.s32 	%r314, %r313, %r5, %r4;
	mul.wide.u32 	%rd72, %r314, 8;
	add.s64 	%rd19, %rd71, %rd72;
	@%p146 bra 	$L__BB0_121;

	ld.global.v4.u16 	{%rs45, %rs46, %rs47, %rs48}, [%rd19];
	// begin inline asm
	{  cvt.f32.f16 %f867, %rs45;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f868, %rs46;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f869, %rs47;}

	// end inline asm
	add.f32 	%f870, %f867, 0f00000000;
	add.f32 	%f871, %f868, 0f00000000;
	add.f32 	%f872, %f869, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f872;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs43, %f871;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs42, %f870;}

	// end inline asm
	mov.u16 	%rs49, 0;
	st.global.v4.u16 	[%rd19], {%rs42, %rs43, %rs44, %rs49};
	bra.uni 	$L__BB0_122;

$L__BB0_5:
	ld.const.u64 	%rd24, [params+432];
	cvta.to.global.u64 	%rd25, %rd24;
	ld.const.u32 	%r63, [params+424];
	mad.lo.s32 	%r64, %r63, %r52, %r51;
	mul.wide.u32 	%rd26, %r64, 12;
	add.s64 	%rd27, %rd25, %rd26;
	ld.global.f32 	%f182, [%rd27];
	mul.f32 	%f183, %f182, 0f3456BF95;
	ld.global.f32 	%f184, [%rd27+4];
	mul.f32 	%f185, %f184, 0f3456BF95;
	ld.global.f32 	%f186, [%rd27+8];
	mul.f32 	%f187, %f186, 0f3456BF95;
	abs.f32 	%f188, %f935;
	div.rn.f32 	%f189, %f183, %f188;
	abs.f32 	%f190, %f936;
	div.rn.f32 	%f191, %f185, %f190;
	abs.f32 	%f192, %f937;
	div.rn.f32 	%f193, %f187, %f192;
	abs.f32 	%f194, %f189;
	abs.f32 	%f195, %f191;
	abs.f32 	%f196, %f193;
	mov.f32 	%f197, 0f38D1B717;
	max.f32 	%f198, %f194, %f197;
	max.f32 	%f199, %f195, %f197;
	max.f32 	%f200, %f196, %f197;
	fma.rn.f32 	%f10, %f935, %f198, %f182;
	fma.rn.f32 	%f11, %f936, %f199, %f184;
	fma.rn.f32 	%f12, %f937, %f200, %f186;
	setp.gt.f32 	%p14, %f188, %f192;
	neg.f32 	%f201, %f936;
	selp.f32 	%f202, %f201, 0f00000000, %p14;
	mov.f32 	%f956, 0f00000000;
	neg.f32 	%f203, %f937;
	selp.f32 	%f204, %f935, %f203, %p14;
	selp.f32 	%f205, 0f00000000, %f936, %p14;
	mul.f32 	%f206, %f204, %f204;
	fma.rn.f32 	%f207, %f202, %f202, %f206;
	fma.rn.f32 	%f208, %f205, %f205, %f207;
	sqrt.rn.f32 	%f209, %f208;
	rcp.rn.f32 	%f210, %f209;
	mul.f32 	%f13, %f202, %f210;
	mul.f32 	%f14, %f204, %f210;
	mul.f32 	%f15, %f205, %f210;
	ld.const.u64 	%rd28, [params+128];
	cvta.to.global.u64 	%rd29, %rd28;
	ld.const.u32 	%r65, [params+120];
	mad.lo.s32 	%r66, %r65, %r52, %r51;
	mul.wide.u32 	%rd30, %r66, 4;
	add.s64 	%rd3, %rd29, %rd30;
	setp.lt.s32 	%p15, %r3, 1;
	mov.f32 	%f957, %f956;
	mov.f32 	%f958, %f956;
	mov.f32 	%f959, %f956;
	mov.f32 	%f960, %f956;
	mov.f32 	%f961, %f956;
	@%p15 bra 	$L__BB0_36;

	ld.const.u32 	%r6, [params+588];
	cvt.rn.f32.s32 	%f217, %r3;
	rcp.rn.f32 	%f16, %f217;
	ld.global.u32 	%r325, [%rd3];
	mul.f32 	%f17, %f10, 0f3456BF95;
	mul.f32 	%f18, %f11, 0f3456BF95;
	mul.f32 	%f19, %f12, 0f3456BF95;
	ld.const.u64 	%rd4, [params+96];
	mul.f32 	%f218, %f935, %f14;
	mul.f32 	%f219, %f936, %f13;
	sub.f32 	%f20, %f219, %f218;
	mul.f32 	%f220, %f937, %f13;
	mul.f32 	%f221, %f935, %f15;
	sub.f32 	%f21, %f221, %f220;
	mul.f32 	%f222, %f936, %f15;
	mul.f32 	%f223, %f937, %f14;
	sub.f32 	%f22, %f223, %f222;
	mov.u32 	%r67, 0;
	add.s64 	%rd5, %rd1, 24;
	mov.u64 	%rd31, __cudart_i2opi_f;
	abs.f32 	%f286, %f17;
	abs.f32 	%f287, %f18;
	max.f32 	%f288, %f286, %f287;
	abs.f32 	%f289, %f19;
	max.f32 	%f290, %f288, %f289;
	mov.u32 	%r322, %r67;

$L__BB0_7:
	mov.u32 	%r324, %r67;

$L__BB0_8:
	cvt.rn.f32.s32 	%f882, %r322;
	mad.lo.s32 	%r69, %r325, 1664525, 1013904223;
	and.b32  	%r70, %r69, 16777215;
	cvt.rn.f32.u32 	%f224, %r70;
	fma.rn.f32 	%f225, %f224, 0f33800000, %f882;
	mul.f32 	%f36, %f16, %f225;
	mad.lo.s32 	%r325, %r69, 1664525, 1013904223;
	and.b32  	%r71, %r325, 16777215;
	cvt.rn.f32.u32 	%f226, %r71;
	cvt.rn.f32.s32 	%f227, %r324;
	fma.rn.f32 	%f228, %f226, 0f33800000, %f227;
	mul.f32 	%f229, %f16, %f228;
	mul.f32 	%f230, %f36, %f36;
	mov.f32 	%f231, 0f3F800000;
	sub.f32 	%f232, %f231, %f230;
	mov.f32 	%f233, 0f00000000;
	max.f32 	%f234, %f233, %f232;
	sqrt.rn.f32 	%f37, %f234;
	mul.f32 	%f38, %f229, 0f40C90FDB;
	mul.f32 	%f235, %f38, 0f3F22F983;
	cvt.rni.s32.f32 	%r332, %f235;
	cvt.rn.f32.s32 	%f236, %r332;
	mov.f32 	%f237, 0fBFC90FDA;
	fma.rn.f32 	%f238, %f236, %f237, %f38;
	mov.f32 	%f239, 0fB3A22168;
	fma.rn.f32 	%f240, %f236, %f239, %f238;
	mov.f32 	%f241, 0fA7C234C5;
	fma.rn.f32 	%f953, %f236, %f241, %f240;
	abs.f32 	%f40, %f38;
	setp.ltu.f32 	%p16, %f40, 0f47CE4780;
	mov.u32 	%r329, %r332;
	mov.f32 	%f950, %f953;
	@%p16 bra 	$L__BB0_16;

	setp.eq.f32 	%p17, %f40, 0f7F800000;
	@%p17 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f244, 0f00000000;
	mul.rn.f32 	%f950, %f38, %f244;
	mov.u32 	%r329, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r14, %f38;
	bfe.u32 	%r73, %r14, 23, 8;
	add.s32 	%r15, %r73, -128;
	shl.b32 	%r74, %r14, 8;
	or.b32  	%r16, %r74, -2147483648;
	shr.u32 	%r17, %r15, 5;
	mov.u64 	%rd82, 0;
	mov.u32 	%r326, 0;
	mov.u64 	%rd80, %rd1;
	mov.u64 	%rd81, %rd31;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r75, [%rd81];
	mad.wide.u32 	%rd33, %r75, %r16, %rd82;
	shr.u64 	%rd82, %rd33, 32;
	st.local.u32 	[%rd80], %rd33;
	add.s64 	%rd81, %rd81, 4;
	add.s64 	%rd80, %rd80, 4;
	add.s32 	%r326, %r326, 1;
	setp.ne.s32 	%p18, %r326, 6;
	@%p18 bra 	$L__BB0_11;

	st.local.u32 	[%rd5], %rd82;
	mov.u32 	%r76, 4;
	sub.s32 	%r20, %r76, %r17;
	mov.u32 	%r77, 6;
	sub.s32 	%r78, %r77, %r17;
	mul.wide.s32 	%rd34, %r78, 4;
	add.s64 	%rd35, %rd1, %rd34;
	ld.local.u32 	%r327, [%rd35];
	ld.local.u32 	%r328, [%rd35+-4];
	and.b32  	%r23, %r15, 31;
	setp.eq.s32 	%p19, %r23, 0;
	@%p19 bra 	$L__BB0_14;

	mov.u32 	%r79, 32;
	sub.s32 	%r80, %r79, %r23;
	shr.u32 	%r81, %r328, %r80;
	shl.b32 	%r82, %r327, %r23;
	add.s32 	%r327, %r81, %r82;
	mul.wide.s32 	%rd36, %r20, 4;
	add.s64 	%rd37, %rd1, %rd36;
	ld.local.u32 	%r83, [%rd37];
	shr.u32 	%r84, %r83, %r80;
	shl.b32 	%r85, %r328, %r23;
	add.s32 	%r328, %r84, %r85;

$L__BB0_14:
	and.b32  	%r86, %r14, -2147483648;
	shr.u32 	%r87, %r328, 30;
	shl.b32 	%r88, %r327, 2;
	or.b32  	%r89, %r87, %r88;
	shr.u32 	%r90, %r89, 31;
	shr.u32 	%r91, %r327, 30;
	add.s32 	%r92, %r90, %r91;
	neg.s32 	%r93, %r92;
	setp.eq.s32 	%p20, %r86, 0;
	selp.b32 	%r329, %r92, %r93, %p20;
	setp.ne.s32 	%p21, %r90, 0;
	xor.b32  	%r94, %r86, -2147483648;
	selp.b32 	%r95, %r94, %r86, %p21;
	selp.b32 	%r96, -1, 0, %p21;
	xor.b32  	%r97, %r89, %r96;
	shl.b32 	%r98, %r328, 2;
	xor.b32  	%r99, %r98, %r96;
	cvt.u64.u32 	%rd38, %r97;
	cvt.u64.u32 	%rd39, %r99;
	bfi.b64 	%rd40, %rd38, %rd39, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd40;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f242, %fd2;
	setp.eq.s32 	%p22, %r95, 0;
	neg.f32 	%f243, %f242;
	selp.f32 	%f950, %f242, %f243, %p22;

$L__BB0_16:
	add.s32 	%r30, %r329, 1;
	and.b32  	%r31, %r30, 1;
	setp.eq.s32 	%p23, %r31, 0;
	selp.f32 	%f44, %f950, 0f3F800000, %p23;
	mul.rn.f32 	%f45, %f950, %f950;
	mov.f32 	%f951, 0fB94D4153;
	@%p23 bra 	$L__BB0_18;

	mov.f32 	%f246, 0fBAB607ED;
	mov.f32 	%f247, 0f37CBAC00;
	fma.rn.f32 	%f951, %f247, %f45, %f246;

$L__BB0_18:
	selp.f32 	%f248, 0f3C0885E4, 0f3D2AAABB, %p23;
	fma.rn.f32 	%f249, %f951, %f45, %f248;
	selp.f32 	%f250, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
	fma.rn.f32 	%f251, %f249, %f45, %f250;
	mov.f32 	%f252, 0f00000000;
	fma.rn.f32 	%f253, %f45, %f44, %f252;
	fma.rn.f32 	%f952, %f251, %f253, %f44;
	and.b32  	%r101, %r30, 2;
	setp.eq.s32 	%p25, %r101, 0;
	@%p25 bra 	$L__BB0_20;

	mov.f32 	%f255, 0fBF800000;
	fma.rn.f32 	%f952, %f952, %f255, %f252;

$L__BB0_20:
	@%p16 bra 	$L__BB0_28;

	setp.eq.f32 	%p27, %f40, 0f7F800000;
	@%p27 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f258, 0f00000000;
	mul.rn.f32 	%f953, %f38, %f258;
	mov.u32 	%r332, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r32, %f38;
	bfe.u32 	%r102, %r32, 23, 8;
	add.s32 	%r33, %r102, -128;
	shl.b32 	%r103, %r32, 8;
	or.b32  	%r34, %r103, -2147483648;
	shr.u32 	%r35, %r33, 5;
	mov.u64 	%rd83, 0;
	mov.u64 	%rd84, %rd83;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd43, %rd83, 2;
	mov.u64 	%rd44, __cudart_i2opi_f;
	add.s64 	%rd45, %rd44, %rd43;
	ld.global.nc.u32 	%r104, [%rd45];
	mad.wide.u32 	%rd46, %r104, %r34, %rd84;
	shr.u64 	%rd84, %rd46, 32;
	add.s64 	%rd47, %rd1, %rd43;
	st.local.u32 	[%rd47], %rd46;
	cvt.u32.u64 	%r105, %rd83;
	add.s32 	%r106, %r105, 1;
	cvt.s64.s32 	%rd83, %r106;
	setp.ne.s32 	%p28, %r106, 6;
	@%p28 bra 	$L__BB0_23;

	st.local.u32 	[%rd5], %rd84;
	mov.u32 	%r107, 4;
	sub.s32 	%r36, %r107, %r35;
	mov.u32 	%r108, 6;
	sub.s32 	%r109, %r108, %r35;
	mul.wide.s32 	%rd48, %r109, 4;
	add.s64 	%rd49, %rd1, %rd48;
	ld.local.u32 	%r330, [%rd49];
	ld.local.u32 	%r331, [%rd49+-4];
	and.b32  	%r39, %r33, 31;
	setp.eq.s32 	%p29, %r39, 0;
	@%p29 bra 	$L__BB0_26;

	mov.u32 	%r110, 32;
	sub.s32 	%r111, %r110, %r39;
	shr.u32 	%r112, %r331, %r111;
	shl.b32 	%r113, %r330, %r39;
	add.s32 	%r330, %r112, %r113;
	mul.wide.s32 	%rd50, %r36, 4;
	add.s64 	%rd51, %rd1, %rd50;
	ld.local.u32 	%r114, [%rd51];
	shr.u32 	%r115, %r114, %r111;
	shl.b32 	%r116, %r331, %r39;
	add.s32 	%r331, %r115, %r116;

$L__BB0_26:
	and.b32  	%r117, %r32, -2147483648;
	shr.u32 	%r118, %r331, 30;
	shl.b32 	%r119, %r330, 2;
	or.b32  	%r120, %r118, %r119;
	shr.u32 	%r121, %r120, 31;
	shr.u32 	%r122, %r330, 30;
	add.s32 	%r123, %r121, %r122;
	neg.s32 	%r124, %r123;
	setp.eq.s32 	%p30, %r117, 0;
	selp.b32 	%r332, %r123, %r124, %p30;
	setp.ne.s32 	%p31, %r121, 0;
	xor.b32  	%r125, %r117, -2147483648;
	selp.b32 	%r126, %r125, %r117, %p31;
	selp.b32 	%r127, -1, 0, %p31;
	xor.b32  	%r128, %r120, %r127;
	shl.b32 	%r129, %r331, 2;
	xor.b32  	%r130, %r129, %r127;
	cvt.u64.u32 	%rd52, %r128;
	cvt.u64.u32 	%rd53, %r130;
	bfi.b64 	%rd54, %rd52, %rd53, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd54;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f256, %fd4;
	setp.eq.s32 	%p32, %r126, 0;
	neg.f32 	%f257, %f256;
	selp.f32 	%f953, %f256, %f257, %p32;

$L__BB0_28:
	mul.f32 	%f54, %f37, %f952;
	and.b32  	%r46, %r332, 1;
	setp.eq.s32 	%p33, %r46, 0;
	selp.f32 	%f55, %f953, 0f3F800000, %p33;
	mul.rn.f32 	%f56, %f953, %f953;
	mov.f32 	%f954, 0fB94D4153;
	@%p33 bra 	$L__BB0_30;

	mov.f32 	%f260, 0fBAB607ED;
	mov.f32 	%f261, 0f37CBAC00;
	fma.rn.f32 	%f954, %f261, %f56, %f260;

$L__BB0_30:
	selp.f32 	%f262, 0f3C0885E4, 0f3D2AAABB, %p33;
	fma.rn.f32 	%f263, %f954, %f56, %f262;
	selp.f32 	%f264, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
	fma.rn.f32 	%f265, %f263, %f56, %f264;
	mov.f32 	%f266, 0f00000000;
	fma.rn.f32 	%f267, %f56, %f55, %f266;
	fma.rn.f32 	%f955, %f265, %f267, %f55;
	and.b32  	%r132, %r332, 2;
	setp.eq.s32 	%p35, %r132, 0;
	@%p35 bra 	$L__BB0_32;

	mov.f32 	%f269, 0fBF800000;
	fma.rn.f32 	%f955, %f955, %f269, %f266;

$L__BB0_32:
	mul.f32 	%f270, %f37, %f955;
	mul.f32 	%f271, %f13, %f270;
	mul.f32 	%f272, %f14, %f270;
	mul.f32 	%f273, %f15, %f270;
	fma.rn.f32 	%f274, %f22, %f54, %f271;
	fma.rn.f32 	%f275, %f21, %f54, %f272;
	fma.rn.f32 	%f276, %f20, %f54, %f273;
	fma.rn.f32 	%f62, %f935, %f36, %f274;
	fma.rn.f32 	%f63, %f936, %f36, %f275;
	fma.rn.f32 	%f64, %f937, %f36, %f276;
	setp.leu.f32 	%p36, %f63, 0f00000000;
	setp.ne.s32 	%p37, %r6, 0;
	and.pred  	%p38, %p37, %p36;
	@%p38 bra 	$L__BB0_34;

	mov.f32 	%f291, 0f38D1B717;
	max.f32 	%f283, %f290, %f291;
	mov.f32 	%f284, 0f6C4ECB8F;
	mov.f32 	%f285, 0f00000000;
	mov.u32 	%r169, 2;
	mov.u32 	%r170, 1;
	mov.u32 	%r171, 3;
	mov.u32 	%r174, 1065353216;
	mov.u32 	%r203, 0;
	// begin inline asm
	call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd4,%f10,%f11,%f12,%f62,%f63,%f64,%f283,%f284,%f285,%r170,%r203,%r170,%r169,%r170,%r171,%r174,%r174,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f292, %r133;
	mov.b32 	%f293, %r134;
	mov.b32 	%f294, %r135;
	fma.rn.f32 	%f956, %f62, %f292, %f956;
	fma.rn.f32 	%f957, %f63, %f293, %f957;
	fma.rn.f32 	%f958, %f64, %f294, %f958;
	mul.f32 	%f295, %f936, %f63;
	fma.rn.f32 	%f296, %f935, %f62, %f295;
	fma.rn.f32 	%f297, %f937, %f64, %f296;
	cvt.sat.f32.f32 	%f298, %f297;
	fma.rn.f32 	%f959, %f298, %f292, %f959;
	fma.rn.f32 	%f960, %f298, %f293, %f960;
	fma.rn.f32 	%f961, %f298, %f294, %f961;

$L__BB0_34:
	add.s32 	%r324, %r324, 1;
	setp.lt.s32 	%p39, %r324, %r3;
	@%p39 bra 	$L__BB0_8;

	add.s32 	%r322, %r322, 1;
	setp.lt.s32 	%p40, %r322, %r3;
	@%p40 bra 	$L__BB0_7;

$L__BB0_36:
	mul.lo.s32 	%r204, %r3, %r3;
	cvt.rn.f32.s32 	%f299, %r204;
	rcp.rn.f32 	%f300, %f299;
	mul.f32 	%f301, %f300, %f959;
	mul.f32 	%f302, %f300, %f960;
	mul.f32 	%f303, %f300, %f961;
	fma.rn.f32 	%f304, %f300, %f959, %f301;
	fma.rn.f32 	%f305, %f300, %f960, %f302;
	fma.rn.f32 	%f306, %f300, %f961, %f303;
	ld.const.v4.f32 	{%f307, %f308, %f309, %f310}, [params+576];
	mul.f32 	%f83, %f304, %f307;
	mul.f32 	%f84, %f305, %f308;
	mul.f32 	%f85, %f306, %f309;
	ld.const.u32 	%r49, [params+104];
	and.b32  	%r205, %r49, 1;
	setp.eq.b32 	%p41, %r205, 1;
	mov.pred 	%p42, 0;
	xor.pred  	%p43, %p41, %p42;
	not.pred 	%p44, %p43;
	@%p44 bra 	$L__BB0_110;

	mov.f32 	%f318, 0f3EE66666;
	abs.f32 	%f87, %f83;
	setp.lt.f32 	%p45, %f87, 0f00800000;
	mul.f32 	%f320, %f87, 0f4B800000;
	selp.f32 	%f321, %f320, %f87, %p45;
	selp.f32 	%f322, 0fC3170000, 0fC2FE0000, %p45;
	mov.b32 	%r206, %f321;
	and.b32  	%r207, %r206, 8388607;
	or.b32  	%r208, %r207, 1065353216;
	mov.b32 	%f323, %r208;
	shr.u32 	%r209, %r206, 23;
	cvt.rn.f32.u32 	%f324, %r209;
	add.f32 	%f325, %f322, %f324;
	setp.gt.f32 	%p46, %f323, 0f3FB504F3;
	mul.f32 	%f326, %f323, 0f3F000000;
	add.f32 	%f327, %f325, 0f3F800000;
	selp.f32 	%f328, %f327, %f325, %p46;
	selp.f32 	%f329, %f326, %f323, %p46;
	add.f32 	%f330, %f329, 0fBF800000;
	add.f32 	%f331, %f329, 0f3F800000;
	rcp.approx.ftz.f32 	%f332, %f331;
	add.f32 	%f333, %f330, %f330;
	mul.f32 	%f334, %f333, %f332;
	mul.f32 	%f335, %f334, %f334;
	mov.f32 	%f336, 0f3C4CAF63;
	mov.f32 	%f337, 0f3B18F0FE;
	fma.rn.f32 	%f338, %f337, %f335, %f336;
	mov.f32 	%f339, 0f3DAAAABD;
	fma.rn.f32 	%f340, %f338, %f335, %f339;
	mul.rn.f32 	%f341, %f340, %f335;
	mul.rn.f32 	%f342, %f341, %f334;
	sub.f32 	%f343, %f330, %f334;
	add.f32 	%f344, %f343, %f343;
	neg.f32 	%f345, %f334;
	fma.rn.f32 	%f346, %f345, %f330, %f344;
	mul.rn.f32 	%f347, %f332, %f346;
	add.f32 	%f348, %f342, %f334;
	sub.f32 	%f349, %f334, %f348;
	add.f32 	%f350, %f342, %f349;
	add.f32 	%f351, %f347, %f350;
	add.f32 	%f352, %f348, %f351;
	sub.f32 	%f353, %f348, %f352;
	add.f32 	%f354, %f351, %f353;
	mov.f32 	%f355, 0f3F317200;
	mul.rn.f32 	%f356, %f328, %f355;
	mov.f32 	%f357, 0f35BFBE8E;
	mul.rn.f32 	%f358, %f328, %f357;
	add.f32 	%f359, %f356, %f352;
	sub.f32 	%f360, %f356, %f359;
	add.f32 	%f361, %f352, %f360;
	add.f32 	%f362, %f354, %f361;
	add.f32 	%f363, %f358, %f362;
	add.f32 	%f364, %f359, %f363;
	sub.f32 	%f365, %f359, %f364;
	add.f32 	%f366, %f363, %f365;
	mul.rn.f32 	%f367, %f318, %f364;
	neg.f32 	%f368, %f367;
	fma.rn.f32 	%f369, %f318, %f364, %f368;
	fma.rn.f32 	%f370, %f318, %f366, %f369;
	mov.f32 	%f371, 0f00000000;
	fma.rn.f32 	%f372, %f371, %f364, %f370;
	add.rn.f32 	%f373, %f367, %f372;
	neg.f32 	%f374, %f373;
	add.rn.f32 	%f375, %f367, %f374;
	add.rn.f32 	%f376, %f375, %f372;
	mov.b32 	%r210, %f373;
	setp.eq.s32 	%p47, %r210, 1118925336;
	add.s32 	%r211, %r210, -1;
	mov.b32 	%f377, %r211;
	add.f32 	%f378, %f376, 0f37000000;
	selp.f32 	%f88, %f378, %f376, %p47;
	selp.f32 	%f379, %f377, %f373, %p47;
	mov.f32 	%f380, 0f3FB8AA3B;
	mul.rn.f32 	%f381, %f379, %f380;
	cvt.rzi.f32.f32 	%f382, %f381;
	abs.f32 	%f383, %f382;
	setp.gt.f32 	%p48, %f383, 0f42FC0000;
	mov.b32 	%r212, %f382;
	and.b32  	%r213, %r212, -2147483648;
	or.b32  	%r214, %r213, 1123811328;
	mov.b32 	%f384, %r214;
	selp.f32 	%f385, %f384, %f382, %p48;
	mov.f32 	%f386, 0fBF317218;
	fma.rn.f32 	%f387, %f385, %f386, %f379;
	mov.f32 	%f388, 0f3102E308;
	fma.rn.f32 	%f389, %f385, %f388, %f387;
	mul.f32 	%f390, %f389, 0f3FB8AA3B;
	add.f32 	%f391, %f385, 0f4B40007F;
	mov.b32 	%r215, %f391;
	shl.b32 	%r216, %r215, 23;
	mov.b32 	%f392, %r216;
	ex2.approx.ftz.f32 	%f393, %f390;
	mul.f32 	%f89, %f393, %f392;
	setp.eq.f32 	%p49, %f89, 0f7F800000;
	mov.f32 	%f968, 0f7F800000;
	@%p49 bra 	$L__BB0_39;

	fma.rn.f32 	%f968, %f89, %f88, %f89;

$L__BB0_39:
	mov.f32 	%f888, 0f3E666666;
	cvt.rzi.f32.f32 	%f887, %f888;
	add.f32 	%f886, %f887, %f887;
	mov.f32 	%f885, 0f3EE66666;
	sub.f32 	%f884, %f885, %f886;
	abs.f32 	%f883, %f884;
	setp.lt.f32 	%p50, %f83, 0f00000000;
	setp.eq.f32 	%p51, %f883, 0f3F800000;
	and.pred  	%p1, %p50, %p51;
	setp.eq.f32 	%p52, %f83, 0f00000000;
	@%p52 bra 	$L__BB0_43;
	bra.uni 	$L__BB0_40;

$L__BB0_43:
	add.f32 	%f398, %f83, %f83;
	selp.f32 	%f970, %f398, 0f00000000, %p51;
	bra.uni 	$L__BB0_44;

$L__BB0_121:
	mov.f32 	%f875, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs52, %f875;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs51, %f875;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f875;}

	// end inline asm
	mov.u16 	%rs53, 0;
	st.global.v4.u16 	[%rd19], {%rs50, %rs51, %rs52, %rs53};

$L__BB0_122:
	and.b32  	%r315, %r50, 64;
	setp.eq.s32 	%p147, %r315, 0;
	@%p147 bra 	$L__BB0_124;

	ld.const.u64 	%rd73, [params+208];
	cvta.to.global.u64 	%rd74, %rd73;
	ld.const.u32 	%r316, [params+200];
	mad.lo.s32 	%r317, %r316, %r5, %r4;
	mul.wide.u32 	%rd75, %r317, 4;
	add.s64 	%rd76, %rd74, %rd75;
	mov.u16 	%rs54, 0;
	st.global.v4.u8 	[%rd76], {%rs54, %rs54, %rs54, %rs54};
	bra.uni 	$L__BB0_124;

$L__BB0_40:
	mov.b32 	%r217, %f968;
	xor.b32  	%r218, %r217, -2147483648;
	mov.b32 	%f394, %r218;
	selp.f32 	%f970, %f394, %f968, %p1;
	setp.geu.f32 	%p53, %f83, 0f00000000;
	@%p53 bra 	$L__BB0_44;

	mov.f32 	%f395, 0f3EE66666;
	cvt.rzi.f32.f32 	%f396, %f395;
	setp.eq.f32 	%p54, %f396, 0f3EE66666;
	@%p54 bra 	$L__BB0_44;

	mov.f32 	%f970, 0f7FFFFFFF;

$L__BB0_44:
	abs.f32 	%f889, %f83;
	add.f32 	%f399, %f889, 0f3EE66666;
	mov.b32 	%r219, %f399;
	setp.lt.s32 	%p56, %r219, 2139095040;
	@%p56 bra 	$L__BB0_49;

	abs.f32 	%f890, %f83;
	setp.gtu.f32 	%p57, %f890, 0f7F800000;
	@%p57 bra 	$L__BB0_48;
	bra.uni 	$L__BB0_46;

$L__BB0_48:
	add.f32 	%f970, %f83, 0f3EE66666;
	bra.uni 	$L__BB0_49;

$L__BB0_46:
	abs.f32 	%f891, %f83;
	setp.neu.f32 	%p58, %f891, 0f7F800000;
	@%p58 bra 	$L__BB0_49;

	selp.f32 	%f970, 0fFF800000, 0f7F800000, %p1;

$L__BB0_49:
	setp.eq.f32 	%p59, %f83, 0f3F800000;
	selp.f32 	%f98, 0f3F800000, %f970, %p59;
	abs.f32 	%f99, %f84;
	setp.lt.f32 	%p60, %f99, 0f00800000;
	mul.f32 	%f401, %f99, 0f4B800000;
	selp.f32 	%f402, %f401, %f99, %p60;
	selp.f32 	%f403, 0fC3170000, 0fC2FE0000, %p60;
	mov.b32 	%r220, %f402;
	and.b32  	%r221, %r220, 8388607;
	or.b32  	%r222, %r221, 1065353216;
	mov.b32 	%f404, %r222;
	shr.u32 	%r223, %r220, 23;
	cvt.rn.f32.u32 	%f405, %r223;
	add.f32 	%f406, %f403, %f405;
	setp.gt.f32 	%p61, %f404, 0f3FB504F3;
	mul.f32 	%f407, %f404, 0f3F000000;
	add.f32 	%f408, %f406, 0f3F800000;
	selp.f32 	%f409, %f408, %f406, %p61;
	selp.f32 	%f410, %f407, %f404, %p61;
	add.f32 	%f411, %f410, 0fBF800000;
	add.f32 	%f412, %f410, 0f3F800000;
	rcp.approx.ftz.f32 	%f413, %f412;
	add.f32 	%f414, %f411, %f411;
	mul.f32 	%f415, %f414, %f413;
	mul.f32 	%f416, %f415, %f415;
	mov.f32 	%f417, 0f3C4CAF63;
	mov.f32 	%f418, 0f3B18F0FE;
	fma.rn.f32 	%f419, %f418, %f416, %f417;
	mov.f32 	%f420, 0f3DAAAABD;
	fma.rn.f32 	%f421, %f419, %f416, %f420;
	mul.rn.f32 	%f422, %f421, %f416;
	mul.rn.f32 	%f423, %f422, %f415;
	sub.f32 	%f424, %f411, %f415;
	add.f32 	%f425, %f424, %f424;
	neg.f32 	%f426, %f415;
	fma.rn.f32 	%f427, %f426, %f411, %f425;
	mul.rn.f32 	%f428, %f413, %f427;
	add.f32 	%f429, %f423, %f415;
	sub.f32 	%f430, %f415, %f429;
	add.f32 	%f431, %f423, %f430;
	add.f32 	%f432, %f428, %f431;
	add.f32 	%f433, %f429, %f432;
	sub.f32 	%f434, %f429, %f433;
	add.f32 	%f435, %f432, %f434;
	mov.f32 	%f436, 0f3F317200;
	mul.rn.f32 	%f437, %f409, %f436;
	mov.f32 	%f438, 0f35BFBE8E;
	mul.rn.f32 	%f439, %f409, %f438;
	add.f32 	%f440, %f437, %f433;
	sub.f32 	%f441, %f437, %f440;
	add.f32 	%f442, %f433, %f441;
	add.f32 	%f443, %f435, %f442;
	add.f32 	%f444, %f439, %f443;
	add.f32 	%f445, %f440, %f444;
	sub.f32 	%f446, %f440, %f445;
	add.f32 	%f447, %f444, %f446;
	mov.f32 	%f448, 0f3EE66666;
	mul.rn.f32 	%f449, %f448, %f445;
	neg.f32 	%f450, %f449;
	fma.rn.f32 	%f451, %f448, %f445, %f450;
	fma.rn.f32 	%f452, %f448, %f447, %f451;
	mov.f32 	%f453, 0f00000000;
	fma.rn.f32 	%f454, %f453, %f445, %f452;
	add.rn.f32 	%f455, %f449, %f454;
	neg.f32 	%f456, %f455;
	add.rn.f32 	%f457, %f449, %f456;
	add.rn.f32 	%f458, %f457, %f454;
	mov.b32 	%r224, %f455;
	setp.eq.s32 	%p62, %r224, 1118925336;
	add.s32 	%r225, %r224, -1;
	mov.b32 	%f459, %r225;
	add.f32 	%f460, %f458, 0f37000000;
	selp.f32 	%f100, %f460, %f458, %p62;
	selp.f32 	%f461, %f459, %f455, %p62;
	mov.f32 	%f462, 0f3FB8AA3B;
	mul.rn.f32 	%f463, %f461, %f462;
	cvt.rzi.f32.f32 	%f464, %f463;
	abs.f32 	%f465, %f464;
	setp.gt.f32 	%p63, %f465, 0f42FC0000;
	mov.b32 	%r226, %f464;
	and.b32  	%r227, %r226, -2147483648;
	or.b32  	%r228, %r227, 1123811328;
	mov.b32 	%f466, %r228;
	selp.f32 	%f467, %f466, %f464, %p63;
	mov.f32 	%f468, 0fBF317218;
	fma.rn.f32 	%f469, %f467, %f468, %f461;
	mov.f32 	%f470, 0f3102E308;
	fma.rn.f32 	%f471, %f467, %f470, %f469;
	mul.f32 	%f472, %f471, 0f3FB8AA3B;
	add.f32 	%f473, %f467, 0f4B40007F;
	mov.b32 	%r229, %f473;
	shl.b32 	%r230, %r229, 23;
	mov.b32 	%f474, %r230;
	ex2.approx.ftz.f32 	%f475, %f472;
	mul.f32 	%f101, %f475, %f474;
	setp.eq.f32 	%p64, %f101, 0f7F800000;
	mov.f32 	%f971, 0f7F800000;
	@%p64 bra 	$L__BB0_51;

	fma.rn.f32 	%f971, %f101, %f100, %f101;

$L__BB0_51:
	setp.lt.f32 	%p65, %f84, 0f00000000;
	and.pred  	%p2, %p65, %p51;
	setp.eq.f32 	%p67, %f84, 0f00000000;
	@%p67 bra 	$L__BB0_55;
	bra.uni 	$L__BB0_52;

$L__BB0_55:
	add.f32 	%f480, %f84, %f84;
	selp.f32 	%f973, %f480, 0f00000000, %p51;
	bra.uni 	$L__BB0_56;

$L__BB0_52:
	mov.b32 	%r231, %f971;
	xor.b32  	%r232, %r231, -2147483648;
	mov.b32 	%f476, %r232;
	selp.f32 	%f973, %f476, %f971, %p2;
	setp.geu.f32 	%p68, %f84, 0f00000000;
	@%p68 bra 	$L__BB0_56;

	mov.f32 	%f477, 0f3EE66666;
	cvt.rzi.f32.f32 	%f478, %f477;
	setp.eq.f32 	%p69, %f478, 0f3EE66666;
	@%p69 bra 	$L__BB0_56;

	mov.f32 	%f973, 0f7FFFFFFF;

$L__BB0_56:
	abs.f32 	%f892, %f84;
	add.f32 	%f481, %f892, 0f3EE66666;
	mov.b32 	%r233, %f481;
	setp.lt.s32 	%p71, %r233, 2139095040;
	@%p71 bra 	$L__BB0_61;

	abs.f32 	%f893, %f84;
	setp.gtu.f32 	%p72, %f893, 0f7F800000;
	@%p72 bra 	$L__BB0_60;
	bra.uni 	$L__BB0_58;

$L__BB0_60:
	add.f32 	%f973, %f84, 0f3EE66666;
	bra.uni 	$L__BB0_61;

$L__BB0_58:
	abs.f32 	%f894, %f84;
	setp.neu.f32 	%p73, %f894, 0f7F800000;
	@%p73 bra 	$L__BB0_61;

	selp.f32 	%f973, 0fFF800000, 0f7F800000, %p2;

$L__BB0_61:
	setp.eq.f32 	%p74, %f84, 0f3F800000;
	selp.f32 	%f110, 0f3F800000, %f973, %p74;
	abs.f32 	%f111, %f85;
	setp.lt.f32 	%p75, %f111, 0f00800000;
	mul.f32 	%f483, %f111, 0f4B800000;
	selp.f32 	%f484, %f483, %f111, %p75;
	selp.f32 	%f485, 0fC3170000, 0fC2FE0000, %p75;
	mov.b32 	%r234, %f484;
	and.b32  	%r235, %r234, 8388607;
	or.b32  	%r236, %r235, 1065353216;
	mov.b32 	%f486, %r236;
	shr.u32 	%r237, %r234, 23;
	cvt.rn.f32.u32 	%f487, %r237;
	add.f32 	%f488, %f485, %f487;
	setp.gt.f32 	%p76, %f486, 0f3FB504F3;
	mul.f32 	%f489, %f486, 0f3F000000;
	add.f32 	%f490, %f488, 0f3F800000;
	selp.f32 	%f491, %f490, %f488, %p76;
	selp.f32 	%f492, %f489, %f486, %p76;
	add.f32 	%f493, %f492, 0fBF800000;
	add.f32 	%f494, %f492, 0f3F800000;
	rcp.approx.ftz.f32 	%f495, %f494;
	add.f32 	%f496, %f493, %f493;
	mul.f32 	%f497, %f496, %f495;
	mul.f32 	%f498, %f497, %f497;
	mov.f32 	%f499, 0f3C4CAF63;
	mov.f32 	%f500, 0f3B18F0FE;
	fma.rn.f32 	%f501, %f500, %f498, %f499;
	mov.f32 	%f502, 0f3DAAAABD;
	fma.rn.f32 	%f503, %f501, %f498, %f502;
	mul.rn.f32 	%f504, %f503, %f498;
	mul.rn.f32 	%f505, %f504, %f497;
	sub.f32 	%f506, %f493, %f497;
	add.f32 	%f507, %f506, %f506;
	neg.f32 	%f508, %f497;
	fma.rn.f32 	%f509, %f508, %f493, %f507;
	mul.rn.f32 	%f510, %f495, %f509;
	add.f32 	%f511, %f505, %f497;
	sub.f32 	%f512, %f497, %f511;
	add.f32 	%f513, %f505, %f512;
	add.f32 	%f514, %f510, %f513;
	add.f32 	%f515, %f511, %f514;
	sub.f32 	%f516, %f511, %f515;
	add.f32 	%f517, %f514, %f516;
	mov.f32 	%f518, 0f3F317200;
	mul.rn.f32 	%f519, %f491, %f518;
	mov.f32 	%f520, 0f35BFBE8E;
	mul.rn.f32 	%f521, %f491, %f520;
	add.f32 	%f522, %f519, %f515;
	sub.f32 	%f523, %f519, %f522;
	add.f32 	%f524, %f515, %f523;
	add.f32 	%f525, %f517, %f524;
	add.f32 	%f526, %f521, %f525;
	add.f32 	%f527, %f522, %f526;
	sub.f32 	%f528, %f522, %f527;
	add.f32 	%f529, %f526, %f528;
	mov.f32 	%f530, 0f3EE66666;
	mul.rn.f32 	%f531, %f530, %f527;
	neg.f32 	%f532, %f531;
	fma.rn.f32 	%f533, %f530, %f527, %f532;
	fma.rn.f32 	%f534, %f530, %f529, %f533;
	mov.f32 	%f535, 0f00000000;
	fma.rn.f32 	%f536, %f535, %f527, %f534;
	add.rn.f32 	%f537, %f531, %f536;
	neg.f32 	%f538, %f537;
	add.rn.f32 	%f539, %f531, %f538;
	add.rn.f32 	%f540, %f539, %f536;
	mov.b32 	%r238, %f537;
	setp.eq.s32 	%p77, %r238, 1118925336;
	add.s32 	%r239, %r238, -1;
	mov.b32 	%f541, %r239;
	add.f32 	%f542, %f540, 0f37000000;
	selp.f32 	%f112, %f542, %f540, %p77;
	selp.f32 	%f543, %f541, %f537, %p77;
	mov.f32 	%f544, 0f3FB8AA3B;
	mul.rn.f32 	%f545, %f543, %f544;
	cvt.rzi.f32.f32 	%f546, %f545;
	abs.f32 	%f547, %f546;
	setp.gt.f32 	%p78, %f547, 0f42FC0000;
	mov.b32 	%r240, %f546;
	and.b32  	%r241, %r240, -2147483648;
	or.b32  	%r242, %r241, 1123811328;
	mov.b32 	%f548, %r242;
	selp.f32 	%f549, %f548, %f546, %p78;
	mov.f32 	%f550, 0fBF317218;
	fma.rn.f32 	%f551, %f549, %f550, %f543;
	mov.f32 	%f552, 0f3102E308;
	fma.rn.f32 	%f553, %f549, %f552, %f551;
	mul.f32 	%f554, %f553, 0f3FB8AA3B;
	add.f32 	%f555, %f549, 0f4B40007F;
	mov.b32 	%r243, %f555;
	shl.b32 	%r244, %r243, 23;
	mov.b32 	%f556, %r244;
	ex2.approx.ftz.f32 	%f557, %f554;
	mul.f32 	%f113, %f557, %f556;
	setp.eq.f32 	%p79, %f113, 0f7F800000;
	mov.f32 	%f974, 0f7F800000;
	@%p79 bra 	$L__BB0_63;

	fma.rn.f32 	%f974, %f113, %f112, %f113;

$L__BB0_63:
	setp.lt.f32 	%p80, %f85, 0f00000000;
	and.pred  	%p3, %p80, %p51;
	setp.eq.f32 	%p82, %f85, 0f00000000;
	@%p82 bra 	$L__BB0_67;
	bra.uni 	$L__BB0_64;

$L__BB0_67:
	add.f32 	%f562, %f85, %f85;
	selp.f32 	%f976, %f562, 0f00000000, %p51;
	bra.uni 	$L__BB0_68;

$L__BB0_64:
	mov.b32 	%r245, %f974;
	xor.b32  	%r246, %r245, -2147483648;
	mov.b32 	%f558, %r246;
	selp.f32 	%f976, %f558, %f974, %p3;
	setp.geu.f32 	%p83, %f85, 0f00000000;
	@%p83 bra 	$L__BB0_68;

	mov.f32 	%f559, 0f3EE66666;
	cvt.rzi.f32.f32 	%f560, %f559;
	setp.eq.f32 	%p84, %f560, 0f3EE66666;
	@%p84 bra 	$L__BB0_68;

	mov.f32 	%f976, 0f7FFFFFFF;

$L__BB0_68:
	abs.f32 	%f895, %f85;
	add.f32 	%f563, %f895, 0f3EE66666;
	mov.b32 	%r247, %f563;
	setp.lt.s32 	%p86, %r247, 2139095040;
	@%p86 bra 	$L__BB0_73;

	abs.f32 	%f896, %f85;
	setp.gtu.f32 	%p87, %f896, 0f7F800000;
	@%p87 bra 	$L__BB0_72;
	bra.uni 	$L__BB0_70;

$L__BB0_72:
	add.f32 	%f976, %f85, 0f3EE66666;
	bra.uni 	$L__BB0_73;

$L__BB0_70:
	abs.f32 	%f897, %f85;
	setp.neu.f32 	%p88, %f897, 0f7F800000;
	@%p88 bra 	$L__BB0_73;

	selp.f32 	%f976, 0fFF800000, 0f7F800000, %p3;

$L__BB0_73:
	setp.eq.f32 	%p89, %f85, 0f3F800000;
	mov.f32 	%f565, 0f3F800000;
	selp.f32 	%f566, 0f3F800000, %f976, %p89;
	min.f32 	%f567, %f98, %f565;
	mov.f32 	%f568, 0f00000000;
	max.f32 	%f122, %f568, %f567;
	min.f32 	%f569, %f110, %f565;
	max.f32 	%f123, %f568, %f569;
	min.f32 	%f570, %f566, %f565;
	max.f32 	%f124, %f568, %f570;
	mov.f32 	%f574, 0f3ED55555;
	abs.f32 	%f126, %f122;
	setp.lt.f32 	%p90, %f126, 0f00800000;
	mul.f32 	%f576, %f126, 0f4B800000;
	selp.f32 	%f577, %f576, %f126, %p90;
	selp.f32 	%f578, 0fC3170000, 0fC2FE0000, %p90;
	mov.b32 	%r250, %f577;
	and.b32  	%r251, %r250, 8388607;
	or.b32  	%r252, %r251, 1065353216;
	mov.b32 	%f579, %r252;
	shr.u32 	%r253, %r250, 23;
	cvt.rn.f32.u32 	%f580, %r253;
	add.f32 	%f581, %f578, %f580;
	setp.gt.f32 	%p91, %f579, 0f3FB504F3;
	mul.f32 	%f582, %f579, 0f3F000000;
	add.f32 	%f583, %f581, 0f3F800000;
	selp.f32 	%f584, %f583, %f581, %p91;
	selp.f32 	%f585, %f582, %f579, %p91;
	add.f32 	%f586, %f585, 0fBF800000;
	add.f32 	%f587, %f585, 0f3F800000;
	rcp.approx.ftz.f32 	%f588, %f587;
	add.f32 	%f589, %f586, %f586;
	mul.f32 	%f590, %f589, %f588;
	mul.f32 	%f591, %f590, %f590;
	mov.f32 	%f592, 0f3C4CAF63;
	mov.f32 	%f593, 0f3B18F0FE;
	fma.rn.f32 	%f594, %f593, %f591, %f592;
	mov.f32 	%f595, 0f3DAAAABD;
	fma.rn.f32 	%f596, %f594, %f591, %f595;
	mul.rn.f32 	%f597, %f596, %f591;
	mul.rn.f32 	%f598, %f597, %f590;
	sub.f32 	%f599, %f586, %f590;
	add.f32 	%f600, %f599, %f599;
	neg.f32 	%f601, %f590;
	fma.rn.f32 	%f602, %f601, %f586, %f600;
	mul.rn.f32 	%f603, %f588, %f602;
	add.f32 	%f604, %f598, %f590;
	sub.f32 	%f605, %f590, %f604;
	add.f32 	%f606, %f598, %f605;
	add.f32 	%f607, %f603, %f606;
	add.f32 	%f608, %f604, %f607;
	sub.f32 	%f609, %f604, %f608;
	add.f32 	%f610, %f607, %f609;
	mov.f32 	%f611, 0f3F317200;
	mul.rn.f32 	%f612, %f584, %f611;
	mov.f32 	%f613, 0f35BFBE8E;
	mul.rn.f32 	%f614, %f584, %f613;
	add.f32 	%f615, %f612, %f608;
	sub.f32 	%f616, %f612, %f615;
	add.f32 	%f617, %f608, %f616;
	add.f32 	%f618, %f610, %f617;
	add.f32 	%f619, %f614, %f618;
	add.f32 	%f620, %f615, %f619;
	sub.f32 	%f621, %f615, %f620;
	add.f32 	%f622, %f619, %f621;
	mul.rn.f32 	%f623, %f574, %f620;
	neg.f32 	%f624, %f623;
	fma.rn.f32 	%f625, %f574, %f620, %f624;
	fma.rn.f32 	%f626, %f574, %f622, %f625;
	fma.rn.f32 	%f627, %f568, %f620, %f626;
	add.rn.f32 	%f628, %f623, %f627;
	neg.f32 	%f629, %f628;
	add.rn.f32 	%f630, %f623, %f629;
	add.rn.f32 	%f631, %f630, %f627;
	mov.b32 	%r254, %f628;
	setp.eq.s32 	%p92, %r254, 1118925336;
	add.s32 	%r255, %r254, -1;
	mov.b32 	%f632, %r255;
	add.f32 	%f633, %f631, 0f37000000;
	selp.f32 	%f127, %f633, %f631, %p92;
	selp.f32 	%f634, %f632, %f628, %p92;
	mov.f32 	%f635, 0f3FB8AA3B;
	mul.rn.f32 	%f636, %f634, %f635;
	cvt.rzi.f32.f32 	%f637, %f636;
	abs.f32 	%f638, %f637;
	setp.gt.f32 	%p93, %f638, 0f42FC0000;
	mov.b32 	%r256, %f637;
	and.b32  	%r257, %r256, -2147483648;
	or.b32  	%r258, %r257, 1123811328;
	mov.b32 	%f639, %r258;
	selp.f32 	%f640, %f639, %f637, %p93;
	mov.f32 	%f641, 0fBF317218;
	fma.rn.f32 	%f642, %f640, %f641, %f634;
	mov.f32 	%f643, 0f3102E308;
	fma.rn.f32 	%f644, %f640, %f643, %f642;
	mul.f32 	%f645, %f644, 0f3FB8AA3B;
	add.f32 	%f646, %f640, 0f4B40007F;
	mov.b32 	%r259, %f646;
	shl.b32 	%r260, %r259, 23;
	mov.b32 	%f647, %r260;
	ex2.approx.ftz.f32 	%f648, %f645;
	mul.f32 	%f128, %f648, %f647;
	setp.eq.f32 	%p94, %f128, 0f7F800000;
	mov.f32 	%f977, 0f7F800000;
	@%p94 bra 	$L__BB0_75;

	fma.rn.f32 	%f977, %f128, %f127, %f128;

$L__BB0_75:
	mov.f32 	%f917, 0f00000000;
	max.f32 	%f916, %f917, %f567;
	mov.f32 	%f881, 0f3E555555;
	cvt.rzi.f32.f32 	%f880, %f881;
	add.f32 	%f879, %f880, %f880;
	mov.f32 	%f878, 0f3ED55555;
	sub.f32 	%f877, %f878, %f879;
	abs.f32 	%f876, %f877;
	setp.lt.f32 	%p95, %f916, 0f00000000;
	setp.eq.f32 	%p96, %f876, 0f3F800000;
	and.pred  	%p4, %p95, %p96;
	setp.eq.f32 	%p97, %f916, 0f00000000;
	@%p97 bra 	$L__BB0_79;
	bra.uni 	$L__BB0_76;

$L__BB0_79:
	mov.f32 	%f934, 0f00000000;
	max.f32 	%f933, %f934, %f567;
	add.f32 	%f653, %f933, %f933;
	selp.f32 	%f979, %f653, 0f00000000, %p96;
	bra.uni 	$L__BB0_80;

$L__BB0_76:
	mov.f32 	%f919, 0f00000000;
	max.f32 	%f918, %f919, %f567;
	mov.b32 	%r261, %f977;
	xor.b32  	%r262, %r261, -2147483648;
	mov.b32 	%f649, %r262;
	selp.f32 	%f979, %f649, %f977, %p4;
	setp.geu.f32 	%p98, %f918, 0f00000000;
	@%p98 bra 	$L__BB0_80;

	mov.f32 	%f650, 0f3ED55555;
	cvt.rzi.f32.f32 	%f651, %f650;
	setp.eq.f32 	%p99, %f651, 0f3ED55555;
	@%p99 bra 	$L__BB0_80;

	mov.f32 	%f979, 0f7FFFFFFF;

$L__BB0_80:
	mov.f32 	%f922, 0f00000000;
	max.f32 	%f921, %f922, %f567;
	abs.f32 	%f920, %f921;
	add.f32 	%f654, %f920, 0f3ED55555;
	mov.b32 	%r263, %f654;
	setp.lt.s32 	%p101, %r263, 2139095040;
	@%p101 bra 	$L__BB0_85;

	mov.f32 	%f927, 0f00000000;
	max.f32 	%f926, %f927, %f567;
	abs.f32 	%f925, %f926;
	setp.gtu.f32 	%p102, %f925, 0f7F800000;
	@%p102 bra 	$L__BB0_84;
	bra.uni 	$L__BB0_82;

$L__BB0_84:
	mov.f32 	%f932, 0f00000000;
	max.f32 	%f931, %f932, %f567;
	add.f32 	%f979, %f931, 0f3ED55555;
	bra.uni 	$L__BB0_85;

$L__BB0_82:
	mov.f32 	%f930, 0f00000000;
	max.f32 	%f929, %f930, %f567;
	abs.f32 	%f928, %f929;
	setp.neu.f32 	%p103, %f928, 0f7F800000;
	@%p103 bra 	$L__BB0_85;

	selp.f32 	%f979, 0fFF800000, 0f7F800000, %p4;

$L__BB0_85:
	abs.f32 	%f137, %f123;
	setp.lt.f32 	%p104, %f137, 0f00800000;
	mul.f32 	%f656, %f137, 0f4B800000;
	selp.f32 	%f657, %f656, %f137, %p104;
	selp.f32 	%f658, 0fC3170000, 0fC2FE0000, %p104;
	mov.b32 	%r264, %f657;
	and.b32  	%r265, %r264, 8388607;
	or.b32  	%r266, %r265, 1065353216;
	mov.b32 	%f659, %r266;
	shr.u32 	%r267, %r264, 23;
	cvt.rn.f32.u32 	%f660, %r267;
	add.f32 	%f661, %f658, %f660;
	setp.gt.f32 	%p105, %f659, 0f3FB504F3;
	mul.f32 	%f662, %f659, 0f3F000000;
	add.f32 	%f663, %f661, 0f3F800000;
	selp.f32 	%f664, %f663, %f661, %p105;
	selp.f32 	%f665, %f662, %f659, %p105;
	add.f32 	%f666, %f665, 0fBF800000;
	add.f32 	%f667, %f665, 0f3F800000;
	rcp.approx.ftz.f32 	%f668, %f667;
	add.f32 	%f669, %f666, %f666;
	mul.f32 	%f670, %f669, %f668;
	mul.f32 	%f671, %f670, %f670;
	mov.f32 	%f672, 0f3C4CAF63;
	mov.f32 	%f673, 0f3B18F0FE;
	fma.rn.f32 	%f674, %f673, %f671, %f672;
	mov.f32 	%f675, 0f3DAAAABD;
	fma.rn.f32 	%f676, %f674, %f671, %f675;
	mul.rn.f32 	%f677, %f676, %f671;
	mul.rn.f32 	%f678, %f677, %f670;
	sub.f32 	%f679, %f666, %f670;
	add.f32 	%f680, %f679, %f679;
	neg.f32 	%f681, %f670;
	fma.rn.f32 	%f682, %f681, %f666, %f680;
	mul.rn.f32 	%f683, %f668, %f682;
	add.f32 	%f684, %f678, %f670;
	sub.f32 	%f685, %f670, %f684;
	add.f32 	%f686, %f678, %f685;
	add.f32 	%f687, %f683, %f686;
	add.f32 	%f688, %f684, %f687;
	sub.f32 	%f689, %f684, %f688;
	add.f32 	%f690, %f687, %f689;
	mov.f32 	%f691, 0f3F317200;
	mul.rn.f32 	%f692, %f664, %f691;
	mov.f32 	%f693, 0f35BFBE8E;
	mul.rn.f32 	%f694, %f664, %f693;
	add.f32 	%f695, %f692, %f688;
	sub.f32 	%f696, %f692, %f695;
	add.f32 	%f697, %f688, %f696;
	add.f32 	%f698, %f690, %f697;
	add.f32 	%f699, %f694, %f698;
	add.f32 	%f700, %f695, %f699;
	sub.f32 	%f701, %f695, %f700;
	add.f32 	%f702, %f699, %f701;
	mov.f32 	%f703, 0f3ED55555;
	mul.rn.f32 	%f704, %f703, %f700;
	neg.f32 	%f705, %f704;
	fma.rn.f32 	%f706, %f703, %f700, %f705;
	fma.rn.f32 	%f707, %f703, %f702, %f706;
	mov.f32 	%f708, 0f00000000;
	fma.rn.f32 	%f709, %f708, %f700, %f707;
	add.rn.f32 	%f710, %f704, %f709;
	neg.f32 	%f711, %f710;
	add.rn.f32 	%f712, %f704, %f711;
	add.rn.f32 	%f713, %f712, %f709;
	mov.b32 	%r268, %f710;
	setp.eq.s32 	%p106, %r268, 1118925336;
	add.s32 	%r269, %r268, -1;
	mov.b32 	%f714, %r269;
	add.f32 	%f715, %f713, 0f37000000;
	selp.f32 	%f138, %f715, %f713, %p106;
	selp.f32 	%f716, %f714, %f710, %p106;
	mov.f32 	%f717, 0f3FB8AA3B;
	mul.rn.f32 	%f718, %f716, %f717;
	cvt.rzi.f32.f32 	%f719, %f718;
	abs.f32 	%f720, %f719;
	setp.gt.f32 	%p107, %f720, 0f42FC0000;
	mov.b32 	%r270, %f719;
	and.b32  	%r271, %r270, -2147483648;
	or.b32  	%r272, %r271, 1123811328;
	mov.b32 	%f721, %r272;
	selp.f32 	%f722, %f721, %f719, %p107;
	mov.f32 	%f723, 0fBF317218;
	fma.rn.f32 	%f724, %f722, %f723, %f716;
	mov.f32 	%f725, 0f3102E308;
	fma.rn.f32 	%f726, %f722, %f725, %f724;
	mul.f32 	%f727, %f726, 0f3FB8AA3B;
	add.f32 	%f728, %f722, 0f4B40007F;
	mov.b32 	%r273, %f728;
	shl.b32 	%r274, %r273, 23;
	mov.b32 	%f729, %r274;
	ex2.approx.ftz.f32 	%f730, %f727;
	mul.f32 	%f139, %f730, %f729;
	setp.eq.f32 	%p108, %f139, 0f7F800000;
	mov.f32 	%f980, 0f7F800000;
	@%p108 bra 	$L__BB0_87;

	fma.rn.f32 	%f980, %f139, %f138, %f139;

$L__BB0_87:
	setp.lt.f32 	%p109, %f123, 0f00000000;
	and.pred  	%p5, %p109, %p96;
	setp.eq.f32 	%p111, %f123, 0f00000000;
	@%p111 bra 	$L__BB0_91;
	bra.uni 	$L__BB0_88;

$L__BB0_91:
	add.f32 	%f735, %f123, %f123;
	selp.f32 	%f982, %f735, 0f00000000, %p96;
	bra.uni 	$L__BB0_92;

$L__BB0_88:
	mov.b32 	%r275, %f980;
	xor.b32  	%r276, %r275, -2147483648;
	mov.b32 	%f731, %r276;
	selp.f32 	%f982, %f731, %f980, %p5;
	setp.geu.f32 	%p112, %f123, 0f00000000;
	@%p112 bra 	$L__BB0_92;

	mov.f32 	%f732, 0f3ED55555;
	cvt.rzi.f32.f32 	%f733, %f732;
	setp.eq.f32 	%p113, %f733, 0f3ED55555;
	@%p113 bra 	$L__BB0_92;

	mov.f32 	%f982, 0f7FFFFFFF;

$L__BB0_92:
	mov.f32 	%f900, 0f00000000;
	max.f32 	%f899, %f900, %f569;
	abs.f32 	%f898, %f899;
	add.f32 	%f736, %f898, 0f3ED55555;
	mov.b32 	%r277, %f736;
	setp.lt.s32 	%p115, %r277, 2139095040;
	@%p115 bra 	$L__BB0_97;

	mov.f32 	%f903, 0f00000000;
	max.f32 	%f902, %f903, %f569;
	abs.f32 	%f901, %f902;
	setp.gtu.f32 	%p116, %f901, 0f7F800000;
	@%p116 bra 	$L__BB0_96;
	bra.uni 	$L__BB0_94;

$L__BB0_96:
	add.f32 	%f982, %f123, 0f3ED55555;
	bra.uni 	$L__BB0_97;

$L__BB0_94:
	mov.f32 	%f906, 0f00000000;
	max.f32 	%f905, %f906, %f569;
	abs.f32 	%f904, %f905;
	setp.neu.f32 	%p117, %f904, 0f7F800000;
	@%p117 bra 	$L__BB0_97;

	selp.f32 	%f982, 0fFF800000, 0f7F800000, %p5;

$L__BB0_97:
	abs.f32 	%f148, %f124;
	setp.lt.f32 	%p118, %f148, 0f00800000;
	mul.f32 	%f738, %f148, 0f4B800000;
	selp.f32 	%f739, %f738, %f148, %p118;
	selp.f32 	%f740, 0fC3170000, 0fC2FE0000, %p118;
	mov.b32 	%r278, %f739;
	and.b32  	%r279, %r278, 8388607;
	or.b32  	%r280, %r279, 1065353216;
	mov.b32 	%f741, %r280;
	shr.u32 	%r281, %r278, 23;
	cvt.rn.f32.u32 	%f742, %r281;
	add.f32 	%f743, %f740, %f742;
	setp.gt.f32 	%p119, %f741, 0f3FB504F3;
	mul.f32 	%f744, %f741, 0f3F000000;
	add.f32 	%f745, %f743, 0f3F800000;
	selp.f32 	%f746, %f745, %f743, %p119;
	selp.f32 	%f747, %f744, %f741, %p119;
	add.f32 	%f748, %f747, 0fBF800000;
	add.f32 	%f749, %f747, 0f3F800000;
	rcp.approx.ftz.f32 	%f750, %f749;
	add.f32 	%f751, %f748, %f748;
	mul.f32 	%f752, %f751, %f750;
	mul.f32 	%f753, %f752, %f752;
	mov.f32 	%f754, 0f3C4CAF63;
	mov.f32 	%f755, 0f3B18F0FE;
	fma.rn.f32 	%f756, %f755, %f753, %f754;
	mov.f32 	%f757, 0f3DAAAABD;
	fma.rn.f32 	%f758, %f756, %f753, %f757;
	mul.rn.f32 	%f759, %f758, %f753;
	mul.rn.f32 	%f760, %f759, %f752;
	sub.f32 	%f761, %f748, %f752;
	add.f32 	%f762, %f761, %f761;
	neg.f32 	%f763, %f752;
	fma.rn.f32 	%f764, %f763, %f748, %f762;
	mul.rn.f32 	%f765, %f750, %f764;
	add.f32 	%f766, %f760, %f752;
	sub.f32 	%f767, %f752, %f766;
	add.f32 	%f768, %f760, %f767;
	add.f32 	%f769, %f765, %f768;
	add.f32 	%f770, %f766, %f769;
	sub.f32 	%f771, %f766, %f770;
	add.f32 	%f772, %f769, %f771;
	mov.f32 	%f773, 0f3F317200;
	mul.rn.f32 	%f774, %f746, %f773;
	mov.f32 	%f775, 0f35BFBE8E;
	mul.rn.f32 	%f776, %f746, %f775;
	add.f32 	%f777, %f774, %f770;
	sub.f32 	%f778, %f774, %f777;
	add.f32 	%f779, %f770, %f778;
	add.f32 	%f780, %f772, %f779;
	add.f32 	%f781, %f776, %f780;
	add.f32 	%f782, %f777, %f781;
	sub.f32 	%f783, %f777, %f782;
	add.f32 	%f784, %f781, %f783;
	mov.f32 	%f785, 0f3ED55555;
	mul.rn.f32 	%f786, %f785, %f782;
	neg.f32 	%f787, %f786;
	fma.rn.f32 	%f788, %f785, %f782, %f787;
	fma.rn.f32 	%f789, %f785, %f784, %f788;
	mov.f32 	%f790, 0f00000000;
	fma.rn.f32 	%f791, %f790, %f782, %f789;
	add.rn.f32 	%f792, %f786, %f791;
	neg.f32 	%f793, %f792;
	add.rn.f32 	%f794, %f786, %f793;
	add.rn.f32 	%f795, %f794, %f791;
	mov.b32 	%r282, %f792;
	setp.eq.s32 	%p120, %r282, 1118925336;
	add.s32 	%r283, %r282, -1;
	mov.b32 	%f796, %r283;
	add.f32 	%f797, %f795, 0f37000000;
	selp.f32 	%f149, %f797, %f795, %p120;
	selp.f32 	%f798, %f796, %f792, %p120;
	mov.f32 	%f799, 0f3FB8AA3B;
	mul.rn.f32 	%f800, %f798, %f799;
	cvt.rzi.f32.f32 	%f801, %f800;
	abs.f32 	%f802, %f801;
	setp.gt.f32 	%p121, %f802, 0f42FC0000;
	mov.b32 	%r284, %f801;
	and.b32  	%r285, %r284, -2147483648;
	or.b32  	%r286, %r285, 1123811328;
	mov.b32 	%f803, %r286;
	selp.f32 	%f804, %f803, %f801, %p121;
	mov.f32 	%f805, 0fBF317218;
	fma.rn.f32 	%f806, %f804, %f805, %f798;
	mov.f32 	%f807, 0f3102E308;
	fma.rn.f32 	%f808, %f804, %f807, %f806;
	mul.f32 	%f809, %f808, 0f3FB8AA3B;
	add.f32 	%f810, %f804, 0f4B40007F;
	mov.b32 	%r287, %f810;
	shl.b32 	%r288, %r287, 23;
	mov.b32 	%f811, %r288;
	ex2.approx.ftz.f32 	%f812, %f809;
	mul.f32 	%f150, %f812, %f811;
	setp.eq.f32 	%p122, %f150, 0f7F800000;
	mov.f32 	%f983, 0f7F800000;
	@%p122 bra 	$L__BB0_99;

	fma.rn.f32 	%f983, %f150, %f149, %f150;

$L__BB0_99:
	setp.lt.f32 	%p123, %f124, 0f00000000;
	and.pred  	%p6, %p123, %p96;
	setp.eq.f32 	%p125, %f124, 0f00000000;
	@%p125 bra 	$L__BB0_103;
	bra.uni 	$L__BB0_100;

$L__BB0_103:
	add.f32 	%f817, %f124, %f124;
	selp.f32 	%f985, %f817, 0f00000000, %p96;
	bra.uni 	$L__BB0_104;

$L__BB0_100:
	mov.b32 	%r289, %f983;
	xor.b32  	%r290, %r289, -2147483648;
	mov.b32 	%f813, %r290;
	selp.f32 	%f985, %f813, %f983, %p6;
	setp.geu.f32 	%p126, %f124, 0f00000000;
	@%p126 bra 	$L__BB0_104;

	mov.f32 	%f814, 0f3ED55555;
	cvt.rzi.f32.f32 	%f815, %f814;
	setp.eq.f32 	%p127, %f815, 0f3ED55555;
	@%p127 bra 	$L__BB0_104;

	mov.f32 	%f985, 0f7FFFFFFF;

$L__BB0_104:
	mov.f32 	%f909, 0f00000000;
	max.f32 	%f908, %f909, %f570;
	abs.f32 	%f907, %f908;
	add.f32 	%f818, %f907, 0f3ED55555;
	mov.b32 	%r291, %f818;
	setp.lt.s32 	%p129, %r291, 2139095040;
	@%p129 bra 	$L__BB0_109;

	mov.f32 	%f912, 0f00000000;
	max.f32 	%f911, %f912, %f570;
	abs.f32 	%f910, %f911;
	setp.gtu.f32 	%p130, %f910, 0f7F800000;
	@%p130 bra 	$L__BB0_108;
	bra.uni 	$L__BB0_106;

$L__BB0_108:
	add.f32 	%f985, %f124, 0f3ED55555;
	bra.uni 	$L__BB0_109;

$L__BB0_106:
	mov.f32 	%f915, 0f00000000;
	max.f32 	%f914, %f915, %f570;
	abs.f32 	%f913, %f914;
	setp.neu.f32 	%p131, %f913, 0f7F800000;
	@%p131 bra 	$L__BB0_109;

	selp.f32 	%f985, 0fFF800000, 0f7F800000, %p6;

$L__BB0_109:
	mov.f32 	%f924, 0f00000000;
	max.f32 	%f923, %f924, %f567;
	ld.const.u64 	%rd79, [params+144];
	cvta.to.global.u64 	%rd78, %rd79;
	ld.const.u32 	%r319, [params+136];
	mad.lo.s32 	%r318, %r319, %r5, %r4;
	cvt.u64.u32 	%rd77, %r318;
	fma.rn.f32 	%f819, %f979, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p132, %f923, 0f3F800000;
	mov.f32 	%f820, 0f3F800000;
	selp.f32 	%f821, 0f3F7FFFFF, %f819, %p132;
	mul.f32 	%f822, %f923, 0f414EB852;
	setp.lt.f32 	%p133, %f923, 0f3B4D2E1C;
	selp.f32 	%f823, %f822, %f821, %p133;
	fma.rn.f32 	%f824, %f982, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p134, %f123, 0f3F800000;
	selp.f32 	%f825, 0f3F7FFFFF, %f824, %p134;
	mul.f32 	%f826, %f123, 0f414EB852;
	setp.lt.f32 	%p135, %f123, 0f3B4D2E1C;
	selp.f32 	%f827, %f826, %f825, %p135;
	fma.rn.f32 	%f828, %f985, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p136, %f124, 0f3F800000;
	selp.f32 	%f829, 0f3F7FFFFF, %f828, %p136;
	mul.f32 	%f830, %f124, 0f414EB852;
	setp.lt.f32 	%p137, %f124, 0f3B4D2E1C;
	selp.f32 	%f831, %f830, %f829, %p137;
	min.f32 	%f832, %f823, %f820;
	mov.f32 	%f833, 0f00000000;
	max.f32 	%f834, %f833, %f832;
	mul.f32 	%f835, %f834, 0f43800000;
	cvt.rzi.u32.f32 	%r292, %f835;
	min.u32 	%r293, %r292, 255;
	min.f32 	%f836, %f827, %f820;
	max.f32 	%f837, %f833, %f836;
	mul.f32 	%f838, %f837, 0f43800000;
	cvt.rzi.u32.f32 	%r294, %f838;
	min.u32 	%r295, %r294, 255;
	min.f32 	%f839, %f831, %f820;
	max.f32 	%f840, %f833, %f839;
	mul.f32 	%f841, %f840, 0f43800000;
	cvt.rzi.u32.f32 	%r296, %f841;
	min.u32 	%r297, %r296, 255;
	shl.b64 	%rd57, %rd77, 2;
	add.s64 	%rd58, %rd78, %rd57;
	cvt.u16.u32 	%rs15, %r297;
	cvt.u16.u32 	%rs16, %r295;
	cvt.u16.u32 	%rs17, %r293;
	mov.u16 	%rs18, 255;
	st.global.v4.u8 	[%rd58], {%rs17, %rs16, %rs15, %rs18};

$L__BB0_110:
	ld.const.u32 	%r320, [params+104];
	and.b32  	%r298, %r320, 4;
	setp.eq.s32 	%p138, %r298, 0;
	@%p138 bra 	$L__BB0_114;

	ld.const.u32 	%r299, [params+108];
	setp.eq.s32 	%p139, %r299, 0;
	ld.const.u64 	%rd59, [params+224];
	cvta.to.global.u64 	%rd60, %rd59;
	ld.const.u32 	%r300, [params+216];
	mad.lo.s32 	%r301, %r300, %r5, %r4;
	mul.wide.u32 	%rd61, %r301, 8;
	add.s64 	%rd18, %rd60, %rd61;
	@%p139 bra 	$L__BB0_113;

	ld.global.v4.u16 	{%rs26, %rs27, %rs28, %rs29}, [%rd18];
	// begin inline asm
	{  cvt.f32.f16 %f842, %rs26;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f843, %rs27;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f844, %rs28;}

	// end inline asm
	add.f32 	%f845, %f83, %f842;
	add.f32 	%f846, %f84, %f843;
	add.f32 	%f847, %f85, %f844;
	mov.f32 	%f848, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs24, %f847;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs23, %f846;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs22, %f845;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs25, %f848;}

	// end inline asm
	st.global.v4.u16 	[%rd18], {%rs22, %rs23, %rs24, %rs25};
	bra.uni 	$L__BB0_114;

$L__BB0_113:
	mov.f32 	%f852, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs33, %f852;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs32, %f85;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs31, %f84;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f83;}

	// end inline asm
	st.global.v4.u16 	[%rd18], {%rs30, %rs31, %rs32, %rs33};

$L__BB0_114:
	ld.const.u32 	%r321, [params+104];
	and.b32  	%r302, %r321, 64;
	setp.eq.s32 	%p140, %r302, 0;
	@%p140 bra 	$L__BB0_124;

	mul.f32 	%f853, %f957, %f957;
	fma.rn.f32 	%f854, %f956, %f956, %f853;
	fma.rn.f32 	%f855, %f958, %f958, %f854;
	sqrt.rn.f32 	%f856, %f855;
	rcp.rn.f32 	%f857, %f856;
	mul.f32 	%f858, %f956, %f857;
	mul.f32 	%f859, %f957, %f857;
	mul.f32 	%f860, %f958, %f857;
	ld.const.u64 	%rd62, [params+208];
	cvta.to.global.u64 	%rd63, %rd62;
	ld.const.u32 	%r303, [params+200];
	mad.lo.s32 	%r304, %r303, %r5, %r4;
	fma.rn.f32 	%f861, %f858, 0f3F000000, 0f3F000000;
	mul.f32 	%f862, %f861, 0f437F0000;
	cvt.rzi.u32.f32 	%r305, %f862;
	fma.rn.f32 	%f863, %f859, 0f3F000000, 0f3F000000;
	mul.f32 	%f864, %f863, 0f437F0000;
	cvt.rzi.u32.f32 	%r306, %f864;
	fma.rn.f32 	%f865, %f860, 0f3F000000, 0f3F000000;
	mul.f32 	%f866, %f865, 0f437F0000;
	cvt.rzi.u32.f32 	%r307, %f866;
	mul.wide.u32 	%rd64, %r304, 4;
	add.s64 	%rd65, %rd63, %rd64;
	cvt.u16.u32 	%rs34, %r307;
	cvt.u16.u32 	%rs35, %r306;
	cvt.u16.u32 	%rs36, %r305;
	mov.u16 	%rs37, 255;
	st.global.v4.u8 	[%rd65], {%rs36, %rs35, %rs34, %rs37};

$L__BB0_124:
	ret;

}