//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<205>;
	.reg .b16 	%rs<180>;
	.reg .f32 	%f<1703>;
	.reg .b32 	%r<467>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<121>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r62), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r63), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u32 	%r3, [params+616];
	abs.s32 	%r4, %r3;
	ld.const.u32 	%r5, [params+540];
	ld.const.u64 	%rd33, [params+400];
	cvta.to.global.u64 	%rd34, %rd33;
	ld.const.u32 	%r68, [params+392];
	mad.lo.s32 	%r69, %r68, %r63, %r62;
	mul.wide.u32 	%rd35, %r69, 4;
	add.s64 	%rd2, %rd34, %rd35;
	ld.global.v2.u8 	{%rs16, %rs175}, [%rd2];
	or.b16  	%rs18, %rs16, %rs175;
	and.b16  	%rs19, %rs18, 255;
	setp.eq.s16 	%p10, %rs19, 0;
	@%p10 bra 	$L__BB0_2;

	ld.global.u8 	%rs174, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs174, [%rd2+2];
	setp.eq.s16 	%p11, %rs174, 0;
	mov.f32 	%f1560, 0f00000000;
	mov.u16 	%rs175, 0;
	mov.f32 	%f1561, %f1560;
	mov.f32 	%f1562, %f1560;
	@%p11 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f367, %rs16;
	div.rn.f32 	%f368, %f367, 0f437F0000;
	fma.rn.f32 	%f369, %f368, 0f40000000, 0fBF800000;
	and.b16  	%rs22, %rs175, 255;
	cvt.rn.f32.u16 	%f370, %rs22;
	div.rn.f32 	%f371, %f370, 0f437F0000;
	fma.rn.f32 	%f372, %f371, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f373, %rs174;
	div.rn.f32 	%f374, %f373, 0f437F0000;
	fma.rn.f32 	%f375, %f374, 0f40000000, 0fBF800000;
	mul.f32 	%f376, %f372, %f372;
	fma.rn.f32 	%f377, %f369, %f369, %f376;
	fma.rn.f32 	%f378, %f375, %f375, %f377;
	sqrt.rn.f32 	%f379, %f378;
	rcp.rn.f32 	%f380, %f379;
	mul.f32 	%f1562, %f380, %f375;
	mul.f32 	%f1561, %f380, %f372;
	mul.f32 	%f1560, %f369, %f380;

$L__BB0_4:
	ld.const.v2.u32 	{%r70, %r71}, [params];
	add.s32 	%r6, %r70, %r62;
	add.s32 	%r7, %r71, %r63;
	setp.eq.f32 	%p12, %f1560, 0f00000000;
	setp.eq.f32 	%p13, %f1561, 0f00000000;
	and.pred  	%p14, %p12, %p13;
	setp.eq.f32 	%p15, %f1562, 0f00000000;
	and.pred  	%p16, %p15, %p14;
	@%p16 bra 	$L__BB0_165;
	bra.uni 	$L__BB0_5;

$L__BB0_165:
	ld.const.u32 	%r59, [params+104];
	and.b32  	%r432, %r59, 1;
	setp.eq.b32 	%p194, %r432, 1;
	mov.pred 	%p195, 0;
	xor.pred  	%p196, %p194, %p195;
	not.pred 	%p197, %p196;
	@%p197 bra 	$L__BB0_167;

	ld.const.u64 	%rd96, [params+144];
	cvta.to.global.u64 	%rd97, %rd96;
	ld.const.u32 	%r433, [params+136];
	mad.lo.s32 	%r434, %r433, %r7, %r6;
	mul.wide.u32 	%rd98, %r434, 4;
	add.s64 	%rd99, %rd97, %rd98;
	mov.u16 	%rs111, 0;
	st.global.v4.u8 	[%rd99], {%rs111, %rs111, %rs111, %rs111};

$L__BB0_167:
	and.b32  	%r435, %r59, 8;
	setp.eq.s32 	%p198, %r435, 0;
	@%p198 bra 	$L__BB0_169;

	ld.const.u64 	%rd100, [params+192];
	cvta.to.global.u64 	%rd101, %rd100;
	ld.const.u32 	%r436, [params+184];
	mad.lo.s32 	%r437, %r436, %r7, %r6;
	mov.f32 	%f1515, 0f00000000;
	cvt.rzi.u32.f32 	%r438, %f1515;
	mul.wide.u32 	%rd102, %r437, 2;
	add.s64 	%rd103, %rd101, %rd102;
	mov.u16 	%rs112, 0;
	cvt.u16.u32 	%rs113, %r438;
	st.global.v2.u8 	[%rd103], {%rs113, %rs112};

$L__BB0_169:
	and.b32  	%r439, %r59, 4;
	setp.eq.s32 	%p199, %r439, 0;
	ld.const.u32 	%r466, [params+108];
	@%p199 bra 	$L__BB0_173;

	setp.eq.s32 	%p200, %r466, 0;
	ld.const.u64 	%rd104, [params+224];
	cvta.to.global.u64 	%rd105, %rd104;
	ld.const.u32 	%r440, [params+216];
	mad.lo.s32 	%r441, %r440, %r7, %r6;
	mul.wide.u32 	%rd106, %r441, 8;
	add.s64 	%rd28, %rd105, %rd106;
	@%p200 bra 	$L__BB0_172;

	ld.global.v4.u16 	{%rs120, %rs121, %rs122, %rs123}, [%rd28];
	// begin inline asm
	{  cvt.f32.f16 %f1516, %rs120;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1517, %rs121;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1518, %rs122;}

	// end inline asm
	add.f32 	%f1519, %f1516, 0f00000000;
	add.f32 	%f1520, %f1517, 0f00000000;
	add.f32 	%f1521, %f1518, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs119, %f1521;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs118, %f1520;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs117, %f1519;}

	// end inline asm
	mov.u16 	%rs124, 0;
	st.global.v4.u16 	[%rd28], {%rs117, %rs118, %rs119, %rs124};
	bra.uni 	$L__BB0_173;

$L__BB0_5:
	ld.const.u64 	%rd36, [params+432];
	cvta.to.global.u64 	%rd37, %rd36;
	ld.const.u32 	%r74, [params+424];
	mad.lo.s32 	%r75, %r74, %r63, %r62;
	mul.wide.u32 	%rd38, %r75, 12;
	add.s64 	%rd39, %rd37, %rd38;
	ld.global.f32 	%f10, [%rd39];
	mul.f32 	%f381, %f10, 0f3456BF95;
	ld.global.f32 	%f11, [%rd39+4];
	mul.f32 	%f382, %f11, 0f3456BF95;
	ld.global.f32 	%f12, [%rd39+8];
	mul.f32 	%f383, %f12, 0f3456BF95;
	abs.f32 	%f13, %f1560;
	div.rn.f32 	%f384, %f381, %f13;
	abs.f32 	%f385, %f1561;
	div.rn.f32 	%f386, %f382, %f385;
	abs.f32 	%f14, %f1562;
	div.rn.f32 	%f387, %f383, %f14;
	abs.f32 	%f388, %f384;
	abs.f32 	%f389, %f386;
	abs.f32 	%f390, %f387;
	mov.f32 	%f391, 0f38D1B717;
	max.f32 	%f392, %f388, %f391;
	max.f32 	%f393, %f389, %f391;
	max.f32 	%f394, %f390, %f391;
	fma.rn.f32 	%f15, %f1560, %f392, %f10;
	fma.rn.f32 	%f16, %f1561, %f393, %f11;
	fma.rn.f32 	%f17, %f1562, %f394, %f12;
	ld.const.u64 	%rd40, [params+464];
	cvta.to.global.u64 	%rd41, %rd40;
	ld.const.u32 	%r76, [params+456];
	mad.lo.s32 	%r77, %r76, %r63, %r62;
	mul.wide.u32 	%rd42, %r77, 4;
	add.s64 	%rd3, %rd41, %rd42;
	ld.global.v2.u8 	{%rs24, %rs178}, [%rd3];
	or.b16  	%rs26, %rs24, %rs178;
	and.b16  	%rs27, %rs26, 255;
	setp.eq.s16 	%p17, %rs27, 0;
	@%p17 bra 	$L__BB0_7;

	ld.global.u8 	%rs176, [%rd3+2];
	bra.uni 	$L__BB0_8;

$L__BB0_7:
	ld.global.u8 	%rs176, [%rd3+2];
	setp.eq.s16 	%p18, %rs176, 0;
	mov.f32 	%f1563, 0f00000000;
	mov.u16 	%rs178, 0;
	mov.u16 	%rs179, %rs178;
	mov.f32 	%f1564, %f1563;
	mov.f32 	%f1565, %f1563;
	@%p18 bra 	$L__BB0_9;

$L__BB0_8:
	mov.u16 	%rs179, %rs178;
	cvt.rn.f32.u16 	%f398, %rs24;
	div.rn.f32 	%f399, %f398, 0f437F0000;
	fma.rn.f32 	%f400, %f399, 0f40000000, 0fBF800000;
	and.b16  	%rs32, %rs179, 255;
	cvt.rn.f32.u16 	%f401, %rs32;
	div.rn.f32 	%f402, %f401, 0f437F0000;
	fma.rn.f32 	%f403, %f402, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f404, %rs176;
	div.rn.f32 	%f405, %f404, 0f437F0000;
	fma.rn.f32 	%f406, %f405, 0f40000000, 0fBF800000;
	mul.f32 	%f407, %f403, %f403;
	fma.rn.f32 	%f408, %f400, %f400, %f407;
	fma.rn.f32 	%f409, %f406, %f406, %f408;
	sqrt.rn.f32 	%f410, %f409;
	rcp.rn.f32 	%f411, %f410;
	mul.f32 	%f1565, %f411, %f406;
	mul.f32 	%f1564, %f411, %f403;
	mul.f32 	%f1563, %f400, %f411;
	mov.u16 	%rs178, %rs176;

$L__BB0_9:
	mul.f32 	%f415, %f1561, %f1565;
	mul.f32 	%f416, %f1562, %f1564;
	sub.f32 	%f417, %f415, %f416;
	mul.f32 	%f418, %f1562, %f1563;
	mul.f32 	%f419, %f1560, %f1565;
	sub.f32 	%f420, %f418, %f419;
	mul.f32 	%f421, %f1560, %f1564;
	mul.f32 	%f422, %f1561, %f1563;
	sub.f32 	%f423, %f421, %f422;
	ld.global.u8 	%rs34, [%rd3+3];
	setp.eq.s16 	%p19, %rs34, 0;
	selp.f32 	%f24, 0fBF800000, 0f3F800000, %p19;
	mul.f32 	%f424, %f417, %f24;
	mul.f32 	%f425, %f420, %f24;
	mul.f32 	%f426, %f423, %f24;
	mul.f32 	%f427, %f424, 0f00000000;
	mul.f32 	%f428, %f425, 0f00000000;
	mul.f32 	%f429, %f426, 0f00000000;
	fma.rn.f32 	%f430, %f1563, 0f3F5105EC, %f427;
	fma.rn.f32 	%f431, %f1564, 0f3F5105EC, %f428;
	fma.rn.f32 	%f432, %f1565, 0f3F5105EC, %f429;
	mul.f32 	%f25, %f1560, 0f3F13CD3A;
	add.f32 	%f26, %f25, %f430;
	mul.f32 	%f27, %f1561, 0f3F13CD3A;
	add.f32 	%f28, %f27, %f431;
	mul.f32 	%f29, %f1562, 0f3F13CD3A;
	add.f32 	%f30, %f29, %f432;
	or.b16  	%rs35, %rs24, %rs179;
	or.b16  	%rs15, %rs35, %rs178;
	and.b16  	%rs36, %rs15, 255;
	setp.eq.s16 	%p20, %rs36, 0;
	mov.f32 	%f1569, 0f00000000;
	mov.f32 	%f1566, %f1569;
	mov.f32 	%f1567, %f1569;
	mov.f32 	%f1568, %f1569;
	@%p20 bra 	$L__BB0_11;

	cvt.rn.f32.u16 	%f433, %rs24;
	div.rn.f32 	%f434, %f433, 0f437F0000;
	fma.rn.f32 	%f435, %f434, 0f40000000, 0fBF800000;
	and.b16  	%rs38, %rs179, 255;
	cvt.rn.f32.u16 	%f436, %rs38;
	div.rn.f32 	%f437, %f436, 0f437F0000;
	fma.rn.f32 	%f438, %f437, 0f40000000, 0fBF800000;
	and.b16  	%rs39, %rs178, 255;
	cvt.rn.f32.u16 	%f439, %rs39;
	div.rn.f32 	%f440, %f439, 0f437F0000;
	fma.rn.f32 	%f441, %f440, 0f40000000, 0fBF800000;
	mul.f32 	%f442, %f438, %f438;
	fma.rn.f32 	%f443, %f435, %f435, %f442;
	fma.rn.f32 	%f444, %f441, %f441, %f443;
	sqrt.rn.f32 	%f445, %f444;
	rcp.rn.f32 	%f446, %f445;
	mul.f32 	%f1568, %f446, %f441;
	mul.f32 	%f1567, %f446, %f438;
	mul.f32 	%f1566, %f435, %f446;

$L__BB0_11:
	mul.f32 	%f450, %f1561, %f1568;
	mul.f32 	%f451, %f1562, %f1567;
	sub.f32 	%f452, %f450, %f451;
	mul.f32 	%f453, %f1562, %f1566;
	mul.f32 	%f454, %f1560, %f1568;
	sub.f32 	%f455, %f453, %f454;
	mul.f32 	%f456, %f1560, %f1567;
	mul.f32 	%f457, %f1561, %f1566;
	sub.f32 	%f458, %f456, %f457;
	mul.f32 	%f459, %f452, %f24;
	mul.f32 	%f460, %f455, %f24;
	mul.f32 	%f461, %f458, %f24;
	mul.f32 	%f462, %f1566, 0f3ED105EC;
	mul.f32 	%f463, %f1567, 0f3ED105EC;
	mul.f32 	%f464, %f1568, 0f3ED105EC;
	mul.f32 	%f465, %f459, 0f3F3504F3;
	mul.f32 	%f466, %f460, 0f3F3504F3;
	mul.f32 	%f467, %f461, 0f3F3504F3;
	sub.f32 	%f468, %f465, %f462;
	sub.f32 	%f469, %f466, %f463;
	sub.f32 	%f470, %f467, %f464;
	add.f32 	%f37, %f25, %f468;
	add.f32 	%f38, %f27, %f469;
	add.f32 	%f39, %f29, %f470;
	mov.f32 	%f1570, %f1569;
	mov.f32 	%f1571, %f1569;
	@%p20 bra 	$L__BB0_13;

	cvt.rn.f32.u16 	%f471, %rs24;
	div.rn.f32 	%f472, %f471, 0f437F0000;
	fma.rn.f32 	%f473, %f472, 0f40000000, 0fBF800000;
	and.b16  	%rs42, %rs179, 255;
	cvt.rn.f32.u16 	%f474, %rs42;
	div.rn.f32 	%f475, %f474, 0f437F0000;
	fma.rn.f32 	%f476, %f475, 0f40000000, 0fBF800000;
	and.b16  	%rs43, %rs178, 255;
	cvt.rn.f32.u16 	%f477, %rs43;
	div.rn.f32 	%f478, %f477, 0f437F0000;
	fma.rn.f32 	%f479, %f478, 0f40000000, 0fBF800000;
	mul.f32 	%f480, %f476, %f476;
	fma.rn.f32 	%f481, %f473, %f473, %f480;
	fma.rn.f32 	%f482, %f479, %f479, %f481;
	sqrt.rn.f32 	%f483, %f482;
	rcp.rn.f32 	%f484, %f483;
	mul.f32 	%f1571, %f484, %f479;
	mul.f32 	%f1570, %f484, %f476;
	mul.f32 	%f1569, %f473, %f484;

$L__BB0_13:
	mul.f32 	%f498, %f1561, %f1571;
	mul.f32 	%f499, %f1562, %f1570;
	sub.f32 	%f500, %f498, %f499;
	mul.f32 	%f501, %f1562, %f1569;
	mul.f32 	%f502, %f1560, %f1571;
	sub.f32 	%f503, %f501, %f502;
	mul.f32 	%f504, %f1560, %f1570;
	mul.f32 	%f505, %f1561, %f1569;
	sub.f32 	%f506, %f504, %f505;
	mul.f32 	%f507, %f500, %f24;
	mul.f32 	%f508, %f503, %f24;
	mul.f32 	%f509, %f506, %f24;
	mul.f32 	%f510, %f1569, 0f3ED105EC;
	mul.f32 	%f511, %f1570, 0f3ED105EC;
	mul.f32 	%f512, %f1571, 0f3ED105EC;
	mul.f32 	%f513, %f507, 0fBF3504F3;
	mul.f32 	%f514, %f508, 0fBF3504F3;
	mul.f32 	%f515, %f509, 0fBF3504F3;
	sub.f32 	%f516, %f513, %f510;
	sub.f32 	%f517, %f514, %f511;
	sub.f32 	%f518, %f515, %f512;
	add.f32 	%f46, %f25, %f516;
	add.f32 	%f47, %f27, %f517;
	add.f32 	%f48, %f29, %f518;
	ld.const.u64 	%rd43, [params+128];
	cvta.to.global.u64 	%rd44, %rd43;
	ld.const.u32 	%r79, [params+120];
	mad.lo.s32 	%r80, %r79, %r63, %r62;
	mul.wide.u32 	%rd45, %r80, 4;
	add.s64 	%rd46, %rd44, %rd45;
	ld.global.u32 	%r457, [%rd46];
	setp.lt.s32 	%p23, %r4, 1;
	mov.pred 	%p22, 0;
	mov.u32 	%r453, 0;
	mov.f32 	%f1588, 0f00000000;
	mov.f32 	%f1589, %f1588;
	mov.f32 	%f1590, %f1588;
	mov.f32 	%f1591, %f1588;
	mov.f32 	%f1592, %f1588;
	mov.f32 	%f1593, %f1588;
	mov.f32 	%f1594, %f1588;
	mov.f32 	%f1595, %f1588;
	mov.f32 	%f1596, %f1588;
	mov.f32 	%f1597, %f1588;
	mov.f32 	%f1598, %f1588;
	mov.f32 	%f1599, %f1588;
	mov.f32 	%f1600, %f1588;
	mov.pred 	%p204, %p22;
	@%p23 bra 	$L__BB0_33;

	ld.const.f32 	%f49, [params+620];
	ld.const.u64 	%rd47, [params+624];
	cvta.to.global.u64 	%rd4, %rd47;
	ld.const.u64 	%rd48, [params+640];
	cvta.to.global.u64 	%rd49, %rd48;
	ld.const.u32 	%r83, [params+632];
	and.b32  	%r84, %r63, 255;
	and.b32  	%r85, %r62, 255;
	mad.lo.s32 	%r86, %r83, %r84, %r85;
	mul.wide.u32 	%rd50, %r86, 3;
	add.s64 	%rd5, %rd49, %rd50;
	ld.const.f32 	%f50, [params+660];
	mul.f32 	%f51, %f15, 0f3456BF95;
	mul.f32 	%f52, %f16, 0f3456BF95;
	mul.f32 	%f53, %f17, 0f3456BF95;
	ld.const.u64 	%rd6, [params+96];
	abs.f32 	%f659, %f52;
	abs.f32 	%f660, %f51;
	max.f32 	%f661, %f660, %f659;
	abs.f32 	%f662, %f53;
	max.f32 	%f663, %f661, %f662;
	mov.u32 	%r450, %r453;

$L__BB0_15:
	mul.lo.s32 	%r87, %r450, 3;
	mul.wide.s32 	%rd51, %r87, 12;
	add.s64 	%rd7, %rd4, %rd51;
	ld.global.f32 	%f532, [%rd7];
	sub.f32 	%f533, %f532, %f10;
	ld.global.f32 	%f534, [%rd7+4];
	sub.f32 	%f535, %f534, %f11;
	ld.global.f32 	%f536, [%rd7+8];
	sub.f32 	%f537, %f536, %f12;
	mul.f32 	%f538, %f535, %f535;
	fma.rn.f32 	%f539, %f533, %f533, %f538;
	fma.rn.f32 	%f540, %f537, %f537, %f539;
	sqrt.rn.f32 	%f67, %f540;
	rcp.rn.f32 	%f541, %f67;
	mul.f32 	%f68, %f533, %f541;
	mul.f32 	%f69, %f535, %f541;
	mul.f32 	%f70, %f537, %f541;
	mul.f32 	%f542, %f1561, %f69;
	fma.rn.f32 	%f543, %f1560, %f68, %f542;
	fma.rn.f32 	%f71, %f1562, %f70, %f543;
	setp.leu.f32 	%p24, %f71, 0f00000000;
	@%p24 bra 	$L__BB0_32;

	setp.ne.s32 	%p26, %r5, 0;
	mul.f32 	%f544, %f67, %f67;
	div.rn.f32 	%f72, %f49, %f544;
	ld.global.u8 	%rs44, [%rd5];
	cvt.rn.f32.u16 	%f545, %rs44;
	div.rn.f32 	%f546, %f545, 0fC37F0000;
	fma.rn.f32 	%f547, %f546, 0f3F333333, 0f3F800000;
	setp.gt.f32 	%p27, %f72, %f547;
	and.pred  	%p28, %p26, %p27;
	mov.pred 	%p204, -1;
	@%p28 bra 	$L__BB0_33;

	mul.f32 	%f73, %f67, %f50;
	mov.f32 	%f552, 0f40800000;
	abs.f32 	%f75, %f73;
	setp.lt.f32 	%p29, %f75, 0f00800000;
	mul.f32 	%f554, %f75, 0f4B800000;
	selp.f32 	%f555, %f554, %f75, %p29;
	selp.f32 	%f556, 0fC3170000, 0fC2FE0000, %p29;
	mov.b32 	%r88, %f555;
	and.b32  	%r89, %r88, 8388607;
	or.b32  	%r90, %r89, 1065353216;
	mov.b32 	%f557, %r90;
	shr.u32 	%r91, %r88, 23;
	cvt.rn.f32.u32 	%f558, %r91;
	add.f32 	%f559, %f556, %f558;
	setp.gt.f32 	%p30, %f557, 0f3FB504F3;
	mul.f32 	%f560, %f557, 0f3F000000;
	add.f32 	%f561, %f559, 0f3F800000;
	selp.f32 	%f562, %f561, %f559, %p30;
	selp.f32 	%f563, %f560, %f557, %p30;
	add.f32 	%f564, %f563, 0fBF800000;
	add.f32 	%f565, %f563, 0f3F800000;
	rcp.approx.ftz.f32 	%f566, %f565;
	add.f32 	%f567, %f564, %f564;
	mul.f32 	%f568, %f567, %f566;
	mul.f32 	%f569, %f568, %f568;
	mov.f32 	%f570, 0f3C4CAF63;
	mov.f32 	%f571, 0f3B18F0FE;
	fma.rn.f32 	%f572, %f571, %f569, %f570;
	mov.f32 	%f573, 0f3DAAAABD;
	fma.rn.f32 	%f574, %f572, %f569, %f573;
	mul.rn.f32 	%f575, %f574, %f569;
	mul.rn.f32 	%f576, %f575, %f568;
	sub.f32 	%f577, %f564, %f568;
	add.f32 	%f578, %f577, %f577;
	neg.f32 	%f579, %f568;
	fma.rn.f32 	%f580, %f579, %f564, %f578;
	mul.rn.f32 	%f581, %f566, %f580;
	add.f32 	%f582, %f576, %f568;
	sub.f32 	%f583, %f568, %f582;
	add.f32 	%f584, %f576, %f583;
	add.f32 	%f585, %f581, %f584;
	add.f32 	%f586, %f582, %f585;
	sub.f32 	%f587, %f582, %f586;
	add.f32 	%f588, %f585, %f587;
	mov.f32 	%f589, 0f3F317200;
	mul.rn.f32 	%f590, %f562, %f589;
	mov.f32 	%f591, 0f35BFBE8E;
	mul.rn.f32 	%f592, %f562, %f591;
	add.f32 	%f593, %f590, %f586;
	sub.f32 	%f594, %f590, %f593;
	add.f32 	%f595, %f586, %f594;
	add.f32 	%f596, %f588, %f595;
	add.f32 	%f597, %f592, %f596;
	add.f32 	%f598, %f593, %f597;
	sub.f32 	%f599, %f593, %f598;
	add.f32 	%f600, %f597, %f599;
	mul.rn.f32 	%f601, %f552, %f598;
	neg.f32 	%f602, %f601;
	fma.rn.f32 	%f603, %f552, %f598, %f602;
	fma.rn.f32 	%f604, %f552, %f600, %f603;
	mov.f32 	%f605, 0f00000000;
	fma.rn.f32 	%f606, %f605, %f598, %f604;
	add.rn.f32 	%f607, %f601, %f606;
	neg.f32 	%f608, %f607;
	add.rn.f32 	%f609, %f601, %f608;
	add.rn.f32 	%f610, %f609, %f606;
	mov.b32 	%r92, %f607;
	setp.eq.s32 	%p31, %r92, 1118925336;
	add.s32 	%r93, %r92, -1;
	mov.b32 	%f611, %r93;
	add.f32 	%f612, %f610, 0f37000000;
	selp.f32 	%f76, %f612, %f610, %p31;
	selp.f32 	%f613, %f611, %f607, %p31;
	mov.f32 	%f614, 0f3FB8AA3B;
	mul.rn.f32 	%f615, %f613, %f614;
	cvt.rzi.f32.f32 	%f616, %f615;
	abs.f32 	%f617, %f616;
	setp.gt.f32 	%p32, %f617, 0f42FC0000;
	mov.b32 	%r94, %f616;
	and.b32  	%r95, %r94, -2147483648;
	or.b32  	%r96, %r95, 1123811328;
	mov.b32 	%f618, %r96;
	selp.f32 	%f619, %f618, %f616, %p32;
	mov.f32 	%f620, 0fBF317218;
	fma.rn.f32 	%f621, %f619, %f620, %f613;
	mov.f32 	%f622, 0f3102E308;
	fma.rn.f32 	%f623, %f619, %f622, %f621;
	mul.f32 	%f624, %f623, 0f3FB8AA3B;
	add.f32 	%f625, %f619, 0f4B40007F;
	mov.b32 	%r97, %f625;
	shl.b32 	%r98, %r97, 23;
	mov.b32 	%f626, %r98;
	ex2.approx.ftz.f32 	%f627, %f624;
	mul.f32 	%f77, %f627, %f626;
	setp.eq.f32 	%p33, %f77, 0f7F800000;
	mov.f32 	%f1585, 0f7F800000;
	@%p33 bra 	$L__BB0_19;

	fma.rn.f32 	%f1585, %f77, %f76, %f77;

$L__BB0_19:
	mov.f32 	%f1557, 0f40000000;
	cvt.rzi.f32.f32 	%f1556, %f1557;
	add.f32 	%f1555, %f1556, %f1556;
	mov.f32 	%f1554, 0f40800000;
	sub.f32 	%f1553, %f1554, %f1555;
	abs.f32 	%f1552, %f1553;
	setp.lt.f32 	%p34, %f73, 0f00000000;
	setp.eq.f32 	%p35, %f1552, 0f3F800000;
	and.pred  	%p1, %p34, %p35;
	setp.eq.f32 	%p36, %f73, 0f00000000;
	@%p36 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_20;

$L__BB0_23:
	add.f32 	%f632, %f73, %f73;
	selp.f32 	%f1587, %f632, 0f00000000, %p35;
	bra.uni 	$L__BB0_24;

$L__BB0_20:
	mov.b32 	%r99, %f1585;
	xor.b32  	%r100, %r99, -2147483648;
	mov.b32 	%f628, %r100;
	selp.f32 	%f1587, %f628, %f1585, %p1;
	setp.geu.f32 	%p37, %f73, 0f00000000;
	@%p37 bra 	$L__BB0_24;

	mov.f32 	%f629, 0f40800000;
	cvt.rzi.f32.f32 	%f630, %f629;
	setp.eq.f32 	%p38, %f630, 0f40800000;
	@%p38 bra 	$L__BB0_24;

	mov.f32 	%f1587, 0f7FFFFFFF;

$L__BB0_24:
	add.f32 	%f633, %f75, 0f40800000;
	mov.b32 	%r101, %f633;
	setp.lt.s32 	%p40, %r101, 2139095040;
	@%p40 bra 	$L__BB0_29;

	setp.gtu.f32 	%p41, %f75, 0f7F800000;
	@%p41 bra 	$L__BB0_28;
	bra.uni 	$L__BB0_26;

$L__BB0_28:
	add.f32 	%f1587, %f73, 0f40800000;
	bra.uni 	$L__BB0_29;

$L__BB0_26:
	setp.neu.f32 	%p42, %f75, 0f7F800000;
	@%p42 bra 	$L__BB0_29;

	selp.f32 	%f1587, 0fFF800000, 0f7F800000, %p1;

$L__BB0_29:
	mov.f32 	%f634, 0f3F800000;
	sub.f32 	%f635, %f634, %f1587;
	setp.eq.f32 	%p43, %f73, 0f3F800000;
	selp.f32 	%f636, 0f00000000, %f635, %p43;
	cvt.sat.f32.f32 	%f637, %f636;
	mul.f32 	%f638, %f72, %f637;
	ld.global.f32 	%f639, [%rd7+12];
	mul.f32 	%f640, %f68, %f639;
	ld.global.f32 	%f641, [%rd7+16];
	mul.f32 	%f642, %f69, %f641;
	neg.f32 	%f643, %f642;
	sub.f32 	%f644, %f643, %f640;
	ld.global.f32 	%f645, [%rd7+20];
	mul.f32 	%f646, %f70, %f645;
	sub.f32 	%f647, %f644, %f646;
	cvt.sat.f32.f32 	%f648, %f647;
	mul.f32 	%f86, %f638, %f648;
	setp.leu.f32 	%p44, %f86, 0f3727C5AC;
	@%p44 bra 	$L__BB0_31;

	cvt.sat.f32.f32 	%f658, %f71;
	mov.f32 	%f664, 0f38D1B717;
	max.f32 	%f655, %f663, %f664;
	sub.f32 	%f656, %f67, %f655;
	mov.f32 	%f657, 0f00000000;
	mov.u32 	%r138, 2;
	mov.u32 	%r140, 1;
	mov.u32 	%r141, 1065353216;
	mov.u32 	%r172, 0;
	// begin inline asm
	call(%r102,%r103,%r104,%r105,%r106,%r107,%r108,%r109,%r110,%r111,%r112,%r113,%r114,%r115,%r116,%r117,%r118,%r119,%r120,%r121,%r122,%r123,%r124,%r125,%r126,%r127,%r128,%r129,%r130,%r131,%r132,%r133),_optix_trace_typed_32,(%r172,%rd6,%f15,%f16,%f17,%f68,%f69,%f70,%f655,%f656,%f657,%r140,%r172,%r140,%r138,%r140,%r140,%r141,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172);
	// end inline asm
	mov.b32 	%f665, %r102;
	ld.global.f32 	%f666, [%rd7+24];
	mul.f32 	%f667, %f666, %f665;
	ld.global.f32 	%f668, [%rd7+28];
	mul.f32 	%f669, %f668, %f665;
	ld.global.f32 	%f670, [%rd7+32];
	mul.f32 	%f671, %f670, %f665;
	mul.f32 	%f672, %f86, 0f3EA2F983;
	mul.f32 	%f673, %f672, %f667;
	mul.f32 	%f674, %f672, %f669;
	mul.f32 	%f675, %f672, %f671;
	fma.rn.f32 	%f1597, %f658, %f673, %f1597;
	fma.rn.f32 	%f1598, %f658, %f674, %f1598;
	fma.rn.f32 	%f1599, %f658, %f675, %f1599;
	mul.f32 	%f676, %f28, %f69;
	fma.rn.f32 	%f677, %f26, %f68, %f676;
	fma.rn.f32 	%f678, %f30, %f70, %f677;
	cvt.sat.f32.f32 	%f679, %f678;
	fma.rn.f32 	%f1594, %f673, %f679, %f1594;
	fma.rn.f32 	%f1595, %f674, %f679, %f1595;
	fma.rn.f32 	%f1596, %f679, %f675, %f1596;
	mul.f32 	%f680, %f38, %f69;
	fma.rn.f32 	%f681, %f37, %f68, %f680;
	fma.rn.f32 	%f682, %f39, %f70, %f681;
	cvt.sat.f32.f32 	%f683, %f682;
	fma.rn.f32 	%f1591, %f673, %f683, %f1591;
	fma.rn.f32 	%f1592, %f674, %f683, %f1592;
	fma.rn.f32 	%f1593, %f675, %f683, %f1593;
	mul.f32 	%f684, %f47, %f69;
	fma.rn.f32 	%f685, %f46, %f68, %f684;
	fma.rn.f32 	%f686, %f48, %f70, %f685;
	cvt.sat.f32.f32 	%f687, %f686;
	fma.rn.f32 	%f1588, %f673, %f687, %f1588;
	fma.rn.f32 	%f1589, %f674, %f687, %f1589;
	fma.rn.f32 	%f1590, %f675, %f687, %f1590;
	add.f32 	%f1600, %f1600, %f665;

$L__BB0_31:
	add.s32 	%r453, %r453, 1;

$L__BB0_32:
	add.s32 	%r450, %r450, 1;
	setp.lt.s32 	%p46, %r450, %r4;
	mov.pred 	%p204, %p22;
	@%p46 bra 	$L__BB0_15;

$L__BB0_33:
	cvt.rn.f32.s32 	%f688, %r453;
	mov.f32 	%f689, 0f3F800000;
	max.f32 	%f690, %f688, %f689;
	rcp.rn.f32 	%f691, %f690;
	mul.f32 	%f1678, %f1597, %f691;
	mul.f32 	%f1679, %f1598, %f691;
	mul.f32 	%f1680, %f1599, %f691;
	div.rn.f32 	%f1681, %f1600, %f690;
	mul.f32 	%f1675, %f1594, %f691;
	mul.f32 	%f1676, %f1595, %f691;
	mul.f32 	%f1677, %f1596, %f691;
	mul.f32 	%f1672, %f1591, %f691;
	mul.f32 	%f1673, %f1592, %f691;
	mul.f32 	%f1674, %f1593, %f691;
	mul.f32 	%f1669, %f1588, %f691;
	mul.f32 	%f1670, %f1589, %f691;
	mul.f32 	%f1671, %f1590, %f691;
	not.pred 	%p47, %p204;
	@%p47 bra 	$L__BB0_64;

	abs.f32 	%f1559, %f1562;
	abs.f32 	%f1558, %f1560;
	setp.gt.f32 	%p48, %f1558, %f1559;
	selp.f32 	%f704, 0f00000000, %f1561, %p48;
	mov.f32 	%f703, 0f00000000;
	neg.f32 	%f705, %f1562;
	selp.f32 	%f706, %f1560, %f705, %p48;
	neg.f32 	%f707, %f1561;
	selp.f32 	%f708, %f707, 0f00000000, %p48;
	mul.f32 	%f709, %f706, %f706;
	fma.rn.f32 	%f710, %f708, %f708, %f709;
	fma.rn.f32 	%f711, %f704, %f704, %f710;
	sqrt.rn.f32 	%f712, %f711;
	rcp.rn.f32 	%f713, %f712;
	mul.f32 	%f152, %f708, %f713;
	mul.f32 	%f153, %f706, %f713;
	mul.f32 	%f154, %f704, %f713;
	setp.lt.s32 	%p49, %r5, 1;
	mov.f32 	%f1650, %f703;
	mov.f32 	%f1649, %f703;
	mov.f32 	%f1648, %f703;
	mov.f32 	%f1647, %f703;
	mov.f32 	%f1646, %f703;
	mov.f32 	%f1645, %f703;
	mov.f32 	%f1644, %f703;
	mov.f32 	%f1643, %f703;
	mov.f32 	%f1642, %f703;
	mov.f32 	%f1641, %f703;
	mov.f32 	%f1640, %f703;
	mov.f32 	%f1639, %f703;
	@%p49 bra 	$L__BB0_63;

	cvt.rn.f32.s32 	%f726, %r5;
	rcp.rn.f32 	%f155, %f726;
	mul.f32 	%f156, %f15, 0f3456BF95;
	mul.f32 	%f157, %f16, 0f3456BF95;
	mul.f32 	%f158, %f17, 0f3456BF95;
	ld.const.u64 	%rd8, [params+96];
	mul.f32 	%f727, %f1560, %f153;
	mul.f32 	%f728, %f1561, %f152;
	sub.f32 	%f159, %f728, %f727;
	mul.f32 	%f729, %f1562, %f152;
	mul.f32 	%f730, %f1560, %f154;
	sub.f32 	%f160, %f730, %f729;
	mul.f32 	%f731, %f1561, %f154;
	mul.f32 	%f732, %f1562, %f153;
	sub.f32 	%f161, %f732, %f731;
	mov.u32 	%r173, 0;
	add.s64 	%rd9, %rd1, 24;
	mov.u64 	%rd53, __cudart_i2opi_f;
	abs.f32 	%f795, %f157;
	abs.f32 	%f796, %f156;
	max.f32 	%f797, %f796, %f795;
	abs.f32 	%f798, %f158;
	max.f32 	%f799, %f797, %f798;
	mov.u32 	%r454, %r173;

$L__BB0_36:
	cvt.rn.f32.s32 	%f174, %r454;
	mov.u32 	%r456, %r173;

$L__BB0_37:
	mad.lo.s32 	%r175, %r457, 1664525, 1013904223;
	and.b32  	%r176, %r175, 16777215;
	cvt.rn.f32.u32 	%f733, %r176;
	fma.rn.f32 	%f734, %f733, 0f33800000, %f174;
	mul.f32 	%f187, %f155, %f734;
	mad.lo.s32 	%r457, %r175, 1664525, 1013904223;
	and.b32  	%r177, %r457, 16777215;
	cvt.rn.f32.u32 	%f735, %r177;
	cvt.rn.f32.s32 	%f736, %r456;
	fma.rn.f32 	%f737, %f735, 0f33800000, %f736;
	mul.f32 	%f738, %f155, %f737;
	mul.f32 	%f739, %f187, %f187;
	mov.f32 	%f740, 0f3F800000;
	sub.f32 	%f741, %f740, %f739;
	mov.f32 	%f742, 0f00000000;
	max.f32 	%f743, %f742, %f741;
	sqrt.rn.f32 	%f188, %f743;
	mul.f32 	%f189, %f738, 0f40C90FDB;
	mul.f32 	%f744, %f189, 0f3F22F983;
	cvt.rni.s32.f32 	%r464, %f744;
	cvt.rn.f32.s32 	%f745, %r464;
	mov.f32 	%f746, 0fBFC90FDA;
	fma.rn.f32 	%f747, %f745, %f746, %f189;
	mov.f32 	%f748, 0fB3A22168;
	fma.rn.f32 	%f749, %f745, %f748, %f747;
	mov.f32 	%f750, 0fA7C234C5;
	fma.rn.f32 	%f1654, %f745, %f750, %f749;
	abs.f32 	%f191, %f189;
	setp.ltu.f32 	%p50, %f191, 0f47CE4780;
	mov.u32 	%r461, %r464;
	mov.f32 	%f1651, %f1654;
	@%p50 bra 	$L__BB0_45;

	setp.eq.f32 	%p51, %f191, 0f7F800000;
	@%p51 bra 	$L__BB0_44;
	bra.uni 	$L__BB0_39;

$L__BB0_44:
	mov.f32 	%f753, 0f00000000;
	mul.rn.f32 	%f1651, %f189, %f753;
	mov.u32 	%r461, 0;
	bra.uni 	$L__BB0_45;

$L__BB0_39:
	mov.b32 	%r21, %f189;
	bfe.u32 	%r179, %r21, 23, 8;
	add.s32 	%r22, %r179, -128;
	shl.b32 	%r180, %r21, 8;
	or.b32  	%r23, %r180, -2147483648;
	shr.u32 	%r24, %r22, 5;
	mov.u64 	%rd118, 0;
	mov.u32 	%r458, 0;
	mov.u64 	%rd116, %rd1;
	mov.u64 	%rd117, %rd53;

$L__BB0_40:
	.pragma "nounroll";
	ld.global.nc.u32 	%r181, [%rd117];
	mad.wide.u32 	%rd55, %r181, %r23, %rd118;
	shr.u64 	%rd118, %rd55, 32;
	st.local.u32 	[%rd116], %rd55;
	add.s64 	%rd117, %rd117, 4;
	add.s64 	%rd116, %rd116, 4;
	add.s32 	%r458, %r458, 1;
	setp.ne.s32 	%p52, %r458, 6;
	@%p52 bra 	$L__BB0_40;

	st.local.u32 	[%rd9], %rd118;
	mov.u32 	%r182, 4;
	sub.s32 	%r27, %r182, %r24;
	mov.u32 	%r183, 6;
	sub.s32 	%r184, %r183, %r24;
	mul.wide.s32 	%rd56, %r184, 4;
	add.s64 	%rd57, %rd1, %rd56;
	ld.local.u32 	%r459, [%rd57];
	ld.local.u32 	%r460, [%rd57+-4];
	and.b32  	%r30, %r22, 31;
	setp.eq.s32 	%p53, %r30, 0;
	@%p53 bra 	$L__BB0_43;

	mov.u32 	%r185, 32;
	sub.s32 	%r186, %r185, %r30;
	shr.u32 	%r187, %r460, %r186;
	shl.b32 	%r188, %r459, %r30;
	add.s32 	%r459, %r187, %r188;
	mul.wide.s32 	%rd58, %r27, 4;
	add.s64 	%rd59, %rd1, %rd58;
	ld.local.u32 	%r189, [%rd59];
	shr.u32 	%r190, %r189, %r186;
	shl.b32 	%r191, %r460, %r30;
	add.s32 	%r460, %r190, %r191;

$L__BB0_43:
	and.b32  	%r192, %r21, -2147483648;
	shr.u32 	%r193, %r460, 30;
	shl.b32 	%r194, %r459, 2;
	or.b32  	%r195, %r193, %r194;
	shr.u32 	%r196, %r195, 31;
	shr.u32 	%r197, %r459, 30;
	add.s32 	%r198, %r196, %r197;
	neg.s32 	%r199, %r198;
	setp.eq.s32 	%p54, %r192, 0;
	selp.b32 	%r461, %r198, %r199, %p54;
	setp.ne.s32 	%p55, %r196, 0;
	xor.b32  	%r200, %r192, -2147483648;
	selp.b32 	%r201, %r200, %r192, %p55;
	selp.b32 	%r202, -1, 0, %p55;
	xor.b32  	%r203, %r195, %r202;
	shl.b32 	%r204, %r460, 2;
	xor.b32  	%r205, %r204, %r202;
	cvt.u64.u32 	%rd60, %r203;
	cvt.u64.u32 	%rd61, %r205;
	bfi.b64 	%rd62, %rd60, %rd61, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd62;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f751, %fd2;
	setp.eq.s32 	%p56, %r201, 0;
	neg.f32 	%f752, %f751;
	selp.f32 	%f1651, %f751, %f752, %p56;

$L__BB0_45:
	add.s32 	%r37, %r461, 1;
	and.b32  	%r38, %r37, 1;
	setp.eq.s32 	%p57, %r38, 0;
	selp.f32 	%f195, %f1651, 0f3F800000, %p57;
	mul.rn.f32 	%f196, %f1651, %f1651;
	mov.f32 	%f1652, 0fB94D4153;
	@%p57 bra 	$L__BB0_47;

	mov.f32 	%f755, 0fBAB607ED;
	mov.f32 	%f756, 0f37CBAC00;
	fma.rn.f32 	%f1652, %f756, %f196, %f755;

$L__BB0_47:
	selp.f32 	%f757, 0f3C0885E4, 0f3D2AAABB, %p57;
	fma.rn.f32 	%f758, %f1652, %f196, %f757;
	selp.f32 	%f759, 0fBE2AAAA8, 0fBEFFFFFF, %p57;
	fma.rn.f32 	%f760, %f758, %f196, %f759;
	mov.f32 	%f761, 0f00000000;
	fma.rn.f32 	%f762, %f196, %f195, %f761;
	fma.rn.f32 	%f1653, %f760, %f762, %f195;
	and.b32  	%r207, %r37, 2;
	setp.eq.s32 	%p59, %r207, 0;
	@%p59 bra 	$L__BB0_49;

	mov.f32 	%f764, 0fBF800000;
	fma.rn.f32 	%f1653, %f1653, %f764, %f761;

$L__BB0_49:
	@%p50 bra 	$L__BB0_57;

	setp.eq.f32 	%p61, %f191, 0f7F800000;
	@%p61 bra 	$L__BB0_56;
	bra.uni 	$L__BB0_51;

$L__BB0_56:
	mov.f32 	%f767, 0f00000000;
	mul.rn.f32 	%f1654, %f189, %f767;
	mov.u32 	%r464, 0;
	bra.uni 	$L__BB0_57;

$L__BB0_51:
	mov.b32 	%r39, %f189;
	bfe.u32 	%r208, %r39, 23, 8;
	add.s32 	%r40, %r208, -128;
	shl.b32 	%r209, %r39, 8;
	or.b32  	%r41, %r209, -2147483648;
	shr.u32 	%r42, %r40, 5;
	mov.u64 	%rd119, 0;
	mov.u64 	%rd120, %rd119;

$L__BB0_52:
	.pragma "nounroll";
	shl.b64 	%rd65, %rd119, 2;
	mov.u64 	%rd66, __cudart_i2opi_f;
	add.s64 	%rd67, %rd66, %rd65;
	ld.global.nc.u32 	%r210, [%rd67];
	mad.wide.u32 	%rd68, %r210, %r41, %rd120;
	shr.u64 	%rd120, %rd68, 32;
	add.s64 	%rd69, %rd1, %rd65;
	st.local.u32 	[%rd69], %rd68;
	cvt.u32.u64 	%r211, %rd119;
	add.s32 	%r212, %r211, 1;
	cvt.s64.s32 	%rd119, %r212;
	setp.ne.s32 	%p62, %r212, 6;
	@%p62 bra 	$L__BB0_52;

	st.local.u32 	[%rd9], %rd120;
	mov.u32 	%r213, 4;
	sub.s32 	%r43, %r213, %r42;
	mov.u32 	%r214, 6;
	sub.s32 	%r215, %r214, %r42;
	mul.wide.s32 	%rd70, %r215, 4;
	add.s64 	%rd71, %rd1, %rd70;
	ld.local.u32 	%r462, [%rd71];
	ld.local.u32 	%r463, [%rd71+-4];
	and.b32  	%r46, %r40, 31;
	setp.eq.s32 	%p63, %r46, 0;
	@%p63 bra 	$L__BB0_55;

	mov.u32 	%r216, 32;
	sub.s32 	%r217, %r216, %r46;
	shr.u32 	%r218, %r463, %r217;
	shl.b32 	%r219, %r462, %r46;
	add.s32 	%r462, %r218, %r219;
	mul.wide.s32 	%rd72, %r43, 4;
	add.s64 	%rd73, %rd1, %rd72;
	ld.local.u32 	%r220, [%rd73];
	shr.u32 	%r221, %r220, %r217;
	shl.b32 	%r222, %r463, %r46;
	add.s32 	%r463, %r221, %r222;

$L__BB0_55:
	and.b32  	%r223, %r39, -2147483648;
	shr.u32 	%r224, %r463, 30;
	shl.b32 	%r225, %r462, 2;
	or.b32  	%r226, %r224, %r225;
	shr.u32 	%r227, %r226, 31;
	shr.u32 	%r228, %r462, 30;
	add.s32 	%r229, %r227, %r228;
	neg.s32 	%r230, %r229;
	setp.eq.s32 	%p64, %r223, 0;
	selp.b32 	%r464, %r229, %r230, %p64;
	setp.ne.s32 	%p65, %r227, 0;
	xor.b32  	%r231, %r223, -2147483648;
	selp.b32 	%r232, %r231, %r223, %p65;
	selp.b32 	%r233, -1, 0, %p65;
	xor.b32  	%r234, %r226, %r233;
	shl.b32 	%r235, %r463, 2;
	xor.b32  	%r236, %r235, %r233;
	cvt.u64.u32 	%rd74, %r234;
	cvt.u64.u32 	%rd75, %r236;
	bfi.b64 	%rd76, %rd74, %rd75, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd76;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f765, %fd4;
	setp.eq.s32 	%p66, %r232, 0;
	neg.f32 	%f766, %f765;
	selp.f32 	%f1654, %f765, %f766, %p66;

$L__BB0_57:
	mul.f32 	%f205, %f188, %f1653;
	and.b32  	%r53, %r464, 1;
	setp.eq.s32 	%p67, %r53, 0;
	selp.f32 	%f206, %f1654, 0f3F800000, %p67;
	mul.rn.f32 	%f207, %f1654, %f1654;
	mov.f32 	%f1655, 0fB94D4153;
	@%p67 bra 	$L__BB0_59;

	mov.f32 	%f769, 0fBAB607ED;
	mov.f32 	%f770, 0f37CBAC00;
	fma.rn.f32 	%f1655, %f770, %f207, %f769;

$L__BB0_59:
	selp.f32 	%f771, 0f3C0885E4, 0f3D2AAABB, %p67;
	fma.rn.f32 	%f772, %f1655, %f207, %f771;
	selp.f32 	%f773, 0fBE2AAAA8, 0fBEFFFFFF, %p67;
	fma.rn.f32 	%f774, %f772, %f207, %f773;
	mov.f32 	%f775, 0f00000000;
	fma.rn.f32 	%f776, %f207, %f206, %f775;
	fma.rn.f32 	%f1656, %f774, %f776, %f206;
	and.b32  	%r238, %r464, 2;
	setp.eq.s32 	%p69, %r238, 0;
	@%p69 bra 	$L__BB0_61;

	mov.f32 	%f778, 0fBF800000;
	fma.rn.f32 	%f1656, %f1656, %f778, %f775;

$L__BB0_61:
	mul.f32 	%f788, %f188, %f1656;
	mul.f32 	%f789, %f152, %f788;
	mul.f32 	%f790, %f153, %f788;
	mul.f32 	%f791, %f154, %f788;
	fma.rn.f32 	%f792, %f161, %f205, %f789;
	fma.rn.f32 	%f793, %f160, %f205, %f790;
	fma.rn.f32 	%f794, %f159, %f205, %f791;
	fma.rn.f32 	%f782, %f1560, %f187, %f792;
	fma.rn.f32 	%f783, %f1561, %f187, %f793;
	fma.rn.f32 	%f784, %f1562, %f187, %f794;
	mov.f32 	%f800, 0f38D1B717;
	max.f32 	%f785, %f799, %f800;
	mov.f32 	%f786, 0f6C4ECB8F;
	mov.u32 	%r272, 1;
	mov.u32 	%r275, 2;
	mov.u32 	%r277, 3;
	mov.u32 	%r309, 0;
	// begin inline asm
	call(%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260,%r261,%r262,%r263,%r264,%r265,%r266,%r267,%r268,%r269,%r270),_optix_trace_typed_32,(%r309,%rd8,%f15,%f16,%f17,%f782,%f783,%f784,%f785,%f786,%f775,%r272,%r309,%r309,%r275,%r309,%r277,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309);
	// end inline asm
	mov.b32 	%f801, %r239;
	mov.b32 	%f802, %r240;
	mov.b32 	%f803, %r241;
	max.f32 	%f804, %f801, %f775;
	max.f32 	%f805, %f802, %f775;
	max.f32 	%f806, %f803, %f775;
	mul.f32 	%f807, %f28, %f783;
	fma.rn.f32 	%f808, %f26, %f782, %f807;
	fma.rn.f32 	%f809, %f30, %f784, %f808;
	cvt.sat.f32.f32 	%f810, %f809;
	fma.rn.f32 	%f1644, %f804, %f810, %f1644;
	fma.rn.f32 	%f1643, %f805, %f810, %f1643;
	fma.rn.f32 	%f1642, %f806, %f810, %f1642;
	mul.f32 	%f811, %f38, %f783;
	fma.rn.f32 	%f812, %f37, %f782, %f811;
	fma.rn.f32 	%f813, %f39, %f784, %f812;
	cvt.sat.f32.f32 	%f814, %f813;
	fma.rn.f32 	%f1647, %f804, %f814, %f1647;
	fma.rn.f32 	%f1646, %f805, %f814, %f1646;
	fma.rn.f32 	%f1645, %f806, %f814, %f1645;
	mul.f32 	%f815, %f47, %f783;
	fma.rn.f32 	%f816, %f46, %f782, %f815;
	fma.rn.f32 	%f817, %f48, %f784, %f816;
	cvt.sat.f32.f32 	%f818, %f817;
	fma.rn.f32 	%f1650, %f804, %f818, %f1650;
	fma.rn.f32 	%f1649, %f805, %f818, %f1649;
	fma.rn.f32 	%f1648, %f806, %f818, %f1648;
	mul.f32 	%f819, %f1561, %f783;
	fma.rn.f32 	%f820, %f1560, %f782, %f819;
	fma.rn.f32 	%f821, %f1562, %f784, %f820;
	cvt.sat.f32.f32 	%f822, %f821;
	fma.rn.f32 	%f1641, %f804, %f822, %f1641;
	fma.rn.f32 	%f1640, %f805, %f822, %f1640;
	fma.rn.f32 	%f1639, %f806, %f822, %f1639;
	add.s32 	%r456, %r456, 1;
	setp.lt.s32 	%p70, %r456, %r5;
	@%p70 bra 	$L__BB0_37;

	add.s32 	%r454, %r454, 1;
	setp.lt.s32 	%p71, %r454, %r5;
	@%p71 bra 	$L__BB0_36;

$L__BB0_63:
	mul.lo.s32 	%r310, %r5, %r5;
	cvt.rn.f32.s32 	%f823, %r310;
	rcp.rn.f32 	%f824, %f823;
	mul.f32 	%f825, %f824, %f1641;
	mul.f32 	%f826, %f824, %f1640;
	mul.f32 	%f827, %f824, %f1639;
	div.rn.f32 	%f1681, %f703, %f823;
	mul.f32 	%f1675, %f824, %f1644;
	mul.f32 	%f1676, %f824, %f1643;
	mul.f32 	%f1677, %f824, %f1642;
	mul.f32 	%f1672, %f824, %f1647;
	mul.f32 	%f1673, %f824, %f1646;
	mul.f32 	%f1674, %f824, %f1645;
	mul.f32 	%f1669, %f824, %f1650;
	mul.f32 	%f1670, %f824, %f1649;
	mul.f32 	%f1671, %f824, %f1648;
	fma.rn.f32 	%f1678, %f824, %f1641, %f825;
	fma.rn.f32 	%f1679, %f824, %f1640, %f826;
	fma.rn.f32 	%f1680, %f824, %f1639, %f827;

$L__BB0_64:
	ld.const.u32 	%r449, [params+616];
	setp.lt.s32 	%p72, %r449, 0;
	selp.f32 	%f263, %f1678, %f1681, %p72;
	ld.const.u32 	%r56, [params+104];
	and.b32  	%r311, %r56, 8;
	setp.eq.s32 	%p73, %r311, 0;
	@%p73 bra 	$L__BB0_78;

	ld.const.u64 	%rd78, [params+192];
	cvta.to.global.u64 	%rd20, %rd78;
	ld.const.u32 	%r312, [params+184];
	mad.lo.s32 	%r313, %r312, %r7, %r6;
	cvt.u64.u32 	%rd21, %r313;
	mov.f32 	%f830, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f831, %f830;
	add.f32 	%f832, %f831, %f831;
	mov.f32 	%f833, 0f3EE8BA2E;
	sub.f32 	%f834, %f833, %f832;
	abs.f32 	%f264, %f834;
	abs.f32 	%f265, %f263;
	setp.lt.f32 	%p74, %f265, 0f00800000;
	mul.f32 	%f835, %f265, 0f4B800000;
	selp.f32 	%f836, %f835, %f265, %p74;
	selp.f32 	%f837, 0fC3170000, 0fC2FE0000, %p74;
	mov.b32 	%r314, %f836;
	and.b32  	%r315, %r314, 8388607;
	or.b32  	%r316, %r315, 1065353216;
	mov.b32 	%f838, %r316;
	shr.u32 	%r317, %r314, 23;
	cvt.rn.f32.u32 	%f839, %r317;
	add.f32 	%f840, %f837, %f839;
	setp.gt.f32 	%p75, %f838, 0f3FB504F3;
	mul.f32 	%f841, %f838, 0f3F000000;
	add.f32 	%f842, %f840, 0f3F800000;
	selp.f32 	%f843, %f842, %f840, %p75;
	selp.f32 	%f844, %f841, %f838, %p75;
	add.f32 	%f845, %f844, 0fBF800000;
	add.f32 	%f846, %f844, 0f3F800000;
	rcp.approx.ftz.f32 	%f847, %f846;
	add.f32 	%f848, %f845, %f845;
	mul.f32 	%f849, %f848, %f847;
	mul.f32 	%f850, %f849, %f849;
	mov.f32 	%f851, 0f3C4CAF63;
	mov.f32 	%f852, 0f3B18F0FE;
	fma.rn.f32 	%f853, %f852, %f850, %f851;
	mov.f32 	%f854, 0f3DAAAABD;
	fma.rn.f32 	%f855, %f853, %f850, %f854;
	mul.rn.f32 	%f856, %f855, %f850;
	mul.rn.f32 	%f857, %f856, %f849;
	sub.f32 	%f858, %f845, %f849;
	add.f32 	%f859, %f858, %f858;
	neg.f32 	%f860, %f849;
	fma.rn.f32 	%f861, %f860, %f845, %f859;
	mul.rn.f32 	%f862, %f847, %f861;
	add.f32 	%f863, %f857, %f849;
	sub.f32 	%f864, %f849, %f863;
	add.f32 	%f865, %f857, %f864;
	add.f32 	%f866, %f862, %f865;
	add.f32 	%f867, %f863, %f866;
	sub.f32 	%f868, %f863, %f867;
	add.f32 	%f869, %f866, %f868;
	mov.f32 	%f870, 0f3F317200;
	mul.rn.f32 	%f871, %f843, %f870;
	mov.f32 	%f872, 0f35BFBE8E;
	mul.rn.f32 	%f873, %f843, %f872;
	add.f32 	%f874, %f871, %f867;
	sub.f32 	%f875, %f871, %f874;
	add.f32 	%f876, %f867, %f875;
	add.f32 	%f877, %f869, %f876;
	add.f32 	%f878, %f873, %f877;
	add.f32 	%f879, %f874, %f878;
	sub.f32 	%f880, %f874, %f879;
	add.f32 	%f881, %f878, %f880;
	mul.rn.f32 	%f882, %f833, %f879;
	neg.f32 	%f883, %f882;
	fma.rn.f32 	%f884, %f833, %f879, %f883;
	fma.rn.f32 	%f885, %f833, %f881, %f884;
	mov.f32 	%f886, 0f00000000;
	fma.rn.f32 	%f887, %f886, %f879, %f885;
	add.rn.f32 	%f888, %f882, %f887;
	neg.f32 	%f889, %f888;
	add.rn.f32 	%f890, %f882, %f889;
	add.rn.f32 	%f891, %f890, %f887;
	mov.b32 	%r318, %f888;
	setp.eq.s32 	%p76, %r318, 1118925336;
	add.s32 	%r319, %r318, -1;
	mov.b32 	%f892, %r319;
	add.f32 	%f893, %f891, 0f37000000;
	selp.f32 	%f266, %f893, %f891, %p76;
	selp.f32 	%f894, %f892, %f888, %p76;
	mov.f32 	%f895, 0f3FB8AA3B;
	mul.rn.f32 	%f896, %f894, %f895;
	cvt.rzi.f32.f32 	%f897, %f896;
	abs.f32 	%f898, %f897;
	setp.gt.f32 	%p77, %f898, 0f42FC0000;
	mov.b32 	%r320, %f897;
	and.b32  	%r321, %r320, -2147483648;
	or.b32  	%r322, %r321, 1123811328;
	mov.b32 	%f899, %r322;
	selp.f32 	%f900, %f899, %f897, %p77;
	mov.f32 	%f901, 0fBF317218;
	fma.rn.f32 	%f902, %f900, %f901, %f894;
	mov.f32 	%f903, 0f3102E308;
	fma.rn.f32 	%f904, %f900, %f903, %f902;
	mul.f32 	%f905, %f904, 0f3FB8AA3B;
	add.f32 	%f906, %f900, 0f4B40007F;
	mov.b32 	%r323, %f906;
	shl.b32 	%r324, %r323, 23;
	mov.b32 	%f907, %r324;
	ex2.approx.ftz.f32 	%f908, %f905;
	mul.f32 	%f267, %f908, %f907;
	setp.eq.f32 	%p78, %f267, 0f7F800000;
	mov.f32 	%f1682, 0f7F800000;
	@%p78 bra 	$L__BB0_67;

	fma.rn.f32 	%f1682, %f267, %f266, %f267;

$L__BB0_67:
	setp.lt.f32 	%p79, %f263, 0f00000000;
	setp.eq.f32 	%p80, %f264, 0f3F800000;
	and.pred  	%p3, %p79, %p80;
	setp.eq.f32 	%p81, %f263, 0f00000000;
	@%p81 bra 	$L__BB0_71;
	bra.uni 	$L__BB0_68;

$L__BB0_71:
	add.f32 	%f913, %f263, %f263;
	selp.f32 	%f1684, %f913, 0f00000000, %p80;
	bra.uni 	$L__BB0_72;

$L__BB0_172:
	mov.f32 	%f1524, 0f00000000;
	mov.u32 	%r466, 0;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs127, %f1524;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs126, %f1524;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs125, %f1524;}

	// end inline asm
	mov.u16 	%rs128, 0;
	st.global.v4.u16 	[%rd28], {%rs125, %rs126, %rs127, %rs128};

$L__BB0_173:
	ld.const.u64 	%rd107, [params+256];
	cvta.to.global.u64 	%rd108, %rd107;
	ld.const.u32 	%r443, [params+248];
	mad.lo.s32 	%r444, %r443, %r7, %r6;
	mul.wide.u32 	%rd109, %r444, 8;
	add.s64 	%rd29, %rd108, %rd109;
	setp.eq.s32 	%p201, %r466, 0;
	@%p201 bra 	$L__BB0_175;

	ld.global.v4.u16 	{%rs135, %rs136, %rs137, %rs138}, [%rd29];
	// begin inline asm
	{  cvt.f32.f16 %f1525, %rs135;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1526, %rs136;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1527, %rs137;}

	// end inline asm
	add.f32 	%f1528, %f1525, 0f00000000;
	add.f32 	%f1529, %f1526, 0f00000000;
	add.f32 	%f1530, %f1527, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs134, %f1530;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs133, %f1529;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs132, %f1528;}

	// end inline asm
	mov.u16 	%rs139, 0;
	st.global.v4.u16 	[%rd29], {%rs132, %rs133, %rs134, %rs139};
	bra.uni 	$L__BB0_176;

$L__BB0_175:
	mov.f32 	%f1533, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs142, %f1533;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs141, %f1533;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs140, %f1533;}

	// end inline asm
	mov.u16 	%rs143, 0;
	st.global.v4.u16 	[%rd29], {%rs140, %rs141, %rs142, %rs143};

$L__BB0_176:
	ld.const.u64 	%rd110, [params+272];
	cvta.to.global.u64 	%rd111, %rd110;
	ld.const.u32 	%r445, [params+264];
	mad.lo.s32 	%r446, %r445, %r7, %r6;
	mul.wide.u32 	%rd112, %r446, 8;
	add.s64 	%rd30, %rd111, %rd112;
	@%p201 bra 	$L__BB0_178;

	ld.global.v4.u16 	{%rs150, %rs151, %rs152, %rs153}, [%rd30];
	// begin inline asm
	{  cvt.f32.f16 %f1534, %rs150;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1535, %rs151;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1536, %rs152;}

	// end inline asm
	add.f32 	%f1537, %f1534, 0f00000000;
	add.f32 	%f1538, %f1535, 0f00000000;
	add.f32 	%f1539, %f1536, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs149, %f1539;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs148, %f1538;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs147, %f1537;}

	// end inline asm
	mov.u16 	%rs154, 0;
	st.global.v4.u16 	[%rd30], {%rs147, %rs148, %rs149, %rs154};
	bra.uni 	$L__BB0_179;

$L__BB0_178:
	mov.f32 	%f1542, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs157, %f1542;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs156, %f1542;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs155, %f1542;}

	// end inline asm
	mov.u16 	%rs158, 0;
	st.global.v4.u16 	[%rd30], {%rs155, %rs156, %rs157, %rs158};

$L__BB0_179:
	ld.const.u64 	%rd113, [params+288];
	cvta.to.global.u64 	%rd114, %rd113;
	ld.const.u32 	%r447, [params+280];
	mad.lo.s32 	%r448, %r447, %r7, %r6;
	mul.wide.u32 	%rd115, %r448, 8;
	add.s64 	%rd31, %rd114, %rd115;
	@%p201 bra 	$L__BB0_181;

	ld.global.v4.u16 	{%rs165, %rs166, %rs167, %rs168}, [%rd31];
	// begin inline asm
	{  cvt.f32.f16 %f1543, %rs165;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1544, %rs166;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1545, %rs167;}

	// end inline asm
	add.f32 	%f1546, %f1543, 0f00000000;
	add.f32 	%f1547, %f1544, 0f00000000;
	add.f32 	%f1548, %f1545, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs164, %f1548;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs163, %f1547;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs162, %f1546;}

	// end inline asm
	mov.u16 	%rs169, 0;
	st.global.v4.u16 	[%rd31], {%rs162, %rs163, %rs164, %rs169};
	bra.uni 	$L__BB0_182;

$L__BB0_181:
	mov.f32 	%f1551, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs172, %f1551;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs171, %f1551;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs170, %f1551;}

	// end inline asm
	mov.u16 	%rs173, 0;
	st.global.v4.u16 	[%rd31], {%rs170, %rs171, %rs172, %rs173};
	bra.uni 	$L__BB0_182;

$L__BB0_68:
	mov.b32 	%r325, %f1682;
	xor.b32  	%r326, %r325, -2147483648;
	mov.b32 	%f909, %r326;
	selp.f32 	%f1684, %f909, %f1682, %p3;
	setp.geu.f32 	%p82, %f263, 0f00000000;
	@%p82 bra 	$L__BB0_72;

	mov.f32 	%f910, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f911, %f910;
	setp.eq.f32 	%p83, %f911, 0f3EE8BA2E;
	@%p83 bra 	$L__BB0_72;

	mov.f32 	%f1684, 0f7FFFFFFF;

$L__BB0_72:
	add.f32 	%f914, %f265, 0f3EE8BA2E;
	mov.b32 	%r327, %f914;
	setp.lt.s32 	%p85, %r327, 2139095040;
	@%p85 bra 	$L__BB0_77;

	setp.gtu.f32 	%p86, %f265, 0f7F800000;
	@%p86 bra 	$L__BB0_76;
	bra.uni 	$L__BB0_74;

$L__BB0_76:
	add.f32 	%f1684, %f263, 0f3EE8BA2E;
	bra.uni 	$L__BB0_77;

$L__BB0_74:
	setp.neu.f32 	%p87, %f265, 0f7F800000;
	@%p87 bra 	$L__BB0_77;

	selp.f32 	%f1684, 0fFF800000, 0f7F800000, %p3;

$L__BB0_77:
	mul.f32 	%f915, %f1684, 0f437F0000;
	setp.eq.f32 	%p88, %f263, 0f3F800000;
	selp.f32 	%f916, 0f437F0000, %f915, %p88;
	cvt.rzi.u32.f32 	%r328, %f916;
	shl.b64 	%rd79, %rd21, 1;
	add.s64 	%rd80, %rd20, %rd79;
	cvt.u16.u32 	%rs45, %r328;
	mov.u16 	%rs46, 255;
	st.global.v2.u8 	[%rd80], {%rs45, %rs46};

$L__BB0_78:
	ld.const.v2.f32 	{%f917, %f918}, [params+648];
	mul.f32 	%f278, %f1678, %f917;
	mul.f32 	%f279, %f1679, %f918;
	ld.const.f32 	%f280, [params+656];
	mul.f32 	%f281, %f1680, %f280;
	and.b32  	%r329, %r56, 1;
	setp.eq.b32 	%p89, %r329, 1;
	mov.pred 	%p90, 0;
	xor.pred  	%p91, %p89, %p90;
	not.pred 	%p92, %p91;
	@%p92 bra 	$L__BB0_152;

	mov.f32 	%f920, 0f3E666666;
	cvt.rzi.f32.f32 	%f921, %f920;
	add.f32 	%f922, %f921, %f921;
	mov.f32 	%f923, 0f3EE66666;
	sub.f32 	%f924, %f923, %f922;
	abs.f32 	%f282, %f924;
	abs.f32 	%f283, %f278;
	setp.lt.f32 	%p93, %f283, 0f00800000;
	mul.f32 	%f925, %f283, 0f4B800000;
	selp.f32 	%f926, %f925, %f283, %p93;
	selp.f32 	%f927, 0fC3170000, 0fC2FE0000, %p93;
	mov.b32 	%r330, %f926;
	and.b32  	%r331, %r330, 8388607;
	or.b32  	%r332, %r331, 1065353216;
	mov.b32 	%f928, %r332;
	shr.u32 	%r333, %r330, 23;
	cvt.rn.f32.u32 	%f929, %r333;
	add.f32 	%f930, %f927, %f929;
	setp.gt.f32 	%p94, %f928, 0f3FB504F3;
	mul.f32 	%f931, %f928, 0f3F000000;
	add.f32 	%f932, %f930, 0f3F800000;
	selp.f32 	%f933, %f932, %f930, %p94;
	selp.f32 	%f934, %f931, %f928, %p94;
	add.f32 	%f935, %f934, 0fBF800000;
	add.f32 	%f936, %f934, 0f3F800000;
	rcp.approx.ftz.f32 	%f937, %f936;
	add.f32 	%f938, %f935, %f935;
	mul.f32 	%f939, %f938, %f937;
	mul.f32 	%f940, %f939, %f939;
	mov.f32 	%f941, 0f3C4CAF63;
	mov.f32 	%f942, 0f3B18F0FE;
	fma.rn.f32 	%f943, %f942, %f940, %f941;
	mov.f32 	%f944, 0f3DAAAABD;
	fma.rn.f32 	%f945, %f943, %f940, %f944;
	mul.rn.f32 	%f946, %f945, %f940;
	mul.rn.f32 	%f947, %f946, %f939;
	sub.f32 	%f948, %f935, %f939;
	add.f32 	%f949, %f948, %f948;
	neg.f32 	%f950, %f939;
	fma.rn.f32 	%f951, %f950, %f935, %f949;
	mul.rn.f32 	%f952, %f937, %f951;
	add.f32 	%f953, %f947, %f939;
	sub.f32 	%f954, %f939, %f953;
	add.f32 	%f955, %f947, %f954;
	add.f32 	%f956, %f952, %f955;
	add.f32 	%f957, %f953, %f956;
	sub.f32 	%f958, %f953, %f957;
	add.f32 	%f959, %f956, %f958;
	mov.f32 	%f960, 0f3F317200;
	mul.rn.f32 	%f961, %f933, %f960;
	mov.f32 	%f962, 0f35BFBE8E;
	mul.rn.f32 	%f963, %f933, %f962;
	add.f32 	%f964, %f961, %f957;
	sub.f32 	%f965, %f961, %f964;
	add.f32 	%f966, %f957, %f965;
	add.f32 	%f967, %f959, %f966;
	add.f32 	%f968, %f963, %f967;
	add.f32 	%f969, %f964, %f968;
	sub.f32 	%f970, %f964, %f969;
	add.f32 	%f971, %f968, %f970;
	mul.rn.f32 	%f972, %f923, %f969;
	neg.f32 	%f973, %f972;
	fma.rn.f32 	%f974, %f923, %f969, %f973;
	fma.rn.f32 	%f975, %f923, %f971, %f974;
	mov.f32 	%f976, 0f00000000;
	fma.rn.f32 	%f977, %f976, %f969, %f975;
	add.rn.f32 	%f978, %f972, %f977;
	neg.f32 	%f979, %f978;
	add.rn.f32 	%f980, %f972, %f979;
	add.rn.f32 	%f981, %f980, %f977;
	mov.b32 	%r334, %f978;
	setp.eq.s32 	%p95, %r334, 1118925336;
	add.s32 	%r335, %r334, -1;
	mov.b32 	%f982, %r335;
	add.f32 	%f983, %f981, 0f37000000;
	selp.f32 	%f284, %f983, %f981, %p95;
	selp.f32 	%f984, %f982, %f978, %p95;
	mov.f32 	%f985, 0f3FB8AA3B;
	mul.rn.f32 	%f986, %f984, %f985;
	cvt.rzi.f32.f32 	%f987, %f986;
	abs.f32 	%f988, %f987;
	setp.gt.f32 	%p96, %f988, 0f42FC0000;
	mov.b32 	%r336, %f987;
	and.b32  	%r337, %r336, -2147483648;
	or.b32  	%r338, %r337, 1123811328;
	mov.b32 	%f989, %r338;
	selp.f32 	%f990, %f989, %f987, %p96;
	mov.f32 	%f991, 0fBF317218;
	fma.rn.f32 	%f992, %f990, %f991, %f984;
	mov.f32 	%f993, 0f3102E308;
	fma.rn.f32 	%f994, %f990, %f993, %f992;
	mul.f32 	%f995, %f994, 0f3FB8AA3B;
	add.f32 	%f996, %f990, 0f4B40007F;
	mov.b32 	%r339, %f996;
	shl.b32 	%r340, %r339, 23;
	mov.b32 	%f997, %r340;
	ex2.approx.ftz.f32 	%f998, %f995;
	mul.f32 	%f285, %f998, %f997;
	setp.eq.f32 	%p97, %f285, 0f7F800000;
	mov.f32 	%f1685, 0f7F800000;
	@%p97 bra 	$L__BB0_81;

	fma.rn.f32 	%f1685, %f285, %f284, %f285;

$L__BB0_81:
	setp.lt.f32 	%p98, %f278, 0f00000000;
	setp.eq.f32 	%p99, %f282, 0f3F800000;
	and.pred  	%p4, %p98, %p99;
	setp.eq.f32 	%p100, %f278, 0f00000000;
	@%p100 bra 	$L__BB0_85;
	bra.uni 	$L__BB0_82;

$L__BB0_85:
	add.f32 	%f1003, %f278, %f278;
	selp.f32 	%f1687, %f1003, 0f00000000, %p99;
	bra.uni 	$L__BB0_86;

$L__BB0_82:
	mov.b32 	%r341, %f1685;
	xor.b32  	%r342, %r341, -2147483648;
	mov.b32 	%f999, %r342;
	selp.f32 	%f1687, %f999, %f1685, %p4;
	setp.geu.f32 	%p101, %f278, 0f00000000;
	@%p101 bra 	$L__BB0_86;

	mov.f32 	%f1000, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1001, %f1000;
	setp.eq.f32 	%p102, %f1001, 0f3EE66666;
	@%p102 bra 	$L__BB0_86;

	mov.f32 	%f1687, 0f7FFFFFFF;

$L__BB0_86:
	add.f32 	%f1004, %f283, 0f3EE66666;
	mov.b32 	%r343, %f1004;
	setp.lt.s32 	%p104, %r343, 2139095040;
	@%p104 bra 	$L__BB0_91;

	setp.gtu.f32 	%p105, %f283, 0f7F800000;
	@%p105 bra 	$L__BB0_90;
	bra.uni 	$L__BB0_88;

$L__BB0_90:
	add.f32 	%f1687, %f278, 0f3EE66666;
	bra.uni 	$L__BB0_91;

$L__BB0_88:
	setp.neu.f32 	%p106, %f283, 0f7F800000;
	@%p106 bra 	$L__BB0_91;

	selp.f32 	%f1687, 0fFF800000, 0f7F800000, %p4;

$L__BB0_91:
	setp.eq.f32 	%p107, %f278, 0f3F800000;
	selp.f32 	%f294, 0f3F800000, %f1687, %p107;
	abs.f32 	%f295, %f279;
	setp.lt.f32 	%p108, %f295, 0f00800000;
	mul.f32 	%f1006, %f295, 0f4B800000;
	selp.f32 	%f1007, %f1006, %f295, %p108;
	selp.f32 	%f1008, 0fC3170000, 0fC2FE0000, %p108;
	mov.b32 	%r344, %f1007;
	and.b32  	%r345, %r344, 8388607;
	or.b32  	%r346, %r345, 1065353216;
	mov.b32 	%f1009, %r346;
	shr.u32 	%r347, %r344, 23;
	cvt.rn.f32.u32 	%f1010, %r347;
	add.f32 	%f1011, %f1008, %f1010;
	setp.gt.f32 	%p109, %f1009, 0f3FB504F3;
	mul.f32 	%f1012, %f1009, 0f3F000000;
	add.f32 	%f1013, %f1011, 0f3F800000;
	selp.f32 	%f1014, %f1013, %f1011, %p109;
	selp.f32 	%f1015, %f1012, %f1009, %p109;
	add.f32 	%f1016, %f1015, 0fBF800000;
	add.f32 	%f1017, %f1015, 0f3F800000;
	rcp.approx.ftz.f32 	%f1018, %f1017;
	add.f32 	%f1019, %f1016, %f1016;
	mul.f32 	%f1020, %f1019, %f1018;
	mul.f32 	%f1021, %f1020, %f1020;
	mov.f32 	%f1022, 0f3C4CAF63;
	mov.f32 	%f1023, 0f3B18F0FE;
	fma.rn.f32 	%f1024, %f1023, %f1021, %f1022;
	mov.f32 	%f1025, 0f3DAAAABD;
	fma.rn.f32 	%f1026, %f1024, %f1021, %f1025;
	mul.rn.f32 	%f1027, %f1026, %f1021;
	mul.rn.f32 	%f1028, %f1027, %f1020;
	sub.f32 	%f1029, %f1016, %f1020;
	add.f32 	%f1030, %f1029, %f1029;
	neg.f32 	%f1031, %f1020;
	fma.rn.f32 	%f1032, %f1031, %f1016, %f1030;
	mul.rn.f32 	%f1033, %f1018, %f1032;
	add.f32 	%f1034, %f1028, %f1020;
	sub.f32 	%f1035, %f1020, %f1034;
	add.f32 	%f1036, %f1028, %f1035;
	add.f32 	%f1037, %f1033, %f1036;
	add.f32 	%f1038, %f1034, %f1037;
	sub.f32 	%f1039, %f1034, %f1038;
	add.f32 	%f1040, %f1037, %f1039;
	mov.f32 	%f1041, 0f3F317200;
	mul.rn.f32 	%f1042, %f1014, %f1041;
	mov.f32 	%f1043, 0f35BFBE8E;
	mul.rn.f32 	%f1044, %f1014, %f1043;
	add.f32 	%f1045, %f1042, %f1038;
	sub.f32 	%f1046, %f1042, %f1045;
	add.f32 	%f1047, %f1038, %f1046;
	add.f32 	%f1048, %f1040, %f1047;
	add.f32 	%f1049, %f1044, %f1048;
	add.f32 	%f1050, %f1045, %f1049;
	sub.f32 	%f1051, %f1045, %f1050;
	add.f32 	%f1052, %f1049, %f1051;
	mov.f32 	%f1053, 0f3EE66666;
	mul.rn.f32 	%f1054, %f1053, %f1050;
	neg.f32 	%f1055, %f1054;
	fma.rn.f32 	%f1056, %f1053, %f1050, %f1055;
	fma.rn.f32 	%f1057, %f1053, %f1052, %f1056;
	mov.f32 	%f1058, 0f00000000;
	fma.rn.f32 	%f1059, %f1058, %f1050, %f1057;
	add.rn.f32 	%f1060, %f1054, %f1059;
	neg.f32 	%f1061, %f1060;
	add.rn.f32 	%f1062, %f1054, %f1061;
	add.rn.f32 	%f1063, %f1062, %f1059;
	mov.b32 	%r348, %f1060;
	setp.eq.s32 	%p110, %r348, 1118925336;
	add.s32 	%r349, %r348, -1;
	mov.b32 	%f1064, %r349;
	add.f32 	%f1065, %f1063, 0f37000000;
	selp.f32 	%f296, %f1065, %f1063, %p110;
	selp.f32 	%f1066, %f1064, %f1060, %p110;
	mov.f32 	%f1067, 0f3FB8AA3B;
	mul.rn.f32 	%f1068, %f1066, %f1067;
	cvt.rzi.f32.f32 	%f1069, %f1068;
	abs.f32 	%f1070, %f1069;
	setp.gt.f32 	%p111, %f1070, 0f42FC0000;
	mov.b32 	%r350, %f1069;
	and.b32  	%r351, %r350, -2147483648;
	or.b32  	%r352, %r351, 1123811328;
	mov.b32 	%f1071, %r352;
	selp.f32 	%f1072, %f1071, %f1069, %p111;
	mov.f32 	%f1073, 0fBF317218;
	fma.rn.f32 	%f1074, %f1072, %f1073, %f1066;
	mov.f32 	%f1075, 0f3102E308;
	fma.rn.f32 	%f1076, %f1072, %f1075, %f1074;
	mul.f32 	%f1077, %f1076, 0f3FB8AA3B;
	add.f32 	%f1078, %f1072, 0f4B40007F;
	mov.b32 	%r353, %f1078;
	shl.b32 	%r354, %r353, 23;
	mov.b32 	%f1079, %r354;
	ex2.approx.ftz.f32 	%f1080, %f1077;
	mul.f32 	%f297, %f1080, %f1079;
	setp.eq.f32 	%p112, %f297, 0f7F800000;
	mov.f32 	%f1688, 0f7F800000;
	@%p112 bra 	$L__BB0_93;

	fma.rn.f32 	%f1688, %f297, %f296, %f297;

$L__BB0_93:
	setp.lt.f32 	%p113, %f279, 0f00000000;
	and.pred  	%p5, %p113, %p99;
	setp.eq.f32 	%p115, %f279, 0f00000000;
	@%p115 bra 	$L__BB0_97;
	bra.uni 	$L__BB0_94;

$L__BB0_97:
	add.f32 	%f1085, %f279, %f279;
	selp.f32 	%f1690, %f1085, 0f00000000, %p99;
	bra.uni 	$L__BB0_98;

$L__BB0_94:
	mov.b32 	%r355, %f1688;
	xor.b32  	%r356, %r355, -2147483648;
	mov.b32 	%f1081, %r356;
	selp.f32 	%f1690, %f1081, %f1688, %p5;
	setp.geu.f32 	%p116, %f279, 0f00000000;
	@%p116 bra 	$L__BB0_98;

	mov.f32 	%f1082, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1083, %f1082;
	setp.eq.f32 	%p117, %f1083, 0f3EE66666;
	@%p117 bra 	$L__BB0_98;

	mov.f32 	%f1690, 0f7FFFFFFF;

$L__BB0_98:
	add.f32 	%f1086, %f295, 0f3EE66666;
	mov.b32 	%r357, %f1086;
	setp.lt.s32 	%p119, %r357, 2139095040;
	@%p119 bra 	$L__BB0_103;

	setp.gtu.f32 	%p120, %f295, 0f7F800000;
	@%p120 bra 	$L__BB0_102;
	bra.uni 	$L__BB0_100;

$L__BB0_102:
	add.f32 	%f1690, %f279, 0f3EE66666;
	bra.uni 	$L__BB0_103;

$L__BB0_100:
	setp.neu.f32 	%p121, %f295, 0f7F800000;
	@%p121 bra 	$L__BB0_103;

	selp.f32 	%f1690, 0fFF800000, 0f7F800000, %p5;

$L__BB0_103:
	setp.eq.f32 	%p122, %f279, 0f3F800000;
	selp.f32 	%f306, 0f3F800000, %f1690, %p122;
	abs.f32 	%f307, %f281;
	setp.lt.f32 	%p123, %f307, 0f00800000;
	mul.f32 	%f1088, %f307, 0f4B800000;
	selp.f32 	%f1089, %f1088, %f307, %p123;
	selp.f32 	%f1090, 0fC3170000, 0fC2FE0000, %p123;
	mov.b32 	%r358, %f1089;
	and.b32  	%r359, %r358, 8388607;
	or.b32  	%r360, %r359, 1065353216;
	mov.b32 	%f1091, %r360;
	shr.u32 	%r361, %r358, 23;
	cvt.rn.f32.u32 	%f1092, %r361;
	add.f32 	%f1093, %f1090, %f1092;
	setp.gt.f32 	%p124, %f1091, 0f3FB504F3;
	mul.f32 	%f1094, %f1091, 0f3F000000;
	add.f32 	%f1095, %f1093, 0f3F800000;
	selp.f32 	%f1096, %f1095, %f1093, %p124;
	selp.f32 	%f1097, %f1094, %f1091, %p124;
	add.f32 	%f1098, %f1097, 0fBF800000;
	add.f32 	%f1099, %f1097, 0f3F800000;
	rcp.approx.ftz.f32 	%f1100, %f1099;
	add.f32 	%f1101, %f1098, %f1098;
	mul.f32 	%f1102, %f1101, %f1100;
	mul.f32 	%f1103, %f1102, %f1102;
	mov.f32 	%f1104, 0f3C4CAF63;
	mov.f32 	%f1105, 0f3B18F0FE;
	fma.rn.f32 	%f1106, %f1105, %f1103, %f1104;
	mov.f32 	%f1107, 0f3DAAAABD;
	fma.rn.f32 	%f1108, %f1106, %f1103, %f1107;
	mul.rn.f32 	%f1109, %f1108, %f1103;
	mul.rn.f32 	%f1110, %f1109, %f1102;
	sub.f32 	%f1111, %f1098, %f1102;
	add.f32 	%f1112, %f1111, %f1111;
	neg.f32 	%f1113, %f1102;
	fma.rn.f32 	%f1114, %f1113, %f1098, %f1112;
	mul.rn.f32 	%f1115, %f1100, %f1114;
	add.f32 	%f1116, %f1110, %f1102;
	sub.f32 	%f1117, %f1102, %f1116;
	add.f32 	%f1118, %f1110, %f1117;
	add.f32 	%f1119, %f1115, %f1118;
	add.f32 	%f1120, %f1116, %f1119;
	sub.f32 	%f1121, %f1116, %f1120;
	add.f32 	%f1122, %f1119, %f1121;
	mov.f32 	%f1123, 0f3F317200;
	mul.rn.f32 	%f1124, %f1096, %f1123;
	mov.f32 	%f1125, 0f35BFBE8E;
	mul.rn.f32 	%f1126, %f1096, %f1125;
	add.f32 	%f1127, %f1124, %f1120;
	sub.f32 	%f1128, %f1124, %f1127;
	add.f32 	%f1129, %f1120, %f1128;
	add.f32 	%f1130, %f1122, %f1129;
	add.f32 	%f1131, %f1126, %f1130;
	add.f32 	%f1132, %f1127, %f1131;
	sub.f32 	%f1133, %f1127, %f1132;
	add.f32 	%f1134, %f1131, %f1133;
	mov.f32 	%f1135, 0f3EE66666;
	mul.rn.f32 	%f1136, %f1135, %f1132;
	neg.f32 	%f1137, %f1136;
	fma.rn.f32 	%f1138, %f1135, %f1132, %f1137;
	fma.rn.f32 	%f1139, %f1135, %f1134, %f1138;
	mov.f32 	%f1140, 0f00000000;
	fma.rn.f32 	%f1141, %f1140, %f1132, %f1139;
	add.rn.f32 	%f1142, %f1136, %f1141;
	neg.f32 	%f1143, %f1142;
	add.rn.f32 	%f1144, %f1136, %f1143;
	add.rn.f32 	%f1145, %f1144, %f1141;
	mov.b32 	%r362, %f1142;
	setp.eq.s32 	%p125, %r362, 1118925336;
	add.s32 	%r363, %r362, -1;
	mov.b32 	%f1146, %r363;
	add.f32 	%f1147, %f1145, 0f37000000;
	selp.f32 	%f308, %f1147, %f1145, %p125;
	selp.f32 	%f1148, %f1146, %f1142, %p125;
	mov.f32 	%f1149, 0f3FB8AA3B;
	mul.rn.f32 	%f1150, %f1148, %f1149;
	cvt.rzi.f32.f32 	%f1151, %f1150;
	abs.f32 	%f1152, %f1151;
	setp.gt.f32 	%p126, %f1152, 0f42FC0000;
	mov.b32 	%r364, %f1151;
	and.b32  	%r365, %r364, -2147483648;
	or.b32  	%r366, %r365, 1123811328;
	mov.b32 	%f1153, %r366;
	selp.f32 	%f1154, %f1153, %f1151, %p126;
	mov.f32 	%f1155, 0fBF317218;
	fma.rn.f32 	%f1156, %f1154, %f1155, %f1148;
	mov.f32 	%f1157, 0f3102E308;
	fma.rn.f32 	%f1158, %f1154, %f1157, %f1156;
	mul.f32 	%f1159, %f1158, 0f3FB8AA3B;
	add.f32 	%f1160, %f1154, 0f4B40007F;
	mov.b32 	%r367, %f1160;
	shl.b32 	%r368, %r367, 23;
	mov.b32 	%f1161, %r368;
	ex2.approx.ftz.f32 	%f1162, %f1159;
	mul.f32 	%f309, %f1162, %f1161;
	setp.eq.f32 	%p127, %f309, 0f7F800000;
	mov.f32 	%f1691, 0f7F800000;
	@%p127 bra 	$L__BB0_105;

	fma.rn.f32 	%f1691, %f309, %f308, %f309;

$L__BB0_105:
	setp.lt.f32 	%p128, %f281, 0f00000000;
	and.pred  	%p6, %p128, %p99;
	setp.eq.f32 	%p130, %f281, 0f00000000;
	@%p130 bra 	$L__BB0_109;
	bra.uni 	$L__BB0_106;

$L__BB0_109:
	add.f32 	%f1167, %f281, %f281;
	selp.f32 	%f1693, %f1167, 0f00000000, %p99;
	bra.uni 	$L__BB0_110;

$L__BB0_106:
	mov.b32 	%r369, %f1691;
	xor.b32  	%r370, %r369, -2147483648;
	mov.b32 	%f1163, %r370;
	selp.f32 	%f1693, %f1163, %f1691, %p6;
	setp.geu.f32 	%p131, %f281, 0f00000000;
	@%p131 bra 	$L__BB0_110;

	mov.f32 	%f1164, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1165, %f1164;
	setp.eq.f32 	%p132, %f1165, 0f3EE66666;
	@%p132 bra 	$L__BB0_110;

	mov.f32 	%f1693, 0f7FFFFFFF;

$L__BB0_110:
	add.f32 	%f1168, %f307, 0f3EE66666;
	mov.b32 	%r371, %f1168;
	setp.lt.s32 	%p134, %r371, 2139095040;
	@%p134 bra 	$L__BB0_115;

	setp.gtu.f32 	%p135, %f307, 0f7F800000;
	@%p135 bra 	$L__BB0_114;
	bra.uni 	$L__BB0_112;

$L__BB0_114:
	add.f32 	%f1693, %f281, 0f3EE66666;
	bra.uni 	$L__BB0_115;

$L__BB0_112:
	setp.neu.f32 	%p136, %f307, 0f7F800000;
	@%p136 bra 	$L__BB0_115;

	selp.f32 	%f1693, 0fFF800000, 0f7F800000, %p6;

$L__BB0_115:
	setp.eq.f32 	%p137, %f281, 0f3F800000;
	mov.f32 	%f1170, 0f3F800000;
	selp.f32 	%f1171, 0f3F800000, %f1693, %p137;
	ld.const.u64 	%rd81, [params+144];
	cvta.to.global.u64 	%rd22, %rd81;
	ld.const.u32 	%r372, [params+136];
	mad.lo.s32 	%r373, %r372, %r7, %r6;
	cvt.u64.u32 	%rd23, %r373;
	min.f32 	%f1172, %f294, %f1170;
	mov.f32 	%f1173, 0f00000000;
	max.f32 	%f318, %f1173, %f1172;
	min.f32 	%f1174, %f306, %f1170;
	max.f32 	%f319, %f1173, %f1174;
	min.f32 	%f1175, %f1171, %f1170;
	max.f32 	%f320, %f1173, %f1175;
	mov.f32 	%f1176, 0f3E555555;
	cvt.rzi.f32.f32 	%f1177, %f1176;
	add.f32 	%f1178, %f1177, %f1177;
	mov.f32 	%f1179, 0f3ED55555;
	sub.f32 	%f1180, %f1179, %f1178;
	abs.f32 	%f321, %f1180;
	abs.f32 	%f322, %f318;
	setp.lt.f32 	%p138, %f322, 0f00800000;
	mul.f32 	%f1181, %f322, 0f4B800000;
	selp.f32 	%f1182, %f1181, %f322, %p138;
	selp.f32 	%f1183, 0fC3170000, 0fC2FE0000, %p138;
	mov.b32 	%r374, %f1182;
	and.b32  	%r375, %r374, 8388607;
	or.b32  	%r376, %r375, 1065353216;
	mov.b32 	%f1184, %r376;
	shr.u32 	%r377, %r374, 23;
	cvt.rn.f32.u32 	%f1185, %r377;
	add.f32 	%f1186, %f1183, %f1185;
	setp.gt.f32 	%p139, %f1184, 0f3FB504F3;
	mul.f32 	%f1187, %f1184, 0f3F000000;
	add.f32 	%f1188, %f1186, 0f3F800000;
	selp.f32 	%f1189, %f1188, %f1186, %p139;
	selp.f32 	%f1190, %f1187, %f1184, %p139;
	add.f32 	%f1191, %f1190, 0fBF800000;
	add.f32 	%f1192, %f1190, 0f3F800000;
	rcp.approx.ftz.f32 	%f1193, %f1192;
	add.f32 	%f1194, %f1191, %f1191;
	mul.f32 	%f1195, %f1194, %f1193;
	mul.f32 	%f1196, %f1195, %f1195;
	mov.f32 	%f1197, 0f3C4CAF63;
	mov.f32 	%f1198, 0f3B18F0FE;
	fma.rn.f32 	%f1199, %f1198, %f1196, %f1197;
	mov.f32 	%f1200, 0f3DAAAABD;
	fma.rn.f32 	%f1201, %f1199, %f1196, %f1200;
	mul.rn.f32 	%f1202, %f1201, %f1196;
	mul.rn.f32 	%f1203, %f1202, %f1195;
	sub.f32 	%f1204, %f1191, %f1195;
	add.f32 	%f1205, %f1204, %f1204;
	neg.f32 	%f1206, %f1195;
	fma.rn.f32 	%f1207, %f1206, %f1191, %f1205;
	mul.rn.f32 	%f1208, %f1193, %f1207;
	add.f32 	%f1209, %f1203, %f1195;
	sub.f32 	%f1210, %f1195, %f1209;
	add.f32 	%f1211, %f1203, %f1210;
	add.f32 	%f1212, %f1208, %f1211;
	add.f32 	%f1213, %f1209, %f1212;
	sub.f32 	%f1214, %f1209, %f1213;
	add.f32 	%f1215, %f1212, %f1214;
	mov.f32 	%f1216, 0f3F317200;
	mul.rn.f32 	%f1217, %f1189, %f1216;
	mov.f32 	%f1218, 0f35BFBE8E;
	mul.rn.f32 	%f1219, %f1189, %f1218;
	add.f32 	%f1220, %f1217, %f1213;
	sub.f32 	%f1221, %f1217, %f1220;
	add.f32 	%f1222, %f1213, %f1221;
	add.f32 	%f1223, %f1215, %f1222;
	add.f32 	%f1224, %f1219, %f1223;
	add.f32 	%f1225, %f1220, %f1224;
	sub.f32 	%f1226, %f1220, %f1225;
	add.f32 	%f1227, %f1224, %f1226;
	mul.rn.f32 	%f1228, %f1179, %f1225;
	neg.f32 	%f1229, %f1228;
	fma.rn.f32 	%f1230, %f1179, %f1225, %f1229;
	fma.rn.f32 	%f1231, %f1179, %f1227, %f1230;
	fma.rn.f32 	%f1232, %f1173, %f1225, %f1231;
	add.rn.f32 	%f1233, %f1228, %f1232;
	neg.f32 	%f1234, %f1233;
	add.rn.f32 	%f1235, %f1228, %f1234;
	add.rn.f32 	%f1236, %f1235, %f1232;
	mov.b32 	%r378, %f1233;
	setp.eq.s32 	%p140, %r378, 1118925336;
	add.s32 	%r379, %r378, -1;
	mov.b32 	%f1237, %r379;
	add.f32 	%f1238, %f1236, 0f37000000;
	selp.f32 	%f323, %f1238, %f1236, %p140;
	selp.f32 	%f1239, %f1237, %f1233, %p140;
	mov.f32 	%f1240, 0f3FB8AA3B;
	mul.rn.f32 	%f1241, %f1239, %f1240;
	cvt.rzi.f32.f32 	%f1242, %f1241;
	abs.f32 	%f1243, %f1242;
	setp.gt.f32 	%p141, %f1243, 0f42FC0000;
	mov.b32 	%r380, %f1242;
	and.b32  	%r381, %r380, -2147483648;
	or.b32  	%r382, %r381, 1123811328;
	mov.b32 	%f1244, %r382;
	selp.f32 	%f1245, %f1244, %f1242, %p141;
	mov.f32 	%f1246, 0fBF317218;
	fma.rn.f32 	%f1247, %f1245, %f1246, %f1239;
	mov.f32 	%f1248, 0f3102E308;
	fma.rn.f32 	%f1249, %f1245, %f1248, %f1247;
	mul.f32 	%f1250, %f1249, 0f3FB8AA3B;
	add.f32 	%f1251, %f1245, 0f4B40007F;
	mov.b32 	%r383, %f1251;
	shl.b32 	%r384, %r383, 23;
	mov.b32 	%f1252, %r384;
	ex2.approx.ftz.f32 	%f1253, %f1250;
	mul.f32 	%f324, %f1253, %f1252;
	setp.eq.f32 	%p142, %f324, 0f7F800000;
	mov.f32 	%f1694, 0f7F800000;
	@%p142 bra 	$L__BB0_117;

	fma.rn.f32 	%f1694, %f324, %f323, %f324;

$L__BB0_117:
	setp.lt.f32 	%p143, %f318, 0f00000000;
	setp.eq.f32 	%p144, %f321, 0f3F800000;
	and.pred  	%p7, %p143, %p144;
	setp.eq.f32 	%p145, %f318, 0f00000000;
	@%p145 bra 	$L__BB0_121;
	bra.uni 	$L__BB0_118;

$L__BB0_121:
	add.f32 	%f1258, %f318, %f318;
	selp.f32 	%f1696, %f1258, 0f00000000, %p144;
	bra.uni 	$L__BB0_122;

$L__BB0_118:
	mov.b32 	%r385, %f1694;
	xor.b32  	%r386, %r385, -2147483648;
	mov.b32 	%f1254, %r386;
	selp.f32 	%f1696, %f1254, %f1694, %p7;
	setp.geu.f32 	%p146, %f318, 0f00000000;
	@%p146 bra 	$L__BB0_122;

	mov.f32 	%f1255, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1256, %f1255;
	setp.eq.f32 	%p147, %f1256, 0f3ED55555;
	@%p147 bra 	$L__BB0_122;

	mov.f32 	%f1696, 0f7FFFFFFF;

$L__BB0_122:
	add.f32 	%f1259, %f322, 0f3ED55555;
	mov.b32 	%r387, %f1259;
	setp.lt.s32 	%p149, %r387, 2139095040;
	@%p149 bra 	$L__BB0_127;

	setp.gtu.f32 	%p150, %f322, 0f7F800000;
	@%p150 bra 	$L__BB0_126;
	bra.uni 	$L__BB0_124;

$L__BB0_126:
	add.f32 	%f1696, %f318, 0f3ED55555;
	bra.uni 	$L__BB0_127;

$L__BB0_124:
	setp.neu.f32 	%p151, %f322, 0f7F800000;
	@%p151 bra 	$L__BB0_127;

	selp.f32 	%f1696, 0fFF800000, 0f7F800000, %p7;

$L__BB0_127:
	abs.f32 	%f333, %f319;
	setp.lt.f32 	%p152, %f333, 0f00800000;
	mul.f32 	%f1261, %f333, 0f4B800000;
	selp.f32 	%f1262, %f1261, %f333, %p152;
	selp.f32 	%f1263, 0fC3170000, 0fC2FE0000, %p152;
	mov.b32 	%r388, %f1262;
	and.b32  	%r389, %r388, 8388607;
	or.b32  	%r390, %r389, 1065353216;
	mov.b32 	%f1264, %r390;
	shr.u32 	%r391, %r388, 23;
	cvt.rn.f32.u32 	%f1265, %r391;
	add.f32 	%f1266, %f1263, %f1265;
	setp.gt.f32 	%p153, %f1264, 0f3FB504F3;
	mul.f32 	%f1267, %f1264, 0f3F000000;
	add.f32 	%f1268, %f1266, 0f3F800000;
	selp.f32 	%f1269, %f1268, %f1266, %p153;
	selp.f32 	%f1270, %f1267, %f1264, %p153;
	add.f32 	%f1271, %f1270, 0fBF800000;
	add.f32 	%f1272, %f1270, 0f3F800000;
	rcp.approx.ftz.f32 	%f1273, %f1272;
	add.f32 	%f1274, %f1271, %f1271;
	mul.f32 	%f1275, %f1274, %f1273;
	mul.f32 	%f1276, %f1275, %f1275;
	mov.f32 	%f1277, 0f3C4CAF63;
	mov.f32 	%f1278, 0f3B18F0FE;
	fma.rn.f32 	%f1279, %f1278, %f1276, %f1277;
	mov.f32 	%f1280, 0f3DAAAABD;
	fma.rn.f32 	%f1281, %f1279, %f1276, %f1280;
	mul.rn.f32 	%f1282, %f1281, %f1276;
	mul.rn.f32 	%f1283, %f1282, %f1275;
	sub.f32 	%f1284, %f1271, %f1275;
	add.f32 	%f1285, %f1284, %f1284;
	neg.f32 	%f1286, %f1275;
	fma.rn.f32 	%f1287, %f1286, %f1271, %f1285;
	mul.rn.f32 	%f1288, %f1273, %f1287;
	add.f32 	%f1289, %f1283, %f1275;
	sub.f32 	%f1290, %f1275, %f1289;
	add.f32 	%f1291, %f1283, %f1290;
	add.f32 	%f1292, %f1288, %f1291;
	add.f32 	%f1293, %f1289, %f1292;
	sub.f32 	%f1294, %f1289, %f1293;
	add.f32 	%f1295, %f1292, %f1294;
	mov.f32 	%f1296, 0f3F317200;
	mul.rn.f32 	%f1297, %f1269, %f1296;
	mov.f32 	%f1298, 0f35BFBE8E;
	mul.rn.f32 	%f1299, %f1269, %f1298;
	add.f32 	%f1300, %f1297, %f1293;
	sub.f32 	%f1301, %f1297, %f1300;
	add.f32 	%f1302, %f1293, %f1301;
	add.f32 	%f1303, %f1295, %f1302;
	add.f32 	%f1304, %f1299, %f1303;
	add.f32 	%f1305, %f1300, %f1304;
	sub.f32 	%f1306, %f1300, %f1305;
	add.f32 	%f1307, %f1304, %f1306;
	mov.f32 	%f1308, 0f3ED55555;
	mul.rn.f32 	%f1309, %f1308, %f1305;
	neg.f32 	%f1310, %f1309;
	fma.rn.f32 	%f1311, %f1308, %f1305, %f1310;
	fma.rn.f32 	%f1312, %f1308, %f1307, %f1311;
	mov.f32 	%f1313, 0f00000000;
	fma.rn.f32 	%f1314, %f1313, %f1305, %f1312;
	add.rn.f32 	%f1315, %f1309, %f1314;
	neg.f32 	%f1316, %f1315;
	add.rn.f32 	%f1317, %f1309, %f1316;
	add.rn.f32 	%f1318, %f1317, %f1314;
	mov.b32 	%r392, %f1315;
	setp.eq.s32 	%p154, %r392, 1118925336;
	add.s32 	%r393, %r392, -1;
	mov.b32 	%f1319, %r393;
	add.f32 	%f1320, %f1318, 0f37000000;
	selp.f32 	%f334, %f1320, %f1318, %p154;
	selp.f32 	%f1321, %f1319, %f1315, %p154;
	mov.f32 	%f1322, 0f3FB8AA3B;
	mul.rn.f32 	%f1323, %f1321, %f1322;
	cvt.rzi.f32.f32 	%f1324, %f1323;
	abs.f32 	%f1325, %f1324;
	setp.gt.f32 	%p155, %f1325, 0f42FC0000;
	mov.b32 	%r394, %f1324;
	and.b32  	%r395, %r394, -2147483648;
	or.b32  	%r396, %r395, 1123811328;
	mov.b32 	%f1326, %r396;
	selp.f32 	%f1327, %f1326, %f1324, %p155;
	mov.f32 	%f1328, 0fBF317218;
	fma.rn.f32 	%f1329, %f1327, %f1328, %f1321;
	mov.f32 	%f1330, 0f3102E308;
	fma.rn.f32 	%f1331, %f1327, %f1330, %f1329;
	mul.f32 	%f1332, %f1331, 0f3FB8AA3B;
	add.f32 	%f1333, %f1327, 0f4B40007F;
	mov.b32 	%r397, %f1333;
	shl.b32 	%r398, %r397, 23;
	mov.b32 	%f1334, %r398;
	ex2.approx.ftz.f32 	%f1335, %f1332;
	mul.f32 	%f335, %f1335, %f1334;
	setp.eq.f32 	%p156, %f335, 0f7F800000;
	mov.f32 	%f1697, 0f7F800000;
	@%p156 bra 	$L__BB0_129;

	fma.rn.f32 	%f1697, %f335, %f334, %f335;

$L__BB0_129:
	setp.lt.f32 	%p157, %f319, 0f00000000;
	and.pred  	%p8, %p157, %p144;
	setp.eq.f32 	%p159, %f319, 0f00000000;
	@%p159 bra 	$L__BB0_133;
	bra.uni 	$L__BB0_130;

$L__BB0_133:
	add.f32 	%f1340, %f319, %f319;
	selp.f32 	%f1699, %f1340, 0f00000000, %p144;
	bra.uni 	$L__BB0_134;

$L__BB0_130:
	mov.b32 	%r399, %f1697;
	xor.b32  	%r400, %r399, -2147483648;
	mov.b32 	%f1336, %r400;
	selp.f32 	%f1699, %f1336, %f1697, %p8;
	setp.geu.f32 	%p160, %f319, 0f00000000;
	@%p160 bra 	$L__BB0_134;

	mov.f32 	%f1337, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1338, %f1337;
	setp.eq.f32 	%p161, %f1338, 0f3ED55555;
	@%p161 bra 	$L__BB0_134;

	mov.f32 	%f1699, 0f7FFFFFFF;

$L__BB0_134:
	add.f32 	%f1341, %f333, 0f3ED55555;
	mov.b32 	%r401, %f1341;
	setp.lt.s32 	%p163, %r401, 2139095040;
	@%p163 bra 	$L__BB0_139;

	setp.gtu.f32 	%p164, %f333, 0f7F800000;
	@%p164 bra 	$L__BB0_138;
	bra.uni 	$L__BB0_136;

$L__BB0_138:
	add.f32 	%f1699, %f319, 0f3ED55555;
	bra.uni 	$L__BB0_139;

$L__BB0_136:
	setp.neu.f32 	%p165, %f333, 0f7F800000;
	@%p165 bra 	$L__BB0_139;

	selp.f32 	%f1699, 0fFF800000, 0f7F800000, %p8;

$L__BB0_139:
	abs.f32 	%f344, %f320;
	setp.lt.f32 	%p166, %f344, 0f00800000;
	mul.f32 	%f1343, %f344, 0f4B800000;
	selp.f32 	%f1344, %f1343, %f344, %p166;
	selp.f32 	%f1345, 0fC3170000, 0fC2FE0000, %p166;
	mov.b32 	%r402, %f1344;
	and.b32  	%r403, %r402, 8388607;
	or.b32  	%r404, %r403, 1065353216;
	mov.b32 	%f1346, %r404;
	shr.u32 	%r405, %r402, 23;
	cvt.rn.f32.u32 	%f1347, %r405;
	add.f32 	%f1348, %f1345, %f1347;
	setp.gt.f32 	%p167, %f1346, 0f3FB504F3;
	mul.f32 	%f1349, %f1346, 0f3F000000;
	add.f32 	%f1350, %f1348, 0f3F800000;
	selp.f32 	%f1351, %f1350, %f1348, %p167;
	selp.f32 	%f1352, %f1349, %f1346, %p167;
	add.f32 	%f1353, %f1352, 0fBF800000;
	add.f32 	%f1354, %f1352, 0f3F800000;
	rcp.approx.ftz.f32 	%f1355, %f1354;
	add.f32 	%f1356, %f1353, %f1353;
	mul.f32 	%f1357, %f1356, %f1355;
	mul.f32 	%f1358, %f1357, %f1357;
	mov.f32 	%f1359, 0f3C4CAF63;
	mov.f32 	%f1360, 0f3B18F0FE;
	fma.rn.f32 	%f1361, %f1360, %f1358, %f1359;
	mov.f32 	%f1362, 0f3DAAAABD;
	fma.rn.f32 	%f1363, %f1361, %f1358, %f1362;
	mul.rn.f32 	%f1364, %f1363, %f1358;
	mul.rn.f32 	%f1365, %f1364, %f1357;
	sub.f32 	%f1366, %f1353, %f1357;
	add.f32 	%f1367, %f1366, %f1366;
	neg.f32 	%f1368, %f1357;
	fma.rn.f32 	%f1369, %f1368, %f1353, %f1367;
	mul.rn.f32 	%f1370, %f1355, %f1369;
	add.f32 	%f1371, %f1365, %f1357;
	sub.f32 	%f1372, %f1357, %f1371;
	add.f32 	%f1373, %f1365, %f1372;
	add.f32 	%f1374, %f1370, %f1373;
	add.f32 	%f1375, %f1371, %f1374;
	sub.f32 	%f1376, %f1371, %f1375;
	add.f32 	%f1377, %f1374, %f1376;
	mov.f32 	%f1378, 0f3F317200;
	mul.rn.f32 	%f1379, %f1351, %f1378;
	mov.f32 	%f1380, 0f35BFBE8E;
	mul.rn.f32 	%f1381, %f1351, %f1380;
	add.f32 	%f1382, %f1379, %f1375;
	sub.f32 	%f1383, %f1379, %f1382;
	add.f32 	%f1384, %f1375, %f1383;
	add.f32 	%f1385, %f1377, %f1384;
	add.f32 	%f1386, %f1381, %f1385;
	add.f32 	%f1387, %f1382, %f1386;
	sub.f32 	%f1388, %f1382, %f1387;
	add.f32 	%f1389, %f1386, %f1388;
	mov.f32 	%f1390, 0f3ED55555;
	mul.rn.f32 	%f1391, %f1390, %f1387;
	neg.f32 	%f1392, %f1391;
	fma.rn.f32 	%f1393, %f1390, %f1387, %f1392;
	fma.rn.f32 	%f1394, %f1390, %f1389, %f1393;
	mov.f32 	%f1395, 0f00000000;
	fma.rn.f32 	%f1396, %f1395, %f1387, %f1394;
	add.rn.f32 	%f1397, %f1391, %f1396;
	neg.f32 	%f1398, %f1397;
	add.rn.f32 	%f1399, %f1391, %f1398;
	add.rn.f32 	%f1400, %f1399, %f1396;
	mov.b32 	%r406, %f1397;
	setp.eq.s32 	%p168, %r406, 1118925336;
	add.s32 	%r407, %r406, -1;
	mov.b32 	%f1401, %r407;
	add.f32 	%f1402, %f1400, 0f37000000;
	selp.f32 	%f345, %f1402, %f1400, %p168;
	selp.f32 	%f1403, %f1401, %f1397, %p168;
	mov.f32 	%f1404, 0f3FB8AA3B;
	mul.rn.f32 	%f1405, %f1403, %f1404;
	cvt.rzi.f32.f32 	%f1406, %f1405;
	abs.f32 	%f1407, %f1406;
	setp.gt.f32 	%p169, %f1407, 0f42FC0000;
	mov.b32 	%r408, %f1406;
	and.b32  	%r409, %r408, -2147483648;
	or.b32  	%r410, %r409, 1123811328;
	mov.b32 	%f1408, %r410;
	selp.f32 	%f1409, %f1408, %f1406, %p169;
	mov.f32 	%f1410, 0fBF317218;
	fma.rn.f32 	%f1411, %f1409, %f1410, %f1403;
	mov.f32 	%f1412, 0f3102E308;
	fma.rn.f32 	%f1413, %f1409, %f1412, %f1411;
	mul.f32 	%f1414, %f1413, 0f3FB8AA3B;
	add.f32 	%f1415, %f1409, 0f4B40007F;
	mov.b32 	%r411, %f1415;
	shl.b32 	%r412, %r411, 23;
	mov.b32 	%f1416, %r412;
	ex2.approx.ftz.f32 	%f1417, %f1414;
	mul.f32 	%f346, %f1417, %f1416;
	setp.eq.f32 	%p170, %f346, 0f7F800000;
	mov.f32 	%f1700, 0f7F800000;
	@%p170 bra 	$L__BB0_141;

	fma.rn.f32 	%f1700, %f346, %f345, %f346;

$L__BB0_141:
	setp.lt.f32 	%p171, %f320, 0f00000000;
	and.pred  	%p9, %p171, %p144;
	setp.eq.f32 	%p173, %f320, 0f00000000;
	@%p173 bra 	$L__BB0_145;
	bra.uni 	$L__BB0_142;

$L__BB0_145:
	add.f32 	%f1422, %f320, %f320;
	selp.f32 	%f1702, %f1422, 0f00000000, %p144;
	bra.uni 	$L__BB0_146;

$L__BB0_142:
	mov.b32 	%r413, %f1700;
	xor.b32  	%r414, %r413, -2147483648;
	mov.b32 	%f1418, %r414;
	selp.f32 	%f1702, %f1418, %f1700, %p9;
	setp.geu.f32 	%p174, %f320, 0f00000000;
	@%p174 bra 	$L__BB0_146;

	mov.f32 	%f1419, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1420, %f1419;
	setp.eq.f32 	%p175, %f1420, 0f3ED55555;
	@%p175 bra 	$L__BB0_146;

	mov.f32 	%f1702, 0f7FFFFFFF;

$L__BB0_146:
	add.f32 	%f1423, %f344, 0f3ED55555;
	mov.b32 	%r415, %f1423;
	setp.lt.s32 	%p177, %r415, 2139095040;
	@%p177 bra 	$L__BB0_151;

	setp.gtu.f32 	%p178, %f344, 0f7F800000;
	@%p178 bra 	$L__BB0_150;
	bra.uni 	$L__BB0_148;

$L__BB0_150:
	add.f32 	%f1702, %f320, 0f3ED55555;
	bra.uni 	$L__BB0_151;

$L__BB0_148:
	setp.neu.f32 	%p179, %f344, 0f7F800000;
	@%p179 bra 	$L__BB0_151;

	selp.f32 	%f1702, 0fFF800000, 0f7F800000, %p9;

$L__BB0_151:
	fma.rn.f32 	%f1424, %f1696, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p180, %f318, 0f3F800000;
	mov.f32 	%f1425, 0f3F800000;
	selp.f32 	%f1426, 0f3F7FFFFF, %f1424, %p180;
	mul.f32 	%f1427, %f318, 0f414EB852;
	setp.lt.f32 	%p181, %f318, 0f3B4D2E1C;
	selp.f32 	%f1428, %f1427, %f1426, %p181;
	fma.rn.f32 	%f1429, %f1699, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p182, %f319, 0f3F800000;
	selp.f32 	%f1430, 0f3F7FFFFF, %f1429, %p182;
	mul.f32 	%f1431, %f319, 0f414EB852;
	setp.lt.f32 	%p183, %f319, 0f3B4D2E1C;
	selp.f32 	%f1432, %f1431, %f1430, %p183;
	fma.rn.f32 	%f1433, %f1702, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p184, %f320, 0f3F800000;
	selp.f32 	%f1434, 0f3F7FFFFF, %f1433, %p184;
	mul.f32 	%f1435, %f320, 0f414EB852;
	setp.lt.f32 	%p185, %f320, 0f3B4D2E1C;
	selp.f32 	%f1436, %f1435, %f1434, %p185;
	min.f32 	%f1437, %f1428, %f1425;
	mov.f32 	%f1438, 0f00000000;
	max.f32 	%f1439, %f1438, %f1437;
	mul.f32 	%f1440, %f1439, 0f43800000;
	cvt.rzi.u32.f32 	%r416, %f1440;
	min.u32 	%r417, %r416, 255;
	min.f32 	%f1441, %f1432, %f1425;
	max.f32 	%f1442, %f1438, %f1441;
	mul.f32 	%f1443, %f1442, 0f43800000;
	cvt.rzi.u32.f32 	%r418, %f1443;
	min.u32 	%r419, %r418, 255;
	min.f32 	%f1444, %f1436, %f1425;
	max.f32 	%f1445, %f1438, %f1444;
	mul.f32 	%f1446, %f1445, 0f43800000;
	cvt.rzi.u32.f32 	%r420, %f1446;
	min.u32 	%r421, %r420, 255;
	shl.b64 	%rd82, %rd23, 2;
	add.s64 	%rd83, %rd22, %rd82;
	cvt.u16.u32 	%rs47, %r421;
	cvt.u16.u32 	%rs48, %r419;
	cvt.u16.u32 	%rs49, %r417;
	mov.u16 	%rs50, 255;
	st.global.v4.u8 	[%rd83], {%rs49, %rs48, %rs47, %rs50};

$L__BB0_152:
	and.b32  	%r422, %r56, 4;
	setp.eq.s32 	%p186, %r422, 0;
	ld.const.u32 	%r465, [params+108];
	@%p186 bra 	$L__BB0_156;

	setp.eq.s32 	%p187, %r465, 0;
	ld.const.u64 	%rd84, [params+224];
	cvta.to.global.u64 	%rd85, %rd84;
	ld.const.u32 	%r423, [params+216];
	mad.lo.s32 	%r424, %r423, %r7, %r6;
	mul.wide.u32 	%rd86, %r424, 8;
	add.s64 	%rd24, %rd85, %rd86;
	@%p187 bra 	$L__BB0_155;

	ld.global.v4.u16 	{%rs58, %rs59, %rs60, %rs61}, [%rd24];
	// begin inline asm
	{  cvt.f32.f16 %f1447, %rs58;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1448, %rs59;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1449, %rs60;}

	// end inline asm
	add.f32 	%f1450, %f278, %f1447;
	add.f32 	%f1451, %f279, %f1448;
	add.f32 	%f1452, %f281, %f1449;
	mov.f32 	%f1453, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs56, %f1452;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs55, %f1451;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs54, %f1450;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs57, %f1453;}

	// end inline asm
	st.global.v4.u16 	[%rd24], {%rs54, %rs55, %rs56, %rs57};
	bra.uni 	$L__BB0_156;

$L__BB0_155:
	mov.f32 	%f1457, 0f3F800000;
	mov.u32 	%r465, 0;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs65, %f1457;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs64, %f281;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs63, %f279;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs62, %f278;}

	// end inline asm
	st.global.v4.u16 	[%rd24], {%rs62, %rs63, %rs64, %rs65};

$L__BB0_156:
	mul.f32 	%f1458, %f1672, %f917;
	mul.f32 	%f1459, %f1675, %f917;
	add.f32 	%f1460, %f1459, %f1458;
	mul.f32 	%f1461, %f1673, %f918;
	mul.f32 	%f1462, %f1676, %f918;
	add.f32 	%f1463, %f1462, %f1461;
	mul.f32 	%f1464, %f1674, %f280;
	mul.f32 	%f1465, %f1677, %f280;
	add.f32 	%f1466, %f1465, %f1464;
	mul.f32 	%f1467, %f1669, %f917;
	add.f32 	%f1468, %f1460, %f1467;
	mul.f32 	%f1469, %f1670, %f918;
	add.f32 	%f1470, %f1463, %f1469;
	mul.f32 	%f1471, %f1671, %f280;
	add.f32 	%f1472, %f1466, %f1471;
	mul.f32 	%f1473, %f1468, 0f3F13CD3A;
	mul.f32 	%f1474, %f1470, 0f3F13CD3A;
	mul.f32 	%f1475, %f1472, 0f3F13CD3A;
	div.rn.f32 	%f1476, %f278, %f1473;
	div.rn.f32 	%f1477, %f279, %f1474;
	div.rn.f32 	%f1478, %f281, %f1475;
	setp.eq.f32 	%p188, %f278, 0f00000000;
	selp.f32 	%f1479, 0f00000000, %f1476, %p188;
	setp.eq.f32 	%p189, %f279, 0f00000000;
	selp.f32 	%f1480, 0f00000000, %f1477, %p189;
	setp.eq.f32 	%p190, %f281, 0f00000000;
	selp.f32 	%f1481, 0f00000000, %f1478, %p190;
	mul.f32 	%f355, %f1459, %f1479;
	mul.f32 	%f356, %f1462, %f1480;
	mul.f32 	%f357, %f1465, %f1481;
	mul.f32 	%f358, %f1458, %f1479;
	mul.f32 	%f359, %f1461, %f1480;
	mul.f32 	%f360, %f1464, %f1481;
	mul.f32 	%f361, %f1467, %f1479;
	mul.f32 	%f362, %f1469, %f1480;
	mul.f32 	%f363, %f1471, %f1481;
	ld.const.u64 	%rd87, [params+256];
	cvta.to.global.u64 	%rd88, %rd87;
	ld.const.u32 	%r426, [params+248];
	mad.lo.s32 	%r427, %r426, %r7, %r6;
	mul.wide.u32 	%rd89, %r427, 8;
	add.s64 	%rd25, %rd88, %rd89;
	setp.eq.s32 	%p191, %r465, 0;
	@%p191 bra 	$L__BB0_158;

	ld.global.v4.u16 	{%rs73, %rs74, %rs75, %rs76}, [%rd25];
	// begin inline asm
	{  cvt.f32.f16 %f1482, %rs73;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1483, %rs74;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1484, %rs75;}

	// end inline asm
	add.f32 	%f1485, %f355, %f1482;
	add.f32 	%f1486, %f356, %f1483;
	add.f32 	%f1487, %f357, %f1484;
	mov.f32 	%f1488, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs71, %f1487;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs70, %f1486;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs69, %f1485;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs72, %f1488;}

	// end inline asm
	st.global.v4.u16 	[%rd25], {%rs69, %rs70, %rs71, %rs72};
	bra.uni 	$L__BB0_159;

$L__BB0_158:
	mov.f32 	%f1492, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs80, %f1492;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs79, %f357;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs78, %f356;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs77, %f355;}

	// end inline asm
	st.global.v4.u16 	[%rd25], {%rs77, %rs78, %rs79, %rs80};

$L__BB0_159:
	ld.const.u64 	%rd90, [params+272];
	cvta.to.global.u64 	%rd91, %rd90;
	ld.const.u32 	%r428, [params+264];
	mad.lo.s32 	%r429, %r428, %r7, %r6;
	mul.wide.u32 	%rd92, %r429, 8;
	add.s64 	%rd26, %rd91, %rd92;
	@%p191 bra 	$L__BB0_161;

	ld.global.v4.u16 	{%rs88, %rs89, %rs90, %rs91}, [%rd26];
	// begin inline asm
	{  cvt.f32.f16 %f1493, %rs88;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1494, %rs89;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1495, %rs90;}

	// end inline asm
	add.f32 	%f1496, %f358, %f1493;
	add.f32 	%f1497, %f359, %f1494;
	add.f32 	%f1498, %f360, %f1495;
	mov.f32 	%f1499, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs86, %f1498;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs85, %f1497;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs84, %f1496;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs87, %f1499;}

	// end inline asm
	st.global.v4.u16 	[%rd26], {%rs84, %rs85, %rs86, %rs87};
	bra.uni 	$L__BB0_162;

$L__BB0_161:
	mov.f32 	%f1503, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs95, %f1503;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs94, %f360;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs93, %f359;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs92, %f358;}

	// end inline asm
	st.global.v4.u16 	[%rd26], {%rs92, %rs93, %rs94, %rs95};

$L__BB0_162:
	ld.const.u64 	%rd93, [params+288];
	cvta.to.global.u64 	%rd94, %rd93;
	ld.const.u32 	%r430, [params+280];
	mad.lo.s32 	%r431, %r430, %r7, %r6;
	mul.wide.u32 	%rd95, %r431, 8;
	add.s64 	%rd27, %rd94, %rd95;
	@%p191 bra 	$L__BB0_164;

	ld.global.v4.u16 	{%rs103, %rs104, %rs105, %rs106}, [%rd27];
	// begin inline asm
	{  cvt.f32.f16 %f1504, %rs103;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1505, %rs104;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1506, %rs105;}

	// end inline asm
	add.f32 	%f1507, %f361, %f1504;
	add.f32 	%f1508, %f362, %f1505;
	add.f32 	%f1509, %f363, %f1506;
	mov.f32 	%f1510, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs101, %f1509;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs100, %f1508;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs99, %f1507;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs102, %f1510;}

	// end inline asm
	st.global.v4.u16 	[%rd27], {%rs99, %rs100, %rs101, %rs102};
	bra.uni 	$L__BB0_182;

$L__BB0_164:
	mov.f32 	%f1514, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs110, %f1514;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs109, %f363;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs108, %f362;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs107, %f361;}

	// end inline asm
	st.global.v4.u16 	[%rd27], {%rs107, %rs108, %rs109, %rs110};

$L__BB0_182:
	ret;

}