//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 ignoreNormal;
.global .align 1 .b8 localLights[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[12];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<166>;
	.reg .b16 	%rs<162>;
	.reg .f32 	%f<1659>;
	.reg .b32 	%r<274>;
	.reg .b64 	%rd<272>;


	mov.u64 	%rd271, __local_depot0;
	cvta.local.u64 	%SP, %rd271;
	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
	cvt.u64.u32	%rd10, %r30;
	cvt.u64.u32	%rd11, %r31;
	mov.u64 	%rd14, uvnormal;
	cvta.global.u64 	%rd9, %rd14;
	mov.u32 	%r28, 2;
	mov.u32 	%r29, 4;
	mov.u64 	%rd13, 0;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
	// inline asm
	ld.u32 	%r1, [%rd8];
	shr.u32 	%r34, %r1, 16;
	cvt.u16.u32	%rs1, %r34;
	and.b16  	%rs9, %rs1, 255;
	cvt.u16.u32	%rs10, %r1;
	or.b16  	%rs11, %rs10, %rs9;
	setp.eq.s16	%p9, %rs11, 0;
	mov.f32 	%f1548, 0f00000000;
	mov.f32 	%f1549, %f1548;
	mov.f32 	%f1550, %f1548;
	@%p9 bra 	BB0_2;

	ld.u8 	%rs12, [%rd8+1];
	and.b16  	%rs14, %rs10, 255;
	cvt.rn.f32.u16	%f321, %rs14;
	div.rn.f32 	%f322, %f321, 0f437F0000;
	fma.rn.f32 	%f323, %f322, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f324, %rs12;
	div.rn.f32 	%f325, %f324, 0f437F0000;
	fma.rn.f32 	%f326, %f325, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f327, %rs9;
	div.rn.f32 	%f328, %f327, 0f437F0000;
	fma.rn.f32 	%f329, %f328, 0f40000000, 0fBF800000;
	mul.f32 	%f330, %f326, %f326;
	fma.rn.f32 	%f331, %f323, %f323, %f330;
	fma.rn.f32 	%f332, %f329, %f329, %f331;
	sqrt.rn.f32 	%f333, %f332;
	rcp.rn.f32 	%f334, %f333;
	mul.f32 	%f1548, %f323, %f334;
	mul.f32 	%f1549, %f326, %f334;
	mul.f32 	%f1550, %f329, %f334;

BB0_2:
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	ld.global.v2.u32 	{%r38, %r39}, [tileInfo];
	add.s32 	%r2, %r35, %r38;
	add.s32 	%r3, %r36, %r39;
	setp.eq.f32	%p10, %f1549, 0f00000000;
	setp.eq.f32	%p11, %f1548, 0f00000000;
	and.pred  	%p12, %p11, %p10;
	setp.eq.f32	%p13, %f1550, 0f00000000;
	and.pred  	%p14, %p12, %p13;
	@%p14 bra 	BB0_124;
	bra.uni 	BB0_3;

BB0_124:
	ld.global.u32 	%r273, [imageEnabled];
	and.b32  	%r221, %r273, 1;
	setp.eq.b32	%p157, %r221, 1;
	@!%p157 bra 	BB0_126;
	bra.uni 	BB0_125;

BB0_125:
	cvt.u64.u32	%rd159, %r2;
	cvt.u64.u32	%rd160, %r3;
	mov.u64 	%rd163, image;
	cvta.global.u64 	%rd158, %rd163;
	// inline asm
	call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs93, 0;
	st.v4.u8 	[%rd157], {%rs93, %rs93, %rs93, %rs93};
	ld.global.u32 	%r273, [imageEnabled];

BB0_126:
	and.b32  	%r224, %r273, 8;
	setp.eq.s32	%p158, %r224, 0;
	@%p158 bra 	BB0_128;

	cvt.u64.u32	%rd167, %r3;
	cvt.u64.u32	%rd166, %r2;
	mov.u64 	%rd170, image_Mask;
	cvta.global.u64 	%rd165, %rd170;
	// inline asm
	call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1502, 0f00000000;
	cvt.rzi.u32.f32	%r227, %f1502;
	cvt.u16.u32	%rs94, %r227;
	mov.u16 	%rs95, 0;
	st.v2.u8 	[%rd164], {%rs94, %rs95};
	ld.global.u32 	%r273, [imageEnabled];

BB0_128:
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	and.b32  	%r228, %r273, 4;
	setp.eq.s32	%p159, %r228, 0;
	@%p159 bra 	BB0_132;

	ld.global.u32 	%r229, [additive];
	setp.eq.s32	%p160, %r229, 0;
	@%p160 bra 	BB0_131;

	mov.u64 	%rd183, image_HDR;
	cvta.global.u64 	%rd172, %rd183;
	mov.u32 	%r233, 8;
	// inline asm
	call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r233, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs102, %rs103, %rs104, %rs105}, [%rd171];
	// inline asm
	{  cvt.f32.f16 %f1503, %rs102;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1504, %rs103;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1505, %rs104;}

	// inline asm
	// inline asm
	call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r233, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1506, %f1503, 0f00000000;
	add.f32 	%f1507, %f1504, 0f00000000;
	add.f32 	%f1508, %f1505, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs101, %f1508;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs100, %f1507;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs99, %f1506;}

	// inline asm
	mov.u16 	%rs106, 0;
	st.v4.u16 	[%rd177], {%rs99, %rs100, %rs101, %rs106};
	bra.uni 	BB0_132;

BB0_3:
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd17, %r47;
	cvt.u64.u32	%rd18, %r48;
	mov.u64 	%rd26, uvpos;
	cvta.global.u64 	%rd16, %rd26;
	mov.u32 	%r44, 12;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
	// inline asm
	ld.f32 	%f9, [%rd15+8];
	ld.f32 	%f8, [%rd15+4];
	ld.f32 	%f7, [%rd15];
	mul.f32 	%f351, %f7, 0f3456BF95;
	mul.f32 	%f352, %f8, 0f3456BF95;
	mul.f32 	%f353, %f9, 0f3456BF95;
	abs.f32 	%f354, %f1548;
	div.rn.f32 	%f355, %f351, %f354;
	abs.f32 	%f356, %f1549;
	div.rn.f32 	%f357, %f352, %f356;
	abs.f32 	%f358, %f1550;
	div.rn.f32 	%f359, %f353, %f358;
	abs.f32 	%f360, %f355;
	abs.f32 	%f361, %f357;
	abs.f32 	%f362, %f359;
	mov.f32 	%f363, 0f38D1B717;
	max.f32 	%f364, %f360, %f363;
	max.f32 	%f365, %f361, %f363;
	max.f32 	%f366, %f362, %f363;
	fma.rn.f32 	%f10, %f1548, %f364, %f7;
	fma.rn.f32 	%f11, %f1549, %f365, %f8;
	fma.rn.f32 	%f12, %f1550, %f366, %f9;
	ld.global.v2.u32 	{%r51, %r52}, [pixelID];
	cvt.rn.f32.u32	%f13, %r51;
	cvt.rn.f32.u32	%f14, %r52;
	mov.u64 	%rd27, localLights;
	cvta.global.u64 	%rd25, %rd27;
	mov.u32 	%r45, 1;
	mov.u32 	%r46, 96;
	// inline asm
	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
	// inline asm
	cvt.u32.u64	%r4, %rd21;
	setp.eq.s32	%p15, %r4, 0;
	mov.f32 	%f1551, 0f00000000;
	mov.f32 	%f1552, %f1551;
	mov.f32 	%f1553, %f1551;
	mov.f32 	%f1554, %f1551;
	mov.f32 	%f1555, %f1551;
	mov.f32 	%f1556, %f1551;
	mov.f32 	%f1557, %f1551;
	mov.f32 	%f1558, %f1551;
	mov.f32 	%f1559, %f1551;
	mov.f32 	%f1560, %f1551;
	mov.f32 	%f1561, %f1551;
	mov.f32 	%f1562, %f1551;
	mov.f32 	%f1563, %f1551;
	mov.f32 	%f1564, %f1551;
	mov.f32 	%f1565, %f1551;
	mov.f32 	%f1566, %f1551;
	@%p15 bra 	BB0_60;

	mov.f32 	%f383, 0f40000000;
	cvt.rzi.f32.f32	%f384, %f383;
	add.f32 	%f385, %f384, %f384;
	mov.f32 	%f386, 0f40800000;
	sub.f32 	%f387, %f386, %f385;
	abs.f32 	%f15, %f387;
	mul.f32 	%f16, %f10, 0f3456BF95;
	mul.f32 	%f17, %f11, 0f3456BF95;
	mul.f32 	%f18, %f12, 0f3456BF95;
	mul.f32 	%f19, %f13, 0f3DD32618;
	mul.f32 	%f20, %f14, 0f3DD2F1AA;
	mov.f32 	%f382, 0f00000000;
	mov.u32 	%r265, 0;
	abs.f32 	%f587, %f16;
	abs.f32 	%f588, %f17;
	max.f32 	%f589, %f587, %f588;
	abs.f32 	%f590, %f18;
	max.f32 	%f591, %f589, %f590;
	mov.f32 	%f1551, %f382;
	mov.f32 	%f1552, %f382;
	mov.f32 	%f1553, %f382;
	mov.f32 	%f1554, %f382;
	mov.f32 	%f1555, %f382;
	mov.f32 	%f1556, %f382;
	mov.f32 	%f1557, %f382;
	mov.f32 	%f1558, %f382;
	mov.f32 	%f1559, %f382;
	mov.f32 	%f1560, %f382;
	mov.f32 	%f1561, %f382;
	mov.f32 	%f1562, %f382;
	mov.f32 	%f1563, %f382;
	mov.f32 	%f1564, %f382;
	mov.f32 	%f1565, %f382;
	mov.f32 	%f1566, %f382;

BB0_5:
	cvt.u64.u32	%rd30, %r265;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
	// inline asm
	ld.v4.f32 	{%f390, %f391, %f392, %f393}, [%rd28+80];
	ld.v4.f32 	{%f394, %f395, %f396, %f397}, [%rd28+64];
	ld.v4.f32 	{%f398, %f399, %f400, %f401}, [%rd28+48];
	ld.v4.f32 	{%f402, %f1575, %f1576, %f405}, [%rd28+32];
	ld.v4.f32 	{%f406, %f407, %f408, %f409}, [%rd28+16];
	ld.v4.f32 	{%f410, %f411, %f412, %f413}, [%rd28];
	mov.b32 	 %r6, %f393;
	sub.f32 	%f61, %f411, %f7;
	sub.f32 	%f63, %f412, %f8;
	sub.f32 	%f65, %f413, %f9;
	mul.f32 	%f415, %f63, %f63;
	fma.rn.f32 	%f416, %f61, %f61, %f415;
	fma.rn.f32 	%f417, %f65, %f65, %f416;
	sqrt.rn.f32 	%f66, %f417;
	rcp.rn.f32 	%f418, %f66;
	mul.f32 	%f67, %f61, %f418;
	mul.f32 	%f68, %f63, %f418;
	mul.f32 	%f69, %f65, %f418;
	mul.f32 	%f70, %f66, %f409;
	abs.f32 	%f71, %f70;
	setp.lt.f32	%p16, %f71, 0f00800000;
	mul.f32 	%f419, %f71, 0f4B800000;
	selp.f32	%f420, 0fC3170000, 0fC2FE0000, %p16;
	selp.f32	%f421, %f419, %f71, %p16;
	mov.b32 	 %r58, %f421;
	and.b32  	%r59, %r58, 8388607;
	or.b32  	%r60, %r59, 1065353216;
	mov.b32 	 %f422, %r60;
	shr.u32 	%r61, %r58, 23;
	cvt.rn.f32.u32	%f423, %r61;
	add.f32 	%f424, %f420, %f423;
	setp.gt.f32	%p17, %f422, 0f3FB504F3;
	mul.f32 	%f425, %f422, 0f3F000000;
	add.f32 	%f426, %f424, 0f3F800000;
	selp.f32	%f427, %f425, %f422, %p17;
	selp.f32	%f428, %f426, %f424, %p17;
	add.f32 	%f429, %f427, 0fBF800000;
	add.f32 	%f389, %f427, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f388,%f389;
	// inline asm
	add.f32 	%f430, %f429, %f429;
	mul.f32 	%f431, %f388, %f430;
	mul.f32 	%f432, %f431, %f431;
	mov.f32 	%f433, 0f3C4CAF63;
	mov.f32 	%f434, 0f3B18F0FE;
	fma.rn.f32 	%f435, %f434, %f432, %f433;
	mov.f32 	%f436, 0f3DAAAABD;
	fma.rn.f32 	%f437, %f435, %f432, %f436;
	mul.rn.f32 	%f438, %f437, %f432;
	mul.rn.f32 	%f439, %f438, %f431;
	sub.f32 	%f440, %f429, %f431;
	neg.f32 	%f441, %f431;
	add.f32 	%f442, %f440, %f440;
	fma.rn.f32 	%f443, %f441, %f429, %f442;
	mul.rn.f32 	%f444, %f388, %f443;
	add.f32 	%f445, %f439, %f431;
	sub.f32 	%f446, %f431, %f445;
	add.f32 	%f447, %f439, %f446;
	add.f32 	%f448, %f444, %f447;
	add.f32 	%f449, %f445, %f448;
	sub.f32 	%f450, %f445, %f449;
	add.f32 	%f451, %f448, %f450;
	mov.f32 	%f452, 0f3F317200;
	mul.rn.f32 	%f453, %f428, %f452;
	mov.f32 	%f454, 0f35BFBE8E;
	mul.rn.f32 	%f455, %f428, %f454;
	add.f32 	%f456, %f453, %f449;
	sub.f32 	%f457, %f453, %f456;
	add.f32 	%f458, %f449, %f457;
	add.f32 	%f459, %f451, %f458;
	add.f32 	%f460, %f455, %f459;
	add.f32 	%f461, %f456, %f460;
	sub.f32 	%f462, %f456, %f461;
	add.f32 	%f463, %f460, %f462;
	mul.rn.f32 	%f72, %f386, %f461;
	neg.f32 	%f465, %f72;
	fma.rn.f32 	%f466, %f386, %f461, %f465;
	fma.rn.f32 	%f467, %f386, %f463, %f466;
	fma.rn.f32 	%f73, %f382, %f461, %f467;
	add.rn.f32 	%f74, %f72, %f73;
	mov.b32 	 %r62, %f74;
	setp.eq.s32	%p1, %r62, 1118925336;
	add.s32 	%r63, %r62, -1;
	mov.b32 	 %f469, %r63;
	selp.f32	%f470, %f469, %f74, %p1;
	mul.f32 	%f471, %f470, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f472, %f471;
	mov.f32 	%f473, 0fBF317200;
	fma.rn.f32 	%f474, %f472, %f473, %f470;
	mov.f32 	%f475, 0fB5BFBE8E;
	fma.rn.f32 	%f476, %f472, %f475, %f474;
	mul.f32 	%f477, %f476, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f478, %f477;
	add.f32 	%f479, %f472, 0f00000000;
	ex2.approx.f32 	%f480, %f479;
	mul.f32 	%f481, %f478, %f480;
	setp.lt.f32	%p18, %f470, 0fC2D20000;
	selp.f32	%f482, 0f00000000, %f481, %p18;
	setp.gt.f32	%p19, %f470, 0f42D20000;
	selp.f32	%f1567, 0f7F800000, %f482, %p19;
	setp.eq.f32	%p20, %f1567, 0f7F800000;
	@%p20 bra 	BB0_7;

	neg.f32 	%f483, %f74;
	add.rn.f32 	%f484, %f72, %f483;
	add.rn.f32 	%f485, %f484, %f73;
	add.f32 	%f486, %f485, 0f37000000;
	selp.f32	%f487, %f486, %f485, %p1;
	fma.rn.f32 	%f1567, %f1567, %f487, %f1567;

BB0_7:
	setp.lt.f32	%p21, %f70, 0f00000000;
	setp.eq.f32	%p22, %f15, 0f3F800000;
	and.pred  	%p2, %p21, %p22;
	mov.b32 	 %r64, %f1567;
	xor.b32  	%r65, %r64, -2147483648;
	mov.b32 	 %f488, %r65;
	selp.f32	%f1569, %f488, %f1567, %p2;
	setp.eq.f32	%p23, %f70, 0f00000000;
	@%p23 bra 	BB0_10;
	bra.uni 	BB0_8;

BB0_10:
	add.f32 	%f491, %f70, %f70;
	selp.f32	%f1569, %f491, 0f00000000, %p22;
	bra.uni 	BB0_11;

BB0_8:
	setp.geu.f32	%p24, %f70, 0f00000000;
	@%p24 bra 	BB0_11;

	cvt.rzi.f32.f32	%f490, %f386;
	setp.neu.f32	%p25, %f490, 0f40800000;
	selp.f32	%f1569, 0f7FFFFFFF, %f1569, %p25;

BB0_11:
	add.f32 	%f492, %f71, 0f40800000;
	mov.b32 	 %r66, %f492;
	setp.lt.s32	%p27, %r66, 2139095040;
	@%p27 bra 	BB0_16;

	setp.gtu.f32	%p28, %f71, 0f7F800000;
	@%p28 bra 	BB0_15;
	bra.uni 	BB0_13;

BB0_15:
	add.f32 	%f1569, %f70, 0f40800000;
	bra.uni 	BB0_16;

BB0_13:
	setp.neu.f32	%p29, %f71, 0f7F800000;
	@%p29 bra 	BB0_16;

	selp.f32	%f1569, 0fFF800000, 0f7F800000, %p2;

BB0_16:
	mul.f32 	%f493, %f66, %f407;
	mov.f32 	%f1608, 0f3F800000;
	sub.f32 	%f495, %f1608, %f1569;
	setp.eq.f32	%p30, %f70, 0f3F800000;
	selp.f32	%f496, 0f00000000, %f495, %p30;
	cvt.sat.f32.f32	%f497, %f496;
	fma.rn.f32 	%f498, %f493, %f493, %f408;
	div.rn.f32 	%f100, %f497, %f498;
	mul.f32 	%f499, %f1549, %f68;
	fma.rn.f32 	%f500, %f1548, %f67, %f499;
	fma.rn.f32 	%f501, %f1550, %f69, %f500;
	ld.global.u32 	%r67, [ignoreNormal];
	setp.eq.s32	%p31, %r67, 0;
	selp.f32	%f101, %f501, 0f3F800000, %p31;
	mul.f32 	%f502, %f101, 0f40800000;
	cvt.sat.f32.f32	%f102, %f502;
	setp.eq.f32	%p32, %f410, 0f3F800000;
	@%p32 bra 	BB0_23;
	bra.uni 	BB0_17;

BB0_23:
	setp.leu.f32	%p36, %f405, 0f00000000;
	@%p36 bra 	BB0_19;

	setp.geu.f32	%p37, %f401, 0f00000000;
	@%p37 bra 	BB0_25;

	sub.f32 	%f1547, %f413, %f9;
	sub.f32 	%f1546, %f411, %f7;
	sub.f32 	%f1545, %f412, %f8;
	mul.f32 	%f525, %f391, %f1545;
	fma.rn.f32 	%f526, %f390, %f1546, %f525;
	fma.rn.f32 	%f527, %f392, %f1547, %f526;
	rcp.rn.f32 	%f528, %f527;
	mul.f32 	%f1570, %f1546, %f528;
	mul.f32 	%f1571, %f1545, %f528;
	mul.f32 	%f1572, %f1547, %f528;
	neg.f32 	%f401, %f401;
	bra.uni 	BB0_27;

BB0_17:
	setp.eq.f32	%p33, %f410, 0f40000000;
	@%p33 bra 	BB0_21;
	bra.uni 	BB0_18;

BB0_21:
	setp.leu.f32	%p35, %f405, 0f00000000;
	@%p35 bra 	BB0_19;

	mul.f32 	%f519, %f399, %f68;
	fma.rn.f32 	%f520, %f398, %f67, %f519;
	mul.f32 	%f521, %f395, %f68;
	fma.rn.f32 	%f522, %f394, %f67, %f521;
	mul.f32 	%f523, %f391, %f68;
	fma.rn.f32 	%f524, %f390, %f67, %f523;
	fma.rn.f32 	%f516, %f400, %f69, %f520;
	fma.rn.f32 	%f517, %f396, %f69, %f522;
	fma.rn.f32 	%f518, %f392, %f69, %f524;
	cvt.rzi.s32.f32	%r68, %f405;
	mov.u32 	%r69, 6;
	mov.u32 	%r70, 0;
	// inline asm
	call (%f512, %f513, %f514, %f515), _rt_texture_get_base_id, (%r68, %r69, %f516, %f517, %f518, %r70);
	// inline asm
	mul.f32 	%f1574, %f402, %f512;
	mul.f32 	%f1575, %f1575, %f513;
	mul.f32 	%f1576, %f1576, %f514;
	bra.uni 	BB0_28;

BB0_18:
	setp.neu.f32	%p34, %f410, 0f40800000;
	@%p34 bra 	BB0_19;

	mul.f32 	%f503, %f390, %f67;
	mul.f32 	%f504, %f391, %f68;
	neg.f32 	%f505, %f504;
	sub.f32 	%f506, %f505, %f503;
	mul.f32 	%f507, %f392, %f69;
	sub.f32 	%f508, %f506, %f507;
	fma.rn.f32 	%f509, %f405, %f508, %f401;
	cvt.sat.f32.f32	%f510, %f509;
	mul.f32 	%f511, %f510, %f510;
	mul.f32 	%f1577, %f100, %f511;
	mov.f32 	%f1574, %f402;
	bra.uni 	BB0_29;

BB0_19:
	mov.f32 	%f1574, %f402;
	bra.uni 	BB0_28;

BB0_25:
	mov.f32 	%f1570, %f67;
	mov.f32 	%f1571, %f68;
	mov.f32 	%f1572, %f69;

BB0_27:
	mul.f32 	%f537, %f392, %f69;
	mul.f32 	%f538, %f391, %f68;
	neg.f32 	%f539, %f538;
	mul.f32 	%f540, %f390, %f67;
	sub.f32 	%f541, %f539, %f540;
	sub.f32 	%f542, %f541, %f537;
	setp.gt.f32	%p38, %f542, 0f00000000;
	selp.f32	%f543, 0f3F800000, 0f00000000, %p38;
	mul.f32 	%f544, %f399, %f1571;
	fma.rn.f32 	%f545, %f398, %f1570, %f544;
	mul.f32 	%f546, %f395, %f1571;
	fma.rn.f32 	%f547, %f394, %f1570, %f546;
	fma.rn.f32 	%f548, %f400, %f1572, %f545;
	fma.rn.f32 	%f549, %f396, %f1572, %f547;
	fma.rn.f32 	%f550, %f401, %f548, 0f3F000000;
	mov.f32 	%f551, 0f3F800000;
	sub.f32 	%f533, %f551, %f550;
	fma.rn.f32 	%f534, %f401, %f549, 0f3F000000;
	cvt.rzi.s32.f32	%r71, %f405;
	mov.f32 	%f536, 0f00000000;
	// inline asm
	call (%f529, %f530, %f531, %f532), _rt_texture_get_f_id, (%r71, %r28, %f533, %f534, %f536, %f536);
	// inline asm
	mul.f32 	%f552, %f543, %f529;
	mul.f32 	%f553, %f543, %f530;
	mul.f32 	%f554, %f543, %f531;
	mul.f32 	%f1574, %f402, %f552;
	mul.f32 	%f1575, %f1575, %f553;
	mul.f32 	%f1576, %f1576, %f554;

BB0_28:
	mov.f32 	%f1577, %f100;

BB0_29:
	max.f32 	%f570, %f1574, %f1575;
	max.f32 	%f571, %f570, %f1576;
	mul.f32 	%f572, %f102, %f1577;
	mul.f32 	%f573, %f572, %f571;
	setp.lt.f32	%p40, %f573, 0f3727C5AC;
	mov.pred 	%p165, -1;
	mov.f32 	%f1578, 0f00000000;
	mov.f32 	%f1579, %f1578;
	mov.f32 	%f1580, %f1578;
	mov.f32 	%f140, %f1578;
	mov.f32 	%f1582, %f1578;
	mov.f32 	%f1583, %f1578;
	mov.f32 	%f143, %f1578;
	mov.f32 	%f1585, %f1578;
	mov.f32 	%f1586, %f1578;
	mov.f32 	%f146, %f1578;
	mov.f32 	%f1588, %f1578;
	mov.f32 	%f1589, %f1578;
	mov.f32 	%f149, %f1578;
	mov.f32 	%f1591, %f1578;
	mov.f32 	%f1592, %f1578;
	@%p40 bra 	BB0_31;

	cvt.sat.f32.f32	%f574, %f101;
	mul.f32 	%f575, %f1577, %f574;
	mul.f32 	%f1578, %f1574, %f575;
	mul.f32 	%f1579, %f1575, %f575;
	mul.f32 	%f1580, %f1576, %f575;
	mul.f32 	%f576, %f1577, 0f3E800000;
	mul.f32 	%f577, %f102, %f576;
	mul.f32 	%f140, %f1574, %f577;
	mul.f32 	%f1582, %f1575, %f577;
	mul.f32 	%f1583, %f1576, %f577;
	mul.f32 	%f143, %f67, %f140;
	mul.f32 	%f1585, %f67, %f1582;
	mul.f32 	%f1586, %f67, %f1583;
	mul.f32 	%f146, %f68, %f140;
	mul.f32 	%f1588, %f68, %f1582;
	mul.f32 	%f1589, %f68, %f1583;
	mul.f32 	%f149, %f69, %f140;
	mul.f32 	%f1591, %f69, %f1582;
	mul.f32 	%f1592, %f69, %f1583;
	mov.pred 	%p165, 0;

BB0_31:
	@%p165 bra 	BB0_59;

	setp.eq.s32	%p42, %r6, 0;
	mov.u16 	%rs161, 0;
	mov.f32 	%f1609, %f1608;
	mov.f32 	%f1610, %f1608;
	@%p42 bra 	BB0_43;

	abs.s32 	%r8, %r6;
	mov.f32 	%f1605, 0f00000000;
	setp.lt.s32	%p43, %r8, 1;
	mov.f32 	%f1606, %f1605;
	mov.f32 	%f1607, %f1605;
	@%p43 bra 	BB0_42;

	max.f32 	%f153, %f591, %f363;
	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p44, %r9, 0;
	add.u64 	%rd35, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd35;
	mov.f32 	%f1605, 0f00000000;
	mov.u32 	%r269, 0;
	mov.f32 	%f1606, %f1605;
	mov.f32 	%f1607, %f1605;
	@%p44 bra 	BB0_40;

	setp.eq.s32	%p45, %r9, 1;
	mov.f32 	%f1596, 0f00000000;
	mov.u32 	%r267, 0;
	mov.f32 	%f1597, %f1596;
	mov.f32 	%f1598, %f1596;
	@%p45 bra 	BB0_39;

	setp.eq.s32	%p46, %r9, 2;
	mov.f32 	%f1593, 0f00000000;
	mov.u32 	%r266, 0;
	mov.f32 	%f1594, %f1593;
	mov.f32 	%f1595, %f1593;
	@%p46 bra 	BB0_38;

	cvt.rmi.f32.f32	%f607, %f19;
	sub.f32 	%f608, %f19, %f607;
	cvt.rmi.f32.f32	%f609, %f20;
	sub.f32 	%f610, %f20, %f609;
	add.f32 	%f611, %f610, 0f420551EC;
	add.f32 	%f612, %f608, 0f420551EC;
	mul.f32 	%f613, %f608, %f611;
	fma.rn.f32 	%f614, %f610, %f612, %f613;
	add.f32 	%f615, %f614, 0f00000000;
	add.f32 	%f616, %f608, %f615;
	add.f32 	%f617, %f610, %f615;
	add.f32 	%f618, %f616, %f617;
	mul.f32 	%f619, %f615, %f618;
	cvt.rmi.f32.f32	%f620, %f619;
	sub.f32 	%f621, %f619, %f620;
	add.f32 	%f622, %f616, %f616;
	mul.f32 	%f623, %f617, %f622;
	cvt.rmi.f32.f32	%f624, %f623;
	sub.f32 	%f625, %f623, %f624;
	mul.f32 	%f626, %f616, %f618;
	cvt.rmi.f32.f32	%f627, %f626;
	sub.f32 	%f628, %f626, %f627;
	fma.rn.f32 	%f629, %f621, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f630, %f625, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f631, %f628, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f632, %f406, %f629, %f411;
	fma.rn.f32 	%f633, %f406, %f630, %f412;
	fma.rn.f32 	%f634, %f406, %f631, %f413;
	sub.f32 	%f635, %f632, %f7;
	sub.f32 	%f636, %f633, %f8;
	sub.f32 	%f637, %f634, %f9;
	mul.f32 	%f638, %f636, %f636;
	fma.rn.f32 	%f639, %f635, %f635, %f638;
	fma.rn.f32 	%f640, %f637, %f637, %f639;
	sqrt.rn.f32 	%f606, %f640;
	rcp.rn.f32 	%f641, %f606;
	mul.f32 	%f602, %f641, %f635;
	mul.f32 	%f603, %f641, %f636;
	mul.f32 	%f604, %f641, %f637;
	ld.global.u32 	%r80, [imageEnabled];
	and.b32  	%r81, %r80, 32;
	setp.eq.s32	%p47, %r81, 0;
	selp.f32	%f642, 0f3F800000, 0f41200000, %p47;
	mul.f32 	%f605, %f642, %f153;
	mov.u32 	%r82, 1065353216;
	st.local.u32 	[%rd2+8], %r82;
	st.local.u32 	[%rd2+4], %r82;
	st.local.u32 	[%rd2], %r82;
	ld.global.u32 	%r76, [root];
	// inline asm
	call _rt_trace_64, (%r76, %f10, %f11, %f12, %f602, %f603, %f604, %r45, %f605, %f606, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f643, [%rd2];
	add.f32 	%f1595, %f643, 0f00000000;
	ld.local.f32 	%f644, [%rd2+4];
	add.f32 	%f1594, %f644, 0f00000000;
	ld.local.f32 	%f645, [%rd2+8];
	add.f32 	%f1593, %f645, 0f00000000;
	mov.u32 	%r266, %r45;

BB0_38:
	cvt.rn.f32.s32	%f654, %r266;
	add.f32 	%f655, %f13, %f654;
	sub.f32 	%f656, %f14, %f654;
	mul.f32 	%f657, %f655, 0f3DD32618;
	cvt.rmi.f32.f32	%f658, %f657;
	sub.f32 	%f659, %f657, %f658;
	mul.f32 	%f660, %f656, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f661, %f660;
	sub.f32 	%f662, %f660, %f661;
	mul.f32 	%f663, %f654, 0f3DC74539;
	cvt.rmi.f32.f32	%f664, %f663;
	sub.f32 	%f665, %f663, %f664;
	add.f32 	%f666, %f662, 0f420551EC;
	add.f32 	%f667, %f659, 0f420551EC;
	add.f32 	%f668, %f665, 0f420551EC;
	mul.f32 	%f669, %f659, %f666;
	fma.rn.f32 	%f670, %f662, %f667, %f669;
	fma.rn.f32 	%f671, %f665, %f668, %f670;
	add.f32 	%f672, %f659, %f671;
	add.f32 	%f673, %f662, %f671;
	add.f32 	%f674, %f665, %f671;
	add.f32 	%f675, %f672, %f673;
	mul.f32 	%f676, %f674, %f675;
	cvt.rmi.f32.f32	%f677, %f676;
	sub.f32 	%f678, %f676, %f677;
	add.f32 	%f679, %f672, %f672;
	mul.f32 	%f680, %f673, %f679;
	cvt.rmi.f32.f32	%f681, %f680;
	sub.f32 	%f682, %f680, %f681;
	mul.f32 	%f683, %f672, %f675;
	cvt.rmi.f32.f32	%f684, %f683;
	sub.f32 	%f685, %f683, %f684;
	fma.rn.f32 	%f686, %f678, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f687, %f682, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f688, %f685, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f689, %f406, %f686, %f411;
	fma.rn.f32 	%f690, %f406, %f687, %f412;
	fma.rn.f32 	%f691, %f406, %f688, %f413;
	sub.f32 	%f692, %f689, %f7;
	sub.f32 	%f693, %f690, %f8;
	sub.f32 	%f694, %f691, %f9;
	mul.f32 	%f695, %f693, %f693;
	fma.rn.f32 	%f696, %f692, %f692, %f695;
	fma.rn.f32 	%f697, %f694, %f694, %f696;
	sqrt.rn.f32 	%f653, %f697;
	rcp.rn.f32 	%f698, %f653;
	mul.f32 	%f649, %f698, %f692;
	mul.f32 	%f650, %f698, %f693;
	mul.f32 	%f651, %f698, %f694;
	ld.global.u32 	%r86, [imageEnabled];
	and.b32  	%r87, %r86, 32;
	setp.eq.s32	%p48, %r87, 0;
	selp.f32	%f699, 0f3F800000, 0f41200000, %p48;
	mul.f32 	%f652, %f699, %f153;
	mov.u32 	%r88, 1065353216;
	st.local.u32 	[%rd2+8], %r88;
	st.local.u32 	[%rd2+4], %r88;
	st.local.u32 	[%rd2], %r88;
	ld.global.u32 	%r83, [root];
	// inline asm
	call _rt_trace_64, (%r83, %f10, %f11, %f12, %f649, %f650, %f651, %r45, %f652, %f653, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f700, [%rd2];
	add.f32 	%f1598, %f1595, %f700;
	ld.local.f32 	%f701, [%rd2+4];
	add.f32 	%f1597, %f1594, %f701;
	ld.local.f32 	%f702, [%rd2+8];
	add.f32 	%f1596, %f1593, %f702;
	add.s32 	%r267, %r266, 1;

BB0_39:
	cvt.rn.f32.s32	%f711, %r267;
	add.f32 	%f712, %f13, %f711;
	sub.f32 	%f713, %f14, %f711;
	mul.f32 	%f714, %f712, 0f3DD32618;
	cvt.rmi.f32.f32	%f715, %f714;
	sub.f32 	%f716, %f714, %f715;
	mul.f32 	%f717, %f713, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f718, %f717;
	sub.f32 	%f719, %f717, %f718;
	mul.f32 	%f720, %f711, 0f3DC74539;
	cvt.rmi.f32.f32	%f721, %f720;
	sub.f32 	%f722, %f720, %f721;
	add.f32 	%f723, %f719, 0f420551EC;
	add.f32 	%f724, %f716, 0f420551EC;
	add.f32 	%f725, %f722, 0f420551EC;
	mul.f32 	%f726, %f716, %f723;
	fma.rn.f32 	%f727, %f719, %f724, %f726;
	fma.rn.f32 	%f728, %f722, %f725, %f727;
	add.f32 	%f729, %f716, %f728;
	add.f32 	%f730, %f719, %f728;
	add.f32 	%f731, %f722, %f728;
	add.f32 	%f732, %f729, %f730;
	mul.f32 	%f733, %f731, %f732;
	cvt.rmi.f32.f32	%f734, %f733;
	sub.f32 	%f735, %f733, %f734;
	add.f32 	%f736, %f729, %f729;
	mul.f32 	%f737, %f730, %f736;
	cvt.rmi.f32.f32	%f738, %f737;
	sub.f32 	%f739, %f737, %f738;
	mul.f32 	%f740, %f729, %f732;
	cvt.rmi.f32.f32	%f741, %f740;
	sub.f32 	%f742, %f740, %f741;
	fma.rn.f32 	%f743, %f735, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f744, %f739, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f745, %f742, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f746, %f406, %f743, %f411;
	fma.rn.f32 	%f747, %f406, %f744, %f412;
	fma.rn.f32 	%f748, %f406, %f745, %f413;
	sub.f32 	%f749, %f746, %f7;
	sub.f32 	%f750, %f747, %f8;
	sub.f32 	%f751, %f748, %f9;
	mul.f32 	%f752, %f750, %f750;
	fma.rn.f32 	%f753, %f749, %f749, %f752;
	fma.rn.f32 	%f754, %f751, %f751, %f753;
	sqrt.rn.f32 	%f710, %f754;
	rcp.rn.f32 	%f755, %f710;
	mul.f32 	%f706, %f755, %f749;
	mul.f32 	%f707, %f755, %f750;
	mul.f32 	%f708, %f755, %f751;
	ld.global.u32 	%r92, [imageEnabled];
	and.b32  	%r93, %r92, 32;
	setp.eq.s32	%p49, %r93, 0;
	selp.f32	%f756, 0f3F800000, 0f41200000, %p49;
	mul.f32 	%f709, %f756, %f153;
	mov.u32 	%r94, 1065353216;
	st.local.u32 	[%rd2+8], %r94;
	st.local.u32 	[%rd2+4], %r94;
	st.local.u32 	[%rd2], %r94;
	ld.global.u32 	%r89, [root];
	mov.u32 	%r90, 1;
	// inline asm
	call _rt_trace_64, (%r89, %f10, %f11, %f12, %f706, %f707, %f708, %r90, %f709, %f710, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f757, [%rd2];
	add.f32 	%f1607, %f1598, %f757;
	ld.local.f32 	%f758, [%rd2+4];
	add.f32 	%f1606, %f1597, %f758;
	ld.local.f32 	%f759, [%rd2+8];
	add.f32 	%f1605, %f1596, %f759;
	add.s32 	%r269, %r267, 1;

BB0_40:
	setp.lt.u32	%p50, %r8, 4;
	@%p50 bra 	BB0_42;

BB0_41:
	cvt.rn.f32.s32	%f792, %r269;
	add.f32 	%f793, %f13, %f792;
	sub.f32 	%f794, %f14, %f792;
	mul.f32 	%f795, %f793, 0f3DD32618;
	cvt.rmi.f32.f32	%f796, %f795;
	sub.f32 	%f797, %f795, %f796;
	mul.f32 	%f798, %f794, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f799, %f798;
	sub.f32 	%f800, %f798, %f799;
	mul.f32 	%f801, %f792, 0f3DC74539;
	cvt.rmi.f32.f32	%f802, %f801;
	sub.f32 	%f803, %f801, %f802;
	add.f32 	%f804, %f800, 0f420551EC;
	add.f32 	%f805, %f797, 0f420551EC;
	add.f32 	%f806, %f803, 0f420551EC;
	mul.f32 	%f807, %f797, %f804;
	fma.rn.f32 	%f808, %f800, %f805, %f807;
	fma.rn.f32 	%f809, %f803, %f806, %f808;
	add.f32 	%f810, %f797, %f809;
	add.f32 	%f811, %f800, %f809;
	add.f32 	%f812, %f803, %f809;
	add.f32 	%f813, %f810, %f811;
	mul.f32 	%f814, %f812, %f813;
	cvt.rmi.f32.f32	%f815, %f814;
	sub.f32 	%f816, %f814, %f815;
	add.f32 	%f817, %f810, %f810;
	mul.f32 	%f818, %f811, %f817;
	cvt.rmi.f32.f32	%f819, %f818;
	sub.f32 	%f820, %f818, %f819;
	mul.f32 	%f821, %f810, %f813;
	cvt.rmi.f32.f32	%f822, %f821;
	sub.f32 	%f823, %f821, %f822;
	fma.rn.f32 	%f824, %f816, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f825, %f820, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f826, %f823, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f827, %f406, %f824, %f411;
	fma.rn.f32 	%f828, %f406, %f825, %f412;
	fma.rn.f32 	%f829, %f406, %f826, %f413;
	sub.f32 	%f830, %f827, %f7;
	sub.f32 	%f831, %f828, %f8;
	sub.f32 	%f832, %f829, %f9;
	mul.f32 	%f833, %f831, %f831;
	fma.rn.f32 	%f834, %f830, %f830, %f833;
	fma.rn.f32 	%f835, %f832, %f832, %f834;
	sqrt.rn.f32 	%f767, %f835;
	rcp.rn.f32 	%f836, %f767;
	mul.f32 	%f763, %f836, %f830;
	mul.f32 	%f764, %f836, %f831;
	mul.f32 	%f765, %f836, %f832;
	ld.global.u32 	%r107, [imageEnabled];
	and.b32  	%r108, %r107, 32;
	setp.eq.s32	%p51, %r108, 0;
	selp.f32	%f837, 0f3F800000, 0f41200000, %p51;
	mul.f32 	%f766, %f837, %f153;
	mov.u32 	%r109, 1065353216;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r95, [root];
	mov.u32 	%r105, 1;
	// inline asm
	call _rt_trace_64, (%r95, %f10, %f11, %f12, %f763, %f764, %f765, %r105, %f766, %f767, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f838, [%rd2];
	add.f32 	%f839, %f1607, %f838;
	ld.local.f32 	%f840, [%rd2+4];
	add.f32 	%f841, %f1606, %f840;
	ld.local.f32 	%f842, [%rd2+8];
	add.f32 	%f843, %f1605, %f842;
	add.s32 	%r110, %r269, 1;
	cvt.rn.f32.s32	%f844, %r110;
	add.f32 	%f845, %f13, %f844;
	sub.f32 	%f846, %f14, %f844;
	mul.f32 	%f847, %f845, 0f3DD32618;
	cvt.rmi.f32.f32	%f848, %f847;
	sub.f32 	%f849, %f847, %f848;
	mul.f32 	%f850, %f846, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f851, %f850;
	sub.f32 	%f852, %f850, %f851;
	mul.f32 	%f853, %f844, 0f3DC74539;
	cvt.rmi.f32.f32	%f854, %f853;
	sub.f32 	%f855, %f853, %f854;
	add.f32 	%f856, %f852, 0f420551EC;
	add.f32 	%f857, %f849, 0f420551EC;
	add.f32 	%f858, %f855, 0f420551EC;
	mul.f32 	%f859, %f849, %f856;
	fma.rn.f32 	%f860, %f852, %f857, %f859;
	fma.rn.f32 	%f861, %f855, %f858, %f860;
	add.f32 	%f862, %f849, %f861;
	add.f32 	%f863, %f852, %f861;
	add.f32 	%f864, %f855, %f861;
	add.f32 	%f865, %f862, %f863;
	mul.f32 	%f866, %f864, %f865;
	cvt.rmi.f32.f32	%f867, %f866;
	sub.f32 	%f868, %f866, %f867;
	add.f32 	%f869, %f862, %f862;
	mul.f32 	%f870, %f863, %f869;
	cvt.rmi.f32.f32	%f871, %f870;
	sub.f32 	%f872, %f870, %f871;
	mul.f32 	%f873, %f862, %f865;
	cvt.rmi.f32.f32	%f874, %f873;
	sub.f32 	%f875, %f873, %f874;
	fma.rn.f32 	%f876, %f868, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f877, %f872, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f878, %f875, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f879, %f406, %f876, %f411;
	fma.rn.f32 	%f880, %f406, %f877, %f412;
	fma.rn.f32 	%f881, %f406, %f878, %f413;
	sub.f32 	%f882, %f879, %f7;
	sub.f32 	%f883, %f880, %f8;
	sub.f32 	%f884, %f881, %f9;
	mul.f32 	%f885, %f883, %f883;
	fma.rn.f32 	%f886, %f882, %f882, %f885;
	fma.rn.f32 	%f887, %f884, %f884, %f886;
	sqrt.rn.f32 	%f775, %f887;
	rcp.rn.f32 	%f888, %f775;
	mul.f32 	%f771, %f888, %f882;
	mul.f32 	%f772, %f888, %f883;
	mul.f32 	%f773, %f888, %f884;
	ld.global.u32 	%r111, [imageEnabled];
	and.b32  	%r112, %r111, 32;
	setp.eq.s32	%p52, %r112, 0;
	selp.f32	%f889, 0f3F800000, 0f41200000, %p52;
	mul.f32 	%f774, %f889, %f153;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r98, [root];
	// inline asm
	call _rt_trace_64, (%r98, %f10, %f11, %f12, %f771, %f772, %f773, %r105, %f774, %f775, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f890, [%rd2];
	add.f32 	%f891, %f839, %f890;
	ld.local.f32 	%f892, [%rd2+4];
	add.f32 	%f893, %f841, %f892;
	ld.local.f32 	%f894, [%rd2+8];
	add.f32 	%f895, %f843, %f894;
	add.s32 	%r113, %r269, 2;
	cvt.rn.f32.s32	%f896, %r113;
	add.f32 	%f897, %f13, %f896;
	sub.f32 	%f898, %f14, %f896;
	mul.f32 	%f899, %f897, 0f3DD32618;
	cvt.rmi.f32.f32	%f900, %f899;
	sub.f32 	%f901, %f899, %f900;
	mul.f32 	%f902, %f898, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f903, %f902;
	sub.f32 	%f904, %f902, %f903;
	mul.f32 	%f905, %f896, 0f3DC74539;
	cvt.rmi.f32.f32	%f906, %f905;
	sub.f32 	%f907, %f905, %f906;
	add.f32 	%f908, %f904, 0f420551EC;
	add.f32 	%f909, %f901, 0f420551EC;
	add.f32 	%f910, %f907, 0f420551EC;
	mul.f32 	%f911, %f901, %f908;
	fma.rn.f32 	%f912, %f904, %f909, %f911;
	fma.rn.f32 	%f913, %f907, %f910, %f912;
	add.f32 	%f914, %f901, %f913;
	add.f32 	%f915, %f904, %f913;
	add.f32 	%f916, %f907, %f913;
	add.f32 	%f917, %f914, %f915;
	mul.f32 	%f918, %f916, %f917;
	cvt.rmi.f32.f32	%f919, %f918;
	sub.f32 	%f920, %f918, %f919;
	add.f32 	%f921, %f914, %f914;
	mul.f32 	%f922, %f915, %f921;
	cvt.rmi.f32.f32	%f923, %f922;
	sub.f32 	%f924, %f922, %f923;
	mul.f32 	%f925, %f914, %f917;
	cvt.rmi.f32.f32	%f926, %f925;
	sub.f32 	%f927, %f925, %f926;
	fma.rn.f32 	%f928, %f920, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f929, %f924, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f930, %f927, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f931, %f406, %f928, %f411;
	fma.rn.f32 	%f932, %f406, %f929, %f412;
	fma.rn.f32 	%f933, %f406, %f930, %f413;
	sub.f32 	%f934, %f931, %f7;
	sub.f32 	%f935, %f932, %f8;
	sub.f32 	%f936, %f933, %f9;
	mul.f32 	%f937, %f935, %f935;
	fma.rn.f32 	%f938, %f934, %f934, %f937;
	fma.rn.f32 	%f939, %f936, %f936, %f938;
	sqrt.rn.f32 	%f783, %f939;
	rcp.rn.f32 	%f940, %f783;
	mul.f32 	%f779, %f940, %f934;
	mul.f32 	%f780, %f940, %f935;
	mul.f32 	%f781, %f940, %f936;
	ld.global.u32 	%r114, [imageEnabled];
	and.b32  	%r115, %r114, 32;
	setp.eq.s32	%p53, %r115, 0;
	selp.f32	%f941, 0f3F800000, 0f41200000, %p53;
	mul.f32 	%f782, %f941, %f153;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r101, [root];
	// inline asm
	call _rt_trace_64, (%r101, %f10, %f11, %f12, %f779, %f780, %f781, %r105, %f782, %f783, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f942, [%rd2];
	add.f32 	%f943, %f891, %f942;
	ld.local.f32 	%f944, [%rd2+4];
	add.f32 	%f945, %f893, %f944;
	ld.local.f32 	%f946, [%rd2+8];
	add.f32 	%f947, %f895, %f946;
	add.s32 	%r116, %r269, 3;
	cvt.rn.f32.s32	%f948, %r116;
	add.f32 	%f949, %f13, %f948;
	sub.f32 	%f950, %f14, %f948;
	mul.f32 	%f951, %f949, 0f3DD32618;
	cvt.rmi.f32.f32	%f952, %f951;
	sub.f32 	%f953, %f951, %f952;
	mul.f32 	%f954, %f950, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f955, %f954;
	sub.f32 	%f956, %f954, %f955;
	mul.f32 	%f957, %f948, 0f3DC74539;
	cvt.rmi.f32.f32	%f958, %f957;
	sub.f32 	%f959, %f957, %f958;
	add.f32 	%f960, %f956, 0f420551EC;
	add.f32 	%f961, %f953, 0f420551EC;
	add.f32 	%f962, %f959, 0f420551EC;
	mul.f32 	%f963, %f953, %f960;
	fma.rn.f32 	%f964, %f956, %f961, %f963;
	fma.rn.f32 	%f965, %f959, %f962, %f964;
	add.f32 	%f966, %f953, %f965;
	add.f32 	%f967, %f956, %f965;
	add.f32 	%f968, %f959, %f965;
	add.f32 	%f969, %f966, %f967;
	mul.f32 	%f970, %f968, %f969;
	cvt.rmi.f32.f32	%f971, %f970;
	sub.f32 	%f972, %f970, %f971;
	add.f32 	%f973, %f966, %f966;
	mul.f32 	%f974, %f967, %f973;
	cvt.rmi.f32.f32	%f975, %f974;
	sub.f32 	%f976, %f974, %f975;
	mul.f32 	%f977, %f966, %f969;
	cvt.rmi.f32.f32	%f978, %f977;
	sub.f32 	%f979, %f977, %f978;
	fma.rn.f32 	%f980, %f972, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f981, %f976, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f982, %f979, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f983, %f406, %f980, %f411;
	fma.rn.f32 	%f984, %f406, %f981, %f412;
	fma.rn.f32 	%f985, %f406, %f982, %f413;
	sub.f32 	%f986, %f983, %f7;
	sub.f32 	%f987, %f984, %f8;
	sub.f32 	%f988, %f985, %f9;
	mul.f32 	%f989, %f987, %f987;
	fma.rn.f32 	%f990, %f986, %f986, %f989;
	fma.rn.f32 	%f991, %f988, %f988, %f990;
	sqrt.rn.f32 	%f791, %f991;
	rcp.rn.f32 	%f992, %f791;
	mul.f32 	%f787, %f992, %f986;
	mul.f32 	%f788, %f992, %f987;
	mul.f32 	%f789, %f992, %f988;
	ld.global.u32 	%r117, [imageEnabled];
	and.b32  	%r118, %r117, 32;
	setp.eq.s32	%p54, %r118, 0;
	selp.f32	%f993, 0f3F800000, 0f41200000, %p54;
	mul.f32 	%f790, %f993, %f153;
	st.local.u32 	[%rd2+8], %r109;
	st.local.u32 	[%rd2+4], %r109;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r104, [root];
	// inline asm
	call _rt_trace_64, (%r104, %f10, %f11, %f12, %f787, %f788, %f789, %r105, %f790, %f791, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f994, [%rd2];
	add.f32 	%f1607, %f943, %f994;
	ld.local.f32 	%f995, [%rd2+4];
	add.f32 	%f1606, %f945, %f995;
	ld.local.f32 	%f996, [%rd2+8];
	add.f32 	%f1605, %f947, %f996;
	add.s32 	%r269, %r269, 4;
	setp.lt.s32	%p55, %r269, %r8;
	@%p55 bra 	BB0_41;

BB0_42:
	cvt.rn.f32.s32	%f997, %r8;
	rcp.rn.f32 	%f998, %f997;
	mul.f32 	%f1608, %f1607, %f998;
	mul.f32 	%f1609, %f1606, %f998;
	mul.f32 	%f1610, %f1605, %f998;
	shr.u32 	%r119, %r6, 31;
	cvt.u16.u32	%rs161, %r119;

BB0_43:
	fma.rn.f32 	%f1566, %f1578, %f1608, %f1566;
	fma.rn.f32 	%f1565, %f1579, %f1609, %f1565;
	fma.rn.f32 	%f1564, %f1580, %f1610, %f1564;
	fma.rn.f32 	%f1563, %f140, %f1608, %f1563;
	fma.rn.f32 	%f1562, %f1582, %f1609, %f1562;
	fma.rn.f32 	%f1561, %f1583, %f1610, %f1561;
	fma.rn.f32 	%f1560, %f143, %f1608, %f1560;
	fma.rn.f32 	%f1559, %f1585, %f1609, %f1559;
	fma.rn.f32 	%f1558, %f1586, %f1610, %f1558;
	fma.rn.f32 	%f1557, %f146, %f1608, %f1557;
	fma.rn.f32 	%f1556, %f1588, %f1609, %f1556;
	fma.rn.f32 	%f1555, %f1589, %f1610, %f1555;
	fma.rn.f32 	%f1554, %f149, %f1608, %f1554;
	fma.rn.f32 	%f1553, %f1591, %f1609, %f1553;
	fma.rn.f32 	%f1552, %f1592, %f1610, %f1552;
	setp.eq.s16	%p56, %rs161, 0;
	@%p56 bra 	BB0_58;

	mov.f32 	%f1544, 0fB5BFBE8E;
	mov.f32 	%f1543, 0fBF317200;
	mov.f32 	%f1542, 0f35BFBE8E;
	mov.f32 	%f1541, 0f3F317200;
	mov.f32 	%f1540, 0f3DAAAABD;
	mov.f32 	%f1539, 0f3C4CAF63;
	mov.f32 	%f1538, 0f3B18F0FE;
	mul.f32 	%f1001, %f143, 0f3F000000;
	mul.f32 	%f1002, %f146, 0f3F000000;
	mul.f32 	%f1003, %f1002, %f1002;
	fma.rn.f32 	%f1004, %f1001, %f1001, %f1003;
	mul.f32 	%f1005, %f149, 0f3F000000;
	fma.rn.f32 	%f1006, %f1005, %f1005, %f1004;
	sqrt.rn.f32 	%f1007, %f1006;
	rcp.rn.f32 	%f1008, %f1007;
	mul.f32 	%f1009, %f1001, %f1008;
	mul.f32 	%f1010, %f1002, %f1008;
	mul.f32 	%f1011, %f1005, %f1008;
	mul.f32 	%f1012, %f1549, %f1010;
	fma.rn.f32 	%f1013, %f1548, %f1009, %f1012;
	fma.rn.f32 	%f1014, %f1550, %f1011, %f1013;
	fma.rn.f32 	%f202, %f1014, 0f3F000000, 0f3F000000;
	add.f32 	%f1015, %f1007, %f1007;
	div.rn.f32 	%f1016, %f1015, %f140;
	add.f32 	%f203, %f1016, 0f3F800000;
	div.rn.f32 	%f1017, %f1007, %f140;
	mov.f32 	%f1018, 0f3F800000;
	sub.f32 	%f1019, %f1018, %f1017;
	add.f32 	%f1020, %f1017, 0f3F800000;
	div.rn.f32 	%f204, %f1019, %f1020;
	sub.f32 	%f1021, %f1018, %f204;
	add.f32 	%f1022, %f203, 0f3F800000;
	mul.f32 	%f205, %f1022, %f1021;
	mul.f32 	%f1023, %f203, 0f3F000000;
	cvt.rzi.f32.f32	%f1024, %f1023;
	add.f32 	%f1025, %f1024, %f1024;
	sub.f32 	%f1026, %f203, %f1025;
	abs.f32 	%f206, %f1026;
	abs.f32 	%f207, %f202;
	setp.lt.f32	%p57, %f207, 0f00800000;
	mul.f32 	%f1027, %f207, 0f4B800000;
	selp.f32	%f1028, 0fC3170000, 0fC2FE0000, %p57;
	selp.f32	%f1029, %f1027, %f207, %p57;
	mov.b32 	 %r120, %f1029;
	and.b32  	%r121, %r120, 8388607;
	or.b32  	%r122, %r121, 1065353216;
	mov.b32 	 %f1030, %r122;
	shr.u32 	%r123, %r120, 23;
	cvt.rn.f32.u32	%f1031, %r123;
	add.f32 	%f1032, %f1028, %f1031;
	setp.gt.f32	%p58, %f1030, 0f3FB504F3;
	mul.f32 	%f1033, %f1030, 0f3F000000;
	add.f32 	%f1034, %f1032, 0f3F800000;
	selp.f32	%f1035, %f1033, %f1030, %p58;
	selp.f32	%f1036, %f1034, %f1032, %p58;
	add.f32 	%f1037, %f1035, 0fBF800000;
	add.f32 	%f1000, %f1035, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f999,%f1000;
	// inline asm
	add.f32 	%f1038, %f1037, %f1037;
	mul.f32 	%f1039, %f999, %f1038;
	mul.f32 	%f1040, %f1039, %f1039;
	fma.rn.f32 	%f1043, %f1538, %f1040, %f1539;
	fma.rn.f32 	%f1045, %f1043, %f1040, %f1540;
	mul.rn.f32 	%f1046, %f1045, %f1040;
	mul.rn.f32 	%f1047, %f1046, %f1039;
	sub.f32 	%f1048, %f1037, %f1039;
	neg.f32 	%f1049, %f1039;
	add.f32 	%f1050, %f1048, %f1048;
	fma.rn.f32 	%f1051, %f1049, %f1037, %f1050;
	mul.rn.f32 	%f1052, %f999, %f1051;
	add.f32 	%f1053, %f1047, %f1039;
	sub.f32 	%f1054, %f1039, %f1053;
	add.f32 	%f1055, %f1047, %f1054;
	add.f32 	%f1056, %f1052, %f1055;
	add.f32 	%f1057, %f1053, %f1056;
	sub.f32 	%f1058, %f1053, %f1057;
	add.f32 	%f1059, %f1056, %f1058;
	mul.rn.f32 	%f1061, %f1036, %f1541;
	mul.rn.f32 	%f1063, %f1036, %f1542;
	add.f32 	%f1064, %f1061, %f1057;
	sub.f32 	%f1065, %f1061, %f1064;
	add.f32 	%f1066, %f1057, %f1065;
	add.f32 	%f1067, %f1059, %f1066;
	add.f32 	%f1068, %f1063, %f1067;
	add.f32 	%f1069, %f1064, %f1068;
	sub.f32 	%f1070, %f1064, %f1069;
	add.f32 	%f1071, %f1068, %f1070;
	abs.f32 	%f208, %f203;
	setp.gt.f32	%p59, %f208, 0f77F684DF;
	mul.f32 	%f1072, %f203, 0f39000000;
	selp.f32	%f1073, %f1072, %f203, %p59;
	mul.rn.f32 	%f1074, %f1073, %f1069;
	neg.f32 	%f1075, %f1074;
	fma.rn.f32 	%f1076, %f1073, %f1069, %f1075;
	fma.rn.f32 	%f1077, %f1073, %f1071, %f1076;
	mov.f32 	%f1078, 0f00000000;
	fma.rn.f32 	%f1079, %f1078, %f1069, %f1077;
	add.rn.f32 	%f1080, %f1074, %f1079;
	neg.f32 	%f1081, %f1080;
	add.rn.f32 	%f1082, %f1074, %f1081;
	add.rn.f32 	%f1083, %f1082, %f1079;
	mov.b32 	 %r124, %f1080;
	setp.eq.s32	%p60, %r124, 1118925336;
	add.s32 	%r125, %r124, -1;
	mov.b32 	 %f1084, %r125;
	add.f32 	%f1085, %f1083, 0f37000000;
	selp.f32	%f1086, %f1084, %f1080, %p60;
	selp.f32	%f209, %f1085, %f1083, %p60;
	mul.f32 	%f1087, %f1086, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1088, %f1087;
	fma.rn.f32 	%f1090, %f1088, %f1543, %f1086;
	fma.rn.f32 	%f1092, %f1088, %f1544, %f1090;
	mul.f32 	%f1093, %f1092, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1094, %f1093;
	add.f32 	%f1095, %f1088, 0f00000000;
	ex2.approx.f32 	%f1096, %f1095;
	mul.f32 	%f1097, %f1094, %f1096;
	setp.lt.f32	%p61, %f1086, 0fC2D20000;
	selp.f32	%f1098, 0f00000000, %f1097, %p61;
	setp.gt.f32	%p62, %f1086, 0f42D20000;
	selp.f32	%f1611, 0f7F800000, %f1098, %p62;
	setp.eq.f32	%p63, %f1611, 0f7F800000;
	@%p63 bra 	BB0_46;

	fma.rn.f32 	%f1611, %f1611, %f209, %f1611;

BB0_46:
	setp.lt.f32	%p64, %f202, 0f00000000;
	setp.eq.f32	%p65, %f206, 0f3F800000;
	and.pred  	%p4, %p64, %p65;
	mov.b32 	 %r126, %f1611;
	xor.b32  	%r127, %r126, -2147483648;
	mov.b32 	 %f1099, %r127;
	selp.f32	%f1613, %f1099, %f1611, %p4;
	setp.eq.f32	%p66, %f202, 0f00000000;
	@%p66 bra 	BB0_49;
	bra.uni 	BB0_47;

BB0_49:
	add.f32 	%f1101, %f202, %f202;
	mov.b32 	 %r128, %f1101;
	selp.b32	%r129, %r128, 0, %p65;
	or.b32  	%r130, %r129, 2139095040;
	setp.lt.f32	%p70, %f203, 0f00000000;
	selp.b32	%r131, %r130, %r129, %p70;
	mov.b32 	 %f1613, %r131;
	bra.uni 	BB0_50;

BB0_47:
	setp.geu.f32	%p67, %f202, 0f00000000;
	@%p67 bra 	BB0_50;

	cvt.rzi.f32.f32	%f1100, %f203;
	setp.neu.f32	%p68, %f1100, %f203;
	selp.f32	%f1613, 0f7FFFFFFF, %f1613, %p68;

BB0_50:
	add.f32 	%f1102, %f207, %f208;
	mov.b32 	 %r132, %f1102;
	setp.lt.s32	%p71, %r132, 2139095040;
	@%p71 bra 	BB0_57;

	setp.gtu.f32	%p72, %f207, 0f7F800000;
	setp.gtu.f32	%p73, %f208, 0f7F800000;
	or.pred  	%p74, %p72, %p73;
	@%p74 bra 	BB0_56;
	bra.uni 	BB0_52;

BB0_56:
	add.f32 	%f1613, %f203, %f202;
	bra.uni 	BB0_57;

BB0_52:
	setp.eq.f32	%p75, %f208, 0f7F800000;
	@%p75 bra 	BB0_55;
	bra.uni 	BB0_53;

BB0_55:
	setp.gt.f32	%p78, %f207, 0f3F800000;
	selp.b32	%r136, 2139095040, 0, %p78;
	xor.b32  	%r137, %r136, 2139095040;
	setp.lt.f32	%p79, %f203, 0f00000000;
	selp.b32	%r138, %r137, %r136, %p79;
	mov.b32 	 %f1103, %r138;
	setp.eq.f32	%p80, %f202, 0fBF800000;
	selp.f32	%f1613, 0f3F800000, %f1103, %p80;
	bra.uni 	BB0_57;

BB0_53:
	setp.neu.f32	%p76, %f207, 0f7F800000;
	@%p76 bra 	BB0_57;

	setp.ltu.f32	%p77, %f203, 0f00000000;
	selp.b32	%r133, 0, 2139095040, %p77;
	or.b32  	%r134, %r133, -2147483648;
	selp.b32	%r135, %r134, %r133, %p4;
	mov.b32 	 %f1613, %r135;

BB0_57:
	setp.eq.f32	%p81, %f203, 0f00000000;
	setp.eq.f32	%p82, %f202, 0f3F800000;
	or.pred  	%p83, %p82, %p81;
	selp.f32	%f1104, 0f3F800000, %f1613, %p83;
	fma.rn.f32 	%f1105, %f205, %f1104, %f204;
	mul.f32 	%f1106, %f140, %f1105;
	div.rn.f32 	%f1107, %f1106, %f402;
	div.rn.f32 	%f1108, %f1107, %f100;
	cvt.sat.f32.f32	%f1109, %f1108;
	mul.f32 	%f1608, %f1608, %f1109;

BB0_58:
	add.f32 	%f1551, %f1551, %f1608;

BB0_59:
	add.s32 	%r265, %r265, 1;
	setp.lt.u32	%p84, %r265, %r4;
	@%p84 bra 	BB0_5;

BB0_60:
	ld.global.u32 	%r271, [imageEnabled];
	and.b32  	%r139, %r271, 8;
	setp.eq.s32	%p85, %r139, 0;
	@%p85 bra 	BB0_73;

	cvt.sat.f32.f32	%f256, %f1551;
	cvt.u64.u32	%rd46, %r3;
	cvt.u64.u32	%rd45, %r2;
	mov.u64 	%rd49, image_Mask;
	cvta.global.u64 	%rd44, %rd49;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1112, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f1113, %f1112;
	fma.rn.f32 	%f1114, %f1113, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f257, %f1114;
	abs.f32 	%f258, %f256;
	setp.lt.f32	%p86, %f258, 0f00800000;
	mul.f32 	%f1115, %f258, 0f4B800000;
	selp.f32	%f1116, 0fC3170000, 0fC2FE0000, %p86;
	selp.f32	%f1117, %f1115, %f258, %p86;
	mov.b32 	 %r142, %f1117;
	and.b32  	%r143, %r142, 8388607;
	or.b32  	%r144, %r143, 1065353216;
	mov.b32 	 %f1118, %r144;
	shr.u32 	%r145, %r142, 23;
	cvt.rn.f32.u32	%f1119, %r145;
	add.f32 	%f1120, %f1116, %f1119;
	setp.gt.f32	%p87, %f1118, 0f3FB504F3;
	mul.f32 	%f1121, %f1118, 0f3F000000;
	add.f32 	%f1122, %f1120, 0f3F800000;
	selp.f32	%f1123, %f1121, %f1118, %p87;
	selp.f32	%f1124, %f1122, %f1120, %p87;
	add.f32 	%f1125, %f1123, 0fBF800000;
	add.f32 	%f1111, %f1123, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1110,%f1111;
	// inline asm
	add.f32 	%f1126, %f1125, %f1125;
	mul.f32 	%f1127, %f1110, %f1126;
	mul.f32 	%f1128, %f1127, %f1127;
	mov.f32 	%f1129, 0f3C4CAF63;
	mov.f32 	%f1130, 0f3B18F0FE;
	fma.rn.f32 	%f1131, %f1130, %f1128, %f1129;
	mov.f32 	%f1132, 0f3DAAAABD;
	fma.rn.f32 	%f1133, %f1131, %f1128, %f1132;
	mul.rn.f32 	%f1134, %f1133, %f1128;
	mul.rn.f32 	%f1135, %f1134, %f1127;
	sub.f32 	%f1136, %f1125, %f1127;
	neg.f32 	%f1137, %f1127;
	add.f32 	%f1138, %f1136, %f1136;
	fma.rn.f32 	%f1139, %f1137, %f1125, %f1138;
	mul.rn.f32 	%f1140, %f1110, %f1139;
	add.f32 	%f1141, %f1135, %f1127;
	sub.f32 	%f1142, %f1127, %f1141;
	add.f32 	%f1143, %f1135, %f1142;
	add.f32 	%f1144, %f1140, %f1143;
	add.f32 	%f1145, %f1141, %f1144;
	sub.f32 	%f1146, %f1141, %f1145;
	add.f32 	%f1147, %f1144, %f1146;
	mov.f32 	%f1148, 0f3F317200;
	mul.rn.f32 	%f1149, %f1124, %f1148;
	mov.f32 	%f1150, 0f35BFBE8E;
	mul.rn.f32 	%f1151, %f1124, %f1150;
	add.f32 	%f1152, %f1149, %f1145;
	sub.f32 	%f1153, %f1149, %f1152;
	add.f32 	%f1154, %f1145, %f1153;
	add.f32 	%f1155, %f1147, %f1154;
	add.f32 	%f1156, %f1151, %f1155;
	add.f32 	%f1157, %f1152, %f1156;
	sub.f32 	%f1158, %f1152, %f1157;
	add.f32 	%f1159, %f1156, %f1158;
	mov.f32 	%f1160, 0f3EE8BA2E;
	mul.rn.f32 	%f1161, %f1160, %f1157;
	neg.f32 	%f1162, %f1161;
	fma.rn.f32 	%f1163, %f1160, %f1157, %f1162;
	fma.rn.f32 	%f1164, %f1160, %f1159, %f1163;
	mov.f32 	%f1165, 0f00000000;
	fma.rn.f32 	%f1166, %f1165, %f1157, %f1164;
	add.rn.f32 	%f1167, %f1161, %f1166;
	neg.f32 	%f1168, %f1167;
	add.rn.f32 	%f1169, %f1161, %f1168;
	add.rn.f32 	%f1170, %f1169, %f1166;
	mov.b32 	 %r146, %f1167;
	setp.eq.s32	%p88, %r146, 1118925336;
	add.s32 	%r147, %r146, -1;
	mov.b32 	 %f1171, %r147;
	add.f32 	%f1172, %f1170, 0f37000000;
	selp.f32	%f1173, %f1171, %f1167, %p88;
	selp.f32	%f259, %f1172, %f1170, %p88;
	mul.f32 	%f1174, %f1173, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1175, %f1174;
	mov.f32 	%f1176, 0fBF317200;
	fma.rn.f32 	%f1177, %f1175, %f1176, %f1173;
	mov.f32 	%f1178, 0fB5BFBE8E;
	fma.rn.f32 	%f1179, %f1175, %f1178, %f1177;
	mul.f32 	%f1180, %f1179, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1181, %f1180;
	add.f32 	%f1182, %f1175, 0f00000000;
	ex2.approx.f32 	%f1183, %f1182;
	mul.f32 	%f1184, %f1181, %f1183;
	setp.lt.f32	%p89, %f1173, 0fC2D20000;
	selp.f32	%f1185, 0f00000000, %f1184, %p89;
	setp.gt.f32	%p90, %f1173, 0f42D20000;
	selp.f32	%f1647, 0f7F800000, %f1185, %p90;
	setp.eq.f32	%p91, %f1647, 0f7F800000;
	@%p91 bra 	BB0_63;

	fma.rn.f32 	%f1647, %f1647, %f259, %f1647;

BB0_63:
	setp.lt.f32	%p92, %f256, 0f00000000;
	setp.eq.f32	%p93, %f257, 0f3F800000;
	and.pred  	%p5, %p92, %p93;
	mov.b32 	 %r148, %f1647;
	xor.b32  	%r149, %r148, -2147483648;
	mov.b32 	 %f1186, %r149;
	selp.f32	%f1649, %f1186, %f1647, %p5;
	setp.eq.f32	%p94, %f256, 0f00000000;
	@%p94 bra 	BB0_66;
	bra.uni 	BB0_64;

BB0_66:
	add.f32 	%f1189, %f256, %f256;
	selp.f32	%f1649, %f1189, 0f00000000, %p93;
	bra.uni 	BB0_67;

BB0_131:
	mov.u64 	%rd190, image_HDR;
	cvta.global.u64 	%rd185, %rd190;
	mov.u32 	%r235, 8;
	// inline asm
	call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r235, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1509, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs107, %f1509;}

	// inline asm
	mov.u16 	%rs108, 0;
	st.v4.u16 	[%rd184], {%rs107, %rs107, %rs107, %rs108};

BB0_132:
	ld.global.u32 	%r236, [additive];
	setp.eq.s32	%p161, %r236, 0;
	@%p161 bra 	BB0_134;

	mov.u64 	%rd203, image_RNM0;
	cvta.global.u64 	%rd192, %rd203;
	mov.u32 	%r240, 8;
	// inline asm
	call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r240, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs115, %rs116, %rs117, %rs118}, [%rd191];
	// inline asm
	{  cvt.f32.f16 %f1510, %rs115;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1511, %rs116;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1512, %rs117;}

	// inline asm
	// inline asm
	call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r240, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1513, %f1510, 0f00000000;
	add.f32 	%f1514, %f1511, 0f00000000;
	add.f32 	%f1515, %f1512, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs114, %f1515;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs113, %f1514;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs112, %f1513;}

	// inline asm
	mov.u16 	%rs119, 0;
	st.v4.u16 	[%rd197], {%rs112, %rs113, %rs114, %rs119};
	bra.uni 	BB0_135;

BB0_134:
	mov.u64 	%rd210, image_RNM0;
	cvta.global.u64 	%rd205, %rd210;
	mov.u32 	%r242, 8;
	// inline asm
	call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r242, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1516, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs120, %f1516;}

	// inline asm
	mov.u16 	%rs121, 0;
	st.v4.u16 	[%rd204], {%rs120, %rs120, %rs120, %rs121};

BB0_135:
	ld.global.u32 	%r243, [additive];
	setp.eq.s32	%p162, %r243, 0;
	@%p162 bra 	BB0_137;

	mov.u64 	%rd223, image_RNM1;
	cvta.global.u64 	%rd212, %rd223;
	mov.u32 	%r247, 8;
	// inline asm
	call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r247, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs128, %rs129, %rs130, %rs131}, [%rd211];
	// inline asm
	{  cvt.f32.f16 %f1517, %rs128;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1518, %rs129;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1519, %rs130;}

	// inline asm
	// inline asm
	call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r247, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1520, %f1517, 0f00000000;
	add.f32 	%f1521, %f1518, 0f00000000;
	add.f32 	%f1522, %f1519, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs127, %f1522;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs126, %f1521;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs125, %f1520;}

	// inline asm
	mov.u16 	%rs132, 0;
	st.v4.u16 	[%rd217], {%rs125, %rs126, %rs127, %rs132};
	bra.uni 	BB0_138;

BB0_137:
	mov.u64 	%rd230, image_RNM1;
	cvta.global.u64 	%rd225, %rd230;
	mov.u32 	%r249, 8;
	// inline asm
	call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r249, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1523, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs133, %f1523;}

	// inline asm
	mov.u16 	%rs134, 0;
	st.v4.u16 	[%rd224], {%rs133, %rs133, %rs133, %rs134};

BB0_138:
	ld.global.u32 	%r250, [additive];
	setp.eq.s32	%p163, %r250, 0;
	@%p163 bra 	BB0_140;

	mov.u64 	%rd243, image_RNM2;
	cvta.global.u64 	%rd232, %rd243;
	mov.u32 	%r254, 8;
	// inline asm
	call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r254, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs141, %rs142, %rs143, %rs144}, [%rd231];
	// inline asm
	{  cvt.f32.f16 %f1524, %rs141;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1525, %rs142;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1526, %rs143;}

	// inline asm
	// inline asm
	call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r254, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1527, %f1524, 0f00000000;
	add.f32 	%f1528, %f1525, 0f00000000;
	add.f32 	%f1529, %f1526, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs140, %f1529;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs139, %f1528;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs138, %f1527;}

	// inline asm
	mov.u16 	%rs145, 0;
	st.v4.u16 	[%rd237], {%rs138, %rs139, %rs140, %rs145};
	bra.uni 	BB0_141;

BB0_140:
	mov.u64 	%rd250, image_RNM2;
	cvta.global.u64 	%rd245, %rd250;
	mov.u32 	%r256, 8;
	// inline asm
	call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r256, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1530, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs146, %f1530;}

	// inline asm
	mov.u16 	%rs147, 0;
	st.v4.u16 	[%rd244], {%rs146, %rs146, %rs146, %rs147};

BB0_141:
	ld.global.u32 	%r257, [additive];
	setp.eq.s32	%p164, %r257, 0;
	@%p164 bra 	BB0_143;

	mov.u64 	%rd263, image_RNM3;
	cvta.global.u64 	%rd252, %rd263;
	mov.u32 	%r261, 8;
	// inline asm
	call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r261, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs154, %rs155, %rs156, %rs157}, [%rd251];
	// inline asm
	{  cvt.f32.f16 %f1531, %rs154;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1532, %rs155;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1533, %rs156;}

	// inline asm
	// inline asm
	call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r261, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1534, %f1531, 0f00000000;
	add.f32 	%f1535, %f1532, 0f00000000;
	add.f32 	%f1536, %f1533, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs153, %f1536;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs152, %f1535;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs151, %f1534;}

	// inline asm
	mov.u16 	%rs158, 0;
	st.v4.u16 	[%rd257], {%rs151, %rs152, %rs153, %rs158};
	bra.uni 	BB0_144;

BB0_143:
	mov.u64 	%rd270, image_RNM3;
	cvta.global.u64 	%rd265, %rd270;
	mov.u32 	%r263, 8;
	// inline asm
	call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r263, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1537, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs159, %f1537;}

	// inline asm
	mov.u16 	%rs160, 0;
	st.v4.u16 	[%rd264], {%rs159, %rs159, %rs159, %rs160};
	bra.uni 	BB0_144;

BB0_64:
	setp.geu.f32	%p95, %f256, 0f00000000;
	@%p95 bra 	BB0_67;

	cvt.rzi.f32.f32	%f1188, %f1160;
	setp.neu.f32	%p96, %f1188, 0f3EE8BA2E;
	selp.f32	%f1649, 0f7FFFFFFF, %f1649, %p96;

BB0_67:
	add.f32 	%f1190, %f258, 0f3EE8BA2E;
	mov.b32 	 %r150, %f1190;
	setp.lt.s32	%p98, %r150, 2139095040;
	@%p98 bra 	BB0_72;

	setp.gtu.f32	%p99, %f258, 0f7F800000;
	@%p99 bra 	BB0_71;
	bra.uni 	BB0_69;

BB0_71:
	add.f32 	%f1649, %f256, 0f3EE8BA2E;
	bra.uni 	BB0_72;

BB0_69:
	setp.neu.f32	%p100, %f258, 0f7F800000;
	@%p100 bra 	BB0_72;

	selp.f32	%f1649, 0fFF800000, 0f7F800000, %p5;

BB0_72:
	mul.f32 	%f1191, %f1649, 0f437F0000;
	setp.eq.f32	%p101, %f256, 0f3F800000;
	selp.f32	%f1192, 0f437F0000, %f1191, %p101;
	cvt.rzi.u32.f32	%r151, %f1192;
	cvt.u16.u32	%rs17, %r151;
	mov.u16 	%rs18, 255;
	st.v2.u8 	[%rd43], {%rs17, %rs18};
	ld.global.u32 	%r271, [imageEnabled];

BB0_73:
	and.b32  	%r152, %r271, 1;
	setp.eq.b32	%p102, %r152, 1;
	@!%p102 bra 	BB0_108;
	bra.uni 	BB0_74;

BB0_74:
	mov.f32 	%f1195, 0f3E666666;
	cvt.rzi.f32.f32	%f1196, %f1195;
	fma.rn.f32 	%f1197, %f1196, 0fC0000000, 0f3EE66666;
	abs.f32 	%f270, %f1197;
	abs.f32 	%f271, %f1566;
	setp.lt.f32	%p103, %f271, 0f00800000;
	mul.f32 	%f1198, %f271, 0f4B800000;
	selp.f32	%f1199, 0fC3170000, 0fC2FE0000, %p103;
	selp.f32	%f1200, %f1198, %f271, %p103;
	mov.b32 	 %r153, %f1200;
	and.b32  	%r154, %r153, 8388607;
	or.b32  	%r155, %r154, 1065353216;
	mov.b32 	 %f1201, %r155;
	shr.u32 	%r156, %r153, 23;
	cvt.rn.f32.u32	%f1202, %r156;
	add.f32 	%f1203, %f1199, %f1202;
	setp.gt.f32	%p104, %f1201, 0f3FB504F3;
	mul.f32 	%f1204, %f1201, 0f3F000000;
	add.f32 	%f1205, %f1203, 0f3F800000;
	selp.f32	%f1206, %f1204, %f1201, %p104;
	selp.f32	%f1207, %f1205, %f1203, %p104;
	add.f32 	%f1208, %f1206, 0fBF800000;
	add.f32 	%f1194, %f1206, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1193,%f1194;
	// inline asm
	add.f32 	%f1209, %f1208, %f1208;
	mul.f32 	%f1210, %f1193, %f1209;
	mul.f32 	%f1211, %f1210, %f1210;
	mov.f32 	%f1212, 0f3C4CAF63;
	mov.f32 	%f1213, 0f3B18F0FE;
	fma.rn.f32 	%f1214, %f1213, %f1211, %f1212;
	mov.f32 	%f1215, 0f3DAAAABD;
	fma.rn.f32 	%f1216, %f1214, %f1211, %f1215;
	mul.rn.f32 	%f1217, %f1216, %f1211;
	mul.rn.f32 	%f1218, %f1217, %f1210;
	sub.f32 	%f1219, %f1208, %f1210;
	neg.f32 	%f1220, %f1210;
	add.f32 	%f1221, %f1219, %f1219;
	fma.rn.f32 	%f1222, %f1220, %f1208, %f1221;
	mul.rn.f32 	%f1223, %f1193, %f1222;
	add.f32 	%f1224, %f1218, %f1210;
	sub.f32 	%f1225, %f1210, %f1224;
	add.f32 	%f1226, %f1218, %f1225;
	add.f32 	%f1227, %f1223, %f1226;
	add.f32 	%f1228, %f1224, %f1227;
	sub.f32 	%f1229, %f1224, %f1228;
	add.f32 	%f1230, %f1227, %f1229;
	mov.f32 	%f1231, 0f3F317200;
	mul.rn.f32 	%f1232, %f1207, %f1231;
	mov.f32 	%f1233, 0f35BFBE8E;
	mul.rn.f32 	%f1234, %f1207, %f1233;
	add.f32 	%f1235, %f1232, %f1228;
	sub.f32 	%f1236, %f1232, %f1235;
	add.f32 	%f1237, %f1228, %f1236;
	add.f32 	%f1238, %f1230, %f1237;
	add.f32 	%f1239, %f1234, %f1238;
	add.f32 	%f1240, %f1235, %f1239;
	sub.f32 	%f1241, %f1235, %f1240;
	add.f32 	%f1242, %f1239, %f1241;
	mov.f32 	%f1243, 0f3EE66666;
	mul.rn.f32 	%f1244, %f1243, %f1240;
	neg.f32 	%f1245, %f1244;
	fma.rn.f32 	%f1246, %f1243, %f1240, %f1245;
	fma.rn.f32 	%f1247, %f1243, %f1242, %f1246;
	mov.f32 	%f1248, 0f00000000;
	fma.rn.f32 	%f1249, %f1248, %f1240, %f1247;
	add.rn.f32 	%f1250, %f1244, %f1249;
	neg.f32 	%f1251, %f1250;
	add.rn.f32 	%f1252, %f1244, %f1251;
	add.rn.f32 	%f1253, %f1252, %f1249;
	mov.b32 	 %r157, %f1250;
	setp.eq.s32	%p105, %r157, 1118925336;
	add.s32 	%r158, %r157, -1;
	mov.b32 	 %f1254, %r158;
	add.f32 	%f1255, %f1253, 0f37000000;
	selp.f32	%f1256, %f1254, %f1250, %p105;
	selp.f32	%f272, %f1255, %f1253, %p105;
	mul.f32 	%f1257, %f1256, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1258, %f1257;
	mov.f32 	%f1259, 0fBF317200;
	fma.rn.f32 	%f1260, %f1258, %f1259, %f1256;
	mov.f32 	%f1261, 0fB5BFBE8E;
	fma.rn.f32 	%f1262, %f1258, %f1261, %f1260;
	mul.f32 	%f1263, %f1262, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1264, %f1263;
	add.f32 	%f1265, %f1258, 0f00000000;
	ex2.approx.f32 	%f1266, %f1265;
	mul.f32 	%f1267, %f1264, %f1266;
	setp.lt.f32	%p106, %f1256, 0fC2D20000;
	selp.f32	%f1268, 0f00000000, %f1267, %p106;
	setp.gt.f32	%p107, %f1256, 0f42D20000;
	selp.f32	%f1650, 0f7F800000, %f1268, %p107;
	setp.eq.f32	%p108, %f1650, 0f7F800000;
	@%p108 bra 	BB0_76;

	fma.rn.f32 	%f1650, %f1650, %f272, %f1650;

BB0_76:
	setp.lt.f32	%p109, %f1566, 0f00000000;
	setp.eq.f32	%p110, %f270, 0f3F800000;
	and.pred  	%p6, %p109, %p110;
	mov.b32 	 %r159, %f1650;
	xor.b32  	%r160, %r159, -2147483648;
	mov.b32 	 %f1269, %r160;
	selp.f32	%f1652, %f1269, %f1650, %p6;
	setp.eq.f32	%p111, %f1566, 0f00000000;
	@%p111 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f1272, %f1566, %f1566;
	selp.f32	%f1652, %f1272, 0f00000000, %p110;
	bra.uni 	BB0_80;

BB0_77:
	setp.geu.f32	%p112, %f1566, 0f00000000;
	@%p112 bra 	BB0_80;

	cvt.rzi.f32.f32	%f1271, %f1243;
	setp.neu.f32	%p113, %f1271, 0f3EE66666;
	selp.f32	%f1652, 0f7FFFFFFF, %f1652, %p113;

BB0_80:
	add.f32 	%f1273, %f271, 0f3EE66666;
	mov.b32 	 %r161, %f1273;
	setp.lt.s32	%p115, %r161, 2139095040;
	@%p115 bra 	BB0_85;

	setp.gtu.f32	%p116, %f271, 0f7F800000;
	@%p116 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f1652, %f1566, 0f3EE66666;
	bra.uni 	BB0_85;

BB0_82:
	setp.neu.f32	%p117, %f271, 0f7F800000;
	@%p117 bra 	BB0_85;

	selp.f32	%f1652, 0fFF800000, 0f7F800000, %p6;

BB0_85:
	setp.eq.f32	%p118, %f1566, 0f3F800000;
	selp.f32	%f283, 0f3F800000, %f1652, %p118;
	abs.f32 	%f284, %f1565;
	setp.lt.f32	%p119, %f284, 0f00800000;
	mul.f32 	%f1276, %f284, 0f4B800000;
	selp.f32	%f1277, 0fC3170000, 0fC2FE0000, %p119;
	selp.f32	%f1278, %f1276, %f284, %p119;
	mov.b32 	 %r162, %f1278;
	and.b32  	%r163, %r162, 8388607;
	or.b32  	%r164, %r163, 1065353216;
	mov.b32 	 %f1279, %r164;
	shr.u32 	%r165, %r162, 23;
	cvt.rn.f32.u32	%f1280, %r165;
	add.f32 	%f1281, %f1277, %f1280;
	setp.gt.f32	%p120, %f1279, 0f3FB504F3;
	mul.f32 	%f1282, %f1279, 0f3F000000;
	add.f32 	%f1283, %f1281, 0f3F800000;
	selp.f32	%f1284, %f1282, %f1279, %p120;
	selp.f32	%f1285, %f1283, %f1281, %p120;
	add.f32 	%f1286, %f1284, 0fBF800000;
	add.f32 	%f1275, %f1284, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1274,%f1275;
	// inline asm
	add.f32 	%f1287, %f1286, %f1286;
	mul.f32 	%f1288, %f1274, %f1287;
	mul.f32 	%f1289, %f1288, %f1288;
	fma.rn.f32 	%f1292, %f1213, %f1289, %f1212;
	fma.rn.f32 	%f1294, %f1292, %f1289, %f1215;
	mul.rn.f32 	%f1295, %f1294, %f1289;
	mul.rn.f32 	%f1296, %f1295, %f1288;
	sub.f32 	%f1297, %f1286, %f1288;
	neg.f32 	%f1298, %f1288;
	add.f32 	%f1299, %f1297, %f1297;
	fma.rn.f32 	%f1300, %f1298, %f1286, %f1299;
	mul.rn.f32 	%f1301, %f1274, %f1300;
	add.f32 	%f1302, %f1296, %f1288;
	sub.f32 	%f1303, %f1288, %f1302;
	add.f32 	%f1304, %f1296, %f1303;
	add.f32 	%f1305, %f1301, %f1304;
	add.f32 	%f1306, %f1302, %f1305;
	sub.f32 	%f1307, %f1302, %f1306;
	add.f32 	%f1308, %f1305, %f1307;
	mul.rn.f32 	%f1310, %f1285, %f1231;
	mul.rn.f32 	%f1312, %f1285, %f1233;
	add.f32 	%f1313, %f1310, %f1306;
	sub.f32 	%f1314, %f1310, %f1313;
	add.f32 	%f1315, %f1306, %f1314;
	add.f32 	%f1316, %f1308, %f1315;
	add.f32 	%f1317, %f1312, %f1316;
	add.f32 	%f1318, %f1313, %f1317;
	sub.f32 	%f1319, %f1313, %f1318;
	add.f32 	%f1320, %f1317, %f1319;
	mul.rn.f32 	%f1322, %f1243, %f1318;
	neg.f32 	%f1323, %f1322;
	fma.rn.f32 	%f1324, %f1243, %f1318, %f1323;
	fma.rn.f32 	%f1325, %f1243, %f1320, %f1324;
	fma.rn.f32 	%f1327, %f1248, %f1318, %f1325;
	add.rn.f32 	%f1328, %f1322, %f1327;
	neg.f32 	%f1329, %f1328;
	add.rn.f32 	%f1330, %f1322, %f1329;
	add.rn.f32 	%f1331, %f1330, %f1327;
	mov.b32 	 %r166, %f1328;
	setp.eq.s32	%p121, %r166, 1118925336;
	add.s32 	%r167, %r166, -1;
	mov.b32 	 %f1332, %r167;
	add.f32 	%f1333, %f1331, 0f37000000;
	selp.f32	%f1334, %f1332, %f1328, %p121;
	selp.f32	%f285, %f1333, %f1331, %p121;
	mul.f32 	%f1335, %f1334, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1336, %f1335;
	fma.rn.f32 	%f1338, %f1336, %f1259, %f1334;
	fma.rn.f32 	%f1340, %f1336, %f1261, %f1338;
	mul.f32 	%f1341, %f1340, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1342, %f1341;
	add.f32 	%f1343, %f1336, 0f00000000;
	ex2.approx.f32 	%f1344, %f1343;
	mul.f32 	%f1345, %f1342, %f1344;
	setp.lt.f32	%p122, %f1334, 0fC2D20000;
	selp.f32	%f1346, 0f00000000, %f1345, %p122;
	setp.gt.f32	%p123, %f1334, 0f42D20000;
	selp.f32	%f1653, 0f7F800000, %f1346, %p123;
	setp.eq.f32	%p124, %f1653, 0f7F800000;
	@%p124 bra 	BB0_87;

	fma.rn.f32 	%f1653, %f1653, %f285, %f1653;

BB0_87:
	setp.lt.f32	%p125, %f1565, 0f00000000;
	and.pred  	%p7, %p125, %p110;
	mov.b32 	 %r168, %f1653;
	xor.b32  	%r169, %r168, -2147483648;
	mov.b32 	 %f1347, %r169;
	selp.f32	%f1655, %f1347, %f1653, %p7;
	setp.eq.f32	%p127, %f1565, 0f00000000;
	@%p127 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f1350, %f1565, %f1565;
	selp.f32	%f1655, %f1350, 0f00000000, %p110;
	bra.uni 	BB0_91;

BB0_88:
	setp.geu.f32	%p128, %f1565, 0f00000000;
	@%p128 bra 	BB0_91;

	cvt.rzi.f32.f32	%f1349, %f1243;
	setp.neu.f32	%p129, %f1349, 0f3EE66666;
	selp.f32	%f1655, 0f7FFFFFFF, %f1655, %p129;

BB0_91:
	add.f32 	%f1351, %f284, 0f3EE66666;
	mov.b32 	 %r170, %f1351;
	setp.lt.s32	%p131, %r170, 2139095040;
	@%p131 bra 	BB0_96;

	setp.gtu.f32	%p132, %f284, 0f7F800000;
	@%p132 bra 	BB0_95;
	bra.uni 	BB0_93;

BB0_95:
	add.f32 	%f1655, %f1565, 0f3EE66666;
	bra.uni 	BB0_96;

BB0_93:
	setp.neu.f32	%p133, %f284, 0f7F800000;
	@%p133 bra 	BB0_96;

	selp.f32	%f1655, 0fFF800000, 0f7F800000, %p7;

BB0_96:
	setp.eq.f32	%p134, %f1565, 0f3F800000;
	selp.f32	%f296, 0f3F800000, %f1655, %p134;
	abs.f32 	%f297, %f1564;
	setp.lt.f32	%p135, %f297, 0f00800000;
	mul.f32 	%f1354, %f297, 0f4B800000;
	selp.f32	%f1355, 0fC3170000, 0fC2FE0000, %p135;
	selp.f32	%f1356, %f1354, %f297, %p135;
	mov.b32 	 %r171, %f1356;
	and.b32  	%r172, %r171, 8388607;
	or.b32  	%r173, %r172, 1065353216;
	mov.b32 	 %f1357, %r173;
	shr.u32 	%r174, %r171, 23;
	cvt.rn.f32.u32	%f1358, %r174;
	add.f32 	%f1359, %f1355, %f1358;
	setp.gt.f32	%p136, %f1357, 0f3FB504F3;
	mul.f32 	%f1360, %f1357, 0f3F000000;
	add.f32 	%f1361, %f1359, 0f3F800000;
	selp.f32	%f1362, %f1360, %f1357, %p136;
	selp.f32	%f1363, %f1361, %f1359, %p136;
	add.f32 	%f1364, %f1362, 0fBF800000;
	add.f32 	%f1353, %f1362, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1352,%f1353;
	// inline asm
	add.f32 	%f1365, %f1364, %f1364;
	mul.f32 	%f1366, %f1352, %f1365;
	mul.f32 	%f1367, %f1366, %f1366;
	fma.rn.f32 	%f1370, %f1213, %f1367, %f1212;
	fma.rn.f32 	%f1372, %f1370, %f1367, %f1215;
	mul.rn.f32 	%f1373, %f1372, %f1367;
	mul.rn.f32 	%f1374, %f1373, %f1366;
	sub.f32 	%f1375, %f1364, %f1366;
	neg.f32 	%f1376, %f1366;
	add.f32 	%f1377, %f1375, %f1375;
	fma.rn.f32 	%f1378, %f1376, %f1364, %f1377;
	mul.rn.f32 	%f1379, %f1352, %f1378;
	add.f32 	%f1380, %f1374, %f1366;
	sub.f32 	%f1381, %f1366, %f1380;
	add.f32 	%f1382, %f1374, %f1381;
	add.f32 	%f1383, %f1379, %f1382;
	add.f32 	%f1384, %f1380, %f1383;
	sub.f32 	%f1385, %f1380, %f1384;
	add.f32 	%f1386, %f1383, %f1385;
	mul.rn.f32 	%f1388, %f1363, %f1231;
	mul.rn.f32 	%f1390, %f1363, %f1233;
	add.f32 	%f1391, %f1388, %f1384;
	sub.f32 	%f1392, %f1388, %f1391;
	add.f32 	%f1393, %f1384, %f1392;
	add.f32 	%f1394, %f1386, %f1393;
	add.f32 	%f1395, %f1390, %f1394;
	add.f32 	%f1396, %f1391, %f1395;
	sub.f32 	%f1397, %f1391, %f1396;
	add.f32 	%f1398, %f1395, %f1397;
	mul.rn.f32 	%f1400, %f1243, %f1396;
	neg.f32 	%f1401, %f1400;
	fma.rn.f32 	%f1402, %f1243, %f1396, %f1401;
	fma.rn.f32 	%f1403, %f1243, %f1398, %f1402;
	fma.rn.f32 	%f1405, %f1248, %f1396, %f1403;
	add.rn.f32 	%f1406, %f1400, %f1405;
	neg.f32 	%f1407, %f1406;
	add.rn.f32 	%f1408, %f1400, %f1407;
	add.rn.f32 	%f1409, %f1408, %f1405;
	mov.b32 	 %r175, %f1406;
	setp.eq.s32	%p137, %r175, 1118925336;
	add.s32 	%r176, %r175, -1;
	mov.b32 	 %f1410, %r176;
	add.f32 	%f1411, %f1409, 0f37000000;
	selp.f32	%f1412, %f1410, %f1406, %p137;
	selp.f32	%f298, %f1411, %f1409, %p137;
	mul.f32 	%f1413, %f1412, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1414, %f1413;
	fma.rn.f32 	%f1416, %f1414, %f1259, %f1412;
	fma.rn.f32 	%f1418, %f1414, %f1261, %f1416;
	mul.f32 	%f1419, %f1418, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1420, %f1419;
	add.f32 	%f1421, %f1414, 0f00000000;
	ex2.approx.f32 	%f1422, %f1421;
	mul.f32 	%f1423, %f1420, %f1422;
	setp.lt.f32	%p138, %f1412, 0fC2D20000;
	selp.f32	%f1424, 0f00000000, %f1423, %p138;
	setp.gt.f32	%p139, %f1412, 0f42D20000;
	selp.f32	%f1656, 0f7F800000, %f1424, %p139;
	setp.eq.f32	%p140, %f1656, 0f7F800000;
	@%p140 bra 	BB0_98;

	fma.rn.f32 	%f1656, %f1656, %f298, %f1656;

BB0_98:
	setp.lt.f32	%p141, %f1564, 0f00000000;
	and.pred  	%p8, %p141, %p110;
	mov.b32 	 %r177, %f1656;
	xor.b32  	%r178, %r177, -2147483648;
	mov.b32 	 %f1425, %r178;
	selp.f32	%f1658, %f1425, %f1656, %p8;
	setp.eq.f32	%p143, %f1564, 0f00000000;
	@%p143 bra 	BB0_101;
	bra.uni 	BB0_99;

BB0_101:
	add.f32 	%f1428, %f1564, %f1564;
	selp.f32	%f1658, %f1428, 0f00000000, %p110;
	bra.uni 	BB0_102;

BB0_99:
	setp.geu.f32	%p144, %f1564, 0f00000000;
	@%p144 bra 	BB0_102;

	cvt.rzi.f32.f32	%f1427, %f1243;
	setp.neu.f32	%p145, %f1427, 0f3EE66666;
	selp.f32	%f1658, 0f7FFFFFFF, %f1658, %p145;

BB0_102:
	add.f32 	%f1429, %f297, 0f3EE66666;
	mov.b32 	 %r179, %f1429;
	setp.lt.s32	%p147, %r179, 2139095040;
	@%p147 bra 	BB0_107;

	setp.gtu.f32	%p148, %f297, 0f7F800000;
	@%p148 bra 	BB0_106;
	bra.uni 	BB0_104;

BB0_106:
	add.f32 	%f1658, %f1564, 0f3EE66666;
	bra.uni 	BB0_107;

BB0_104:
	setp.neu.f32	%p149, %f297, 0f7F800000;
	@%p149 bra 	BB0_107;

	selp.f32	%f1658, 0fFF800000, 0f7F800000, %p8;

BB0_107:
	mov.u32 	%r264, 4;
	setp.eq.f32	%p150, %f1564, 0f3F800000;
	selp.f32	%f1430, 0f3F800000, %f1658, %p150;
	cvt.u64.u32	%rd53, %r3;
	cvt.u64.u32	%rd52, %r2;
	mov.u64 	%rd56, image;
	cvta.global.u64 	%rd51, %rd56;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r264, %rd52, %rd53, %rd13, %rd13);
	// inline asm
	cvt.sat.f32.f32	%f1431, %f1430;
	mul.f32 	%f1432, %f1431, 0f437FFD71;
	cvt.rzi.u32.f32	%r182, %f1432;
	cvt.sat.f32.f32	%f1433, %f296;
	mul.f32 	%f1434, %f1433, 0f437FFD71;
	cvt.rzi.u32.f32	%r183, %f1434;
	cvt.sat.f32.f32	%f1435, %f283;
	mul.f32 	%f1436, %f1435, 0f437FFD71;
	cvt.rzi.u32.f32	%r184, %f1436;
	cvt.u16.u32	%rs19, %r182;
	cvt.u16.u32	%rs20, %r184;
	cvt.u16.u32	%rs21, %r183;
	mov.u16 	%rs22, 255;
	st.v4.u8 	[%rd50], {%rs19, %rs21, %rs20, %rs22};
	ld.global.u32 	%r271, [imageEnabled];

BB0_108:
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	and.b32  	%r185, %r271, 4;
	setp.eq.s32	%p151, %r185, 0;
	@%p151 bra 	BB0_112;

	ld.global.u32 	%r186, [additive];
	setp.eq.s32	%p152, %r186, 0;
	mov.f32 	%f1437, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f1437;}

	// inline asm
	@%p152 bra 	BB0_111;

	mov.u64 	%rd69, image_HDR;
	cvta.global.u64 	%rd58, %rd69;
	mov.u32 	%r190, 8;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r190, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd57];
	// inline asm
	{  cvt.f32.f16 %f1438, %rs30;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1439, %rs31;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1440, %rs32;}

	// inline asm
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r190, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1441, %f1566, %f1438;
	add.f32 	%f1442, %f1565, %f1439;
	add.f32 	%f1443, %f1564, %f1440;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f1443;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f1442;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f1441;}

	// inline asm
	st.v4.u16 	[%rd63], {%rs27, %rs28, %rs29, %rs23};
	bra.uni 	BB0_112;

BB0_111:
	mov.u64 	%rd76, image_HDR;
	cvta.global.u64 	%rd71, %rd76;
	mov.u32 	%r192, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r192, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f1564;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs35, %f1565;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f1566;}

	// inline asm
	st.v4.u16 	[%rd70], {%rs34, %rs35, %rs36, %rs23};

BB0_112:
	mov.f32 	%f1448, 0f34000000;
	max.f32 	%f1449, %f1563, %f1448;
	div.rn.f32 	%f1450, %f1560, %f1449;
	max.f32 	%f1451, %f1562, %f1448;
	div.rn.f32 	%f1452, %f1559, %f1451;
	max.f32 	%f1453, %f1561, %f1448;
	div.rn.f32 	%f1454, %f1558, %f1453;
	fma.rn.f32 	%f309, %f1450, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f310, %f1452, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f311, %f1454, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f1455, %f1557, %f1449;
	div.rn.f32 	%f1456, %f1556, %f1451;
	div.rn.f32 	%f1457, %f1555, %f1453;
	fma.rn.f32 	%f312, %f1455, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f313, %f1456, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f314, %f1457, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f1458, %f1554, %f1449;
	div.rn.f32 	%f1459, %f1553, %f1451;
	div.rn.f32 	%f1460, %f1552, %f1453;
	fma.rn.f32 	%f315, %f1458, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f316, %f1459, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f317, %f1460, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r193, [additive];
	setp.eq.s32	%p153, %r193, 0;
	mov.f32 	%f1447, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs37, %f1447;}

	// inline asm
	@%p153 bra 	BB0_114;

	mov.u64 	%rd89, image_RNM0;
	cvta.global.u64 	%rd78, %rd89;
	mov.u32 	%r197, 8;
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r197, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs44, %rs45, %rs46, %rs47}, [%rd77];
	// inline asm
	{  cvt.f32.f16 %f1461, %rs44;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1462, %rs45;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1463, %rs46;}

	// inline asm
	// inline asm
	call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r197, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1464, %f1563, %f1461;
	add.f32 	%f1465, %f1562, %f1462;
	add.f32 	%f1466, %f1561, %f1463;
	// inline asm
	{  cvt.rn.f16.f32 %rs43, %f1466;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs42, %f1465;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs41, %f1464;}

	// inline asm
	st.v4.u16 	[%rd83], {%rs41, %rs42, %rs43, %rs37};
	bra.uni 	BB0_115;

BB0_114:
	mov.u64 	%rd96, image_RNM0;
	cvta.global.u64 	%rd91, %rd96;
	mov.u32 	%r199, 8;
	// inline asm
	call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r199, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f1561;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs49, %f1562;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs48, %f1563;}

	// inline asm
	st.v4.u16 	[%rd90], {%rs48, %rs49, %rs50, %rs37};

BB0_115:
	ld.global.u32 	%r200, [additive];
	setp.eq.s32	%p154, %r200, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1447;}

	// inline asm
	@%p154 bra 	BB0_117;

	mov.u64 	%rd109, image_RNM1;
	cvta.global.u64 	%rd98, %rd109;
	mov.u32 	%r204, 8;
	// inline asm
	call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r204, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs58, %rs59, %rs60, %rs61}, [%rd97];
	// inline asm
	{  cvt.f32.f16 %f1471, %rs58;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1472, %rs59;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1473, %rs60;}

	// inline asm
	// inline asm
	call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r204, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1474, %f309, %f1471;
	add.f32 	%f1475, %f310, %f1472;
	add.f32 	%f1476, %f311, %f1473;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f1476;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs56, %f1475;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs55, %f1474;}

	// inline asm
	st.v4.u16 	[%rd103], {%rs55, %rs56, %rs57, %rs51};
	bra.uni 	BB0_118;

BB0_117:
	mov.u64 	%rd116, image_RNM1;
	cvta.global.u64 	%rd111, %rd116;
	mov.u32 	%r206, 8;
	// inline asm
	call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r206, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f311;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs63, %f310;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs62, %f309;}

	// inline asm
	st.v4.u16 	[%rd110], {%rs62, %rs63, %rs64, %rs51};

BB0_118:
	ld.global.u32 	%r207, [additive];
	setp.eq.s32	%p155, %r207, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f1447;}

	// inline asm
	@%p155 bra 	BB0_120;

	mov.u64 	%rd129, image_RNM2;
	cvta.global.u64 	%rd118, %rd129;
	mov.u32 	%r211, 8;
	// inline asm
	call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r211, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs72, %rs73, %rs74, %rs75}, [%rd117];
	// inline asm
	{  cvt.f32.f16 %f1481, %rs72;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1482, %rs73;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1483, %rs74;}

	// inline asm
	// inline asm
	call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r211, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1484, %f312, %f1481;
	add.f32 	%f1485, %f313, %f1482;
	add.f32 	%f1486, %f314, %f1483;
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f1486;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs70, %f1485;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs69, %f1484;}

	// inline asm
	st.v4.u16 	[%rd123], {%rs69, %rs70, %rs71, %rs65};
	bra.uni 	BB0_121;

BB0_120:
	mov.u64 	%rd136, image_RNM2;
	cvta.global.u64 	%rd131, %rd136;
	mov.u32 	%r213, 8;
	// inline asm
	call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r213, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs78, %f314;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs77, %f313;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs76, %f312;}

	// inline asm
	st.v4.u16 	[%rd130], {%rs76, %rs77, %rs78, %rs65};

BB0_121:
	ld.global.u32 	%r214, [additive];
	setp.eq.s32	%p156, %r214, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs79, %f1447;}

	// inline asm
	@%p156 bra 	BB0_123;

	mov.u64 	%rd149, image_RNM3;
	cvta.global.u64 	%rd138, %rd149;
	mov.u32 	%r218, 8;
	// inline asm
	call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r218, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs86, %rs87, %rs88, %rs89}, [%rd137];
	// inline asm
	{  cvt.f32.f16 %f1491, %rs86;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1492, %rs87;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1493, %rs88;}

	// inline asm
	// inline asm
	call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r218, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1494, %f315, %f1491;
	add.f32 	%f1495, %f316, %f1492;
	add.f32 	%f1496, %f317, %f1493;
	// inline asm
	{  cvt.rn.f16.f32 %rs85, %f1496;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs84, %f1495;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs83, %f1494;}

	// inline asm
	st.v4.u16 	[%rd143], {%rs83, %rs84, %rs85, %rs79};
	bra.uni 	BB0_144;

BB0_123:
	mov.u64 	%rd156, image_RNM3;
	cvta.global.u64 	%rd151, %rd156;
	mov.u32 	%r220, 8;
	// inline asm
	call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r220, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs92, %f317;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f316;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs90, %f315;}

	// inline asm
	st.v4.u16 	[%rd150], {%rs90, %rs91, %rs92, %rs79};

BB0_144:
	ret;
}