//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<192>;
	.reg .b16 	%rs<57>;
	.reg .f32 	%f<1221>;
	.reg .b32 	%r<447>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<93>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r58), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r59), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u32 	%r3, [params+616];
	abs.s32 	%r4, %r3;
	ld.const.u32 	%r5, [params+540];
	ld.const.u64 	%rd26, [params+400];
	cvta.to.global.u64 	%rd27, %rd26;
	ld.const.u32 	%r64, [params+392];
	mad.lo.s32 	%r65, %r64, %r59, %r58;
	mul.wide.u32 	%rd28, %r65, 4;
	add.s64 	%rd2, %rd27, %rd28;
	ld.global.v2.u8 	{%rs7, %rs56}, [%rd2];
	or.b16  	%rs9, %rs7, %rs56;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p10, %rs10, 0;
	@%p10 bra 	$L__BB0_2;

	ld.global.u8 	%rs55, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs55, [%rd2+2];
	setp.eq.s16 	%p11, %rs55, 0;
	mov.f32 	%f1159, 0f00000000;
	mov.u16 	%rs56, 0;
	mov.f32 	%f1160, %f1159;
	mov.f32 	%f1161, %f1159;
	@%p11 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f216, %rs7;
	div.rn.f32 	%f217, %f216, 0f437F0000;
	fma.rn.f32 	%f218, %f217, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs56, 255;
	cvt.rn.f32.u16 	%f219, %rs13;
	div.rn.f32 	%f220, %f219, 0f437F0000;
	fma.rn.f32 	%f221, %f220, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f222, %rs55;
	div.rn.f32 	%f223, %f222, 0f437F0000;
	fma.rn.f32 	%f224, %f223, 0f40000000, 0fBF800000;
	mul.f32 	%f225, %f221, %f221;
	fma.rn.f32 	%f226, %f218, %f218, %f225;
	fma.rn.f32 	%f227, %f224, %f224, %f226;
	sqrt.rn.f32 	%f228, %f227;
	rcp.rn.f32 	%f229, %f228;
	mul.f32 	%f1161, %f229, %f224;
	mul.f32 	%f1160, %f229, %f221;
	mul.f32 	%f1159, %f218, %f229;

$L__BB0_4:
	ld.const.v2.u32 	{%r66, %r67}, [params];
	add.s32 	%r6, %r66, %r58;
	add.s32 	%r7, %r67, %r59;
	setp.eq.f32 	%p12, %f1159, 0f00000000;
	setp.eq.f32 	%p13, %f1160, 0f00000000;
	and.pred  	%p14, %p12, %p13;
	setp.eq.f32 	%p15, %f1161, 0f00000000;
	and.pred  	%p16, %p15, %p14;
	@%p16 bra 	$L__BB0_148;
	bra.uni 	$L__BB0_5;

$L__BB0_148:
	ld.const.u32 	%r57, [params+104];
	and.b32  	%r420, %r57, 1;
	setp.eq.b32 	%p184, %r420, 1;
	mov.pred 	%p185, 0;
	xor.pred  	%p186, %p184, %p185;
	not.pred 	%p187, %p186;
	@%p187 bra 	$L__BB0_150;

	ld.const.u64 	%rd77, [params+144];
	cvta.to.global.u64 	%rd78, %rd77;
	ld.const.u32 	%r421, [params+136];
	mad.lo.s32 	%r422, %r421, %r7, %r6;
	mul.wide.u32 	%rd79, %r422, 4;
	add.s64 	%rd80, %rd78, %rd79;
	mov.u16 	%rs37, 0;
	st.global.v4.u8 	[%rd80], {%rs37, %rs37, %rs37, %rs37};

$L__BB0_150:
	and.b32  	%r423, %r57, 8;
	setp.eq.s32 	%p188, %r423, 0;
	@%p188 bra 	$L__BB0_152;

	ld.const.u64 	%rd81, [params+192];
	cvta.to.global.u64 	%rd82, %rd81;
	ld.const.u32 	%r424, [params+184];
	mad.lo.s32 	%r425, %r424, %r7, %r6;
	mov.f32 	%f1141, 0f00000000;
	cvt.rzi.u32.f32 	%r426, %f1141;
	mul.wide.u32 	%rd83, %r425, 2;
	add.s64 	%rd84, %rd82, %rd83;
	mov.u16 	%rs38, 0;
	cvt.u16.u32 	%rs39, %r426;
	st.global.v2.u8 	[%rd84], {%rs39, %rs38};

$L__BB0_152:
	and.b32  	%r427, %r57, 4;
	setp.eq.s32 	%p189, %r427, 0;
	@%p189 bra 	$L__BB0_156;

	ld.const.u32 	%r428, [params+108];
	setp.eq.s32 	%p190, %r428, 0;
	ld.const.u64 	%rd85, [params+224];
	cvta.to.global.u64 	%rd86, %rd85;
	ld.const.u32 	%r429, [params+216];
	mad.lo.s32 	%r430, %r429, %r7, %r6;
	mul.wide.u32 	%rd87, %r430, 8;
	add.s64 	%rd24, %rd86, %rd87;
	@%p190 bra 	$L__BB0_155;

	ld.global.v4.u16 	{%rs46, %rs47, %rs48, %rs49}, [%rd24];
	// begin inline asm
	{  cvt.f32.f16 %f1142, %rs46;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1143, %rs47;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1144, %rs48;}

	// end inline asm
	add.f32 	%f1145, %f1142, 0f00000000;
	add.f32 	%f1146, %f1143, 0f00000000;
	add.f32 	%f1147, %f1144, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs45, %f1147;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f1146;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs43, %f1145;}

	// end inline asm
	mov.u16 	%rs50, 0;
	st.global.v4.u16 	[%rd24], {%rs43, %rs44, %rs45, %rs50};
	bra.uni 	$L__BB0_156;

$L__BB0_5:
	ld.const.u64 	%rd29, [params+432];
	cvta.to.global.u64 	%rd30, %rd29;
	ld.const.u32 	%r71, [params+424];
	mad.lo.s32 	%r72, %r71, %r59, %r58;
	mul.wide.u32 	%rd31, %r72, 12;
	add.s64 	%rd32, %rd30, %rd31;
	ld.global.f32 	%f10, [%rd32];
	mul.f32 	%f234, %f10, 0f3456BF95;
	ld.global.f32 	%f11, [%rd32+4];
	mul.f32 	%f235, %f11, 0f3456BF95;
	ld.global.f32 	%f12, [%rd32+8];
	mul.f32 	%f236, %f12, 0f3456BF95;
	abs.f32 	%f13, %f1159;
	div.rn.f32 	%f237, %f234, %f13;
	abs.f32 	%f238, %f1160;
	div.rn.f32 	%f239, %f235, %f238;
	abs.f32 	%f14, %f1161;
	div.rn.f32 	%f240, %f236, %f14;
	abs.f32 	%f241, %f237;
	abs.f32 	%f242, %f239;
	abs.f32 	%f243, %f240;
	mov.f32 	%f244, 0f38D1B717;
	max.f32 	%f245, %f241, %f244;
	max.f32 	%f246, %f242, %f244;
	max.f32 	%f247, %f243, %f244;
	fma.rn.f32 	%f15, %f1159, %f245, %f10;
	fma.rn.f32 	%f16, %f1160, %f246, %f11;
	fma.rn.f32 	%f17, %f1161, %f247, %f12;
	ld.const.u64 	%rd33, [params+128];
	cvta.to.global.u64 	%rd34, %rd33;
	ld.const.u32 	%r73, [params+120];
	mad.lo.s32 	%r74, %r73, %r59, %r58;
	mul.wide.u32 	%rd35, %r74, 4;
	add.s64 	%rd36, %rd34, %rd35;
	ld.global.u32 	%r439, [%rd36];
	setp.lt.s32 	%p18, %r4, 1;
	mov.pred 	%p17, 0;
	mov.u32 	%r435, 0;
	mov.f32 	%f1169, 0f00000000;
	mov.f32 	%f1170, %f1169;
	mov.f32 	%f1171, %f1169;
	mov.f32 	%f1172, %f1169;
	mov.pred 	%p191, %p17;
	@%p18 bra 	$L__BB0_25;

	ld.const.f32 	%f18, [params+620];
	ld.const.u64 	%rd37, [params+624];
	cvta.to.global.u64 	%rd3, %rd37;
	ld.const.u64 	%rd38, [params+640];
	cvta.to.global.u64 	%rd39, %rd38;
	ld.const.u32 	%r77, [params+632];
	and.b32  	%r78, %r59, 255;
	and.b32  	%r79, %r58, 255;
	mad.lo.s32 	%r80, %r77, %r78, %r79;
	mul.wide.u32 	%rd40, %r80, 3;
	add.s64 	%rd4, %rd39, %rd40;
	ld.const.f32 	%f19, [params+660];
	mul.f32 	%f20, %f15, 0f3456BF95;
	mul.f32 	%f21, %f16, 0f3456BF95;
	mul.f32 	%f22, %f17, 0f3456BF95;
	ld.const.u64 	%rd5, [params+96];
	abs.f32 	%f380, %f21;
	abs.f32 	%f381, %f20;
	max.f32 	%f382, %f381, %f380;
	abs.f32 	%f383, %f22;
	max.f32 	%f384, %f382, %f383;
	mov.u32 	%r432, %r435;

$L__BB0_7:
	mul.lo.s32 	%r81, %r432, 3;
	mul.wide.s32 	%rd41, %r81, 12;
	add.s64 	%rd6, %rd3, %rd41;
	ld.global.f32 	%f252, [%rd6];
	sub.f32 	%f253, %f252, %f10;
	ld.global.f32 	%f254, [%rd6+4];
	sub.f32 	%f255, %f254, %f11;
	ld.global.f32 	%f256, [%rd6+8];
	sub.f32 	%f257, %f256, %f12;
	mul.f32 	%f258, %f255, %f255;
	fma.rn.f32 	%f259, %f253, %f253, %f258;
	fma.rn.f32 	%f260, %f257, %f257, %f259;
	sqrt.rn.f32 	%f27, %f260;
	rcp.rn.f32 	%f261, %f27;
	mul.f32 	%f28, %f253, %f261;
	mul.f32 	%f29, %f255, %f261;
	mul.f32 	%f30, %f257, %f261;
	mul.f32 	%f262, %f1160, %f29;
	fma.rn.f32 	%f263, %f1159, %f28, %f262;
	fma.rn.f32 	%f31, %f1161, %f30, %f263;
	setp.leu.f32 	%p19, %f31, 0f00000000;
	@%p19 bra 	$L__BB0_24;

	setp.ne.s32 	%p21, %r5, 0;
	mul.f32 	%f264, %f27, %f27;
	div.rn.f32 	%f32, %f18, %f264;
	ld.global.u8 	%rs15, [%rd4];
	cvt.rn.f32.u16 	%f265, %rs15;
	div.rn.f32 	%f266, %f265, 0fC37F0000;
	fma.rn.f32 	%f267, %f266, 0f3F333333, 0f3F800000;
	setp.gt.f32 	%p22, %f32, %f267;
	and.pred  	%p23, %p21, %p22;
	mov.pred 	%p191, -1;
	@%p23 bra 	$L__BB0_25;

	mul.f32 	%f33, %f27, %f19;
	mov.f32 	%f272, 0f40800000;
	abs.f32 	%f35, %f33;
	setp.lt.f32 	%p24, %f35, 0f00800000;
	mul.f32 	%f274, %f35, 0f4B800000;
	selp.f32 	%f275, %f274, %f35, %p24;
	selp.f32 	%f276, 0fC3170000, 0fC2FE0000, %p24;
	mov.b32 	%r82, %f275;
	and.b32  	%r83, %r82, 8388607;
	or.b32  	%r84, %r83, 1065353216;
	mov.b32 	%f277, %r84;
	shr.u32 	%r85, %r82, 23;
	cvt.rn.f32.u32 	%f278, %r85;
	add.f32 	%f279, %f276, %f278;
	setp.gt.f32 	%p25, %f277, 0f3FB504F3;
	mul.f32 	%f280, %f277, 0f3F000000;
	add.f32 	%f281, %f279, 0f3F800000;
	selp.f32 	%f282, %f281, %f279, %p25;
	selp.f32 	%f283, %f280, %f277, %p25;
	add.f32 	%f284, %f283, 0fBF800000;
	add.f32 	%f285, %f283, 0f3F800000;
	rcp.approx.ftz.f32 	%f286, %f285;
	add.f32 	%f287, %f284, %f284;
	mul.f32 	%f288, %f287, %f286;
	mul.f32 	%f289, %f288, %f288;
	mov.f32 	%f290, 0f3C4CAF63;
	mov.f32 	%f291, 0f3B18F0FE;
	fma.rn.f32 	%f292, %f291, %f289, %f290;
	mov.f32 	%f293, 0f3DAAAABD;
	fma.rn.f32 	%f294, %f292, %f289, %f293;
	mul.rn.f32 	%f295, %f294, %f289;
	mul.rn.f32 	%f296, %f295, %f288;
	sub.f32 	%f297, %f284, %f288;
	add.f32 	%f298, %f297, %f297;
	neg.f32 	%f299, %f288;
	fma.rn.f32 	%f300, %f299, %f284, %f298;
	mul.rn.f32 	%f301, %f286, %f300;
	add.f32 	%f302, %f296, %f288;
	sub.f32 	%f303, %f288, %f302;
	add.f32 	%f304, %f296, %f303;
	add.f32 	%f305, %f301, %f304;
	add.f32 	%f306, %f302, %f305;
	sub.f32 	%f307, %f302, %f306;
	add.f32 	%f308, %f305, %f307;
	mov.f32 	%f309, 0f3F317200;
	mul.rn.f32 	%f310, %f282, %f309;
	mov.f32 	%f311, 0f35BFBE8E;
	mul.rn.f32 	%f312, %f282, %f311;
	add.f32 	%f313, %f310, %f306;
	sub.f32 	%f314, %f310, %f313;
	add.f32 	%f315, %f306, %f314;
	add.f32 	%f316, %f308, %f315;
	add.f32 	%f317, %f312, %f316;
	add.f32 	%f318, %f313, %f317;
	sub.f32 	%f319, %f313, %f318;
	add.f32 	%f320, %f317, %f319;
	mul.rn.f32 	%f321, %f272, %f318;
	neg.f32 	%f322, %f321;
	fma.rn.f32 	%f323, %f272, %f318, %f322;
	fma.rn.f32 	%f324, %f272, %f320, %f323;
	mov.f32 	%f325, 0f00000000;
	fma.rn.f32 	%f326, %f325, %f318, %f324;
	add.rn.f32 	%f327, %f321, %f326;
	neg.f32 	%f328, %f327;
	add.rn.f32 	%f329, %f321, %f328;
	add.rn.f32 	%f330, %f329, %f326;
	mov.b32 	%r86, %f327;
	setp.eq.s32 	%p26, %r86, 1118925336;
	add.s32 	%r87, %r86, -1;
	mov.b32 	%f331, %r87;
	add.f32 	%f332, %f330, 0f37000000;
	selp.f32 	%f36, %f332, %f330, %p26;
	selp.f32 	%f333, %f331, %f327, %p26;
	mov.f32 	%f334, 0f3FB8AA3B;
	mul.rn.f32 	%f335, %f333, %f334;
	cvt.rzi.f32.f32 	%f336, %f335;
	abs.f32 	%f337, %f336;
	setp.gt.f32 	%p27, %f337, 0f42FC0000;
	mov.b32 	%r88, %f336;
	and.b32  	%r89, %r88, -2147483648;
	or.b32  	%r90, %r89, 1123811328;
	mov.b32 	%f338, %r90;
	selp.f32 	%f339, %f338, %f336, %p27;
	mov.f32 	%f340, 0fBF317218;
	fma.rn.f32 	%f341, %f339, %f340, %f333;
	mov.f32 	%f342, 0f3102E308;
	fma.rn.f32 	%f343, %f339, %f342, %f341;
	mul.f32 	%f344, %f343, 0f3FB8AA3B;
	add.f32 	%f345, %f339, 0f4B40007F;
	mov.b32 	%r91, %f345;
	shl.b32 	%r92, %r91, 23;
	mov.b32 	%f346, %r92;
	ex2.approx.ftz.f32 	%f347, %f344;
	mul.f32 	%f37, %f347, %f346;
	setp.eq.f32 	%p28, %f37, 0f7F800000;
	mov.f32 	%f1166, 0f7F800000;
	@%p28 bra 	$L__BB0_11;

	fma.rn.f32 	%f1166, %f37, %f36, %f37;

$L__BB0_11:
	mov.f32 	%f1156, 0f40000000;
	cvt.rzi.f32.f32 	%f1155, %f1156;
	add.f32 	%f1154, %f1155, %f1155;
	mov.f32 	%f1153, 0f40800000;
	sub.f32 	%f1152, %f1153, %f1154;
	abs.f32 	%f1151, %f1152;
	setp.lt.f32 	%p29, %f33, 0f00000000;
	setp.eq.f32 	%p30, %f1151, 0f3F800000;
	and.pred  	%p1, %p29, %p30;
	setp.eq.f32 	%p31, %f33, 0f00000000;
	@%p31 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_12;

$L__BB0_15:
	add.f32 	%f352, %f33, %f33;
	selp.f32 	%f1168, %f352, 0f00000000, %p30;
	bra.uni 	$L__BB0_16;

$L__BB0_12:
	mov.b32 	%r93, %f1166;
	xor.b32  	%r94, %r93, -2147483648;
	mov.b32 	%f348, %r94;
	selp.f32 	%f1168, %f348, %f1166, %p1;
	setp.geu.f32 	%p32, %f33, 0f00000000;
	@%p32 bra 	$L__BB0_16;

	mov.f32 	%f349, 0f40800000;
	cvt.rzi.f32.f32 	%f350, %f349;
	setp.eq.f32 	%p33, %f350, 0f40800000;
	@%p33 bra 	$L__BB0_16;

	mov.f32 	%f1168, 0f7FFFFFFF;

$L__BB0_16:
	add.f32 	%f353, %f35, 0f40800000;
	mov.b32 	%r95, %f353;
	setp.lt.s32 	%p35, %r95, 2139095040;
	@%p35 bra 	$L__BB0_21;

	setp.gtu.f32 	%p36, %f35, 0f7F800000;
	@%p36 bra 	$L__BB0_20;
	bra.uni 	$L__BB0_18;

$L__BB0_20:
	add.f32 	%f1168, %f33, 0f40800000;
	bra.uni 	$L__BB0_21;

$L__BB0_18:
	setp.neu.f32 	%p37, %f35, 0f7F800000;
	@%p37 bra 	$L__BB0_21;

	selp.f32 	%f1168, 0fFF800000, 0f7F800000, %p1;

$L__BB0_21:
	mov.f32 	%f354, 0f3F800000;
	sub.f32 	%f355, %f354, %f1168;
	setp.eq.f32 	%p38, %f33, 0f3F800000;
	selp.f32 	%f356, 0f00000000, %f355, %p38;
	cvt.sat.f32.f32 	%f357, %f356;
	mul.f32 	%f358, %f32, %f357;
	ld.global.f32 	%f359, [%rd6+12];
	mul.f32 	%f360, %f28, %f359;
	ld.global.f32 	%f361, [%rd6+16];
	mul.f32 	%f362, %f29, %f361;
	neg.f32 	%f363, %f362;
	sub.f32 	%f364, %f363, %f360;
	ld.global.f32 	%f365, [%rd6+20];
	mul.f32 	%f366, %f30, %f365;
	sub.f32 	%f367, %f364, %f366;
	cvt.sat.f32.f32 	%f368, %f367;
	mul.f32 	%f46, %f358, %f368;
	cvt.sat.f32.f32 	%f47, %f31;
	mul.f32 	%f369, %f46, %f47;
	setp.leu.f32 	%p39, %f369, 0f3727C5AC;
	@%p39 bra 	$L__BB0_23;

	mul.f32 	%f379, %f46, 0f3EA2F983;
	mov.f32 	%f385, 0f38D1B717;
	max.f32 	%f376, %f384, %f385;
	sub.f32 	%f377, %f27, %f376;
	mov.f32 	%f378, 0f00000000;
	mov.u32 	%r132, 2;
	mov.u32 	%r133, 1;
	mov.u32 	%r134, 3;
	mov.u32 	%r137, 1065353216;
	mov.u32 	%r166, 0;
	// begin inline asm
	call(%r96,%r97,%r98,%r99,%r100,%r101,%r102,%r103,%r104,%r105,%r106,%r107,%r108,%r109,%r110,%r111,%r112,%r113,%r114,%r115,%r116,%r117,%r118,%r119,%r120,%r121,%r122,%r123,%r124,%r125,%r126,%r127),_optix_trace_typed_32,(%r166,%rd5,%f15,%f16,%f17,%f28,%f29,%f30,%f376,%f377,%f378,%r133,%r166,%r133,%r132,%r133,%r134,%r137,%r137,%r137,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166);
	// end inline asm
	mov.b32 	%f386, %r96;
	mov.b32 	%f387, %r97;
	mov.b32 	%f388, %r98;
	ld.global.f32 	%f389, [%rd6+24];
	mul.f32 	%f390, %f389, %f386;
	ld.global.f32 	%f391, [%rd6+28];
	mul.f32 	%f392, %f391, %f387;
	ld.global.f32 	%f393, [%rd6+32];
	mul.f32 	%f394, %f393, %f388;
	mul.f32 	%f395, %f379, %f390;
	mul.f32 	%f396, %f379, %f392;
	mul.f32 	%f397, %f379, %f394;
	fma.rn.f32 	%f1169, %f47, %f395, %f1169;
	fma.rn.f32 	%f1170, %f47, %f396, %f1170;
	fma.rn.f32 	%f1171, %f47, %f397, %f1171;
	add.f32 	%f1172, %f1172, %f386;

$L__BB0_23:
	add.s32 	%r435, %r435, 1;

$L__BB0_24:
	add.s32 	%r432, %r432, 1;
	setp.lt.s32 	%p41, %r432, %r4;
	mov.pred 	%p191, %p17;
	@%p41 bra 	$L__BB0_7;

$L__BB0_25:
	cvt.rn.f32.s32 	%f398, %r435;
	mov.f32 	%f399, 0f3F800000;
	max.f32 	%f400, %f398, %f399;
	rcp.rn.f32 	%f401, %f400;
	mul.f32 	%f1196, %f1169, %f401;
	mul.f32 	%f1197, %f1170, %f401;
	mul.f32 	%f1198, %f1171, %f401;
	div.rn.f32 	%f1199, %f1172, %f400;
	not.pred 	%p42, %p191;
	@%p42 bra 	$L__BB0_56;

	abs.f32 	%f1158, %f1161;
	abs.f32 	%f1157, %f1159;
	setp.gt.f32 	%p43, %f1157, %f1158;
	selp.f32 	%f405, 0f00000000, %f1160, %p43;
	mov.f32 	%f404, 0f00000000;
	neg.f32 	%f406, %f1161;
	selp.f32 	%f407, %f1159, %f406, %p43;
	neg.f32 	%f408, %f1160;
	selp.f32 	%f409, %f408, 0f00000000, %p43;
	mul.f32 	%f410, %f407, %f407;
	fma.rn.f32 	%f411, %f409, %f409, %f410;
	fma.rn.f32 	%f412, %f405, %f405, %f411;
	sqrt.rn.f32 	%f413, %f412;
	rcp.rn.f32 	%f414, %f413;
	mul.f32 	%f68, %f409, %f414;
	mul.f32 	%f69, %f407, %f414;
	mul.f32 	%f70, %f405, %f414;
	setp.lt.s32 	%p44, %r5, 1;
	mov.f32 	%f1186, %f404;
	mov.f32 	%f1185, %f404;
	mov.f32 	%f1184, %f404;
	@%p44 bra 	$L__BB0_55;

	cvt.rn.f32.s32 	%f418, %r5;
	rcp.rn.f32 	%f71, %f418;
	mul.f32 	%f72, %f15, 0f3456BF95;
	mul.f32 	%f73, %f16, 0f3456BF95;
	mul.f32 	%f74, %f17, 0f3456BF95;
	ld.const.u64 	%rd7, [params+96];
	mul.f32 	%f419, %f1159, %f69;
	mul.f32 	%f420, %f1160, %f68;
	sub.f32 	%f75, %f420, %f419;
	mul.f32 	%f421, %f1161, %f68;
	mul.f32 	%f422, %f1159, %f70;
	sub.f32 	%f76, %f422, %f421;
	mul.f32 	%f423, %f1160, %f70;
	mul.f32 	%f424, %f1161, %f69;
	sub.f32 	%f77, %f424, %f423;
	mov.u32 	%r167, 0;
	add.s64 	%rd8, %rd1, 24;
	mov.u64 	%rd43, __cudart_i2opi_f;
	abs.f32 	%f490, %f73;
	abs.f32 	%f491, %f72;
	max.f32 	%f492, %f491, %f490;
	abs.f32 	%f493, %f74;
	max.f32 	%f494, %f492, %f493;
	mov.u32 	%r436, %r167;

$L__BB0_28:
	cvt.rn.f32.s32 	%f81, %r436;
	mov.u32 	%r438, %r167;

$L__BB0_29:
	mad.lo.s32 	%r169, %r439, 1664525, 1013904223;
	and.b32  	%r170, %r169, 16777215;
	cvt.rn.f32.u32 	%f425, %r170;
	fma.rn.f32 	%f426, %f425, 0f33800000, %f81;
	mul.f32 	%f427, %f71, %f426;
	mad.lo.s32 	%r439, %r169, 1664525, 1013904223;
	and.b32  	%r171, %r439, 16777215;
	cvt.rn.f32.u32 	%f428, %r171;
	cvt.rn.f32.s32 	%f429, %r438;
	fma.rn.f32 	%f430, %f428, 0f33800000, %f429;
	mul.f32 	%f431, %f71, %f430;
	sqrt.rn.f32 	%f85, %f427;
	mul.f32 	%f86, %f431, 0f40C90FDB;
	mul.f32 	%f432, %f86, 0f3F22F983;
	cvt.rni.s32.f32 	%r446, %f432;
	cvt.rn.f32.s32 	%f433, %r446;
	mov.f32 	%f434, 0fBFC90FDA;
	fma.rn.f32 	%f435, %f433, %f434, %f86;
	mov.f32 	%f436, 0fB3A22168;
	fma.rn.f32 	%f437, %f433, %f436, %f435;
	mov.f32 	%f438, 0fA7C234C5;
	fma.rn.f32 	%f1190, %f433, %f438, %f437;
	abs.f32 	%f88, %f86;
	setp.ltu.f32 	%p45, %f88, 0f47CE4780;
	mov.u32 	%r443, %r446;
	mov.f32 	%f1187, %f1190;
	@%p45 bra 	$L__BB0_37;

	setp.eq.f32 	%p46, %f88, 0f7F800000;
	@%p46 bra 	$L__BB0_36;
	bra.uni 	$L__BB0_31;

$L__BB0_36:
	mov.f32 	%f441, 0f00000000;
	mul.rn.f32 	%f1187, %f86, %f441;
	mov.u32 	%r443, 0;
	bra.uni 	$L__BB0_37;

$L__BB0_31:
	mov.b32 	%r21, %f86;
	bfe.u32 	%r173, %r21, 23, 8;
	add.s32 	%r22, %r173, -128;
	shl.b32 	%r174, %r21, 8;
	or.b32  	%r23, %r174, -2147483648;
	shr.u32 	%r24, %r22, 5;
	mov.u64 	%rd90, 0;
	mov.u32 	%r440, 0;
	mov.u64 	%rd88, %rd1;
	mov.u64 	%rd89, %rd43;

$L__BB0_32:
	.pragma "nounroll";
	ld.global.nc.u32 	%r175, [%rd89];
	mad.wide.u32 	%rd45, %r175, %r23, %rd90;
	shr.u64 	%rd90, %rd45, 32;
	st.local.u32 	[%rd88], %rd45;
	add.s64 	%rd89, %rd89, 4;
	add.s64 	%rd88, %rd88, 4;
	add.s32 	%r440, %r440, 1;
	setp.ne.s32 	%p47, %r440, 6;
	@%p47 bra 	$L__BB0_32;

	st.local.u32 	[%rd8], %rd90;
	mov.u32 	%r176, 4;
	sub.s32 	%r27, %r176, %r24;
	mov.u32 	%r177, 6;
	sub.s32 	%r178, %r177, %r24;
	mul.wide.s32 	%rd46, %r178, 4;
	add.s64 	%rd47, %rd1, %rd46;
	ld.local.u32 	%r441, [%rd47];
	ld.local.u32 	%r442, [%rd47+-4];
	and.b32  	%r30, %r22, 31;
	setp.eq.s32 	%p48, %r30, 0;
	@%p48 bra 	$L__BB0_35;

	mov.u32 	%r179, 32;
	sub.s32 	%r180, %r179, %r30;
	shr.u32 	%r181, %r442, %r180;
	shl.b32 	%r182, %r441, %r30;
	add.s32 	%r441, %r181, %r182;
	mul.wide.s32 	%rd48, %r27, 4;
	add.s64 	%rd49, %rd1, %rd48;
	ld.local.u32 	%r183, [%rd49];
	shr.u32 	%r184, %r183, %r180;
	shl.b32 	%r185, %r442, %r30;
	add.s32 	%r442, %r184, %r185;

$L__BB0_35:
	and.b32  	%r186, %r21, -2147483648;
	shr.u32 	%r187, %r442, 30;
	shl.b32 	%r188, %r441, 2;
	or.b32  	%r189, %r187, %r188;
	shr.u32 	%r190, %r189, 31;
	shr.u32 	%r191, %r441, 30;
	add.s32 	%r192, %r190, %r191;
	neg.s32 	%r193, %r192;
	setp.eq.s32 	%p49, %r186, 0;
	selp.b32 	%r443, %r192, %r193, %p49;
	setp.ne.s32 	%p50, %r190, 0;
	xor.b32  	%r194, %r186, -2147483648;
	selp.b32 	%r195, %r194, %r186, %p50;
	selp.b32 	%r196, -1, 0, %p50;
	xor.b32  	%r197, %r189, %r196;
	shl.b32 	%r198, %r442, 2;
	xor.b32  	%r199, %r198, %r196;
	cvt.u64.u32 	%rd50, %r197;
	cvt.u64.u32 	%rd51, %r199;
	bfi.b64 	%rd52, %rd50, %rd51, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd52;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f439, %fd2;
	setp.eq.s32 	%p51, %r195, 0;
	neg.f32 	%f440, %f439;
	selp.f32 	%f1187, %f439, %f440, %p51;

$L__BB0_37:
	add.s32 	%r37, %r443, 1;
	and.b32  	%r38, %r37, 1;
	setp.eq.s32 	%p52, %r38, 0;
	selp.f32 	%f92, %f1187, 0f3F800000, %p52;
	mul.rn.f32 	%f93, %f1187, %f1187;
	mov.f32 	%f1188, 0fB94D4153;
	@%p52 bra 	$L__BB0_39;

	mov.f32 	%f443, 0fBAB607ED;
	mov.f32 	%f444, 0f37CBAC00;
	fma.rn.f32 	%f1188, %f444, %f93, %f443;

$L__BB0_39:
	selp.f32 	%f445, 0f3C0885E4, 0f3D2AAABB, %p52;
	fma.rn.f32 	%f446, %f1188, %f93, %f445;
	selp.f32 	%f447, 0fBE2AAAA8, 0fBEFFFFFF, %p52;
	fma.rn.f32 	%f448, %f446, %f93, %f447;
	mov.f32 	%f449, 0f00000000;
	fma.rn.f32 	%f450, %f93, %f92, %f449;
	fma.rn.f32 	%f1189, %f448, %f450, %f92;
	and.b32  	%r201, %r37, 2;
	setp.eq.s32 	%p54, %r201, 0;
	@%p54 bra 	$L__BB0_41;

	mov.f32 	%f452, 0fBF800000;
	fma.rn.f32 	%f1189, %f1189, %f452, %f449;

$L__BB0_41:
	@%p45 bra 	$L__BB0_49;

	setp.eq.f32 	%p56, %f88, 0f7F800000;
	@%p56 bra 	$L__BB0_48;
	bra.uni 	$L__BB0_43;

$L__BB0_48:
	mov.f32 	%f455, 0f00000000;
	mul.rn.f32 	%f1190, %f86, %f455;
	mov.u32 	%r446, 0;
	bra.uni 	$L__BB0_49;

$L__BB0_43:
	mov.b32 	%r39, %f86;
	bfe.u32 	%r202, %r39, 23, 8;
	add.s32 	%r40, %r202, -128;
	shl.b32 	%r203, %r39, 8;
	or.b32  	%r41, %r203, -2147483648;
	shr.u32 	%r42, %r40, 5;
	mov.u64 	%rd91, 0;
	mov.u64 	%rd92, %rd91;

$L__BB0_44:
	.pragma "nounroll";
	shl.b64 	%rd55, %rd91, 2;
	mov.u64 	%rd56, __cudart_i2opi_f;
	add.s64 	%rd57, %rd56, %rd55;
	ld.global.nc.u32 	%r204, [%rd57];
	mad.wide.u32 	%rd58, %r204, %r41, %rd92;
	shr.u64 	%rd92, %rd58, 32;
	add.s64 	%rd59, %rd1, %rd55;
	st.local.u32 	[%rd59], %rd58;
	cvt.u32.u64 	%r205, %rd91;
	add.s32 	%r206, %r205, 1;
	cvt.s64.s32 	%rd91, %r206;
	setp.ne.s32 	%p57, %r206, 6;
	@%p57 bra 	$L__BB0_44;

	st.local.u32 	[%rd8], %rd92;
	mov.u32 	%r207, 4;
	sub.s32 	%r43, %r207, %r42;
	mov.u32 	%r208, 6;
	sub.s32 	%r209, %r208, %r42;
	mul.wide.s32 	%rd60, %r209, 4;
	add.s64 	%rd61, %rd1, %rd60;
	ld.local.u32 	%r444, [%rd61];
	ld.local.u32 	%r445, [%rd61+-4];
	and.b32  	%r46, %r40, 31;
	setp.eq.s32 	%p58, %r46, 0;
	@%p58 bra 	$L__BB0_47;

	mov.u32 	%r210, 32;
	sub.s32 	%r211, %r210, %r46;
	shr.u32 	%r212, %r445, %r211;
	shl.b32 	%r213, %r444, %r46;
	add.s32 	%r444, %r212, %r213;
	mul.wide.s32 	%rd62, %r43, 4;
	add.s64 	%rd63, %rd1, %rd62;
	ld.local.u32 	%r214, [%rd63];
	shr.u32 	%r215, %r214, %r211;
	shl.b32 	%r216, %r445, %r46;
	add.s32 	%r445, %r215, %r216;

$L__BB0_47:
	and.b32  	%r217, %r39, -2147483648;
	shr.u32 	%r218, %r445, 30;
	shl.b32 	%r219, %r444, 2;
	or.b32  	%r220, %r218, %r219;
	shr.u32 	%r221, %r220, 31;
	shr.u32 	%r222, %r444, 30;
	add.s32 	%r223, %r221, %r222;
	neg.s32 	%r224, %r223;
	setp.eq.s32 	%p59, %r217, 0;
	selp.b32 	%r446, %r223, %r224, %p59;
	setp.ne.s32 	%p60, %r221, 0;
	xor.b32  	%r225, %r217, -2147483648;
	selp.b32 	%r226, %r225, %r217, %p60;
	selp.b32 	%r227, -1, 0, %p60;
	xor.b32  	%r228, %r220, %r227;
	shl.b32 	%r229, %r445, 2;
	xor.b32  	%r230, %r229, %r227;
	cvt.u64.u32 	%rd64, %r228;
	cvt.u64.u32 	%rd65, %r230;
	bfi.b64 	%rd66, %rd64, %rd65, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd66;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f453, %fd4;
	setp.eq.s32 	%p61, %r226, 0;
	neg.f32 	%f454, %f453;
	selp.f32 	%f1190, %f453, %f454, %p61;

$L__BB0_49:
	mul.f32 	%f102, %f85, %f1189;
	and.b32  	%r53, %r446, 1;
	setp.eq.s32 	%p62, %r53, 0;
	selp.f32 	%f103, %f1190, 0f3F800000, %p62;
	mul.rn.f32 	%f104, %f1190, %f1190;
	mov.f32 	%f1191, 0fB94D4153;
	@%p62 bra 	$L__BB0_51;

	mov.f32 	%f457, 0fBAB607ED;
	mov.f32 	%f458, 0f37CBAC00;
	fma.rn.f32 	%f1191, %f458, %f104, %f457;

$L__BB0_51:
	selp.f32 	%f459, 0f3C0885E4, 0f3D2AAABB, %p62;
	fma.rn.f32 	%f460, %f1191, %f104, %f459;
	selp.f32 	%f461, 0fBE2AAAA8, 0fBEFFFFFF, %p62;
	fma.rn.f32 	%f462, %f460, %f104, %f461;
	mov.f32 	%f463, 0f00000000;
	fma.rn.f32 	%f464, %f104, %f103, %f463;
	fma.rn.f32 	%f1192, %f462, %f464, %f103;
	and.b32  	%r232, %r446, 2;
	setp.eq.s32 	%p64, %r232, 0;
	@%p64 bra 	$L__BB0_53;

	mov.f32 	%f466, 0fBF800000;
	fma.rn.f32 	%f1192, %f1192, %f466, %f463;

$L__BB0_53:
	mul.f32 	%f476, %f102, %f102;
	mov.f32 	%f477, 0f3F800000;
	sub.f32 	%f478, %f477, %f476;
	mul.f32 	%f479, %f85, %f1192;
	mul.f32 	%f480, %f479, %f479;
	sub.f32 	%f481, %f478, %f480;
	max.f32 	%f482, %f463, %f481;
	sqrt.rn.f32 	%f483, %f482;
	mul.f32 	%f484, %f68, %f479;
	mul.f32 	%f485, %f69, %f479;
	mul.f32 	%f486, %f70, %f479;
	fma.rn.f32 	%f487, %f77, %f102, %f484;
	fma.rn.f32 	%f488, %f76, %f102, %f485;
	fma.rn.f32 	%f489, %f75, %f102, %f486;
	fma.rn.f32 	%f470, %f1159, %f483, %f487;
	fma.rn.f32 	%f471, %f1160, %f483, %f488;
	fma.rn.f32 	%f472, %f1161, %f483, %f489;
	mov.f32 	%f495, 0f38D1B717;
	max.f32 	%f473, %f494, %f495;
	mov.f32 	%f474, 0f6C4ECB8F;
	mov.u32 	%r266, 1;
	mov.u32 	%r269, 2;
	mov.u32 	%r271, 4;
	mov.u32 	%r274, 1065353216;
	mov.u32 	%r275, 2139095039;
	mov.u32 	%r303, 0;
	// begin inline asm
	call(%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260,%r261,%r262,%r263,%r264),_optix_trace_typed_32,(%r303,%rd7,%f15,%f16,%f17,%f470,%f471,%f472,%f473,%f474,%f463,%r266,%r303,%r303,%r269,%r303,%r271,%r274,%r274,%r274,%r275,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303);
	// end inline asm
	mov.b32 	%f496, %r233;
	mov.b32 	%f497, %r234;
	mov.b32 	%f498, %r235;
	mov.b32 	%f499, %r236;
	max.f32 	%f500, %f496, %f463;
	max.f32 	%f501, %f497, %f463;
	max.f32 	%f502, %f498, %f463;
	setp.ltu.f32 	%p65, %f499, 0f00000000;
	selp.f32 	%f503, %f502, 0f00000000, %p65;
	selp.f32 	%f504, %f501, 0f00000000, %p65;
	selp.f32 	%f505, %f500, 0f00000000, %p65;
	add.f32 	%f1186, %f1186, %f505;
	add.f32 	%f1185, %f1185, %f504;
	add.f32 	%f1184, %f1184, %f503;
	add.s32 	%r438, %r438, 1;
	setp.lt.s32 	%p66, %r438, %r5;
	@%p66 bra 	$L__BB0_29;

	add.s32 	%r436, %r436, 1;
	setp.lt.s32 	%p67, %r436, %r5;
	@%p67 bra 	$L__BB0_28;

$L__BB0_55:
	mul.lo.s32 	%r304, %r5, %r5;
	cvt.rn.f32.s32 	%f506, %r304;
	rcp.rn.f32 	%f507, %f506;
	mul.f32 	%f1196, %f507, %f1186;
	mul.f32 	%f1197, %f507, %f1185;
	mul.f32 	%f1198, %f507, %f1184;
	div.rn.f32 	%f1199, %f404, %f506;

$L__BB0_56:
	ld.const.u32 	%r431, [params+616];
	setp.lt.s32 	%p68, %r431, 0;
	selp.f32 	%f124, %f1196, %f1199, %p68;
	ld.const.u32 	%r56, [params+104];
	and.b32  	%r305, %r56, 8;
	setp.eq.s32 	%p69, %r305, 0;
	@%p69 bra 	$L__BB0_70;

	ld.const.u64 	%rd68, [params+192];
	cvta.to.global.u64 	%rd19, %rd68;
	ld.const.u32 	%r306, [params+184];
	mad.lo.s32 	%r307, %r306, %r7, %r6;
	cvt.u64.u32 	%rd20, %r307;
	mov.f32 	%f510, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f511, %f510;
	add.f32 	%f512, %f511, %f511;
	mov.f32 	%f513, 0f3EE8BA2E;
	sub.f32 	%f514, %f513, %f512;
	abs.f32 	%f125, %f514;
	abs.f32 	%f126, %f124;
	setp.lt.f32 	%p70, %f126, 0f00800000;
	mul.f32 	%f515, %f126, 0f4B800000;
	selp.f32 	%f516, %f515, %f126, %p70;
	selp.f32 	%f517, 0fC3170000, 0fC2FE0000, %p70;
	mov.b32 	%r308, %f516;
	and.b32  	%r309, %r308, 8388607;
	or.b32  	%r310, %r309, 1065353216;
	mov.b32 	%f518, %r310;
	shr.u32 	%r311, %r308, 23;
	cvt.rn.f32.u32 	%f519, %r311;
	add.f32 	%f520, %f517, %f519;
	setp.gt.f32 	%p71, %f518, 0f3FB504F3;
	mul.f32 	%f521, %f518, 0f3F000000;
	add.f32 	%f522, %f520, 0f3F800000;
	selp.f32 	%f523, %f522, %f520, %p71;
	selp.f32 	%f524, %f521, %f518, %p71;
	add.f32 	%f525, %f524, 0fBF800000;
	add.f32 	%f526, %f524, 0f3F800000;
	rcp.approx.ftz.f32 	%f527, %f526;
	add.f32 	%f528, %f525, %f525;
	mul.f32 	%f529, %f528, %f527;
	mul.f32 	%f530, %f529, %f529;
	mov.f32 	%f531, 0f3C4CAF63;
	mov.f32 	%f532, 0f3B18F0FE;
	fma.rn.f32 	%f533, %f532, %f530, %f531;
	mov.f32 	%f534, 0f3DAAAABD;
	fma.rn.f32 	%f535, %f533, %f530, %f534;
	mul.rn.f32 	%f536, %f535, %f530;
	mul.rn.f32 	%f537, %f536, %f529;
	sub.f32 	%f538, %f525, %f529;
	add.f32 	%f539, %f538, %f538;
	neg.f32 	%f540, %f529;
	fma.rn.f32 	%f541, %f540, %f525, %f539;
	mul.rn.f32 	%f542, %f527, %f541;
	add.f32 	%f543, %f537, %f529;
	sub.f32 	%f544, %f529, %f543;
	add.f32 	%f545, %f537, %f544;
	add.f32 	%f546, %f542, %f545;
	add.f32 	%f547, %f543, %f546;
	sub.f32 	%f548, %f543, %f547;
	add.f32 	%f549, %f546, %f548;
	mov.f32 	%f550, 0f3F317200;
	mul.rn.f32 	%f551, %f523, %f550;
	mov.f32 	%f552, 0f35BFBE8E;
	mul.rn.f32 	%f553, %f523, %f552;
	add.f32 	%f554, %f551, %f547;
	sub.f32 	%f555, %f551, %f554;
	add.f32 	%f556, %f547, %f555;
	add.f32 	%f557, %f549, %f556;
	add.f32 	%f558, %f553, %f557;
	add.f32 	%f559, %f554, %f558;
	sub.f32 	%f560, %f554, %f559;
	add.f32 	%f561, %f558, %f560;
	mul.rn.f32 	%f562, %f513, %f559;
	neg.f32 	%f563, %f562;
	fma.rn.f32 	%f564, %f513, %f559, %f563;
	fma.rn.f32 	%f565, %f513, %f561, %f564;
	mov.f32 	%f566, 0f00000000;
	fma.rn.f32 	%f567, %f566, %f559, %f565;
	add.rn.f32 	%f568, %f562, %f567;
	neg.f32 	%f569, %f568;
	add.rn.f32 	%f570, %f562, %f569;
	add.rn.f32 	%f571, %f570, %f567;
	mov.b32 	%r312, %f568;
	setp.eq.s32 	%p72, %r312, 1118925336;
	add.s32 	%r313, %r312, -1;
	mov.b32 	%f572, %r313;
	add.f32 	%f573, %f571, 0f37000000;
	selp.f32 	%f127, %f573, %f571, %p72;
	selp.f32 	%f574, %f572, %f568, %p72;
	mov.f32 	%f575, 0f3FB8AA3B;
	mul.rn.f32 	%f576, %f574, %f575;
	cvt.rzi.f32.f32 	%f577, %f576;
	abs.f32 	%f578, %f577;
	setp.gt.f32 	%p73, %f578, 0f42FC0000;
	mov.b32 	%r314, %f577;
	and.b32  	%r315, %r314, -2147483648;
	or.b32  	%r316, %r315, 1123811328;
	mov.b32 	%f579, %r316;
	selp.f32 	%f580, %f579, %f577, %p73;
	mov.f32 	%f581, 0fBF317218;
	fma.rn.f32 	%f582, %f580, %f581, %f574;
	mov.f32 	%f583, 0f3102E308;
	fma.rn.f32 	%f584, %f580, %f583, %f582;
	mul.f32 	%f585, %f584, 0f3FB8AA3B;
	add.f32 	%f586, %f580, 0f4B40007F;
	mov.b32 	%r317, %f586;
	shl.b32 	%r318, %r317, 23;
	mov.b32 	%f587, %r318;
	ex2.approx.ftz.f32 	%f588, %f585;
	mul.f32 	%f128, %f588, %f587;
	setp.eq.f32 	%p74, %f128, 0f7F800000;
	mov.f32 	%f1200, 0f7F800000;
	@%p74 bra 	$L__BB0_59;

	fma.rn.f32 	%f1200, %f128, %f127, %f128;

$L__BB0_59:
	setp.lt.f32 	%p75, %f124, 0f00000000;
	setp.eq.f32 	%p76, %f125, 0f3F800000;
	and.pred  	%p3, %p75, %p76;
	setp.eq.f32 	%p77, %f124, 0f00000000;
	@%p77 bra 	$L__BB0_63;
	bra.uni 	$L__BB0_60;

$L__BB0_63:
	add.f32 	%f593, %f124, %f124;
	selp.f32 	%f1202, %f593, 0f00000000, %p76;
	bra.uni 	$L__BB0_64;

$L__BB0_155:
	mov.f32 	%f1150, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs53, %f1150;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs52, %f1150;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs51, %f1150;}

	// end inline asm
	mov.u16 	%rs54, 0;
	st.global.v4.u16 	[%rd24], {%rs51, %rs52, %rs53, %rs54};
	bra.uni 	$L__BB0_156;

$L__BB0_60:
	mov.b32 	%r319, %f1200;
	xor.b32  	%r320, %r319, -2147483648;
	mov.b32 	%f589, %r320;
	selp.f32 	%f1202, %f589, %f1200, %p3;
	setp.geu.f32 	%p78, %f124, 0f00000000;
	@%p78 bra 	$L__BB0_64;

	mov.f32 	%f590, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f591, %f590;
	setp.eq.f32 	%p79, %f591, 0f3EE8BA2E;
	@%p79 bra 	$L__BB0_64;

	mov.f32 	%f1202, 0f7FFFFFFF;

$L__BB0_64:
	add.f32 	%f594, %f126, 0f3EE8BA2E;
	mov.b32 	%r321, %f594;
	setp.lt.s32 	%p81, %r321, 2139095040;
	@%p81 bra 	$L__BB0_69;

	setp.gtu.f32 	%p82, %f126, 0f7F800000;
	@%p82 bra 	$L__BB0_68;
	bra.uni 	$L__BB0_66;

$L__BB0_68:
	add.f32 	%f1202, %f124, 0f3EE8BA2E;
	bra.uni 	$L__BB0_69;

$L__BB0_66:
	setp.neu.f32 	%p83, %f126, 0f7F800000;
	@%p83 bra 	$L__BB0_69;

	selp.f32 	%f1202, 0fFF800000, 0f7F800000, %p3;

$L__BB0_69:
	mul.f32 	%f595, %f1202, 0f437F0000;
	setp.eq.f32 	%p84, %f124, 0f3F800000;
	selp.f32 	%f596, 0f437F0000, %f595, %p84;
	cvt.rzi.u32.f32 	%r322, %f596;
	shl.b64 	%rd69, %rd20, 1;
	add.s64 	%rd70, %rd19, %rd69;
	cvt.u16.u32 	%rs16, %r322;
	mov.u16 	%rs17, 255;
	st.global.v2.u8 	[%rd70], {%rs16, %rs17};

$L__BB0_70:
	ld.const.v2.f32 	{%f597, %f598}, [params+648];
	mul.f32 	%f137, %f1196, %f597;
	mul.f32 	%f138, %f1197, %f598;
	ld.const.f32 	%f601, [params+656];
	mul.f32 	%f139, %f1198, %f601;
	and.b32  	%r323, %r56, 1;
	setp.eq.b32 	%p85, %r323, 1;
	mov.pred 	%p86, 0;
	xor.pred  	%p87, %p85, %p86;
	not.pred 	%p88, %p87;
	@%p88 bra 	$L__BB0_144;

	mov.f32 	%f603, 0f3E666666;
	cvt.rzi.f32.f32 	%f604, %f603;
	add.f32 	%f605, %f604, %f604;
	mov.f32 	%f606, 0f3EE66666;
	sub.f32 	%f607, %f606, %f605;
	abs.f32 	%f140, %f607;
	abs.f32 	%f141, %f137;
	setp.lt.f32 	%p89, %f141, 0f00800000;
	mul.f32 	%f608, %f141, 0f4B800000;
	selp.f32 	%f609, %f608, %f141, %p89;
	selp.f32 	%f610, 0fC3170000, 0fC2FE0000, %p89;
	mov.b32 	%r324, %f609;
	and.b32  	%r325, %r324, 8388607;
	or.b32  	%r326, %r325, 1065353216;
	mov.b32 	%f611, %r326;
	shr.u32 	%r327, %r324, 23;
	cvt.rn.f32.u32 	%f612, %r327;
	add.f32 	%f613, %f610, %f612;
	setp.gt.f32 	%p90, %f611, 0f3FB504F3;
	mul.f32 	%f614, %f611, 0f3F000000;
	add.f32 	%f615, %f613, 0f3F800000;
	selp.f32 	%f616, %f615, %f613, %p90;
	selp.f32 	%f617, %f614, %f611, %p90;
	add.f32 	%f618, %f617, 0fBF800000;
	add.f32 	%f619, %f617, 0f3F800000;
	rcp.approx.ftz.f32 	%f620, %f619;
	add.f32 	%f621, %f618, %f618;
	mul.f32 	%f622, %f621, %f620;
	mul.f32 	%f623, %f622, %f622;
	mov.f32 	%f624, 0f3C4CAF63;
	mov.f32 	%f625, 0f3B18F0FE;
	fma.rn.f32 	%f626, %f625, %f623, %f624;
	mov.f32 	%f627, 0f3DAAAABD;
	fma.rn.f32 	%f628, %f626, %f623, %f627;
	mul.rn.f32 	%f629, %f628, %f623;
	mul.rn.f32 	%f630, %f629, %f622;
	sub.f32 	%f631, %f618, %f622;
	add.f32 	%f632, %f631, %f631;
	neg.f32 	%f633, %f622;
	fma.rn.f32 	%f634, %f633, %f618, %f632;
	mul.rn.f32 	%f635, %f620, %f634;
	add.f32 	%f636, %f630, %f622;
	sub.f32 	%f637, %f622, %f636;
	add.f32 	%f638, %f630, %f637;
	add.f32 	%f639, %f635, %f638;
	add.f32 	%f640, %f636, %f639;
	sub.f32 	%f641, %f636, %f640;
	add.f32 	%f642, %f639, %f641;
	mov.f32 	%f643, 0f3F317200;
	mul.rn.f32 	%f644, %f616, %f643;
	mov.f32 	%f645, 0f35BFBE8E;
	mul.rn.f32 	%f646, %f616, %f645;
	add.f32 	%f647, %f644, %f640;
	sub.f32 	%f648, %f644, %f647;
	add.f32 	%f649, %f640, %f648;
	add.f32 	%f650, %f642, %f649;
	add.f32 	%f651, %f646, %f650;
	add.f32 	%f652, %f647, %f651;
	sub.f32 	%f653, %f647, %f652;
	add.f32 	%f654, %f651, %f653;
	mul.rn.f32 	%f655, %f606, %f652;
	neg.f32 	%f656, %f655;
	fma.rn.f32 	%f657, %f606, %f652, %f656;
	fma.rn.f32 	%f658, %f606, %f654, %f657;
	mov.f32 	%f659, 0f00000000;
	fma.rn.f32 	%f660, %f659, %f652, %f658;
	add.rn.f32 	%f661, %f655, %f660;
	neg.f32 	%f662, %f661;
	add.rn.f32 	%f663, %f655, %f662;
	add.rn.f32 	%f664, %f663, %f660;
	mov.b32 	%r328, %f661;
	setp.eq.s32 	%p91, %r328, 1118925336;
	add.s32 	%r329, %r328, -1;
	mov.b32 	%f665, %r329;
	add.f32 	%f666, %f664, 0f37000000;
	selp.f32 	%f142, %f666, %f664, %p91;
	selp.f32 	%f667, %f665, %f661, %p91;
	mov.f32 	%f668, 0f3FB8AA3B;
	mul.rn.f32 	%f669, %f667, %f668;
	cvt.rzi.f32.f32 	%f670, %f669;
	abs.f32 	%f671, %f670;
	setp.gt.f32 	%p92, %f671, 0f42FC0000;
	mov.b32 	%r330, %f670;
	and.b32  	%r331, %r330, -2147483648;
	or.b32  	%r332, %r331, 1123811328;
	mov.b32 	%f672, %r332;
	selp.f32 	%f673, %f672, %f670, %p92;
	mov.f32 	%f674, 0fBF317218;
	fma.rn.f32 	%f675, %f673, %f674, %f667;
	mov.f32 	%f676, 0f3102E308;
	fma.rn.f32 	%f677, %f673, %f676, %f675;
	mul.f32 	%f678, %f677, 0f3FB8AA3B;
	add.f32 	%f679, %f673, 0f4B40007F;
	mov.b32 	%r333, %f679;
	shl.b32 	%r334, %r333, 23;
	mov.b32 	%f680, %r334;
	ex2.approx.ftz.f32 	%f681, %f678;
	mul.f32 	%f143, %f681, %f680;
	setp.eq.f32 	%p93, %f143, 0f7F800000;
	mov.f32 	%f1203, 0f7F800000;
	@%p93 bra 	$L__BB0_73;

	fma.rn.f32 	%f1203, %f143, %f142, %f143;

$L__BB0_73:
	setp.lt.f32 	%p94, %f137, 0f00000000;
	setp.eq.f32 	%p95, %f140, 0f3F800000;
	and.pred  	%p4, %p94, %p95;
	setp.eq.f32 	%p96, %f137, 0f00000000;
	@%p96 bra 	$L__BB0_77;
	bra.uni 	$L__BB0_74;

$L__BB0_77:
	add.f32 	%f686, %f137, %f137;
	selp.f32 	%f1205, %f686, 0f00000000, %p95;
	bra.uni 	$L__BB0_78;

$L__BB0_74:
	mov.b32 	%r335, %f1203;
	xor.b32  	%r336, %r335, -2147483648;
	mov.b32 	%f682, %r336;
	selp.f32 	%f1205, %f682, %f1203, %p4;
	setp.geu.f32 	%p97, %f137, 0f00000000;
	@%p97 bra 	$L__BB0_78;

	mov.f32 	%f683, 0f3EE66666;
	cvt.rzi.f32.f32 	%f684, %f683;
	setp.eq.f32 	%p98, %f684, 0f3EE66666;
	@%p98 bra 	$L__BB0_78;

	mov.f32 	%f1205, 0f7FFFFFFF;

$L__BB0_78:
	add.f32 	%f687, %f141, 0f3EE66666;
	mov.b32 	%r337, %f687;
	setp.lt.s32 	%p100, %r337, 2139095040;
	@%p100 bra 	$L__BB0_83;

	setp.gtu.f32 	%p101, %f141, 0f7F800000;
	@%p101 bra 	$L__BB0_82;
	bra.uni 	$L__BB0_80;

$L__BB0_82:
	add.f32 	%f1205, %f137, 0f3EE66666;
	bra.uni 	$L__BB0_83;

$L__BB0_80:
	setp.neu.f32 	%p102, %f141, 0f7F800000;
	@%p102 bra 	$L__BB0_83;

	selp.f32 	%f1205, 0fFF800000, 0f7F800000, %p4;

$L__BB0_83:
	setp.eq.f32 	%p103, %f137, 0f3F800000;
	selp.f32 	%f152, 0f3F800000, %f1205, %p103;
	abs.f32 	%f153, %f138;
	setp.lt.f32 	%p104, %f153, 0f00800000;
	mul.f32 	%f689, %f153, 0f4B800000;
	selp.f32 	%f690, %f689, %f153, %p104;
	selp.f32 	%f691, 0fC3170000, 0fC2FE0000, %p104;
	mov.b32 	%r338, %f690;
	and.b32  	%r339, %r338, 8388607;
	or.b32  	%r340, %r339, 1065353216;
	mov.b32 	%f692, %r340;
	shr.u32 	%r341, %r338, 23;
	cvt.rn.f32.u32 	%f693, %r341;
	add.f32 	%f694, %f691, %f693;
	setp.gt.f32 	%p105, %f692, 0f3FB504F3;
	mul.f32 	%f695, %f692, 0f3F000000;
	add.f32 	%f696, %f694, 0f3F800000;
	selp.f32 	%f697, %f696, %f694, %p105;
	selp.f32 	%f698, %f695, %f692, %p105;
	add.f32 	%f699, %f698, 0fBF800000;
	add.f32 	%f700, %f698, 0f3F800000;
	rcp.approx.ftz.f32 	%f701, %f700;
	add.f32 	%f702, %f699, %f699;
	mul.f32 	%f703, %f702, %f701;
	mul.f32 	%f704, %f703, %f703;
	mov.f32 	%f705, 0f3C4CAF63;
	mov.f32 	%f706, 0f3B18F0FE;
	fma.rn.f32 	%f707, %f706, %f704, %f705;
	mov.f32 	%f708, 0f3DAAAABD;
	fma.rn.f32 	%f709, %f707, %f704, %f708;
	mul.rn.f32 	%f710, %f709, %f704;
	mul.rn.f32 	%f711, %f710, %f703;
	sub.f32 	%f712, %f699, %f703;
	add.f32 	%f713, %f712, %f712;
	neg.f32 	%f714, %f703;
	fma.rn.f32 	%f715, %f714, %f699, %f713;
	mul.rn.f32 	%f716, %f701, %f715;
	add.f32 	%f717, %f711, %f703;
	sub.f32 	%f718, %f703, %f717;
	add.f32 	%f719, %f711, %f718;
	add.f32 	%f720, %f716, %f719;
	add.f32 	%f721, %f717, %f720;
	sub.f32 	%f722, %f717, %f721;
	add.f32 	%f723, %f720, %f722;
	mov.f32 	%f724, 0f3F317200;
	mul.rn.f32 	%f725, %f697, %f724;
	mov.f32 	%f726, 0f35BFBE8E;
	mul.rn.f32 	%f727, %f697, %f726;
	add.f32 	%f728, %f725, %f721;
	sub.f32 	%f729, %f725, %f728;
	add.f32 	%f730, %f721, %f729;
	add.f32 	%f731, %f723, %f730;
	add.f32 	%f732, %f727, %f731;
	add.f32 	%f733, %f728, %f732;
	sub.f32 	%f734, %f728, %f733;
	add.f32 	%f735, %f732, %f734;
	mov.f32 	%f736, 0f3EE66666;
	mul.rn.f32 	%f737, %f736, %f733;
	neg.f32 	%f738, %f737;
	fma.rn.f32 	%f739, %f736, %f733, %f738;
	fma.rn.f32 	%f740, %f736, %f735, %f739;
	mov.f32 	%f741, 0f00000000;
	fma.rn.f32 	%f742, %f741, %f733, %f740;
	add.rn.f32 	%f743, %f737, %f742;
	neg.f32 	%f744, %f743;
	add.rn.f32 	%f745, %f737, %f744;
	add.rn.f32 	%f746, %f745, %f742;
	mov.b32 	%r342, %f743;
	setp.eq.s32 	%p106, %r342, 1118925336;
	add.s32 	%r343, %r342, -1;
	mov.b32 	%f747, %r343;
	add.f32 	%f748, %f746, 0f37000000;
	selp.f32 	%f154, %f748, %f746, %p106;
	selp.f32 	%f749, %f747, %f743, %p106;
	mov.f32 	%f750, 0f3FB8AA3B;
	mul.rn.f32 	%f751, %f749, %f750;
	cvt.rzi.f32.f32 	%f752, %f751;
	abs.f32 	%f753, %f752;
	setp.gt.f32 	%p107, %f753, 0f42FC0000;
	mov.b32 	%r344, %f752;
	and.b32  	%r345, %r344, -2147483648;
	or.b32  	%r346, %r345, 1123811328;
	mov.b32 	%f754, %r346;
	selp.f32 	%f755, %f754, %f752, %p107;
	mov.f32 	%f756, 0fBF317218;
	fma.rn.f32 	%f757, %f755, %f756, %f749;
	mov.f32 	%f758, 0f3102E308;
	fma.rn.f32 	%f759, %f755, %f758, %f757;
	mul.f32 	%f760, %f759, 0f3FB8AA3B;
	add.f32 	%f761, %f755, 0f4B40007F;
	mov.b32 	%r347, %f761;
	shl.b32 	%r348, %r347, 23;
	mov.b32 	%f762, %r348;
	ex2.approx.ftz.f32 	%f763, %f760;
	mul.f32 	%f155, %f763, %f762;
	setp.eq.f32 	%p108, %f155, 0f7F800000;
	mov.f32 	%f1206, 0f7F800000;
	@%p108 bra 	$L__BB0_85;

	fma.rn.f32 	%f1206, %f155, %f154, %f155;

$L__BB0_85:
	setp.lt.f32 	%p109, %f138, 0f00000000;
	and.pred  	%p5, %p109, %p95;
	setp.eq.f32 	%p111, %f138, 0f00000000;
	@%p111 bra 	$L__BB0_89;
	bra.uni 	$L__BB0_86;

$L__BB0_89:
	add.f32 	%f768, %f138, %f138;
	selp.f32 	%f1208, %f768, 0f00000000, %p95;
	bra.uni 	$L__BB0_90;

$L__BB0_86:
	mov.b32 	%r349, %f1206;
	xor.b32  	%r350, %r349, -2147483648;
	mov.b32 	%f764, %r350;
	selp.f32 	%f1208, %f764, %f1206, %p5;
	setp.geu.f32 	%p112, %f138, 0f00000000;
	@%p112 bra 	$L__BB0_90;

	mov.f32 	%f765, 0f3EE66666;
	cvt.rzi.f32.f32 	%f766, %f765;
	setp.eq.f32 	%p113, %f766, 0f3EE66666;
	@%p113 bra 	$L__BB0_90;

	mov.f32 	%f1208, 0f7FFFFFFF;

$L__BB0_90:
	add.f32 	%f769, %f153, 0f3EE66666;
	mov.b32 	%r351, %f769;
	setp.lt.s32 	%p115, %r351, 2139095040;
	@%p115 bra 	$L__BB0_95;

	setp.gtu.f32 	%p116, %f153, 0f7F800000;
	@%p116 bra 	$L__BB0_94;
	bra.uni 	$L__BB0_92;

$L__BB0_94:
	add.f32 	%f1208, %f138, 0f3EE66666;
	bra.uni 	$L__BB0_95;

$L__BB0_92:
	setp.neu.f32 	%p117, %f153, 0f7F800000;
	@%p117 bra 	$L__BB0_95;

	selp.f32 	%f1208, 0fFF800000, 0f7F800000, %p5;

$L__BB0_95:
	setp.eq.f32 	%p118, %f138, 0f3F800000;
	selp.f32 	%f164, 0f3F800000, %f1208, %p118;
	abs.f32 	%f165, %f139;
	setp.lt.f32 	%p119, %f165, 0f00800000;
	mul.f32 	%f771, %f165, 0f4B800000;
	selp.f32 	%f772, %f771, %f165, %p119;
	selp.f32 	%f773, 0fC3170000, 0fC2FE0000, %p119;
	mov.b32 	%r352, %f772;
	and.b32  	%r353, %r352, 8388607;
	or.b32  	%r354, %r353, 1065353216;
	mov.b32 	%f774, %r354;
	shr.u32 	%r355, %r352, 23;
	cvt.rn.f32.u32 	%f775, %r355;
	add.f32 	%f776, %f773, %f775;
	setp.gt.f32 	%p120, %f774, 0f3FB504F3;
	mul.f32 	%f777, %f774, 0f3F000000;
	add.f32 	%f778, %f776, 0f3F800000;
	selp.f32 	%f779, %f778, %f776, %p120;
	selp.f32 	%f780, %f777, %f774, %p120;
	add.f32 	%f781, %f780, 0fBF800000;
	add.f32 	%f782, %f780, 0f3F800000;
	rcp.approx.ftz.f32 	%f783, %f782;
	add.f32 	%f784, %f781, %f781;
	mul.f32 	%f785, %f784, %f783;
	mul.f32 	%f786, %f785, %f785;
	mov.f32 	%f787, 0f3C4CAF63;
	mov.f32 	%f788, 0f3B18F0FE;
	fma.rn.f32 	%f789, %f788, %f786, %f787;
	mov.f32 	%f790, 0f3DAAAABD;
	fma.rn.f32 	%f791, %f789, %f786, %f790;
	mul.rn.f32 	%f792, %f791, %f786;
	mul.rn.f32 	%f793, %f792, %f785;
	sub.f32 	%f794, %f781, %f785;
	add.f32 	%f795, %f794, %f794;
	neg.f32 	%f796, %f785;
	fma.rn.f32 	%f797, %f796, %f781, %f795;
	mul.rn.f32 	%f798, %f783, %f797;
	add.f32 	%f799, %f793, %f785;
	sub.f32 	%f800, %f785, %f799;
	add.f32 	%f801, %f793, %f800;
	add.f32 	%f802, %f798, %f801;
	add.f32 	%f803, %f799, %f802;
	sub.f32 	%f804, %f799, %f803;
	add.f32 	%f805, %f802, %f804;
	mov.f32 	%f806, 0f3F317200;
	mul.rn.f32 	%f807, %f779, %f806;
	mov.f32 	%f808, 0f35BFBE8E;
	mul.rn.f32 	%f809, %f779, %f808;
	add.f32 	%f810, %f807, %f803;
	sub.f32 	%f811, %f807, %f810;
	add.f32 	%f812, %f803, %f811;
	add.f32 	%f813, %f805, %f812;
	add.f32 	%f814, %f809, %f813;
	add.f32 	%f815, %f810, %f814;
	sub.f32 	%f816, %f810, %f815;
	add.f32 	%f817, %f814, %f816;
	mov.f32 	%f818, 0f3EE66666;
	mul.rn.f32 	%f819, %f818, %f815;
	neg.f32 	%f820, %f819;
	fma.rn.f32 	%f821, %f818, %f815, %f820;
	fma.rn.f32 	%f822, %f818, %f817, %f821;
	mov.f32 	%f823, 0f00000000;
	fma.rn.f32 	%f824, %f823, %f815, %f822;
	add.rn.f32 	%f825, %f819, %f824;
	neg.f32 	%f826, %f825;
	add.rn.f32 	%f827, %f819, %f826;
	add.rn.f32 	%f828, %f827, %f824;
	mov.b32 	%r356, %f825;
	setp.eq.s32 	%p121, %r356, 1118925336;
	add.s32 	%r357, %r356, -1;
	mov.b32 	%f829, %r357;
	add.f32 	%f830, %f828, 0f37000000;
	selp.f32 	%f166, %f830, %f828, %p121;
	selp.f32 	%f831, %f829, %f825, %p121;
	mov.f32 	%f832, 0f3FB8AA3B;
	mul.rn.f32 	%f833, %f831, %f832;
	cvt.rzi.f32.f32 	%f834, %f833;
	abs.f32 	%f835, %f834;
	setp.gt.f32 	%p122, %f835, 0f42FC0000;
	mov.b32 	%r358, %f834;
	and.b32  	%r359, %r358, -2147483648;
	or.b32  	%r360, %r359, 1123811328;
	mov.b32 	%f836, %r360;
	selp.f32 	%f837, %f836, %f834, %p122;
	mov.f32 	%f838, 0fBF317218;
	fma.rn.f32 	%f839, %f837, %f838, %f831;
	mov.f32 	%f840, 0f3102E308;
	fma.rn.f32 	%f841, %f837, %f840, %f839;
	mul.f32 	%f842, %f841, 0f3FB8AA3B;
	add.f32 	%f843, %f837, 0f4B40007F;
	mov.b32 	%r361, %f843;
	shl.b32 	%r362, %r361, 23;
	mov.b32 	%f844, %r362;
	ex2.approx.ftz.f32 	%f845, %f842;
	mul.f32 	%f167, %f845, %f844;
	setp.eq.f32 	%p123, %f167, 0f7F800000;
	mov.f32 	%f1209, 0f7F800000;
	@%p123 bra 	$L__BB0_97;

	fma.rn.f32 	%f1209, %f167, %f166, %f167;

$L__BB0_97:
	setp.lt.f32 	%p124, %f139, 0f00000000;
	and.pred  	%p6, %p124, %p95;
	setp.eq.f32 	%p126, %f139, 0f00000000;
	@%p126 bra 	$L__BB0_101;
	bra.uni 	$L__BB0_98;

$L__BB0_101:
	add.f32 	%f850, %f139, %f139;
	selp.f32 	%f1211, %f850, 0f00000000, %p95;
	bra.uni 	$L__BB0_102;

$L__BB0_98:
	mov.b32 	%r363, %f1209;
	xor.b32  	%r364, %r363, -2147483648;
	mov.b32 	%f846, %r364;
	selp.f32 	%f1211, %f846, %f1209, %p6;
	setp.geu.f32 	%p127, %f139, 0f00000000;
	@%p127 bra 	$L__BB0_102;

	mov.f32 	%f847, 0f3EE66666;
	cvt.rzi.f32.f32 	%f848, %f847;
	setp.eq.f32 	%p128, %f848, 0f3EE66666;
	@%p128 bra 	$L__BB0_102;

	mov.f32 	%f1211, 0f7FFFFFFF;

$L__BB0_102:
	add.f32 	%f851, %f165, 0f3EE66666;
	mov.b32 	%r365, %f851;
	setp.lt.s32 	%p130, %r365, 2139095040;
	@%p130 bra 	$L__BB0_107;

	setp.gtu.f32 	%p131, %f165, 0f7F800000;
	@%p131 bra 	$L__BB0_106;
	bra.uni 	$L__BB0_104;

$L__BB0_106:
	add.f32 	%f1211, %f139, 0f3EE66666;
	bra.uni 	$L__BB0_107;

$L__BB0_104:
	setp.neu.f32 	%p132, %f165, 0f7F800000;
	@%p132 bra 	$L__BB0_107;

	selp.f32 	%f1211, 0fFF800000, 0f7F800000, %p6;

$L__BB0_107:
	setp.eq.f32 	%p133, %f139, 0f3F800000;
	mov.f32 	%f853, 0f3F800000;
	selp.f32 	%f854, 0f3F800000, %f1211, %p133;
	ld.const.u64 	%rd71, [params+144];
	cvta.to.global.u64 	%rd21, %rd71;
	ld.const.u32 	%r366, [params+136];
	mad.lo.s32 	%r367, %r366, %r7, %r6;
	cvt.u64.u32 	%rd22, %r367;
	min.f32 	%f855, %f152, %f853;
	mov.f32 	%f856, 0f00000000;
	max.f32 	%f176, %f856, %f855;
	min.f32 	%f857, %f164, %f853;
	max.f32 	%f177, %f856, %f857;
	min.f32 	%f858, %f854, %f853;
	max.f32 	%f178, %f856, %f858;
	mov.f32 	%f859, 0f3E555555;
	cvt.rzi.f32.f32 	%f860, %f859;
	add.f32 	%f861, %f860, %f860;
	mov.f32 	%f862, 0f3ED55555;
	sub.f32 	%f863, %f862, %f861;
	abs.f32 	%f179, %f863;
	abs.f32 	%f180, %f176;
	setp.lt.f32 	%p134, %f180, 0f00800000;
	mul.f32 	%f864, %f180, 0f4B800000;
	selp.f32 	%f865, %f864, %f180, %p134;
	selp.f32 	%f866, 0fC3170000, 0fC2FE0000, %p134;
	mov.b32 	%r368, %f865;
	and.b32  	%r369, %r368, 8388607;
	or.b32  	%r370, %r369, 1065353216;
	mov.b32 	%f867, %r370;
	shr.u32 	%r371, %r368, 23;
	cvt.rn.f32.u32 	%f868, %r371;
	add.f32 	%f869, %f866, %f868;
	setp.gt.f32 	%p135, %f867, 0f3FB504F3;
	mul.f32 	%f870, %f867, 0f3F000000;
	add.f32 	%f871, %f869, 0f3F800000;
	selp.f32 	%f872, %f871, %f869, %p135;
	selp.f32 	%f873, %f870, %f867, %p135;
	add.f32 	%f874, %f873, 0fBF800000;
	add.f32 	%f875, %f873, 0f3F800000;
	rcp.approx.ftz.f32 	%f876, %f875;
	add.f32 	%f877, %f874, %f874;
	mul.f32 	%f878, %f877, %f876;
	mul.f32 	%f879, %f878, %f878;
	mov.f32 	%f880, 0f3C4CAF63;
	mov.f32 	%f881, 0f3B18F0FE;
	fma.rn.f32 	%f882, %f881, %f879, %f880;
	mov.f32 	%f883, 0f3DAAAABD;
	fma.rn.f32 	%f884, %f882, %f879, %f883;
	mul.rn.f32 	%f885, %f884, %f879;
	mul.rn.f32 	%f886, %f885, %f878;
	sub.f32 	%f887, %f874, %f878;
	add.f32 	%f888, %f887, %f887;
	neg.f32 	%f889, %f878;
	fma.rn.f32 	%f890, %f889, %f874, %f888;
	mul.rn.f32 	%f891, %f876, %f890;
	add.f32 	%f892, %f886, %f878;
	sub.f32 	%f893, %f878, %f892;
	add.f32 	%f894, %f886, %f893;
	add.f32 	%f895, %f891, %f894;
	add.f32 	%f896, %f892, %f895;
	sub.f32 	%f897, %f892, %f896;
	add.f32 	%f898, %f895, %f897;
	mov.f32 	%f899, 0f3F317200;
	mul.rn.f32 	%f900, %f872, %f899;
	mov.f32 	%f901, 0f35BFBE8E;
	mul.rn.f32 	%f902, %f872, %f901;
	add.f32 	%f903, %f900, %f896;
	sub.f32 	%f904, %f900, %f903;
	add.f32 	%f905, %f896, %f904;
	add.f32 	%f906, %f898, %f905;
	add.f32 	%f907, %f902, %f906;
	add.f32 	%f908, %f903, %f907;
	sub.f32 	%f909, %f903, %f908;
	add.f32 	%f910, %f907, %f909;
	mul.rn.f32 	%f911, %f862, %f908;
	neg.f32 	%f912, %f911;
	fma.rn.f32 	%f913, %f862, %f908, %f912;
	fma.rn.f32 	%f914, %f862, %f910, %f913;
	fma.rn.f32 	%f915, %f856, %f908, %f914;
	add.rn.f32 	%f916, %f911, %f915;
	neg.f32 	%f917, %f916;
	add.rn.f32 	%f918, %f911, %f917;
	add.rn.f32 	%f919, %f918, %f915;
	mov.b32 	%r372, %f916;
	setp.eq.s32 	%p136, %r372, 1118925336;
	add.s32 	%r373, %r372, -1;
	mov.b32 	%f920, %r373;
	add.f32 	%f921, %f919, 0f37000000;
	selp.f32 	%f181, %f921, %f919, %p136;
	selp.f32 	%f922, %f920, %f916, %p136;
	mov.f32 	%f923, 0f3FB8AA3B;
	mul.rn.f32 	%f924, %f922, %f923;
	cvt.rzi.f32.f32 	%f925, %f924;
	abs.f32 	%f926, %f925;
	setp.gt.f32 	%p137, %f926, 0f42FC0000;
	mov.b32 	%r374, %f925;
	and.b32  	%r375, %r374, -2147483648;
	or.b32  	%r376, %r375, 1123811328;
	mov.b32 	%f927, %r376;
	selp.f32 	%f928, %f927, %f925, %p137;
	mov.f32 	%f929, 0fBF317218;
	fma.rn.f32 	%f930, %f928, %f929, %f922;
	mov.f32 	%f931, 0f3102E308;
	fma.rn.f32 	%f932, %f928, %f931, %f930;
	mul.f32 	%f933, %f932, 0f3FB8AA3B;
	add.f32 	%f934, %f928, 0f4B40007F;
	mov.b32 	%r377, %f934;
	shl.b32 	%r378, %r377, 23;
	mov.b32 	%f935, %r378;
	ex2.approx.ftz.f32 	%f936, %f933;
	mul.f32 	%f182, %f936, %f935;
	setp.eq.f32 	%p138, %f182, 0f7F800000;
	mov.f32 	%f1212, 0f7F800000;
	@%p138 bra 	$L__BB0_109;

	fma.rn.f32 	%f1212, %f182, %f181, %f182;

$L__BB0_109:
	setp.lt.f32 	%p139, %f176, 0f00000000;
	setp.eq.f32 	%p140, %f179, 0f3F800000;
	and.pred  	%p7, %p139, %p140;
	setp.eq.f32 	%p141, %f176, 0f00000000;
	@%p141 bra 	$L__BB0_113;
	bra.uni 	$L__BB0_110;

$L__BB0_113:
	add.f32 	%f941, %f176, %f176;
	selp.f32 	%f1214, %f941, 0f00000000, %p140;
	bra.uni 	$L__BB0_114;

$L__BB0_110:
	mov.b32 	%r379, %f1212;
	xor.b32  	%r380, %r379, -2147483648;
	mov.b32 	%f937, %r380;
	selp.f32 	%f1214, %f937, %f1212, %p7;
	setp.geu.f32 	%p142, %f176, 0f00000000;
	@%p142 bra 	$L__BB0_114;

	mov.f32 	%f938, 0f3ED55555;
	cvt.rzi.f32.f32 	%f939, %f938;
	setp.eq.f32 	%p143, %f939, 0f3ED55555;
	@%p143 bra 	$L__BB0_114;

	mov.f32 	%f1214, 0f7FFFFFFF;

$L__BB0_114:
	add.f32 	%f942, %f180, 0f3ED55555;
	mov.b32 	%r381, %f942;
	setp.lt.s32 	%p145, %r381, 2139095040;
	@%p145 bra 	$L__BB0_119;

	setp.gtu.f32 	%p146, %f180, 0f7F800000;
	@%p146 bra 	$L__BB0_118;
	bra.uni 	$L__BB0_116;

$L__BB0_118:
	add.f32 	%f1214, %f176, 0f3ED55555;
	bra.uni 	$L__BB0_119;

$L__BB0_116:
	setp.neu.f32 	%p147, %f180, 0f7F800000;
	@%p147 bra 	$L__BB0_119;

	selp.f32 	%f1214, 0fFF800000, 0f7F800000, %p7;

$L__BB0_119:
	abs.f32 	%f191, %f177;
	setp.lt.f32 	%p148, %f191, 0f00800000;
	mul.f32 	%f944, %f191, 0f4B800000;
	selp.f32 	%f945, %f944, %f191, %p148;
	selp.f32 	%f946, 0fC3170000, 0fC2FE0000, %p148;
	mov.b32 	%r382, %f945;
	and.b32  	%r383, %r382, 8388607;
	or.b32  	%r384, %r383, 1065353216;
	mov.b32 	%f947, %r384;
	shr.u32 	%r385, %r382, 23;
	cvt.rn.f32.u32 	%f948, %r385;
	add.f32 	%f949, %f946, %f948;
	setp.gt.f32 	%p149, %f947, 0f3FB504F3;
	mul.f32 	%f950, %f947, 0f3F000000;
	add.f32 	%f951, %f949, 0f3F800000;
	selp.f32 	%f952, %f951, %f949, %p149;
	selp.f32 	%f953, %f950, %f947, %p149;
	add.f32 	%f954, %f953, 0fBF800000;
	add.f32 	%f955, %f953, 0f3F800000;
	rcp.approx.ftz.f32 	%f956, %f955;
	add.f32 	%f957, %f954, %f954;
	mul.f32 	%f958, %f957, %f956;
	mul.f32 	%f959, %f958, %f958;
	mov.f32 	%f960, 0f3C4CAF63;
	mov.f32 	%f961, 0f3B18F0FE;
	fma.rn.f32 	%f962, %f961, %f959, %f960;
	mov.f32 	%f963, 0f3DAAAABD;
	fma.rn.f32 	%f964, %f962, %f959, %f963;
	mul.rn.f32 	%f965, %f964, %f959;
	mul.rn.f32 	%f966, %f965, %f958;
	sub.f32 	%f967, %f954, %f958;
	add.f32 	%f968, %f967, %f967;
	neg.f32 	%f969, %f958;
	fma.rn.f32 	%f970, %f969, %f954, %f968;
	mul.rn.f32 	%f971, %f956, %f970;
	add.f32 	%f972, %f966, %f958;
	sub.f32 	%f973, %f958, %f972;
	add.f32 	%f974, %f966, %f973;
	add.f32 	%f975, %f971, %f974;
	add.f32 	%f976, %f972, %f975;
	sub.f32 	%f977, %f972, %f976;
	add.f32 	%f978, %f975, %f977;
	mov.f32 	%f979, 0f3F317200;
	mul.rn.f32 	%f980, %f952, %f979;
	mov.f32 	%f981, 0f35BFBE8E;
	mul.rn.f32 	%f982, %f952, %f981;
	add.f32 	%f983, %f980, %f976;
	sub.f32 	%f984, %f980, %f983;
	add.f32 	%f985, %f976, %f984;
	add.f32 	%f986, %f978, %f985;
	add.f32 	%f987, %f982, %f986;
	add.f32 	%f988, %f983, %f987;
	sub.f32 	%f989, %f983, %f988;
	add.f32 	%f990, %f987, %f989;
	mov.f32 	%f991, 0f3ED55555;
	mul.rn.f32 	%f992, %f991, %f988;
	neg.f32 	%f993, %f992;
	fma.rn.f32 	%f994, %f991, %f988, %f993;
	fma.rn.f32 	%f995, %f991, %f990, %f994;
	mov.f32 	%f996, 0f00000000;
	fma.rn.f32 	%f997, %f996, %f988, %f995;
	add.rn.f32 	%f998, %f992, %f997;
	neg.f32 	%f999, %f998;
	add.rn.f32 	%f1000, %f992, %f999;
	add.rn.f32 	%f1001, %f1000, %f997;
	mov.b32 	%r386, %f998;
	setp.eq.s32 	%p150, %r386, 1118925336;
	add.s32 	%r387, %r386, -1;
	mov.b32 	%f1002, %r387;
	add.f32 	%f1003, %f1001, 0f37000000;
	selp.f32 	%f192, %f1003, %f1001, %p150;
	selp.f32 	%f1004, %f1002, %f998, %p150;
	mov.f32 	%f1005, 0f3FB8AA3B;
	mul.rn.f32 	%f1006, %f1004, %f1005;
	cvt.rzi.f32.f32 	%f1007, %f1006;
	abs.f32 	%f1008, %f1007;
	setp.gt.f32 	%p151, %f1008, 0f42FC0000;
	mov.b32 	%r388, %f1007;
	and.b32  	%r389, %r388, -2147483648;
	or.b32  	%r390, %r389, 1123811328;
	mov.b32 	%f1009, %r390;
	selp.f32 	%f1010, %f1009, %f1007, %p151;
	mov.f32 	%f1011, 0fBF317218;
	fma.rn.f32 	%f1012, %f1010, %f1011, %f1004;
	mov.f32 	%f1013, 0f3102E308;
	fma.rn.f32 	%f1014, %f1010, %f1013, %f1012;
	mul.f32 	%f1015, %f1014, 0f3FB8AA3B;
	add.f32 	%f1016, %f1010, 0f4B40007F;
	mov.b32 	%r391, %f1016;
	shl.b32 	%r392, %r391, 23;
	mov.b32 	%f1017, %r392;
	ex2.approx.ftz.f32 	%f1018, %f1015;
	mul.f32 	%f193, %f1018, %f1017;
	setp.eq.f32 	%p152, %f193, 0f7F800000;
	mov.f32 	%f1215, 0f7F800000;
	@%p152 bra 	$L__BB0_121;

	fma.rn.f32 	%f1215, %f193, %f192, %f193;

$L__BB0_121:
	setp.lt.f32 	%p153, %f177, 0f00000000;
	and.pred  	%p8, %p153, %p140;
	setp.eq.f32 	%p155, %f177, 0f00000000;
	@%p155 bra 	$L__BB0_125;
	bra.uni 	$L__BB0_122;

$L__BB0_125:
	add.f32 	%f1023, %f177, %f177;
	selp.f32 	%f1217, %f1023, 0f00000000, %p140;
	bra.uni 	$L__BB0_126;

$L__BB0_122:
	mov.b32 	%r393, %f1215;
	xor.b32  	%r394, %r393, -2147483648;
	mov.b32 	%f1019, %r394;
	selp.f32 	%f1217, %f1019, %f1215, %p8;
	setp.geu.f32 	%p156, %f177, 0f00000000;
	@%p156 bra 	$L__BB0_126;

	mov.f32 	%f1020, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1021, %f1020;
	setp.eq.f32 	%p157, %f1021, 0f3ED55555;
	@%p157 bra 	$L__BB0_126;

	mov.f32 	%f1217, 0f7FFFFFFF;

$L__BB0_126:
	add.f32 	%f1024, %f191, 0f3ED55555;
	mov.b32 	%r395, %f1024;
	setp.lt.s32 	%p159, %r395, 2139095040;
	@%p159 bra 	$L__BB0_131;

	setp.gtu.f32 	%p160, %f191, 0f7F800000;
	@%p160 bra 	$L__BB0_130;
	bra.uni 	$L__BB0_128;

$L__BB0_130:
	add.f32 	%f1217, %f177, 0f3ED55555;
	bra.uni 	$L__BB0_131;

$L__BB0_128:
	setp.neu.f32 	%p161, %f191, 0f7F800000;
	@%p161 bra 	$L__BB0_131;

	selp.f32 	%f1217, 0fFF800000, 0f7F800000, %p8;

$L__BB0_131:
	abs.f32 	%f202, %f178;
	setp.lt.f32 	%p162, %f202, 0f00800000;
	mul.f32 	%f1026, %f202, 0f4B800000;
	selp.f32 	%f1027, %f1026, %f202, %p162;
	selp.f32 	%f1028, 0fC3170000, 0fC2FE0000, %p162;
	mov.b32 	%r396, %f1027;
	and.b32  	%r397, %r396, 8388607;
	or.b32  	%r398, %r397, 1065353216;
	mov.b32 	%f1029, %r398;
	shr.u32 	%r399, %r396, 23;
	cvt.rn.f32.u32 	%f1030, %r399;
	add.f32 	%f1031, %f1028, %f1030;
	setp.gt.f32 	%p163, %f1029, 0f3FB504F3;
	mul.f32 	%f1032, %f1029, 0f3F000000;
	add.f32 	%f1033, %f1031, 0f3F800000;
	selp.f32 	%f1034, %f1033, %f1031, %p163;
	selp.f32 	%f1035, %f1032, %f1029, %p163;
	add.f32 	%f1036, %f1035, 0fBF800000;
	add.f32 	%f1037, %f1035, 0f3F800000;
	rcp.approx.ftz.f32 	%f1038, %f1037;
	add.f32 	%f1039, %f1036, %f1036;
	mul.f32 	%f1040, %f1039, %f1038;
	mul.f32 	%f1041, %f1040, %f1040;
	mov.f32 	%f1042, 0f3C4CAF63;
	mov.f32 	%f1043, 0f3B18F0FE;
	fma.rn.f32 	%f1044, %f1043, %f1041, %f1042;
	mov.f32 	%f1045, 0f3DAAAABD;
	fma.rn.f32 	%f1046, %f1044, %f1041, %f1045;
	mul.rn.f32 	%f1047, %f1046, %f1041;
	mul.rn.f32 	%f1048, %f1047, %f1040;
	sub.f32 	%f1049, %f1036, %f1040;
	add.f32 	%f1050, %f1049, %f1049;
	neg.f32 	%f1051, %f1040;
	fma.rn.f32 	%f1052, %f1051, %f1036, %f1050;
	mul.rn.f32 	%f1053, %f1038, %f1052;
	add.f32 	%f1054, %f1048, %f1040;
	sub.f32 	%f1055, %f1040, %f1054;
	add.f32 	%f1056, %f1048, %f1055;
	add.f32 	%f1057, %f1053, %f1056;
	add.f32 	%f1058, %f1054, %f1057;
	sub.f32 	%f1059, %f1054, %f1058;
	add.f32 	%f1060, %f1057, %f1059;
	mov.f32 	%f1061, 0f3F317200;
	mul.rn.f32 	%f1062, %f1034, %f1061;
	mov.f32 	%f1063, 0f35BFBE8E;
	mul.rn.f32 	%f1064, %f1034, %f1063;
	add.f32 	%f1065, %f1062, %f1058;
	sub.f32 	%f1066, %f1062, %f1065;
	add.f32 	%f1067, %f1058, %f1066;
	add.f32 	%f1068, %f1060, %f1067;
	add.f32 	%f1069, %f1064, %f1068;
	add.f32 	%f1070, %f1065, %f1069;
	sub.f32 	%f1071, %f1065, %f1070;
	add.f32 	%f1072, %f1069, %f1071;
	mov.f32 	%f1073, 0f3ED55555;
	mul.rn.f32 	%f1074, %f1073, %f1070;
	neg.f32 	%f1075, %f1074;
	fma.rn.f32 	%f1076, %f1073, %f1070, %f1075;
	fma.rn.f32 	%f1077, %f1073, %f1072, %f1076;
	mov.f32 	%f1078, 0f00000000;
	fma.rn.f32 	%f1079, %f1078, %f1070, %f1077;
	add.rn.f32 	%f1080, %f1074, %f1079;
	neg.f32 	%f1081, %f1080;
	add.rn.f32 	%f1082, %f1074, %f1081;
	add.rn.f32 	%f1083, %f1082, %f1079;
	mov.b32 	%r400, %f1080;
	setp.eq.s32 	%p164, %r400, 1118925336;
	add.s32 	%r401, %r400, -1;
	mov.b32 	%f1084, %r401;
	add.f32 	%f1085, %f1083, 0f37000000;
	selp.f32 	%f203, %f1085, %f1083, %p164;
	selp.f32 	%f1086, %f1084, %f1080, %p164;
	mov.f32 	%f1087, 0f3FB8AA3B;
	mul.rn.f32 	%f1088, %f1086, %f1087;
	cvt.rzi.f32.f32 	%f1089, %f1088;
	abs.f32 	%f1090, %f1089;
	setp.gt.f32 	%p165, %f1090, 0f42FC0000;
	mov.b32 	%r402, %f1089;
	and.b32  	%r403, %r402, -2147483648;
	or.b32  	%r404, %r403, 1123811328;
	mov.b32 	%f1091, %r404;
	selp.f32 	%f1092, %f1091, %f1089, %p165;
	mov.f32 	%f1093, 0fBF317218;
	fma.rn.f32 	%f1094, %f1092, %f1093, %f1086;
	mov.f32 	%f1095, 0f3102E308;
	fma.rn.f32 	%f1096, %f1092, %f1095, %f1094;
	mul.f32 	%f1097, %f1096, 0f3FB8AA3B;
	add.f32 	%f1098, %f1092, 0f4B40007F;
	mov.b32 	%r405, %f1098;
	shl.b32 	%r406, %r405, 23;
	mov.b32 	%f1099, %r406;
	ex2.approx.ftz.f32 	%f1100, %f1097;
	mul.f32 	%f204, %f1100, %f1099;
	setp.eq.f32 	%p166, %f204, 0f7F800000;
	mov.f32 	%f1218, 0f7F800000;
	@%p166 bra 	$L__BB0_133;

	fma.rn.f32 	%f1218, %f204, %f203, %f204;

$L__BB0_133:
	setp.lt.f32 	%p167, %f178, 0f00000000;
	and.pred  	%p9, %p167, %p140;
	setp.eq.f32 	%p169, %f178, 0f00000000;
	@%p169 bra 	$L__BB0_137;
	bra.uni 	$L__BB0_134;

$L__BB0_137:
	add.f32 	%f1105, %f178, %f178;
	selp.f32 	%f1220, %f1105, 0f00000000, %p140;
	bra.uni 	$L__BB0_138;

$L__BB0_134:
	mov.b32 	%r407, %f1218;
	xor.b32  	%r408, %r407, -2147483648;
	mov.b32 	%f1101, %r408;
	selp.f32 	%f1220, %f1101, %f1218, %p9;
	setp.geu.f32 	%p170, %f178, 0f00000000;
	@%p170 bra 	$L__BB0_138;

	mov.f32 	%f1102, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1103, %f1102;
	setp.eq.f32 	%p171, %f1103, 0f3ED55555;
	@%p171 bra 	$L__BB0_138;

	mov.f32 	%f1220, 0f7FFFFFFF;

$L__BB0_138:
	add.f32 	%f1106, %f202, 0f3ED55555;
	mov.b32 	%r409, %f1106;
	setp.lt.s32 	%p173, %r409, 2139095040;
	@%p173 bra 	$L__BB0_143;

	setp.gtu.f32 	%p174, %f202, 0f7F800000;
	@%p174 bra 	$L__BB0_142;
	bra.uni 	$L__BB0_140;

$L__BB0_142:
	add.f32 	%f1220, %f178, 0f3ED55555;
	bra.uni 	$L__BB0_143;

$L__BB0_140:
	setp.neu.f32 	%p175, %f202, 0f7F800000;
	@%p175 bra 	$L__BB0_143;

	selp.f32 	%f1220, 0fFF800000, 0f7F800000, %p9;

$L__BB0_143:
	fma.rn.f32 	%f1107, %f1214, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p176, %f176, 0f3F800000;
	mov.f32 	%f1108, 0f3F800000;
	selp.f32 	%f1109, 0f3F7FFFFF, %f1107, %p176;
	mul.f32 	%f1110, %f176, 0f414EB852;
	setp.lt.f32 	%p177, %f176, 0f3B4D2E1C;
	selp.f32 	%f1111, %f1110, %f1109, %p177;
	fma.rn.f32 	%f1112, %f1217, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p178, %f177, 0f3F800000;
	selp.f32 	%f1113, 0f3F7FFFFF, %f1112, %p178;
	mul.f32 	%f1114, %f177, 0f414EB852;
	setp.lt.f32 	%p179, %f177, 0f3B4D2E1C;
	selp.f32 	%f1115, %f1114, %f1113, %p179;
	fma.rn.f32 	%f1116, %f1220, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p180, %f178, 0f3F800000;
	selp.f32 	%f1117, 0f3F7FFFFF, %f1116, %p180;
	mul.f32 	%f1118, %f178, 0f414EB852;
	setp.lt.f32 	%p181, %f178, 0f3B4D2E1C;
	selp.f32 	%f1119, %f1118, %f1117, %p181;
	min.f32 	%f1120, %f1111, %f1108;
	mov.f32 	%f1121, 0f00000000;
	max.f32 	%f1122, %f1121, %f1120;
	mul.f32 	%f1123, %f1122, 0f43800000;
	cvt.rzi.u32.f32 	%r410, %f1123;
	min.u32 	%r411, %r410, 255;
	min.f32 	%f1124, %f1115, %f1108;
	max.f32 	%f1125, %f1121, %f1124;
	mul.f32 	%f1126, %f1125, 0f43800000;
	cvt.rzi.u32.f32 	%r412, %f1126;
	min.u32 	%r413, %r412, 255;
	min.f32 	%f1127, %f1119, %f1108;
	max.f32 	%f1128, %f1121, %f1127;
	mul.f32 	%f1129, %f1128, 0f43800000;
	cvt.rzi.u32.f32 	%r414, %f1129;
	min.u32 	%r415, %r414, 255;
	shl.b64 	%rd72, %rd22, 2;
	add.s64 	%rd73, %rd21, %rd72;
	cvt.u16.u32 	%rs18, %r415;
	cvt.u16.u32 	%rs19, %r413;
	cvt.u16.u32 	%rs20, %r411;
	mov.u16 	%rs21, 255;
	st.global.v4.u8 	[%rd73], {%rs20, %rs19, %rs18, %rs21};

$L__BB0_144:
	and.b32  	%r416, %r56, 4;
	setp.eq.s32 	%p182, %r416, 0;
	@%p182 bra 	$L__BB0_156;

	ld.const.u32 	%r417, [params+108];
	setp.eq.s32 	%p183, %r417, 0;
	ld.const.u64 	%rd74, [params+224];
	cvta.to.global.u64 	%rd75, %rd74;
	ld.const.u32 	%r418, [params+216];
	mad.lo.s32 	%r419, %r418, %r7, %r6;
	mul.wide.u32 	%rd76, %r419, 8;
	add.s64 	%rd23, %rd75, %rd76;
	@%p183 bra 	$L__BB0_147;

	ld.global.v4.u16 	{%rs29, %rs30, %rs31, %rs32}, [%rd23];
	// begin inline asm
	{  cvt.f32.f16 %f1130, %rs29;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1131, %rs30;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1132, %rs31;}

	// end inline asm
	add.f32 	%f1133, %f137, %f1130;
	add.f32 	%f1134, %f138, %f1131;
	add.f32 	%f1135, %f139, %f1132;
	mov.f32 	%f1136, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f1135;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs26, %f1134;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs25, %f1133;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f1136;}

	// end inline asm
	st.global.v4.u16 	[%rd23], {%rs25, %rs26, %rs27, %rs28};
	bra.uni 	$L__BB0_156;

$L__BB0_147:
	mov.f32 	%f1140, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs36, %f1140;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs35, %f139;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs34, %f138;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs33, %f137;}

	// end inline asm
	st.global.v4.u16 	[%rd23], {%rs33, %rs34, %rs35, %rs36};

$L__BB0_156:
	ret;

}