//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<146>;
	.reg .b16 	%rs<52>;
	.reg .f32 	%f<855>;
	.reg .b32 	%r<323>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<77>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r51), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r52), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u32 	%r3, [params+540];
	ld.const.u64 	%rd21, [params+400];
	cvta.to.global.u64 	%rd22, %rd21;
	ld.const.u32 	%r57, [params+392];
	mad.lo.s32 	%r58, %r57, %r52, %r51;
	mul.wide.u32 	%rd23, %r58, 4;
	add.s64 	%rd2, %rd22, %rd23;
	ld.global.v2.u8 	{%rs7, %rs51}, [%rd2];
	or.b16  	%rs9, %rs7, %rs51;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p7, %rs10, 0;
	@%p7 bra 	$L__BB0_2;

	ld.global.u8 	%rs50, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs50, [%rd2+2];
	setp.eq.s16 	%p8, %rs50, 0;
	mov.f32 	%f824, 0f00000000;
	mov.u16 	%rs51, 0;
	mov.f32 	%f825, %f824;
	mov.f32 	%f826, %f824;
	@%p8 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f136, %rs7;
	div.rn.f32 	%f137, %f136, 0f437F0000;
	fma.rn.f32 	%f138, %f137, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs51, 255;
	cvt.rn.f32.u16 	%f139, %rs13;
	div.rn.f32 	%f140, %f139, 0f437F0000;
	fma.rn.f32 	%f141, %f140, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f142, %rs50;
	div.rn.f32 	%f143, %f142, 0f437F0000;
	fma.rn.f32 	%f144, %f143, 0f40000000, 0fBF800000;
	mul.f32 	%f145, %f141, %f141;
	fma.rn.f32 	%f146, %f138, %f138, %f145;
	fma.rn.f32 	%f147, %f144, %f144, %f146;
	sqrt.rn.f32 	%f148, %f147;
	rcp.rn.f32 	%f149, %f148;
	mul.f32 	%f826, %f149, %f144;
	mul.f32 	%f825, %f149, %f141;
	mul.f32 	%f824, %f138, %f149;

$L__BB0_4:
	ld.const.v2.u32 	{%r59, %r60}, [params];
	add.s32 	%r4, %r59, %r51;
	add.s32 	%r5, %r60, %r52;
	setp.eq.f32 	%p9, %f824, 0f00000000;
	setp.eq.f32 	%p10, %f825, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	setp.eq.f32 	%p12, %f826, 0f00000000;
	and.pred  	%p13, %p12, %p11;
	@%p13 bra 	$L__BB0_114;
	bra.uni 	$L__BB0_5;

$L__BB0_114:
	ld.const.u32 	%r50, [params+104];
	and.b32  	%r302, %r50, 1;
	setp.eq.b32 	%p140, %r302, 1;
	mov.pred 	%p141, 0;
	xor.pred  	%p142, %p140, %p141;
	not.pred 	%p143, %p142;
	@%p143 bra 	$L__BB0_116;

	ld.const.u64 	%rd62, [params+144];
	cvta.to.global.u64 	%rd63, %rd62;
	ld.const.u32 	%r303, [params+136];
	mad.lo.s32 	%r304, %r303, %r5, %r4;
	mul.wide.u32 	%rd64, %r304, 4;
	add.s64 	%rd65, %rd63, %rd64;
	mov.u16 	%rs34, 0;
	st.global.v4.u8 	[%rd65], {%rs34, %rs34, %rs34, %rs34};

$L__BB0_116:
	and.b32  	%r305, %r50, 4;
	setp.eq.s32 	%p144, %r305, 0;
	@%p144 bra 	$L__BB0_120;

	ld.const.u32 	%r306, [params+108];
	setp.eq.s32 	%p145, %r306, 0;
	ld.const.u64 	%rd66, [params+224];
	cvta.to.global.u64 	%rd67, %rd66;
	ld.const.u32 	%r307, [params+216];
	mad.lo.s32 	%r308, %r307, %r5, %r4;
	mul.wide.u32 	%rd68, %r308, 8;
	add.s64 	%rd19, %rd67, %rd68;
	@%p145 bra 	$L__BB0_119;

	ld.global.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd19];
	// begin inline asm
	{  cvt.f32.f16 %f809, %rs41;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f810, %rs42;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f811, %rs43;}

	// end inline asm
	add.f32 	%f812, %f809, 0f00000000;
	add.f32 	%f813, %f810, 0f00000000;
	add.f32 	%f814, %f811, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs40, %f814;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs39, %f813;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs38, %f812;}

	// end inline asm
	mov.u16 	%rs45, 0;
	st.global.v4.u16 	[%rd19], {%rs38, %rs39, %rs40, %rs45};
	bra.uni 	$L__BB0_120;

$L__BB0_5:
	ld.const.u64 	%rd24, [params+432];
	cvta.to.global.u64 	%rd25, %rd24;
	ld.const.u32 	%r63, [params+424];
	mad.lo.s32 	%r64, %r63, %r52, %r51;
	mul.wide.u32 	%rd26, %r64, 12;
	add.s64 	%rd27, %rd25, %rd26;
	ld.global.f32 	%f151, [%rd27];
	mul.f32 	%f152, %f151, 0f3456BF95;
	ld.global.f32 	%f153, [%rd27+4];
	mul.f32 	%f154, %f153, 0f3456BF95;
	ld.global.f32 	%f155, [%rd27+8];
	mul.f32 	%f156, %f155, 0f3456BF95;
	abs.f32 	%f157, %f824;
	div.rn.f32 	%f158, %f152, %f157;
	abs.f32 	%f159, %f825;
	div.rn.f32 	%f160, %f154, %f159;
	abs.f32 	%f161, %f826;
	div.rn.f32 	%f162, %f156, %f161;
	abs.f32 	%f163, %f158;
	abs.f32 	%f164, %f160;
	abs.f32 	%f165, %f162;
	mov.f32 	%f166, 0f38D1B717;
	max.f32 	%f167, %f163, %f166;
	max.f32 	%f168, %f164, %f166;
	max.f32 	%f169, %f165, %f166;
	fma.rn.f32 	%f10, %f824, %f167, %f151;
	fma.rn.f32 	%f11, %f825, %f168, %f153;
	fma.rn.f32 	%f12, %f826, %f169, %f155;
	setp.gt.f32 	%p14, %f157, %f161;
	neg.f32 	%f170, %f825;
	selp.f32 	%f171, %f170, 0f00000000, %p14;
	mov.f32 	%f835, 0f00000000;
	neg.f32 	%f172, %f826;
	selp.f32 	%f173, %f824, %f172, %p14;
	selp.f32 	%f174, 0f00000000, %f825, %p14;
	mul.f32 	%f175, %f173, %f173;
	fma.rn.f32 	%f176, %f171, %f171, %f175;
	fma.rn.f32 	%f177, %f174, %f174, %f176;
	sqrt.rn.f32 	%f178, %f177;
	rcp.rn.f32 	%f179, %f178;
	mul.f32 	%f13, %f171, %f179;
	mul.f32 	%f14, %f173, %f179;
	mul.f32 	%f15, %f174, %f179;
	ld.const.u64 	%rd28, [params+128];
	cvta.to.global.u64 	%rd29, %rd28;
	ld.const.u32 	%r65, [params+120];
	mad.lo.s32 	%r66, %r65, %r52, %r51;
	mul.wide.u32 	%rd30, %r66, 4;
	add.s64 	%rd3, %rd29, %rd30;
	setp.lt.s32 	%p15, %r3, 1;
	@%p15 bra 	$L__BB0_36;

	ld.const.u32 	%r6, [params+588];
	cvt.rn.f32.s32 	%f181, %r3;
	rcp.rn.f32 	%f16, %f181;
	ld.global.u32 	%r315, [%rd3];
	mul.f32 	%f17, %f10, 0f3456BF95;
	mul.f32 	%f18, %f11, 0f3456BF95;
	mul.f32 	%f19, %f12, 0f3456BF95;
	ld.const.u64 	%rd4, [params+96];
	mul.f32 	%f182, %f824, %f14;
	mul.f32 	%f183, %f825, %f13;
	sub.f32 	%f20, %f183, %f182;
	mul.f32 	%f184, %f826, %f13;
	mul.f32 	%f185, %f824, %f15;
	sub.f32 	%f21, %f185, %f184;
	mul.f32 	%f186, %f825, %f15;
	mul.f32 	%f187, %f826, %f14;
	sub.f32 	%f22, %f187, %f186;
	mov.u32 	%r67, 0;
	add.s64 	%rd5, %rd1, 24;
	mov.u64 	%rd31, __cudart_i2opi_f;
	abs.f32 	%f254, %f17;
	abs.f32 	%f255, %f18;
	max.f32 	%f256, %f254, %f255;
	abs.f32 	%f257, %f19;
	max.f32 	%f258, %f256, %f257;
	mov.u32 	%r312, %r67;

$L__BB0_7:
	cvt.rn.f32.s32 	%f24, %r312;
	mov.u32 	%r314, %r67;

$L__BB0_8:
	mad.lo.s32 	%r69, %r315, 1664525, 1013904223;
	and.b32  	%r70, %r69, 16777215;
	cvt.rn.f32.u32 	%f188, %r70;
	fma.rn.f32 	%f189, %f188, 0f33800000, %f24;
	mul.f32 	%f190, %f16, %f189;
	mad.lo.s32 	%r315, %r69, 1664525, 1013904223;
	and.b32  	%r71, %r315, 16777215;
	cvt.rn.f32.u32 	%f191, %r71;
	cvt.rn.f32.s32 	%f192, %r314;
	fma.rn.f32 	%f193, %f191, 0f33800000, %f192;
	mul.f32 	%f194, %f16, %f193;
	sqrt.rn.f32 	%f26, %f190;
	mul.f32 	%f27, %f194, 0f40C90FDB;
	mul.f32 	%f195, %f27, 0f3F22F983;
	cvt.rni.s32.f32 	%r322, %f195;
	cvt.rn.f32.s32 	%f196, %r322;
	mov.f32 	%f197, 0fBFC90FDA;
	fma.rn.f32 	%f198, %f196, %f197, %f27;
	mov.f32 	%f199, 0fB3A22168;
	fma.rn.f32 	%f200, %f196, %f199, %f198;
	mov.f32 	%f201, 0fA7C234C5;
	fma.rn.f32 	%f832, %f196, %f201, %f200;
	abs.f32 	%f29, %f27;
	setp.ltu.f32 	%p16, %f29, 0f47CE4780;
	mov.u32 	%r319, %r322;
	mov.f32 	%f829, %f832;
	@%p16 bra 	$L__BB0_16;

	setp.eq.f32 	%p17, %f29, 0f7F800000;
	@%p17 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f204, 0f00000000;
	mul.rn.f32 	%f829, %f27, %f204;
	mov.u32 	%r319, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r14, %f27;
	bfe.u32 	%r73, %r14, 23, 8;
	add.s32 	%r15, %r73, -128;
	shl.b32 	%r74, %r14, 8;
	or.b32  	%r16, %r74, -2147483648;
	shr.u32 	%r17, %r15, 5;
	mov.u64 	%rd74, 0;
	mov.u32 	%r316, 0;
	mov.u64 	%rd72, %rd1;
	mov.u64 	%rd73, %rd31;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r75, [%rd73];
	mad.wide.u32 	%rd33, %r75, %r16, %rd74;
	shr.u64 	%rd74, %rd33, 32;
	st.local.u32 	[%rd72], %rd33;
	add.s64 	%rd73, %rd73, 4;
	add.s64 	%rd72, %rd72, 4;
	add.s32 	%r316, %r316, 1;
	setp.ne.s32 	%p18, %r316, 6;
	@%p18 bra 	$L__BB0_11;

	st.local.u32 	[%rd5], %rd74;
	mov.u32 	%r76, 4;
	sub.s32 	%r20, %r76, %r17;
	mov.u32 	%r77, 6;
	sub.s32 	%r78, %r77, %r17;
	mul.wide.s32 	%rd34, %r78, 4;
	add.s64 	%rd35, %rd1, %rd34;
	ld.local.u32 	%r317, [%rd35];
	ld.local.u32 	%r318, [%rd35+-4];
	and.b32  	%r23, %r15, 31;
	setp.eq.s32 	%p19, %r23, 0;
	@%p19 bra 	$L__BB0_14;

	mov.u32 	%r79, 32;
	sub.s32 	%r80, %r79, %r23;
	shr.u32 	%r81, %r318, %r80;
	shl.b32 	%r82, %r317, %r23;
	add.s32 	%r317, %r81, %r82;
	mul.wide.s32 	%rd36, %r20, 4;
	add.s64 	%rd37, %rd1, %rd36;
	ld.local.u32 	%r83, [%rd37];
	shr.u32 	%r84, %r83, %r80;
	shl.b32 	%r85, %r318, %r23;
	add.s32 	%r318, %r84, %r85;

$L__BB0_14:
	and.b32  	%r86, %r14, -2147483648;
	shr.u32 	%r87, %r318, 30;
	shl.b32 	%r88, %r317, 2;
	or.b32  	%r89, %r87, %r88;
	shr.u32 	%r90, %r89, 31;
	shr.u32 	%r91, %r317, 30;
	add.s32 	%r92, %r90, %r91;
	neg.s32 	%r93, %r92;
	setp.eq.s32 	%p20, %r86, 0;
	selp.b32 	%r319, %r92, %r93, %p20;
	setp.ne.s32 	%p21, %r90, 0;
	xor.b32  	%r94, %r86, -2147483648;
	selp.b32 	%r95, %r94, %r86, %p21;
	selp.b32 	%r96, -1, 0, %p21;
	xor.b32  	%r97, %r89, %r96;
	shl.b32 	%r98, %r318, 2;
	xor.b32  	%r99, %r98, %r96;
	cvt.u64.u32 	%rd38, %r97;
	cvt.u64.u32 	%rd39, %r99;
	bfi.b64 	%rd40, %rd38, %rd39, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd40;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f202, %fd2;
	setp.eq.s32 	%p22, %r95, 0;
	neg.f32 	%f203, %f202;
	selp.f32 	%f829, %f202, %f203, %p22;

$L__BB0_16:
	add.s32 	%r30, %r319, 1;
	and.b32  	%r31, %r30, 1;
	setp.eq.s32 	%p23, %r31, 0;
	selp.f32 	%f33, %f829, 0f3F800000, %p23;
	mul.rn.f32 	%f34, %f829, %f829;
	mov.f32 	%f830, 0fB94D4153;
	@%p23 bra 	$L__BB0_18;

	mov.f32 	%f206, 0fBAB607ED;
	mov.f32 	%f207, 0f37CBAC00;
	fma.rn.f32 	%f830, %f207, %f34, %f206;

$L__BB0_18:
	selp.f32 	%f208, 0f3C0885E4, 0f3D2AAABB, %p23;
	fma.rn.f32 	%f209, %f830, %f34, %f208;
	selp.f32 	%f210, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
	fma.rn.f32 	%f211, %f209, %f34, %f210;
	mov.f32 	%f212, 0f00000000;
	fma.rn.f32 	%f213, %f34, %f33, %f212;
	fma.rn.f32 	%f831, %f211, %f213, %f33;
	and.b32  	%r101, %r30, 2;
	setp.eq.s32 	%p25, %r101, 0;
	@%p25 bra 	$L__BB0_20;

	mov.f32 	%f215, 0fBF800000;
	fma.rn.f32 	%f831, %f831, %f215, %f212;

$L__BB0_20:
	@%p16 bra 	$L__BB0_28;

	setp.eq.f32 	%p27, %f29, 0f7F800000;
	@%p27 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f218, 0f00000000;
	mul.rn.f32 	%f832, %f27, %f218;
	mov.u32 	%r322, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r32, %f27;
	bfe.u32 	%r102, %r32, 23, 8;
	add.s32 	%r33, %r102, -128;
	shl.b32 	%r103, %r32, 8;
	or.b32  	%r34, %r103, -2147483648;
	shr.u32 	%r35, %r33, 5;
	mov.u64 	%rd75, 0;
	mov.u64 	%rd76, %rd75;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd43, %rd75, 2;
	mov.u64 	%rd44, __cudart_i2opi_f;
	add.s64 	%rd45, %rd44, %rd43;
	ld.global.nc.u32 	%r104, [%rd45];
	mad.wide.u32 	%rd46, %r104, %r34, %rd76;
	shr.u64 	%rd76, %rd46, 32;
	add.s64 	%rd47, %rd1, %rd43;
	st.local.u32 	[%rd47], %rd46;
	cvt.u32.u64 	%r105, %rd75;
	add.s32 	%r106, %r105, 1;
	cvt.s64.s32 	%rd75, %r106;
	setp.ne.s32 	%p28, %r106, 6;
	@%p28 bra 	$L__BB0_23;

	st.local.u32 	[%rd5], %rd76;
	mov.u32 	%r107, 4;
	sub.s32 	%r36, %r107, %r35;
	mov.u32 	%r108, 6;
	sub.s32 	%r109, %r108, %r35;
	mul.wide.s32 	%rd48, %r109, 4;
	add.s64 	%rd49, %rd1, %rd48;
	ld.local.u32 	%r320, [%rd49];
	ld.local.u32 	%r321, [%rd49+-4];
	and.b32  	%r39, %r33, 31;
	setp.eq.s32 	%p29, %r39, 0;
	@%p29 bra 	$L__BB0_26;

	mov.u32 	%r110, 32;
	sub.s32 	%r111, %r110, %r39;
	shr.u32 	%r112, %r321, %r111;
	shl.b32 	%r113, %r320, %r39;
	add.s32 	%r320, %r112, %r113;
	mul.wide.s32 	%rd50, %r36, 4;
	add.s64 	%rd51, %rd1, %rd50;
	ld.local.u32 	%r114, [%rd51];
	shr.u32 	%r115, %r114, %r111;
	shl.b32 	%r116, %r321, %r39;
	add.s32 	%r321, %r115, %r116;

$L__BB0_26:
	and.b32  	%r117, %r32, -2147483648;
	shr.u32 	%r118, %r321, 30;
	shl.b32 	%r119, %r320, 2;
	or.b32  	%r120, %r118, %r119;
	shr.u32 	%r121, %r120, 31;
	shr.u32 	%r122, %r320, 30;
	add.s32 	%r123, %r121, %r122;
	neg.s32 	%r124, %r123;
	setp.eq.s32 	%p30, %r117, 0;
	selp.b32 	%r322, %r123, %r124, %p30;
	setp.ne.s32 	%p31, %r121, 0;
	xor.b32  	%r125, %r117, -2147483648;
	selp.b32 	%r126, %r125, %r117, %p31;
	selp.b32 	%r127, -1, 0, %p31;
	xor.b32  	%r128, %r120, %r127;
	shl.b32 	%r129, %r321, 2;
	xor.b32  	%r130, %r129, %r127;
	cvt.u64.u32 	%rd52, %r128;
	cvt.u64.u32 	%rd53, %r130;
	bfi.b64 	%rd54, %rd52, %rd53, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd54;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f216, %fd4;
	setp.eq.s32 	%p32, %r126, 0;
	neg.f32 	%f217, %f216;
	selp.f32 	%f832, %f216, %f217, %p32;

$L__BB0_28:
	mul.f32 	%f43, %f26, %f831;
	and.b32  	%r46, %r322, 1;
	setp.eq.s32 	%p33, %r46, 0;
	selp.f32 	%f44, %f832, 0f3F800000, %p33;
	mul.rn.f32 	%f45, %f832, %f832;
	mov.f32 	%f833, 0fB94D4153;
	@%p33 bra 	$L__BB0_30;

	mov.f32 	%f220, 0fBAB607ED;
	mov.f32 	%f221, 0f37CBAC00;
	fma.rn.f32 	%f833, %f221, %f45, %f220;

$L__BB0_30:
	selp.f32 	%f222, 0f3C0885E4, 0f3D2AAABB, %p33;
	fma.rn.f32 	%f223, %f833, %f45, %f222;
	selp.f32 	%f224, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
	fma.rn.f32 	%f225, %f223, %f45, %f224;
	mov.f32 	%f226, 0f00000000;
	fma.rn.f32 	%f227, %f45, %f44, %f226;
	fma.rn.f32 	%f834, %f225, %f227, %f44;
	and.b32  	%r132, %r322, 2;
	setp.eq.s32 	%p35, %r132, 0;
	@%p35 bra 	$L__BB0_32;

	mov.f32 	%f229, 0fBF800000;
	fma.rn.f32 	%f834, %f834, %f229, %f226;

$L__BB0_32:
	mul.f32 	%f230, %f43, %f43;
	mov.f32 	%f231, 0f3F800000;
	sub.f32 	%f232, %f231, %f230;
	mul.f32 	%f233, %f26, %f834;
	mul.f32 	%f234, %f233, %f233;
	sub.f32 	%f235, %f232, %f234;
	max.f32 	%f237, %f226, %f235;
	sqrt.rn.f32 	%f238, %f237;
	mul.f32 	%f239, %f13, %f233;
	mul.f32 	%f240, %f14, %f233;
	mul.f32 	%f241, %f15, %f233;
	fma.rn.f32 	%f242, %f22, %f43, %f239;
	fma.rn.f32 	%f243, %f21, %f43, %f240;
	fma.rn.f32 	%f244, %f20, %f43, %f241;
	fma.rn.f32 	%f51, %f824, %f238, %f242;
	fma.rn.f32 	%f52, %f825, %f238, %f243;
	fma.rn.f32 	%f53, %f826, %f238, %f244;
	setp.leu.f32 	%p36, %f52, 0f00000000;
	setp.ne.s32 	%p37, %r6, 0;
	and.pred  	%p38, %p37, %p36;
	@%p38 bra 	$L__BB0_34;

	mov.f32 	%f259, 0f38D1B717;
	max.f32 	%f251, %f258, %f259;
	mov.f32 	%f252, 0f6C4ECB8F;
	mov.f32 	%f253, 0f00000000;
	mov.u32 	%r169, 2;
	mov.u32 	%r171, 1;
	mov.u32 	%r172, 1065353216;
	mov.u32 	%r203, 0;
	// begin inline asm
	call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd4,%f10,%f11,%f12,%f51,%f52,%f53,%f251,%f252,%f253,%r171,%r203,%r171,%r169,%r171,%r171,%r172,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f260, %r133;
	add.f32 	%f835, %f835, %f260;

$L__BB0_34:
	add.s32 	%r314, %r314, 1;
	setp.lt.s32 	%p39, %r314, %r3;
	@%p39 bra 	$L__BB0_8;

	add.s32 	%r312, %r312, 1;
	setp.lt.s32 	%p40, %r312, %r3;
	@%p40 bra 	$L__BB0_7;

$L__BB0_36:
	mul.lo.s32 	%r204, %r3, %r3;
	cvt.rn.f32.s32 	%f261, %r204;
	div.rn.f32 	%f262, %f835, %f261;
	ld.const.v4.f32 	{%f263, %f264, %f265, %f266}, [params+576];
	mul.f32 	%f57, %f262, %f263;
	mul.f32 	%f58, %f262, %f264;
	mul.f32 	%f59, %f262, %f265;
	ld.const.u32 	%r49, [params+104];
	and.b32  	%r205, %r49, 1;
	setp.eq.b32 	%p41, %r205, 1;
	mov.pred 	%p42, 0;
	xor.pred  	%p43, %p41, %p42;
	not.pred 	%p44, %p43;
	@%p44 bra 	$L__BB0_110;

	mov.f32 	%f271, 0f3E666666;
	cvt.rzi.f32.f32 	%f272, %f271;
	add.f32 	%f273, %f272, %f272;
	mov.f32 	%f274, 0f3EE66666;
	sub.f32 	%f275, %f274, %f273;
	abs.f32 	%f60, %f275;
	abs.f32 	%f61, %f57;
	setp.lt.f32 	%p45, %f61, 0f00800000;
	mul.f32 	%f276, %f61, 0f4B800000;
	selp.f32 	%f277, %f276, %f61, %p45;
	selp.f32 	%f278, 0fC3170000, 0fC2FE0000, %p45;
	mov.b32 	%r206, %f277;
	and.b32  	%r207, %r206, 8388607;
	or.b32  	%r208, %r207, 1065353216;
	mov.b32 	%f279, %r208;
	shr.u32 	%r209, %r206, 23;
	cvt.rn.f32.u32 	%f280, %r209;
	add.f32 	%f281, %f278, %f280;
	setp.gt.f32 	%p46, %f279, 0f3FB504F3;
	mul.f32 	%f282, %f279, 0f3F000000;
	add.f32 	%f283, %f281, 0f3F800000;
	selp.f32 	%f284, %f283, %f281, %p46;
	selp.f32 	%f285, %f282, %f279, %p46;
	add.f32 	%f286, %f285, 0fBF800000;
	add.f32 	%f287, %f285, 0f3F800000;
	rcp.approx.ftz.f32 	%f288, %f287;
	add.f32 	%f289, %f286, %f286;
	mul.f32 	%f290, %f289, %f288;
	mul.f32 	%f291, %f290, %f290;
	mov.f32 	%f292, 0f3C4CAF63;
	mov.f32 	%f293, 0f3B18F0FE;
	fma.rn.f32 	%f294, %f293, %f291, %f292;
	mov.f32 	%f295, 0f3DAAAABD;
	fma.rn.f32 	%f296, %f294, %f291, %f295;
	mul.rn.f32 	%f297, %f296, %f291;
	mul.rn.f32 	%f298, %f297, %f290;
	sub.f32 	%f299, %f286, %f290;
	add.f32 	%f300, %f299, %f299;
	neg.f32 	%f301, %f290;
	fma.rn.f32 	%f302, %f301, %f286, %f300;
	mul.rn.f32 	%f303, %f288, %f302;
	add.f32 	%f304, %f298, %f290;
	sub.f32 	%f305, %f290, %f304;
	add.f32 	%f306, %f298, %f305;
	add.f32 	%f307, %f303, %f306;
	add.f32 	%f308, %f304, %f307;
	sub.f32 	%f309, %f304, %f308;
	add.f32 	%f310, %f307, %f309;
	mov.f32 	%f311, 0f3F317200;
	mul.rn.f32 	%f312, %f284, %f311;
	mov.f32 	%f313, 0f35BFBE8E;
	mul.rn.f32 	%f314, %f284, %f313;
	add.f32 	%f315, %f312, %f308;
	sub.f32 	%f316, %f312, %f315;
	add.f32 	%f317, %f308, %f316;
	add.f32 	%f318, %f310, %f317;
	add.f32 	%f319, %f314, %f318;
	add.f32 	%f320, %f315, %f319;
	sub.f32 	%f321, %f315, %f320;
	add.f32 	%f322, %f319, %f321;
	mul.rn.f32 	%f323, %f274, %f320;
	neg.f32 	%f324, %f323;
	fma.rn.f32 	%f325, %f274, %f320, %f324;
	fma.rn.f32 	%f326, %f274, %f322, %f325;
	mov.f32 	%f327, 0f00000000;
	fma.rn.f32 	%f328, %f327, %f320, %f326;
	add.rn.f32 	%f329, %f323, %f328;
	neg.f32 	%f330, %f329;
	add.rn.f32 	%f331, %f323, %f330;
	add.rn.f32 	%f332, %f331, %f328;
	mov.b32 	%r210, %f329;
	setp.eq.s32 	%p47, %r210, 1118925336;
	add.s32 	%r211, %r210, -1;
	mov.b32 	%f333, %r211;
	add.f32 	%f334, %f332, 0f37000000;
	selp.f32 	%f62, %f334, %f332, %p47;
	selp.f32 	%f335, %f333, %f329, %p47;
	mov.f32 	%f336, 0f3FB8AA3B;
	mul.rn.f32 	%f337, %f335, %f336;
	cvt.rzi.f32.f32 	%f338, %f337;
	abs.f32 	%f339, %f338;
	setp.gt.f32 	%p48, %f339, 0f42FC0000;
	mov.b32 	%r212, %f338;
	and.b32  	%r213, %r212, -2147483648;
	or.b32  	%r214, %r213, 1123811328;
	mov.b32 	%f340, %r214;
	selp.f32 	%f341, %f340, %f338, %p48;
	mov.f32 	%f342, 0fBF317218;
	fma.rn.f32 	%f343, %f341, %f342, %f335;
	mov.f32 	%f344, 0f3102E308;
	fma.rn.f32 	%f345, %f341, %f344, %f343;
	mul.f32 	%f346, %f345, 0f3FB8AA3B;
	add.f32 	%f347, %f341, 0f4B40007F;
	mov.b32 	%r215, %f347;
	shl.b32 	%r216, %r215, 23;
	mov.b32 	%f348, %r216;
	ex2.approx.ftz.f32 	%f349, %f346;
	mul.f32 	%f63, %f349, %f348;
	setp.eq.f32 	%p49, %f63, 0f7F800000;
	mov.f32 	%f837, 0f7F800000;
	@%p49 bra 	$L__BB0_39;

	fma.rn.f32 	%f837, %f63, %f62, %f63;

$L__BB0_39:
	setp.lt.f32 	%p50, %f57, 0f00000000;
	setp.eq.f32 	%p51, %f60, 0f3F800000;
	and.pred  	%p1, %p50, %p51;
	setp.eq.f32 	%p52, %f57, 0f00000000;
	@%p52 bra 	$L__BB0_43;
	bra.uni 	$L__BB0_40;

$L__BB0_43:
	add.f32 	%f354, %f57, %f57;
	selp.f32 	%f839, %f354, 0f00000000, %p51;
	bra.uni 	$L__BB0_44;

$L__BB0_119:
	mov.f32 	%f817, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs48, %f817;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs47, %f817;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs46, %f817;}

	// end inline asm
	mov.u16 	%rs49, 0;
	st.global.v4.u16 	[%rd19], {%rs46, %rs47, %rs48, %rs49};
	bra.uni 	$L__BB0_120;

$L__BB0_40:
	mov.b32 	%r217, %f837;
	xor.b32  	%r218, %r217, -2147483648;
	mov.b32 	%f350, %r218;
	selp.f32 	%f839, %f350, %f837, %p1;
	setp.geu.f32 	%p53, %f57, 0f00000000;
	@%p53 bra 	$L__BB0_44;

	mov.f32 	%f351, 0f3EE66666;
	cvt.rzi.f32.f32 	%f352, %f351;
	setp.eq.f32 	%p54, %f352, 0f3EE66666;
	@%p54 bra 	$L__BB0_44;

	mov.f32 	%f839, 0f7FFFFFFF;

$L__BB0_44:
	add.f32 	%f355, %f61, 0f3EE66666;
	mov.b32 	%r219, %f355;
	setp.lt.s32 	%p56, %r219, 2139095040;
	@%p56 bra 	$L__BB0_49;

	setp.gtu.f32 	%p57, %f61, 0f7F800000;
	@%p57 bra 	$L__BB0_48;
	bra.uni 	$L__BB0_46;

$L__BB0_48:
	add.f32 	%f839, %f57, 0f3EE66666;
	bra.uni 	$L__BB0_49;

$L__BB0_46:
	setp.neu.f32 	%p58, %f61, 0f7F800000;
	@%p58 bra 	$L__BB0_49;

	selp.f32 	%f839, 0fFF800000, 0f7F800000, %p1;

$L__BB0_49:
	setp.eq.f32 	%p59, %f57, 0f3F800000;
	selp.f32 	%f72, 0f3F800000, %f839, %p59;
	abs.f32 	%f73, %f58;
	setp.lt.f32 	%p60, %f73, 0f00800000;
	mul.f32 	%f357, %f73, 0f4B800000;
	selp.f32 	%f358, %f357, %f73, %p60;
	selp.f32 	%f359, 0fC3170000, 0fC2FE0000, %p60;
	mov.b32 	%r220, %f358;
	and.b32  	%r221, %r220, 8388607;
	or.b32  	%r222, %r221, 1065353216;
	mov.b32 	%f360, %r222;
	shr.u32 	%r223, %r220, 23;
	cvt.rn.f32.u32 	%f361, %r223;
	add.f32 	%f362, %f359, %f361;
	setp.gt.f32 	%p61, %f360, 0f3FB504F3;
	mul.f32 	%f363, %f360, 0f3F000000;
	add.f32 	%f364, %f362, 0f3F800000;
	selp.f32 	%f365, %f364, %f362, %p61;
	selp.f32 	%f366, %f363, %f360, %p61;
	add.f32 	%f367, %f366, 0fBF800000;
	add.f32 	%f368, %f366, 0f3F800000;
	rcp.approx.ftz.f32 	%f369, %f368;
	add.f32 	%f370, %f367, %f367;
	mul.f32 	%f371, %f370, %f369;
	mul.f32 	%f372, %f371, %f371;
	mov.f32 	%f373, 0f3C4CAF63;
	mov.f32 	%f374, 0f3B18F0FE;
	fma.rn.f32 	%f375, %f374, %f372, %f373;
	mov.f32 	%f376, 0f3DAAAABD;
	fma.rn.f32 	%f377, %f375, %f372, %f376;
	mul.rn.f32 	%f378, %f377, %f372;
	mul.rn.f32 	%f379, %f378, %f371;
	sub.f32 	%f380, %f367, %f371;
	add.f32 	%f381, %f380, %f380;
	neg.f32 	%f382, %f371;
	fma.rn.f32 	%f383, %f382, %f367, %f381;
	mul.rn.f32 	%f384, %f369, %f383;
	add.f32 	%f385, %f379, %f371;
	sub.f32 	%f386, %f371, %f385;
	add.f32 	%f387, %f379, %f386;
	add.f32 	%f388, %f384, %f387;
	add.f32 	%f389, %f385, %f388;
	sub.f32 	%f390, %f385, %f389;
	add.f32 	%f391, %f388, %f390;
	mov.f32 	%f392, 0f3F317200;
	mul.rn.f32 	%f393, %f365, %f392;
	mov.f32 	%f394, 0f35BFBE8E;
	mul.rn.f32 	%f395, %f365, %f394;
	add.f32 	%f396, %f393, %f389;
	sub.f32 	%f397, %f393, %f396;
	add.f32 	%f398, %f389, %f397;
	add.f32 	%f399, %f391, %f398;
	add.f32 	%f400, %f395, %f399;
	add.f32 	%f401, %f396, %f400;
	sub.f32 	%f402, %f396, %f401;
	add.f32 	%f403, %f400, %f402;
	mov.f32 	%f404, 0f3EE66666;
	mul.rn.f32 	%f405, %f404, %f401;
	neg.f32 	%f406, %f405;
	fma.rn.f32 	%f407, %f404, %f401, %f406;
	fma.rn.f32 	%f408, %f404, %f403, %f407;
	mov.f32 	%f409, 0f00000000;
	fma.rn.f32 	%f410, %f409, %f401, %f408;
	add.rn.f32 	%f411, %f405, %f410;
	neg.f32 	%f412, %f411;
	add.rn.f32 	%f413, %f405, %f412;
	add.rn.f32 	%f414, %f413, %f410;
	mov.b32 	%r224, %f411;
	setp.eq.s32 	%p62, %r224, 1118925336;
	add.s32 	%r225, %r224, -1;
	mov.b32 	%f415, %r225;
	add.f32 	%f416, %f414, 0f37000000;
	selp.f32 	%f74, %f416, %f414, %p62;
	selp.f32 	%f417, %f415, %f411, %p62;
	mov.f32 	%f418, 0f3FB8AA3B;
	mul.rn.f32 	%f419, %f417, %f418;
	cvt.rzi.f32.f32 	%f420, %f419;
	abs.f32 	%f421, %f420;
	setp.gt.f32 	%p63, %f421, 0f42FC0000;
	mov.b32 	%r226, %f420;
	and.b32  	%r227, %r226, -2147483648;
	or.b32  	%r228, %r227, 1123811328;
	mov.b32 	%f422, %r228;
	selp.f32 	%f423, %f422, %f420, %p63;
	mov.f32 	%f424, 0fBF317218;
	fma.rn.f32 	%f425, %f423, %f424, %f417;
	mov.f32 	%f426, 0f3102E308;
	fma.rn.f32 	%f427, %f423, %f426, %f425;
	mul.f32 	%f428, %f427, 0f3FB8AA3B;
	add.f32 	%f429, %f423, 0f4B40007F;
	mov.b32 	%r229, %f429;
	shl.b32 	%r230, %r229, 23;
	mov.b32 	%f430, %r230;
	ex2.approx.ftz.f32 	%f431, %f428;
	mul.f32 	%f75, %f431, %f430;
	setp.eq.f32 	%p64, %f75, 0f7F800000;
	mov.f32 	%f840, 0f7F800000;
	@%p64 bra 	$L__BB0_51;

	fma.rn.f32 	%f840, %f75, %f74, %f75;

$L__BB0_51:
	setp.lt.f32 	%p65, %f58, 0f00000000;
	and.pred  	%p2, %p65, %p51;
	setp.eq.f32 	%p67, %f58, 0f00000000;
	@%p67 bra 	$L__BB0_55;
	bra.uni 	$L__BB0_52;

$L__BB0_55:
	add.f32 	%f436, %f58, %f58;
	selp.f32 	%f842, %f436, 0f00000000, %p51;
	bra.uni 	$L__BB0_56;

$L__BB0_52:
	mov.b32 	%r231, %f840;
	xor.b32  	%r232, %r231, -2147483648;
	mov.b32 	%f432, %r232;
	selp.f32 	%f842, %f432, %f840, %p2;
	setp.geu.f32 	%p68, %f58, 0f00000000;
	@%p68 bra 	$L__BB0_56;

	mov.f32 	%f433, 0f3EE66666;
	cvt.rzi.f32.f32 	%f434, %f433;
	setp.eq.f32 	%p69, %f434, 0f3EE66666;
	@%p69 bra 	$L__BB0_56;

	mov.f32 	%f842, 0f7FFFFFFF;

$L__BB0_56:
	add.f32 	%f437, %f73, 0f3EE66666;
	mov.b32 	%r233, %f437;
	setp.lt.s32 	%p71, %r233, 2139095040;
	@%p71 bra 	$L__BB0_61;

	setp.gtu.f32 	%p72, %f73, 0f7F800000;
	@%p72 bra 	$L__BB0_60;
	bra.uni 	$L__BB0_58;

$L__BB0_60:
	add.f32 	%f842, %f58, 0f3EE66666;
	bra.uni 	$L__BB0_61;

$L__BB0_58:
	setp.neu.f32 	%p73, %f73, 0f7F800000;
	@%p73 bra 	$L__BB0_61;

	selp.f32 	%f842, 0fFF800000, 0f7F800000, %p2;

$L__BB0_61:
	setp.eq.f32 	%p74, %f58, 0f3F800000;
	selp.f32 	%f84, 0f3F800000, %f842, %p74;
	abs.f32 	%f85, %f59;
	setp.lt.f32 	%p75, %f85, 0f00800000;
	mul.f32 	%f439, %f85, 0f4B800000;
	selp.f32 	%f440, %f439, %f85, %p75;
	selp.f32 	%f441, 0fC3170000, 0fC2FE0000, %p75;
	mov.b32 	%r234, %f440;
	and.b32  	%r235, %r234, 8388607;
	or.b32  	%r236, %r235, 1065353216;
	mov.b32 	%f442, %r236;
	shr.u32 	%r237, %r234, 23;
	cvt.rn.f32.u32 	%f443, %r237;
	add.f32 	%f444, %f441, %f443;
	setp.gt.f32 	%p76, %f442, 0f3FB504F3;
	mul.f32 	%f445, %f442, 0f3F000000;
	add.f32 	%f446, %f444, 0f3F800000;
	selp.f32 	%f447, %f446, %f444, %p76;
	selp.f32 	%f448, %f445, %f442, %p76;
	add.f32 	%f449, %f448, 0fBF800000;
	add.f32 	%f450, %f448, 0f3F800000;
	rcp.approx.ftz.f32 	%f451, %f450;
	add.f32 	%f452, %f449, %f449;
	mul.f32 	%f453, %f452, %f451;
	mul.f32 	%f454, %f453, %f453;
	mov.f32 	%f455, 0f3C4CAF63;
	mov.f32 	%f456, 0f3B18F0FE;
	fma.rn.f32 	%f457, %f456, %f454, %f455;
	mov.f32 	%f458, 0f3DAAAABD;
	fma.rn.f32 	%f459, %f457, %f454, %f458;
	mul.rn.f32 	%f460, %f459, %f454;
	mul.rn.f32 	%f461, %f460, %f453;
	sub.f32 	%f462, %f449, %f453;
	add.f32 	%f463, %f462, %f462;
	neg.f32 	%f464, %f453;
	fma.rn.f32 	%f465, %f464, %f449, %f463;
	mul.rn.f32 	%f466, %f451, %f465;
	add.f32 	%f467, %f461, %f453;
	sub.f32 	%f468, %f453, %f467;
	add.f32 	%f469, %f461, %f468;
	add.f32 	%f470, %f466, %f469;
	add.f32 	%f471, %f467, %f470;
	sub.f32 	%f472, %f467, %f471;
	add.f32 	%f473, %f470, %f472;
	mov.f32 	%f474, 0f3F317200;
	mul.rn.f32 	%f475, %f447, %f474;
	mov.f32 	%f476, 0f35BFBE8E;
	mul.rn.f32 	%f477, %f447, %f476;
	add.f32 	%f478, %f475, %f471;
	sub.f32 	%f479, %f475, %f478;
	add.f32 	%f480, %f471, %f479;
	add.f32 	%f481, %f473, %f480;
	add.f32 	%f482, %f477, %f481;
	add.f32 	%f483, %f478, %f482;
	sub.f32 	%f484, %f478, %f483;
	add.f32 	%f485, %f482, %f484;
	mov.f32 	%f486, 0f3EE66666;
	mul.rn.f32 	%f487, %f486, %f483;
	neg.f32 	%f488, %f487;
	fma.rn.f32 	%f489, %f486, %f483, %f488;
	fma.rn.f32 	%f490, %f486, %f485, %f489;
	mov.f32 	%f491, 0f00000000;
	fma.rn.f32 	%f492, %f491, %f483, %f490;
	add.rn.f32 	%f493, %f487, %f492;
	neg.f32 	%f494, %f493;
	add.rn.f32 	%f495, %f487, %f494;
	add.rn.f32 	%f496, %f495, %f492;
	mov.b32 	%r238, %f493;
	setp.eq.s32 	%p77, %r238, 1118925336;
	add.s32 	%r239, %r238, -1;
	mov.b32 	%f497, %r239;
	add.f32 	%f498, %f496, 0f37000000;
	selp.f32 	%f86, %f498, %f496, %p77;
	selp.f32 	%f499, %f497, %f493, %p77;
	mov.f32 	%f500, 0f3FB8AA3B;
	mul.rn.f32 	%f501, %f499, %f500;
	cvt.rzi.f32.f32 	%f502, %f501;
	abs.f32 	%f503, %f502;
	setp.gt.f32 	%p78, %f503, 0f42FC0000;
	mov.b32 	%r240, %f502;
	and.b32  	%r241, %r240, -2147483648;
	or.b32  	%r242, %r241, 1123811328;
	mov.b32 	%f504, %r242;
	selp.f32 	%f505, %f504, %f502, %p78;
	mov.f32 	%f506, 0fBF317218;
	fma.rn.f32 	%f507, %f505, %f506, %f499;
	mov.f32 	%f508, 0f3102E308;
	fma.rn.f32 	%f509, %f505, %f508, %f507;
	mul.f32 	%f510, %f509, 0f3FB8AA3B;
	add.f32 	%f511, %f505, 0f4B40007F;
	mov.b32 	%r243, %f511;
	shl.b32 	%r244, %r243, 23;
	mov.b32 	%f512, %r244;
	ex2.approx.ftz.f32 	%f513, %f510;
	mul.f32 	%f87, %f513, %f512;
	setp.eq.f32 	%p79, %f87, 0f7F800000;
	mov.f32 	%f843, 0f7F800000;
	@%p79 bra 	$L__BB0_63;

	fma.rn.f32 	%f843, %f87, %f86, %f87;

$L__BB0_63:
	setp.lt.f32 	%p80, %f59, 0f00000000;
	and.pred  	%p3, %p80, %p51;
	setp.eq.f32 	%p82, %f59, 0f00000000;
	@%p82 bra 	$L__BB0_67;
	bra.uni 	$L__BB0_64;

$L__BB0_67:
	add.f32 	%f518, %f59, %f59;
	selp.f32 	%f845, %f518, 0f00000000, %p51;
	bra.uni 	$L__BB0_68;

$L__BB0_64:
	mov.b32 	%r245, %f843;
	xor.b32  	%r246, %r245, -2147483648;
	mov.b32 	%f514, %r246;
	selp.f32 	%f845, %f514, %f843, %p3;
	setp.geu.f32 	%p83, %f59, 0f00000000;
	@%p83 bra 	$L__BB0_68;

	mov.f32 	%f515, 0f3EE66666;
	cvt.rzi.f32.f32 	%f516, %f515;
	setp.eq.f32 	%p84, %f516, 0f3EE66666;
	@%p84 bra 	$L__BB0_68;

	mov.f32 	%f845, 0f7FFFFFFF;

$L__BB0_68:
	add.f32 	%f519, %f85, 0f3EE66666;
	mov.b32 	%r247, %f519;
	setp.lt.s32 	%p86, %r247, 2139095040;
	@%p86 bra 	$L__BB0_73;

	setp.gtu.f32 	%p87, %f85, 0f7F800000;
	@%p87 bra 	$L__BB0_72;
	bra.uni 	$L__BB0_70;

$L__BB0_72:
	add.f32 	%f845, %f59, 0f3EE66666;
	bra.uni 	$L__BB0_73;

$L__BB0_70:
	setp.neu.f32 	%p88, %f85, 0f7F800000;
	@%p88 bra 	$L__BB0_73;

	selp.f32 	%f845, 0fFF800000, 0f7F800000, %p3;

$L__BB0_73:
	setp.eq.f32 	%p89, %f59, 0f3F800000;
	mov.f32 	%f521, 0f3F800000;
	selp.f32 	%f522, 0f3F800000, %f845, %p89;
	min.f32 	%f523, %f72, %f521;
	mov.f32 	%f524, 0f00000000;
	max.f32 	%f96, %f524, %f523;
	min.f32 	%f525, %f84, %f521;
	max.f32 	%f97, %f524, %f525;
	min.f32 	%f526, %f522, %f521;
	max.f32 	%f98, %f524, %f526;
	mov.f32 	%f530, 0f3ED55555;
	abs.f32 	%f100, %f96;
	setp.lt.f32 	%p90, %f100, 0f00800000;
	mul.f32 	%f532, %f100, 0f4B800000;
	selp.f32 	%f533, %f532, %f100, %p90;
	selp.f32 	%f534, 0fC3170000, 0fC2FE0000, %p90;
	mov.b32 	%r250, %f533;
	and.b32  	%r251, %r250, 8388607;
	or.b32  	%r252, %r251, 1065353216;
	mov.b32 	%f535, %r252;
	shr.u32 	%r253, %r250, 23;
	cvt.rn.f32.u32 	%f536, %r253;
	add.f32 	%f537, %f534, %f536;
	setp.gt.f32 	%p91, %f535, 0f3FB504F3;
	mul.f32 	%f538, %f535, 0f3F000000;
	add.f32 	%f539, %f537, 0f3F800000;
	selp.f32 	%f540, %f539, %f537, %p91;
	selp.f32 	%f541, %f538, %f535, %p91;
	add.f32 	%f542, %f541, 0fBF800000;
	add.f32 	%f543, %f541, 0f3F800000;
	rcp.approx.ftz.f32 	%f544, %f543;
	add.f32 	%f545, %f542, %f542;
	mul.f32 	%f546, %f545, %f544;
	mul.f32 	%f547, %f546, %f546;
	mov.f32 	%f548, 0f3C4CAF63;
	mov.f32 	%f549, 0f3B18F0FE;
	fma.rn.f32 	%f550, %f549, %f547, %f548;
	mov.f32 	%f551, 0f3DAAAABD;
	fma.rn.f32 	%f552, %f550, %f547, %f551;
	mul.rn.f32 	%f553, %f552, %f547;
	mul.rn.f32 	%f554, %f553, %f546;
	sub.f32 	%f555, %f542, %f546;
	add.f32 	%f556, %f555, %f555;
	neg.f32 	%f557, %f546;
	fma.rn.f32 	%f558, %f557, %f542, %f556;
	mul.rn.f32 	%f559, %f544, %f558;
	add.f32 	%f560, %f554, %f546;
	sub.f32 	%f561, %f546, %f560;
	add.f32 	%f562, %f554, %f561;
	add.f32 	%f563, %f559, %f562;
	add.f32 	%f564, %f560, %f563;
	sub.f32 	%f565, %f560, %f564;
	add.f32 	%f566, %f563, %f565;
	mov.f32 	%f567, 0f3F317200;
	mul.rn.f32 	%f568, %f540, %f567;
	mov.f32 	%f569, 0f35BFBE8E;
	mul.rn.f32 	%f570, %f540, %f569;
	add.f32 	%f571, %f568, %f564;
	sub.f32 	%f572, %f568, %f571;
	add.f32 	%f573, %f564, %f572;
	add.f32 	%f574, %f566, %f573;
	add.f32 	%f575, %f570, %f574;
	add.f32 	%f576, %f571, %f575;
	sub.f32 	%f577, %f571, %f576;
	add.f32 	%f578, %f575, %f577;
	mul.rn.f32 	%f579, %f530, %f576;
	neg.f32 	%f580, %f579;
	fma.rn.f32 	%f581, %f530, %f576, %f580;
	fma.rn.f32 	%f582, %f530, %f578, %f581;
	fma.rn.f32 	%f583, %f524, %f576, %f582;
	add.rn.f32 	%f584, %f579, %f583;
	neg.f32 	%f585, %f584;
	add.rn.f32 	%f586, %f579, %f585;
	add.rn.f32 	%f587, %f586, %f583;
	mov.b32 	%r254, %f584;
	setp.eq.s32 	%p92, %r254, 1118925336;
	add.s32 	%r255, %r254, -1;
	mov.b32 	%f588, %r255;
	add.f32 	%f589, %f587, 0f37000000;
	selp.f32 	%f101, %f589, %f587, %p92;
	selp.f32 	%f590, %f588, %f584, %p92;
	mov.f32 	%f591, 0f3FB8AA3B;
	mul.rn.f32 	%f592, %f590, %f591;
	cvt.rzi.f32.f32 	%f593, %f592;
	abs.f32 	%f594, %f593;
	setp.gt.f32 	%p93, %f594, 0f42FC0000;
	mov.b32 	%r256, %f593;
	and.b32  	%r257, %r256, -2147483648;
	or.b32  	%r258, %r257, 1123811328;
	mov.b32 	%f595, %r258;
	selp.f32 	%f596, %f595, %f593, %p93;
	mov.f32 	%f597, 0fBF317218;
	fma.rn.f32 	%f598, %f596, %f597, %f590;
	mov.f32 	%f599, 0f3102E308;
	fma.rn.f32 	%f600, %f596, %f599, %f598;
	mul.f32 	%f601, %f600, 0f3FB8AA3B;
	add.f32 	%f602, %f596, 0f4B40007F;
	mov.b32 	%r259, %f602;
	shl.b32 	%r260, %r259, 23;
	mov.b32 	%f603, %r260;
	ex2.approx.ftz.f32 	%f604, %f601;
	mul.f32 	%f102, %f604, %f603;
	setp.eq.f32 	%p94, %f102, 0f7F800000;
	mov.f32 	%f846, 0f7F800000;
	@%p94 bra 	$L__BB0_75;

	fma.rn.f32 	%f846, %f102, %f101, %f102;

$L__BB0_75:
	mov.f32 	%f823, 0f3E555555;
	cvt.rzi.f32.f32 	%f822, %f823;
	add.f32 	%f821, %f822, %f822;
	mov.f32 	%f820, 0f3ED55555;
	sub.f32 	%f819, %f820, %f821;
	abs.f32 	%f818, %f819;
	setp.lt.f32 	%p95, %f96, 0f00000000;
	setp.eq.f32 	%p96, %f818, 0f3F800000;
	and.pred  	%p4, %p95, %p96;
	setp.eq.f32 	%p97, %f96, 0f00000000;
	@%p97 bra 	$L__BB0_79;
	bra.uni 	$L__BB0_76;

$L__BB0_79:
	add.f32 	%f609, %f96, %f96;
	selp.f32 	%f848, %f609, 0f00000000, %p96;
	bra.uni 	$L__BB0_80;

$L__BB0_76:
	mov.b32 	%r261, %f846;
	xor.b32  	%r262, %r261, -2147483648;
	mov.b32 	%f605, %r262;
	selp.f32 	%f848, %f605, %f846, %p4;
	setp.geu.f32 	%p98, %f96, 0f00000000;
	@%p98 bra 	$L__BB0_80;

	mov.f32 	%f606, 0f3ED55555;
	cvt.rzi.f32.f32 	%f607, %f606;
	setp.eq.f32 	%p99, %f607, 0f3ED55555;
	@%p99 bra 	$L__BB0_80;

	mov.f32 	%f848, 0f7FFFFFFF;

$L__BB0_80:
	add.f32 	%f610, %f100, 0f3ED55555;
	mov.b32 	%r263, %f610;
	setp.lt.s32 	%p101, %r263, 2139095040;
	@%p101 bra 	$L__BB0_85;

	setp.gtu.f32 	%p102, %f100, 0f7F800000;
	@%p102 bra 	$L__BB0_84;
	bra.uni 	$L__BB0_82;

$L__BB0_84:
	add.f32 	%f848, %f96, 0f3ED55555;
	bra.uni 	$L__BB0_85;

$L__BB0_82:
	setp.neu.f32 	%p103, %f100, 0f7F800000;
	@%p103 bra 	$L__BB0_85;

	selp.f32 	%f848, 0fFF800000, 0f7F800000, %p4;

$L__BB0_85:
	abs.f32 	%f111, %f97;
	setp.lt.f32 	%p104, %f111, 0f00800000;
	mul.f32 	%f612, %f111, 0f4B800000;
	selp.f32 	%f613, %f612, %f111, %p104;
	selp.f32 	%f614, 0fC3170000, 0fC2FE0000, %p104;
	mov.b32 	%r264, %f613;
	and.b32  	%r265, %r264, 8388607;
	or.b32  	%r266, %r265, 1065353216;
	mov.b32 	%f615, %r266;
	shr.u32 	%r267, %r264, 23;
	cvt.rn.f32.u32 	%f616, %r267;
	add.f32 	%f617, %f614, %f616;
	setp.gt.f32 	%p105, %f615, 0f3FB504F3;
	mul.f32 	%f618, %f615, 0f3F000000;
	add.f32 	%f619, %f617, 0f3F800000;
	selp.f32 	%f620, %f619, %f617, %p105;
	selp.f32 	%f621, %f618, %f615, %p105;
	add.f32 	%f622, %f621, 0fBF800000;
	add.f32 	%f623, %f621, 0f3F800000;
	rcp.approx.ftz.f32 	%f624, %f623;
	add.f32 	%f625, %f622, %f622;
	mul.f32 	%f626, %f625, %f624;
	mul.f32 	%f627, %f626, %f626;
	mov.f32 	%f628, 0f3C4CAF63;
	mov.f32 	%f629, 0f3B18F0FE;
	fma.rn.f32 	%f630, %f629, %f627, %f628;
	mov.f32 	%f631, 0f3DAAAABD;
	fma.rn.f32 	%f632, %f630, %f627, %f631;
	mul.rn.f32 	%f633, %f632, %f627;
	mul.rn.f32 	%f634, %f633, %f626;
	sub.f32 	%f635, %f622, %f626;
	add.f32 	%f636, %f635, %f635;
	neg.f32 	%f637, %f626;
	fma.rn.f32 	%f638, %f637, %f622, %f636;
	mul.rn.f32 	%f639, %f624, %f638;
	add.f32 	%f640, %f634, %f626;
	sub.f32 	%f641, %f626, %f640;
	add.f32 	%f642, %f634, %f641;
	add.f32 	%f643, %f639, %f642;
	add.f32 	%f644, %f640, %f643;
	sub.f32 	%f645, %f640, %f644;
	add.f32 	%f646, %f643, %f645;
	mov.f32 	%f647, 0f3F317200;
	mul.rn.f32 	%f648, %f620, %f647;
	mov.f32 	%f649, 0f35BFBE8E;
	mul.rn.f32 	%f650, %f620, %f649;
	add.f32 	%f651, %f648, %f644;
	sub.f32 	%f652, %f648, %f651;
	add.f32 	%f653, %f644, %f652;
	add.f32 	%f654, %f646, %f653;
	add.f32 	%f655, %f650, %f654;
	add.f32 	%f656, %f651, %f655;
	sub.f32 	%f657, %f651, %f656;
	add.f32 	%f658, %f655, %f657;
	mov.f32 	%f659, 0f3ED55555;
	mul.rn.f32 	%f660, %f659, %f656;
	neg.f32 	%f661, %f660;
	fma.rn.f32 	%f662, %f659, %f656, %f661;
	fma.rn.f32 	%f663, %f659, %f658, %f662;
	mov.f32 	%f664, 0f00000000;
	fma.rn.f32 	%f665, %f664, %f656, %f663;
	add.rn.f32 	%f666, %f660, %f665;
	neg.f32 	%f667, %f666;
	add.rn.f32 	%f668, %f660, %f667;
	add.rn.f32 	%f669, %f668, %f665;
	mov.b32 	%r268, %f666;
	setp.eq.s32 	%p106, %r268, 1118925336;
	add.s32 	%r269, %r268, -1;
	mov.b32 	%f670, %r269;
	add.f32 	%f671, %f669, 0f37000000;
	selp.f32 	%f112, %f671, %f669, %p106;
	selp.f32 	%f672, %f670, %f666, %p106;
	mov.f32 	%f673, 0f3FB8AA3B;
	mul.rn.f32 	%f674, %f672, %f673;
	cvt.rzi.f32.f32 	%f675, %f674;
	abs.f32 	%f676, %f675;
	setp.gt.f32 	%p107, %f676, 0f42FC0000;
	mov.b32 	%r270, %f675;
	and.b32  	%r271, %r270, -2147483648;
	or.b32  	%r272, %r271, 1123811328;
	mov.b32 	%f677, %r272;
	selp.f32 	%f678, %f677, %f675, %p107;
	mov.f32 	%f679, 0fBF317218;
	fma.rn.f32 	%f680, %f678, %f679, %f672;
	mov.f32 	%f681, 0f3102E308;
	fma.rn.f32 	%f682, %f678, %f681, %f680;
	mul.f32 	%f683, %f682, 0f3FB8AA3B;
	add.f32 	%f684, %f678, 0f4B40007F;
	mov.b32 	%r273, %f684;
	shl.b32 	%r274, %r273, 23;
	mov.b32 	%f685, %r274;
	ex2.approx.ftz.f32 	%f686, %f683;
	mul.f32 	%f113, %f686, %f685;
	setp.eq.f32 	%p108, %f113, 0f7F800000;
	mov.f32 	%f849, 0f7F800000;
	@%p108 bra 	$L__BB0_87;

	fma.rn.f32 	%f849, %f113, %f112, %f113;

$L__BB0_87:
	setp.lt.f32 	%p109, %f97, 0f00000000;
	and.pred  	%p5, %p109, %p96;
	setp.eq.f32 	%p111, %f97, 0f00000000;
	@%p111 bra 	$L__BB0_91;
	bra.uni 	$L__BB0_88;

$L__BB0_91:
	add.f32 	%f691, %f97, %f97;
	selp.f32 	%f851, %f691, 0f00000000, %p96;
	bra.uni 	$L__BB0_92;

$L__BB0_88:
	mov.b32 	%r275, %f849;
	xor.b32  	%r276, %r275, -2147483648;
	mov.b32 	%f687, %r276;
	selp.f32 	%f851, %f687, %f849, %p5;
	setp.geu.f32 	%p112, %f97, 0f00000000;
	@%p112 bra 	$L__BB0_92;

	mov.f32 	%f688, 0f3ED55555;
	cvt.rzi.f32.f32 	%f689, %f688;
	setp.eq.f32 	%p113, %f689, 0f3ED55555;
	@%p113 bra 	$L__BB0_92;

	mov.f32 	%f851, 0f7FFFFFFF;

$L__BB0_92:
	add.f32 	%f692, %f111, 0f3ED55555;
	mov.b32 	%r277, %f692;
	setp.lt.s32 	%p115, %r277, 2139095040;
	@%p115 bra 	$L__BB0_97;

	setp.gtu.f32 	%p116, %f111, 0f7F800000;
	@%p116 bra 	$L__BB0_96;
	bra.uni 	$L__BB0_94;

$L__BB0_96:
	add.f32 	%f851, %f97, 0f3ED55555;
	bra.uni 	$L__BB0_97;

$L__BB0_94:
	setp.neu.f32 	%p117, %f111, 0f7F800000;
	@%p117 bra 	$L__BB0_97;

	selp.f32 	%f851, 0fFF800000, 0f7F800000, %p5;

$L__BB0_97:
	abs.f32 	%f122, %f98;
	setp.lt.f32 	%p118, %f122, 0f00800000;
	mul.f32 	%f694, %f122, 0f4B800000;
	selp.f32 	%f695, %f694, %f122, %p118;
	selp.f32 	%f696, 0fC3170000, 0fC2FE0000, %p118;
	mov.b32 	%r278, %f695;
	and.b32  	%r279, %r278, 8388607;
	or.b32  	%r280, %r279, 1065353216;
	mov.b32 	%f697, %r280;
	shr.u32 	%r281, %r278, 23;
	cvt.rn.f32.u32 	%f698, %r281;
	add.f32 	%f699, %f696, %f698;
	setp.gt.f32 	%p119, %f697, 0f3FB504F3;
	mul.f32 	%f700, %f697, 0f3F000000;
	add.f32 	%f701, %f699, 0f3F800000;
	selp.f32 	%f702, %f701, %f699, %p119;
	selp.f32 	%f703, %f700, %f697, %p119;
	add.f32 	%f704, %f703, 0fBF800000;
	add.f32 	%f705, %f703, 0f3F800000;
	rcp.approx.ftz.f32 	%f706, %f705;
	add.f32 	%f707, %f704, %f704;
	mul.f32 	%f708, %f707, %f706;
	mul.f32 	%f709, %f708, %f708;
	mov.f32 	%f710, 0f3C4CAF63;
	mov.f32 	%f711, 0f3B18F0FE;
	fma.rn.f32 	%f712, %f711, %f709, %f710;
	mov.f32 	%f713, 0f3DAAAABD;
	fma.rn.f32 	%f714, %f712, %f709, %f713;
	mul.rn.f32 	%f715, %f714, %f709;
	mul.rn.f32 	%f716, %f715, %f708;
	sub.f32 	%f717, %f704, %f708;
	add.f32 	%f718, %f717, %f717;
	neg.f32 	%f719, %f708;
	fma.rn.f32 	%f720, %f719, %f704, %f718;
	mul.rn.f32 	%f721, %f706, %f720;
	add.f32 	%f722, %f716, %f708;
	sub.f32 	%f723, %f708, %f722;
	add.f32 	%f724, %f716, %f723;
	add.f32 	%f725, %f721, %f724;
	add.f32 	%f726, %f722, %f725;
	sub.f32 	%f727, %f722, %f726;
	add.f32 	%f728, %f725, %f727;
	mov.f32 	%f729, 0f3F317200;
	mul.rn.f32 	%f730, %f702, %f729;
	mov.f32 	%f731, 0f35BFBE8E;
	mul.rn.f32 	%f732, %f702, %f731;
	add.f32 	%f733, %f730, %f726;
	sub.f32 	%f734, %f730, %f733;
	add.f32 	%f735, %f726, %f734;
	add.f32 	%f736, %f728, %f735;
	add.f32 	%f737, %f732, %f736;
	add.f32 	%f738, %f733, %f737;
	sub.f32 	%f739, %f733, %f738;
	add.f32 	%f740, %f737, %f739;
	mov.f32 	%f741, 0f3ED55555;
	mul.rn.f32 	%f742, %f741, %f738;
	neg.f32 	%f743, %f742;
	fma.rn.f32 	%f744, %f741, %f738, %f743;
	fma.rn.f32 	%f745, %f741, %f740, %f744;
	mov.f32 	%f746, 0f00000000;
	fma.rn.f32 	%f747, %f746, %f738, %f745;
	add.rn.f32 	%f748, %f742, %f747;
	neg.f32 	%f749, %f748;
	add.rn.f32 	%f750, %f742, %f749;
	add.rn.f32 	%f751, %f750, %f747;
	mov.b32 	%r282, %f748;
	setp.eq.s32 	%p120, %r282, 1118925336;
	add.s32 	%r283, %r282, -1;
	mov.b32 	%f752, %r283;
	add.f32 	%f753, %f751, 0f37000000;
	selp.f32 	%f123, %f753, %f751, %p120;
	selp.f32 	%f754, %f752, %f748, %p120;
	mov.f32 	%f755, 0f3FB8AA3B;
	mul.rn.f32 	%f756, %f754, %f755;
	cvt.rzi.f32.f32 	%f757, %f756;
	abs.f32 	%f758, %f757;
	setp.gt.f32 	%p121, %f758, 0f42FC0000;
	mov.b32 	%r284, %f757;
	and.b32  	%r285, %r284, -2147483648;
	or.b32  	%r286, %r285, 1123811328;
	mov.b32 	%f759, %r286;
	selp.f32 	%f760, %f759, %f757, %p121;
	mov.f32 	%f761, 0fBF317218;
	fma.rn.f32 	%f762, %f760, %f761, %f754;
	mov.f32 	%f763, 0f3102E308;
	fma.rn.f32 	%f764, %f760, %f763, %f762;
	mul.f32 	%f765, %f764, 0f3FB8AA3B;
	add.f32 	%f766, %f760, 0f4B40007F;
	mov.b32 	%r287, %f766;
	shl.b32 	%r288, %r287, 23;
	mov.b32 	%f767, %r288;
	ex2.approx.ftz.f32 	%f768, %f765;
	mul.f32 	%f124, %f768, %f767;
	setp.eq.f32 	%p122, %f124, 0f7F800000;
	mov.f32 	%f852, 0f7F800000;
	@%p122 bra 	$L__BB0_99;

	fma.rn.f32 	%f852, %f124, %f123, %f124;

$L__BB0_99:
	setp.lt.f32 	%p123, %f98, 0f00000000;
	and.pred  	%p6, %p123, %p96;
	setp.eq.f32 	%p125, %f98, 0f00000000;
	@%p125 bra 	$L__BB0_103;
	bra.uni 	$L__BB0_100;

$L__BB0_103:
	add.f32 	%f773, %f98, %f98;
	selp.f32 	%f854, %f773, 0f00000000, %p96;
	bra.uni 	$L__BB0_104;

$L__BB0_100:
	mov.b32 	%r289, %f852;
	xor.b32  	%r290, %r289, -2147483648;
	mov.b32 	%f769, %r290;
	selp.f32 	%f854, %f769, %f852, %p6;
	setp.geu.f32 	%p126, %f98, 0f00000000;
	@%p126 bra 	$L__BB0_104;

	mov.f32 	%f770, 0f3ED55555;
	cvt.rzi.f32.f32 	%f771, %f770;
	setp.eq.f32 	%p127, %f771, 0f3ED55555;
	@%p127 bra 	$L__BB0_104;

	mov.f32 	%f854, 0f7FFFFFFF;

$L__BB0_104:
	add.f32 	%f774, %f122, 0f3ED55555;
	mov.b32 	%r291, %f774;
	setp.lt.s32 	%p129, %r291, 2139095040;
	@%p129 bra 	$L__BB0_109;

	setp.gtu.f32 	%p130, %f122, 0f7F800000;
	@%p130 bra 	$L__BB0_108;
	bra.uni 	$L__BB0_106;

$L__BB0_108:
	add.f32 	%f854, %f98, 0f3ED55555;
	bra.uni 	$L__BB0_109;

$L__BB0_106:
	setp.neu.f32 	%p131, %f122, 0f7F800000;
	@%p131 bra 	$L__BB0_109;

	selp.f32 	%f854, 0fFF800000, 0f7F800000, %p6;

$L__BB0_109:
	ld.const.u64 	%rd71, [params+144];
	cvta.to.global.u64 	%rd70, %rd71;
	ld.const.u32 	%r310, [params+136];
	mad.lo.s32 	%r309, %r310, %r5, %r4;
	cvt.u64.u32 	%rd69, %r309;
	fma.rn.f32 	%f775, %f848, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p132, %f96, 0f3F800000;
	mov.f32 	%f776, 0f3F800000;
	selp.f32 	%f777, 0f3F7FFFFF, %f775, %p132;
	mul.f32 	%f778, %f96, 0f414EB852;
	setp.lt.f32 	%p133, %f96, 0f3B4D2E1C;
	selp.f32 	%f779, %f778, %f777, %p133;
	fma.rn.f32 	%f780, %f851, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p134, %f97, 0f3F800000;
	selp.f32 	%f781, 0f3F7FFFFF, %f780, %p134;
	mul.f32 	%f782, %f97, 0f414EB852;
	setp.lt.f32 	%p135, %f97, 0f3B4D2E1C;
	selp.f32 	%f783, %f782, %f781, %p135;
	fma.rn.f32 	%f784, %f854, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p136, %f98, 0f3F800000;
	selp.f32 	%f785, 0f3F7FFFFF, %f784, %p136;
	mul.f32 	%f786, %f98, 0f414EB852;
	setp.lt.f32 	%p137, %f98, 0f3B4D2E1C;
	selp.f32 	%f787, %f786, %f785, %p137;
	min.f32 	%f788, %f779, %f776;
	mov.f32 	%f789, 0f00000000;
	max.f32 	%f790, %f789, %f788;
	mul.f32 	%f791, %f790, 0f43800000;
	cvt.rzi.u32.f32 	%r292, %f791;
	min.u32 	%r293, %r292, 255;
	min.f32 	%f792, %f783, %f776;
	max.f32 	%f793, %f789, %f792;
	mul.f32 	%f794, %f793, 0f43800000;
	cvt.rzi.u32.f32 	%r294, %f794;
	min.u32 	%r295, %r294, 255;
	min.f32 	%f795, %f787, %f776;
	max.f32 	%f796, %f789, %f795;
	mul.f32 	%f797, %f796, 0f43800000;
	cvt.rzi.u32.f32 	%r296, %f797;
	min.u32 	%r297, %r296, 255;
	shl.b64 	%rd57, %rd69, 2;
	add.s64 	%rd58, %rd70, %rd57;
	cvt.u16.u32 	%rs15, %r297;
	cvt.u16.u32 	%rs16, %r295;
	cvt.u16.u32 	%rs17, %r293;
	mov.u16 	%rs18, 255;
	st.global.v4.u8 	[%rd58], {%rs17, %rs16, %rs15, %rs18};

$L__BB0_110:
	ld.const.u32 	%r311, [params+104];
	and.b32  	%r298, %r311, 4;
	setp.eq.s32 	%p138, %r298, 0;
	@%p138 bra 	$L__BB0_120;

	ld.const.u32 	%r299, [params+108];
	setp.eq.s32 	%p139, %r299, 0;
	ld.const.u64 	%rd59, [params+224];
	cvta.to.global.u64 	%rd60, %rd59;
	ld.const.u32 	%r300, [params+216];
	mad.lo.s32 	%r301, %r300, %r5, %r4;
	mul.wide.u32 	%rd61, %r301, 8;
	add.s64 	%rd18, %rd60, %rd61;
	@%p139 bra 	$L__BB0_113;

	ld.global.v4.u16 	{%rs26, %rs27, %rs28, %rs29}, [%rd18];
	// begin inline asm
	{  cvt.f32.f16 %f798, %rs26;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f799, %rs27;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f800, %rs28;}

	// end inline asm
	add.f32 	%f801, %f57, %f798;
	add.f32 	%f802, %f58, %f799;
	add.f32 	%f803, %f59, %f800;
	mov.f32 	%f804, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs24, %f803;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs23, %f802;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs22, %f801;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs25, %f804;}

	// end inline asm
	st.global.v4.u16 	[%rd18], {%rs22, %rs23, %rs24, %rs25};
	bra.uni 	$L__BB0_120;

$L__BB0_113:
	mov.f32 	%f808, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs33, %f808;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs32, %f59;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs31, %f58;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f57;}

	// end inline asm
	st.global.v4.u16 	[%rd18], {%rs30, %rs31, %rs32, %rs33};

$L__BB0_120:
	ret;

}