// // Generated by NVIDIA NVVM Compiler // // Compiler Build ID: CL-31968024 // Cuda compilation tools, release 12.0, V12.0.76 // Based on NVVM 7.0.1 // .version 8.0 .target sm_52 .address_size 64 // .globl __raygen__oxMain .const .align 16 .b8 params[1184]; .global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; .visible .entry __raygen__oxMain() { .local .align 4 .b8 __local_depot0[28]; .reg .b64 %SP; .reg .b64 %SPL; .reg .pred %p<144>; .reg .b16 %rs<37>; .reg .f32 %f<931>; .reg .b32 %r<424>; .reg .f64 %fd<5>; .reg .b64 %rd<81>; mov.u64 %SPL, __local_depot0; add.u64 %rd1, %SPL, 0; // begin inline asm call (%r82), _optix_get_launch_index_x, (); // end inline asm // begin inline asm call (%r83), _optix_get_launch_index_y, (); // end inline asm ld.const.u64 %rd18, [params+400]; cvta.to.global.u64 %rd19, %rd18; ld.const.u32 %r88, [params+392]; mad.lo.s32 %r89, %r88, %r83, %r82; mul.wide.u32 %rd20, %r89, 4; add.s64 %rd2, %rd19, %rd20; ld.global.v2.u8 {%rs7, %rs36}, [%rd2]; or.b16 %rs9, %rs7, %rs36; and.b16 %rs10, %rs9, 255; setp.eq.s16 %p7, %rs10, 0; @%p7 bra $L__BB0_2; ld.global.u8 %rs35, [%rd2+2]; bra.uni $L__BB0_3; $L__BB0_2: ld.global.u8 %rs35, [%rd2+2]; setp.eq.s16 %p8, %rs35, 0; mov.f32 %f884, 0f00000000; mov.u16 %rs36, 0; mov.f32 %f885, %f884; mov.f32 %f886, %f884; @%p8 bra $L__BB0_4; $L__BB0_3: cvt.rn.f32.u16 %f166, %rs7; div.rn.f32 %f167, %f166, 0f437F0000; fma.rn.f32 %f168, %f167, 0f40000000, 0fBF800000; and.b16 %rs13, %rs36, 255; cvt.rn.f32.u16 %f169, %rs13; div.rn.f32 %f170, %f169, 0f437F0000; fma.rn.f32 %f171, %f170, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f172, %rs35; div.rn.f32 %f173, %f172, 0f437F0000; fma.rn.f32 %f174, %f173, 0f40000000, 0fBF800000; mul.f32 %f175, %f171, %f171; fma.rn.f32 %f176, %f168, %f168, %f175; fma.rn.f32 %f177, %f174, %f174, %f176; sqrt.rn.f32 %f178, %f177; rcp.rn.f32 %f179, %f178; mul.f32 %f886, %f179, %f174; mul.f32 %f885, %f179, %f171; mul.f32 %f884, %f168, %f179; $L__BB0_4: ld.const.v2.u32 {%r90, %r91}, [params]; add.s32 %r3, %r90, %r82; add.s32 %r4, %r91, %r83; setp.eq.f32 %p9, %f884, 0f00000000; setp.eq.f32 %p10, %f885, 0f00000000; and.pred %p11, %p9, %p10; setp.eq.f32 %p12, %f886, 0f00000000; and.pred %p13, %p12, %p11; @%p13 bra $L__BB0_117; bra.uni $L__BB0_5; $L__BB0_117: ld.const.u32 %r81, [params+104]; and.b32 %r406, %r81, 1; setp.eq.b32 %p139, %r406, 1; mov.pred %p140, 0; xor.pred %p141, %p139, %p140; not.pred %p142, %p141; @%p142 bra $L__BB0_119; ld.const.u64 %rd66, [params+144]; cvta.to.global.u64 %rd67, %rd66; ld.const.u32 %r407, [params+136]; mad.lo.s32 %r408, %r407, %r4, %r3; mul.wide.u32 %rd68, %r408, 4; add.s64 %rd69, %rd67, %rd68; mov.u16 %rs30, 0; st.global.v4.u8 [%rd69], {%rs30, %rs30, %rs30, %rs30}; $L__BB0_119: and.b32 %r409, %r81, 4; setp.eq.s32 %p143, %r409, 0; @%p143 bra $L__BB0_121; ld.const.u64 %rd70, [params+224]; cvta.to.global.u64 %rd71, %rd70; ld.const.u32 %r410, [params+216]; mad.lo.s32 %r411, %r410, %r4, %r3; mov.f32 %f861, 0f00000000; mul.wide.u32 %rd72, %r411, 8; add.s64 %rd73, %rd71, %rd72; // begin inline asm { cvt.rn.f16.f32 %rs33, %f861;} // end inline asm // begin inline asm { cvt.rn.f16.f32 %rs32, %f861;} // end inline asm // begin inline asm { cvt.rn.f16.f32 %rs31, %f861;} // end inline asm mov.u16 %rs34, 0; st.global.v4.u16 [%rd73], {%rs31, %rs32, %rs33, %rs34}; bra.uni $L__BB0_121; $L__BB0_5: ld.const.u64 %rd22, [params+432]; cvta.to.global.u64 %rd23, %rd22; ld.const.u32 %r165, [params+424]; mad.lo.s32 %r166, %r165, %r83, %r82; mul.wide.u32 %rd24, %r166, 12; add.s64 %rd25, %rd23, %rd24; ld.global.f32 %f189, [%rd25]; mul.f32 %f190, %f189, 0f3456BF95; ld.global.f32 %f191, [%rd25+4]; mul.f32 %f192, %f191, 0f3456BF95; ld.global.f32 %f193, [%rd25+8]; mul.f32 %f194, %f193, 0f3456BF95; abs.f32 %f195, %f884; div.rn.f32 %f196, %f190, %f195; abs.f32 %f197, %f885; div.rn.f32 %f198, %f192, %f197; abs.f32 %f199, %f886; div.rn.f32 %f200, %f194, %f199; abs.f32 %f201, %f196; abs.f32 %f202, %f198; abs.f32 %f203, %f200; mov.f32 %f204, 0f38D1B717; max.f32 %f205, %f201, %f204; max.f32 %f206, %f202, %f204; max.f32 %f207, %f203, %f204; fma.rn.f32 %f889, %f884, %f205, %f189; fma.rn.f32 %f890, %f885, %f206, %f191; fma.rn.f32 %f891, %f886, %f207, %f193; ld.const.u64 %rd3, [params+96]; neg.f32 %f185, %f886; neg.f32 %f184, %f885; neg.f32 %f183, %f884; mov.f32 %f187, 0f6C4ECB8F; mov.f32 %f188, 0f00000000; mov.u32 %r127, 1; mov.u32 %r130, 2; mov.u32 %r132, 3; mov.u32 %r164, 0; // begin inline asm call(%r94,%r95,%r96,%r97,%r98,%r99,%r100,%r101,%r102,%r103,%r104,%r105,%r106,%r107,%r108,%r109,%r110,%r111,%r112,%r113,%r114,%r115,%r116,%r117,%r118,%r119,%r120,%r121,%r122,%r123,%r124,%r125),_optix_trace_typed_32,(%r164,%rd3,%f889,%f890,%f891,%f183,%f184,%f185,%f188,%f187,%f188,%r127,%r164,%r164,%r130,%r164,%r132,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164,%r164); // end inline asm mov.b32 %f16, %r94; setp.lt.f32 %p14, %f16, 0f00000000; @%p14 bra $L__BB0_7; bra.uni $L__BB0_6; $L__BB0_7: fma.rn.f32 %f208, %f884, %f16, %f889; fma.rn.f32 %f209, %f885, %f16, %f890; fma.rn.f32 %f210, %f886, %f16, %f891; mul.f32 %f211, %f208, 0f3456BF95; mul.f32 %f212, %f209, 0f3456BF95; mul.f32 %f213, %f210, 0f3456BF95; abs.f32 %f888, %f183; div.rn.f32 %f214, %f211, %f888; abs.f32 %f215, %f184; div.rn.f32 %f216, %f212, %f215; abs.f32 %f887, %f185; div.rn.f32 %f217, %f213, %f887; abs.f32 %f218, %f214; abs.f32 %f219, %f216; abs.f32 %f220, %f217; max.f32 %f222, %f218, %f204; max.f32 %f223, %f219, %f204; max.f32 %f224, %f220, %f204; fma.rn.f32 %f889, %f222, %f183, %f208; fma.rn.f32 %f890, %f223, %f184, %f209; fma.rn.f32 %f891, %f224, %f185, %f210; bra.uni $L__BB0_8; $L__BB0_6: abs.f32 %f888, %f183; abs.f32 %f887, %f185; $L__BB0_8: setp.gt.f32 %p15, %f888, %f887; selp.f32 %f228, 0f00000000, %f184, %p15; mov.f32 %f904, 0f00000000; selp.f32 %f229, %f183, %f886, %p15; selp.f32 %f230, %f885, 0f00000000, %p15; mul.f32 %f231, %f229, %f229; fma.rn.f32 %f232, %f230, %f230, %f231; fma.rn.f32 %f233, %f228, %f228, %f232; sqrt.rn.f32 %f234, %f233; rcp.rn.f32 %f235, %f234; mul.f32 %f29, %f230, %f235; mul.f32 %f30, %f229, %f235; mul.f32 %f31, %f228, %f235; ld.const.u32 %r5, [params+540]; setp.lt.s32 %p16, %r5, 1; mov.f32 %f905, %f904; mov.f32 %f906, %f904; @%p16 bra $L__BB0_39; ld.const.u64 %rd26, [params+128]; ld.const.u32 %r168, [params+120]; cvt.rn.f32.s32 %f239, %r5; rcp.rn.f32 %f32, %f239; mad.lo.s32 %r169, %r168, %r83, %r82; cvta.to.global.u64 %rd27, %rd26; mul.wide.u32 %rd28, %r169, 4; add.s64 %rd29, %rd27, %rd28; ld.global.u32 %r416, [%rd29]; mul.f32 %f33, %f889, 0f3456BF95; mul.f32 %f34, %f890, 0f3456BF95; mul.f32 %f35, %f891, 0f3456BF95; mul.f32 %f240, %f30, %f183; mul.f32 %f241, %f29, %f184; sub.f32 %f36, %f241, %f240; mul.f32 %f242, %f29, %f185; mul.f32 %f243, %f31, %f183; sub.f32 %f37, %f243, %f242; mul.f32 %f244, %f31, %f184; mul.f32 %f245, %f30, %f185; sub.f32 %f38, %f245, %f244; mov.u32 %r167, 0; add.s64 %rd4, %rd1, 24; mov.u64 %rd30, __cudart_i2opi_f; abs.f32 %f311, %f34; abs.f32 %f312, %f33; max.f32 %f313, %f312, %f311; abs.f32 %f314, %f35; max.f32 %f315, %f313, %f314; mov.u32 %r413, %r167; $L__BB0_10: mov.u32 %r415, %r167; $L__BB0_11: cvt.rn.f32.s32 %f868, %r413; mad.lo.s32 %r171, %r416, 1664525, 1013904223; and.b32 %r172, %r171, 16777215; cvt.rn.f32.u32 %f246, %r172; fma.rn.f32 %f247, %f246, 0f33800000, %f868; mul.f32 %f248, %f32, %f247; mad.lo.s32 %r416, %r171, 1664525, 1013904223; and.b32 %r173, %r416, 16777215; cvt.rn.f32.u32 %f249, %r173; cvt.rn.f32.s32 %f250, %r415; fma.rn.f32 %f251, %f249, 0f33800000, %f250; mul.f32 %f252, %f32, %f251; sqrt.rn.f32 %f46, %f248; mul.f32 %f47, %f252, 0f40C90FDB; mul.f32 %f253, %f47, 0f3F22F983; cvt.rni.s32.f32 %r423, %f253; cvt.rn.f32.s32 %f254, %r423; mov.f32 %f255, 0fBFC90FDA; fma.rn.f32 %f256, %f254, %f255, %f47; mov.f32 %f257, 0fB3A22168; fma.rn.f32 %f258, %f254, %f257, %f256; mov.f32 %f259, 0fA7C234C5; fma.rn.f32 %f901, %f254, %f259, %f258; abs.f32 %f49, %f47; setp.ltu.f32 %p17, %f49, 0f47CE4780; mov.u32 %r420, %r423; mov.f32 %f898, %f901; @%p17 bra $L__BB0_19; setp.eq.f32 %p18, %f49, 0f7F800000; @%p18 bra $L__BB0_18; bra.uni $L__BB0_13; $L__BB0_18: mov.f32 %f262, 0f00000000; mul.rn.f32 %f898, %f47, %f262; mov.u32 %r420, 0; bra.uni $L__BB0_19; $L__BB0_13: mov.b32 %r13, %f47; bfe.u32 %r175, %r13, 23, 8; add.s32 %r14, %r175, -128; shl.b32 %r176, %r13, 8; or.b32 %r15, %r176, -2147483648; shr.u32 %r16, %r14, 5; mov.u64 %rd78, 0; mov.u32 %r417, 0; mov.u64 %rd76, %rd1; mov.u64 %rd77, %rd30; $L__BB0_14: .pragma "nounroll"; ld.global.nc.u32 %r177, [%rd77]; mad.wide.u32 %rd32, %r177, %r15, %rd78; shr.u64 %rd78, %rd32, 32; st.local.u32 [%rd76], %rd32; add.s64 %rd77, %rd77, 4; add.s64 %rd76, %rd76, 4; add.s32 %r417, %r417, 1; setp.ne.s32 %p19, %r417, 6; @%p19 bra $L__BB0_14; st.local.u32 [%rd4], %rd78; mov.u32 %r178, 4; sub.s32 %r19, %r178, %r16; mov.u32 %r179, 6; sub.s32 %r180, %r179, %r16; mul.wide.s32 %rd33, %r180, 4; add.s64 %rd34, %rd1, %rd33; ld.local.u32 %r418, [%rd34]; ld.local.u32 %r419, [%rd34+-4]; and.b32 %r22, %r14, 31; setp.eq.s32 %p20, %r22, 0; @%p20 bra $L__BB0_17; mov.u32 %r181, 32; sub.s32 %r182, %r181, %r22; shr.u32 %r183, %r419, %r182; shl.b32 %r184, %r418, %r22; add.s32 %r418, %r183, %r184; mul.wide.s32 %rd35, %r19, 4; add.s64 %rd36, %rd1, %rd35; ld.local.u32 %r185, [%rd36]; shr.u32 %r186, %r185, %r182; shl.b32 %r187, %r419, %r22; add.s32 %r419, %r186, %r187; $L__BB0_17: and.b32 %r188, %r13, -2147483648; shr.u32 %r189, %r419, 30; shl.b32 %r190, %r418, 2; or.b32 %r191, %r189, %r190; shr.u32 %r192, %r191, 31; shr.u32 %r193, %r418, 30; add.s32 %r194, %r192, %r193; neg.s32 %r195, %r194; setp.eq.s32 %p21, %r188, 0; selp.b32 %r420, %r194, %r195, %p21; setp.ne.s32 %p22, %r192, 0; xor.b32 %r196, %r188, -2147483648; selp.b32 %r197, %r196, %r188, %p22; selp.b32 %r198, -1, 0, %p22; xor.b32 %r199, %r191, %r198; shl.b32 %r200, %r419, 2; xor.b32 %r201, %r200, %r198; cvt.u64.u32 %rd37, %r199; cvt.u64.u32 %rd38, %r201; bfi.b64 %rd39, %rd37, %rd38, 32, 32; cvt.rn.f64.s64 %fd1, %rd39; mul.f64 %fd2, %fd1, 0d3BF921FB54442D19; cvt.rn.f32.f64 %f260, %fd2; setp.eq.s32 %p23, %r197, 0; neg.f32 %f261, %f260; selp.f32 %f898, %f260, %f261, %p23; $L__BB0_19: add.s32 %r29, %r420, 1; and.b32 %r30, %r29, 1; setp.eq.s32 %p24, %r30, 0; selp.f32 %f53, %f898, 0f3F800000, %p24; mul.rn.f32 %f54, %f898, %f898; mov.f32 %f899, 0fB94D4153; @%p24 bra $L__BB0_21; mov.f32 %f264, 0fBAB607ED; mov.f32 %f265, 0f37CBAC00; fma.rn.f32 %f899, %f265, %f54, %f264; $L__BB0_21: selp.f32 %f266, 0f3C0885E4, 0f3D2AAABB, %p24; fma.rn.f32 %f267, %f899, %f54, %f266; selp.f32 %f268, 0fBE2AAAA8, 0fBEFFFFFF, %p24; fma.rn.f32 %f269, %f267, %f54, %f268; mov.f32 %f270, 0f00000000; fma.rn.f32 %f271, %f54, %f53, %f270; fma.rn.f32 %f900, %f269, %f271, %f53; and.b32 %r203, %r29, 2; setp.eq.s32 %p26, %r203, 0; @%p26 bra $L__BB0_23; mov.f32 %f273, 0fBF800000; fma.rn.f32 %f900, %f900, %f273, %f270; $L__BB0_23: @%p17 bra $L__BB0_31; setp.eq.f32 %p28, %f49, 0f7F800000; @%p28 bra $L__BB0_30; bra.uni $L__BB0_25; $L__BB0_30: mov.f32 %f276, 0f00000000; mul.rn.f32 %f901, %f47, %f276; mov.u32 %r423, 0; bra.uni $L__BB0_31; $L__BB0_25: mov.b32 %r31, %f47; bfe.u32 %r204, %r31, 23, 8; add.s32 %r32, %r204, -128; shl.b32 %r205, %r31, 8; or.b32 %r33, %r205, -2147483648; shr.u32 %r34, %r32, 5; mov.u64 %rd79, 0; mov.u64 %rd80, %rd79; $L__BB0_26: .pragma "nounroll"; shl.b64 %rd42, %rd79, 2; mov.u64 %rd43, __cudart_i2opi_f; add.s64 %rd44, %rd43, %rd42; ld.global.nc.u32 %r206, [%rd44]; mad.wide.u32 %rd45, %r206, %r33, %rd80; shr.u64 %rd80, %rd45, 32; add.s64 %rd46, %rd1, %rd42; st.local.u32 [%rd46], %rd45; cvt.u32.u64 %r207, %rd79; add.s32 %r208, %r207, 1; cvt.s64.s32 %rd79, %r208; setp.ne.s32 %p29, %r208, 6; @%p29 bra $L__BB0_26; st.local.u32 [%rd4], %rd80; mov.u32 %r209, 4; sub.s32 %r35, %r209, %r34; mov.u32 %r210, 6; sub.s32 %r211, %r210, %r34; mul.wide.s32 %rd47, %r211, 4; add.s64 %rd48, %rd1, %rd47; ld.local.u32 %r421, [%rd48]; ld.local.u32 %r422, [%rd48+-4]; and.b32 %r38, %r32, 31; setp.eq.s32 %p30, %r38, 0; @%p30 bra $L__BB0_29; mov.u32 %r212, 32; sub.s32 %r213, %r212, %r38; shr.u32 %r214, %r422, %r213; shl.b32 %r215, %r421, %r38; add.s32 %r421, %r214, %r215; mul.wide.s32 %rd49, %r35, 4; add.s64 %rd50, %rd1, %rd49; ld.local.u32 %r216, [%rd50]; shr.u32 %r217, %r216, %r213; shl.b32 %r218, %r422, %r38; add.s32 %r422, %r217, %r218; $L__BB0_29: and.b32 %r219, %r31, -2147483648; shr.u32 %r220, %r422, 30; shl.b32 %r221, %r421, 2; or.b32 %r222, %r220, %r221; shr.u32 %r223, %r222, 31; shr.u32 %r224, %r421, 30; add.s32 %r225, %r223, %r224; neg.s32 %r226, %r225; setp.eq.s32 %p31, %r219, 0; selp.b32 %r423, %r225, %r226, %p31; setp.ne.s32 %p32, %r223, 0; xor.b32 %r227, %r219, -2147483648; selp.b32 %r228, %r227, %r219, %p32; selp.b32 %r229, -1, 0, %p32; xor.b32 %r230, %r222, %r229; shl.b32 %r231, %r422, 2; xor.b32 %r232, %r231, %r229; cvt.u64.u32 %rd51, %r230; cvt.u64.u32 %rd52, %r232; bfi.b64 %rd53, %rd51, %rd52, 32, 32; cvt.rn.f64.s64 %fd3, %rd53; mul.f64 %fd4, %fd3, 0d3BF921FB54442D19; cvt.rn.f32.f64 %f274, %fd4; setp.eq.s32 %p33, %r228, 0; neg.f32 %f275, %f274; selp.f32 %f901, %f274, %f275, %p33; $L__BB0_31: mul.f32 %f63, %f46, %f900; and.b32 %r45, %r423, 1; setp.eq.s32 %p34, %r45, 0; selp.f32 %f64, %f901, 0f3F800000, %p34; mul.rn.f32 %f65, %f901, %f901; mov.f32 %f902, 0fB94D4153; @%p34 bra $L__BB0_33; mov.f32 %f278, 0fBAB607ED; mov.f32 %f279, 0f37CBAC00; fma.rn.f32 %f902, %f279, %f65, %f278; $L__BB0_33: selp.f32 %f280, 0f3C0885E4, 0f3D2AAABB, %p34; fma.rn.f32 %f281, %f902, %f65, %f280; selp.f32 %f282, 0fBE2AAAA8, 0fBEFFFFFF, %p34; fma.rn.f32 %f283, %f281, %f65, %f282; mov.f32 %f284, 0f00000000; fma.rn.f32 %f285, %f65, %f64, %f284; fma.rn.f32 %f903, %f283, %f285, %f64; and.b32 %r234, %r423, 2; setp.eq.s32 %p36, %r234, 0; @%p36 bra $L__BB0_35; mov.f32 %f287, 0fBF800000; fma.rn.f32 %f903, %f903, %f287, %f284; $L__BB0_35: mul.f32 %f297, %f63, %f63; mov.f32 %f298, 0f3F800000; sub.f32 %f299, %f298, %f297; mul.f32 %f300, %f46, %f903; mul.f32 %f301, %f300, %f300; sub.f32 %f302, %f299, %f301; max.f32 %f303, %f284, %f302; sqrt.rn.f32 %f304, %f303; mul.f32 %f305, %f29, %f300; mul.f32 %f306, %f30, %f300; mul.f32 %f307, %f31, %f300; fma.rn.f32 %f308, %f38, %f63, %f305; fma.rn.f32 %f309, %f37, %f63, %f306; fma.rn.f32 %f310, %f36, %f63, %f307; fma.rn.f32 %f291, %f304, %f183, %f308; fma.rn.f32 %f292, %f304, %f184, %f309; fma.rn.f32 %f293, %f304, %f185, %f310; mov.f32 %f316, 0f38D1B717; max.f32 %f294, %f315, %f316; mov.f32 %f295, 0f6C4ECB8F; mov.u32 %r268, 1; mov.u32 %r271, 2; mov.u32 %r273, 3; mov.u32 %r276, -1082130432; mov.u32 %r305, 0; // begin inline asm call(%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260,%r261,%r262,%r263,%r264,%r265,%r266),_optix_trace_typed_32,(%r305,%rd3,%f889,%f890,%f891,%f291,%f292,%f293,%f294,%f295,%f284,%r268,%r305,%r305,%r271,%r305,%r273,%r276,%r276,%r276,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305,%r305); // end inline asm mov.b32 %f71, %r235; setp.lt.f32 %p37, %f71, 0f00000000; @%p37 bra $L__BB0_37; mov.b32 %f317, %r236; mov.b32 %f318, %r237; add.f32 %f906, %f906, %f71; add.f32 %f905, %f905, %f317; add.f32 %f904, %f904, %f318; $L__BB0_37: add.s32 %r415, %r415, 1; setp.lt.s32 %p38, %r415, %r5; @%p38 bra $L__BB0_11; add.s32 %r413, %r413, 1; setp.lt.s32 %p39, %r413, %r5; @%p39 bra $L__BB0_10; $L__BB0_39: mul.lo.s32 %r306, %r5, %r5; cvt.rn.f32.s32 %f319, %r306; rcp.rn.f32 %f320, %f319; mul.f32 %f81, %f906, %f320; mul.f32 %f82, %f905, %f320; mul.f32 %f83, %f904, %f320; ld.const.u32 %r80, [params+104]; and.b32 %r307, %r80, 1; setp.eq.b32 %p40, %r307, 1; mov.pred %p41, 0; xor.pred %p42, %p40, %p41; not.pred %p43, %p42; @%p43 bra $L__BB0_113; mov.f32 %f325, 0f3EE66666; abs.f32 %f85, %f81; setp.lt.f32 %p44, %f85, 0f00800000; mul.f32 %f327, %f85, 0f4B800000; selp.f32 %f328, %f327, %f85, %p44; selp.f32 %f329, 0fC3170000, 0fC2FE0000, %p44; mov.b32 %r308, %f328; and.b32 %r309, %r308, 8388607; or.b32 %r310, %r309, 1065353216; mov.b32 %f330, %r310; shr.u32 %r311, %r308, 23; cvt.rn.f32.u32 %f331, %r311; add.f32 %f332, %f329, %f331; setp.gt.f32 %p45, %f330, 0f3FB504F3; mul.f32 %f333, %f330, 0f3F000000; add.f32 %f334, %f332, 0f3F800000; selp.f32 %f335, %f334, %f332, %p45; selp.f32 %f336, %f333, %f330, %p45; add.f32 %f337, %f336, 0fBF800000; add.f32 %f338, %f336, 0f3F800000; rcp.approx.ftz.f32 %f339, %f338; add.f32 %f340, %f337, %f337; mul.f32 %f341, %f340, %f339; mul.f32 %f342, %f341, %f341; mov.f32 %f343, 0f3C4CAF63; mov.f32 %f344, 0f3B18F0FE; fma.rn.f32 %f345, %f344, %f342, %f343; mov.f32 %f346, 0f3DAAAABD; fma.rn.f32 %f347, %f345, %f342, %f346; mul.rn.f32 %f348, %f347, %f342; mul.rn.f32 %f349, %f348, %f341; sub.f32 %f350, %f337, %f341; add.f32 %f351, %f350, %f350; neg.f32 %f352, %f341; fma.rn.f32 %f353, %f352, %f337, %f351; mul.rn.f32 %f354, %f339, %f353; add.f32 %f355, %f349, %f341; sub.f32 %f356, %f341, %f355; add.f32 %f357, %f349, %f356; add.f32 %f358, %f354, %f357; add.f32 %f359, %f355, %f358; sub.f32 %f360, %f355, %f359; add.f32 %f361, %f358, %f360; mov.f32 %f362, 0f3F317200; mul.rn.f32 %f363, %f335, %f362; mov.f32 %f364, 0f35BFBE8E; mul.rn.f32 %f365, %f335, %f364; add.f32 %f366, %f363, %f359; sub.f32 %f367, %f363, %f366; add.f32 %f368, %f359, %f367; add.f32 %f369, %f361, %f368; add.f32 %f370, %f365, %f369; add.f32 %f371, %f366, %f370; sub.f32 %f372, %f366, %f371; add.f32 %f373, %f370, %f372; mul.rn.f32 %f374, %f325, %f371; neg.f32 %f375, %f374; fma.rn.f32 %f376, %f325, %f371, %f375; fma.rn.f32 %f377, %f325, %f373, %f376; mov.f32 %f378, 0f00000000; fma.rn.f32 %f379, %f378, %f371, %f377; add.rn.f32 %f380, %f374, %f379; neg.f32 %f381, %f380; add.rn.f32 %f382, %f374, %f381; add.rn.f32 %f383, %f382, %f379; mov.b32 %r312, %f380; setp.eq.s32 %p46, %r312, 1118925336; add.s32 %r313, %r312, -1; mov.b32 %f384, %r313; add.f32 %f385, %f383, 0f37000000; selp.f32 %f86, %f385, %f383, %p46; selp.f32 %f386, %f384, %f380, %p46; mov.f32 %f387, 0f3FB8AA3B; mul.rn.f32 %f388, %f386, %f387; cvt.rzi.f32.f32 %f389, %f388; abs.f32 %f390, %f389; setp.gt.f32 %p47, %f390, 0f42FC0000; mov.b32 %r314, %f389; and.b32 %r315, %r314, -2147483648; or.b32 %r316, %r315, 1123811328; mov.b32 %f391, %r316; selp.f32 %f392, %f391, %f389, %p47; mov.f32 %f393, 0fBF317218; fma.rn.f32 %f394, %f392, %f393, %f386; mov.f32 %f395, 0f3102E308; fma.rn.f32 %f396, %f392, %f395, %f394; mul.f32 %f397, %f396, 0f3FB8AA3B; add.f32 %f398, %f392, 0f4B40007F; mov.b32 %r317, %f398; shl.b32 %r318, %r317, 23; mov.b32 %f399, %r318; ex2.approx.ftz.f32 %f400, %f397; mul.f32 %f87, %f400, %f399; setp.eq.f32 %p48, %f87, 0f7F800000; mov.f32 %f910, 0f7F800000; @%p48 bra $L__BB0_42; fma.rn.f32 %f910, %f87, %f86, %f87; $L__BB0_42: mov.f32 %f874, 0f3E666666; cvt.rzi.f32.f32 %f873, %f874; add.f32 %f872, %f873, %f873; mov.f32 %f871, 0f3EE66666; sub.f32 %f870, %f871, %f872; abs.f32 %f869, %f870; setp.lt.f32 %p49, %f81, 0f00000000; setp.eq.f32 %p50, %f869, 0f3F800000; and.pred %p1, %p49, %p50; setp.eq.f32 %p51, %f81, 0f00000000; @%p51 bra $L__BB0_46; bra.uni $L__BB0_43; $L__BB0_46: add.f32 %f405, %f81, %f81; selp.f32 %f912, %f405, 0f00000000, %p50; bra.uni $L__BB0_47; $L__BB0_43: mov.b32 %r319, %f910; xor.b32 %r320, %r319, -2147483648; mov.b32 %f401, %r320; selp.f32 %f912, %f401, %f910, %p1; setp.geu.f32 %p52, %f81, 0f00000000; @%p52 bra $L__BB0_47; mov.f32 %f402, 0f3EE66666; cvt.rzi.f32.f32 %f403, %f402; setp.eq.f32 %p53, %f403, 0f3EE66666; @%p53 bra $L__BB0_47; mov.f32 %f912, 0f7FFFFFFF; $L__BB0_47: abs.f32 %f875, %f81; add.f32 %f406, %f875, 0f3EE66666; mov.b32 %r321, %f406; setp.lt.s32 %p55, %r321, 2139095040; @%p55 bra $L__BB0_52; abs.f32 %f876, %f81; setp.gtu.f32 %p56, %f876, 0f7F800000; @%p56 bra $L__BB0_51; bra.uni $L__BB0_49; $L__BB0_51: add.f32 %f912, %f81, 0f3EE66666; bra.uni $L__BB0_52; $L__BB0_49: abs.f32 %f877, %f81; setp.neu.f32 %p57, %f877, 0f7F800000; @%p57 bra $L__BB0_52; selp.f32 %f912, 0fFF800000, 0f7F800000, %p1; $L__BB0_52: setp.eq.f32 %p58, %f81, 0f3F800000; selp.f32 %f96, 0f3F800000, %f912, %p58; abs.f32 %f97, %f82; setp.lt.f32 %p59, %f97, 0f00800000; mul.f32 %f408, %f97, 0f4B800000; selp.f32 %f409, %f408, %f97, %p59; selp.f32 %f410, 0fC3170000, 0fC2FE0000, %p59; mov.b32 %r322, %f409; and.b32 %r323, %r322, 8388607; or.b32 %r324, %r323, 1065353216; mov.b32 %f411, %r324; shr.u32 %r325, %r322, 23; cvt.rn.f32.u32 %f412, %r325; add.f32 %f413, %f410, %f412; setp.gt.f32 %p60, %f411, 0f3FB504F3; mul.f32 %f414, %f411, 0f3F000000; add.f32 %f415, %f413, 0f3F800000; selp.f32 %f416, %f415, %f413, %p60; selp.f32 %f417, %f414, %f411, %p60; add.f32 %f418, %f417, 0fBF800000; add.f32 %f419, %f417, 0f3F800000; rcp.approx.ftz.f32 %f420, %f419; add.f32 %f421, %f418, %f418; mul.f32 %f422, %f421, %f420; mul.f32 %f423, %f422, %f422; mov.f32 %f424, 0f3C4CAF63; mov.f32 %f425, 0f3B18F0FE; fma.rn.f32 %f426, %f425, %f423, %f424; mov.f32 %f427, 0f3DAAAABD; fma.rn.f32 %f428, %f426, %f423, %f427; mul.rn.f32 %f429, %f428, %f423; mul.rn.f32 %f430, %f429, %f422; sub.f32 %f431, %f418, %f422; add.f32 %f432, %f431, %f431; neg.f32 %f433, %f422; fma.rn.f32 %f434, %f433, %f418, %f432; mul.rn.f32 %f435, %f420, %f434; add.f32 %f436, %f430, %f422; sub.f32 %f437, %f422, %f436; add.f32 %f438, %f430, %f437; add.f32 %f439, %f435, %f438; add.f32 %f440, %f436, %f439; sub.f32 %f441, %f436, %f440; add.f32 %f442, %f439, %f441; mov.f32 %f443, 0f3F317200; mul.rn.f32 %f444, %f416, %f443; mov.f32 %f445, 0f35BFBE8E; mul.rn.f32 %f446, %f416, %f445; add.f32 %f447, %f444, %f440; sub.f32 %f448, %f444, %f447; add.f32 %f449, %f440, %f448; add.f32 %f450, %f442, %f449; add.f32 %f451, %f446, %f450; add.f32 %f452, %f447, %f451; sub.f32 %f453, %f447, %f452; add.f32 %f454, %f451, %f453; mov.f32 %f455, 0f3EE66666; mul.rn.f32 %f456, %f455, %f452; neg.f32 %f457, %f456; fma.rn.f32 %f458, %f455, %f452, %f457; fma.rn.f32 %f459, %f455, %f454, %f458; mov.f32 %f460, 0f00000000; fma.rn.f32 %f461, %f460, %f452, %f459; add.rn.f32 %f462, %f456, %f461; neg.f32 %f463, %f462; add.rn.f32 %f464, %f456, %f463; add.rn.f32 %f465, %f464, %f461; mov.b32 %r326, %f462; setp.eq.s32 %p61, %r326, 1118925336; add.s32 %r327, %r326, -1; mov.b32 %f466, %r327; add.f32 %f467, %f465, 0f37000000; selp.f32 %f98, %f467, %f465, %p61; selp.f32 %f468, %f466, %f462, %p61; mov.f32 %f469, 0f3FB8AA3B; mul.rn.f32 %f470, %f468, %f469; cvt.rzi.f32.f32 %f471, %f470; abs.f32 %f472, %f471; setp.gt.f32 %p62, %f472, 0f42FC0000; mov.b32 %r328, %f471; and.b32 %r329, %r328, -2147483648; or.b32 %r330, %r329, 1123811328; mov.b32 %f473, %r330; selp.f32 %f474, %f473, %f471, %p62; mov.f32 %f475, 0fBF317218; fma.rn.f32 %f476, %f474, %f475, %f468; mov.f32 %f477, 0f3102E308; fma.rn.f32 %f478, %f474, %f477, %f476; mul.f32 %f479, %f478, 0f3FB8AA3B; add.f32 %f480, %f474, 0f4B40007F; mov.b32 %r331, %f480; shl.b32 %r332, %r331, 23; mov.b32 %f481, %r332; ex2.approx.ftz.f32 %f482, %f479; mul.f32 %f99, %f482, %f481; setp.eq.f32 %p63, %f99, 0f7F800000; mov.f32 %f913, 0f7F800000; @%p63 bra $L__BB0_54; fma.rn.f32 %f913, %f99, %f98, %f99; $L__BB0_54: setp.lt.f32 %p64, %f82, 0f00000000; and.pred %p2, %p64, %p50; setp.eq.f32 %p66, %f82, 0f00000000; @%p66 bra $L__BB0_58; bra.uni $L__BB0_55; $L__BB0_58: add.f32 %f487, %f82, %f82; selp.f32 %f915, %f487, 0f00000000, %p50; bra.uni $L__BB0_59; $L__BB0_55: mov.b32 %r333, %f913; xor.b32 %r334, %r333, -2147483648; mov.b32 %f483, %r334; selp.f32 %f915, %f483, %f913, %p2; setp.geu.f32 %p67, %f82, 0f00000000; @%p67 bra $L__BB0_59; mov.f32 %f484, 0f3EE66666; cvt.rzi.f32.f32 %f485, %f484; setp.eq.f32 %p68, %f485, 0f3EE66666; @%p68 bra $L__BB0_59; mov.f32 %f915, 0f7FFFFFFF; $L__BB0_59: abs.f32 %f878, %f82; add.f32 %f488, %f878, 0f3EE66666; mov.b32 %r335, %f488; setp.lt.s32 %p70, %r335, 2139095040; @%p70 bra $L__BB0_64; abs.f32 %f879, %f82; setp.gtu.f32 %p71, %f879, 0f7F800000; @%p71 bra $L__BB0_63; bra.uni $L__BB0_61; $L__BB0_63: add.f32 %f915, %f82, 0f3EE66666; bra.uni $L__BB0_64; $L__BB0_61: abs.f32 %f880, %f82; setp.neu.f32 %p72, %f880, 0f7F800000; @%p72 bra $L__BB0_64; selp.f32 %f915, 0fFF800000, 0f7F800000, %p2; $L__BB0_64: setp.eq.f32 %p73, %f82, 0f3F800000; selp.f32 %f108, 0f3F800000, %f915, %p73; abs.f32 %f109, %f83; setp.lt.f32 %p74, %f109, 0f00800000; mul.f32 %f490, %f109, 0f4B800000; selp.f32 %f491, %f490, %f109, %p74; selp.f32 %f492, 0fC3170000, 0fC2FE0000, %p74; mov.b32 %r336, %f491; and.b32 %r337, %r336, 8388607; or.b32 %r338, %r337, 1065353216; mov.b32 %f493, %r338; shr.u32 %r339, %r336, 23; cvt.rn.f32.u32 %f494, %r339; add.f32 %f495, %f492, %f494; setp.gt.f32 %p75, %f493, 0f3FB504F3; mul.f32 %f496, %f493, 0f3F000000; add.f32 %f497, %f495, 0f3F800000; selp.f32 %f498, %f497, %f495, %p75; selp.f32 %f499, %f496, %f493, %p75; add.f32 %f500, %f499, 0fBF800000; add.f32 %f501, %f499, 0f3F800000; rcp.approx.ftz.f32 %f502, %f501; add.f32 %f503, %f500, %f500; mul.f32 %f504, %f503, %f502; mul.f32 %f505, %f504, %f504; mov.f32 %f506, 0f3C4CAF63; mov.f32 %f507, 0f3B18F0FE; fma.rn.f32 %f508, %f507, %f505, %f506; mov.f32 %f509, 0f3DAAAABD; fma.rn.f32 %f510, %f508, %f505, %f509; mul.rn.f32 %f511, %f510, %f505; mul.rn.f32 %f512, %f511, %f504; sub.f32 %f513, %f500, %f504; add.f32 %f514, %f513, %f513; neg.f32 %f515, %f504; fma.rn.f32 %f516, %f515, %f500, %f514; mul.rn.f32 %f517, %f502, %f516; add.f32 %f518, %f512, %f504; sub.f32 %f519, %f504, %f518; add.f32 %f520, %f512, %f519; add.f32 %f521, %f517, %f520; add.f32 %f522, %f518, %f521; sub.f32 %f523, %f518, %f522; add.f32 %f524, %f521, %f523; mov.f32 %f525, 0f3F317200; mul.rn.f32 %f526, %f498, %f525; mov.f32 %f527, 0f35BFBE8E; mul.rn.f32 %f528, %f498, %f527; add.f32 %f529, %f526, %f522; sub.f32 %f530, %f526, %f529; add.f32 %f531, %f522, %f530; add.f32 %f532, %f524, %f531; add.f32 %f533, %f528, %f532; add.f32 %f534, %f529, %f533; sub.f32 %f535, %f529, %f534; add.f32 %f536, %f533, %f535; mov.f32 %f537, 0f3EE66666; mul.rn.f32 %f538, %f537, %f534; neg.f32 %f539, %f538; fma.rn.f32 %f540, %f537, %f534, %f539; fma.rn.f32 %f541, %f537, %f536, %f540; mov.f32 %f542, 0f00000000; fma.rn.f32 %f543, %f542, %f534, %f541; add.rn.f32 %f544, %f538, %f543; neg.f32 %f545, %f544; add.rn.f32 %f546, %f538, %f545; add.rn.f32 %f547, %f546, %f543; mov.b32 %r340, %f544; setp.eq.s32 %p76, %r340, 1118925336; add.s32 %r341, %r340, -1; mov.b32 %f548, %r341; add.f32 %f549, %f547, 0f37000000; selp.f32 %f110, %f549, %f547, %p76; selp.f32 %f550, %f548, %f544, %p76; mov.f32 %f551, 0f3FB8AA3B; mul.rn.f32 %f552, %f550, %f551; cvt.rzi.f32.f32 %f553, %f552; abs.f32 %f554, %f553; setp.gt.f32 %p77, %f554, 0f42FC0000; mov.b32 %r342, %f553; and.b32 %r343, %r342, -2147483648; or.b32 %r344, %r343, 1123811328; mov.b32 %f555, %r344; selp.f32 %f556, %f555, %f553, %p77; mov.f32 %f557, 0fBF317218; fma.rn.f32 %f558, %f556, %f557, %f550; mov.f32 %f559, 0f3102E308; fma.rn.f32 %f560, %f556, %f559, %f558; mul.f32 %f561, %f560, 0f3FB8AA3B; add.f32 %f562, %f556, 0f4B40007F; mov.b32 %r345, %f562; shl.b32 %r346, %r345, 23; mov.b32 %f563, %r346; ex2.approx.ftz.f32 %f564, %f561; mul.f32 %f111, %f564, %f563; setp.eq.f32 %p78, %f111, 0f7F800000; mov.f32 %f916, 0f7F800000; @%p78 bra $L__BB0_66; fma.rn.f32 %f916, %f111, %f110, %f111; $L__BB0_66: setp.lt.f32 %p79, %f83, 0f00000000; and.pred %p3, %p79, %p50; setp.eq.f32 %p81, %f83, 0f00000000; @%p81 bra $L__BB0_70; bra.uni $L__BB0_67; $L__BB0_70: add.f32 %f569, %f83, %f83; selp.f32 %f918, %f569, 0f00000000, %p50; bra.uni $L__BB0_71; $L__BB0_67: mov.b32 %r347, %f916; xor.b32 %r348, %r347, -2147483648; mov.b32 %f565, %r348; selp.f32 %f918, %f565, %f916, %p3; setp.geu.f32 %p82, %f83, 0f00000000; @%p82 bra $L__BB0_71; mov.f32 %f566, 0f3EE66666; cvt.rzi.f32.f32 %f567, %f566; setp.eq.f32 %p83, %f567, 0f3EE66666; @%p83 bra $L__BB0_71; mov.f32 %f918, 0f7FFFFFFF; $L__BB0_71: abs.f32 %f881, %f83; add.f32 %f570, %f881, 0f3EE66666; mov.b32 %r349, %f570; setp.lt.s32 %p85, %r349, 2139095040; @%p85 bra $L__BB0_76; abs.f32 %f882, %f83; setp.gtu.f32 %p86, %f882, 0f7F800000; @%p86 bra $L__BB0_75; bra.uni $L__BB0_73; $L__BB0_75: add.f32 %f918, %f83, 0f3EE66666; bra.uni $L__BB0_76; $L__BB0_73: abs.f32 %f883, %f83; setp.neu.f32 %p87, %f883, 0f7F800000; @%p87 bra $L__BB0_76; selp.f32 %f918, 0fFF800000, 0f7F800000, %p3; $L__BB0_76: setp.eq.f32 %p88, %f83, 0f3F800000; mov.f32 %f572, 0f3F800000; selp.f32 %f573, 0f3F800000, %f918, %p88; ld.const.u32 %r350, [params+136]; mad.lo.s32 %r351, %r350, %r4, %r3; cvt.u64.u32 %rd16, %r351; min.f32 %f574, %f96, %f572; mov.f32 %f575, 0f00000000; max.f32 %f120, %f575, %f574; min.f32 %f576, %f108, %f572; max.f32 %f121, %f575, %f576; min.f32 %f577, %f573, %f572; max.f32 %f122, %f575, %f577; mov.f32 %f581, 0f3ED55555; abs.f32 %f124, %f120; setp.lt.f32 %p89, %f124, 0f00800000; mul.f32 %f583, %f124, 0f4B800000; selp.f32 %f584, %f583, %f124, %p89; selp.f32 %f585, 0fC3170000, 0fC2FE0000, %p89; mov.b32 %r352, %f584; and.b32 %r353, %r352, 8388607; or.b32 %r354, %r353, 1065353216; mov.b32 %f586, %r354; shr.u32 %r355, %r352, 23; cvt.rn.f32.u32 %f587, %r355; add.f32 %f588, %f585, %f587; setp.gt.f32 %p90, %f586, 0f3FB504F3; mul.f32 %f589, %f586, 0f3F000000; add.f32 %f590, %f588, 0f3F800000; selp.f32 %f591, %f590, %f588, %p90; selp.f32 %f592, %f589, %f586, %p90; add.f32 %f593, %f592, 0fBF800000; add.f32 %f594, %f592, 0f3F800000; rcp.approx.ftz.f32 %f595, %f594; add.f32 %f596, %f593, %f593; mul.f32 %f597, %f596, %f595; mul.f32 %f598, %f597, %f597; mov.f32 %f599, 0f3C4CAF63; mov.f32 %f600, 0f3B18F0FE; fma.rn.f32 %f601, %f600, %f598, %f599; mov.f32 %f602, 0f3DAAAABD; fma.rn.f32 %f603, %f601, %f598, %f602; mul.rn.f32 %f604, %f603, %f598; mul.rn.f32 %f605, %f604, %f597; sub.f32 %f606, %f593, %f597; add.f32 %f607, %f606, %f606; neg.f32 %f608, %f597; fma.rn.f32 %f609, %f608, %f593, %f607; mul.rn.f32 %f610, %f595, %f609; add.f32 %f611, %f605, %f597; sub.f32 %f612, %f597, %f611; add.f32 %f613, %f605, %f612; add.f32 %f614, %f610, %f613; add.f32 %f615, %f611, %f614; sub.f32 %f616, %f611, %f615; add.f32 %f617, %f614, %f616; mov.f32 %f618, 0f3F317200; mul.rn.f32 %f619, %f591, %f618; mov.f32 %f620, 0f35BFBE8E; mul.rn.f32 %f621, %f591, %f620; add.f32 %f622, %f619, %f615; sub.f32 %f623, %f619, %f622; add.f32 %f624, %f615, %f623; add.f32 %f625, %f617, %f624; add.f32 %f626, %f621, %f625; add.f32 %f627, %f622, %f626; sub.f32 %f628, %f622, %f627; add.f32 %f629, %f626, %f628; mul.rn.f32 %f630, %f581, %f627; neg.f32 %f631, %f630; fma.rn.f32 %f632, %f581, %f627, %f631; fma.rn.f32 %f633, %f581, %f629, %f632; fma.rn.f32 %f634, %f575, %f627, %f633; add.rn.f32 %f635, %f630, %f634; neg.f32 %f636, %f635; add.rn.f32 %f637, %f630, %f636; add.rn.f32 %f638, %f637, %f634; mov.b32 %r356, %f635; setp.eq.s32 %p91, %r356, 1118925336; add.s32 %r357, %r356, -1; mov.b32 %f639, %r357; add.f32 %f640, %f638, 0f37000000; selp.f32 %f125, %f640, %f638, %p91; selp.f32 %f641, %f639, %f635, %p91; mov.f32 %f642, 0f3FB8AA3B; mul.rn.f32 %f643, %f641, %f642; cvt.rzi.f32.f32 %f644, %f643; abs.f32 %f645, %f644; setp.gt.f32 %p92, %f645, 0f42FC0000; mov.b32 %r358, %f644; and.b32 %r359, %r358, -2147483648; or.b32 %r360, %r359, 1123811328; mov.b32 %f646, %r360; selp.f32 %f647, %f646, %f644, %p92; mov.f32 %f648, 0fBF317218; fma.rn.f32 %f649, %f647, %f648, %f641; mov.f32 %f650, 0f3102E308; fma.rn.f32 %f651, %f647, %f650, %f649; mul.f32 %f652, %f651, 0f3FB8AA3B; add.f32 %f653, %f647, 0f4B40007F; mov.b32 %r361, %f653; shl.b32 %r362, %r361, 23; mov.b32 %f654, %r362; ex2.approx.ftz.f32 %f655, %f652; mul.f32 %f126, %f655, %f654; setp.eq.f32 %p93, %f126, 0f7F800000; mov.f32 %f919, 0f7F800000; @%p93 bra $L__BB0_78; fma.rn.f32 %f919, %f126, %f125, %f126; $L__BB0_78: mov.f32 %f867, 0f3E555555; cvt.rzi.f32.f32 %f866, %f867; add.f32 %f865, %f866, %f866; mov.f32 %f864, 0f3ED55555; sub.f32 %f863, %f864, %f865; abs.f32 %f862, %f863; setp.lt.f32 %p94, %f120, 0f00000000; setp.eq.f32 %p95, %f862, 0f3F800000; and.pred %p4, %p94, %p95; setp.eq.f32 %p96, %f120, 0f00000000; @%p96 bra $L__BB0_82; bra.uni $L__BB0_79; $L__BB0_82: add.f32 %f660, %f120, %f120; selp.f32 %f921, %f660, 0f00000000, %p95; bra.uni $L__BB0_83; $L__BB0_79: mov.b32 %r363, %f919; xor.b32 %r364, %r363, -2147483648; mov.b32 %f656, %r364; selp.f32 %f921, %f656, %f919, %p4; setp.geu.f32 %p97, %f120, 0f00000000; @%p97 bra $L__BB0_83; mov.f32 %f657, 0f3ED55555; cvt.rzi.f32.f32 %f658, %f657; setp.eq.f32 %p98, %f658, 0f3ED55555; @%p98 bra $L__BB0_83; mov.f32 %f921, 0f7FFFFFFF; $L__BB0_83: add.f32 %f661, %f124, 0f3ED55555; mov.b32 %r365, %f661; setp.lt.s32 %p100, %r365, 2139095040; @%p100 bra $L__BB0_88; setp.gtu.f32 %p101, %f124, 0f7F800000; @%p101 bra $L__BB0_87; bra.uni $L__BB0_85; $L__BB0_87: add.f32 %f921, %f120, 0f3ED55555; bra.uni $L__BB0_88; $L__BB0_85: setp.neu.f32 %p102, %f124, 0f7F800000; @%p102 bra $L__BB0_88; selp.f32 %f921, 0fFF800000, 0f7F800000, %p4; $L__BB0_88: abs.f32 %f135, %f121; setp.lt.f32 %p103, %f135, 0f00800000; mul.f32 %f663, %f135, 0f4B800000; selp.f32 %f664, %f663, %f135, %p103; selp.f32 %f665, 0fC3170000, 0fC2FE0000, %p103; mov.b32 %r366, %f664; and.b32 %r367, %r366, 8388607; or.b32 %r368, %r367, 1065353216; mov.b32 %f666, %r368; shr.u32 %r369, %r366, 23; cvt.rn.f32.u32 %f667, %r369; add.f32 %f668, %f665, %f667; setp.gt.f32 %p104, %f666, 0f3FB504F3; mul.f32 %f669, %f666, 0f3F000000; add.f32 %f670, %f668, 0f3F800000; selp.f32 %f671, %f670, %f668, %p104; selp.f32 %f672, %f669, %f666, %p104; add.f32 %f673, %f672, 0fBF800000; add.f32 %f674, %f672, 0f3F800000; rcp.approx.ftz.f32 %f675, %f674; add.f32 %f676, %f673, %f673; mul.f32 %f677, %f676, %f675; mul.f32 %f678, %f677, %f677; mov.f32 %f679, 0f3C4CAF63; mov.f32 %f680, 0f3B18F0FE; fma.rn.f32 %f681, %f680, %f678, %f679; mov.f32 %f682, 0f3DAAAABD; fma.rn.f32 %f683, %f681, %f678, %f682; mul.rn.f32 %f684, %f683, %f678; mul.rn.f32 %f685, %f684, %f677; sub.f32 %f686, %f673, %f677; add.f32 %f687, %f686, %f686; neg.f32 %f688, %f677; fma.rn.f32 %f689, %f688, %f673, %f687; mul.rn.f32 %f690, %f675, %f689; add.f32 %f691, %f685, %f677; sub.f32 %f692, %f677, %f691; add.f32 %f693, %f685, %f692; add.f32 %f694, %f690, %f693; add.f32 %f695, %f691, %f694; sub.f32 %f696, %f691, %f695; add.f32 %f697, %f694, %f696; mov.f32 %f698, 0f3F317200; mul.rn.f32 %f699, %f671, %f698; mov.f32 %f700, 0f35BFBE8E; mul.rn.f32 %f701, %f671, %f700; add.f32 %f702, %f699, %f695; sub.f32 %f703, %f699, %f702; add.f32 %f704, %f695, %f703; add.f32 %f705, %f697, %f704; add.f32 %f706, %f701, %f705; add.f32 %f707, %f702, %f706; sub.f32 %f708, %f702, %f707; add.f32 %f709, %f706, %f708; mov.f32 %f710, 0f3ED55555; mul.rn.f32 %f711, %f710, %f707; neg.f32 %f712, %f711; fma.rn.f32 %f713, %f710, %f707, %f712; fma.rn.f32 %f714, %f710, %f709, %f713; mov.f32 %f715, 0f00000000; fma.rn.f32 %f716, %f715, %f707, %f714; add.rn.f32 %f717, %f711, %f716; neg.f32 %f718, %f717; add.rn.f32 %f719, %f711, %f718; add.rn.f32 %f720, %f719, %f716; mov.b32 %r370, %f717; setp.eq.s32 %p105, %r370, 1118925336; add.s32 %r371, %r370, -1; mov.b32 %f721, %r371; add.f32 %f722, %f720, 0f37000000; selp.f32 %f136, %f722, %f720, %p105; selp.f32 %f723, %f721, %f717, %p105; mov.f32 %f724, 0f3FB8AA3B; mul.rn.f32 %f725, %f723, %f724; cvt.rzi.f32.f32 %f726, %f725; abs.f32 %f727, %f726; setp.gt.f32 %p106, %f727, 0f42FC0000; mov.b32 %r372, %f726; and.b32 %r373, %r372, -2147483648; or.b32 %r374, %r373, 1123811328; mov.b32 %f728, %r374; selp.f32 %f729, %f728, %f726, %p106; mov.f32 %f730, 0fBF317218; fma.rn.f32 %f731, %f729, %f730, %f723; mov.f32 %f732, 0f3102E308; fma.rn.f32 %f733, %f729, %f732, %f731; mul.f32 %f734, %f733, 0f3FB8AA3B; add.f32 %f735, %f729, 0f4B40007F; mov.b32 %r375, %f735; shl.b32 %r376, %r375, 23; mov.b32 %f736, %r376; ex2.approx.ftz.f32 %f737, %f734; mul.f32 %f137, %f737, %f736; setp.eq.f32 %p107, %f137, 0f7F800000; mov.f32 %f922, 0f7F800000; @%p107 bra $L__BB0_90; fma.rn.f32 %f922, %f137, %f136, %f137; $L__BB0_90: setp.lt.f32 %p108, %f121, 0f00000000; and.pred %p5, %p108, %p95; setp.eq.f32 %p110, %f121, 0f00000000; @%p110 bra $L__BB0_94; bra.uni $L__BB0_91; $L__BB0_94: add.f32 %f742, %f121, %f121; selp.f32 %f924, %f742, 0f00000000, %p95; bra.uni $L__BB0_95; $L__BB0_91: mov.b32 %r377, %f922; xor.b32 %r378, %r377, -2147483648; mov.b32 %f738, %r378; selp.f32 %f924, %f738, %f922, %p5; setp.geu.f32 %p111, %f121, 0f00000000; @%p111 bra $L__BB0_95; mov.f32 %f739, 0f3ED55555; cvt.rzi.f32.f32 %f740, %f739; setp.eq.f32 %p112, %f740, 0f3ED55555; @%p112 bra $L__BB0_95; mov.f32 %f924, 0f7FFFFFFF; $L__BB0_95: add.f32 %f743, %f135, 0f3ED55555; mov.b32 %r379, %f743; setp.lt.s32 %p114, %r379, 2139095040; @%p114 bra $L__BB0_100; setp.gtu.f32 %p115, %f135, 0f7F800000; @%p115 bra $L__BB0_99; bra.uni $L__BB0_97; $L__BB0_99: add.f32 %f924, %f121, 0f3ED55555; bra.uni $L__BB0_100; $L__BB0_97: setp.neu.f32 %p116, %f135, 0f7F800000; @%p116 bra $L__BB0_100; selp.f32 %f924, 0fFF800000, 0f7F800000, %p5; $L__BB0_100: abs.f32 %f146, %f122; setp.lt.f32 %p117, %f146, 0f00800000; mul.f32 %f745, %f146, 0f4B800000; selp.f32 %f746, %f745, %f146, %p117; selp.f32 %f747, 0fC3170000, 0fC2FE0000, %p117; mov.b32 %r380, %f746; and.b32 %r381, %r380, 8388607; or.b32 %r382, %r381, 1065353216; mov.b32 %f748, %r382; shr.u32 %r383, %r380, 23; cvt.rn.f32.u32 %f749, %r383; add.f32 %f750, %f747, %f749; setp.gt.f32 %p118, %f748, 0f3FB504F3; mul.f32 %f751, %f748, 0f3F000000; add.f32 %f752, %f750, 0f3F800000; selp.f32 %f753, %f752, %f750, %p118; selp.f32 %f754, %f751, %f748, %p118; add.f32 %f755, %f754, 0fBF800000; add.f32 %f756, %f754, 0f3F800000; rcp.approx.ftz.f32 %f757, %f756; add.f32 %f758, %f755, %f755; mul.f32 %f759, %f758, %f757; mul.f32 %f760, %f759, %f759; mov.f32 %f761, 0f3C4CAF63; mov.f32 %f762, 0f3B18F0FE; fma.rn.f32 %f763, %f762, %f760, %f761; mov.f32 %f764, 0f3DAAAABD; fma.rn.f32 %f765, %f763, %f760, %f764; mul.rn.f32 %f766, %f765, %f760; mul.rn.f32 %f767, %f766, %f759; sub.f32 %f768, %f755, %f759; add.f32 %f769, %f768, %f768; neg.f32 %f770, %f759; fma.rn.f32 %f771, %f770, %f755, %f769; mul.rn.f32 %f772, %f757, %f771; add.f32 %f773, %f767, %f759; sub.f32 %f774, %f759, %f773; add.f32 %f775, %f767, %f774; add.f32 %f776, %f772, %f775; add.f32 %f777, %f773, %f776; sub.f32 %f778, %f773, %f777; add.f32 %f779, %f776, %f778; mov.f32 %f780, 0f3F317200; mul.rn.f32 %f781, %f753, %f780; mov.f32 %f782, 0f35BFBE8E; mul.rn.f32 %f783, %f753, %f782; add.f32 %f784, %f781, %f777; sub.f32 %f785, %f781, %f784; add.f32 %f786, %f777, %f785; add.f32 %f787, %f779, %f786; add.f32 %f788, %f783, %f787; add.f32 %f789, %f784, %f788; sub.f32 %f790, %f784, %f789; add.f32 %f791, %f788, %f790; mov.f32 %f792, 0f3ED55555; mul.rn.f32 %f793, %f792, %f789; neg.f32 %f794, %f793; fma.rn.f32 %f795, %f792, %f789, %f794; fma.rn.f32 %f796, %f792, %f791, %f795; mov.f32 %f797, 0f00000000; fma.rn.f32 %f798, %f797, %f789, %f796; add.rn.f32 %f799, %f793, %f798; neg.f32 %f800, %f799; add.rn.f32 %f801, %f793, %f800; add.rn.f32 %f802, %f801, %f798; mov.b32 %r384, %f799; setp.eq.s32 %p119, %r384, 1118925336; add.s32 %r385, %r384, -1; mov.b32 %f803, %r385; add.f32 %f804, %f802, 0f37000000; selp.f32 %f147, %f804, %f802, %p119; selp.f32 %f805, %f803, %f799, %p119; mov.f32 %f806, 0f3FB8AA3B; mul.rn.f32 %f807, %f805, %f806; cvt.rzi.f32.f32 %f808, %f807; abs.f32 %f809, %f808; setp.gt.f32 %p120, %f809, 0f42FC0000; mov.b32 %r386, %f808; and.b32 %r387, %r386, -2147483648; or.b32 %r388, %r387, 1123811328; mov.b32 %f810, %r388; selp.f32 %f811, %f810, %f808, %p120; mov.f32 %f812, 0fBF317218; fma.rn.f32 %f813, %f811, %f812, %f805; mov.f32 %f814, 0f3102E308; fma.rn.f32 %f815, %f811, %f814, %f813; mul.f32 %f816, %f815, 0f3FB8AA3B; add.f32 %f817, %f811, 0f4B40007F; mov.b32 %r389, %f817; shl.b32 %r390, %r389, 23; mov.b32 %f818, %r390; ex2.approx.ftz.f32 %f819, %f816; mul.f32 %f148, %f819, %f818; setp.eq.f32 %p121, %f148, 0f7F800000; mov.f32 %f925, 0f7F800000; @%p121 bra $L__BB0_102; fma.rn.f32 %f925, %f148, %f147, %f148; $L__BB0_102: setp.lt.f32 %p122, %f122, 0f00000000; and.pred %p6, %p122, %p95; setp.eq.f32 %p124, %f122, 0f00000000; @%p124 bra $L__BB0_106; bra.uni $L__BB0_103; $L__BB0_106: add.f32 %f824, %f122, %f122; selp.f32 %f927, %f824, 0f00000000, %p95; bra.uni $L__BB0_107; $L__BB0_103: mov.b32 %r391, %f925; xor.b32 %r392, %r391, -2147483648; mov.b32 %f820, %r392; selp.f32 %f927, %f820, %f925, %p6; setp.geu.f32 %p125, %f122, 0f00000000; @%p125 bra $L__BB0_107; mov.f32 %f821, 0f3ED55555; cvt.rzi.f32.f32 %f822, %f821; setp.eq.f32 %p126, %f822, 0f3ED55555; @%p126 bra $L__BB0_107; mov.f32 %f927, 0f7FFFFFFF; $L__BB0_107: add.f32 %f825, %f146, 0f3ED55555; mov.b32 %r393, %f825; setp.lt.s32 %p128, %r393, 2139095040; @%p128 bra $L__BB0_112; setp.gtu.f32 %p129, %f146, 0f7F800000; @%p129 bra $L__BB0_111; bra.uni $L__BB0_109; $L__BB0_111: add.f32 %f927, %f122, 0f3ED55555; bra.uni $L__BB0_112; $L__BB0_109: setp.neu.f32 %p130, %f146, 0f7F800000; @%p130 bra $L__BB0_112; selp.f32 %f927, 0fFF800000, 0f7F800000, %p6; $L__BB0_112: ld.const.u64 %rd75, [params+144]; cvta.to.global.u64 %rd74, %rd75; fma.rn.f32 %f826, %f921, 0f3F870A3D, 0fBD6147AE; setp.eq.f32 %p131, %f120, 0f3F800000; mov.f32 %f827, 0f3F800000; selp.f32 %f828, 0f3F7FFFFF, %f826, %p131; mul.f32 %f829, %f120, 0f414EB852; setp.lt.f32 %p132, %f120, 0f3B4D2E1C; selp.f32 %f830, %f829, %f828, %p132; fma.rn.f32 %f831, %f924, 0f3F870A3D, 0fBD6147AE; setp.eq.f32 %p133, %f121, 0f3F800000; selp.f32 %f832, 0f3F7FFFFF, %f831, %p133; mul.f32 %f833, %f121, 0f414EB852; setp.lt.f32 %p134, %f121, 0f3B4D2E1C; selp.f32 %f834, %f833, %f832, %p134; fma.rn.f32 %f835, %f927, 0f3F870A3D, 0fBD6147AE; setp.eq.f32 %p135, %f122, 0f3F800000; selp.f32 %f836, 0f3F7FFFFF, %f835, %p135; mul.f32 %f837, %f122, 0f414EB852; setp.lt.f32 %p136, %f122, 0f3B4D2E1C; selp.f32 %f838, %f837, %f836, %p136; min.f32 %f839, %f830, %f827; mov.f32 %f840, 0f00000000; max.f32 %f841, %f840, %f839; mul.f32 %f842, %f841, 0f43800000; cvt.rzi.u32.f32 %r394, %f842; min.u32 %r395, %r394, 255; min.f32 %f843, %f834, %f827; max.f32 %f844, %f840, %f843; mul.f32 %f845, %f844, 0f43800000; cvt.rzi.u32.f32 %r396, %f845; min.u32 %r397, %r396, 255; min.f32 %f846, %f838, %f827; max.f32 %f847, %f840, %f846; mul.f32 %f848, %f847, 0f43800000; cvt.rzi.u32.f32 %r398, %f848; min.u32 %r399, %r398, 255; shl.b64 %rd56, %rd16, 2; add.s64 %rd57, %rd74, %rd56; cvt.u16.u32 %rs15, %r399; cvt.u16.u32 %rs16, %r397; cvt.u16.u32 %rs17, %r395; mov.u16 %rs18, 255; st.global.v4.u8 [%rd57], {%rs17, %rs16, %rs15, %rs18}; $L__BB0_113: ld.const.u32 %r412, [params+104]; and.b32 %r400, %r412, 4; setp.eq.s32 %p137, %r400, 0; @%p137 bra $L__BB0_121; ld.const.u32 %r401, [params+1128]; setp.eq.s32 %p138, %r401, 0; mov.f32 %f928, 0f00000000; mov.f32 %f929, %f928; mov.f32 %f930, %f928; @%p138 bra $L__BB0_116; ld.const.u64 %rd58, [params+496]; cvta.to.global.u64 %rd59, %rd58; ld.const.u32 %r402, [params+488]; mad.lo.s32 %r403, %r402, %r83, %r82; mul.wide.u32 %rd60, %r403, 8; add.s64 %rd61, %rd59, %rd60; ld.global.v4.u16 {%rs22, %rs23, %rs24, %rs25}, [%rd61]; // begin inline asm { cvt.f32.f16 %f930, %rs22;} // end inline asm // begin inline asm { cvt.f32.f16 %f929, %rs23;} // end inline asm // begin inline asm { cvt.f32.f16 %f928, %rs24;} // end inline asm $L__BB0_116: ld.const.u64 %rd62, [params+224]; cvta.to.global.u64 %rd63, %rd62; ld.const.u32 %r404, [params+216]; mad.lo.s32 %r405, %r404, %r4, %r3; add.f32 %f855, %f81, %f930; add.f32 %f856, %f82, %f929; add.f32 %f857, %f83, %f928; mov.f32 %f858, 0f3F800000; mul.wide.u32 %rd64, %r405, 8; add.s64 %rd65, %rd63, %rd64; // begin inline asm { cvt.rn.f16.f32 %rs28, %f857;} // end inline asm // begin inline asm { cvt.rn.f16.f32 %rs27, %f856;} // end inline asm // begin inline asm { cvt.rn.f16.f32 %rs26, %f855;} // end inline asm // begin inline asm { cvt.rn.f16.f32 %rs29, %f858;} // end inline asm st.global.v4.u16 [%rd65], {%rs26, %rs27, %rs28, %rs29}; $L__BB0_121: ret; }