//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];

.visible .entry __raygen__oxMain()
{
	.reg .pred 	%p<179>;
	.reg .b16 	%rs<65>;
	.reg .f32 	%f<1422>;
	.reg .b32 	%r<419>;
	.reg .b64 	%rd<54>;


	// begin inline asm
	call (%r22), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r23), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u64 	%rd13, [params+400];
	cvta.to.global.u64 	%rd14, %rd13;
	ld.const.u32 	%r28, [params+392];
	mad.lo.s32 	%r29, %r28, %r23, %r22;
	mul.wide.u32 	%rd15, %r29, 4;
	add.s64 	%rd1, %rd14, %rd15;
	ld.global.v2.u8 	{%rs9, %rs63}, [%rd1];
	or.b16  	%rs11, %rs9, %rs63;
	and.b16  	%rs12, %rs11, 255;
	setp.eq.s16 	%p10, %rs12, 0;
	@%p10 bra 	$L__BB0_2;

	ld.global.u8 	%rs62, [%rd1+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs62, [%rd1+2];
	setp.eq.s16 	%p11, %rs62, 0;
	mov.f32 	%f1341, 0f00000000;
	mov.u16 	%rs63, 0;
	mov.f32 	%f1342, %f1341;
	mov.f32 	%f1343, %f1341;
	@%p11 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f244, %rs9;
	div.rn.f32 	%f245, %f244, 0f437F0000;
	fma.rn.f32 	%f246, %f245, 0f40000000, 0fBF800000;
	and.b16  	%rs15, %rs63, 255;
	cvt.rn.f32.u16 	%f247, %rs15;
	div.rn.f32 	%f248, %f247, 0f437F0000;
	fma.rn.f32 	%f249, %f248, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f250, %rs62;
	div.rn.f32 	%f251, %f250, 0f437F0000;
	fma.rn.f32 	%f252, %f251, 0f40000000, 0fBF800000;
	mul.f32 	%f253, %f249, %f249;
	fma.rn.f32 	%f254, %f246, %f246, %f253;
	fma.rn.f32 	%f255, %f252, %f252, %f254;
	sqrt.rn.f32 	%f256, %f255;
	rcp.rn.f32 	%f257, %f256;
	mul.f32 	%f1343, %f257, %f252;
	mul.f32 	%f1342, %f257, %f249;
	mul.f32 	%f1341, %f246, %f257;

$L__BB0_4:
	ld.const.v2.u32 	{%r30, %r31}, [params];
	add.s32 	%r3, %r30, %r22;
	add.s32 	%r4, %r31, %r23;
	setp.eq.f32 	%p12, %f1341, 0f00000000;
	setp.eq.f32 	%p13, %f1342, 0f00000000;
	and.pred  	%p14, %p12, %p13;
	setp.eq.f32 	%p15, %f1343, 0f00000000;
	and.pred  	%p16, %p15, %p14;
	@%p16 bra 	$L__BB0_141;
	bra.uni 	$L__BB0_5;

$L__BB0_141:
	ld.const.u32 	%r21, [params+104];
	and.b32  	%r400, %r21, 1;
	setp.eq.b32 	%p170, %r400, 1;
	mov.pred 	%p171, 0;
	xor.pred  	%p172, %p170, %p171;
	not.pred 	%p173, %p172;
	@%p173 bra 	$L__BB0_143;

	ld.const.u64 	%rd38, [params+144];
	cvta.to.global.u64 	%rd39, %rd38;
	ld.const.u32 	%r401, [params+136];
	mad.lo.s32 	%r402, %r401, %r4, %r3;
	mul.wide.u32 	%rd40, %r402, 4;
	add.s64 	%rd41, %rd39, %rd40;
	mov.u16 	%rs43, 0;
	st.global.v4.u8 	[%rd41], {%rs43, %rs43, %rs43, %rs43};

$L__BB0_143:
	and.b32  	%r403, %r21, 8;
	setp.eq.s32 	%p174, %r403, 0;
	@%p174 bra 	$L__BB0_145;

	ld.const.u64 	%rd42, [params+192];
	cvta.to.global.u64 	%rd43, %rd42;
	ld.const.u32 	%r404, [params+184];
	mad.lo.s32 	%r405, %r404, %r4, %r3;
	mov.f32 	%f1328, 0f00000000;
	cvt.rzi.u32.f32 	%r406, %f1328;
	mul.wide.u32 	%rd44, %r405, 2;
	add.s64 	%rd45, %rd43, %rd44;
	mov.u16 	%rs44, 0;
	cvt.u16.u32 	%rs45, %r406;
	st.global.v2.u8 	[%rd45], {%rs45, %rs44};

$L__BB0_145:
	and.b32  	%r407, %r21, 4;
	setp.eq.s32 	%p175, %r407, 0;
	@%p175 bra 	$L__BB0_149;

	ld.const.u32 	%r408, [params+108];
	setp.eq.s32 	%p176, %r408, 0;
	ld.const.u64 	%rd46, [params+224];
	cvta.to.global.u64 	%rd47, %rd46;
	ld.const.u32 	%r409, [params+216];
	mad.lo.s32 	%r410, %r409, %r4, %r3;
	mul.wide.u32 	%rd48, %r410, 8;
	add.s64 	%rd12, %rd47, %rd48;
	@%p176 bra 	$L__BB0_148;

	ld.global.v4.u16 	{%rs52, %rs53, %rs54, %rs55}, [%rd12];
	// begin inline asm
	{  cvt.f32.f16 %f1329, %rs52;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1330, %rs53;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1331, %rs54;}

	// end inline asm
	add.f32 	%f1332, %f1329, 0f00000000;
	add.f32 	%f1333, %f1330, 0f00000000;
	add.f32 	%f1334, %f1331, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs51, %f1334;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f1333;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs49, %f1332;}

	// end inline asm
	mov.u16 	%rs56, 0;
	st.global.v4.u16 	[%rd12], {%rs49, %rs50, %rs51, %rs56};
	bra.uni 	$L__BB0_149;

$L__BB0_5:
	ld.const.u64 	%rd16, [params+432];
	cvta.to.global.u64 	%rd17, %rd16;
	ld.const.u32 	%r34, [params+424];
	mad.lo.s32 	%r35, %r34, %r23, %r22;
	mul.wide.u32 	%rd18, %r35, 12;
	add.s64 	%rd19, %rd17, %rd18;
	ld.global.f32 	%f10, [%rd19];
	mul.f32 	%f258, %f10, 0f3456BF95;
	ld.global.f32 	%f11, [%rd19+4];
	mul.f32 	%f259, %f11, 0f3456BF95;
	ld.global.f32 	%f12, [%rd19+8];
	mul.f32 	%f260, %f12, 0f3456BF95;
	abs.f32 	%f261, %f1341;
	div.rn.f32 	%f262, %f258, %f261;
	abs.f32 	%f263, %f1342;
	div.rn.f32 	%f264, %f259, %f263;
	abs.f32 	%f265, %f1343;
	div.rn.f32 	%f266, %f260, %f265;
	abs.f32 	%f267, %f262;
	abs.f32 	%f268, %f264;
	abs.f32 	%f269, %f266;
	mov.f32 	%f270, 0f38D1B717;
	max.f32 	%f271, %f267, %f270;
	max.f32 	%f272, %f268, %f270;
	max.f32 	%f273, %f269, %f270;
	fma.rn.f32 	%f13, %f1341, %f271, %f10;
	fma.rn.f32 	%f14, %f1342, %f272, %f11;
	fma.rn.f32 	%f15, %f1343, %f273, %f12;
	cvt.rn.f32.u32 	%f16, %r22;
	cvt.rn.f32.u32 	%f17, %r23;
	ld.const.u32 	%r5, [params+600];
	setp.eq.s32 	%p17, %r5, 0;
	@%p17 bra 	$L__BB0_46;

	ld.const.u64 	%rd20, [params+608];
	cvta.to.global.u64 	%rd2, %rd20;
	mov.f32 	%f281, 0f40000000;
	cvt.rzi.f32.f32 	%f282, %f281;
	add.f32 	%f283, %f282, %f282;
	mov.f32 	%f284, 0f40800000;
	sub.f32 	%f285, %f284, %f283;
	abs.f32 	%f18, %f285;
	ld.const.u32 	%r6, [params+544];
	ld.const.u32 	%r418, [params+104];
	and.b32  	%r37, %r418, 32;
	setp.eq.s32 	%p18, %r37, 0;
	mov.u32 	%r414, 0;
	selp.f32 	%f19, 0f3F800000, 0f41200000, %p18;
	mul.f32 	%f20, %f13, 0f3456BF95;
	mul.f32 	%f21, %f14, 0f3456BF95;
	mul.f32 	%f22, %f15, 0f3456BF95;
	mov.f32 	%f280, 0f00000000;
	ld.const.u64 	%rd3, [params+96];
	abs.f32 	%f476, %f20;
	abs.f32 	%f477, %f21;
	max.f32 	%f478, %f476, %f477;
	abs.f32 	%f479, %f22;
	max.f32 	%f480, %f478, %f479;
	mov.f32 	%f1393, %f280;
	mov.f32 	%f1392, %f280;
	mov.f32 	%f1391, %f280;
	mov.f32 	%f1390, %f280;
	mov.f32 	%f1389, %f280;
	mov.f32 	%f1388, %f280;
	mov.f32 	%f1387, %f280;

$L__BB0_7:
	mul.wide.u32 	%rd21, %r414, 112;
	add.s64 	%rd5, %rd2, %rd21;
	ld.global.v4.f32 	{%f287, %f288, %f289, %f290}, [%rd5];
	ld.global.v4.f32 	{%f294, %f295, %f296, %f297}, [%rd5+16];
	ld.global.v4.f32 	{%f300, %f1359, %f1360, %f303}, [%rd5+32];
	ld.global.v4.f32 	{%f304, %f305, %f306, %f1357}, [%rd5+48];
	ld.global.v4.f32 	{%f308, %f309, %f310, %f311}, [%rd5+64];
	ld.global.v4.u32 	{%r38, %r39, %r40, %r41}, [%rd5+80];
	mov.b32 	%f48, %r38;
	mov.b32 	%f49, %r39;
	mov.b32 	%f50, %r40;
	ld.global.u64 	%rd6, [%rd5+96];
	sub.f32 	%f51, %f288, %f10;
	sub.f32 	%f52, %f289, %f11;
	sub.f32 	%f53, %f290, %f12;
	mul.f32 	%f312, %f52, %f52;
	fma.rn.f32 	%f313, %f51, %f51, %f312;
	fma.rn.f32 	%f314, %f53, %f53, %f313;
	sqrt.rn.f32 	%f315, %f314;
	rcp.rn.f32 	%f316, %f315;
	mul.f32 	%f54, %f51, %f316;
	mul.f32 	%f55, %f52, %f316;
	mul.f32 	%f56, %f53, %f316;
	mul.f32 	%f57, %f315, %f295;
	mul.f32 	%f58, %f315, %f297;
	abs.f32 	%f59, %f58;
	setp.lt.f32 	%p19, %f59, 0f00800000;
	mul.f32 	%f317, %f59, 0f4B800000;
	selp.f32 	%f318, %f317, %f59, %p19;
	selp.f32 	%f319, 0fC3170000, 0fC2FE0000, %p19;
	mov.b32 	%r45, %f318;
	and.b32  	%r46, %r45, 8388607;
	or.b32  	%r47, %r46, 1065353216;
	mov.b32 	%f320, %r47;
	shr.u32 	%r48, %r45, 23;
	cvt.rn.f32.u32 	%f321, %r48;
	add.f32 	%f322, %f319, %f321;
	setp.gt.f32 	%p20, %f320, 0f3FB504F3;
	mul.f32 	%f323, %f320, 0f3F000000;
	add.f32 	%f324, %f322, 0f3F800000;
	selp.f32 	%f325, %f324, %f322, %p20;
	selp.f32 	%f326, %f323, %f320, %p20;
	add.f32 	%f327, %f326, 0fBF800000;
	add.f32 	%f328, %f326, 0f3F800000;
	rcp.approx.ftz.f32 	%f329, %f328;
	add.f32 	%f330, %f327, %f327;
	mul.f32 	%f331, %f330, %f329;
	mul.f32 	%f332, %f331, %f331;
	mov.f32 	%f333, 0f3C4CAF63;
	mov.f32 	%f334, 0f3B18F0FE;
	fma.rn.f32 	%f335, %f334, %f332, %f333;
	mov.f32 	%f336, 0f3DAAAABD;
	fma.rn.f32 	%f337, %f335, %f332, %f336;
	mul.rn.f32 	%f338, %f337, %f332;
	mul.rn.f32 	%f339, %f338, %f331;
	sub.f32 	%f340, %f327, %f331;
	add.f32 	%f341, %f340, %f340;
	neg.f32 	%f342, %f331;
	fma.rn.f32 	%f343, %f342, %f327, %f341;
	mul.rn.f32 	%f344, %f329, %f343;
	add.f32 	%f345, %f339, %f331;
	sub.f32 	%f346, %f331, %f345;
	add.f32 	%f347, %f339, %f346;
	add.f32 	%f348, %f344, %f347;
	add.f32 	%f349, %f345, %f348;
	sub.f32 	%f350, %f345, %f349;
	add.f32 	%f351, %f348, %f350;
	mov.f32 	%f352, 0f3F317200;
	mul.rn.f32 	%f353, %f325, %f352;
	mov.f32 	%f354, 0f35BFBE8E;
	mul.rn.f32 	%f355, %f325, %f354;
	add.f32 	%f356, %f353, %f349;
	sub.f32 	%f357, %f353, %f356;
	add.f32 	%f358, %f349, %f357;
	add.f32 	%f359, %f351, %f358;
	add.f32 	%f360, %f355, %f359;
	add.f32 	%f361, %f356, %f360;
	sub.f32 	%f362, %f356, %f361;
	add.f32 	%f363, %f360, %f362;
	mul.rn.f32 	%f365, %f284, %f361;
	neg.f32 	%f366, %f365;
	fma.rn.f32 	%f367, %f284, %f361, %f366;
	fma.rn.f32 	%f368, %f284, %f363, %f367;
	fma.rn.f32 	%f370, %f280, %f361, %f368;
	add.rn.f32 	%f371, %f365, %f370;
	neg.f32 	%f372, %f371;
	add.rn.f32 	%f373, %f365, %f372;
	add.rn.f32 	%f374, %f373, %f370;
	mov.b32 	%r49, %f371;
	setp.eq.s32 	%p21, %r49, 1118925336;
	add.s32 	%r50, %r49, -1;
	mov.b32 	%f375, %r50;
	add.f32 	%f376, %f374, 0f37000000;
	selp.f32 	%f60, %f376, %f374, %p21;
	selp.f32 	%f377, %f375, %f371, %p21;
	mov.f32 	%f378, 0f3FB8AA3B;
	mul.rn.f32 	%f379, %f377, %f378;
	cvt.rzi.f32.f32 	%f380, %f379;
	abs.f32 	%f381, %f380;
	setp.gt.f32 	%p22, %f381, 0f42FC0000;
	mov.b32 	%r51, %f380;
	and.b32  	%r52, %r51, -2147483648;
	or.b32  	%r53, %r52, 1123811328;
	mov.b32 	%f382, %r53;
	selp.f32 	%f383, %f382, %f380, %p22;
	mov.f32 	%f384, 0fBF317218;
	fma.rn.f32 	%f385, %f383, %f384, %f377;
	mov.f32 	%f386, 0f3102E308;
	fma.rn.f32 	%f387, %f383, %f386, %f385;
	mul.f32 	%f388, %f387, 0f3FB8AA3B;
	add.f32 	%f389, %f383, 0f4B40007F;
	mov.b32 	%r54, %f389;
	shl.b32 	%r55, %r54, 23;
	mov.b32 	%f390, %r55;
	ex2.approx.ftz.f32 	%f391, %f388;
	mul.f32 	%f61, %f391, %f390;
	setp.eq.f32 	%p23, %f61, 0f7F800000;
	mov.f32 	%f1351, 0f7F800000;
	@%p23 bra 	$L__BB0_9;

	fma.rn.f32 	%f1351, %f61, %f60, %f61;

$L__BB0_9:
	setp.lt.f32 	%p24, %f58, 0f00000000;
	setp.eq.f32 	%p25, %f18, 0f3F800000;
	and.pred  	%p1, %p24, %p25;
	setp.eq.f32 	%p26, %f58, 0f00000000;
	@%p26 bra 	$L__BB0_13;
	bra.uni 	$L__BB0_10;

$L__BB0_13:
	add.f32 	%f396, %f58, %f58;
	selp.f32 	%f1353, %f396, 0f00000000, %p25;
	bra.uni 	$L__BB0_14;

$L__BB0_10:
	mov.b32 	%r56, %f1351;
	xor.b32  	%r57, %r56, -2147483648;
	mov.b32 	%f392, %r57;
	selp.f32 	%f1353, %f392, %f1351, %p1;
	setp.geu.f32 	%p27, %f58, 0f00000000;
	@%p27 bra 	$L__BB0_14;

	mov.f32 	%f393, 0f40800000;
	cvt.rzi.f32.f32 	%f394, %f393;
	setp.eq.f32 	%p28, %f394, 0f40800000;
	@%p28 bra 	$L__BB0_14;

	mov.f32 	%f1353, 0f7FFFFFFF;

$L__BB0_14:
	abs.f32 	%f1338, %f58;
	add.f32 	%f397, %f1338, 0f40800000;
	mov.b32 	%r58, %f397;
	setp.lt.s32 	%p30, %r58, 2139095040;
	@%p30 bra 	$L__BB0_19;

	abs.f32 	%f1339, %f58;
	setp.gtu.f32 	%p31, %f1339, 0f7F800000;
	@%p31 bra 	$L__BB0_18;
	bra.uni 	$L__BB0_16;

$L__BB0_18:
	add.f32 	%f1353, %f58, 0f40800000;
	bra.uni 	$L__BB0_19;

$L__BB0_16:
	abs.f32 	%f1340, %f58;
	setp.neu.f32 	%p32, %f1340, 0f7F800000;
	@%p32 bra 	$L__BB0_19;

	selp.f32 	%f1353, 0fFF800000, 0f7F800000, %p1;

$L__BB0_19:
	mov.f32 	%f398, 0f3F800000;
	sub.f32 	%f399, %f398, %f1353;
	setp.eq.f32 	%p33, %f58, 0f3F800000;
	selp.f32 	%f400, 0f00000000, %f399, %p33;
	cvt.sat.f32.f32 	%f401, %f400;
	fma.rn.f32 	%f402, %f57, %f57, %f296;
	div.rn.f32 	%f70, %f401, %f402;
	mul.f32 	%f403, %f1342, %f55;
	fma.rn.f32 	%f404, %f1341, %f54, %f403;
	fma.rn.f32 	%f71, %f1343, %f56, %f404;
	setp.eq.f32 	%p34, %f287, 0f3F800000;
	@%p34 bra 	$L__BB0_25;
	bra.uni 	$L__BB0_20;

$L__BB0_25:
	setp.eq.s64 	%p38, %rd6, 0;
	mov.f32 	%f1358, %f300;
	mov.f32 	%f1361, %f70;
	@%p38 bra 	$L__BB0_29;

	setp.geu.f32 	%p39, %f1357, 0f00000000;
	mov.f32 	%f1354, %f54;
	mov.f32 	%f1355, %f55;
	mov.f32 	%f1356, %f56;
	@%p39 bra 	$L__BB0_28;

	mul.f32 	%f427, %f49, %f52;
	fma.rn.f32 	%f428, %f48, %f51, %f427;
	fma.rn.f32 	%f429, %f50, %f53, %f428;
	rcp.rn.f32 	%f430, %f429;
	mul.f32 	%f1354, %f51, %f430;
	mul.f32 	%f1355, %f52, %f430;
	mul.f32 	%f1356, %f53, %f430;
	neg.f32 	%f1357, %f1357;

$L__BB0_28:
	mul.f32 	%f431, %f50, %f56;
	mul.f32 	%f432, %f49, %f55;
	neg.f32 	%f433, %f432;
	mul.f32 	%f434, %f48, %f54;
	sub.f32 	%f435, %f433, %f434;
	sub.f32 	%f436, %f435, %f431;
	setp.gt.f32 	%p40, %f436, 0f00000000;
	selp.f32 	%f437, 0f3F800000, 0f00000000, %p40;
	mov.f32 	%f438, 0f3F800000;
	mul.f32 	%f439, %f305, %f1355;
	fma.rn.f32 	%f440, %f304, %f1354, %f439;
	mul.f32 	%f441, %f309, %f1355;
	fma.rn.f32 	%f442, %f308, %f1354, %f441;
	fma.rn.f32 	%f443, %f306, %f1356, %f440;
	fma.rn.f32 	%f444, %f310, %f1356, %f442;
	fma.rn.f32 	%f445, %f1357, %f443, 0f3F000000;
	sub.f32 	%f446, %f438, %f445;
	fma.rn.f32 	%f447, %f1357, %f444, 0f3F000000;
	tex.2d.v4.f32.f32 	{%f448, %f449, %f450, %f451}, [%rd6, {%f446, %f447}];
	mul.f32 	%f452, %f437, %f448;
	mul.f32 	%f453, %f437, %f449;
	mul.f32 	%f454, %f437, %f450;
	mul.f32 	%f1358, %f300, %f452;
	mul.f32 	%f1359, %f1359, %f453;
	mul.f32 	%f1360, %f1360, %f454;
	mov.f32 	%f1361, %f70;
	bra.uni 	$L__BB0_29;

$L__BB0_20:
	setp.eq.f32 	%p35, %f287, 0f40000000;
	@%p35 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_21;

$L__BB0_23:
	setp.eq.s64 	%p37, %rd6, 0;
	mov.f32 	%f1358, %f300;
	mov.f32 	%f1361, %f70;
	@%p37 bra 	$L__BB0_29;

	mul.f32 	%f414, %f305, %f55;
	fma.rn.f32 	%f415, %f304, %f54, %f414;
	mul.f32 	%f416, %f309, %f55;
	fma.rn.f32 	%f417, %f308, %f54, %f416;
	mul.f32 	%f418, %f49, %f55;
	fma.rn.f32 	%f419, %f48, %f54, %f418;
	fma.rn.f32 	%f420, %f306, %f56, %f415;
	fma.rn.f32 	%f421, %f310, %f56, %f417;
	fma.rn.f32 	%f422, %f50, %f56, %f419;
	tex.cube.v4.f32.f32 	{%f423, %f424, %f425, %f426}, [%rd6, {%f420, %f421, %f422, %f422}];
	mul.f32 	%f1358, %f300, %f423;
	mul.f32 	%f1359, %f1359, %f424;
	mul.f32 	%f1360, %f1360, %f425;
	mov.f32 	%f1361, %f70;
	bra.uni 	$L__BB0_29;

$L__BB0_21:
	setp.neu.f32 	%p36, %f287, 0f40800000;
	mov.f32 	%f1358, %f300;
	mov.f32 	%f1361, %f70;
	@%p36 bra 	$L__BB0_29;

	mul.f32 	%f405, %f48, %f54;
	mul.f32 	%f406, %f49, %f55;
	neg.f32 	%f407, %f406;
	sub.f32 	%f408, %f407, %f405;
	mul.f32 	%f409, %f50, %f56;
	sub.f32 	%f410, %f408, %f409;
	fma.rn.f32 	%f411, %f303, %f410, %f1357;
	cvt.sat.f32.f32 	%f412, %f411;
	mul.f32 	%f413, %f412, %f412;
	mul.f32 	%f1361, %f70, %f413;
	mov.f32 	%f1358, %f300;

$L__BB0_29:
	max.f32 	%f461, %f1358, %f1359;
	max.f32 	%f462, %f461, %f1360;
	setp.eq.s32 	%p42, %r6, 0;
	selp.f32 	%f463, %f71, 0f3F800000, %p42;
	cvt.sat.f32.f32 	%f464, %f463;
	mul.f32 	%f91, %f464, %f1361;
	mul.f32 	%f465, %f91, %f462;
	setp.lt.f32 	%p43, %f465, 0f3727C5AC;
	mov.pred 	%p178, -1;
	mov.f32 	%f1362, 0f00000000;
	mov.f32 	%f1363, %f1362;
	mov.f32 	%f1364, %f1362;
	mov.f32 	%f1365, %f1362;
	mov.f32 	%f1366, %f1362;
	mov.f32 	%f1367, %f1362;
	@%p43 bra 	$L__BB0_31;

	and.b32  	%r59, %r418, 64;
	setp.eq.s32 	%p45, %r59, 0;
	mul.f32 	%f1362, %f1358, %f91;
	mul.f32 	%f1363, %f1359, %f91;
	mul.f32 	%f1364, %f1360, %f91;
	selp.f32 	%f1365, 0f00000000, %f54, %p45;
	selp.f32 	%f1366, 0f00000000, %f55, %p45;
	selp.f32 	%f1367, 0f00000000, %f56, %p45;
	mov.pred 	%p178, 0;

$L__BB0_31:
	@%p178 bra 	$L__BB0_45;

	setp.eq.s32 	%p46, %r41, 0;
	mov.u16 	%rs64, 0;
	mov.f32 	%f1386, 0f3F800000;
	mov.f32 	%f1381, %f1386;
	mov.f32 	%f1382, %f1386;
	@%p46 bra 	$L__BB0_40;

	abs.s32 	%r10, %r41;
	setp.lt.s32 	%p47, %r10, 1;
	mov.f32 	%f1371, 0f00000000;
	mov.f32 	%f1372, %f1371;
	mov.f32 	%f1373, %f1371;
	@%p47 bra 	$L__BB0_39;

	mov.f32 	%f481, 0f38D1B717;
	max.f32 	%f482, %f480, %f481;
	mul.f32 	%f104, %f19, %f482;
	and.b32  	%r11, %r10, 1;
	setp.eq.s32 	%p48, %r10, 1;
	mov.f32 	%f1373, 0f00000000;
	mov.u32 	%r417, 0;
	mov.f32 	%f1372, %f1373;
	mov.f32 	%f1371, %f1373;
	@%p48 bra 	$L__BB0_37;

	sub.s32 	%r416, %r10, %r11;

$L__BB0_36:
	cvt.rn.f32.s32 	%f504, %r417;
	add.f32 	%f505, %f16, %f504;
	sub.f32 	%f506, %f17, %f504;
	mul.f32 	%f507, %f505, 0f3DD32618;
	cvt.rmi.f32.f32 	%f508, %f507;
	sub.f32 	%f509, %f507, %f508;
	mul.f32 	%f510, %f506, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f511, %f510;
	sub.f32 	%f512, %f510, %f511;
	mul.f32 	%f513, %f504, 0f3DC74539;
	cvt.rmi.f32.f32 	%f514, %f513;
	sub.f32 	%f515, %f513, %f514;
	add.f32 	%f516, %f512, 0f420551EC;
	add.f32 	%f517, %f509, 0f420551EC;
	add.f32 	%f518, %f515, 0f420551EC;
	mul.f32 	%f519, %f509, %f516;
	fma.rn.f32 	%f520, %f512, %f517, %f519;
	fma.rn.f32 	%f521, %f515, %f518, %f520;
	add.f32 	%f522, %f509, %f521;
	add.f32 	%f523, %f512, %f521;
	add.f32 	%f524, %f515, %f521;
	add.f32 	%f525, %f522, %f523;
	mul.f32 	%f526, %f524, %f525;
	cvt.rmi.f32.f32 	%f527, %f526;
	sub.f32 	%f528, %f526, %f527;
	add.f32 	%f529, %f522, %f522;
	mul.f32 	%f530, %f523, %f529;
	cvt.rmi.f32.f32 	%f531, %f530;
	sub.f32 	%f532, %f530, %f531;
	mul.f32 	%f533, %f522, %f525;
	cvt.rmi.f32.f32 	%f534, %f533;
	sub.f32 	%f535, %f533, %f534;
	fma.rn.f32 	%f536, %f528, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f537, %f532, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f538, %f535, 0f40000000, 0fBF800000;
	ld.global.f32 	%f539, [%rd5+16];
	ld.global.f32 	%f540, [%rd5+4];
	fma.rn.f32 	%f541, %f539, %f536, %f540;
	ld.global.f32 	%f542, [%rd5+8];
	fma.rn.f32 	%f543, %f539, %f537, %f542;
	ld.global.f32 	%f544, [%rd5+12];
	fma.rn.f32 	%f545, %f539, %f538, %f544;
	sub.f32 	%f546, %f541, %f10;
	sub.f32 	%f547, %f543, %f11;
	sub.f32 	%f548, %f545, %f12;
	mul.f32 	%f549, %f547, %f547;
	fma.rn.f32 	%f550, %f546, %f546, %f549;
	fma.rn.f32 	%f551, %f548, %f548, %f550;
	sqrt.rn.f32 	%f493, %f551;
	rcp.rn.f32 	%f552, %f493;
	mul.f32 	%f489, %f552, %f546;
	mul.f32 	%f490, %f552, %f547;
	mul.f32 	%f491, %f552, %f548;
	mov.f32 	%f503, 0f00000000;
	mov.u32 	%r169, 2;
	mov.u32 	%r170, 1;
	mov.u32 	%r171, 3;
	mov.u32 	%r174, 1065353216;
	mov.u32 	%r203, 0;
	// begin inline asm
	call(%r62,%r63,%r64,%r65,%r66,%r67,%r68,%r69,%r70,%r71,%r72,%r73,%r74,%r75,%r76,%r77,%r78,%r79,%r80,%r81,%r82,%r83,%r84,%r85,%r86,%r87,%r88,%r89,%r90,%r91,%r92,%r93),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f489,%f490,%f491,%f104,%f493,%f503,%r170,%r203,%r170,%r169,%r170,%r171,%r174,%r174,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f553, %r62;
	mov.b32 	%f554, %r63;
	mov.b32 	%f555, %r64;
	add.f32 	%f556, %f1371, %f553;
	add.f32 	%f557, %f1372, %f554;
	add.f32 	%f558, %f1373, %f555;
	add.s32 	%r204, %r417, 1;
	cvt.rn.f32.s32 	%f559, %r204;
	add.f32 	%f560, %f16, %f559;
	sub.f32 	%f561, %f17, %f559;
	mul.f32 	%f562, %f560, 0f3DD32618;
	cvt.rmi.f32.f32 	%f563, %f562;
	sub.f32 	%f564, %f562, %f563;
	mul.f32 	%f565, %f561, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f566, %f565;
	sub.f32 	%f567, %f565, %f566;
	mul.f32 	%f568, %f559, 0f3DC74539;
	cvt.rmi.f32.f32 	%f569, %f568;
	sub.f32 	%f570, %f568, %f569;
	add.f32 	%f571, %f567, 0f420551EC;
	add.f32 	%f572, %f564, 0f420551EC;
	add.f32 	%f573, %f570, 0f420551EC;
	mul.f32 	%f574, %f564, %f571;
	fma.rn.f32 	%f575, %f567, %f572, %f574;
	fma.rn.f32 	%f576, %f570, %f573, %f575;
	add.f32 	%f577, %f564, %f576;
	add.f32 	%f578, %f567, %f576;
	add.f32 	%f579, %f570, %f576;
	add.f32 	%f580, %f577, %f578;
	mul.f32 	%f581, %f579, %f580;
	cvt.rmi.f32.f32 	%f582, %f581;
	sub.f32 	%f583, %f581, %f582;
	add.f32 	%f584, %f577, %f577;
	mul.f32 	%f585, %f578, %f584;
	cvt.rmi.f32.f32 	%f586, %f585;
	sub.f32 	%f587, %f585, %f586;
	mul.f32 	%f588, %f577, %f580;
	cvt.rmi.f32.f32 	%f589, %f588;
	sub.f32 	%f590, %f588, %f589;
	fma.rn.f32 	%f591, %f583, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f592, %f587, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f593, %f590, 0f40000000, 0fBF800000;
	ld.global.f32 	%f594, [%rd5+16];
	ld.global.f32 	%f595, [%rd5+4];
	fma.rn.f32 	%f596, %f594, %f591, %f595;
	ld.global.f32 	%f597, [%rd5+8];
	fma.rn.f32 	%f598, %f594, %f592, %f597;
	ld.global.f32 	%f599, [%rd5+12];
	fma.rn.f32 	%f600, %f594, %f593, %f599;
	sub.f32 	%f601, %f596, %f10;
	sub.f32 	%f602, %f598, %f11;
	sub.f32 	%f603, %f600, %f12;
	mul.f32 	%f604, %f602, %f602;
	fma.rn.f32 	%f605, %f601, %f601, %f604;
	fma.rn.f32 	%f606, %f603, %f603, %f605;
	sqrt.rn.f32 	%f502, %f606;
	rcp.rn.f32 	%f607, %f502;
	mul.f32 	%f498, %f607, %f601;
	mul.f32 	%f499, %f607, %f602;
	mul.f32 	%f500, %f607, %f603;
	// begin inline asm
	call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f498,%f499,%f500,%f104,%f502,%f503,%r170,%r203,%r170,%r169,%r170,%r171,%r174,%r174,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f608, %r133;
	mov.b32 	%f609, %r134;
	mov.b32 	%f610, %r135;
	add.f32 	%f1371, %f556, %f608;
	add.f32 	%f1372, %f557, %f609;
	add.f32 	%f1373, %f558, %f610;
	add.s32 	%r417, %r417, 2;
	add.s32 	%r416, %r416, -2;
	setp.ne.s32 	%p49, %r416, 0;
	@%p49 bra 	$L__BB0_36;

$L__BB0_37:
	setp.eq.s32 	%p50, %r11, 0;
	@%p50 bra 	$L__BB0_39;

	cvt.rn.f32.s32 	%f620, %r417;
	add.f32 	%f621, %f16, %f620;
	sub.f32 	%f622, %f17, %f620;
	mul.f32 	%f623, %f621, 0f3DD32618;
	cvt.rmi.f32.f32 	%f624, %f623;
	sub.f32 	%f625, %f623, %f624;
	mul.f32 	%f626, %f622, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f627, %f626;
	sub.f32 	%f628, %f626, %f627;
	mul.f32 	%f629, %f620, 0f3DC74539;
	cvt.rmi.f32.f32 	%f630, %f629;
	sub.f32 	%f631, %f629, %f630;
	add.f32 	%f632, %f628, 0f420551EC;
	add.f32 	%f633, %f625, 0f420551EC;
	add.f32 	%f634, %f631, 0f420551EC;
	mul.f32 	%f635, %f625, %f632;
	fma.rn.f32 	%f636, %f628, %f633, %f635;
	fma.rn.f32 	%f637, %f631, %f634, %f636;
	add.f32 	%f638, %f625, %f637;
	add.f32 	%f639, %f628, %f637;
	add.f32 	%f640, %f631, %f637;
	add.f32 	%f641, %f638, %f639;
	mul.f32 	%f642, %f640, %f641;
	cvt.rmi.f32.f32 	%f643, %f642;
	sub.f32 	%f644, %f642, %f643;
	add.f32 	%f645, %f638, %f638;
	mul.f32 	%f646, %f639, %f645;
	cvt.rmi.f32.f32 	%f647, %f646;
	sub.f32 	%f648, %f646, %f647;
	mul.f32 	%f649, %f638, %f641;
	cvt.rmi.f32.f32 	%f650, %f649;
	sub.f32 	%f651, %f649, %f650;
	fma.rn.f32 	%f652, %f644, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f653, %f648, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f654, %f651, 0f40000000, 0fBF800000;
	ld.global.f32 	%f655, [%rd5+16];
	ld.global.f32 	%f656, [%rd5+4];
	fma.rn.f32 	%f657, %f655, %f652, %f656;
	ld.global.f32 	%f658, [%rd5+8];
	fma.rn.f32 	%f659, %f655, %f653, %f658;
	ld.global.f32 	%f660, [%rd5+12];
	fma.rn.f32 	%f661, %f655, %f654, %f660;
	sub.f32 	%f662, %f657, %f10;
	sub.f32 	%f663, %f659, %f11;
	sub.f32 	%f664, %f661, %f12;
	mul.f32 	%f665, %f663, %f663;
	fma.rn.f32 	%f666, %f662, %f662, %f665;
	fma.rn.f32 	%f667, %f664, %f664, %f666;
	sqrt.rn.f32 	%f618, %f667;
	rcp.rn.f32 	%f668, %f618;
	mul.f32 	%f614, %f668, %f662;
	mul.f32 	%f615, %f668, %f663;
	mul.f32 	%f616, %f668, %f664;
	mov.f32 	%f619, 0f00000000;
	mov.u32 	%r241, 2;
	mov.u32 	%r242, 1;
	mov.u32 	%r243, 3;
	mov.u32 	%r246, 1065353216;
	mov.u32 	%r275, 0;
	// begin inline asm
	call(%r205,%r206,%r207,%r208,%r209,%r210,%r211,%r212,%r213,%r214,%r215,%r216,%r217,%r218,%r219,%r220,%r221,%r222,%r223,%r224,%r225,%r226,%r227,%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236),_optix_trace_typed_32,(%r275,%rd3,%f13,%f14,%f15,%f614,%f615,%f616,%f104,%f618,%f619,%r242,%r275,%r242,%r241,%r242,%r243,%r246,%r246,%r246,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275);
	// end inline asm
	mov.b32 	%f669, %r205;
	mov.b32 	%f670, %r206;
	mov.b32 	%f671, %r207;
	add.f32 	%f1371, %f1371, %f669;
	add.f32 	%f1372, %f1372, %f670;
	add.f32 	%f1373, %f1373, %f671;

$L__BB0_39:
	cvt.rn.f32.s32 	%f672, %r10;
	rcp.rn.f32 	%f673, %f672;
	mul.f32 	%f1386, %f673, %f1371;
	mul.f32 	%f1381, %f673, %f1372;
	mul.f32 	%f1382, %f673, %f1373;
	shr.u32 	%r276, %r41, 31;
	cvt.u16.u32 	%rs64, %r276;

$L__BB0_40:
	and.b32  	%r277, %r418, 64;
	setp.eq.s32 	%p51, %r277, 0;
	fma.rn.f32 	%f1387, %f1362, %f1386, %f1387;
	fma.rn.f32 	%f1388, %f1363, %f1381, %f1388;
	fma.rn.f32 	%f1389, %f1364, %f1382, %f1389;
	@%p51 bra 	$L__BB0_42;

	mul.f32 	%f674, %f1363, 0f3F372474;
	fma.rn.f32 	%f675, %f1362, 0f3E59999A, %f674;
	fma.rn.f32 	%f676, %f1364, 0f3D93A92A, %f675;
	fma.rn.f32 	%f1390, %f1365, %f676, %f1390;
	fma.rn.f32 	%f1391, %f1366, %f676, %f1391;
	fma.rn.f32 	%f1392, %f676, %f1367, %f1392;

$L__BB0_42:
	setp.eq.s16 	%p52, %rs64, 0;
	@%p52 bra 	$L__BB0_44;

	div.rn.f32 	%f677, %f1362, %f300;
	div.rn.f32 	%f678, %f677, %f70;
	cvt.sat.f32.f32 	%f679, %f678;
	mul.f32 	%f1386, %f1386, %f679;

$L__BB0_44:
	add.f32 	%f1393, %f1393, %f1386;

$L__BB0_45:
	cvt.u64.u32 	%rd53, %r414;
	cvt.u32.u64 	%r278, %rd53;
	add.s32 	%r414, %r278, 1;
	setp.lt.u32 	%p53, %r414, %r5;
	@%p53 bra 	$L__BB0_7;
	bra.uni 	$L__BB0_47;

$L__BB0_46:
	mov.f32 	%f1387, 0f00000000;
	ld.const.u32 	%r418, [params+104];
	mov.f32 	%f1388, %f1387;
	mov.f32 	%f1389, %f1387;
	mov.f32 	%f1390, %f1387;
	mov.f32 	%f1391, %f1387;
	mov.f32 	%f1392, %f1387;
	mov.f32 	%f1393, %f1387;

$L__BB0_47:
	and.b32  	%r279, %r418, 8;
	setp.eq.s32 	%p54, %r279, 0;
	@%p54 bra 	$L__BB0_61;

	cvt.sat.f32.f32 	%f155, %f1393;
	ld.const.u64 	%rd25, [params+192];
	cvta.to.global.u64 	%rd7, %rd25;
	ld.const.u32 	%r280, [params+184];
	mad.lo.s32 	%r281, %r280, %r4, %r3;
	cvt.u64.u32 	%rd8, %r281;
	mov.f32 	%f688, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f689, %f688;
	add.f32 	%f690, %f689, %f689;
	mov.f32 	%f691, 0f3EE8BA2E;
	sub.f32 	%f692, %f691, %f690;
	abs.f32 	%f156, %f692;
	abs.f32 	%f157, %f155;
	setp.lt.f32 	%p55, %f157, 0f00800000;
	mul.f32 	%f693, %f157, 0f4B800000;
	selp.f32 	%f694, %f693, %f157, %p55;
	selp.f32 	%f695, 0fC3170000, 0fC2FE0000, %p55;
	mov.b32 	%r282, %f694;
	and.b32  	%r283, %r282, 8388607;
	or.b32  	%r284, %r283, 1065353216;
	mov.b32 	%f696, %r284;
	shr.u32 	%r285, %r282, 23;
	cvt.rn.f32.u32 	%f697, %r285;
	add.f32 	%f698, %f695, %f697;
	setp.gt.f32 	%p56, %f696, 0f3FB504F3;
	mul.f32 	%f699, %f696, 0f3F000000;
	add.f32 	%f700, %f698, 0f3F800000;
	selp.f32 	%f701, %f700, %f698, %p56;
	selp.f32 	%f702, %f699, %f696, %p56;
	add.f32 	%f703, %f702, 0fBF800000;
	add.f32 	%f704, %f702, 0f3F800000;
	rcp.approx.ftz.f32 	%f705, %f704;
	add.f32 	%f706, %f703, %f703;
	mul.f32 	%f707, %f706, %f705;
	mul.f32 	%f708, %f707, %f707;
	mov.f32 	%f709, 0f3C4CAF63;
	mov.f32 	%f710, 0f3B18F0FE;
	fma.rn.f32 	%f711, %f710, %f708, %f709;
	mov.f32 	%f712, 0f3DAAAABD;
	fma.rn.f32 	%f713, %f711, %f708, %f712;
	mul.rn.f32 	%f714, %f713, %f708;
	mul.rn.f32 	%f715, %f714, %f707;
	sub.f32 	%f716, %f703, %f707;
	add.f32 	%f717, %f716, %f716;
	neg.f32 	%f718, %f707;
	fma.rn.f32 	%f719, %f718, %f703, %f717;
	mul.rn.f32 	%f720, %f705, %f719;
	add.f32 	%f721, %f715, %f707;
	sub.f32 	%f722, %f707, %f721;
	add.f32 	%f723, %f715, %f722;
	add.f32 	%f724, %f720, %f723;
	add.f32 	%f725, %f721, %f724;
	sub.f32 	%f726, %f721, %f725;
	add.f32 	%f727, %f724, %f726;
	mov.f32 	%f728, 0f3F317200;
	mul.rn.f32 	%f729, %f701, %f728;
	mov.f32 	%f730, 0f35BFBE8E;
	mul.rn.f32 	%f731, %f701, %f730;
	add.f32 	%f732, %f729, %f725;
	sub.f32 	%f733, %f729, %f732;
	add.f32 	%f734, %f725, %f733;
	add.f32 	%f735, %f727, %f734;
	add.f32 	%f736, %f731, %f735;
	add.f32 	%f737, %f732, %f736;
	sub.f32 	%f738, %f732, %f737;
	add.f32 	%f739, %f736, %f738;
	mul.rn.f32 	%f740, %f691, %f737;
	neg.f32 	%f741, %f740;
	fma.rn.f32 	%f742, %f691, %f737, %f741;
	fma.rn.f32 	%f743, %f691, %f739, %f742;
	mov.f32 	%f744, 0f00000000;
	fma.rn.f32 	%f745, %f744, %f737, %f743;
	add.rn.f32 	%f746, %f740, %f745;
	neg.f32 	%f747, %f746;
	add.rn.f32 	%f748, %f740, %f747;
	add.rn.f32 	%f749, %f748, %f745;
	mov.b32 	%r286, %f746;
	setp.eq.s32 	%p57, %r286, 1118925336;
	add.s32 	%r287, %r286, -1;
	mov.b32 	%f750, %r287;
	add.f32 	%f751, %f749, 0f37000000;
	selp.f32 	%f158, %f751, %f749, %p57;
	selp.f32 	%f752, %f750, %f746, %p57;
	mov.f32 	%f753, 0f3FB8AA3B;
	mul.rn.f32 	%f754, %f752, %f753;
	cvt.rzi.f32.f32 	%f755, %f754;
	abs.f32 	%f756, %f755;
	setp.gt.f32 	%p58, %f756, 0f42FC0000;
	mov.b32 	%r288, %f755;
	and.b32  	%r289, %r288, -2147483648;
	or.b32  	%r290, %r289, 1123811328;
	mov.b32 	%f757, %r290;
	selp.f32 	%f758, %f757, %f755, %p58;
	mov.f32 	%f759, 0fBF317218;
	fma.rn.f32 	%f760, %f758, %f759, %f752;
	mov.f32 	%f761, 0f3102E308;
	fma.rn.f32 	%f762, %f758, %f761, %f760;
	mul.f32 	%f763, %f762, 0f3FB8AA3B;
	add.f32 	%f764, %f758, 0f4B40007F;
	mov.b32 	%r291, %f764;
	shl.b32 	%r292, %r291, 23;
	mov.b32 	%f765, %r292;
	ex2.approx.ftz.f32 	%f766, %f763;
	mul.f32 	%f159, %f766, %f765;
	setp.eq.f32 	%p59, %f159, 0f7F800000;
	mov.f32 	%f1401, 0f7F800000;
	@%p59 bra 	$L__BB0_50;

	fma.rn.f32 	%f1401, %f159, %f158, %f159;

$L__BB0_50:
	setp.lt.f32 	%p60, %f155, 0f00000000;
	setp.eq.f32 	%p61, %f156, 0f3F800000;
	and.pred  	%p3, %p60, %p61;
	setp.eq.f32 	%p62, %f155, 0f00000000;
	@%p62 bra 	$L__BB0_54;
	bra.uni 	$L__BB0_51;

$L__BB0_54:
	add.f32 	%f771, %f155, %f155;
	selp.f32 	%f1403, %f771, 0f00000000, %p61;
	bra.uni 	$L__BB0_55;

$L__BB0_148:
	mov.f32 	%f1337, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs59, %f1337;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs58, %f1337;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs57, %f1337;}

	// end inline asm
	mov.u16 	%rs60, 0;
	st.global.v4.u16 	[%rd12], {%rs57, %rs58, %rs59, %rs60};

$L__BB0_149:
	and.b32  	%r411, %r21, 64;
	setp.eq.s32 	%p177, %r411, 0;
	@%p177 bra 	$L__BB0_151;

	ld.const.u64 	%rd49, [params+208];
	cvta.to.global.u64 	%rd50, %rd49;
	ld.const.u32 	%r412, [params+200];
	mad.lo.s32 	%r413, %r412, %r4, %r3;
	mul.wide.u32 	%rd51, %r413, 4;
	add.s64 	%rd52, %rd50, %rd51;
	mov.u16 	%rs61, 0;
	st.global.v4.u8 	[%rd52], {%rs61, %rs61, %rs61, %rs61};
	bra.uni 	$L__BB0_151;

$L__BB0_51:
	mov.b32 	%r293, %f1401;
	xor.b32  	%r294, %r293, -2147483648;
	mov.b32 	%f767, %r294;
	selp.f32 	%f1403, %f767, %f1401, %p3;
	setp.geu.f32 	%p63, %f155, 0f00000000;
	@%p63 bra 	$L__BB0_55;

	mov.f32 	%f768, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f769, %f768;
	setp.eq.f32 	%p64, %f769, 0f3EE8BA2E;
	@%p64 bra 	$L__BB0_55;

	mov.f32 	%f1403, 0f7FFFFFFF;

$L__BB0_55:
	add.f32 	%f772, %f157, 0f3EE8BA2E;
	mov.b32 	%r295, %f772;
	setp.lt.s32 	%p66, %r295, 2139095040;
	@%p66 bra 	$L__BB0_60;

	setp.gtu.f32 	%p67, %f157, 0f7F800000;
	@%p67 bra 	$L__BB0_59;
	bra.uni 	$L__BB0_57;

$L__BB0_59:
	add.f32 	%f1403, %f155, 0f3EE8BA2E;
	bra.uni 	$L__BB0_60;

$L__BB0_57:
	setp.neu.f32 	%p68, %f157, 0f7F800000;
	@%p68 bra 	$L__BB0_60;

	selp.f32 	%f1403, 0fFF800000, 0f7F800000, %p3;

$L__BB0_60:
	mul.f32 	%f773, %f1403, 0f437F0000;
	setp.eq.f32 	%p69, %f155, 0f3F800000;
	selp.f32 	%f774, 0f437F0000, %f773, %p69;
	cvt.rzi.u32.f32 	%r296, %f774;
	shl.b64 	%rd26, %rd8, 1;
	add.s64 	%rd27, %rd7, %rd26;
	cvt.u16.u32 	%rs18, %r296;
	mov.u16 	%rs19, 255;
	st.global.v2.u8 	[%rd27], {%rs18, %rs19};

$L__BB0_61:
	and.b32  	%r297, %r418, 1;
	setp.eq.b32 	%p70, %r297, 1;
	mov.pred 	%p71, 0;
	xor.pred  	%p72, %p70, %p71;
	not.pred 	%p73, %p72;
	@%p73 bra 	$L__BB0_135;

	mov.f32 	%f776, 0f3E666666;
	cvt.rzi.f32.f32 	%f777, %f776;
	add.f32 	%f778, %f777, %f777;
	mov.f32 	%f779, 0f3EE66666;
	sub.f32 	%f780, %f779, %f778;
	abs.f32 	%f168, %f780;
	abs.f32 	%f169, %f1387;
	setp.lt.f32 	%p74, %f169, 0f00800000;
	mul.f32 	%f781, %f169, 0f4B800000;
	selp.f32 	%f782, %f781, %f169, %p74;
	selp.f32 	%f783, 0fC3170000, 0fC2FE0000, %p74;
	mov.b32 	%r298, %f782;
	and.b32  	%r299, %r298, 8388607;
	or.b32  	%r300, %r299, 1065353216;
	mov.b32 	%f784, %r300;
	shr.u32 	%r301, %r298, 23;
	cvt.rn.f32.u32 	%f785, %r301;
	add.f32 	%f786, %f783, %f785;
	setp.gt.f32 	%p75, %f784, 0f3FB504F3;
	mul.f32 	%f787, %f784, 0f3F000000;
	add.f32 	%f788, %f786, 0f3F800000;
	selp.f32 	%f789, %f788, %f786, %p75;
	selp.f32 	%f790, %f787, %f784, %p75;
	add.f32 	%f791, %f790, 0fBF800000;
	add.f32 	%f792, %f790, 0f3F800000;
	rcp.approx.ftz.f32 	%f793, %f792;
	add.f32 	%f794, %f791, %f791;
	mul.f32 	%f795, %f794, %f793;
	mul.f32 	%f796, %f795, %f795;
	mov.f32 	%f797, 0f3C4CAF63;
	mov.f32 	%f798, 0f3B18F0FE;
	fma.rn.f32 	%f799, %f798, %f796, %f797;
	mov.f32 	%f800, 0f3DAAAABD;
	fma.rn.f32 	%f801, %f799, %f796, %f800;
	mul.rn.f32 	%f802, %f801, %f796;
	mul.rn.f32 	%f803, %f802, %f795;
	sub.f32 	%f804, %f791, %f795;
	add.f32 	%f805, %f804, %f804;
	neg.f32 	%f806, %f795;
	fma.rn.f32 	%f807, %f806, %f791, %f805;
	mul.rn.f32 	%f808, %f793, %f807;
	add.f32 	%f809, %f803, %f795;
	sub.f32 	%f810, %f795, %f809;
	add.f32 	%f811, %f803, %f810;
	add.f32 	%f812, %f808, %f811;
	add.f32 	%f813, %f809, %f812;
	sub.f32 	%f814, %f809, %f813;
	add.f32 	%f815, %f812, %f814;
	mov.f32 	%f816, 0f3F317200;
	mul.rn.f32 	%f817, %f789, %f816;
	mov.f32 	%f818, 0f35BFBE8E;
	mul.rn.f32 	%f819, %f789, %f818;
	add.f32 	%f820, %f817, %f813;
	sub.f32 	%f821, %f817, %f820;
	add.f32 	%f822, %f813, %f821;
	add.f32 	%f823, %f815, %f822;
	add.f32 	%f824, %f819, %f823;
	add.f32 	%f825, %f820, %f824;
	sub.f32 	%f826, %f820, %f825;
	add.f32 	%f827, %f824, %f826;
	mul.rn.f32 	%f828, %f779, %f825;
	neg.f32 	%f829, %f828;
	fma.rn.f32 	%f830, %f779, %f825, %f829;
	fma.rn.f32 	%f831, %f779, %f827, %f830;
	mov.f32 	%f832, 0f00000000;
	fma.rn.f32 	%f833, %f832, %f825, %f831;
	add.rn.f32 	%f834, %f828, %f833;
	neg.f32 	%f835, %f834;
	add.rn.f32 	%f836, %f828, %f835;
	add.rn.f32 	%f837, %f836, %f833;
	mov.b32 	%r302, %f834;
	setp.eq.s32 	%p76, %r302, 1118925336;
	add.s32 	%r303, %r302, -1;
	mov.b32 	%f838, %r303;
	add.f32 	%f839, %f837, 0f37000000;
	selp.f32 	%f170, %f839, %f837, %p76;
	selp.f32 	%f840, %f838, %f834, %p76;
	mov.f32 	%f841, 0f3FB8AA3B;
	mul.rn.f32 	%f842, %f840, %f841;
	cvt.rzi.f32.f32 	%f843, %f842;
	abs.f32 	%f844, %f843;
	setp.gt.f32 	%p77, %f844, 0f42FC0000;
	mov.b32 	%r304, %f843;
	and.b32  	%r305, %r304, -2147483648;
	or.b32  	%r306, %r305, 1123811328;
	mov.b32 	%f845, %r306;
	selp.f32 	%f846, %f845, %f843, %p77;
	mov.f32 	%f847, 0fBF317218;
	fma.rn.f32 	%f848, %f846, %f847, %f840;
	mov.f32 	%f849, 0f3102E308;
	fma.rn.f32 	%f850, %f846, %f849, %f848;
	mul.f32 	%f851, %f850, 0f3FB8AA3B;
	add.f32 	%f852, %f846, 0f4B40007F;
	mov.b32 	%r307, %f852;
	shl.b32 	%r308, %r307, 23;
	mov.b32 	%f853, %r308;
	ex2.approx.ftz.f32 	%f854, %f851;
	mul.f32 	%f171, %f854, %f853;
	setp.eq.f32 	%p78, %f171, 0f7F800000;
	mov.f32 	%f1404, 0f7F800000;
	@%p78 bra 	$L__BB0_64;

	fma.rn.f32 	%f1404, %f171, %f170, %f171;

$L__BB0_64:
	setp.lt.f32 	%p79, %f1387, 0f00000000;
	setp.eq.f32 	%p80, %f168, 0f3F800000;
	and.pred  	%p4, %p79, %p80;
	setp.eq.f32 	%p81, %f1387, 0f00000000;
	@%p81 bra 	$L__BB0_68;
	bra.uni 	$L__BB0_65;

$L__BB0_68:
	add.f32 	%f859, %f1387, %f1387;
	selp.f32 	%f1406, %f859, 0f00000000, %p80;
	bra.uni 	$L__BB0_69;

$L__BB0_65:
	mov.b32 	%r309, %f1404;
	xor.b32  	%r310, %r309, -2147483648;
	mov.b32 	%f855, %r310;
	selp.f32 	%f1406, %f855, %f1404, %p4;
	setp.geu.f32 	%p82, %f1387, 0f00000000;
	@%p82 bra 	$L__BB0_69;

	mov.f32 	%f856, 0f3EE66666;
	cvt.rzi.f32.f32 	%f857, %f856;
	setp.eq.f32 	%p83, %f857, 0f3EE66666;
	@%p83 bra 	$L__BB0_69;

	mov.f32 	%f1406, 0f7FFFFFFF;

$L__BB0_69:
	add.f32 	%f860, %f169, 0f3EE66666;
	mov.b32 	%r311, %f860;
	setp.lt.s32 	%p85, %r311, 2139095040;
	@%p85 bra 	$L__BB0_74;

	setp.gtu.f32 	%p86, %f169, 0f7F800000;
	@%p86 bra 	$L__BB0_73;
	bra.uni 	$L__BB0_71;

$L__BB0_73:
	add.f32 	%f1406, %f1387, 0f3EE66666;
	bra.uni 	$L__BB0_74;

$L__BB0_71:
	setp.neu.f32 	%p87, %f169, 0f7F800000;
	@%p87 bra 	$L__BB0_74;

	selp.f32 	%f1406, 0fFF800000, 0f7F800000, %p4;

$L__BB0_74:
	setp.eq.f32 	%p88, %f1387, 0f3F800000;
	selp.f32 	%f180, 0f3F800000, %f1406, %p88;
	abs.f32 	%f181, %f1388;
	setp.lt.f32 	%p89, %f181, 0f00800000;
	mul.f32 	%f862, %f181, 0f4B800000;
	selp.f32 	%f863, %f862, %f181, %p89;
	selp.f32 	%f864, 0fC3170000, 0fC2FE0000, %p89;
	mov.b32 	%r312, %f863;
	and.b32  	%r313, %r312, 8388607;
	or.b32  	%r314, %r313, 1065353216;
	mov.b32 	%f865, %r314;
	shr.u32 	%r315, %r312, 23;
	cvt.rn.f32.u32 	%f866, %r315;
	add.f32 	%f867, %f864, %f866;
	setp.gt.f32 	%p90, %f865, 0f3FB504F3;
	mul.f32 	%f868, %f865, 0f3F000000;
	add.f32 	%f869, %f867, 0f3F800000;
	selp.f32 	%f870, %f869, %f867, %p90;
	selp.f32 	%f871, %f868, %f865, %p90;
	add.f32 	%f872, %f871, 0fBF800000;
	add.f32 	%f873, %f871, 0f3F800000;
	rcp.approx.ftz.f32 	%f874, %f873;
	add.f32 	%f875, %f872, %f872;
	mul.f32 	%f876, %f875, %f874;
	mul.f32 	%f877, %f876, %f876;
	mov.f32 	%f878, 0f3C4CAF63;
	mov.f32 	%f879, 0f3B18F0FE;
	fma.rn.f32 	%f880, %f879, %f877, %f878;
	mov.f32 	%f881, 0f3DAAAABD;
	fma.rn.f32 	%f882, %f880, %f877, %f881;
	mul.rn.f32 	%f883, %f882, %f877;
	mul.rn.f32 	%f884, %f883, %f876;
	sub.f32 	%f885, %f872, %f876;
	add.f32 	%f886, %f885, %f885;
	neg.f32 	%f887, %f876;
	fma.rn.f32 	%f888, %f887, %f872, %f886;
	mul.rn.f32 	%f889, %f874, %f888;
	add.f32 	%f890, %f884, %f876;
	sub.f32 	%f891, %f876, %f890;
	add.f32 	%f892, %f884, %f891;
	add.f32 	%f893, %f889, %f892;
	add.f32 	%f894, %f890, %f893;
	sub.f32 	%f895, %f890, %f894;
	add.f32 	%f896, %f893, %f895;
	mov.f32 	%f897, 0f3F317200;
	mul.rn.f32 	%f898, %f870, %f897;
	mov.f32 	%f899, 0f35BFBE8E;
	mul.rn.f32 	%f900, %f870, %f899;
	add.f32 	%f901, %f898, %f894;
	sub.f32 	%f902, %f898, %f901;
	add.f32 	%f903, %f894, %f902;
	add.f32 	%f904, %f896, %f903;
	add.f32 	%f905, %f900, %f904;
	add.f32 	%f906, %f901, %f905;
	sub.f32 	%f907, %f901, %f906;
	add.f32 	%f908, %f905, %f907;
	mov.f32 	%f909, 0f3EE66666;
	mul.rn.f32 	%f910, %f909, %f906;
	neg.f32 	%f911, %f910;
	fma.rn.f32 	%f912, %f909, %f906, %f911;
	fma.rn.f32 	%f913, %f909, %f908, %f912;
	mov.f32 	%f914, 0f00000000;
	fma.rn.f32 	%f915, %f914, %f906, %f913;
	add.rn.f32 	%f916, %f910, %f915;
	neg.f32 	%f917, %f916;
	add.rn.f32 	%f918, %f910, %f917;
	add.rn.f32 	%f919, %f918, %f915;
	mov.b32 	%r316, %f916;
	setp.eq.s32 	%p91, %r316, 1118925336;
	add.s32 	%r317, %r316, -1;
	mov.b32 	%f920, %r317;
	add.f32 	%f921, %f919, 0f37000000;
	selp.f32 	%f182, %f921, %f919, %p91;
	selp.f32 	%f922, %f920, %f916, %p91;
	mov.f32 	%f923, 0f3FB8AA3B;
	mul.rn.f32 	%f924, %f922, %f923;
	cvt.rzi.f32.f32 	%f925, %f924;
	abs.f32 	%f926, %f925;
	setp.gt.f32 	%p92, %f926, 0f42FC0000;
	mov.b32 	%r318, %f925;
	and.b32  	%r319, %r318, -2147483648;
	or.b32  	%r320, %r319, 1123811328;
	mov.b32 	%f927, %r320;
	selp.f32 	%f928, %f927, %f925, %p92;
	mov.f32 	%f929, 0fBF317218;
	fma.rn.f32 	%f930, %f928, %f929, %f922;
	mov.f32 	%f931, 0f3102E308;
	fma.rn.f32 	%f932, %f928, %f931, %f930;
	mul.f32 	%f933, %f932, 0f3FB8AA3B;
	add.f32 	%f934, %f928, 0f4B40007F;
	mov.b32 	%r321, %f934;
	shl.b32 	%r322, %r321, 23;
	mov.b32 	%f935, %r322;
	ex2.approx.ftz.f32 	%f936, %f933;
	mul.f32 	%f183, %f936, %f935;
	setp.eq.f32 	%p93, %f183, 0f7F800000;
	mov.f32 	%f1407, 0f7F800000;
	@%p93 bra 	$L__BB0_76;

	fma.rn.f32 	%f1407, %f183, %f182, %f183;

$L__BB0_76:
	setp.lt.f32 	%p94, %f1388, 0f00000000;
	and.pred  	%p5, %p94, %p80;
	setp.eq.f32 	%p96, %f1388, 0f00000000;
	@%p96 bra 	$L__BB0_80;
	bra.uni 	$L__BB0_77;

$L__BB0_80:
	add.f32 	%f941, %f1388, %f1388;
	selp.f32 	%f1409, %f941, 0f00000000, %p80;
	bra.uni 	$L__BB0_81;

$L__BB0_77:
	mov.b32 	%r323, %f1407;
	xor.b32  	%r324, %r323, -2147483648;
	mov.b32 	%f937, %r324;
	selp.f32 	%f1409, %f937, %f1407, %p5;
	setp.geu.f32 	%p97, %f1388, 0f00000000;
	@%p97 bra 	$L__BB0_81;

	mov.f32 	%f938, 0f3EE66666;
	cvt.rzi.f32.f32 	%f939, %f938;
	setp.eq.f32 	%p98, %f939, 0f3EE66666;
	@%p98 bra 	$L__BB0_81;

	mov.f32 	%f1409, 0f7FFFFFFF;

$L__BB0_81:
	add.f32 	%f942, %f181, 0f3EE66666;
	mov.b32 	%r325, %f942;
	setp.lt.s32 	%p100, %r325, 2139095040;
	@%p100 bra 	$L__BB0_86;

	setp.gtu.f32 	%p101, %f181, 0f7F800000;
	@%p101 bra 	$L__BB0_85;
	bra.uni 	$L__BB0_83;

$L__BB0_85:
	add.f32 	%f1409, %f1388, 0f3EE66666;
	bra.uni 	$L__BB0_86;

$L__BB0_83:
	setp.neu.f32 	%p102, %f181, 0f7F800000;
	@%p102 bra 	$L__BB0_86;

	selp.f32 	%f1409, 0fFF800000, 0f7F800000, %p5;

$L__BB0_86:
	setp.eq.f32 	%p103, %f1388, 0f3F800000;
	selp.f32 	%f192, 0f3F800000, %f1409, %p103;
	abs.f32 	%f193, %f1389;
	setp.lt.f32 	%p104, %f193, 0f00800000;
	mul.f32 	%f944, %f193, 0f4B800000;
	selp.f32 	%f945, %f944, %f193, %p104;
	selp.f32 	%f946, 0fC3170000, 0fC2FE0000, %p104;
	mov.b32 	%r326, %f945;
	and.b32  	%r327, %r326, 8388607;
	or.b32  	%r328, %r327, 1065353216;
	mov.b32 	%f947, %r328;
	shr.u32 	%r329, %r326, 23;
	cvt.rn.f32.u32 	%f948, %r329;
	add.f32 	%f949, %f946, %f948;
	setp.gt.f32 	%p105, %f947, 0f3FB504F3;
	mul.f32 	%f950, %f947, 0f3F000000;
	add.f32 	%f951, %f949, 0f3F800000;
	selp.f32 	%f952, %f951, %f949, %p105;
	selp.f32 	%f953, %f950, %f947, %p105;
	add.f32 	%f954, %f953, 0fBF800000;
	add.f32 	%f955, %f953, 0f3F800000;
	rcp.approx.ftz.f32 	%f956, %f955;
	add.f32 	%f957, %f954, %f954;
	mul.f32 	%f958, %f957, %f956;
	mul.f32 	%f959, %f958, %f958;
	mov.f32 	%f960, 0f3C4CAF63;
	mov.f32 	%f961, 0f3B18F0FE;
	fma.rn.f32 	%f962, %f961, %f959, %f960;
	mov.f32 	%f963, 0f3DAAAABD;
	fma.rn.f32 	%f964, %f962, %f959, %f963;
	mul.rn.f32 	%f965, %f964, %f959;
	mul.rn.f32 	%f966, %f965, %f958;
	sub.f32 	%f967, %f954, %f958;
	add.f32 	%f968, %f967, %f967;
	neg.f32 	%f969, %f958;
	fma.rn.f32 	%f970, %f969, %f954, %f968;
	mul.rn.f32 	%f971, %f956, %f970;
	add.f32 	%f972, %f966, %f958;
	sub.f32 	%f973, %f958, %f972;
	add.f32 	%f974, %f966, %f973;
	add.f32 	%f975, %f971, %f974;
	add.f32 	%f976, %f972, %f975;
	sub.f32 	%f977, %f972, %f976;
	add.f32 	%f978, %f975, %f977;
	mov.f32 	%f979, 0f3F317200;
	mul.rn.f32 	%f980, %f952, %f979;
	mov.f32 	%f981, 0f35BFBE8E;
	mul.rn.f32 	%f982, %f952, %f981;
	add.f32 	%f983, %f980, %f976;
	sub.f32 	%f984, %f980, %f983;
	add.f32 	%f985, %f976, %f984;
	add.f32 	%f986, %f978, %f985;
	add.f32 	%f987, %f982, %f986;
	add.f32 	%f988, %f983, %f987;
	sub.f32 	%f989, %f983, %f988;
	add.f32 	%f990, %f987, %f989;
	mov.f32 	%f991, 0f3EE66666;
	mul.rn.f32 	%f992, %f991, %f988;
	neg.f32 	%f993, %f992;
	fma.rn.f32 	%f994, %f991, %f988, %f993;
	fma.rn.f32 	%f995, %f991, %f990, %f994;
	mov.f32 	%f996, 0f00000000;
	fma.rn.f32 	%f997, %f996, %f988, %f995;
	add.rn.f32 	%f998, %f992, %f997;
	neg.f32 	%f999, %f998;
	add.rn.f32 	%f1000, %f992, %f999;
	add.rn.f32 	%f1001, %f1000, %f997;
	mov.b32 	%r330, %f998;
	setp.eq.s32 	%p106, %r330, 1118925336;
	add.s32 	%r331, %r330, -1;
	mov.b32 	%f1002, %r331;
	add.f32 	%f1003, %f1001, 0f37000000;
	selp.f32 	%f194, %f1003, %f1001, %p106;
	selp.f32 	%f1004, %f1002, %f998, %p106;
	mov.f32 	%f1005, 0f3FB8AA3B;
	mul.rn.f32 	%f1006, %f1004, %f1005;
	cvt.rzi.f32.f32 	%f1007, %f1006;
	abs.f32 	%f1008, %f1007;
	setp.gt.f32 	%p107, %f1008, 0f42FC0000;
	mov.b32 	%r332, %f1007;
	and.b32  	%r333, %r332, -2147483648;
	or.b32  	%r334, %r333, 1123811328;
	mov.b32 	%f1009, %r334;
	selp.f32 	%f1010, %f1009, %f1007, %p107;
	mov.f32 	%f1011, 0fBF317218;
	fma.rn.f32 	%f1012, %f1010, %f1011, %f1004;
	mov.f32 	%f1013, 0f3102E308;
	fma.rn.f32 	%f1014, %f1010, %f1013, %f1012;
	mul.f32 	%f1015, %f1014, 0f3FB8AA3B;
	add.f32 	%f1016, %f1010, 0f4B40007F;
	mov.b32 	%r335, %f1016;
	shl.b32 	%r336, %r335, 23;
	mov.b32 	%f1017, %r336;
	ex2.approx.ftz.f32 	%f1018, %f1015;
	mul.f32 	%f195, %f1018, %f1017;
	setp.eq.f32 	%p108, %f195, 0f7F800000;
	mov.f32 	%f1410, 0f7F800000;
	@%p108 bra 	$L__BB0_88;

	fma.rn.f32 	%f1410, %f195, %f194, %f195;

$L__BB0_88:
	setp.lt.f32 	%p109, %f1389, 0f00000000;
	and.pred  	%p6, %p109, %p80;
	setp.eq.f32 	%p111, %f1389, 0f00000000;
	@%p111 bra 	$L__BB0_92;
	bra.uni 	$L__BB0_89;

$L__BB0_92:
	add.f32 	%f1023, %f1389, %f1389;
	selp.f32 	%f1412, %f1023, 0f00000000, %p80;
	bra.uni 	$L__BB0_93;

$L__BB0_89:
	mov.b32 	%r337, %f1410;
	xor.b32  	%r338, %r337, -2147483648;
	mov.b32 	%f1019, %r338;
	selp.f32 	%f1412, %f1019, %f1410, %p6;
	setp.geu.f32 	%p112, %f1389, 0f00000000;
	@%p112 bra 	$L__BB0_93;

	mov.f32 	%f1020, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1021, %f1020;
	setp.eq.f32 	%p113, %f1021, 0f3EE66666;
	@%p113 bra 	$L__BB0_93;

	mov.f32 	%f1412, 0f7FFFFFFF;

$L__BB0_93:
	add.f32 	%f1024, %f193, 0f3EE66666;
	mov.b32 	%r339, %f1024;
	setp.lt.s32 	%p115, %r339, 2139095040;
	@%p115 bra 	$L__BB0_98;

	setp.gtu.f32 	%p116, %f193, 0f7F800000;
	@%p116 bra 	$L__BB0_97;
	bra.uni 	$L__BB0_95;

$L__BB0_97:
	add.f32 	%f1412, %f1389, 0f3EE66666;
	bra.uni 	$L__BB0_98;

$L__BB0_95:
	setp.neu.f32 	%p117, %f193, 0f7F800000;
	@%p117 bra 	$L__BB0_98;

	selp.f32 	%f1412, 0fFF800000, 0f7F800000, %p6;

$L__BB0_98:
	setp.eq.f32 	%p118, %f1389, 0f3F800000;
	mov.f32 	%f1026, 0f3F800000;
	selp.f32 	%f1027, 0f3F800000, %f1412, %p118;
	ld.const.u64 	%rd28, [params+144];
	cvta.to.global.u64 	%rd9, %rd28;
	ld.const.u32 	%r340, [params+136];
	mad.lo.s32 	%r341, %r340, %r4, %r3;
	cvt.u64.u32 	%rd10, %r341;
	min.f32 	%f1028, %f180, %f1026;
	mov.f32 	%f1029, 0f00000000;
	max.f32 	%f204, %f1029, %f1028;
	min.f32 	%f1030, %f192, %f1026;
	max.f32 	%f205, %f1029, %f1030;
	min.f32 	%f1031, %f1027, %f1026;
	max.f32 	%f206, %f1029, %f1031;
	mov.f32 	%f1032, 0f3E555555;
	cvt.rzi.f32.f32 	%f1033, %f1032;
	add.f32 	%f1034, %f1033, %f1033;
	mov.f32 	%f1035, 0f3ED55555;
	sub.f32 	%f1036, %f1035, %f1034;
	abs.f32 	%f207, %f1036;
	abs.f32 	%f208, %f204;
	setp.lt.f32 	%p119, %f208, 0f00800000;
	mul.f32 	%f1037, %f208, 0f4B800000;
	selp.f32 	%f1038, %f1037, %f208, %p119;
	selp.f32 	%f1039, 0fC3170000, 0fC2FE0000, %p119;
	mov.b32 	%r342, %f1038;
	and.b32  	%r343, %r342, 8388607;
	or.b32  	%r344, %r343, 1065353216;
	mov.b32 	%f1040, %r344;
	shr.u32 	%r345, %r342, 23;
	cvt.rn.f32.u32 	%f1041, %r345;
	add.f32 	%f1042, %f1039, %f1041;
	setp.gt.f32 	%p120, %f1040, 0f3FB504F3;
	mul.f32 	%f1043, %f1040, 0f3F000000;
	add.f32 	%f1044, %f1042, 0f3F800000;
	selp.f32 	%f1045, %f1044, %f1042, %p120;
	selp.f32 	%f1046, %f1043, %f1040, %p120;
	add.f32 	%f1047, %f1046, 0fBF800000;
	add.f32 	%f1048, %f1046, 0f3F800000;
	rcp.approx.ftz.f32 	%f1049, %f1048;
	add.f32 	%f1050, %f1047, %f1047;
	mul.f32 	%f1051, %f1050, %f1049;
	mul.f32 	%f1052, %f1051, %f1051;
	mov.f32 	%f1053, 0f3C4CAF63;
	mov.f32 	%f1054, 0f3B18F0FE;
	fma.rn.f32 	%f1055, %f1054, %f1052, %f1053;
	mov.f32 	%f1056, 0f3DAAAABD;
	fma.rn.f32 	%f1057, %f1055, %f1052, %f1056;
	mul.rn.f32 	%f1058, %f1057, %f1052;
	mul.rn.f32 	%f1059, %f1058, %f1051;
	sub.f32 	%f1060, %f1047, %f1051;
	add.f32 	%f1061, %f1060, %f1060;
	neg.f32 	%f1062, %f1051;
	fma.rn.f32 	%f1063, %f1062, %f1047, %f1061;
	mul.rn.f32 	%f1064, %f1049, %f1063;
	add.f32 	%f1065, %f1059, %f1051;
	sub.f32 	%f1066, %f1051, %f1065;
	add.f32 	%f1067, %f1059, %f1066;
	add.f32 	%f1068, %f1064, %f1067;
	add.f32 	%f1069, %f1065, %f1068;
	sub.f32 	%f1070, %f1065, %f1069;
	add.f32 	%f1071, %f1068, %f1070;
	mov.f32 	%f1072, 0f3F317200;
	mul.rn.f32 	%f1073, %f1045, %f1072;
	mov.f32 	%f1074, 0f35BFBE8E;
	mul.rn.f32 	%f1075, %f1045, %f1074;
	add.f32 	%f1076, %f1073, %f1069;
	sub.f32 	%f1077, %f1073, %f1076;
	add.f32 	%f1078, %f1069, %f1077;
	add.f32 	%f1079, %f1071, %f1078;
	add.f32 	%f1080, %f1075, %f1079;
	add.f32 	%f1081, %f1076, %f1080;
	sub.f32 	%f1082, %f1076, %f1081;
	add.f32 	%f1083, %f1080, %f1082;
	mul.rn.f32 	%f1084, %f1035, %f1081;
	neg.f32 	%f1085, %f1084;
	fma.rn.f32 	%f1086, %f1035, %f1081, %f1085;
	fma.rn.f32 	%f1087, %f1035, %f1083, %f1086;
	fma.rn.f32 	%f1088, %f1029, %f1081, %f1087;
	add.rn.f32 	%f1089, %f1084, %f1088;
	neg.f32 	%f1090, %f1089;
	add.rn.f32 	%f1091, %f1084, %f1090;
	add.rn.f32 	%f1092, %f1091, %f1088;
	mov.b32 	%r346, %f1089;
	setp.eq.s32 	%p121, %r346, 1118925336;
	add.s32 	%r347, %r346, -1;
	mov.b32 	%f1093, %r347;
	add.f32 	%f1094, %f1092, 0f37000000;
	selp.f32 	%f209, %f1094, %f1092, %p121;
	selp.f32 	%f1095, %f1093, %f1089, %p121;
	mov.f32 	%f1096, 0f3FB8AA3B;
	mul.rn.f32 	%f1097, %f1095, %f1096;
	cvt.rzi.f32.f32 	%f1098, %f1097;
	abs.f32 	%f1099, %f1098;
	setp.gt.f32 	%p122, %f1099, 0f42FC0000;
	mov.b32 	%r348, %f1098;
	and.b32  	%r349, %r348, -2147483648;
	or.b32  	%r350, %r349, 1123811328;
	mov.b32 	%f1100, %r350;
	selp.f32 	%f1101, %f1100, %f1098, %p122;
	mov.f32 	%f1102, 0fBF317218;
	fma.rn.f32 	%f1103, %f1101, %f1102, %f1095;
	mov.f32 	%f1104, 0f3102E308;
	fma.rn.f32 	%f1105, %f1101, %f1104, %f1103;
	mul.f32 	%f1106, %f1105, 0f3FB8AA3B;
	add.f32 	%f1107, %f1101, 0f4B40007F;
	mov.b32 	%r351, %f1107;
	shl.b32 	%r352, %r351, 23;
	mov.b32 	%f1108, %r352;
	ex2.approx.ftz.f32 	%f1109, %f1106;
	mul.f32 	%f210, %f1109, %f1108;
	setp.eq.f32 	%p123, %f210, 0f7F800000;
	mov.f32 	%f1413, 0f7F800000;
	@%p123 bra 	$L__BB0_100;

	fma.rn.f32 	%f1413, %f210, %f209, %f210;

$L__BB0_100:
	setp.lt.f32 	%p124, %f204, 0f00000000;
	setp.eq.f32 	%p125, %f207, 0f3F800000;
	and.pred  	%p7, %p124, %p125;
	setp.eq.f32 	%p126, %f204, 0f00000000;
	@%p126 bra 	$L__BB0_104;
	bra.uni 	$L__BB0_101;

$L__BB0_104:
	add.f32 	%f1114, %f204, %f204;
	selp.f32 	%f1415, %f1114, 0f00000000, %p125;
	bra.uni 	$L__BB0_105;

$L__BB0_101:
	mov.b32 	%r353, %f1413;
	xor.b32  	%r354, %r353, -2147483648;
	mov.b32 	%f1110, %r354;
	selp.f32 	%f1415, %f1110, %f1413, %p7;
	setp.geu.f32 	%p127, %f204, 0f00000000;
	@%p127 bra 	$L__BB0_105;

	mov.f32 	%f1111, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1112, %f1111;
	setp.eq.f32 	%p128, %f1112, 0f3ED55555;
	@%p128 bra 	$L__BB0_105;

	mov.f32 	%f1415, 0f7FFFFFFF;

$L__BB0_105:
	add.f32 	%f1115, %f208, 0f3ED55555;
	mov.b32 	%r355, %f1115;
	setp.lt.s32 	%p130, %r355, 2139095040;
	@%p130 bra 	$L__BB0_110;

	setp.gtu.f32 	%p131, %f208, 0f7F800000;
	@%p131 bra 	$L__BB0_109;
	bra.uni 	$L__BB0_107;

$L__BB0_109:
	add.f32 	%f1415, %f204, 0f3ED55555;
	bra.uni 	$L__BB0_110;

$L__BB0_107:
	setp.neu.f32 	%p132, %f208, 0f7F800000;
	@%p132 bra 	$L__BB0_110;

	selp.f32 	%f1415, 0fFF800000, 0f7F800000, %p7;

$L__BB0_110:
	abs.f32 	%f219, %f205;
	setp.lt.f32 	%p133, %f219, 0f00800000;
	mul.f32 	%f1117, %f219, 0f4B800000;
	selp.f32 	%f1118, %f1117, %f219, %p133;
	selp.f32 	%f1119, 0fC3170000, 0fC2FE0000, %p133;
	mov.b32 	%r356, %f1118;
	and.b32  	%r357, %r356, 8388607;
	or.b32  	%r358, %r357, 1065353216;
	mov.b32 	%f1120, %r358;
	shr.u32 	%r359, %r356, 23;
	cvt.rn.f32.u32 	%f1121, %r359;
	add.f32 	%f1122, %f1119, %f1121;
	setp.gt.f32 	%p134, %f1120, 0f3FB504F3;
	mul.f32 	%f1123, %f1120, 0f3F000000;
	add.f32 	%f1124, %f1122, 0f3F800000;
	selp.f32 	%f1125, %f1124, %f1122, %p134;
	selp.f32 	%f1126, %f1123, %f1120, %p134;
	add.f32 	%f1127, %f1126, 0fBF800000;
	add.f32 	%f1128, %f1126, 0f3F800000;
	rcp.approx.ftz.f32 	%f1129, %f1128;
	add.f32 	%f1130, %f1127, %f1127;
	mul.f32 	%f1131, %f1130, %f1129;
	mul.f32 	%f1132, %f1131, %f1131;
	mov.f32 	%f1133, 0f3C4CAF63;
	mov.f32 	%f1134, 0f3B18F0FE;
	fma.rn.f32 	%f1135, %f1134, %f1132, %f1133;
	mov.f32 	%f1136, 0f3DAAAABD;
	fma.rn.f32 	%f1137, %f1135, %f1132, %f1136;
	mul.rn.f32 	%f1138, %f1137, %f1132;
	mul.rn.f32 	%f1139, %f1138, %f1131;
	sub.f32 	%f1140, %f1127, %f1131;
	add.f32 	%f1141, %f1140, %f1140;
	neg.f32 	%f1142, %f1131;
	fma.rn.f32 	%f1143, %f1142, %f1127, %f1141;
	mul.rn.f32 	%f1144, %f1129, %f1143;
	add.f32 	%f1145, %f1139, %f1131;
	sub.f32 	%f1146, %f1131, %f1145;
	add.f32 	%f1147, %f1139, %f1146;
	add.f32 	%f1148, %f1144, %f1147;
	add.f32 	%f1149, %f1145, %f1148;
	sub.f32 	%f1150, %f1145, %f1149;
	add.f32 	%f1151, %f1148, %f1150;
	mov.f32 	%f1152, 0f3F317200;
	mul.rn.f32 	%f1153, %f1125, %f1152;
	mov.f32 	%f1154, 0f35BFBE8E;
	mul.rn.f32 	%f1155, %f1125, %f1154;
	add.f32 	%f1156, %f1153, %f1149;
	sub.f32 	%f1157, %f1153, %f1156;
	add.f32 	%f1158, %f1149, %f1157;
	add.f32 	%f1159, %f1151, %f1158;
	add.f32 	%f1160, %f1155, %f1159;
	add.f32 	%f1161, %f1156, %f1160;
	sub.f32 	%f1162, %f1156, %f1161;
	add.f32 	%f1163, %f1160, %f1162;
	mov.f32 	%f1164, 0f3ED55555;
	mul.rn.f32 	%f1165, %f1164, %f1161;
	neg.f32 	%f1166, %f1165;
	fma.rn.f32 	%f1167, %f1164, %f1161, %f1166;
	fma.rn.f32 	%f1168, %f1164, %f1163, %f1167;
	mov.f32 	%f1169, 0f00000000;
	fma.rn.f32 	%f1170, %f1169, %f1161, %f1168;
	add.rn.f32 	%f1171, %f1165, %f1170;
	neg.f32 	%f1172, %f1171;
	add.rn.f32 	%f1173, %f1165, %f1172;
	add.rn.f32 	%f1174, %f1173, %f1170;
	mov.b32 	%r360, %f1171;
	setp.eq.s32 	%p135, %r360, 1118925336;
	add.s32 	%r361, %r360, -1;
	mov.b32 	%f1175, %r361;
	add.f32 	%f1176, %f1174, 0f37000000;
	selp.f32 	%f220, %f1176, %f1174, %p135;
	selp.f32 	%f1177, %f1175, %f1171, %p135;
	mov.f32 	%f1178, 0f3FB8AA3B;
	mul.rn.f32 	%f1179, %f1177, %f1178;
	cvt.rzi.f32.f32 	%f1180, %f1179;
	abs.f32 	%f1181, %f1180;
	setp.gt.f32 	%p136, %f1181, 0f42FC0000;
	mov.b32 	%r362, %f1180;
	and.b32  	%r363, %r362, -2147483648;
	or.b32  	%r364, %r363, 1123811328;
	mov.b32 	%f1182, %r364;
	selp.f32 	%f1183, %f1182, %f1180, %p136;
	mov.f32 	%f1184, 0fBF317218;
	fma.rn.f32 	%f1185, %f1183, %f1184, %f1177;
	mov.f32 	%f1186, 0f3102E308;
	fma.rn.f32 	%f1187, %f1183, %f1186, %f1185;
	mul.f32 	%f1188, %f1187, 0f3FB8AA3B;
	add.f32 	%f1189, %f1183, 0f4B40007F;
	mov.b32 	%r365, %f1189;
	shl.b32 	%r366, %r365, 23;
	mov.b32 	%f1190, %r366;
	ex2.approx.ftz.f32 	%f1191, %f1188;
	mul.f32 	%f221, %f1191, %f1190;
	setp.eq.f32 	%p137, %f221, 0f7F800000;
	mov.f32 	%f1416, 0f7F800000;
	@%p137 bra 	$L__BB0_112;

	fma.rn.f32 	%f1416, %f221, %f220, %f221;

$L__BB0_112:
	setp.lt.f32 	%p138, %f205, 0f00000000;
	and.pred  	%p8, %p138, %p125;
	setp.eq.f32 	%p140, %f205, 0f00000000;
	@%p140 bra 	$L__BB0_116;
	bra.uni 	$L__BB0_113;

$L__BB0_116:
	add.f32 	%f1196, %f205, %f205;
	selp.f32 	%f1418, %f1196, 0f00000000, %p125;
	bra.uni 	$L__BB0_117;

$L__BB0_113:
	mov.b32 	%r367, %f1416;
	xor.b32  	%r368, %r367, -2147483648;
	mov.b32 	%f1192, %r368;
	selp.f32 	%f1418, %f1192, %f1416, %p8;
	setp.geu.f32 	%p141, %f205, 0f00000000;
	@%p141 bra 	$L__BB0_117;

	mov.f32 	%f1193, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1194, %f1193;
	setp.eq.f32 	%p142, %f1194, 0f3ED55555;
	@%p142 bra 	$L__BB0_117;

	mov.f32 	%f1418, 0f7FFFFFFF;

$L__BB0_117:
	add.f32 	%f1197, %f219, 0f3ED55555;
	mov.b32 	%r369, %f1197;
	setp.lt.s32 	%p144, %r369, 2139095040;
	@%p144 bra 	$L__BB0_122;

	setp.gtu.f32 	%p145, %f219, 0f7F800000;
	@%p145 bra 	$L__BB0_121;
	bra.uni 	$L__BB0_119;

$L__BB0_121:
	add.f32 	%f1418, %f205, 0f3ED55555;
	bra.uni 	$L__BB0_122;

$L__BB0_119:
	setp.neu.f32 	%p146, %f219, 0f7F800000;
	@%p146 bra 	$L__BB0_122;

	selp.f32 	%f1418, 0fFF800000, 0f7F800000, %p8;

$L__BB0_122:
	abs.f32 	%f230, %f206;
	setp.lt.f32 	%p147, %f230, 0f00800000;
	mul.f32 	%f1199, %f230, 0f4B800000;
	selp.f32 	%f1200, %f1199, %f230, %p147;
	selp.f32 	%f1201, 0fC3170000, 0fC2FE0000, %p147;
	mov.b32 	%r370, %f1200;
	and.b32  	%r371, %r370, 8388607;
	or.b32  	%r372, %r371, 1065353216;
	mov.b32 	%f1202, %r372;
	shr.u32 	%r373, %r370, 23;
	cvt.rn.f32.u32 	%f1203, %r373;
	add.f32 	%f1204, %f1201, %f1203;
	setp.gt.f32 	%p148, %f1202, 0f3FB504F3;
	mul.f32 	%f1205, %f1202, 0f3F000000;
	add.f32 	%f1206, %f1204, 0f3F800000;
	selp.f32 	%f1207, %f1206, %f1204, %p148;
	selp.f32 	%f1208, %f1205, %f1202, %p148;
	add.f32 	%f1209, %f1208, 0fBF800000;
	add.f32 	%f1210, %f1208, 0f3F800000;
	rcp.approx.ftz.f32 	%f1211, %f1210;
	add.f32 	%f1212, %f1209, %f1209;
	mul.f32 	%f1213, %f1212, %f1211;
	mul.f32 	%f1214, %f1213, %f1213;
	mov.f32 	%f1215, 0f3C4CAF63;
	mov.f32 	%f1216, 0f3B18F0FE;
	fma.rn.f32 	%f1217, %f1216, %f1214, %f1215;
	mov.f32 	%f1218, 0f3DAAAABD;
	fma.rn.f32 	%f1219, %f1217, %f1214, %f1218;
	mul.rn.f32 	%f1220, %f1219, %f1214;
	mul.rn.f32 	%f1221, %f1220, %f1213;
	sub.f32 	%f1222, %f1209, %f1213;
	add.f32 	%f1223, %f1222, %f1222;
	neg.f32 	%f1224, %f1213;
	fma.rn.f32 	%f1225, %f1224, %f1209, %f1223;
	mul.rn.f32 	%f1226, %f1211, %f1225;
	add.f32 	%f1227, %f1221, %f1213;
	sub.f32 	%f1228, %f1213, %f1227;
	add.f32 	%f1229, %f1221, %f1228;
	add.f32 	%f1230, %f1226, %f1229;
	add.f32 	%f1231, %f1227, %f1230;
	sub.f32 	%f1232, %f1227, %f1231;
	add.f32 	%f1233, %f1230, %f1232;
	mov.f32 	%f1234, 0f3F317200;
	mul.rn.f32 	%f1235, %f1207, %f1234;
	mov.f32 	%f1236, 0f35BFBE8E;
	mul.rn.f32 	%f1237, %f1207, %f1236;
	add.f32 	%f1238, %f1235, %f1231;
	sub.f32 	%f1239, %f1235, %f1238;
	add.f32 	%f1240, %f1231, %f1239;
	add.f32 	%f1241, %f1233, %f1240;
	add.f32 	%f1242, %f1237, %f1241;
	add.f32 	%f1243, %f1238, %f1242;
	sub.f32 	%f1244, %f1238, %f1243;
	add.f32 	%f1245, %f1242, %f1244;
	mov.f32 	%f1246, 0f3ED55555;
	mul.rn.f32 	%f1247, %f1246, %f1243;
	neg.f32 	%f1248, %f1247;
	fma.rn.f32 	%f1249, %f1246, %f1243, %f1248;
	fma.rn.f32 	%f1250, %f1246, %f1245, %f1249;
	mov.f32 	%f1251, 0f00000000;
	fma.rn.f32 	%f1252, %f1251, %f1243, %f1250;
	add.rn.f32 	%f1253, %f1247, %f1252;
	neg.f32 	%f1254, %f1253;
	add.rn.f32 	%f1255, %f1247, %f1254;
	add.rn.f32 	%f1256, %f1255, %f1252;
	mov.b32 	%r374, %f1253;
	setp.eq.s32 	%p149, %r374, 1118925336;
	add.s32 	%r375, %r374, -1;
	mov.b32 	%f1257, %r375;
	add.f32 	%f1258, %f1256, 0f37000000;
	selp.f32 	%f231, %f1258, %f1256, %p149;
	selp.f32 	%f1259, %f1257, %f1253, %p149;
	mov.f32 	%f1260, 0f3FB8AA3B;
	mul.rn.f32 	%f1261, %f1259, %f1260;
	cvt.rzi.f32.f32 	%f1262, %f1261;
	abs.f32 	%f1263, %f1262;
	setp.gt.f32 	%p150, %f1263, 0f42FC0000;
	mov.b32 	%r376, %f1262;
	and.b32  	%r377, %r376, -2147483648;
	or.b32  	%r378, %r377, 1123811328;
	mov.b32 	%f1264, %r378;
	selp.f32 	%f1265, %f1264, %f1262, %p150;
	mov.f32 	%f1266, 0fBF317218;
	fma.rn.f32 	%f1267, %f1265, %f1266, %f1259;
	mov.f32 	%f1268, 0f3102E308;
	fma.rn.f32 	%f1269, %f1265, %f1268, %f1267;
	mul.f32 	%f1270, %f1269, 0f3FB8AA3B;
	add.f32 	%f1271, %f1265, 0f4B40007F;
	mov.b32 	%r379, %f1271;
	shl.b32 	%r380, %r379, 23;
	mov.b32 	%f1272, %r380;
	ex2.approx.ftz.f32 	%f1273, %f1270;
	mul.f32 	%f232, %f1273, %f1272;
	setp.eq.f32 	%p151, %f232, 0f7F800000;
	mov.f32 	%f1419, 0f7F800000;
	@%p151 bra 	$L__BB0_124;

	fma.rn.f32 	%f1419, %f232, %f231, %f232;

$L__BB0_124:
	setp.lt.f32 	%p152, %f206, 0f00000000;
	and.pred  	%p9, %p152, %p125;
	setp.eq.f32 	%p154, %f206, 0f00000000;
	@%p154 bra 	$L__BB0_128;
	bra.uni 	$L__BB0_125;

$L__BB0_128:
	add.f32 	%f1278, %f206, %f206;
	selp.f32 	%f1421, %f1278, 0f00000000, %p125;
	bra.uni 	$L__BB0_129;

$L__BB0_125:
	mov.b32 	%r381, %f1419;
	xor.b32  	%r382, %r381, -2147483648;
	mov.b32 	%f1274, %r382;
	selp.f32 	%f1421, %f1274, %f1419, %p9;
	setp.geu.f32 	%p155, %f206, 0f00000000;
	@%p155 bra 	$L__BB0_129;

	mov.f32 	%f1275, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1276, %f1275;
	setp.eq.f32 	%p156, %f1276, 0f3ED55555;
	@%p156 bra 	$L__BB0_129;

	mov.f32 	%f1421, 0f7FFFFFFF;

$L__BB0_129:
	add.f32 	%f1279, %f230, 0f3ED55555;
	mov.b32 	%r383, %f1279;
	setp.lt.s32 	%p158, %r383, 2139095040;
	@%p158 bra 	$L__BB0_134;

	setp.gtu.f32 	%p159, %f230, 0f7F800000;
	@%p159 bra 	$L__BB0_133;
	bra.uni 	$L__BB0_131;

$L__BB0_133:
	add.f32 	%f1421, %f206, 0f3ED55555;
	bra.uni 	$L__BB0_134;

$L__BB0_131:
	setp.neu.f32 	%p160, %f230, 0f7F800000;
	@%p160 bra 	$L__BB0_134;

	selp.f32 	%f1421, 0fFF800000, 0f7F800000, %p9;

$L__BB0_134:
	fma.rn.f32 	%f1280, %f1415, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p161, %f204, 0f3F800000;
	mov.f32 	%f1281, 0f3F800000;
	selp.f32 	%f1282, 0f3F7FFFFF, %f1280, %p161;
	mul.f32 	%f1283, %f204, 0f414EB852;
	setp.lt.f32 	%p162, %f204, 0f3B4D2E1C;
	selp.f32 	%f1284, %f1283, %f1282, %p162;
	fma.rn.f32 	%f1285, %f1418, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p163, %f205, 0f3F800000;
	selp.f32 	%f1286, 0f3F7FFFFF, %f1285, %p163;
	mul.f32 	%f1287, %f205, 0f414EB852;
	setp.lt.f32 	%p164, %f205, 0f3B4D2E1C;
	selp.f32 	%f1288, %f1287, %f1286, %p164;
	fma.rn.f32 	%f1289, %f1421, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p165, %f206, 0f3F800000;
	selp.f32 	%f1290, 0f3F7FFFFF, %f1289, %p165;
	mul.f32 	%f1291, %f206, 0f414EB852;
	setp.lt.f32 	%p166, %f206, 0f3B4D2E1C;
	selp.f32 	%f1292, %f1291, %f1290, %p166;
	min.f32 	%f1293, %f1284, %f1281;
	mov.f32 	%f1294, 0f00000000;
	max.f32 	%f1295, %f1294, %f1293;
	mul.f32 	%f1296, %f1295, 0f43800000;
	cvt.rzi.u32.f32 	%r384, %f1296;
	min.u32 	%r385, %r384, 255;
	min.f32 	%f1297, %f1288, %f1281;
	max.f32 	%f1298, %f1294, %f1297;
	mul.f32 	%f1299, %f1298, 0f43800000;
	cvt.rzi.u32.f32 	%r386, %f1299;
	min.u32 	%r387, %r386, 255;
	min.f32 	%f1300, %f1292, %f1281;
	max.f32 	%f1301, %f1294, %f1300;
	mul.f32 	%f1302, %f1301, 0f43800000;
	cvt.rzi.u32.f32 	%r388, %f1302;
	min.u32 	%r389, %r388, 255;
	shl.b64 	%rd29, %rd10, 2;
	add.s64 	%rd30, %rd9, %rd29;
	cvt.u16.u32 	%rs20, %r389;
	cvt.u16.u32 	%rs21, %r387;
	cvt.u16.u32 	%rs22, %r385;
	mov.u16 	%rs23, 255;
	st.global.v4.u8 	[%rd30], {%rs22, %rs21, %rs20, %rs23};

$L__BB0_135:
	and.b32  	%r390, %r418, 4;
	setp.eq.s32 	%p167, %r390, 0;
	@%p167 bra 	$L__BB0_139;

	ld.const.u32 	%r391, [params+108];
	setp.eq.s32 	%p168, %r391, 0;
	ld.const.u64 	%rd31, [params+224];
	cvta.to.global.u64 	%rd32, %rd31;
	ld.const.u32 	%r392, [params+216];
	mad.lo.s32 	%r393, %r392, %r4, %r3;
	mul.wide.u32 	%rd33, %r393, 8;
	add.s64 	%rd11, %rd32, %rd33;
	@%p168 bra 	$L__BB0_138;

	ld.global.v4.u16 	{%rs31, %rs32, %rs33, %rs34}, [%rd11];
	// begin inline asm
	{  cvt.f32.f16 %f1303, %rs31;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1304, %rs32;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1305, %rs33;}

	// end inline asm
	add.f32 	%f1306, %f1387, %f1303;
	add.f32 	%f1307, %f1388, %f1304;
	add.f32 	%f1308, %f1389, %f1305;
	mov.f32 	%f1309, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f1308;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f1307;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f1306;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f1309;}

	// end inline asm
	st.global.v4.u16 	[%rd11], {%rs27, %rs28, %rs29, %rs30};
	bra.uni 	$L__BB0_139;

$L__BB0_138:
	mov.f32 	%f1313, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs38, %f1313;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs37, %f1389;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs36, %f1388;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs35, %f1387;}

	// end inline asm
	st.global.v4.u16 	[%rd11], {%rs35, %rs36, %rs37, %rs38};

$L__BB0_139:
	and.b32  	%r394, %r418, 64;
	setp.eq.s32 	%p169, %r394, 0;
	@%p169 bra 	$L__BB0_151;

	mul.f32 	%f1314, %f1391, %f1391;
	fma.rn.f32 	%f1315, %f1390, %f1390, %f1314;
	fma.rn.f32 	%f1316, %f1392, %f1392, %f1315;
	sqrt.rn.f32 	%f1317, %f1316;
	rcp.rn.f32 	%f1318, %f1317;
	mul.f32 	%f1319, %f1390, %f1318;
	mul.f32 	%f1320, %f1391, %f1318;
	mul.f32 	%f1321, %f1392, %f1318;
	ld.const.u64 	%rd34, [params+208];
	cvta.to.global.u64 	%rd35, %rd34;
	ld.const.u32 	%r395, [params+200];
	mad.lo.s32 	%r396, %r395, %r4, %r3;
	fma.rn.f32 	%f1322, %f1319, 0f3F000000, 0f3F000000;
	mul.f32 	%f1323, %f1322, 0f437F0000;
	cvt.rzi.u32.f32 	%r397, %f1323;
	fma.rn.f32 	%f1324, %f1320, 0f3F000000, 0f3F000000;
	mul.f32 	%f1325, %f1324, 0f437F0000;
	cvt.rzi.u32.f32 	%r398, %f1325;
	fma.rn.f32 	%f1326, %f1321, 0f3F000000, 0f3F000000;
	mul.f32 	%f1327, %f1326, 0f437F0000;
	cvt.rzi.u32.f32 	%r399, %f1327;
	mul.wide.u32 	%rd36, %r396, 4;
	add.s64 	%rd37, %rd35, %rd36;
	cvt.u16.u32 	%rs39, %r399;
	cvt.u16.u32 	%rs40, %r398;
	cvt.u16.u32 	%rs41, %r397;
	mov.u16 	%rs42, 255;
	st.global.v4.u8 	[%rd37], {%rs41, %rs40, %rs39, %rs42};

$L__BB0_151:
	ret;

}