//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<178>;
	.reg .b16 	%rs<84>;
	.reg .f32 	%f<1134>;
	.reg .b32 	%r<375>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<114>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r52), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r53), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u64 	%rd24, [params+400];
	cvta.to.global.u64 	%rd25, %rd24;
	ld.const.u32 	%r58, [params+392];
	mad.lo.s32 	%r59, %r58, %r53, %r52;
	mul.wide.u32 	%rd26, %r59, 4;
	add.s64 	%rd2, %rd25, %rd26;
	ld.global.v2.u8 	{%rs7, %rs83}, [%rd2];
	or.b16  	%rs9, %rs7, %rs83;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p8, %rs10, 0;
	@%p8 bra 	$L__BB0_2;

	ld.global.u8 	%rs82, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs82, [%rd2+2];
	setp.eq.s16 	%p9, %rs82, 0;
	mov.f32 	%f1092, 0f00000000;
	mov.u16 	%rs83, 0;
	mov.f32 	%f1093, %f1092;
	mov.f32 	%f1094, %f1092;
	@%p9 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f170, %rs7;
	div.rn.f32 	%f171, %f170, 0f437F0000;
	fma.rn.f32 	%f172, %f171, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs83, 255;
	cvt.rn.f32.u16 	%f173, %rs13;
	div.rn.f32 	%f174, %f173, 0f437F0000;
	fma.rn.f32 	%f175, %f174, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f176, %rs82;
	div.rn.f32 	%f177, %f176, 0f437F0000;
	fma.rn.f32 	%f178, %f177, 0f40000000, 0fBF800000;
	mul.f32 	%f179, %f175, %f175;
	fma.rn.f32 	%f180, %f172, %f172, %f179;
	fma.rn.f32 	%f181, %f178, %f178, %f180;
	sqrt.rn.f32 	%f182, %f181;
	rcp.rn.f32 	%f183, %f182;
	mul.f32 	%f1094, %f183, %f178;
	mul.f32 	%f1093, %f183, %f175;
	mul.f32 	%f1092, %f172, %f183;

$L__BB0_4:
	ld.const.v2.u32 	{%r60, %r61}, [params];
	add.s32 	%r3, %r60, %r52;
	add.s32 	%r4, %r61, %r53;
	setp.eq.f32 	%p10, %f1092, 0f00000000;
	setp.eq.f32 	%p11, %f1093, 0f00000000;
	and.pred  	%p12, %p10, %p11;
	setp.eq.f32 	%p13, %f1094, 0f00000000;
	and.pred  	%p14, %p13, %p12;
	@%p14 bra 	$L__BB0_142;
	bra.uni 	$L__BB0_5;

$L__BB0_142:
	ld.const.u32 	%r51, [params+104];
	and.b32  	%r342, %r51, 1;
	setp.eq.b32 	%p170, %r342, 1;
	mov.pred 	%p171, 0;
	xor.pred  	%p172, %p170, %p171;
	not.pred 	%p173, %p172;
	@%p173 bra 	$L__BB0_144;

	ld.const.u64 	%rd88, [params+144];
	cvta.to.global.u64 	%rd89, %rd88;
	ld.const.u32 	%r343, [params+136];
	mad.lo.s32 	%r344, %r343, %r4, %r3;
	mul.wide.u32 	%rd90, %r344, 4;
	add.s64 	%rd91, %rd89, %rd90;
	mov.u16 	%rs63, 0;
	st.global.v4.u8 	[%rd91], {%rs63, %rs63, %rs63, %rs63};

$L__BB0_144:
	and.b32  	%r345, %r51, 8;
	setp.eq.s32 	%p174, %r345, 0;
	@%p174 bra 	$L__BB0_146;

	ld.const.u64 	%rd92, [params+192];
	cvta.to.global.u64 	%rd93, %rd92;
	ld.const.u32 	%r346, [params+184];
	mad.lo.s32 	%r347, %r346, %r4, %r3;
	mov.f32 	%f1014, 0f00000000;
	cvt.rzi.u32.f32 	%r348, %f1014;
	mul.wide.u32 	%rd94, %r347, 2;
	add.s64 	%rd95, %rd93, %rd94;
	mov.u16 	%rs64, 0;
	cvt.u16.u32 	%rs65, %r348;
	st.global.v2.u8 	[%rd95], {%rs65, %rs64};

$L__BB0_146:
	and.b32  	%r349, %r51, 4;
	setp.eq.s32 	%p175, %r349, 0;
	@%p175 bra 	$L__BB0_150;

	ld.const.u32 	%r350, [params+108];
	setp.eq.s32 	%p176, %r350, 0;
	ld.const.u64 	%rd96, [params+224];
	cvta.to.global.u64 	%rd97, %rd96;
	ld.const.u32 	%r351, [params+216];
	mad.lo.s32 	%r352, %r351, %r4, %r3;
	mul.wide.u32 	%rd98, %r352, 8;
	add.s64 	%rd22, %rd97, %rd98;
	@%p176 bra 	$L__BB0_149;

	ld.global.v4.u16 	{%rs72, %rs73, %rs74, %rs75}, [%rd22];
	// begin inline asm
	{  cvt.f32.f16 %f1015, %rs72;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1016, %rs73;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1017, %rs74;}

	// end inline asm
	add.f32 	%f1018, %f1015, 0f00000000;
	add.f32 	%f1019, %f1016, 0f00000000;
	add.f32 	%f1020, %f1017, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs71, %f1020;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs70, %f1019;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs69, %f1018;}

	// end inline asm
	mov.u16 	%rs76, 0;
	st.global.v4.u16 	[%rd22], {%rs69, %rs70, %rs71, %rs76};
	bra.uni 	$L__BB0_150;

$L__BB0_5:
	ld.const.v4.f32 	{%f184, %f185, %f186, %f187}, [params+512];
	neg.f32 	%f13, %f185;
	neg.f32 	%f14, %f186;
	mul.f32 	%f188, %f1092, %f184;
	mul.f32 	%f189, %f1093, %f13;
	sub.f32 	%f190, %f189, %f188;
	mul.f32 	%f191, %f1094, %f186;
	sub.f32 	%f15, %f190, %f191;
	setp.gtu.f32 	%p15, %f15, 0f00000000;
	ld.const.u32 	%r5, [params+544];
	setp.ne.s32 	%p16, %r5, 0;
	or.pred  	%p17, %p16, %p15;
	@%p17 bra 	$L__BB0_7;

	ld.const.u32 	%r6, [params+104];
	and.b32  	%r64, %r6, 32;
	setp.eq.s32 	%p18, %r64, 0;
	@%p18 bra 	$L__BB0_132;
	bra.uni 	$L__BB0_7;

$L__BB0_132:
	and.b32  	%r328, %r6, 1;
	setp.eq.b32 	%p162, %r328, 1;
	mov.pred 	%p163, 0;
	xor.pred  	%p164, %p162, %p163;
	not.pred 	%p165, %p164;
	@%p165 bra 	$L__BB0_134;

	ld.const.u64 	%rd73, [params+144];
	cvta.to.global.u64 	%rd74, %rd73;
	ld.const.u32 	%r329, [params+136];
	mad.lo.s32 	%r330, %r329, %r4, %r3;
	mul.wide.u32 	%rd75, %r330, 4;
	add.s64 	%rd76, %rd74, %rd75;
	mov.u16 	%rs42, 0;
	mov.u16 	%rs43, 255;
	st.global.v4.u8 	[%rd76], {%rs42, %rs42, %rs42, %rs43};

$L__BB0_134:
	and.b32  	%r331, %r6, 8;
	setp.eq.s32 	%p166, %r331, 0;
	@%p166 bra 	$L__BB0_136;

	ld.const.u64 	%rd77, [params+192];
	cvta.to.global.u64 	%rd78, %rd77;
	ld.const.u32 	%r332, [params+184];
	mad.lo.s32 	%r333, %r332, %r4, %r3;
	mov.f32 	%f1002, 0f00000000;
	cvt.rzi.u32.f32 	%r334, %f1002;
	mul.wide.u32 	%rd79, %r333, 2;
	add.s64 	%rd80, %rd78, %rd79;
	cvt.u16.u32 	%rs44, %r334;
	mov.u16 	%rs45, 255;
	st.global.v2.u8 	[%rd80], {%rs44, %rs45};

$L__BB0_136:
	and.b32  	%r335, %r6, 4;
	setp.eq.s32 	%p167, %r335, 0;
	@%p167 bra 	$L__BB0_140;

	ld.const.u32 	%r336, [params+108];
	setp.eq.s32 	%p168, %r336, 0;
	ld.const.u64 	%rd81, [params+224];
	cvta.to.global.u64 	%rd82, %rd81;
	ld.const.u32 	%r337, [params+216];
	mad.lo.s32 	%r338, %r337, %r4, %r3;
	mul.wide.u32 	%rd83, %r338, 8;
	add.s64 	%rd21, %rd82, %rd83;
	@%p168 bra 	$L__BB0_139;

	ld.global.v4.u16 	{%rs53, %rs54, %rs55, %rs56}, [%rd21];
	// begin inline asm
	{  cvt.f32.f16 %f1003, %rs53;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1004, %rs54;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1005, %rs55;}

	// end inline asm
	add.f32 	%f1006, %f1003, 0f00000000;
	add.f32 	%f1007, %f1004, 0f00000000;
	add.f32 	%f1008, %f1005, 0f00000000;
	mov.f32 	%f1009, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs52, %f1009;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs51, %f1008;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f1007;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs49, %f1006;}

	// end inline asm
	st.global.v4.u16 	[%rd21], {%rs49, %rs50, %rs51, %rs52};
	bra.uni 	$L__BB0_140;

$L__BB0_7:
	ld.const.u64 	%rd27, [params+432];
	cvta.to.global.u64 	%rd28, %rd27;
	ld.const.u32 	%r65, [params+424];
	mad.lo.s32 	%r66, %r65, %r53, %r52;
	mul.wide.u32 	%rd29, %r66, 12;
	add.s64 	%rd30, %rd28, %rd29;
	ld.global.f32 	%f16, [%rd30];
	mul.f32 	%f195, %f16, 0f3456BF95;
	ld.global.f32 	%f17, [%rd30+4];
	mul.f32 	%f196, %f17, 0f3456BF95;
	ld.global.f32 	%f18, [%rd30+8];
	mul.f32 	%f197, %f18, 0f3456BF95;
	abs.f32 	%f198, %f1092;
	div.rn.f32 	%f199, %f195, %f198;
	abs.f32 	%f200, %f1093;
	div.rn.f32 	%f201, %f196, %f200;
	abs.f32 	%f202, %f1094;
	div.rn.f32 	%f203, %f197, %f202;
	abs.f32 	%f204, %f199;
	abs.f32 	%f205, %f201;
	abs.f32 	%f206, %f203;
	mov.f32 	%f207, 0f38D1B717;
	max.f32 	%f208, %f204, %f207;
	max.f32 	%f209, %f205, %f207;
	max.f32 	%f210, %f206, %f207;
	fma.rn.f32 	%f19, %f1092, %f208, %f16;
	fma.rn.f32 	%f20, %f1093, %f209, %f17;
	fma.rn.f32 	%f21, %f1094, %f210, %f18;
	abs.f32 	%f211, %f186;
	abs.f32 	%f212, %f184;
	setp.gt.f32 	%p19, %f212, %f211;
	selp.f32 	%f213, %f13, 0f00000000, %p19;
	mov.f32 	%f1100, 0f00000000;
	selp.f32 	%f214, %f184, %f14, %p19;
	selp.f32 	%f215, 0f00000000, %f185, %p19;
	mul.f32 	%f216, %f214, %f214;
	fma.rn.f32 	%f217, %f213, %f213, %f216;
	fma.rn.f32 	%f218, %f215, %f215, %f217;
	sqrt.rn.f32 	%f219, %f218;
	rcp.rn.f32 	%f220, %f219;
	mul.f32 	%f22, %f213, %f220;
	mul.f32 	%f23, %f214, %f220;
	mul.f32 	%f24, %f215, %f220;
	mul.f32 	%f221, %f186, %f23;
	mul.f32 	%f222, %f185, %f24;
	sub.f32 	%f25, %f221, %f222;
	mul.f32 	%f223, %f184, %f24;
	mul.f32 	%f224, %f186, %f22;
	sub.f32 	%f26, %f223, %f224;
	mul.f32 	%f225, %f185, %f22;
	mul.f32 	%f226, %f184, %f23;
	sub.f32 	%f27, %f225, %f226;
	ld.const.u64 	%rd31, [params+128];
	cvta.to.global.u64 	%rd32, %rd31;
	ld.const.u32 	%r67, [params+120];
	mad.lo.s32 	%r68, %r67, %r53, %r52;
	mul.wide.u32 	%rd33, %r68, 4;
	add.s64 	%rd3, %rd32, %rd33;
	ld.const.u32 	%r7, [params+540];
	setp.lt.s32 	%p20, %r7, 1;
	mov.f32 	%f1099, %f1100;
	mov.f32 	%f1098, %f1100;
	@%p20 bra 	$L__BB0_36;

	cvt.rn.f32.s32 	%f230, %r7;
	rcp.rn.f32 	%f28, %f230;
	ld.global.u32 	%r367, [%rd3];
	ld.const.f32 	%f29, [params+536];
	ld.const.u8 	%rs15, [params+104];
	and.b16  	%rs16, %rs15, 32;
	setp.eq.s16 	%p21, %rs16, 0;
	mov.u32 	%r69, 0;
	selp.f32 	%f30, 0f3F800000, 0f41200000, %p21;
	mul.f32 	%f31, %f19, 0f3456BF95;
	mul.f32 	%f32, %f20, 0f3456BF95;
	mul.f32 	%f33, %f21, 0f3456BF95;
	ld.const.u64 	%rd4, [params+96];
	add.s64 	%rd5, %rd1, 24;
	mov.u64 	%rd34, __cudart_i2opi_f;
	abs.f32 	%f313, %f32;
	abs.f32 	%f314, %f31;
	max.f32 	%f315, %f314, %f313;
	abs.f32 	%f316, %f33;
	max.f32 	%f317, %f315, %f316;
	mov.u32 	%r364, %r69;

$L__BB0_9:
	mov.u32 	%r366, %r69;

$L__BB0_10:
	cvt.rn.f32.s32 	%f1030, %r364;
	mad.lo.s32 	%r71, %r367, 1664525, 1013904223;
	and.b32  	%r72, %r71, 16777215;
	cvt.rn.f32.u32 	%f231, %r72;
	fma.rn.f32 	%f232, %f231, 0f33800000, %f1030;
	mul.f32 	%f233, %f28, %f232;
	mad.lo.s32 	%r367, %r71, 1664525, 1013904223;
	and.b32  	%r73, %r367, 16777215;
	cvt.rn.f32.u32 	%f234, %r73;
	cvt.rn.f32.s32 	%f235, %r366;
	fma.rn.f32 	%f236, %f234, 0f33800000, %f235;
	mul.f32 	%f237, %f28, %f236;
	sqrt.rn.f32 	%f41, %f233;
	mul.f32 	%f42, %f237, 0f40C90FDB;
	mul.f32 	%f238, %f42, 0f3F22F983;
	cvt.rni.s32.f32 	%r374, %f238;
	cvt.rn.f32.s32 	%f239, %r374;
	mov.f32 	%f240, 0fBFC90FDA;
	fma.rn.f32 	%f241, %f239, %f240, %f42;
	mov.f32 	%f242, 0fB3A22168;
	fma.rn.f32 	%f243, %f239, %f242, %f241;
	mov.f32 	%f244, 0fA7C234C5;
	fma.rn.f32 	%f1104, %f239, %f244, %f243;
	abs.f32 	%f44, %f42;
	setp.ltu.f32 	%p22, %f44, 0f47CE4780;
	mov.u32 	%r371, %r374;
	mov.f32 	%f1101, %f1104;
	@%p22 bra 	$L__BB0_18;

	setp.eq.f32 	%p23, %f44, 0f7F800000;
	@%p23 bra 	$L__BB0_17;
	bra.uni 	$L__BB0_12;

$L__BB0_17:
	mov.f32 	%f247, 0f00000000;
	mul.rn.f32 	%f1101, %f42, %f247;
	mov.u32 	%r371, 0;
	bra.uni 	$L__BB0_18;

$L__BB0_12:
	mov.b32 	%r15, %f42;
	bfe.u32 	%r75, %r15, 23, 8;
	add.s32 	%r16, %r75, -128;
	shl.b32 	%r76, %r15, 8;
	or.b32  	%r17, %r76, -2147483648;
	shr.u32 	%r18, %r16, 5;
	mov.u64 	%rd111, 0;
	mov.u32 	%r368, 0;
	mov.u64 	%rd109, %rd1;
	mov.u64 	%rd110, %rd34;

$L__BB0_13:
	.pragma "nounroll";
	ld.global.nc.u32 	%r77, [%rd110];
	mad.wide.u32 	%rd36, %r77, %r17, %rd111;
	shr.u64 	%rd111, %rd36, 32;
	st.local.u32 	[%rd109], %rd36;
	add.s64 	%rd110, %rd110, 4;
	add.s64 	%rd109, %rd109, 4;
	add.s32 	%r368, %r368, 1;
	setp.ne.s32 	%p24, %r368, 6;
	@%p24 bra 	$L__BB0_13;

	st.local.u32 	[%rd5], %rd111;
	mov.u32 	%r78, 4;
	sub.s32 	%r21, %r78, %r18;
	mov.u32 	%r79, 6;
	sub.s32 	%r80, %r79, %r18;
	mul.wide.s32 	%rd37, %r80, 4;
	add.s64 	%rd38, %rd1, %rd37;
	ld.local.u32 	%r369, [%rd38];
	ld.local.u32 	%r370, [%rd38+-4];
	and.b32  	%r24, %r16, 31;
	setp.eq.s32 	%p25, %r24, 0;
	@%p25 bra 	$L__BB0_16;

	mov.u32 	%r81, 32;
	sub.s32 	%r82, %r81, %r24;
	shr.u32 	%r83, %r370, %r82;
	shl.b32 	%r84, %r369, %r24;
	add.s32 	%r369, %r83, %r84;
	mul.wide.s32 	%rd39, %r21, 4;
	add.s64 	%rd40, %rd1, %rd39;
	ld.local.u32 	%r85, [%rd40];
	shr.u32 	%r86, %r85, %r82;
	shl.b32 	%r87, %r370, %r24;
	add.s32 	%r370, %r86, %r87;

$L__BB0_16:
	and.b32  	%r88, %r15, -2147483648;
	shr.u32 	%r89, %r370, 30;
	shl.b32 	%r90, %r369, 2;
	or.b32  	%r91, %r89, %r90;
	shr.u32 	%r92, %r91, 31;
	shr.u32 	%r93, %r369, 30;
	add.s32 	%r94, %r92, %r93;
	neg.s32 	%r95, %r94;
	setp.eq.s32 	%p26, %r88, 0;
	selp.b32 	%r371, %r94, %r95, %p26;
	setp.ne.s32 	%p27, %r92, 0;
	xor.b32  	%r96, %r88, -2147483648;
	selp.b32 	%r97, %r96, %r88, %p27;
	selp.b32 	%r98, -1, 0, %p27;
	xor.b32  	%r99, %r91, %r98;
	shl.b32 	%r100, %r370, 2;
	xor.b32  	%r101, %r100, %r98;
	cvt.u64.u32 	%rd41, %r99;
	cvt.u64.u32 	%rd42, %r101;
	bfi.b64 	%rd43, %rd41, %rd42, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd43;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f245, %fd2;
	setp.eq.s32 	%p28, %r97, 0;
	neg.f32 	%f246, %f245;
	selp.f32 	%f1101, %f245, %f246, %p28;

$L__BB0_18:
	add.s32 	%r31, %r371, 1;
	and.b32  	%r32, %r31, 1;
	setp.eq.s32 	%p29, %r32, 0;
	selp.f32 	%f48, %f1101, 0f3F800000, %p29;
	mul.rn.f32 	%f49, %f1101, %f1101;
	mov.f32 	%f1102, 0fB94D4153;
	@%p29 bra 	$L__BB0_20;

	mov.f32 	%f249, 0fBAB607ED;
	mov.f32 	%f250, 0f37CBAC00;
	fma.rn.f32 	%f1102, %f250, %f49, %f249;

$L__BB0_20:
	selp.f32 	%f251, 0f3C0885E4, 0f3D2AAABB, %p29;
	fma.rn.f32 	%f252, %f1102, %f49, %f251;
	selp.f32 	%f253, 0fBE2AAAA8, 0fBEFFFFFF, %p29;
	fma.rn.f32 	%f254, %f252, %f49, %f253;
	mov.f32 	%f255, 0f00000000;
	fma.rn.f32 	%f256, %f49, %f48, %f255;
	fma.rn.f32 	%f1103, %f254, %f256, %f48;
	and.b32  	%r103, %r31, 2;
	setp.eq.s32 	%p31, %r103, 0;
	@%p31 bra 	$L__BB0_22;

	mov.f32 	%f258, 0fBF800000;
	fma.rn.f32 	%f1103, %f1103, %f258, %f255;

$L__BB0_22:
	@%p22 bra 	$L__BB0_30;

	setp.eq.f32 	%p33, %f44, 0f7F800000;
	@%p33 bra 	$L__BB0_29;
	bra.uni 	$L__BB0_24;

$L__BB0_29:
	mov.f32 	%f261, 0f00000000;
	mul.rn.f32 	%f1104, %f42, %f261;
	mov.u32 	%r374, 0;
	bra.uni 	$L__BB0_30;

$L__BB0_24:
	mov.b32 	%r33, %f42;
	bfe.u32 	%r104, %r33, 23, 8;
	add.s32 	%r34, %r104, -128;
	shl.b32 	%r105, %r33, 8;
	or.b32  	%r35, %r105, -2147483648;
	shr.u32 	%r36, %r34, 5;
	mov.u64 	%rd112, 0;
	mov.u64 	%rd113, %rd112;

$L__BB0_25:
	.pragma "nounroll";
	shl.b64 	%rd46, %rd112, 2;
	mov.u64 	%rd47, __cudart_i2opi_f;
	add.s64 	%rd48, %rd47, %rd46;
	ld.global.nc.u32 	%r106, [%rd48];
	mad.wide.u32 	%rd49, %r106, %r35, %rd113;
	shr.u64 	%rd113, %rd49, 32;
	add.s64 	%rd50, %rd1, %rd46;
	st.local.u32 	[%rd50], %rd49;
	cvt.u32.u64 	%r107, %rd112;
	add.s32 	%r108, %r107, 1;
	cvt.s64.s32 	%rd112, %r108;
	setp.ne.s32 	%p34, %r108, 6;
	@%p34 bra 	$L__BB0_25;

	st.local.u32 	[%rd5], %rd113;
	mov.u32 	%r109, 4;
	sub.s32 	%r37, %r109, %r36;
	mov.u32 	%r110, 6;
	sub.s32 	%r111, %r110, %r36;
	mul.wide.s32 	%rd51, %r111, 4;
	add.s64 	%rd52, %rd1, %rd51;
	ld.local.u32 	%r372, [%rd52];
	ld.local.u32 	%r373, [%rd52+-4];
	and.b32  	%r40, %r34, 31;
	setp.eq.s32 	%p35, %r40, 0;
	@%p35 bra 	$L__BB0_28;

	mov.u32 	%r112, 32;
	sub.s32 	%r113, %r112, %r40;
	shr.u32 	%r114, %r373, %r113;
	shl.b32 	%r115, %r372, %r40;
	add.s32 	%r372, %r114, %r115;
	mul.wide.s32 	%rd53, %r37, 4;
	add.s64 	%rd54, %rd1, %rd53;
	ld.local.u32 	%r116, [%rd54];
	shr.u32 	%r117, %r116, %r113;
	shl.b32 	%r118, %r373, %r40;
	add.s32 	%r373, %r117, %r118;

$L__BB0_28:
	and.b32  	%r119, %r33, -2147483648;
	shr.u32 	%r120, %r373, 30;
	shl.b32 	%r121, %r372, 2;
	or.b32  	%r122, %r120, %r121;
	shr.u32 	%r123, %r122, 31;
	shr.u32 	%r124, %r372, 30;
	add.s32 	%r125, %r123, %r124;
	neg.s32 	%r126, %r125;
	setp.eq.s32 	%p36, %r119, 0;
	selp.b32 	%r374, %r125, %r126, %p36;
	setp.ne.s32 	%p37, %r123, 0;
	xor.b32  	%r127, %r119, -2147483648;
	selp.b32 	%r128, %r127, %r119, %p37;
	selp.b32 	%r129, -1, 0, %p37;
	xor.b32  	%r130, %r122, %r129;
	shl.b32 	%r131, %r373, 2;
	xor.b32  	%r132, %r131, %r129;
	cvt.u64.u32 	%rd55, %r130;
	cvt.u64.u32 	%rd56, %r132;
	bfi.b64 	%rd57, %rd55, %rd56, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd57;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f259, %fd4;
	setp.eq.s32 	%p38, %r128, 0;
	neg.f32 	%f260, %f259;
	selp.f32 	%f1104, %f259, %f260, %p38;

$L__BB0_30:
	mul.f32 	%f58, %f41, %f1103;
	and.b32  	%r47, %r374, 1;
	setp.eq.s32 	%p39, %r47, 0;
	selp.f32 	%f59, %f1104, 0f3F800000, %p39;
	mul.rn.f32 	%f60, %f1104, %f1104;
	mov.f32 	%f1105, 0fB94D4153;
	@%p39 bra 	$L__BB0_32;

	mov.f32 	%f263, 0fBAB607ED;
	mov.f32 	%f264, 0f37CBAC00;
	fma.rn.f32 	%f1105, %f264, %f60, %f263;

$L__BB0_32:
	selp.f32 	%f265, 0f3C0885E4, 0f3D2AAABB, %p39;
	fma.rn.f32 	%f266, %f1105, %f60, %f265;
	selp.f32 	%f267, 0fBE2AAAA8, 0fBEFFFFFF, %p39;
	fma.rn.f32 	%f268, %f266, %f60, %f267;
	mov.f32 	%f269, 0f00000000;
	fma.rn.f32 	%f270, %f60, %f59, %f269;
	fma.rn.f32 	%f1106, %f268, %f270, %f59;
	and.b32  	%r134, %r374, 2;
	setp.eq.s32 	%p41, %r134, 0;
	@%p41 bra 	$L__BB0_34;

	mov.f32 	%f272, 0fBF800000;
	fma.rn.f32 	%f1106, %f1106, %f272, %f269;

$L__BB0_34:
	mul.f32 	%f282, %f58, %f58;
	mov.f32 	%f283, 0f3F800000;
	sub.f32 	%f284, %f283, %f282;
	mul.f32 	%f285, %f41, %f1106;
	mul.f32 	%f286, %f285, %f285;
	sub.f32 	%f287, %f284, %f286;
	max.f32 	%f288, %f269, %f287;
	sqrt.rn.f32 	%f289, %f288;
	mul.f32 	%f290, %f22, %f285;
	mul.f32 	%f291, %f23, %f285;
	mul.f32 	%f292, %f24, %f285;
	fma.rn.f32 	%f293, %f25, %f58, %f290;
	fma.rn.f32 	%f294, %f26, %f58, %f291;
	fma.rn.f32 	%f295, %f27, %f58, %f292;
	fma.rn.f32 	%f296, %f184, %f289, %f293;
	fma.rn.f32 	%f297, %f185, %f289, %f294;
	fma.rn.f32 	%f298, %f186, %f289, %f295;
	add.f32 	%f299, %f184, %f296;
	add.f32 	%f300, %f185, %f297;
	add.f32 	%f301, %f186, %f298;
	mul.f32 	%f302, %f29, %f299;
	mul.f32 	%f303, %f29, %f300;
	mul.f32 	%f304, %f29, %f301;
	sub.f32 	%f305, %f302, %f184;
	sub.f32 	%f306, %f303, %f185;
	sub.f32 	%f307, %f304, %f186;
	mul.f32 	%f308, %f306, %f306;
	fma.rn.f32 	%f309, %f305, %f305, %f308;
	fma.rn.f32 	%f310, %f307, %f307, %f309;
	sqrt.rn.f32 	%f311, %f310;
	rcp.rn.f32 	%f312, %f311;
	mul.f32 	%f276, %f312, %f305;
	mul.f32 	%f277, %f312, %f306;
	mul.f32 	%f278, %f312, %f307;
	mov.f32 	%f318, 0f38D1B717;
	max.f32 	%f319, %f317, %f318;
	mul.f32 	%f279, %f30, %f319;
	mov.f32 	%f280, 0f6C4ECB8F;
	mov.u32 	%r171, 2;
	mov.u32 	%r172, 1;
	mov.u32 	%r173, 3;
	mov.u32 	%r176, 1065353216;
	mov.u32 	%r205, 0;
	// begin inline asm
	call(%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166),_optix_trace_typed_32,(%r205,%rd4,%f19,%f20,%f21,%f276,%f277,%f278,%f279,%f280,%f269,%r172,%r205,%r172,%r171,%r172,%r173,%r176,%r176,%r176,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205);
	// end inline asm
	mov.b32 	%f320, %r135;
	mov.b32 	%f321, %r136;
	mov.b32 	%f322, %r137;
	add.f32 	%f1100, %f1100, %f320;
	add.f32 	%f1099, %f1099, %f321;
	add.f32 	%f1098, %f1098, %f322;
	add.s32 	%r366, %r366, 1;
	setp.lt.s32 	%p42, %r366, %r7;
	@%p42 bra 	$L__BB0_10;

	add.s32 	%r364, %r364, 1;
	setp.lt.s32 	%p43, %r364, %r7;
	@%p43 bra 	$L__BB0_9;

$L__BB0_36:
	setp.eq.s32 	%p44, %r7, 0;
	mov.f32 	%f1110, 0f3F800000;
	mov.f32 	%f1111, %f1110;
	mov.f32 	%f1112, %f1110;
	@%p44 bra 	$L__BB0_38;

	mul.lo.s32 	%r206, %r7, %r7;
	cvt.rn.f32.s32 	%f326, %r206;
	rcp.rn.f32 	%f327, %f326;
	mul.f32 	%f1110, %f1100, %f327;
	mul.f32 	%f1111, %f1099, %f327;
	mul.f32 	%f1112, %f1098, %f327;

$L__BB0_38:
	ld.const.u32 	%r360, [params+544];
	mul.f32 	%f328, %f17, %f26;
	fma.rn.f32 	%f329, %f16, %f25, %f328;
	fma.rn.f32 	%f330, %f18, %f27, %f329;
	ld.const.v4.f32 	{%f331, %f332, %f333, %f334}, [params+560];
	fma.rn.f32 	%f339, %f330, %f331, %f333;
	mul.f32 	%f340, %f17, %f23;
	fma.rn.f32 	%f341, %f16, %f22, %f340;
	fma.rn.f32 	%f342, %f18, %f24, %f341;
	fma.rn.f32 	%f343, %f342, %f332, %f334;
	ld.const.u64 	%rd59, [params+552];
	tex.2d.v4.f32.f32 	{%f344, %f345, %f346, %f347}, [%rd59, {%f339, %f343}];
	min.f32 	%f348, %f344, %f345;
	min.f32 	%f349, %f348, %f346;
	mul.f32 	%f78, %f1110, %f349;
	ld.const.f32 	%f350, [params+524];
	mul.f32 	%f351, %f1110, %f350;
	ld.const.v2.f32 	{%f352, %f353}, [params+528];
	mul.f32 	%f356, %f1111, %f352;
	mul.f32 	%f357, %f1112, %f353;
	mul.f32 	%f358, %f344, %f351;
	mul.f32 	%f359, %f345, %f356;
	mul.f32 	%f360, %f346, %f357;
	cvt.sat.f32.f32 	%f361, %f15;
	mul.f32 	%f362, %f358, %f361;
	mul.f32 	%f363, %f359, %f361;
	mul.f32 	%f364, %f361, %f360;
	setp.eq.s32 	%p45, %r360, 0;
	selp.f32 	%f79, %f362, %f358, %p45;
	selp.f32 	%f80, %f363, %f359, %p45;
	selp.f32 	%f81, %f364, %f360, %p45;
	ld.const.u32 	%r50, [params+104];
	and.b32  	%r207, %r50, 8;
	setp.eq.s32 	%p46, %r207, 0;
	@%p46 bra 	$L__BB0_52;

	mov.f32 	%f369, 0f3EE8BA2E;
	abs.f32 	%f83, %f78;
	setp.lt.f32 	%p47, %f83, 0f00800000;
	mul.f32 	%f371, %f83, 0f4B800000;
	selp.f32 	%f372, %f371, %f83, %p47;
	selp.f32 	%f373, 0fC3170000, 0fC2FE0000, %p47;
	mov.b32 	%r210, %f372;
	and.b32  	%r211, %r210, 8388607;
	or.b32  	%r212, %r211, 1065353216;
	mov.b32 	%f374, %r212;
	shr.u32 	%r213, %r210, 23;
	cvt.rn.f32.u32 	%f375, %r213;
	add.f32 	%f376, %f373, %f375;
	setp.gt.f32 	%p48, %f374, 0f3FB504F3;
	mul.f32 	%f377, %f374, 0f3F000000;
	add.f32 	%f378, %f376, 0f3F800000;
	selp.f32 	%f379, %f378, %f376, %p48;
	selp.f32 	%f380, %f377, %f374, %p48;
	add.f32 	%f381, %f380, 0fBF800000;
	add.f32 	%f382, %f380, 0f3F800000;
	rcp.approx.ftz.f32 	%f383, %f382;
	add.f32 	%f384, %f381, %f381;
	mul.f32 	%f385, %f384, %f383;
	mul.f32 	%f386, %f385, %f385;
	mov.f32 	%f387, 0f3C4CAF63;
	mov.f32 	%f388, 0f3B18F0FE;
	fma.rn.f32 	%f389, %f388, %f386, %f387;
	mov.f32 	%f390, 0f3DAAAABD;
	fma.rn.f32 	%f391, %f389, %f386, %f390;
	mul.rn.f32 	%f392, %f391, %f386;
	mul.rn.f32 	%f393, %f392, %f385;
	sub.f32 	%f394, %f381, %f385;
	add.f32 	%f395, %f394, %f394;
	neg.f32 	%f396, %f385;
	fma.rn.f32 	%f397, %f396, %f381, %f395;
	mul.rn.f32 	%f398, %f383, %f397;
	add.f32 	%f399, %f393, %f385;
	sub.f32 	%f400, %f385, %f399;
	add.f32 	%f401, %f393, %f400;
	add.f32 	%f402, %f398, %f401;
	add.f32 	%f403, %f399, %f402;
	sub.f32 	%f404, %f399, %f403;
	add.f32 	%f405, %f402, %f404;
	mov.f32 	%f406, 0f3F317200;
	mul.rn.f32 	%f407, %f379, %f406;
	mov.f32 	%f408, 0f35BFBE8E;
	mul.rn.f32 	%f409, %f379, %f408;
	add.f32 	%f410, %f407, %f403;
	sub.f32 	%f411, %f407, %f410;
	add.f32 	%f412, %f403, %f411;
	add.f32 	%f413, %f405, %f412;
	add.f32 	%f414, %f409, %f413;
	add.f32 	%f415, %f410, %f414;
	sub.f32 	%f416, %f410, %f415;
	add.f32 	%f417, %f414, %f416;
	mul.rn.f32 	%f418, %f369, %f415;
	neg.f32 	%f419, %f418;
	fma.rn.f32 	%f420, %f369, %f415, %f419;
	fma.rn.f32 	%f421, %f369, %f417, %f420;
	mov.f32 	%f422, 0f00000000;
	fma.rn.f32 	%f423, %f422, %f415, %f421;
	add.rn.f32 	%f424, %f418, %f423;
	neg.f32 	%f425, %f424;
	add.rn.f32 	%f426, %f418, %f425;
	add.rn.f32 	%f427, %f426, %f423;
	mov.b32 	%r214, %f424;
	setp.eq.s32 	%p49, %r214, 1118925336;
	add.s32 	%r215, %r214, -1;
	mov.b32 	%f428, %r215;
	add.f32 	%f429, %f427, 0f37000000;
	selp.f32 	%f84, %f429, %f427, %p49;
	selp.f32 	%f430, %f428, %f424, %p49;
	mov.f32 	%f431, 0f3FB8AA3B;
	mul.rn.f32 	%f432, %f430, %f431;
	cvt.rzi.f32.f32 	%f433, %f432;
	abs.f32 	%f434, %f433;
	setp.gt.f32 	%p50, %f434, 0f42FC0000;
	mov.b32 	%r216, %f433;
	and.b32  	%r217, %r216, -2147483648;
	or.b32  	%r218, %r217, 1123811328;
	mov.b32 	%f435, %r218;
	selp.f32 	%f436, %f435, %f433, %p50;
	mov.f32 	%f437, 0fBF317218;
	fma.rn.f32 	%f438, %f436, %f437, %f430;
	mov.f32 	%f439, 0f3102E308;
	fma.rn.f32 	%f440, %f436, %f439, %f438;
	mul.f32 	%f441, %f440, 0f3FB8AA3B;
	add.f32 	%f442, %f436, 0f4B40007F;
	mov.b32 	%r219, %f442;
	shl.b32 	%r220, %r219, 23;
	mov.b32 	%f443, %r220;
	ex2.approx.ftz.f32 	%f444, %f441;
	mul.f32 	%f85, %f444, %f443;
	setp.eq.f32 	%p51, %f85, 0f7F800000;
	mov.f32 	%f1113, 0f7F800000;
	@%p51 bra 	$L__BB0_41;

	fma.rn.f32 	%f1113, %f85, %f84, %f85;

$L__BB0_41:
	mov.f32 	%f1036, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f1035, %f1036;
	add.f32 	%f1034, %f1035, %f1035;
	mov.f32 	%f1033, 0f3EE8BA2E;
	sub.f32 	%f1032, %f1033, %f1034;
	abs.f32 	%f1031, %f1032;
	setp.lt.f32 	%p52, %f78, 0f00000000;
	setp.eq.f32 	%p53, %f1031, 0f3F800000;
	and.pred  	%p1, %p52, %p53;
	setp.eq.f32 	%p54, %f78, 0f00000000;
	@%p54 bra 	$L__BB0_45;
	bra.uni 	$L__BB0_42;

$L__BB0_45:
	add.f32 	%f449, %f78, %f78;
	selp.f32 	%f1115, %f449, 0f00000000, %p53;
	bra.uni 	$L__BB0_46;

$L__BB0_149:
	mov.f32 	%f1023, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs79, %f1023;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs78, %f1023;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs77, %f1023;}

	// end inline asm
	mov.u16 	%rs80, 0;
	st.global.v4.u16 	[%rd22], {%rs77, %rs78, %rs79, %rs80};

$L__BB0_150:
	and.b32  	%r353, %r51, 64;
	setp.eq.s32 	%p177, %r353, 0;
	@%p177 bra 	$L__BB0_152;

	ld.const.u64 	%rd99, [params+208];
	cvta.to.global.u64 	%rd100, %rd99;
	ld.const.u32 	%r354, [params+200];
	mad.lo.s32 	%r355, %r354, %r4, %r3;
	mul.wide.u32 	%rd101, %r355, 4;
	add.s64 	%rd102, %rd100, %rd101;
	mov.u16 	%rs81, 0;
	st.global.v4.u8 	[%rd102], {%rs81, %rs81, %rs81, %rs81};
	bra.uni 	$L__BB0_152;

$L__BB0_42:
	mov.b32 	%r221, %f1113;
	xor.b32  	%r222, %r221, -2147483648;
	mov.b32 	%f445, %r222;
	selp.f32 	%f1115, %f445, %f1113, %p1;
	setp.geu.f32 	%p55, %f78, 0f00000000;
	@%p55 bra 	$L__BB0_46;

	mov.f32 	%f446, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f447, %f446;
	setp.eq.f32 	%p56, %f447, 0f3EE8BA2E;
	@%p56 bra 	$L__BB0_46;

	mov.f32 	%f1115, 0f7FFFFFFF;

$L__BB0_46:
	abs.f32 	%f1037, %f78;
	add.f32 	%f450, %f1037, 0f3EE8BA2E;
	mov.b32 	%r223, %f450;
	setp.lt.s32 	%p58, %r223, 2139095040;
	@%p58 bra 	$L__BB0_51;

	abs.f32 	%f1038, %f78;
	setp.gtu.f32 	%p59, %f1038, 0f7F800000;
	@%p59 bra 	$L__BB0_50;
	bra.uni 	$L__BB0_48;

$L__BB0_50:
	add.f32 	%f1115, %f78, 0f3EE8BA2E;
	bra.uni 	$L__BB0_51;

$L__BB0_48:
	abs.f32 	%f1039, %f78;
	setp.neu.f32 	%p60, %f1039, 0f7F800000;
	@%p60 bra 	$L__BB0_51;

	selp.f32 	%f1115, 0fFF800000, 0f7F800000, %p1;

$L__BB0_51:
	ld.const.u32 	%r363, [params+184];
	mad.lo.s32 	%r362, %r363, %r4, %r3;
	cvt.u64.u32 	%rd108, %r362;
	ld.const.u64 	%rd107, [params+192];
	cvta.to.global.u64 	%rd106, %rd107;
	mul.f32 	%f451, %f1115, 0f437F0000;
	setp.eq.f32 	%p61, %f78, 0f3F800000;
	selp.f32 	%f452, 0f437F0000, %f451, %p61;
	cvt.rzi.u32.f32 	%r224, %f452;
	shl.b64 	%rd61, %rd108, 1;
	add.s64 	%rd62, %rd106, %rd61;
	cvt.u16.u32 	%rs17, %r224;
	mov.u16 	%rs18, 255;
	st.global.v2.u8 	[%rd62], {%rs17, %rs18};

$L__BB0_52:
	ld.const.u32 	%r361, [params+104];
	and.b32  	%r225, %r361, 1;
	setp.eq.b32 	%p62, %r225, 1;
	mov.pred 	%p63, 0;
	xor.pred  	%p64, %p62, %p63;
	not.pred 	%p65, %p64;
	@%p65 bra 	$L__BB0_126;

	mov.f32 	%f457, 0f3EE66666;
	abs.f32 	%f95, %f79;
	setp.lt.f32 	%p66, %f95, 0f00800000;
	mul.f32 	%f459, %f95, 0f4B800000;
	selp.f32 	%f460, %f459, %f95, %p66;
	selp.f32 	%f461, 0fC3170000, 0fC2FE0000, %p66;
	mov.b32 	%r226, %f460;
	and.b32  	%r227, %r226, 8388607;
	or.b32  	%r228, %r227, 1065353216;
	mov.b32 	%f462, %r228;
	shr.u32 	%r229, %r226, 23;
	cvt.rn.f32.u32 	%f463, %r229;
	add.f32 	%f464, %f461, %f463;
	setp.gt.f32 	%p67, %f462, 0f3FB504F3;
	mul.f32 	%f465, %f462, 0f3F000000;
	add.f32 	%f466, %f464, 0f3F800000;
	selp.f32 	%f467, %f466, %f464, %p67;
	selp.f32 	%f468, %f465, %f462, %p67;
	add.f32 	%f469, %f468, 0fBF800000;
	add.f32 	%f470, %f468, 0f3F800000;
	rcp.approx.ftz.f32 	%f471, %f470;
	add.f32 	%f472, %f469, %f469;
	mul.f32 	%f473, %f472, %f471;
	mul.f32 	%f474, %f473, %f473;
	mov.f32 	%f475, 0f3C4CAF63;
	mov.f32 	%f476, 0f3B18F0FE;
	fma.rn.f32 	%f477, %f476, %f474, %f475;
	mov.f32 	%f478, 0f3DAAAABD;
	fma.rn.f32 	%f479, %f477, %f474, %f478;
	mul.rn.f32 	%f480, %f479, %f474;
	mul.rn.f32 	%f481, %f480, %f473;
	sub.f32 	%f482, %f469, %f473;
	add.f32 	%f483, %f482, %f482;
	neg.f32 	%f484, %f473;
	fma.rn.f32 	%f485, %f484, %f469, %f483;
	mul.rn.f32 	%f486, %f471, %f485;
	add.f32 	%f487, %f481, %f473;
	sub.f32 	%f488, %f473, %f487;
	add.f32 	%f489, %f481, %f488;
	add.f32 	%f490, %f486, %f489;
	add.f32 	%f491, %f487, %f490;
	sub.f32 	%f492, %f487, %f491;
	add.f32 	%f493, %f490, %f492;
	mov.f32 	%f494, 0f3F317200;
	mul.rn.f32 	%f495, %f467, %f494;
	mov.f32 	%f496, 0f35BFBE8E;
	mul.rn.f32 	%f497, %f467, %f496;
	add.f32 	%f498, %f495, %f491;
	sub.f32 	%f499, %f495, %f498;
	add.f32 	%f500, %f491, %f499;
	add.f32 	%f501, %f493, %f500;
	add.f32 	%f502, %f497, %f501;
	add.f32 	%f503, %f498, %f502;
	sub.f32 	%f504, %f498, %f503;
	add.f32 	%f505, %f502, %f504;
	mul.rn.f32 	%f506, %f457, %f503;
	neg.f32 	%f507, %f506;
	fma.rn.f32 	%f508, %f457, %f503, %f507;
	fma.rn.f32 	%f509, %f457, %f505, %f508;
	mov.f32 	%f510, 0f00000000;
	fma.rn.f32 	%f511, %f510, %f503, %f509;
	add.rn.f32 	%f512, %f506, %f511;
	neg.f32 	%f513, %f512;
	add.rn.f32 	%f514, %f506, %f513;
	add.rn.f32 	%f515, %f514, %f511;
	mov.b32 	%r230, %f512;
	setp.eq.s32 	%p68, %r230, 1118925336;
	add.s32 	%r231, %r230, -1;
	mov.b32 	%f516, %r231;
	add.f32 	%f517, %f515, 0f37000000;
	selp.f32 	%f96, %f517, %f515, %p68;
	selp.f32 	%f518, %f516, %f512, %p68;
	mov.f32 	%f519, 0f3FB8AA3B;
	mul.rn.f32 	%f520, %f518, %f519;
	cvt.rzi.f32.f32 	%f521, %f520;
	abs.f32 	%f522, %f521;
	setp.gt.f32 	%p69, %f522, 0f42FC0000;
	mov.b32 	%r232, %f521;
	and.b32  	%r233, %r232, -2147483648;
	or.b32  	%r234, %r233, 1123811328;
	mov.b32 	%f523, %r234;
	selp.f32 	%f524, %f523, %f521, %p69;
	mov.f32 	%f525, 0fBF317218;
	fma.rn.f32 	%f526, %f524, %f525, %f518;
	mov.f32 	%f527, 0f3102E308;
	fma.rn.f32 	%f528, %f524, %f527, %f526;
	mul.f32 	%f529, %f528, 0f3FB8AA3B;
	add.f32 	%f530, %f524, 0f4B40007F;
	mov.b32 	%r235, %f530;
	shl.b32 	%r236, %r235, 23;
	mov.b32 	%f531, %r236;
	ex2.approx.ftz.f32 	%f532, %f529;
	mul.f32 	%f97, %f532, %f531;
	setp.eq.f32 	%p70, %f97, 0f7F800000;
	mov.f32 	%f1116, 0f7F800000;
	@%p70 bra 	$L__BB0_55;

	fma.rn.f32 	%f1116, %f97, %f96, %f97;

$L__BB0_55:
	mov.f32 	%f1045, 0f3E666666;
	cvt.rzi.f32.f32 	%f1044, %f1045;
	add.f32 	%f1043, %f1044, %f1044;
	mov.f32 	%f1042, 0f3EE66666;
	sub.f32 	%f1041, %f1042, %f1043;
	abs.f32 	%f1040, %f1041;
	setp.lt.f32 	%p71, %f79, 0f00000000;
	setp.eq.f32 	%p72, %f1040, 0f3F800000;
	and.pred  	%p2, %p71, %p72;
	setp.eq.f32 	%p73, %f79, 0f00000000;
	@%p73 bra 	$L__BB0_59;
	bra.uni 	$L__BB0_56;

$L__BB0_59:
	add.f32 	%f537, %f79, %f79;
	selp.f32 	%f1118, %f537, 0f00000000, %p72;
	bra.uni 	$L__BB0_60;

$L__BB0_56:
	mov.b32 	%r237, %f1116;
	xor.b32  	%r238, %r237, -2147483648;
	mov.b32 	%f533, %r238;
	selp.f32 	%f1118, %f533, %f1116, %p2;
	setp.geu.f32 	%p74, %f79, 0f00000000;
	@%p74 bra 	$L__BB0_60;

	mov.f32 	%f534, 0f3EE66666;
	cvt.rzi.f32.f32 	%f535, %f534;
	setp.eq.f32 	%p75, %f535, 0f3EE66666;
	@%p75 bra 	$L__BB0_60;

	mov.f32 	%f1118, 0f7FFFFFFF;

$L__BB0_60:
	abs.f32 	%f1046, %f79;
	add.f32 	%f538, %f1046, 0f3EE66666;
	mov.b32 	%r239, %f538;
	setp.lt.s32 	%p77, %r239, 2139095040;
	@%p77 bra 	$L__BB0_65;

	abs.f32 	%f1047, %f79;
	setp.gtu.f32 	%p78, %f1047, 0f7F800000;
	@%p78 bra 	$L__BB0_64;
	bra.uni 	$L__BB0_62;

$L__BB0_64:
	add.f32 	%f1118, %f79, 0f3EE66666;
	bra.uni 	$L__BB0_65;

$L__BB0_62:
	abs.f32 	%f1048, %f79;
	setp.neu.f32 	%p79, %f1048, 0f7F800000;
	@%p79 bra 	$L__BB0_65;

	selp.f32 	%f1118, 0fFF800000, 0f7F800000, %p2;

$L__BB0_65:
	setp.eq.f32 	%p80, %f79, 0f3F800000;
	selp.f32 	%f106, 0f3F800000, %f1118, %p80;
	abs.f32 	%f107, %f80;
	setp.lt.f32 	%p81, %f107, 0f00800000;
	mul.f32 	%f540, %f107, 0f4B800000;
	selp.f32 	%f541, %f540, %f107, %p81;
	selp.f32 	%f542, 0fC3170000, 0fC2FE0000, %p81;
	mov.b32 	%r240, %f541;
	and.b32  	%r241, %r240, 8388607;
	or.b32  	%r242, %r241, 1065353216;
	mov.b32 	%f543, %r242;
	shr.u32 	%r243, %r240, 23;
	cvt.rn.f32.u32 	%f544, %r243;
	add.f32 	%f545, %f542, %f544;
	setp.gt.f32 	%p82, %f543, 0f3FB504F3;
	mul.f32 	%f546, %f543, 0f3F000000;
	add.f32 	%f547, %f545, 0f3F800000;
	selp.f32 	%f548, %f547, %f545, %p82;
	selp.f32 	%f549, %f546, %f543, %p82;
	add.f32 	%f550, %f549, 0fBF800000;
	add.f32 	%f551, %f549, 0f3F800000;
	rcp.approx.ftz.f32 	%f552, %f551;
	add.f32 	%f553, %f550, %f550;
	mul.f32 	%f554, %f553, %f552;
	mul.f32 	%f555, %f554, %f554;
	mov.f32 	%f556, 0f3C4CAF63;
	mov.f32 	%f557, 0f3B18F0FE;
	fma.rn.f32 	%f558, %f557, %f555, %f556;
	mov.f32 	%f559, 0f3DAAAABD;
	fma.rn.f32 	%f560, %f558, %f555, %f559;
	mul.rn.f32 	%f561, %f560, %f555;
	mul.rn.f32 	%f562, %f561, %f554;
	sub.f32 	%f563, %f550, %f554;
	add.f32 	%f564, %f563, %f563;
	neg.f32 	%f565, %f554;
	fma.rn.f32 	%f566, %f565, %f550, %f564;
	mul.rn.f32 	%f567, %f552, %f566;
	add.f32 	%f568, %f562, %f554;
	sub.f32 	%f569, %f554, %f568;
	add.f32 	%f570, %f562, %f569;
	add.f32 	%f571, %f567, %f570;
	add.f32 	%f572, %f568, %f571;
	sub.f32 	%f573, %f568, %f572;
	add.f32 	%f574, %f571, %f573;
	mov.f32 	%f575, 0f3F317200;
	mul.rn.f32 	%f576, %f548, %f575;
	mov.f32 	%f577, 0f35BFBE8E;
	mul.rn.f32 	%f578, %f548, %f577;
	add.f32 	%f579, %f576, %f572;
	sub.f32 	%f580, %f576, %f579;
	add.f32 	%f581, %f572, %f580;
	add.f32 	%f582, %f574, %f581;
	add.f32 	%f583, %f578, %f582;
	add.f32 	%f584, %f579, %f583;
	sub.f32 	%f585, %f579, %f584;
	add.f32 	%f586, %f583, %f585;
	mov.f32 	%f587, 0f3EE66666;
	mul.rn.f32 	%f588, %f587, %f584;
	neg.f32 	%f589, %f588;
	fma.rn.f32 	%f590, %f587, %f584, %f589;
	fma.rn.f32 	%f591, %f587, %f586, %f590;
	mov.f32 	%f592, 0f00000000;
	fma.rn.f32 	%f593, %f592, %f584, %f591;
	add.rn.f32 	%f594, %f588, %f593;
	neg.f32 	%f595, %f594;
	add.rn.f32 	%f596, %f588, %f595;
	add.rn.f32 	%f597, %f596, %f593;
	mov.b32 	%r244, %f594;
	setp.eq.s32 	%p83, %r244, 1118925336;
	add.s32 	%r245, %r244, -1;
	mov.b32 	%f598, %r245;
	add.f32 	%f599, %f597, 0f37000000;
	selp.f32 	%f108, %f599, %f597, %p83;
	selp.f32 	%f600, %f598, %f594, %p83;
	mov.f32 	%f601, 0f3FB8AA3B;
	mul.rn.f32 	%f602, %f600, %f601;
	cvt.rzi.f32.f32 	%f603, %f602;
	abs.f32 	%f604, %f603;
	setp.gt.f32 	%p84, %f604, 0f42FC0000;
	mov.b32 	%r246, %f603;
	and.b32  	%r247, %r246, -2147483648;
	or.b32  	%r248, %r247, 1123811328;
	mov.b32 	%f605, %r248;
	selp.f32 	%f606, %f605, %f603, %p84;
	mov.f32 	%f607, 0fBF317218;
	fma.rn.f32 	%f608, %f606, %f607, %f600;
	mov.f32 	%f609, 0f3102E308;
	fma.rn.f32 	%f610, %f606, %f609, %f608;
	mul.f32 	%f611, %f610, 0f3FB8AA3B;
	add.f32 	%f612, %f606, 0f4B40007F;
	mov.b32 	%r249, %f612;
	shl.b32 	%r250, %r249, 23;
	mov.b32 	%f613, %r250;
	ex2.approx.ftz.f32 	%f614, %f611;
	mul.f32 	%f109, %f614, %f613;
	setp.eq.f32 	%p85, %f109, 0f7F800000;
	mov.f32 	%f1119, 0f7F800000;
	@%p85 bra 	$L__BB0_67;

	fma.rn.f32 	%f1119, %f109, %f108, %f109;

$L__BB0_67:
	setp.lt.f32 	%p86, %f80, 0f00000000;
	and.pred  	%p3, %p86, %p72;
	setp.eq.f32 	%p88, %f80, 0f00000000;
	@%p88 bra 	$L__BB0_71;
	bra.uni 	$L__BB0_68;

$L__BB0_71:
	add.f32 	%f619, %f80, %f80;
	selp.f32 	%f1121, %f619, 0f00000000, %p72;
	bra.uni 	$L__BB0_72;

$L__BB0_68:
	mov.b32 	%r251, %f1119;
	xor.b32  	%r252, %r251, -2147483648;
	mov.b32 	%f615, %r252;
	selp.f32 	%f1121, %f615, %f1119, %p3;
	setp.geu.f32 	%p89, %f80, 0f00000000;
	@%p89 bra 	$L__BB0_72;

	mov.f32 	%f616, 0f3EE66666;
	cvt.rzi.f32.f32 	%f617, %f616;
	setp.eq.f32 	%p90, %f617, 0f3EE66666;
	@%p90 bra 	$L__BB0_72;

	mov.f32 	%f1121, 0f7FFFFFFF;

$L__BB0_72:
	abs.f32 	%f1049, %f80;
	add.f32 	%f620, %f1049, 0f3EE66666;
	mov.b32 	%r253, %f620;
	setp.lt.s32 	%p92, %r253, 2139095040;
	@%p92 bra 	$L__BB0_77;

	abs.f32 	%f1050, %f80;
	setp.gtu.f32 	%p93, %f1050, 0f7F800000;
	@%p93 bra 	$L__BB0_76;
	bra.uni 	$L__BB0_74;

$L__BB0_76:
	add.f32 	%f1121, %f80, 0f3EE66666;
	bra.uni 	$L__BB0_77;

$L__BB0_74:
	abs.f32 	%f1051, %f80;
	setp.neu.f32 	%p94, %f1051, 0f7F800000;
	@%p94 bra 	$L__BB0_77;

	selp.f32 	%f1121, 0fFF800000, 0f7F800000, %p3;

$L__BB0_77:
	setp.eq.f32 	%p95, %f80, 0f3F800000;
	selp.f32 	%f118, 0f3F800000, %f1121, %p95;
	abs.f32 	%f119, %f81;
	setp.lt.f32 	%p96, %f119, 0f00800000;
	mul.f32 	%f622, %f119, 0f4B800000;
	selp.f32 	%f623, %f622, %f119, %p96;
	selp.f32 	%f624, 0fC3170000, 0fC2FE0000, %p96;
	mov.b32 	%r254, %f623;
	and.b32  	%r255, %r254, 8388607;
	or.b32  	%r256, %r255, 1065353216;
	mov.b32 	%f625, %r256;
	shr.u32 	%r257, %r254, 23;
	cvt.rn.f32.u32 	%f626, %r257;
	add.f32 	%f627, %f624, %f626;
	setp.gt.f32 	%p97, %f625, 0f3FB504F3;
	mul.f32 	%f628, %f625, 0f3F000000;
	add.f32 	%f629, %f627, 0f3F800000;
	selp.f32 	%f630, %f629, %f627, %p97;
	selp.f32 	%f631, %f628, %f625, %p97;
	add.f32 	%f632, %f631, 0fBF800000;
	add.f32 	%f633, %f631, 0f3F800000;
	rcp.approx.ftz.f32 	%f634, %f633;
	add.f32 	%f635, %f632, %f632;
	mul.f32 	%f636, %f635, %f634;
	mul.f32 	%f637, %f636, %f636;
	mov.f32 	%f638, 0f3C4CAF63;
	mov.f32 	%f639, 0f3B18F0FE;
	fma.rn.f32 	%f640, %f639, %f637, %f638;
	mov.f32 	%f641, 0f3DAAAABD;
	fma.rn.f32 	%f642, %f640, %f637, %f641;
	mul.rn.f32 	%f643, %f642, %f637;
	mul.rn.f32 	%f644, %f643, %f636;
	sub.f32 	%f645, %f632, %f636;
	add.f32 	%f646, %f645, %f645;
	neg.f32 	%f647, %f636;
	fma.rn.f32 	%f648, %f647, %f632, %f646;
	mul.rn.f32 	%f649, %f634, %f648;
	add.f32 	%f650, %f644, %f636;
	sub.f32 	%f651, %f636, %f650;
	add.f32 	%f652, %f644, %f651;
	add.f32 	%f653, %f649, %f652;
	add.f32 	%f654, %f650, %f653;
	sub.f32 	%f655, %f650, %f654;
	add.f32 	%f656, %f653, %f655;
	mov.f32 	%f657, 0f3F317200;
	mul.rn.f32 	%f658, %f630, %f657;
	mov.f32 	%f659, 0f35BFBE8E;
	mul.rn.f32 	%f660, %f630, %f659;
	add.f32 	%f661, %f658, %f654;
	sub.f32 	%f662, %f658, %f661;
	add.f32 	%f663, %f654, %f662;
	add.f32 	%f664, %f656, %f663;
	add.f32 	%f665, %f660, %f664;
	add.f32 	%f666, %f661, %f665;
	sub.f32 	%f667, %f661, %f666;
	add.f32 	%f668, %f665, %f667;
	mov.f32 	%f669, 0f3EE66666;
	mul.rn.f32 	%f670, %f669, %f666;
	neg.f32 	%f671, %f670;
	fma.rn.f32 	%f672, %f669, %f666, %f671;
	fma.rn.f32 	%f673, %f669, %f668, %f672;
	mov.f32 	%f674, 0f00000000;
	fma.rn.f32 	%f675, %f674, %f666, %f673;
	add.rn.f32 	%f676, %f670, %f675;
	neg.f32 	%f677, %f676;
	add.rn.f32 	%f678, %f670, %f677;
	add.rn.f32 	%f679, %f678, %f675;
	mov.b32 	%r258, %f676;
	setp.eq.s32 	%p98, %r258, 1118925336;
	add.s32 	%r259, %r258, -1;
	mov.b32 	%f680, %r259;
	add.f32 	%f681, %f679, 0f37000000;
	selp.f32 	%f120, %f681, %f679, %p98;
	selp.f32 	%f682, %f680, %f676, %p98;
	mov.f32 	%f683, 0f3FB8AA3B;
	mul.rn.f32 	%f684, %f682, %f683;
	cvt.rzi.f32.f32 	%f685, %f684;
	abs.f32 	%f686, %f685;
	setp.gt.f32 	%p99, %f686, 0f42FC0000;
	mov.b32 	%r260, %f685;
	and.b32  	%r261, %r260, -2147483648;
	or.b32  	%r262, %r261, 1123811328;
	mov.b32 	%f687, %r262;
	selp.f32 	%f688, %f687, %f685, %p99;
	mov.f32 	%f689, 0fBF317218;
	fma.rn.f32 	%f690, %f688, %f689, %f682;
	mov.f32 	%f691, 0f3102E308;
	fma.rn.f32 	%f692, %f688, %f691, %f690;
	mul.f32 	%f693, %f692, 0f3FB8AA3B;
	add.f32 	%f694, %f688, 0f4B40007F;
	mov.b32 	%r263, %f694;
	shl.b32 	%r264, %r263, 23;
	mov.b32 	%f695, %r264;
	ex2.approx.ftz.f32 	%f696, %f693;
	mul.f32 	%f121, %f696, %f695;
	setp.eq.f32 	%p100, %f121, 0f7F800000;
	mov.f32 	%f1122, 0f7F800000;
	@%p100 bra 	$L__BB0_79;

	fma.rn.f32 	%f1122, %f121, %f120, %f121;

$L__BB0_79:
	setp.lt.f32 	%p101, %f81, 0f00000000;
	and.pred  	%p4, %p101, %p72;
	setp.eq.f32 	%p103, %f81, 0f00000000;
	@%p103 bra 	$L__BB0_83;
	bra.uni 	$L__BB0_80;

$L__BB0_83:
	add.f32 	%f701, %f81, %f81;
	selp.f32 	%f1124, %f701, 0f00000000, %p72;
	bra.uni 	$L__BB0_84;

$L__BB0_80:
	mov.b32 	%r265, %f1122;
	xor.b32  	%r266, %r265, -2147483648;
	mov.b32 	%f697, %r266;
	selp.f32 	%f1124, %f697, %f1122, %p4;
	setp.geu.f32 	%p104, %f81, 0f00000000;
	@%p104 bra 	$L__BB0_84;

	mov.f32 	%f698, 0f3EE66666;
	cvt.rzi.f32.f32 	%f699, %f698;
	setp.eq.f32 	%p105, %f699, 0f3EE66666;
	@%p105 bra 	$L__BB0_84;

	mov.f32 	%f1124, 0f7FFFFFFF;

$L__BB0_84:
	abs.f32 	%f1052, %f81;
	add.f32 	%f702, %f1052, 0f3EE66666;
	mov.b32 	%r267, %f702;
	setp.lt.s32 	%p107, %r267, 2139095040;
	@%p107 bra 	$L__BB0_89;

	abs.f32 	%f1053, %f81;
	setp.gtu.f32 	%p108, %f1053, 0f7F800000;
	@%p108 bra 	$L__BB0_88;
	bra.uni 	$L__BB0_86;

$L__BB0_88:
	add.f32 	%f1124, %f81, 0f3EE66666;
	bra.uni 	$L__BB0_89;

$L__BB0_86:
	abs.f32 	%f1054, %f81;
	setp.neu.f32 	%p109, %f1054, 0f7F800000;
	@%p109 bra 	$L__BB0_89;

	selp.f32 	%f1124, 0fFF800000, 0f7F800000, %p4;

$L__BB0_89:
	setp.eq.f32 	%p110, %f81, 0f3F800000;
	mov.f32 	%f704, 0f3F800000;
	selp.f32 	%f705, 0f3F800000, %f1124, %p110;
	min.f32 	%f706, %f106, %f704;
	mov.f32 	%f707, 0f00000000;
	max.f32 	%f130, %f707, %f706;
	min.f32 	%f708, %f118, %f704;
	max.f32 	%f131, %f707, %f708;
	min.f32 	%f709, %f705, %f704;
	max.f32 	%f132, %f707, %f709;
	mov.f32 	%f713, 0f3ED55555;
	abs.f32 	%f134, %f130;
	setp.lt.f32 	%p111, %f134, 0f00800000;
	mul.f32 	%f715, %f134, 0f4B800000;
	selp.f32 	%f716, %f715, %f134, %p111;
	selp.f32 	%f717, 0fC3170000, 0fC2FE0000, %p111;
	mov.b32 	%r270, %f716;
	and.b32  	%r271, %r270, 8388607;
	or.b32  	%r272, %r271, 1065353216;
	mov.b32 	%f718, %r272;
	shr.u32 	%r273, %r270, 23;
	cvt.rn.f32.u32 	%f719, %r273;
	add.f32 	%f720, %f717, %f719;
	setp.gt.f32 	%p112, %f718, 0f3FB504F3;
	mul.f32 	%f721, %f718, 0f3F000000;
	add.f32 	%f722, %f720, 0f3F800000;
	selp.f32 	%f723, %f722, %f720, %p112;
	selp.f32 	%f724, %f721, %f718, %p112;
	add.f32 	%f725, %f724, 0fBF800000;
	add.f32 	%f726, %f724, 0f3F800000;
	rcp.approx.ftz.f32 	%f727, %f726;
	add.f32 	%f728, %f725, %f725;
	mul.f32 	%f729, %f728, %f727;
	mul.f32 	%f730, %f729, %f729;
	mov.f32 	%f731, 0f3C4CAF63;
	mov.f32 	%f732, 0f3B18F0FE;
	fma.rn.f32 	%f733, %f732, %f730, %f731;
	mov.f32 	%f734, 0f3DAAAABD;
	fma.rn.f32 	%f735, %f733, %f730, %f734;
	mul.rn.f32 	%f736, %f735, %f730;
	mul.rn.f32 	%f737, %f736, %f729;
	sub.f32 	%f738, %f725, %f729;
	add.f32 	%f739, %f738, %f738;
	neg.f32 	%f740, %f729;
	fma.rn.f32 	%f741, %f740, %f725, %f739;
	mul.rn.f32 	%f742, %f727, %f741;
	add.f32 	%f743, %f737, %f729;
	sub.f32 	%f744, %f729, %f743;
	add.f32 	%f745, %f737, %f744;
	add.f32 	%f746, %f742, %f745;
	add.f32 	%f747, %f743, %f746;
	sub.f32 	%f748, %f743, %f747;
	add.f32 	%f749, %f746, %f748;
	mov.f32 	%f750, 0f3F317200;
	mul.rn.f32 	%f751, %f723, %f750;
	mov.f32 	%f752, 0f35BFBE8E;
	mul.rn.f32 	%f753, %f723, %f752;
	add.f32 	%f754, %f751, %f747;
	sub.f32 	%f755, %f751, %f754;
	add.f32 	%f756, %f747, %f755;
	add.f32 	%f757, %f749, %f756;
	add.f32 	%f758, %f753, %f757;
	add.f32 	%f759, %f754, %f758;
	sub.f32 	%f760, %f754, %f759;
	add.f32 	%f761, %f758, %f760;
	mul.rn.f32 	%f762, %f713, %f759;
	neg.f32 	%f763, %f762;
	fma.rn.f32 	%f764, %f713, %f759, %f763;
	fma.rn.f32 	%f765, %f713, %f761, %f764;
	fma.rn.f32 	%f766, %f707, %f759, %f765;
	add.rn.f32 	%f767, %f762, %f766;
	neg.f32 	%f768, %f767;
	add.rn.f32 	%f769, %f762, %f768;
	add.rn.f32 	%f770, %f769, %f766;
	mov.b32 	%r274, %f767;
	setp.eq.s32 	%p113, %r274, 1118925336;
	add.s32 	%r275, %r274, -1;
	mov.b32 	%f771, %r275;
	add.f32 	%f772, %f770, 0f37000000;
	selp.f32 	%f135, %f772, %f770, %p113;
	selp.f32 	%f773, %f771, %f767, %p113;
	mov.f32 	%f774, 0f3FB8AA3B;
	mul.rn.f32 	%f775, %f773, %f774;
	cvt.rzi.f32.f32 	%f776, %f775;
	abs.f32 	%f777, %f776;
	setp.gt.f32 	%p114, %f777, 0f42FC0000;
	mov.b32 	%r276, %f776;
	and.b32  	%r277, %r276, -2147483648;
	or.b32  	%r278, %r277, 1123811328;
	mov.b32 	%f778, %r278;
	selp.f32 	%f779, %f778, %f776, %p114;
	mov.f32 	%f780, 0fBF317218;
	fma.rn.f32 	%f781, %f779, %f780, %f773;
	mov.f32 	%f782, 0f3102E308;
	fma.rn.f32 	%f783, %f779, %f782, %f781;
	mul.f32 	%f784, %f783, 0f3FB8AA3B;
	add.f32 	%f785, %f779, 0f4B40007F;
	mov.b32 	%r279, %f785;
	shl.b32 	%r280, %r279, 23;
	mov.b32 	%f786, %r280;
	ex2.approx.ftz.f32 	%f787, %f784;
	mul.f32 	%f136, %f787, %f786;
	setp.eq.f32 	%p115, %f136, 0f7F800000;
	mov.f32 	%f1125, 0f7F800000;
	@%p115 bra 	$L__BB0_91;

	fma.rn.f32 	%f1125, %f136, %f135, %f136;

$L__BB0_91:
	mov.f32 	%f1074, 0f00000000;
	max.f32 	%f1073, %f1074, %f706;
	mov.f32 	%f1029, 0f3E555555;
	cvt.rzi.f32.f32 	%f1028, %f1029;
	add.f32 	%f1027, %f1028, %f1028;
	mov.f32 	%f1026, 0f3ED55555;
	sub.f32 	%f1025, %f1026, %f1027;
	abs.f32 	%f1024, %f1025;
	setp.lt.f32 	%p116, %f1073, 0f00000000;
	setp.eq.f32 	%p117, %f1024, 0f3F800000;
	and.pred  	%p5, %p116, %p117;
	setp.eq.f32 	%p118, %f1073, 0f00000000;
	@%p118 bra 	$L__BB0_95;
	bra.uni 	$L__BB0_92;

$L__BB0_95:
	mov.f32 	%f1091, 0f00000000;
	max.f32 	%f1090, %f1091, %f706;
	add.f32 	%f792, %f1090, %f1090;
	selp.f32 	%f1127, %f792, 0f00000000, %p117;
	bra.uni 	$L__BB0_96;

$L__BB0_92:
	mov.f32 	%f1076, 0f00000000;
	max.f32 	%f1075, %f1076, %f706;
	mov.b32 	%r281, %f1125;
	xor.b32  	%r282, %r281, -2147483648;
	mov.b32 	%f788, %r282;
	selp.f32 	%f1127, %f788, %f1125, %p5;
	setp.geu.f32 	%p119, %f1075, 0f00000000;
	@%p119 bra 	$L__BB0_96;

	mov.f32 	%f789, 0f3ED55555;
	cvt.rzi.f32.f32 	%f790, %f789;
	setp.eq.f32 	%p120, %f790, 0f3ED55555;
	@%p120 bra 	$L__BB0_96;

	mov.f32 	%f1127, 0f7FFFFFFF;

$L__BB0_96:
	mov.f32 	%f1079, 0f00000000;
	max.f32 	%f1078, %f1079, %f706;
	abs.f32 	%f1077, %f1078;
	add.f32 	%f793, %f1077, 0f3ED55555;
	mov.b32 	%r283, %f793;
	setp.lt.s32 	%p122, %r283, 2139095040;
	@%p122 bra 	$L__BB0_101;

	mov.f32 	%f1084, 0f00000000;
	max.f32 	%f1083, %f1084, %f706;
	abs.f32 	%f1082, %f1083;
	setp.gtu.f32 	%p123, %f1082, 0f7F800000;
	@%p123 bra 	$L__BB0_100;
	bra.uni 	$L__BB0_98;

$L__BB0_100:
	mov.f32 	%f1089, 0f00000000;
	max.f32 	%f1088, %f1089, %f706;
	add.f32 	%f1127, %f1088, 0f3ED55555;
	bra.uni 	$L__BB0_101;

$L__BB0_98:
	mov.f32 	%f1087, 0f00000000;
	max.f32 	%f1086, %f1087, %f706;
	abs.f32 	%f1085, %f1086;
	setp.neu.f32 	%p124, %f1085, 0f7F800000;
	@%p124 bra 	$L__BB0_101;

	selp.f32 	%f1127, 0fFF800000, 0f7F800000, %p5;

$L__BB0_101:
	abs.f32 	%f145, %f131;
	setp.lt.f32 	%p125, %f145, 0f00800000;
	mul.f32 	%f795, %f145, 0f4B800000;
	selp.f32 	%f796, %f795, %f145, %p125;
	selp.f32 	%f797, 0fC3170000, 0fC2FE0000, %p125;
	mov.b32 	%r284, %f796;
	and.b32  	%r285, %r284, 8388607;
	or.b32  	%r286, %r285, 1065353216;
	mov.b32 	%f798, %r286;
	shr.u32 	%r287, %r284, 23;
	cvt.rn.f32.u32 	%f799, %r287;
	add.f32 	%f800, %f797, %f799;
	setp.gt.f32 	%p126, %f798, 0f3FB504F3;
	mul.f32 	%f801, %f798, 0f3F000000;
	add.f32 	%f802, %f800, 0f3F800000;
	selp.f32 	%f803, %f802, %f800, %p126;
	selp.f32 	%f804, %f801, %f798, %p126;
	add.f32 	%f805, %f804, 0fBF800000;
	add.f32 	%f806, %f804, 0f3F800000;
	rcp.approx.ftz.f32 	%f807, %f806;
	add.f32 	%f808, %f805, %f805;
	mul.f32 	%f809, %f808, %f807;
	mul.f32 	%f810, %f809, %f809;
	mov.f32 	%f811, 0f3C4CAF63;
	mov.f32 	%f812, 0f3B18F0FE;
	fma.rn.f32 	%f813, %f812, %f810, %f811;
	mov.f32 	%f814, 0f3DAAAABD;
	fma.rn.f32 	%f815, %f813, %f810, %f814;
	mul.rn.f32 	%f816, %f815, %f810;
	mul.rn.f32 	%f817, %f816, %f809;
	sub.f32 	%f818, %f805, %f809;
	add.f32 	%f819, %f818, %f818;
	neg.f32 	%f820, %f809;
	fma.rn.f32 	%f821, %f820, %f805, %f819;
	mul.rn.f32 	%f822, %f807, %f821;
	add.f32 	%f823, %f817, %f809;
	sub.f32 	%f824, %f809, %f823;
	add.f32 	%f825, %f817, %f824;
	add.f32 	%f826, %f822, %f825;
	add.f32 	%f827, %f823, %f826;
	sub.f32 	%f828, %f823, %f827;
	add.f32 	%f829, %f826, %f828;
	mov.f32 	%f830, 0f3F317200;
	mul.rn.f32 	%f831, %f803, %f830;
	mov.f32 	%f832, 0f35BFBE8E;
	mul.rn.f32 	%f833, %f803, %f832;
	add.f32 	%f834, %f831, %f827;
	sub.f32 	%f835, %f831, %f834;
	add.f32 	%f836, %f827, %f835;
	add.f32 	%f837, %f829, %f836;
	add.f32 	%f838, %f833, %f837;
	add.f32 	%f839, %f834, %f838;
	sub.f32 	%f840, %f834, %f839;
	add.f32 	%f841, %f838, %f840;
	mov.f32 	%f842, 0f3ED55555;
	mul.rn.f32 	%f843, %f842, %f839;
	neg.f32 	%f844, %f843;
	fma.rn.f32 	%f845, %f842, %f839, %f844;
	fma.rn.f32 	%f846, %f842, %f841, %f845;
	mov.f32 	%f847, 0f00000000;
	fma.rn.f32 	%f848, %f847, %f839, %f846;
	add.rn.f32 	%f849, %f843, %f848;
	neg.f32 	%f850, %f849;
	add.rn.f32 	%f851, %f843, %f850;
	add.rn.f32 	%f852, %f851, %f848;
	mov.b32 	%r288, %f849;
	setp.eq.s32 	%p127, %r288, 1118925336;
	add.s32 	%r289, %r288, -1;
	mov.b32 	%f853, %r289;
	add.f32 	%f854, %f852, 0f37000000;
	selp.f32 	%f146, %f854, %f852, %p127;
	selp.f32 	%f855, %f853, %f849, %p127;
	mov.f32 	%f856, 0f3FB8AA3B;
	mul.rn.f32 	%f857, %f855, %f856;
	cvt.rzi.f32.f32 	%f858, %f857;
	abs.f32 	%f859, %f858;
	setp.gt.f32 	%p128, %f859, 0f42FC0000;
	mov.b32 	%r290, %f858;
	and.b32  	%r291, %r290, -2147483648;
	or.b32  	%r292, %r291, 1123811328;
	mov.b32 	%f860, %r292;
	selp.f32 	%f861, %f860, %f858, %p128;
	mov.f32 	%f862, 0fBF317218;
	fma.rn.f32 	%f863, %f861, %f862, %f855;
	mov.f32 	%f864, 0f3102E308;
	fma.rn.f32 	%f865, %f861, %f864, %f863;
	mul.f32 	%f866, %f865, 0f3FB8AA3B;
	add.f32 	%f867, %f861, 0f4B40007F;
	mov.b32 	%r293, %f867;
	shl.b32 	%r294, %r293, 23;
	mov.b32 	%f868, %r294;
	ex2.approx.ftz.f32 	%f869, %f866;
	mul.f32 	%f147, %f869, %f868;
	setp.eq.f32 	%p129, %f147, 0f7F800000;
	mov.f32 	%f1128, 0f7F800000;
	@%p129 bra 	$L__BB0_103;

	fma.rn.f32 	%f1128, %f147, %f146, %f147;

$L__BB0_103:
	setp.lt.f32 	%p130, %f131, 0f00000000;
	and.pred  	%p6, %p130, %p117;
	setp.eq.f32 	%p132, %f131, 0f00000000;
	@%p132 bra 	$L__BB0_107;
	bra.uni 	$L__BB0_104;

$L__BB0_107:
	add.f32 	%f874, %f131, %f131;
	selp.f32 	%f1130, %f874, 0f00000000, %p117;
	bra.uni 	$L__BB0_108;

$L__BB0_104:
	mov.b32 	%r295, %f1128;
	xor.b32  	%r296, %r295, -2147483648;
	mov.b32 	%f870, %r296;
	selp.f32 	%f1130, %f870, %f1128, %p6;
	setp.geu.f32 	%p133, %f131, 0f00000000;
	@%p133 bra 	$L__BB0_108;

	mov.f32 	%f871, 0f3ED55555;
	cvt.rzi.f32.f32 	%f872, %f871;
	setp.eq.f32 	%p134, %f872, 0f3ED55555;
	@%p134 bra 	$L__BB0_108;

	mov.f32 	%f1130, 0f7FFFFFFF;

$L__BB0_108:
	mov.f32 	%f1057, 0f00000000;
	max.f32 	%f1056, %f1057, %f708;
	abs.f32 	%f1055, %f1056;
	add.f32 	%f875, %f1055, 0f3ED55555;
	mov.b32 	%r297, %f875;
	setp.lt.s32 	%p136, %r297, 2139095040;
	@%p136 bra 	$L__BB0_113;

	mov.f32 	%f1060, 0f00000000;
	max.f32 	%f1059, %f1060, %f708;
	abs.f32 	%f1058, %f1059;
	setp.gtu.f32 	%p137, %f1058, 0f7F800000;
	@%p137 bra 	$L__BB0_112;
	bra.uni 	$L__BB0_110;

$L__BB0_112:
	add.f32 	%f1130, %f131, 0f3ED55555;
	bra.uni 	$L__BB0_113;

$L__BB0_110:
	mov.f32 	%f1063, 0f00000000;
	max.f32 	%f1062, %f1063, %f708;
	abs.f32 	%f1061, %f1062;
	setp.neu.f32 	%p138, %f1061, 0f7F800000;
	@%p138 bra 	$L__BB0_113;

	selp.f32 	%f1130, 0fFF800000, 0f7F800000, %p6;

$L__BB0_113:
	abs.f32 	%f156, %f132;
	setp.lt.f32 	%p139, %f156, 0f00800000;
	mul.f32 	%f877, %f156, 0f4B800000;
	selp.f32 	%f878, %f877, %f156, %p139;
	selp.f32 	%f879, 0fC3170000, 0fC2FE0000, %p139;
	mov.b32 	%r298, %f878;
	and.b32  	%r299, %r298, 8388607;
	or.b32  	%r300, %r299, 1065353216;
	mov.b32 	%f880, %r300;
	shr.u32 	%r301, %r298, 23;
	cvt.rn.f32.u32 	%f881, %r301;
	add.f32 	%f882, %f879, %f881;
	setp.gt.f32 	%p140, %f880, 0f3FB504F3;
	mul.f32 	%f883, %f880, 0f3F000000;
	add.f32 	%f884, %f882, 0f3F800000;
	selp.f32 	%f885, %f884, %f882, %p140;
	selp.f32 	%f886, %f883, %f880, %p140;
	add.f32 	%f887, %f886, 0fBF800000;
	add.f32 	%f888, %f886, 0f3F800000;
	rcp.approx.ftz.f32 	%f889, %f888;
	add.f32 	%f890, %f887, %f887;
	mul.f32 	%f891, %f890, %f889;
	mul.f32 	%f892, %f891, %f891;
	mov.f32 	%f893, 0f3C4CAF63;
	mov.f32 	%f894, 0f3B18F0FE;
	fma.rn.f32 	%f895, %f894, %f892, %f893;
	mov.f32 	%f896, 0f3DAAAABD;
	fma.rn.f32 	%f897, %f895, %f892, %f896;
	mul.rn.f32 	%f898, %f897, %f892;
	mul.rn.f32 	%f899, %f898, %f891;
	sub.f32 	%f900, %f887, %f891;
	add.f32 	%f901, %f900, %f900;
	neg.f32 	%f902, %f891;
	fma.rn.f32 	%f903, %f902, %f887, %f901;
	mul.rn.f32 	%f904, %f889, %f903;
	add.f32 	%f905, %f899, %f891;
	sub.f32 	%f906, %f891, %f905;
	add.f32 	%f907, %f899, %f906;
	add.f32 	%f908, %f904, %f907;
	add.f32 	%f909, %f905, %f908;
	sub.f32 	%f910, %f905, %f909;
	add.f32 	%f911, %f908, %f910;
	mov.f32 	%f912, 0f3F317200;
	mul.rn.f32 	%f913, %f885, %f912;
	mov.f32 	%f914, 0f35BFBE8E;
	mul.rn.f32 	%f915, %f885, %f914;
	add.f32 	%f916, %f913, %f909;
	sub.f32 	%f917, %f913, %f916;
	add.f32 	%f918, %f909, %f917;
	add.f32 	%f919, %f911, %f918;
	add.f32 	%f920, %f915, %f919;
	add.f32 	%f921, %f916, %f920;
	sub.f32 	%f922, %f916, %f921;
	add.f32 	%f923, %f920, %f922;
	mov.f32 	%f924, 0f3ED55555;
	mul.rn.f32 	%f925, %f924, %f921;
	neg.f32 	%f926, %f925;
	fma.rn.f32 	%f927, %f924, %f921, %f926;
	fma.rn.f32 	%f928, %f924, %f923, %f927;
	mov.f32 	%f929, 0f00000000;
	fma.rn.f32 	%f930, %f929, %f921, %f928;
	add.rn.f32 	%f931, %f925, %f930;
	neg.f32 	%f932, %f931;
	add.rn.f32 	%f933, %f925, %f932;
	add.rn.f32 	%f934, %f933, %f930;
	mov.b32 	%r302, %f931;
	setp.eq.s32 	%p141, %r302, 1118925336;
	add.s32 	%r303, %r302, -1;
	mov.b32 	%f935, %r303;
	add.f32 	%f936, %f934, 0f37000000;
	selp.f32 	%f157, %f936, %f934, %p141;
	selp.f32 	%f937, %f935, %f931, %p141;
	mov.f32 	%f938, 0f3FB8AA3B;
	mul.rn.f32 	%f939, %f937, %f938;
	cvt.rzi.f32.f32 	%f940, %f939;
	abs.f32 	%f941, %f940;
	setp.gt.f32 	%p142, %f941, 0f42FC0000;
	mov.b32 	%r304, %f940;
	and.b32  	%r305, %r304, -2147483648;
	or.b32  	%r306, %r305, 1123811328;
	mov.b32 	%f942, %r306;
	selp.f32 	%f943, %f942, %f940, %p142;
	mov.f32 	%f944, 0fBF317218;
	fma.rn.f32 	%f945, %f943, %f944, %f937;
	mov.f32 	%f946, 0f3102E308;
	fma.rn.f32 	%f947, %f943, %f946, %f945;
	mul.f32 	%f948, %f947, 0f3FB8AA3B;
	add.f32 	%f949, %f943, 0f4B40007F;
	mov.b32 	%r307, %f949;
	shl.b32 	%r308, %r307, 23;
	mov.b32 	%f950, %r308;
	ex2.approx.ftz.f32 	%f951, %f948;
	mul.f32 	%f158, %f951, %f950;
	setp.eq.f32 	%p143, %f158, 0f7F800000;
	mov.f32 	%f1131, 0f7F800000;
	@%p143 bra 	$L__BB0_115;

	fma.rn.f32 	%f1131, %f158, %f157, %f158;

$L__BB0_115:
	setp.lt.f32 	%p144, %f132, 0f00000000;
	and.pred  	%p7, %p144, %p117;
	setp.eq.f32 	%p146, %f132, 0f00000000;
	@%p146 bra 	$L__BB0_119;
	bra.uni 	$L__BB0_116;

$L__BB0_119:
	add.f32 	%f956, %f132, %f132;
	selp.f32 	%f1133, %f956, 0f00000000, %p117;
	bra.uni 	$L__BB0_120;

$L__BB0_116:
	mov.b32 	%r309, %f1131;
	xor.b32  	%r310, %r309, -2147483648;
	mov.b32 	%f952, %r310;
	selp.f32 	%f1133, %f952, %f1131, %p7;
	setp.geu.f32 	%p147, %f132, 0f00000000;
	@%p147 bra 	$L__BB0_120;

	mov.f32 	%f953, 0f3ED55555;
	cvt.rzi.f32.f32 	%f954, %f953;
	setp.eq.f32 	%p148, %f954, 0f3ED55555;
	@%p148 bra 	$L__BB0_120;

	mov.f32 	%f1133, 0f7FFFFFFF;

$L__BB0_120:
	mov.f32 	%f1066, 0f00000000;
	max.f32 	%f1065, %f1066, %f709;
	abs.f32 	%f1064, %f1065;
	add.f32 	%f957, %f1064, 0f3ED55555;
	mov.b32 	%r311, %f957;
	setp.lt.s32 	%p150, %r311, 2139095040;
	@%p150 bra 	$L__BB0_125;

	mov.f32 	%f1069, 0f00000000;
	max.f32 	%f1068, %f1069, %f709;
	abs.f32 	%f1067, %f1068;
	setp.gtu.f32 	%p151, %f1067, 0f7F800000;
	@%p151 bra 	$L__BB0_124;
	bra.uni 	$L__BB0_122;

$L__BB0_124:
	add.f32 	%f1133, %f132, 0f3ED55555;
	bra.uni 	$L__BB0_125;

$L__BB0_122:
	mov.f32 	%f1072, 0f00000000;
	max.f32 	%f1071, %f1072, %f709;
	abs.f32 	%f1070, %f1071;
	setp.neu.f32 	%p152, %f1070, 0f7F800000;
	@%p152 bra 	$L__BB0_125;

	selp.f32 	%f1133, 0fFF800000, 0f7F800000, %p7;

$L__BB0_125:
	mov.f32 	%f1081, 0f00000000;
	max.f32 	%f1080, %f1081, %f706;
	ld.const.u64 	%rd105, [params+144];
	cvta.to.global.u64 	%rd104, %rd105;
	ld.const.u32 	%r357, [params+136];
	mad.lo.s32 	%r356, %r357, %r4, %r3;
	cvt.u64.u32 	%rd103, %r356;
	fma.rn.f32 	%f958, %f1127, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p153, %f1080, 0f3F800000;
	mov.f32 	%f959, 0f3F800000;
	selp.f32 	%f960, 0f3F7FFFFF, %f958, %p153;
	mul.f32 	%f961, %f1080, 0f414EB852;
	setp.lt.f32 	%p154, %f1080, 0f3B4D2E1C;
	selp.f32 	%f962, %f961, %f960, %p154;
	fma.rn.f32 	%f963, %f1130, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p155, %f131, 0f3F800000;
	selp.f32 	%f964, 0f3F7FFFFF, %f963, %p155;
	mul.f32 	%f965, %f131, 0f414EB852;
	setp.lt.f32 	%p156, %f131, 0f3B4D2E1C;
	selp.f32 	%f966, %f965, %f964, %p156;
	fma.rn.f32 	%f967, %f1133, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p157, %f132, 0f3F800000;
	selp.f32 	%f968, 0f3F7FFFFF, %f967, %p157;
	mul.f32 	%f969, %f132, 0f414EB852;
	setp.lt.f32 	%p158, %f132, 0f3B4D2E1C;
	selp.f32 	%f970, %f969, %f968, %p158;
	min.f32 	%f971, %f962, %f959;
	mov.f32 	%f972, 0f00000000;
	max.f32 	%f973, %f972, %f971;
	mul.f32 	%f974, %f973, 0f43800000;
	cvt.rzi.u32.f32 	%r312, %f974;
	min.u32 	%r313, %r312, 255;
	min.f32 	%f975, %f966, %f959;
	max.f32 	%f976, %f972, %f975;
	mul.f32 	%f977, %f976, 0f43800000;
	cvt.rzi.u32.f32 	%r314, %f977;
	min.u32 	%r315, %r314, 255;
	min.f32 	%f978, %f970, %f959;
	max.f32 	%f979, %f972, %f978;
	mul.f32 	%f980, %f979, 0f43800000;
	cvt.rzi.u32.f32 	%r316, %f980;
	min.u32 	%r317, %r316, 255;
	shl.b64 	%rd64, %rd103, 2;
	add.s64 	%rd65, %rd104, %rd64;
	cvt.u16.u32 	%rs19, %r317;
	cvt.u16.u32 	%rs20, %r315;
	cvt.u16.u32 	%rs21, %r313;
	mov.u16 	%rs22, 255;
	st.global.v4.u8 	[%rd65], {%rs21, %rs20, %rs19, %rs22};

$L__BB0_126:
	ld.const.u32 	%r358, [params+104];
	and.b32  	%r318, %r358, 4;
	setp.eq.s32 	%p159, %r318, 0;
	@%p159 bra 	$L__BB0_130;

	ld.const.u32 	%r319, [params+108];
	setp.eq.s32 	%p160, %r319, 0;
	ld.const.u64 	%rd66, [params+224];
	cvta.to.global.u64 	%rd67, %rd66;
	ld.const.u32 	%r320, [params+216];
	mad.lo.s32 	%r321, %r320, %r4, %r3;
	mul.wide.u32 	%rd68, %r321, 8;
	add.s64 	%rd20, %rd67, %rd68;
	@%p160 bra 	$L__BB0_129;

	ld.global.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd20];
	// begin inline asm
	{  cvt.f32.f16 %f981, %rs30;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f982, %rs31;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f983, %rs32;}

	// end inline asm
	add.f32 	%f984, %f79, %f981;
	add.f32 	%f985, %f80, %f982;
	add.f32 	%f986, %f81, %f983;
	mov.f32 	%f987, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f986;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f985;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs26, %f984;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f987;}

	// end inline asm
	st.global.v4.u16 	[%rd20], {%rs26, %rs27, %rs28, %rs29};
	bra.uni 	$L__BB0_130;

$L__BB0_129:
	mov.f32 	%f991, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs37, %f991;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs36, %f81;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs35, %f80;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs34, %f79;}

	// end inline asm
	st.global.v4.u16 	[%rd20], {%rs34, %rs35, %rs36, %rs37};

$L__BB0_130:
	ld.const.u32 	%r359, [params+104];
	and.b32  	%r322, %r359, 64;
	setp.eq.s32 	%p161, %r322, 0;
	@%p161 bra 	$L__BB0_152;

	ld.const.u64 	%rd69, [params+208];
	cvta.to.global.u64 	%rd70, %rd69;
	ld.const.u32 	%r323, [params+200];
	mad.lo.s32 	%r324, %r323, %r4, %r3;
	mul.f32 	%f992, %f184, 0f3F000000;
	mov.f32 	%f993, 0f3F000000;
	sub.f32 	%f994, %f993, %f992;
	mul.f32 	%f995, %f994, 0f437F0000;
	cvt.rzi.u32.f32 	%r325, %f995;
	mul.f32 	%f996, %f185, 0f3F000000;
	sub.f32 	%f997, %f993, %f996;
	mul.f32 	%f998, %f997, 0f437F0000;
	cvt.rzi.u32.f32 	%r326, %f998;
	mul.f32 	%f999, %f186, 0f3F000000;
	sub.f32 	%f1000, %f993, %f999;
	mul.f32 	%f1001, %f1000, 0f437F0000;
	cvt.rzi.u32.f32 	%r327, %f1001;
	mul.wide.u32 	%rd71, %r324, 4;
	add.s64 	%rd72, %rd70, %rd71;
	cvt.u16.u32 	%rs38, %r327;
	cvt.u16.u32 	%rs39, %r326;
	cvt.u16.u32 	%rs40, %r325;
	mov.u16 	%rs41, 255;
	st.global.v4.u8 	[%rd72], {%rs40, %rs39, %rs38, %rs41};
	bra.uni 	$L__BB0_152;

$L__BB0_139:
	mov.f32 	%f1012, 0f00000000;
	mov.f32 	%f1013, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs60, %f1013;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs59, %f1012;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs58, %f1012;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs57, %f1012;}

	// end inline asm
	st.global.v4.u16 	[%rd21], {%rs57, %rs58, %rs59, %rs60};

$L__BB0_140:
	and.b32  	%r339, %r6, 64;
	setp.eq.s32 	%p169, %r339, 0;
	@%p169 bra 	$L__BB0_152;

	ld.const.u64 	%rd84, [params+208];
	cvta.to.global.u64 	%rd85, %rd84;
	ld.const.u32 	%r340, [params+200];
	mad.lo.s32 	%r341, %r340, %r4, %r3;
	mul.wide.u32 	%rd86, %r341, 4;
	add.s64 	%rd87, %rd85, %rd86;
	mov.u16 	%rs61, 0;
	mov.u16 	%rs62, 255;
	st.global.v4.u8 	[%rd87], {%rs61, %rs61, %rs61, %rs62};

$L__BB0_152:
	ret;

}