//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry __raygen__oxMain()
{
	.local .align 4 .b8 	__local_depot0[28];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<155>;
	.reg .b16 	%rs<55>;
	.reg .f32 	%f<1030>;
	.reg .b32 	%r<342>;
	.reg .f64 	%fd<5>;
	.reg .b64 	%rd<102>;


	mov.u64 	%SPL, __local_depot0;
	add.u64 	%rd1, %SPL, 0;
	// begin inline asm
	call (%r51), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r52), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u32 	%r3, [params+540];
	ld.const.u64 	%rd19, [params+400];
	cvta.to.global.u64 	%rd20, %rd19;
	ld.const.u32 	%r57, [params+392];
	mad.lo.s32 	%r58, %r57, %r52, %r51;
	mul.wide.u32 	%rd21, %r58, 4;
	add.s64 	%rd2, %rd20, %rd21;
	ld.global.v2.u8 	{%rs7, %rs54}, [%rd2];
	or.b16  	%rs9, %rs7, %rs54;
	and.b16  	%rs10, %rs9, 255;
	setp.eq.s16 	%p7, %rs10, 0;
	@%p7 bra 	$L__BB0_2;

	ld.global.u8 	%rs53, [%rd2+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs53, [%rd2+2];
	setp.eq.s16 	%p8, %rs53, 0;
	mov.f32 	%f979, 0f00000000;
	mov.u16 	%rs54, 0;
	mov.f32 	%f980, %f979;
	mov.f32 	%f981, %f979;
	@%p8 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f181, %rs7;
	div.rn.f32 	%f182, %f181, 0f437F0000;
	fma.rn.f32 	%f183, %f182, 0f40000000, 0fBF800000;
	and.b16  	%rs13, %rs54, 255;
	cvt.rn.f32.u16 	%f184, %rs13;
	div.rn.f32 	%f185, %f184, 0f437F0000;
	fma.rn.f32 	%f186, %f185, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f187, %rs53;
	div.rn.f32 	%f188, %f187, 0f437F0000;
	fma.rn.f32 	%f189, %f188, 0f40000000, 0fBF800000;
	mul.f32 	%f190, %f186, %f186;
	fma.rn.f32 	%f191, %f183, %f183, %f190;
	fma.rn.f32 	%f192, %f189, %f189, %f191;
	sqrt.rn.f32 	%f193, %f192;
	rcp.rn.f32 	%f194, %f193;
	mul.f32 	%f981, %f194, %f189;
	mul.f32 	%f980, %f194, %f186;
	mul.f32 	%f979, %f183, %f194;

$L__BB0_4:
	ld.const.v2.u32 	{%r59, %r60}, [params];
	add.s32 	%r4, %r59, %r51;
	add.s32 	%r5, %r60, %r52;
	setp.eq.f32 	%p9, %f979, 0f00000000;
	setp.eq.f32 	%p10, %f980, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	setp.eq.f32 	%p12, %f981, 0f00000000;
	and.pred  	%p13, %p12, %p11;
	@%p13 bra 	$L__BB0_123;
	bra.uni 	$L__BB0_5;

$L__BB0_123:
	ld.const.u32 	%r50, [params+104];
	and.b32  	%r314, %r50, 1;
	setp.eq.b32 	%p148, %r314, 1;
	mov.pred 	%p149, 0;
	xor.pred  	%p150, %p148, %p149;
	not.pred 	%p151, %p150;
	@%p151 bra 	$L__BB0_125;

	ld.const.u64 	%rd78, [params+144];
	cvta.to.global.u64 	%rd79, %rd78;
	ld.const.u32 	%r315, [params+136];
	mad.lo.s32 	%r316, %r315, %r5, %r4;
	mul.wide.u32 	%rd80, %r316, 4;
	add.s64 	%rd81, %rd79, %rd80;
	mov.u16 	%rs43, 0;
	st.global.v4.u8 	[%rd81], {%rs43, %rs43, %rs43, %rs43};

$L__BB0_125:
	and.b32  	%r317, %r50, 4;
	setp.eq.s32 	%p152, %r317, 0;
	@%p152 bra 	$L__BB0_127;

	ld.const.u64 	%rd82, [params+224];
	cvta.to.global.u64 	%rd83, %rd82;
	ld.const.u32 	%r318, [params+216];
	mad.lo.s32 	%r319, %r318, %r5, %r4;
	mov.f32 	%f947, 0f00000000;
	mul.wide.u32 	%rd84, %r319, 8;
	add.s64 	%rd85, %rd83, %rd84;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs46, %f947;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs45, %f947;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f947;}

	// end inline asm
	mov.u16 	%rs47, 0;
	st.global.v4.u16 	[%rd85], {%rs44, %rs45, %rs46, %rs47};

$L__BB0_127:
	and.b32  	%r320, %r50, 16;
	setp.eq.s32 	%p153, %r320, 0;
	@%p153 bra 	$L__BB0_129;

	ld.const.u64 	%rd86, [params+240];
	cvta.to.global.u64 	%rd87, %rd86;
	ld.const.u32 	%r321, [params+232];
	mad.lo.s32 	%r322, %r321, %r5, %r4;
	mov.f32 	%f950, 0f00000000;
	mul.wide.u32 	%rd88, %r322, 8;
	add.s64 	%rd89, %rd87, %rd88;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f950;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs49, %f950;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs48, %f950;}

	// end inline asm
	mov.u16 	%rs51, 0;
	st.global.v4.u16 	[%rd89], {%rs48, %rs49, %rs50, %rs51};

$L__BB0_129:
	and.b32  	%r323, %r50, 64;
	setp.eq.s32 	%p154, %r323, 0;
	@%p154 bra 	$L__BB0_131;

	ld.const.u64 	%rd90, [params+208];
	cvta.to.global.u64 	%rd91, %rd90;
	ld.const.u32 	%r324, [params+200];
	mad.lo.s32 	%r325, %r324, %r5, %r4;
	mul.wide.u32 	%rd92, %r325, 4;
	add.s64 	%rd93, %rd91, %rd92;
	mov.u16 	%rs52, 0;
	st.global.v4.u8 	[%rd93], {%rs52, %rs52, %rs52, %rs52};
	bra.uni 	$L__BB0_131;

$L__BB0_5:
	ld.const.u64 	%rd22, [params+496];
	cvta.to.global.u64 	%rd23, %rd22;
	ld.const.u32 	%r63, [params+488];
	mad.lo.s32 	%r64, %r63, %r52, %r51;
	mul.wide.u32 	%rd24, %r64, 8;
	add.s64 	%rd25, %rd23, %rd24;
	ld.global.v4.u16 	{%rs19, %rs20, %rs21, %rs22}, [%rd25];
	// begin inline asm
	{  cvt.f32.f16 %f195, %rs19;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f196, %rs20;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f197, %rs21;}

	// end inline asm
	ld.const.u64 	%rd26, [params+432];
	cvta.to.global.u64 	%rd27, %rd26;
	ld.const.u32 	%r65, [params+424];
	mad.lo.s32 	%r66, %r65, %r52, %r51;
	mul.wide.u32 	%rd28, %r66, 12;
	add.s64 	%rd29, %rd27, %rd28;
	ld.global.f32 	%f205, [%rd29];
	mul.f32 	%f206, %f205, 0f3456BF95;
	ld.global.f32 	%f207, [%rd29+4];
	mul.f32 	%f208, %f207, 0f3456BF95;
	ld.global.f32 	%f209, [%rd29+8];
	mul.f32 	%f210, %f209, 0f3456BF95;
	abs.f32 	%f211, %f979;
	div.rn.f32 	%f212, %f206, %f211;
	abs.f32 	%f213, %f980;
	div.rn.f32 	%f214, %f208, %f213;
	abs.f32 	%f215, %f981;
	div.rn.f32 	%f216, %f210, %f215;
	abs.f32 	%f217, %f212;
	abs.f32 	%f218, %f214;
	abs.f32 	%f219, %f216;
	mov.f32 	%f220, 0f38D1B717;
	max.f32 	%f221, %f217, %f220;
	max.f32 	%f222, %f218, %f220;
	max.f32 	%f223, %f219, %f220;
	fma.rn.f32 	%f13, %f979, %f221, %f205;
	fma.rn.f32 	%f14, %f980, %f222, %f207;
	fma.rn.f32 	%f15, %f981, %f223, %f209;
	setp.gt.f32 	%p14, %f211, %f215;
	neg.f32 	%f224, %f980;
	selp.f32 	%f225, %f224, 0f00000000, %p14;
	mov.f32 	%f993, 0f00000000;
	neg.f32 	%f226, %f981;
	selp.f32 	%f227, %f979, %f226, %p14;
	selp.f32 	%f228, 0f00000000, %f980, %p14;
	mul.f32 	%f229, %f227, %f227;
	fma.rn.f32 	%f230, %f225, %f225, %f229;
	fma.rn.f32 	%f231, %f228, %f228, %f230;
	sqrt.rn.f32 	%f232, %f231;
	rcp.rn.f32 	%f233, %f232;
	mul.f32 	%f16, %f225, %f233;
	mul.f32 	%f17, %f227, %f233;
	mul.f32 	%f18, %f228, %f233;
	ld.const.u64 	%rd30, [params+128];
	cvta.to.global.u64 	%rd31, %rd30;
	ld.const.u32 	%r67, [params+120];
	mad.lo.s32 	%r68, %r67, %r52, %r51;
	mul.wide.u32 	%rd32, %r68, 4;
	add.s64 	%rd3, %rd31, %rd32;
	setp.lt.s32 	%p15, %r3, 1;
	mov.f32 	%f992, %f993;
	mov.f32 	%f991, %f993;
	mov.f32 	%f990, %f993;
	mov.f32 	%f989, %f993;
	mov.f32 	%f988, %f993;
	@%p15 bra 	$L__BB0_34;

	cvt.rn.f32.s32 	%f240, %r3;
	rcp.rn.f32 	%f19, %f240;
	ld.global.u32 	%r334, [%rd3];
	mul.f32 	%f20, %f13, 0f3456BF95;
	mul.f32 	%f21, %f14, 0f3456BF95;
	mul.f32 	%f22, %f15, 0f3456BF95;
	ld.const.u64 	%rd4, [params+96];
	mul.f32 	%f241, %f979, %f17;
	mul.f32 	%f242, %f980, %f16;
	sub.f32 	%f23, %f242, %f241;
	mul.f32 	%f243, %f981, %f16;
	mul.f32 	%f244, %f979, %f18;
	sub.f32 	%f24, %f244, %f243;
	mul.f32 	%f245, %f980, %f18;
	mul.f32 	%f246, %f981, %f17;
	sub.f32 	%f25, %f246, %f245;
	mov.u32 	%r69, 0;
	add.s64 	%rd5, %rd1, 24;
	mov.u64 	%rd33, __cudart_i2opi_f;
	abs.f32 	%f309, %f21;
	abs.f32 	%f310, %f20;
	max.f32 	%f311, %f310, %f309;
	abs.f32 	%f312, %f22;
	max.f32 	%f313, %f311, %f312;
	mov.u32 	%r331, %r69;

$L__BB0_7:
	mov.u32 	%r333, %r69;

$L__BB0_8:
	cvt.rn.f32.s32 	%f963, %r331;
	mad.lo.s32 	%r71, %r334, 1664525, 1013904223;
	and.b32  	%r72, %r71, 16777215;
	cvt.rn.f32.u32 	%f247, %r72;
	fma.rn.f32 	%f248, %f247, 0f33800000, %f963;
	mul.f32 	%f39, %f19, %f248;
	mad.lo.s32 	%r334, %r71, 1664525, 1013904223;
	and.b32  	%r73, %r334, 16777215;
	cvt.rn.f32.u32 	%f249, %r73;
	cvt.rn.f32.s32 	%f250, %r333;
	fma.rn.f32 	%f251, %f249, 0f33800000, %f250;
	mul.f32 	%f252, %f19, %f251;
	mul.f32 	%f253, %f39, %f39;
	mov.f32 	%f254, 0f3F800000;
	sub.f32 	%f255, %f254, %f253;
	mov.f32 	%f256, 0f00000000;
	max.f32 	%f257, %f256, %f255;
	sqrt.rn.f32 	%f40, %f257;
	mul.f32 	%f41, %f252, 0f40C90FDB;
	mul.f32 	%f258, %f41, 0f3F22F983;
	cvt.rni.s32.f32 	%r341, %f258;
	cvt.rn.f32.s32 	%f259, %r341;
	mov.f32 	%f260, 0fBFC90FDA;
	fma.rn.f32 	%f261, %f259, %f260, %f41;
	mov.f32 	%f262, 0fB3A22168;
	fma.rn.f32 	%f263, %f259, %f262, %f261;
	mov.f32 	%f264, 0fA7C234C5;
	fma.rn.f32 	%f997, %f259, %f264, %f263;
	abs.f32 	%f43, %f41;
	setp.ltu.f32 	%p16, %f43, 0f47CE4780;
	mov.u32 	%r338, %r341;
	mov.f32 	%f994, %f997;
	@%p16 bra 	$L__BB0_16;

	setp.eq.f32 	%p17, %f43, 0f7F800000;
	@%p17 bra 	$L__BB0_15;
	bra.uni 	$L__BB0_10;

$L__BB0_15:
	mov.f32 	%f267, 0f00000000;
	mul.rn.f32 	%f994, %f41, %f267;
	mov.u32 	%r338, 0;
	bra.uni 	$L__BB0_16;

$L__BB0_10:
	mov.b32 	%r13, %f41;
	bfe.u32 	%r75, %r13, 23, 8;
	add.s32 	%r14, %r75, -128;
	shl.b32 	%r76, %r13, 8;
	or.b32  	%r15, %r76, -2147483648;
	shr.u32 	%r16, %r14, 5;
	mov.u64 	%rd99, 0;
	mov.u32 	%r335, 0;
	mov.u64 	%rd97, %rd1;
	mov.u64 	%rd98, %rd33;

$L__BB0_11:
	.pragma "nounroll";
	ld.global.nc.u32 	%r77, [%rd98];
	mad.wide.u32 	%rd35, %r77, %r15, %rd99;
	shr.u64 	%rd99, %rd35, 32;
	st.local.u32 	[%rd97], %rd35;
	add.s64 	%rd98, %rd98, 4;
	add.s64 	%rd97, %rd97, 4;
	add.s32 	%r335, %r335, 1;
	setp.ne.s32 	%p18, %r335, 6;
	@%p18 bra 	$L__BB0_11;

	st.local.u32 	[%rd5], %rd99;
	mov.u32 	%r78, 4;
	sub.s32 	%r19, %r78, %r16;
	mov.u32 	%r79, 6;
	sub.s32 	%r80, %r79, %r16;
	mul.wide.s32 	%rd36, %r80, 4;
	add.s64 	%rd37, %rd1, %rd36;
	ld.local.u32 	%r336, [%rd37];
	ld.local.u32 	%r337, [%rd37+-4];
	and.b32  	%r22, %r14, 31;
	setp.eq.s32 	%p19, %r22, 0;
	@%p19 bra 	$L__BB0_14;

	mov.u32 	%r81, 32;
	sub.s32 	%r82, %r81, %r22;
	shr.u32 	%r83, %r337, %r82;
	shl.b32 	%r84, %r336, %r22;
	add.s32 	%r336, %r83, %r84;
	mul.wide.s32 	%rd38, %r19, 4;
	add.s64 	%rd39, %rd1, %rd38;
	ld.local.u32 	%r85, [%rd39];
	shr.u32 	%r86, %r85, %r82;
	shl.b32 	%r87, %r337, %r22;
	add.s32 	%r337, %r86, %r87;

$L__BB0_14:
	and.b32  	%r88, %r13, -2147483648;
	shr.u32 	%r89, %r337, 30;
	shl.b32 	%r90, %r336, 2;
	or.b32  	%r91, %r89, %r90;
	shr.u32 	%r92, %r91, 31;
	shr.u32 	%r93, %r336, 30;
	add.s32 	%r94, %r92, %r93;
	neg.s32 	%r95, %r94;
	setp.eq.s32 	%p20, %r88, 0;
	selp.b32 	%r338, %r94, %r95, %p20;
	setp.ne.s32 	%p21, %r92, 0;
	xor.b32  	%r96, %r88, -2147483648;
	selp.b32 	%r97, %r96, %r88, %p21;
	selp.b32 	%r98, -1, 0, %p21;
	xor.b32  	%r99, %r91, %r98;
	shl.b32 	%r100, %r337, 2;
	xor.b32  	%r101, %r100, %r98;
	cvt.u64.u32 	%rd40, %r99;
	cvt.u64.u32 	%rd41, %r101;
	bfi.b64 	%rd42, %rd40, %rd41, 32, 32;
	cvt.rn.f64.s64 	%fd1, %rd42;
	mul.f64 	%fd2, %fd1, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f265, %fd2;
	setp.eq.s32 	%p22, %r97, 0;
	neg.f32 	%f266, %f265;
	selp.f32 	%f994, %f265, %f266, %p22;

$L__BB0_16:
	add.s32 	%r29, %r338, 1;
	and.b32  	%r30, %r29, 1;
	setp.eq.s32 	%p23, %r30, 0;
	selp.f32 	%f47, %f994, 0f3F800000, %p23;
	mul.rn.f32 	%f48, %f994, %f994;
	mov.f32 	%f995, 0fB94D4153;
	@%p23 bra 	$L__BB0_18;

	mov.f32 	%f269, 0fBAB607ED;
	mov.f32 	%f270, 0f37CBAC00;
	fma.rn.f32 	%f995, %f270, %f48, %f269;

$L__BB0_18:
	selp.f32 	%f271, 0f3C0885E4, 0f3D2AAABB, %p23;
	fma.rn.f32 	%f272, %f995, %f48, %f271;
	selp.f32 	%f273, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
	fma.rn.f32 	%f274, %f272, %f48, %f273;
	mov.f32 	%f275, 0f00000000;
	fma.rn.f32 	%f276, %f48, %f47, %f275;
	fma.rn.f32 	%f996, %f274, %f276, %f47;
	and.b32  	%r103, %r29, 2;
	setp.eq.s32 	%p25, %r103, 0;
	@%p25 bra 	$L__BB0_20;

	mov.f32 	%f278, 0fBF800000;
	fma.rn.f32 	%f996, %f996, %f278, %f275;

$L__BB0_20:
	@%p16 bra 	$L__BB0_28;

	setp.eq.f32 	%p27, %f43, 0f7F800000;
	@%p27 bra 	$L__BB0_27;
	bra.uni 	$L__BB0_22;

$L__BB0_27:
	mov.f32 	%f281, 0f00000000;
	mul.rn.f32 	%f997, %f41, %f281;
	mov.u32 	%r341, 0;
	bra.uni 	$L__BB0_28;

$L__BB0_22:
	mov.b32 	%r31, %f41;
	bfe.u32 	%r104, %r31, 23, 8;
	add.s32 	%r32, %r104, -128;
	shl.b32 	%r105, %r31, 8;
	or.b32  	%r33, %r105, -2147483648;
	shr.u32 	%r34, %r32, 5;
	mov.u64 	%rd100, 0;
	mov.u64 	%rd101, %rd100;

$L__BB0_23:
	.pragma "nounroll";
	shl.b64 	%rd45, %rd100, 2;
	mov.u64 	%rd46, __cudart_i2opi_f;
	add.s64 	%rd47, %rd46, %rd45;
	ld.global.nc.u32 	%r106, [%rd47];
	mad.wide.u32 	%rd48, %r106, %r33, %rd101;
	shr.u64 	%rd101, %rd48, 32;
	add.s64 	%rd49, %rd1, %rd45;
	st.local.u32 	[%rd49], %rd48;
	cvt.u32.u64 	%r107, %rd100;
	add.s32 	%r108, %r107, 1;
	cvt.s64.s32 	%rd100, %r108;
	setp.ne.s32 	%p28, %r108, 6;
	@%p28 bra 	$L__BB0_23;

	st.local.u32 	[%rd5], %rd101;
	mov.u32 	%r109, 4;
	sub.s32 	%r35, %r109, %r34;
	mov.u32 	%r110, 6;
	sub.s32 	%r111, %r110, %r34;
	mul.wide.s32 	%rd50, %r111, 4;
	add.s64 	%rd51, %rd1, %rd50;
	ld.local.u32 	%r339, [%rd51];
	ld.local.u32 	%r340, [%rd51+-4];
	and.b32  	%r38, %r32, 31;
	setp.eq.s32 	%p29, %r38, 0;
	@%p29 bra 	$L__BB0_26;

	mov.u32 	%r112, 32;
	sub.s32 	%r113, %r112, %r38;
	shr.u32 	%r114, %r340, %r113;
	shl.b32 	%r115, %r339, %r38;
	add.s32 	%r339, %r114, %r115;
	mul.wide.s32 	%rd52, %r35, 4;
	add.s64 	%rd53, %rd1, %rd52;
	ld.local.u32 	%r116, [%rd53];
	shr.u32 	%r117, %r116, %r113;
	shl.b32 	%r118, %r340, %r38;
	add.s32 	%r340, %r117, %r118;

$L__BB0_26:
	and.b32  	%r119, %r31, -2147483648;
	shr.u32 	%r120, %r340, 30;
	shl.b32 	%r121, %r339, 2;
	or.b32  	%r122, %r120, %r121;
	shr.u32 	%r123, %r122, 31;
	shr.u32 	%r124, %r339, 30;
	add.s32 	%r125, %r123, %r124;
	neg.s32 	%r126, %r125;
	setp.eq.s32 	%p30, %r119, 0;
	selp.b32 	%r341, %r125, %r126, %p30;
	setp.ne.s32 	%p31, %r123, 0;
	xor.b32  	%r127, %r119, -2147483648;
	selp.b32 	%r128, %r127, %r119, %p31;
	selp.b32 	%r129, -1, 0, %p31;
	xor.b32  	%r130, %r122, %r129;
	shl.b32 	%r131, %r340, 2;
	xor.b32  	%r132, %r131, %r129;
	cvt.u64.u32 	%rd54, %r130;
	cvt.u64.u32 	%rd55, %r132;
	bfi.b64 	%rd56, %rd54, %rd55, 32, 32;
	cvt.rn.f64.s64 	%fd3, %rd56;
	mul.f64 	%fd4, %fd3, 0d3BF921FB54442D19;
	cvt.rn.f32.f64 	%f279, %fd4;
	setp.eq.s32 	%p32, %r128, 0;
	neg.f32 	%f280, %f279;
	selp.f32 	%f997, %f279, %f280, %p32;

$L__BB0_28:
	mul.f32 	%f57, %f40, %f996;
	and.b32  	%r45, %r341, 1;
	setp.eq.s32 	%p33, %r45, 0;
	selp.f32 	%f58, %f997, 0f3F800000, %p33;
	mul.rn.f32 	%f59, %f997, %f997;
	mov.f32 	%f998, 0fB94D4153;
	@%p33 bra 	$L__BB0_30;

	mov.f32 	%f283, 0fBAB607ED;
	mov.f32 	%f284, 0f37CBAC00;
	fma.rn.f32 	%f998, %f284, %f59, %f283;

$L__BB0_30:
	selp.f32 	%f285, 0f3C0885E4, 0f3D2AAABB, %p33;
	fma.rn.f32 	%f286, %f998, %f59, %f285;
	selp.f32 	%f287, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
	fma.rn.f32 	%f288, %f286, %f59, %f287;
	mov.f32 	%f289, 0f00000000;
	fma.rn.f32 	%f290, %f59, %f58, %f289;
	fma.rn.f32 	%f999, %f288, %f290, %f58;
	and.b32  	%r134, %r341, 2;
	setp.eq.s32 	%p35, %r134, 0;
	@%p35 bra 	$L__BB0_32;

	mov.f32 	%f292, 0fBF800000;
	fma.rn.f32 	%f999, %f999, %f292, %f289;

$L__BB0_32:
	mul.f32 	%f302, %f40, %f999;
	mul.f32 	%f303, %f16, %f302;
	mul.f32 	%f304, %f17, %f302;
	mul.f32 	%f305, %f18, %f302;
	fma.rn.f32 	%f306, %f25, %f57, %f303;
	fma.rn.f32 	%f307, %f24, %f57, %f304;
	fma.rn.f32 	%f308, %f23, %f57, %f305;
	fma.rn.f32 	%f296, %f979, %f39, %f306;
	fma.rn.f32 	%f297, %f980, %f39, %f307;
	fma.rn.f32 	%f298, %f981, %f39, %f308;
	mov.f32 	%f314, 0f38D1B717;
	max.f32 	%f299, %f313, %f314;
	mov.f32 	%f300, 0f6C4ECB8F;
	mov.u32 	%r168, 1;
	mov.u32 	%r171, 2;
	mov.u32 	%r173, 4;
	mov.u32 	%r176, 1065353216;
	mov.u32 	%r177, 2139095039;
	mov.u32 	%r205, 0;
	// begin inline asm
	call(%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166),_optix_trace_typed_32,(%r205,%rd4,%f13,%f14,%f15,%f296,%f297,%f298,%f299,%f300,%f289,%r168,%r205,%r205,%r171,%r205,%r173,%r176,%r176,%r176,%r177,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205);
	// end inline asm
	mov.b32 	%f315, %r135;
	mov.b32 	%f316, %r136;
	mov.b32 	%f317, %r137;
	mov.b32 	%f318, %r138;
	setp.ltu.f32 	%p36, %f318, 0f00000000;
	selp.f32 	%f319, %f315, 0f00000000, %p36;
	selp.f32 	%f320, %f316, 0f00000000, %p36;
	selp.f32 	%f321, %f317, 0f00000000, %p36;
	mul.f32 	%f322, %f320, 0f3F372474;
	fma.rn.f32 	%f323, %f319, 0f3E59999A, %f322;
	fma.rn.f32 	%f324, %f321, 0f3D93A92A, %f323;
	fma.rn.f32 	%f993, %f296, %f324, %f993;
	fma.rn.f32 	%f992, %f297, %f324, %f992;
	fma.rn.f32 	%f991, %f298, %f324, %f991;
	mul.f32 	%f325, %f980, %f297;
	fma.rn.f32 	%f326, %f979, %f296, %f325;
	fma.rn.f32 	%f327, %f981, %f298, %f326;
	cvt.sat.f32.f32 	%f328, %f327;
	fma.rn.f32 	%f990, %f328, %f319, %f990;
	fma.rn.f32 	%f989, %f328, %f320, %f989;
	fma.rn.f32 	%f988, %f328, %f321, %f988;
	add.s32 	%r333, %r333, 1;
	setp.lt.s32 	%p37, %r333, %r3;
	@%p37 bra 	$L__BB0_8;

	add.s32 	%r331, %r331, 1;
	setp.lt.s32 	%p38, %r331, %r3;
	@%p38 bra 	$L__BB0_7;

$L__BB0_34:
	mov.f32 	%f1006, 0f00000000;
	mul.lo.s32 	%r206, %r3, %r3;
	cvt.rn.f32.s32 	%f332, %r206;
	rcp.rn.f32 	%f333, %f332;
	mul.f32 	%f334, %f333, %f990;
	mul.f32 	%f335, %f333, %f989;
	mul.f32 	%f336, %f333, %f988;
	fma.rn.f32 	%f337, %f333, %f990, %f334;
	fma.rn.f32 	%f338, %f333, %f989, %f335;
	fma.rn.f32 	%f339, %f333, %f988, %f336;
	ld.const.u64 	%rd58, [params+504];
	cvt.rn.f32.u32 	%f340, %r5;
	cvt.rn.f32.u32 	%f341, %r4;
	tex.2d.v4.f32.f32 	{%f342, %f343, %f344, %f345}, [%rd58, {%f341, %f340}];
	mul.f32 	%f77, %f337, %f342;
	mul.f32 	%f78, %f338, %f343;
	mul.f32 	%f79, %f339, %f344;
	add.f32 	%f80, %f195, %f77;
	add.f32 	%f81, %f196, %f78;
	add.f32 	%f82, %f197, %f79;
	abs.f32 	%f346, %f80;
	setp.gtu.f32 	%p39, %f346, 0f7F800000;
	mov.f32 	%f1007, %f1006;
	mov.f32 	%f1008, %f1006;
	@%p39 bra 	$L__BB0_38;

	mov.f32 	%f1006, 0f00000000;
	abs.f32 	%f350, %f81;
	setp.gtu.f32 	%p40, %f350, 0f7F800000;
	@%p40 bra 	$L__BB0_38;

	mov.f32 	%f1006, 0f00000000;
	abs.f32 	%f354, %f82;
	setp.gtu.f32 	%p41, %f354, 0f7F800000;
	mov.f32 	%f1007, %f1006;
	mov.f32 	%f1008, %f1006;
	@%p41 bra 	$L__BB0_38;

	mov.f32 	%f1006, %f80;
	mov.f32 	%f1007, %f81;
	mov.f32 	%f1008, %f82;

$L__BB0_38:
	ld.const.u32 	%r48, [params+104];
	and.b32  	%r207, %r48, 1;
	setp.eq.b32 	%p42, %r207, 1;
	mov.pred 	%p43, 0;
	xor.pred  	%p44, %p42, %p43;
	not.pred 	%p45, %p44;
	@%p45 bra 	$L__BB0_112;

	mov.f32 	%f359, 0f3EE66666;
	abs.f32 	%f93, %f1006;
	setp.lt.f32 	%p46, %f93, 0f00800000;
	mul.f32 	%f361, %f93, 0f4B800000;
	selp.f32 	%f362, %f361, %f93, %p46;
	selp.f32 	%f363, 0fC3170000, 0fC2FE0000, %p46;
	mov.b32 	%r208, %f362;
	and.b32  	%r209, %r208, 8388607;
	or.b32  	%r210, %r209, 1065353216;
	mov.b32 	%f364, %r210;
	shr.u32 	%r211, %r208, 23;
	cvt.rn.f32.u32 	%f365, %r211;
	add.f32 	%f366, %f363, %f365;
	setp.gt.f32 	%p47, %f364, 0f3FB504F3;
	mul.f32 	%f367, %f364, 0f3F000000;
	add.f32 	%f368, %f366, 0f3F800000;
	selp.f32 	%f369, %f368, %f366, %p47;
	selp.f32 	%f370, %f367, %f364, %p47;
	add.f32 	%f371, %f370, 0fBF800000;
	add.f32 	%f372, %f370, 0f3F800000;
	rcp.approx.ftz.f32 	%f373, %f372;
	add.f32 	%f374, %f371, %f371;
	mul.f32 	%f375, %f374, %f373;
	mul.f32 	%f376, %f375, %f375;
	mov.f32 	%f377, 0f3C4CAF63;
	mov.f32 	%f378, 0f3B18F0FE;
	fma.rn.f32 	%f379, %f378, %f376, %f377;
	mov.f32 	%f380, 0f3DAAAABD;
	fma.rn.f32 	%f381, %f379, %f376, %f380;
	mul.rn.f32 	%f382, %f381, %f376;
	mul.rn.f32 	%f383, %f382, %f375;
	sub.f32 	%f384, %f371, %f375;
	add.f32 	%f385, %f384, %f384;
	neg.f32 	%f386, %f375;
	fma.rn.f32 	%f387, %f386, %f371, %f385;
	mul.rn.f32 	%f388, %f373, %f387;
	add.f32 	%f389, %f383, %f375;
	sub.f32 	%f390, %f375, %f389;
	add.f32 	%f391, %f383, %f390;
	add.f32 	%f392, %f388, %f391;
	add.f32 	%f393, %f389, %f392;
	sub.f32 	%f394, %f389, %f393;
	add.f32 	%f395, %f392, %f394;
	mov.f32 	%f396, 0f3F317200;
	mul.rn.f32 	%f397, %f369, %f396;
	mov.f32 	%f398, 0f35BFBE8E;
	mul.rn.f32 	%f399, %f369, %f398;
	add.f32 	%f400, %f397, %f393;
	sub.f32 	%f401, %f397, %f400;
	add.f32 	%f402, %f393, %f401;
	add.f32 	%f403, %f395, %f402;
	add.f32 	%f404, %f399, %f403;
	add.f32 	%f405, %f400, %f404;
	sub.f32 	%f406, %f400, %f405;
	add.f32 	%f407, %f404, %f406;
	mul.rn.f32 	%f408, %f359, %f405;
	neg.f32 	%f409, %f408;
	fma.rn.f32 	%f410, %f359, %f405, %f409;
	fma.rn.f32 	%f411, %f359, %f407, %f410;
	mov.f32 	%f412, 0f00000000;
	fma.rn.f32 	%f413, %f412, %f405, %f411;
	add.rn.f32 	%f414, %f408, %f413;
	neg.f32 	%f415, %f414;
	add.rn.f32 	%f416, %f408, %f415;
	add.rn.f32 	%f417, %f416, %f413;
	mov.b32 	%r212, %f414;
	setp.eq.s32 	%p48, %r212, 1118925336;
	add.s32 	%r213, %r212, -1;
	mov.b32 	%f418, %r213;
	add.f32 	%f419, %f417, 0f37000000;
	selp.f32 	%f94, %f419, %f417, %p48;
	selp.f32 	%f420, %f418, %f414, %p48;
	mov.f32 	%f421, 0f3FB8AA3B;
	mul.rn.f32 	%f422, %f420, %f421;
	cvt.rzi.f32.f32 	%f423, %f422;
	abs.f32 	%f424, %f423;
	setp.gt.f32 	%p49, %f424, 0f42FC0000;
	mov.b32 	%r214, %f423;
	and.b32  	%r215, %r214, -2147483648;
	or.b32  	%r216, %r215, 1123811328;
	mov.b32 	%f425, %r216;
	selp.f32 	%f426, %f425, %f423, %p49;
	mov.f32 	%f427, 0fBF317218;
	fma.rn.f32 	%f428, %f426, %f427, %f420;
	mov.f32 	%f429, 0f3102E308;
	fma.rn.f32 	%f430, %f426, %f429, %f428;
	mul.f32 	%f431, %f430, 0f3FB8AA3B;
	add.f32 	%f432, %f426, 0f4B40007F;
	mov.b32 	%r217, %f432;
	shl.b32 	%r218, %r217, 23;
	mov.b32 	%f433, %r218;
	ex2.approx.ftz.f32 	%f434, %f431;
	mul.f32 	%f95, %f434, %f433;
	setp.eq.f32 	%p50, %f95, 0f7F800000;
	mov.f32 	%f1009, 0f7F800000;
	@%p50 bra 	$L__BB0_41;

	fma.rn.f32 	%f1009, %f95, %f94, %f95;

$L__BB0_41:
	mov.f32 	%f969, 0f3E666666;
	cvt.rzi.f32.f32 	%f968, %f969;
	add.f32 	%f967, %f968, %f968;
	mov.f32 	%f966, 0f3EE66666;
	sub.f32 	%f965, %f966, %f967;
	abs.f32 	%f964, %f965;
	setp.lt.f32 	%p51, %f1006, 0f00000000;
	setp.eq.f32 	%p52, %f964, 0f3F800000;
	and.pred  	%p1, %p51, %p52;
	setp.eq.f32 	%p53, %f1006, 0f00000000;
	@%p53 bra 	$L__BB0_45;
	bra.uni 	$L__BB0_42;

$L__BB0_45:
	add.f32 	%f439, %f1006, %f1006;
	selp.f32 	%f1011, %f439, 0f00000000, %p52;
	bra.uni 	$L__BB0_46;

$L__BB0_42:
	mov.b32 	%r219, %f1009;
	xor.b32  	%r220, %r219, -2147483648;
	mov.b32 	%f435, %r220;
	selp.f32 	%f1011, %f435, %f1009, %p1;
	setp.geu.f32 	%p54, %f1006, 0f00000000;
	@%p54 bra 	$L__BB0_46;

	mov.f32 	%f436, 0f3EE66666;
	cvt.rzi.f32.f32 	%f437, %f436;
	setp.eq.f32 	%p55, %f437, 0f3EE66666;
	@%p55 bra 	$L__BB0_46;

	mov.f32 	%f1011, 0f7FFFFFFF;

$L__BB0_46:
	abs.f32 	%f970, %f1006;
	add.f32 	%f440, %f970, 0f3EE66666;
	mov.b32 	%r221, %f440;
	setp.lt.s32 	%p57, %r221, 2139095040;
	@%p57 bra 	$L__BB0_51;

	abs.f32 	%f971, %f1006;
	setp.gtu.f32 	%p58, %f971, 0f7F800000;
	@%p58 bra 	$L__BB0_50;
	bra.uni 	$L__BB0_48;

$L__BB0_50:
	add.f32 	%f1011, %f1006, 0f3EE66666;
	bra.uni 	$L__BB0_51;

$L__BB0_48:
	abs.f32 	%f972, %f1006;
	setp.neu.f32 	%p59, %f972, 0f7F800000;
	@%p59 bra 	$L__BB0_51;

	selp.f32 	%f1011, 0fFF800000, 0f7F800000, %p1;

$L__BB0_51:
	setp.eq.f32 	%p60, %f1006, 0f3F800000;
	selp.f32 	%f104, 0f3F800000, %f1011, %p60;
	abs.f32 	%f105, %f1007;
	setp.lt.f32 	%p61, %f105, 0f00800000;
	mul.f32 	%f442, %f105, 0f4B800000;
	selp.f32 	%f443, %f442, %f105, %p61;
	selp.f32 	%f444, 0fC3170000, 0fC2FE0000, %p61;
	mov.b32 	%r222, %f443;
	and.b32  	%r223, %r222, 8388607;
	or.b32  	%r224, %r223, 1065353216;
	mov.b32 	%f445, %r224;
	shr.u32 	%r225, %r222, 23;
	cvt.rn.f32.u32 	%f446, %r225;
	add.f32 	%f447, %f444, %f446;
	setp.gt.f32 	%p62, %f445, 0f3FB504F3;
	mul.f32 	%f448, %f445, 0f3F000000;
	add.f32 	%f449, %f447, 0f3F800000;
	selp.f32 	%f450, %f449, %f447, %p62;
	selp.f32 	%f451, %f448, %f445, %p62;
	add.f32 	%f452, %f451, 0fBF800000;
	add.f32 	%f453, %f451, 0f3F800000;
	rcp.approx.ftz.f32 	%f454, %f453;
	add.f32 	%f455, %f452, %f452;
	mul.f32 	%f456, %f455, %f454;
	mul.f32 	%f457, %f456, %f456;
	mov.f32 	%f458, 0f3C4CAF63;
	mov.f32 	%f459, 0f3B18F0FE;
	fma.rn.f32 	%f460, %f459, %f457, %f458;
	mov.f32 	%f461, 0f3DAAAABD;
	fma.rn.f32 	%f462, %f460, %f457, %f461;
	mul.rn.f32 	%f463, %f462, %f457;
	mul.rn.f32 	%f464, %f463, %f456;
	sub.f32 	%f465, %f452, %f456;
	add.f32 	%f466, %f465, %f465;
	neg.f32 	%f467, %f456;
	fma.rn.f32 	%f468, %f467, %f452, %f466;
	mul.rn.f32 	%f469, %f454, %f468;
	add.f32 	%f470, %f464, %f456;
	sub.f32 	%f471, %f456, %f470;
	add.f32 	%f472, %f464, %f471;
	add.f32 	%f473, %f469, %f472;
	add.f32 	%f474, %f470, %f473;
	sub.f32 	%f475, %f470, %f474;
	add.f32 	%f476, %f473, %f475;
	mov.f32 	%f477, 0f3F317200;
	mul.rn.f32 	%f478, %f450, %f477;
	mov.f32 	%f479, 0f35BFBE8E;
	mul.rn.f32 	%f480, %f450, %f479;
	add.f32 	%f481, %f478, %f474;
	sub.f32 	%f482, %f478, %f481;
	add.f32 	%f483, %f474, %f482;
	add.f32 	%f484, %f476, %f483;
	add.f32 	%f485, %f480, %f484;
	add.f32 	%f486, %f481, %f485;
	sub.f32 	%f487, %f481, %f486;
	add.f32 	%f488, %f485, %f487;
	mov.f32 	%f489, 0f3EE66666;
	mul.rn.f32 	%f490, %f489, %f486;
	neg.f32 	%f491, %f490;
	fma.rn.f32 	%f492, %f489, %f486, %f491;
	fma.rn.f32 	%f493, %f489, %f488, %f492;
	mov.f32 	%f494, 0f00000000;
	fma.rn.f32 	%f495, %f494, %f486, %f493;
	add.rn.f32 	%f496, %f490, %f495;
	neg.f32 	%f497, %f496;
	add.rn.f32 	%f498, %f490, %f497;
	add.rn.f32 	%f499, %f498, %f495;
	mov.b32 	%r226, %f496;
	setp.eq.s32 	%p63, %r226, 1118925336;
	add.s32 	%r227, %r226, -1;
	mov.b32 	%f500, %r227;
	add.f32 	%f501, %f499, 0f37000000;
	selp.f32 	%f106, %f501, %f499, %p63;
	selp.f32 	%f502, %f500, %f496, %p63;
	mov.f32 	%f503, 0f3FB8AA3B;
	mul.rn.f32 	%f504, %f502, %f503;
	cvt.rzi.f32.f32 	%f505, %f504;
	abs.f32 	%f506, %f505;
	setp.gt.f32 	%p64, %f506, 0f42FC0000;
	mov.b32 	%r228, %f505;
	and.b32  	%r229, %r228, -2147483648;
	or.b32  	%r230, %r229, 1123811328;
	mov.b32 	%f507, %r230;
	selp.f32 	%f508, %f507, %f505, %p64;
	mov.f32 	%f509, 0fBF317218;
	fma.rn.f32 	%f510, %f508, %f509, %f502;
	mov.f32 	%f511, 0f3102E308;
	fma.rn.f32 	%f512, %f508, %f511, %f510;
	mul.f32 	%f513, %f512, 0f3FB8AA3B;
	add.f32 	%f514, %f508, 0f4B40007F;
	mov.b32 	%r231, %f514;
	shl.b32 	%r232, %r231, 23;
	mov.b32 	%f515, %r232;
	ex2.approx.ftz.f32 	%f516, %f513;
	mul.f32 	%f107, %f516, %f515;
	setp.eq.f32 	%p65, %f107, 0f7F800000;
	mov.f32 	%f1012, 0f7F800000;
	@%p65 bra 	$L__BB0_53;

	fma.rn.f32 	%f1012, %f107, %f106, %f107;

$L__BB0_53:
	setp.lt.f32 	%p66, %f1007, 0f00000000;
	and.pred  	%p2, %p66, %p52;
	setp.eq.f32 	%p68, %f1007, 0f00000000;
	@%p68 bra 	$L__BB0_57;
	bra.uni 	$L__BB0_54;

$L__BB0_57:
	add.f32 	%f521, %f1007, %f1007;
	selp.f32 	%f1014, %f521, 0f00000000, %p52;
	bra.uni 	$L__BB0_58;

$L__BB0_54:
	mov.b32 	%r233, %f1012;
	xor.b32  	%r234, %r233, -2147483648;
	mov.b32 	%f517, %r234;
	selp.f32 	%f1014, %f517, %f1012, %p2;
	setp.geu.f32 	%p69, %f1007, 0f00000000;
	@%p69 bra 	$L__BB0_58;

	mov.f32 	%f518, 0f3EE66666;
	cvt.rzi.f32.f32 	%f519, %f518;
	setp.eq.f32 	%p70, %f519, 0f3EE66666;
	@%p70 bra 	$L__BB0_58;

	mov.f32 	%f1014, 0f7FFFFFFF;

$L__BB0_58:
	abs.f32 	%f973, %f1007;
	add.f32 	%f522, %f973, 0f3EE66666;
	mov.b32 	%r235, %f522;
	setp.lt.s32 	%p72, %r235, 2139095040;
	@%p72 bra 	$L__BB0_63;

	abs.f32 	%f974, %f1007;
	setp.gtu.f32 	%p73, %f974, 0f7F800000;
	@%p73 bra 	$L__BB0_62;
	bra.uni 	$L__BB0_60;

$L__BB0_62:
	add.f32 	%f1014, %f1007, 0f3EE66666;
	bra.uni 	$L__BB0_63;

$L__BB0_60:
	abs.f32 	%f975, %f1007;
	setp.neu.f32 	%p74, %f975, 0f7F800000;
	@%p74 bra 	$L__BB0_63;

	selp.f32 	%f1014, 0fFF800000, 0f7F800000, %p2;

$L__BB0_63:
	setp.eq.f32 	%p75, %f1007, 0f3F800000;
	selp.f32 	%f116, 0f3F800000, %f1014, %p75;
	abs.f32 	%f117, %f1008;
	setp.lt.f32 	%p76, %f117, 0f00800000;
	mul.f32 	%f524, %f117, 0f4B800000;
	selp.f32 	%f525, %f524, %f117, %p76;
	selp.f32 	%f526, 0fC3170000, 0fC2FE0000, %p76;
	mov.b32 	%r236, %f525;
	and.b32  	%r237, %r236, 8388607;
	or.b32  	%r238, %r237, 1065353216;
	mov.b32 	%f527, %r238;
	shr.u32 	%r239, %r236, 23;
	cvt.rn.f32.u32 	%f528, %r239;
	add.f32 	%f529, %f526, %f528;
	setp.gt.f32 	%p77, %f527, 0f3FB504F3;
	mul.f32 	%f530, %f527, 0f3F000000;
	add.f32 	%f531, %f529, 0f3F800000;
	selp.f32 	%f532, %f531, %f529, %p77;
	selp.f32 	%f533, %f530, %f527, %p77;
	add.f32 	%f534, %f533, 0fBF800000;
	add.f32 	%f535, %f533, 0f3F800000;
	rcp.approx.ftz.f32 	%f536, %f535;
	add.f32 	%f537, %f534, %f534;
	mul.f32 	%f538, %f537, %f536;
	mul.f32 	%f539, %f538, %f538;
	mov.f32 	%f540, 0f3C4CAF63;
	mov.f32 	%f541, 0f3B18F0FE;
	fma.rn.f32 	%f542, %f541, %f539, %f540;
	mov.f32 	%f543, 0f3DAAAABD;
	fma.rn.f32 	%f544, %f542, %f539, %f543;
	mul.rn.f32 	%f545, %f544, %f539;
	mul.rn.f32 	%f546, %f545, %f538;
	sub.f32 	%f547, %f534, %f538;
	add.f32 	%f548, %f547, %f547;
	neg.f32 	%f549, %f538;
	fma.rn.f32 	%f550, %f549, %f534, %f548;
	mul.rn.f32 	%f551, %f536, %f550;
	add.f32 	%f552, %f546, %f538;
	sub.f32 	%f553, %f538, %f552;
	add.f32 	%f554, %f546, %f553;
	add.f32 	%f555, %f551, %f554;
	add.f32 	%f556, %f552, %f555;
	sub.f32 	%f557, %f552, %f556;
	add.f32 	%f558, %f555, %f557;
	mov.f32 	%f559, 0f3F317200;
	mul.rn.f32 	%f560, %f532, %f559;
	mov.f32 	%f561, 0f35BFBE8E;
	mul.rn.f32 	%f562, %f532, %f561;
	add.f32 	%f563, %f560, %f556;
	sub.f32 	%f564, %f560, %f563;
	add.f32 	%f565, %f556, %f564;
	add.f32 	%f566, %f558, %f565;
	add.f32 	%f567, %f562, %f566;
	add.f32 	%f568, %f563, %f567;
	sub.f32 	%f569, %f563, %f568;
	add.f32 	%f570, %f567, %f569;
	mov.f32 	%f571, 0f3EE66666;
	mul.rn.f32 	%f572, %f571, %f568;
	neg.f32 	%f573, %f572;
	fma.rn.f32 	%f574, %f571, %f568, %f573;
	fma.rn.f32 	%f575, %f571, %f570, %f574;
	mov.f32 	%f576, 0f00000000;
	fma.rn.f32 	%f577, %f576, %f568, %f575;
	add.rn.f32 	%f578, %f572, %f577;
	neg.f32 	%f579, %f578;
	add.rn.f32 	%f580, %f572, %f579;
	add.rn.f32 	%f581, %f580, %f577;
	mov.b32 	%r240, %f578;
	setp.eq.s32 	%p78, %r240, 1118925336;
	add.s32 	%r241, %r240, -1;
	mov.b32 	%f582, %r241;
	add.f32 	%f583, %f581, 0f37000000;
	selp.f32 	%f118, %f583, %f581, %p78;
	selp.f32 	%f584, %f582, %f578, %p78;
	mov.f32 	%f585, 0f3FB8AA3B;
	mul.rn.f32 	%f586, %f584, %f585;
	cvt.rzi.f32.f32 	%f587, %f586;
	abs.f32 	%f588, %f587;
	setp.gt.f32 	%p79, %f588, 0f42FC0000;
	mov.b32 	%r242, %f587;
	and.b32  	%r243, %r242, -2147483648;
	or.b32  	%r244, %r243, 1123811328;
	mov.b32 	%f589, %r244;
	selp.f32 	%f590, %f589, %f587, %p79;
	mov.f32 	%f591, 0fBF317218;
	fma.rn.f32 	%f592, %f590, %f591, %f584;
	mov.f32 	%f593, 0f3102E308;
	fma.rn.f32 	%f594, %f590, %f593, %f592;
	mul.f32 	%f595, %f594, 0f3FB8AA3B;
	add.f32 	%f596, %f590, 0f4B40007F;
	mov.b32 	%r245, %f596;
	shl.b32 	%r246, %r245, 23;
	mov.b32 	%f597, %r246;
	ex2.approx.ftz.f32 	%f598, %f595;
	mul.f32 	%f119, %f598, %f597;
	setp.eq.f32 	%p80, %f119, 0f7F800000;
	mov.f32 	%f1015, 0f7F800000;
	@%p80 bra 	$L__BB0_65;

	fma.rn.f32 	%f1015, %f119, %f118, %f119;

$L__BB0_65:
	setp.lt.f32 	%p81, %f1008, 0f00000000;
	and.pred  	%p3, %p81, %p52;
	setp.eq.f32 	%p83, %f1008, 0f00000000;
	@%p83 bra 	$L__BB0_69;
	bra.uni 	$L__BB0_66;

$L__BB0_69:
	add.f32 	%f603, %f1008, %f1008;
	selp.f32 	%f1017, %f603, 0f00000000, %p52;
	bra.uni 	$L__BB0_70;

$L__BB0_66:
	mov.b32 	%r247, %f1015;
	xor.b32  	%r248, %r247, -2147483648;
	mov.b32 	%f599, %r248;
	selp.f32 	%f1017, %f599, %f1015, %p3;
	setp.geu.f32 	%p84, %f1008, 0f00000000;
	@%p84 bra 	$L__BB0_70;

	mov.f32 	%f600, 0f3EE66666;
	cvt.rzi.f32.f32 	%f601, %f600;
	setp.eq.f32 	%p85, %f601, 0f3EE66666;
	@%p85 bra 	$L__BB0_70;

	mov.f32 	%f1017, 0f7FFFFFFF;

$L__BB0_70:
	abs.f32 	%f976, %f1008;
	add.f32 	%f604, %f976, 0f3EE66666;
	mov.b32 	%r249, %f604;
	setp.lt.s32 	%p87, %r249, 2139095040;
	@%p87 bra 	$L__BB0_75;

	abs.f32 	%f977, %f1008;
	setp.gtu.f32 	%p88, %f977, 0f7F800000;
	@%p88 bra 	$L__BB0_74;
	bra.uni 	$L__BB0_72;

$L__BB0_74:
	add.f32 	%f1017, %f1008, 0f3EE66666;
	bra.uni 	$L__BB0_75;

$L__BB0_72:
	abs.f32 	%f978, %f1008;
	setp.neu.f32 	%p89, %f978, 0f7F800000;
	@%p89 bra 	$L__BB0_75;

	selp.f32 	%f1017, 0fFF800000, 0f7F800000, %p3;

$L__BB0_75:
	setp.eq.f32 	%p90, %f1008, 0f3F800000;
	mov.f32 	%f606, 0f3F800000;
	selp.f32 	%f607, 0f3F800000, %f1017, %p90;
	min.f32 	%f608, %f104, %f606;
	mov.f32 	%f609, 0f00000000;
	max.f32 	%f128, %f609, %f608;
	min.f32 	%f610, %f116, %f606;
	max.f32 	%f129, %f609, %f610;
	min.f32 	%f611, %f607, %f606;
	max.f32 	%f130, %f609, %f611;
	mov.f32 	%f615, 0f3ED55555;
	abs.f32 	%f132, %f128;
	setp.lt.f32 	%p91, %f132, 0f00800000;
	mul.f32 	%f617, %f132, 0f4B800000;
	selp.f32 	%f618, %f617, %f132, %p91;
	selp.f32 	%f619, 0fC3170000, 0fC2FE0000, %p91;
	mov.b32 	%r252, %f618;
	and.b32  	%r253, %r252, 8388607;
	or.b32  	%r254, %r253, 1065353216;
	mov.b32 	%f620, %r254;
	shr.u32 	%r255, %r252, 23;
	cvt.rn.f32.u32 	%f621, %r255;
	add.f32 	%f622, %f619, %f621;
	setp.gt.f32 	%p92, %f620, 0f3FB504F3;
	mul.f32 	%f623, %f620, 0f3F000000;
	add.f32 	%f624, %f622, 0f3F800000;
	selp.f32 	%f625, %f624, %f622, %p92;
	selp.f32 	%f626, %f623, %f620, %p92;
	add.f32 	%f627, %f626, 0fBF800000;
	add.f32 	%f628, %f626, 0f3F800000;
	rcp.approx.ftz.f32 	%f629, %f628;
	add.f32 	%f630, %f627, %f627;
	mul.f32 	%f631, %f630, %f629;
	mul.f32 	%f632, %f631, %f631;
	mov.f32 	%f633, 0f3C4CAF63;
	mov.f32 	%f634, 0f3B18F0FE;
	fma.rn.f32 	%f635, %f634, %f632, %f633;
	mov.f32 	%f636, 0f3DAAAABD;
	fma.rn.f32 	%f637, %f635, %f632, %f636;
	mul.rn.f32 	%f638, %f637, %f632;
	mul.rn.f32 	%f639, %f638, %f631;
	sub.f32 	%f640, %f627, %f631;
	add.f32 	%f641, %f640, %f640;
	neg.f32 	%f642, %f631;
	fma.rn.f32 	%f643, %f642, %f627, %f641;
	mul.rn.f32 	%f644, %f629, %f643;
	add.f32 	%f645, %f639, %f631;
	sub.f32 	%f646, %f631, %f645;
	add.f32 	%f647, %f639, %f646;
	add.f32 	%f648, %f644, %f647;
	add.f32 	%f649, %f645, %f648;
	sub.f32 	%f650, %f645, %f649;
	add.f32 	%f651, %f648, %f650;
	mov.f32 	%f652, 0f3F317200;
	mul.rn.f32 	%f653, %f625, %f652;
	mov.f32 	%f654, 0f35BFBE8E;
	mul.rn.f32 	%f655, %f625, %f654;
	add.f32 	%f656, %f653, %f649;
	sub.f32 	%f657, %f653, %f656;
	add.f32 	%f658, %f649, %f657;
	add.f32 	%f659, %f651, %f658;
	add.f32 	%f660, %f655, %f659;
	add.f32 	%f661, %f656, %f660;
	sub.f32 	%f662, %f656, %f661;
	add.f32 	%f663, %f660, %f662;
	mul.rn.f32 	%f664, %f615, %f661;
	neg.f32 	%f665, %f664;
	fma.rn.f32 	%f666, %f615, %f661, %f665;
	fma.rn.f32 	%f667, %f615, %f663, %f666;
	fma.rn.f32 	%f668, %f609, %f661, %f667;
	add.rn.f32 	%f669, %f664, %f668;
	neg.f32 	%f670, %f669;
	add.rn.f32 	%f671, %f664, %f670;
	add.rn.f32 	%f672, %f671, %f668;
	mov.b32 	%r256, %f669;
	setp.eq.s32 	%p93, %r256, 1118925336;
	add.s32 	%r257, %r256, -1;
	mov.b32 	%f673, %r257;
	add.f32 	%f674, %f672, 0f37000000;
	selp.f32 	%f133, %f674, %f672, %p93;
	selp.f32 	%f675, %f673, %f669, %p93;
	mov.f32 	%f676, 0f3FB8AA3B;
	mul.rn.f32 	%f677, %f675, %f676;
	cvt.rzi.f32.f32 	%f678, %f677;
	abs.f32 	%f679, %f678;
	setp.gt.f32 	%p94, %f679, 0f42FC0000;
	mov.b32 	%r258, %f678;
	and.b32  	%r259, %r258, -2147483648;
	or.b32  	%r260, %r259, 1123811328;
	mov.b32 	%f680, %r260;
	selp.f32 	%f681, %f680, %f678, %p94;
	mov.f32 	%f682, 0fBF317218;
	fma.rn.f32 	%f683, %f681, %f682, %f675;
	mov.f32 	%f684, 0f3102E308;
	fma.rn.f32 	%f685, %f681, %f684, %f683;
	mul.f32 	%f686, %f685, 0f3FB8AA3B;
	add.f32 	%f687, %f681, 0f4B40007F;
	mov.b32 	%r261, %f687;
	shl.b32 	%r262, %r261, 23;
	mov.b32 	%f688, %r262;
	ex2.approx.ftz.f32 	%f689, %f686;
	mul.f32 	%f134, %f689, %f688;
	setp.eq.f32 	%p95, %f134, 0f7F800000;
	mov.f32 	%f1018, 0f7F800000;
	@%p95 bra 	$L__BB0_77;

	fma.rn.f32 	%f1018, %f134, %f133, %f134;

$L__BB0_77:
	mov.f32 	%f959, 0f3E555555;
	cvt.rzi.f32.f32 	%f958, %f959;
	add.f32 	%f957, %f958, %f958;
	mov.f32 	%f956, 0f3ED55555;
	sub.f32 	%f955, %f956, %f957;
	abs.f32 	%f954, %f955;
	setp.lt.f32 	%p96, %f128, 0f00000000;
	setp.eq.f32 	%p97, %f954, 0f3F800000;
	and.pred  	%p4, %p96, %p97;
	setp.eq.f32 	%p98, %f128, 0f00000000;
	@%p98 bra 	$L__BB0_81;
	bra.uni 	$L__BB0_78;

$L__BB0_81:
	add.f32 	%f694, %f128, %f128;
	selp.f32 	%f1020, %f694, 0f00000000, %p97;
	bra.uni 	$L__BB0_82;

$L__BB0_78:
	mov.b32 	%r263, %f1018;
	xor.b32  	%r264, %r263, -2147483648;
	mov.b32 	%f690, %r264;
	selp.f32 	%f1020, %f690, %f1018, %p4;
	setp.geu.f32 	%p99, %f128, 0f00000000;
	@%p99 bra 	$L__BB0_82;

	mov.f32 	%f691, 0f3ED55555;
	cvt.rzi.f32.f32 	%f692, %f691;
	setp.eq.f32 	%p100, %f692, 0f3ED55555;
	@%p100 bra 	$L__BB0_82;

	mov.f32 	%f1020, 0f7FFFFFFF;

$L__BB0_82:
	add.f32 	%f695, %f132, 0f3ED55555;
	mov.b32 	%r265, %f695;
	setp.lt.s32 	%p102, %r265, 2139095040;
	@%p102 bra 	$L__BB0_87;

	setp.gtu.f32 	%p103, %f132, 0f7F800000;
	@%p103 bra 	$L__BB0_86;
	bra.uni 	$L__BB0_84;

$L__BB0_86:
	add.f32 	%f1020, %f128, 0f3ED55555;
	bra.uni 	$L__BB0_87;

$L__BB0_84:
	setp.neu.f32 	%p104, %f132, 0f7F800000;
	@%p104 bra 	$L__BB0_87;

	selp.f32 	%f1020, 0fFF800000, 0f7F800000, %p4;

$L__BB0_87:
	abs.f32 	%f143, %f129;
	setp.lt.f32 	%p105, %f143, 0f00800000;
	mul.f32 	%f697, %f143, 0f4B800000;
	selp.f32 	%f698, %f697, %f143, %p105;
	selp.f32 	%f699, 0fC3170000, 0fC2FE0000, %p105;
	mov.b32 	%r266, %f698;
	and.b32  	%r267, %r266, 8388607;
	or.b32  	%r268, %r267, 1065353216;
	mov.b32 	%f700, %r268;
	shr.u32 	%r269, %r266, 23;
	cvt.rn.f32.u32 	%f701, %r269;
	add.f32 	%f702, %f699, %f701;
	setp.gt.f32 	%p106, %f700, 0f3FB504F3;
	mul.f32 	%f703, %f700, 0f3F000000;
	add.f32 	%f704, %f702, 0f3F800000;
	selp.f32 	%f705, %f704, %f702, %p106;
	selp.f32 	%f706, %f703, %f700, %p106;
	add.f32 	%f707, %f706, 0fBF800000;
	add.f32 	%f708, %f706, 0f3F800000;
	rcp.approx.ftz.f32 	%f709, %f708;
	add.f32 	%f710, %f707, %f707;
	mul.f32 	%f711, %f710, %f709;
	mul.f32 	%f712, %f711, %f711;
	mov.f32 	%f713, 0f3C4CAF63;
	mov.f32 	%f714, 0f3B18F0FE;
	fma.rn.f32 	%f715, %f714, %f712, %f713;
	mov.f32 	%f716, 0f3DAAAABD;
	fma.rn.f32 	%f717, %f715, %f712, %f716;
	mul.rn.f32 	%f718, %f717, %f712;
	mul.rn.f32 	%f719, %f718, %f711;
	sub.f32 	%f720, %f707, %f711;
	add.f32 	%f721, %f720, %f720;
	neg.f32 	%f722, %f711;
	fma.rn.f32 	%f723, %f722, %f707, %f721;
	mul.rn.f32 	%f724, %f709, %f723;
	add.f32 	%f725, %f719, %f711;
	sub.f32 	%f726, %f711, %f725;
	add.f32 	%f727, %f719, %f726;
	add.f32 	%f728, %f724, %f727;
	add.f32 	%f729, %f725, %f728;
	sub.f32 	%f730, %f725, %f729;
	add.f32 	%f731, %f728, %f730;
	mov.f32 	%f732, 0f3F317200;
	mul.rn.f32 	%f733, %f705, %f732;
	mov.f32 	%f734, 0f35BFBE8E;
	mul.rn.f32 	%f735, %f705, %f734;
	add.f32 	%f736, %f733, %f729;
	sub.f32 	%f737, %f733, %f736;
	add.f32 	%f738, %f729, %f737;
	add.f32 	%f739, %f731, %f738;
	add.f32 	%f740, %f735, %f739;
	add.f32 	%f741, %f736, %f740;
	sub.f32 	%f742, %f736, %f741;
	add.f32 	%f743, %f740, %f742;
	mov.f32 	%f744, 0f3ED55555;
	mul.rn.f32 	%f745, %f744, %f741;
	neg.f32 	%f746, %f745;
	fma.rn.f32 	%f747, %f744, %f741, %f746;
	fma.rn.f32 	%f748, %f744, %f743, %f747;
	mov.f32 	%f749, 0f00000000;
	fma.rn.f32 	%f750, %f749, %f741, %f748;
	add.rn.f32 	%f751, %f745, %f750;
	neg.f32 	%f752, %f751;
	add.rn.f32 	%f753, %f745, %f752;
	add.rn.f32 	%f754, %f753, %f750;
	mov.b32 	%r270, %f751;
	setp.eq.s32 	%p107, %r270, 1118925336;
	add.s32 	%r271, %r270, -1;
	mov.b32 	%f755, %r271;
	add.f32 	%f756, %f754, 0f37000000;
	selp.f32 	%f144, %f756, %f754, %p107;
	selp.f32 	%f757, %f755, %f751, %p107;
	mov.f32 	%f758, 0f3FB8AA3B;
	mul.rn.f32 	%f759, %f757, %f758;
	cvt.rzi.f32.f32 	%f760, %f759;
	abs.f32 	%f761, %f760;
	setp.gt.f32 	%p108, %f761, 0f42FC0000;
	mov.b32 	%r272, %f760;
	and.b32  	%r273, %r272, -2147483648;
	or.b32  	%r274, %r273, 1123811328;
	mov.b32 	%f762, %r274;
	selp.f32 	%f763, %f762, %f760, %p108;
	mov.f32 	%f764, 0fBF317218;
	fma.rn.f32 	%f765, %f763, %f764, %f757;
	mov.f32 	%f766, 0f3102E308;
	fma.rn.f32 	%f767, %f763, %f766, %f765;
	mul.f32 	%f768, %f767, 0f3FB8AA3B;
	add.f32 	%f769, %f763, 0f4B40007F;
	mov.b32 	%r275, %f769;
	shl.b32 	%r276, %r275, 23;
	mov.b32 	%f770, %r276;
	ex2.approx.ftz.f32 	%f771, %f768;
	mul.f32 	%f145, %f771, %f770;
	setp.eq.f32 	%p109, %f145, 0f7F800000;
	mov.f32 	%f1021, 0f7F800000;
	@%p109 bra 	$L__BB0_89;

	fma.rn.f32 	%f1021, %f145, %f144, %f145;

$L__BB0_89:
	setp.lt.f32 	%p110, %f129, 0f00000000;
	and.pred  	%p5, %p110, %p97;
	setp.eq.f32 	%p112, %f129, 0f00000000;
	@%p112 bra 	$L__BB0_93;
	bra.uni 	$L__BB0_90;

$L__BB0_93:
	add.f32 	%f776, %f129, %f129;
	selp.f32 	%f1023, %f776, 0f00000000, %p97;
	bra.uni 	$L__BB0_94;

$L__BB0_90:
	mov.b32 	%r277, %f1021;
	xor.b32  	%r278, %r277, -2147483648;
	mov.b32 	%f772, %r278;
	selp.f32 	%f1023, %f772, %f1021, %p5;
	setp.geu.f32 	%p113, %f129, 0f00000000;
	@%p113 bra 	$L__BB0_94;

	mov.f32 	%f773, 0f3ED55555;
	cvt.rzi.f32.f32 	%f774, %f773;
	setp.eq.f32 	%p114, %f774, 0f3ED55555;
	@%p114 bra 	$L__BB0_94;

	mov.f32 	%f1023, 0f7FFFFFFF;

$L__BB0_94:
	add.f32 	%f777, %f143, 0f3ED55555;
	mov.b32 	%r279, %f777;
	setp.lt.s32 	%p116, %r279, 2139095040;
	@%p116 bra 	$L__BB0_99;

	setp.gtu.f32 	%p117, %f143, 0f7F800000;
	@%p117 bra 	$L__BB0_98;
	bra.uni 	$L__BB0_96;

$L__BB0_98:
	add.f32 	%f1023, %f129, 0f3ED55555;
	bra.uni 	$L__BB0_99;

$L__BB0_96:
	setp.neu.f32 	%p118, %f143, 0f7F800000;
	@%p118 bra 	$L__BB0_99;

	selp.f32 	%f1023, 0fFF800000, 0f7F800000, %p5;

$L__BB0_99:
	abs.f32 	%f154, %f130;
	setp.lt.f32 	%p119, %f154, 0f00800000;
	mul.f32 	%f779, %f154, 0f4B800000;
	selp.f32 	%f780, %f779, %f154, %p119;
	selp.f32 	%f781, 0fC3170000, 0fC2FE0000, %p119;
	mov.b32 	%r280, %f780;
	and.b32  	%r281, %r280, 8388607;
	or.b32  	%r282, %r281, 1065353216;
	mov.b32 	%f782, %r282;
	shr.u32 	%r283, %r280, 23;
	cvt.rn.f32.u32 	%f783, %r283;
	add.f32 	%f784, %f781, %f783;
	setp.gt.f32 	%p120, %f782, 0f3FB504F3;
	mul.f32 	%f785, %f782, 0f3F000000;
	add.f32 	%f786, %f784, 0f3F800000;
	selp.f32 	%f787, %f786, %f784, %p120;
	selp.f32 	%f788, %f785, %f782, %p120;
	add.f32 	%f789, %f788, 0fBF800000;
	add.f32 	%f790, %f788, 0f3F800000;
	rcp.approx.ftz.f32 	%f791, %f790;
	add.f32 	%f792, %f789, %f789;
	mul.f32 	%f793, %f792, %f791;
	mul.f32 	%f794, %f793, %f793;
	mov.f32 	%f795, 0f3C4CAF63;
	mov.f32 	%f796, 0f3B18F0FE;
	fma.rn.f32 	%f797, %f796, %f794, %f795;
	mov.f32 	%f798, 0f3DAAAABD;
	fma.rn.f32 	%f799, %f797, %f794, %f798;
	mul.rn.f32 	%f800, %f799, %f794;
	mul.rn.f32 	%f801, %f800, %f793;
	sub.f32 	%f802, %f789, %f793;
	add.f32 	%f803, %f802, %f802;
	neg.f32 	%f804, %f793;
	fma.rn.f32 	%f805, %f804, %f789, %f803;
	mul.rn.f32 	%f806, %f791, %f805;
	add.f32 	%f807, %f801, %f793;
	sub.f32 	%f808, %f793, %f807;
	add.f32 	%f809, %f801, %f808;
	add.f32 	%f810, %f806, %f809;
	add.f32 	%f811, %f807, %f810;
	sub.f32 	%f812, %f807, %f811;
	add.f32 	%f813, %f810, %f812;
	mov.f32 	%f814, 0f3F317200;
	mul.rn.f32 	%f815, %f787, %f814;
	mov.f32 	%f816, 0f35BFBE8E;
	mul.rn.f32 	%f817, %f787, %f816;
	add.f32 	%f818, %f815, %f811;
	sub.f32 	%f819, %f815, %f818;
	add.f32 	%f820, %f811, %f819;
	add.f32 	%f821, %f813, %f820;
	add.f32 	%f822, %f817, %f821;
	add.f32 	%f823, %f818, %f822;
	sub.f32 	%f824, %f818, %f823;
	add.f32 	%f825, %f822, %f824;
	mov.f32 	%f826, 0f3ED55555;
	mul.rn.f32 	%f827, %f826, %f823;
	neg.f32 	%f828, %f827;
	fma.rn.f32 	%f829, %f826, %f823, %f828;
	fma.rn.f32 	%f830, %f826, %f825, %f829;
	mov.f32 	%f831, 0f00000000;
	fma.rn.f32 	%f832, %f831, %f823, %f830;
	add.rn.f32 	%f833, %f827, %f832;
	neg.f32 	%f834, %f833;
	add.rn.f32 	%f835, %f827, %f834;
	add.rn.f32 	%f836, %f835, %f832;
	mov.b32 	%r284, %f833;
	setp.eq.s32 	%p121, %r284, 1118925336;
	add.s32 	%r285, %r284, -1;
	mov.b32 	%f837, %r285;
	add.f32 	%f838, %f836, 0f37000000;
	selp.f32 	%f155, %f838, %f836, %p121;
	selp.f32 	%f839, %f837, %f833, %p121;
	mov.f32 	%f840, 0f3FB8AA3B;
	mul.rn.f32 	%f841, %f839, %f840;
	cvt.rzi.f32.f32 	%f842, %f841;
	abs.f32 	%f843, %f842;
	setp.gt.f32 	%p122, %f843, 0f42FC0000;
	mov.b32 	%r286, %f842;
	and.b32  	%r287, %r286, -2147483648;
	or.b32  	%r288, %r287, 1123811328;
	mov.b32 	%f844, %r288;
	selp.f32 	%f845, %f844, %f842, %p122;
	mov.f32 	%f846, 0fBF317218;
	fma.rn.f32 	%f847, %f845, %f846, %f839;
	mov.f32 	%f848, 0f3102E308;
	fma.rn.f32 	%f849, %f845, %f848, %f847;
	mul.f32 	%f850, %f849, 0f3FB8AA3B;
	add.f32 	%f851, %f845, 0f4B40007F;
	mov.b32 	%r289, %f851;
	shl.b32 	%r290, %r289, 23;
	mov.b32 	%f852, %r290;
	ex2.approx.ftz.f32 	%f853, %f850;
	mul.f32 	%f156, %f853, %f852;
	setp.eq.f32 	%p123, %f156, 0f7F800000;
	mov.f32 	%f1024, 0f7F800000;
	@%p123 bra 	$L__BB0_101;

	fma.rn.f32 	%f1024, %f156, %f155, %f156;

$L__BB0_101:
	setp.lt.f32 	%p124, %f130, 0f00000000;
	and.pred  	%p6, %p124, %p97;
	setp.eq.f32 	%p126, %f130, 0f00000000;
	@%p126 bra 	$L__BB0_105;
	bra.uni 	$L__BB0_102;

$L__BB0_105:
	add.f32 	%f858, %f130, %f130;
	selp.f32 	%f1026, %f858, 0f00000000, %p97;
	bra.uni 	$L__BB0_106;

$L__BB0_102:
	mov.b32 	%r291, %f1024;
	xor.b32  	%r292, %r291, -2147483648;
	mov.b32 	%f854, %r292;
	selp.f32 	%f1026, %f854, %f1024, %p6;
	setp.geu.f32 	%p127, %f130, 0f00000000;
	@%p127 bra 	$L__BB0_106;

	mov.f32 	%f855, 0f3ED55555;
	cvt.rzi.f32.f32 	%f856, %f855;
	setp.eq.f32 	%p128, %f856, 0f3ED55555;
	@%p128 bra 	$L__BB0_106;

	mov.f32 	%f1026, 0f7FFFFFFF;

$L__BB0_106:
	add.f32 	%f859, %f154, 0f3ED55555;
	mov.b32 	%r293, %f859;
	setp.lt.s32 	%p130, %r293, 2139095040;
	@%p130 bra 	$L__BB0_111;

	setp.gtu.f32 	%p131, %f154, 0f7F800000;
	@%p131 bra 	$L__BB0_110;
	bra.uni 	$L__BB0_108;

$L__BB0_110:
	add.f32 	%f1026, %f130, 0f3ED55555;
	bra.uni 	$L__BB0_111;

$L__BB0_108:
	setp.neu.f32 	%p132, %f154, 0f7F800000;
	@%p132 bra 	$L__BB0_111;

	selp.f32 	%f1026, 0fFF800000, 0f7F800000, %p6;

$L__BB0_111:
	ld.const.u64 	%rd96, [params+144];
	cvta.to.global.u64 	%rd95, %rd96;
	ld.const.u32 	%r327, [params+136];
	mad.lo.s32 	%r326, %r327, %r5, %r4;
	cvt.u64.u32 	%rd94, %r326;
	fma.rn.f32 	%f860, %f1020, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p133, %f128, 0f3F800000;
	mov.f32 	%f861, 0f3F800000;
	selp.f32 	%f862, 0f3F7FFFFF, %f860, %p133;
	mul.f32 	%f863, %f128, 0f414EB852;
	setp.lt.f32 	%p134, %f128, 0f3B4D2E1C;
	selp.f32 	%f864, %f863, %f862, %p134;
	fma.rn.f32 	%f865, %f1023, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p135, %f129, 0f3F800000;
	selp.f32 	%f866, 0f3F7FFFFF, %f865, %p135;
	mul.f32 	%f867, %f129, 0f414EB852;
	setp.lt.f32 	%p136, %f129, 0f3B4D2E1C;
	selp.f32 	%f868, %f867, %f866, %p136;
	fma.rn.f32 	%f869, %f1026, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p137, %f130, 0f3F800000;
	selp.f32 	%f870, 0f3F7FFFFF, %f869, %p137;
	mul.f32 	%f871, %f130, 0f414EB852;
	setp.lt.f32 	%p138, %f130, 0f3B4D2E1C;
	selp.f32 	%f872, %f871, %f870, %p138;
	min.f32 	%f873, %f864, %f861;
	mov.f32 	%f874, 0f00000000;
	max.f32 	%f875, %f874, %f873;
	mul.f32 	%f876, %f875, 0f43800000;
	cvt.rzi.u32.f32 	%r294, %f876;
	min.u32 	%r295, %r294, 255;
	min.f32 	%f877, %f868, %f861;
	max.f32 	%f878, %f874, %f877;
	mul.f32 	%f879, %f878, 0f43800000;
	cvt.rzi.u32.f32 	%r296, %f879;
	min.u32 	%r297, %r296, 255;
	min.f32 	%f880, %f872, %f861;
	max.f32 	%f881, %f874, %f880;
	mul.f32 	%f882, %f881, 0f43800000;
	cvt.rzi.u32.f32 	%r298, %f882;
	min.u32 	%r299, %r298, 255;
	shl.b64 	%rd60, %rd94, 2;
	add.s64 	%rd61, %rd95, %rd60;
	cvt.u16.u32 	%rs23, %r299;
	cvt.u16.u32 	%rs24, %r297;
	cvt.u16.u32 	%rs25, %r295;
	mov.u16 	%rs26, 255;
	st.global.v4.u8 	[%rd61], {%rs25, %rs24, %rs23, %rs26};

$L__BB0_112:
	ld.const.u32 	%r328, [params+104];
	and.b32  	%r300, %r328, 4;
	setp.eq.s32 	%p139, %r300, 0;
	@%p139 bra 	$L__BB0_114;

	ld.const.u64 	%rd62, [params+224];
	cvta.to.global.u64 	%rd63, %rd62;
	ld.const.u32 	%r301, [params+216];
	mad.lo.s32 	%r302, %r301, %r5, %r4;
	mov.f32 	%f886, 0f3F800000;
	mul.wide.u32 	%rd64, %r302, 8;
	add.s64 	%rd65, %rd63, %rd64;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f886;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f1008;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f1007;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f1006;}

	// end inline asm
	st.global.v4.u16 	[%rd65], {%rs27, %rs28, %rs29, %rs30};

$L__BB0_114:
	ld.const.u32 	%r329, [params+104];
	and.b32  	%r49, %r329, 16;
	setp.eq.s32 	%p140, %r49, 0;
	@%p140 bra 	$L__BB0_116;

	ld.const.u64 	%rd66, [params+240];
	cvta.to.global.u64 	%rd67, %rd66;
	ld.const.u32 	%r303, [params+232];
	mad.lo.s32 	%r304, %r303, %r5, %r4;
	mov.f32 	%f890, 0f3F800000;
	mul.wide.u32 	%rd68, %r304, 8;
	add.s64 	%rd69, %rd67, %rd68;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs34, %f890;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs33, %f79;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs32, %f78;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs31, %f77;}

	// end inline asm
	st.global.v4.u16 	[%rd69], {%rs31, %rs32, %rs33, %rs34};

$L__BB0_116:
	ld.const.u32 	%r330, [params+104];
	and.b32  	%r305, %r330, 64;
	setp.eq.s32 	%p141, %r305, 0;
	@%p141 bra 	$L__BB0_131;

	mul.f32 	%f891, %f196, 0f3F372474;
	fma.rn.f32 	%f892, %f195, 0f3E59999A, %f891;
	fma.rn.f32 	%f165, %f197, 0f3D93A92A, %f892;
	ld.const.u64 	%rd70, [params+680];
	cvta.to.global.u64 	%rd71, %rd70;
	ld.const.u32 	%r306, [params+672];
	mad.lo.s32 	%r307, %r306, %r5, %r4;
	mul.wide.u32 	%rd72, %r307, 4;
	add.s64 	%rd73, %rd71, %rd72;
	ld.global.v4.u8 	{%rs35, %rs36, %rs37, %rs38}, [%rd73];
	cvt.rn.f32.u16 	%f893, %rs35;
	div.rn.f32 	%f894, %f893, 0f437F0000;
	fma.rn.f32 	%f895, %f894, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f896, %rs36;
	div.rn.f32 	%f897, %f896, 0f437F0000;
	fma.rn.f32 	%f898, %f897, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f899, %rs37;
	div.rn.f32 	%f900, %f899, 0f437F0000;
	fma.rn.f32 	%f901, %f900, 0f40000000, 0fBF800000;
	mul.f32 	%f902, %f898, %f898;
	fma.rn.f32 	%f903, %f895, %f895, %f902;
	fma.rn.f32 	%f904, %f901, %f901, %f903;
	sqrt.rn.f32 	%f905, %f904;
	rcp.rn.f32 	%f906, %f905;
	mul.f32 	%f166, %f906, %f895;
	mul.f32 	%f167, %f906, %f898;
	mul.f32 	%f168, %f906, %f901;
	abs.f32 	%f907, %f993;
	setp.gt.f32 	%p142, %f907, 0f00000000;
	@%p142 bra 	$L__BB0_120;

	abs.f32 	%f908, %f992;
	setp.gt.f32 	%p143, %f908, 0f00000000;
	@%p143 bra 	$L__BB0_120;
	bra.uni 	$L__BB0_119;

$L__BB0_120:
	setp.ne.s32 	%p147, %r49, 0;
	mov.f32 	%f1027, %f993;
	mov.f32 	%f1028, %f992;
	mov.f32 	%f1029, %f991;
	@%p147 bra 	$L__BB0_122;

$L__BB0_121:
	mul.f32 	%f910, %f992, %f992;
	fma.rn.f32 	%f911, %f993, %f993, %f910;
	fma.rn.f32 	%f912, %f991, %f991, %f911;
	sqrt.rn.f32 	%f913, %f912;
	rcp.rn.f32 	%f914, %f913;
	mul.f32 	%f915, %f993, %f914;
	mul.f32 	%f916, %f992, %f914;
	mul.f32 	%f917, %f991, %f914;
	mul.f32 	%f918, %f78, 0f3F372474;
	fma.rn.f32 	%f919, %f77, 0f3E59999A, %f918;
	fma.rn.f32 	%f920, %f79, 0f3D93A92A, %f919;
	mul.f32 	%f921, %f920, %f915;
	mul.f32 	%f922, %f920, %f916;
	mul.f32 	%f923, %f920, %f917;
	fma.rn.f32 	%f1027, %f165, %f166, %f921;
	fma.rn.f32 	%f1028, %f165, %f167, %f922;
	fma.rn.f32 	%f1029, %f165, %f168, %f923;

$L__BB0_122:
	mul.f32 	%f924, %f1028, %f1028;
	fma.rn.f32 	%f925, %f1027, %f1027, %f924;
	fma.rn.f32 	%f926, %f1029, %f1029, %f925;
	sqrt.rn.f32 	%f927, %f926;
	rcp.rn.f32 	%f928, %f927;
	mul.f32 	%f929, %f1027, %f928;
	mul.f32 	%f930, %f1028, %f928;
	mul.f32 	%f931, %f1029, %f928;
	mul.f32 	%f932, %f980, %f930;
	fma.rn.f32 	%f933, %f979, %f929, %f932;
	fma.rn.f32 	%f934, %f981, %f931, %f933;
	fma.rn.f32 	%f935, %f934, 0f3F000000, 0f3F000000;
	mov.f32 	%f936, 0f3B808081;
	max.f32 	%f937, %f935, %f936;
	mul.f32 	%f938, %f937, 0f437F0000;
	cvt.rzi.s32.f32 	%r308, %f938;
	ld.const.u64 	%rd74, [params+208];
	cvta.to.global.u64 	%rd75, %rd74;
	ld.const.u32 	%r309, [params+200];
	mad.lo.s32 	%r310, %r309, %r5, %r4;
	fma.rn.f32 	%f939, %f929, 0f3F000000, 0f3F000000;
	mul.f32 	%f940, %f939, 0f437F0000;
	cvt.rzi.u32.f32 	%r311, %f940;
	fma.rn.f32 	%f941, %f930, 0f3F000000, 0f3F000000;
	mul.f32 	%f942, %f941, 0f437F0000;
	cvt.rzi.u32.f32 	%r312, %f942;
	fma.rn.f32 	%f943, %f931, 0f3F000000, 0f3F000000;
	mul.f32 	%f944, %f943, 0f437F0000;
	cvt.rzi.u32.f32 	%r313, %f944;
	mul.wide.u32 	%rd76, %r310, 4;
	add.s64 	%rd77, %rd75, %rd76;
	cvt.u16.u32 	%rs39, %r308;
	cvt.u16.u32 	%rs40, %r313;
	cvt.u16.u32 	%rs41, %r312;
	cvt.u16.u32 	%rs42, %r311;
	st.global.v4.u8 	[%rd77], {%rs42, %rs41, %rs40, %rs39};

$L__BB0_131:
	ret;

$L__BB0_119:
	abs.f32 	%f909, %f991;
	setp.leu.f32 	%p144, %f909, 0f00000000;
	setp.ne.s32 	%p145, %r49, 0;
	or.pred  	%p146, %p144, %p145;
	selp.f32 	%f1027, %f166, %f993, %p144;
	selp.f32 	%f1028, %f167, %f992, %p144;
	selp.f32 	%f1029, %f168, %f991, %p144;
	@%p146 bra 	$L__BB0_122;
	bra.uni 	$L__BB0_121;

}