// // Generated by NVIDIA NVVM Compiler // // Compiler Build ID: CL-23083092 // Cuda compilation tools, release 9.1, V9.1.85 // Based on LLVM 3.4svn // .version 6.1 .target sm_30 .address_size 64 // .globl _Z6oxMainv .global .align 8 .b8 pixelID[8]; .global .align 8 .b8 resolution[8]; .global .align 4 .b8 normal[12]; .global .align 4 .b8 camPos[12]; .global .align 4 .b8 root[4]; .global .align 4 .u32 imageEnabled; .global .texref lightmap; .global .align 16 .b8 tileInfo[16]; .global .align 4 .u32 additive; .global .align 1 .b8 image[1]; .global .align 1 .b8 image_HDR[1]; .global .align 1 .b8 image_HDR2[1]; .global .align 1 .b8 image_Mask[1]; .global .align 1 .b8 image_RNM0[1]; .global .align 1 .b8 image_RNM1[1]; .global .align 1 .b8 image_RNM2[1]; .global .align 1 .b8 uvtangent[1]; .global .align 1 .b8 uvpos[1]; .global .align 1 .b8 uvnormal[1]; .global .align 1 .b8 rnd_seeds[1]; .global .align 4 .b8 directDir[12]; .global .align 4 .b8 directColor[12]; .global .align 4 .f32 shadowSpread; .global .align 4 .u32 samples; .global .align 4 .u32 ignoreNormal; .global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo9directDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo11directColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12shadowSpreadE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; .global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; .global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename9directDirE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename11directColorE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename12shadowSpreadE[6] = {102, 108, 111, 97, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0}; .global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum9directDirE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum11directColorE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12shadowSpreadE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919; .global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; .global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic9directDirE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic11directColorE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12shadowSpreadE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation9directDirE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation11directColorE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12shadowSpreadE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1]; .const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; .visible .entry _Z6oxMainv( ) { .local .align 4 .b8 __local_depot0[52]; .reg .b64 %SP; .reg .b64 %SPL; .reg .pred %p<195>; .reg .b16 %rs<186>; .reg .f32 %f<1806>; .reg .b32 %r<525>; .reg .b64 %rd<312>; mov.u64 %rd311, __local_depot0; cvta.local.u64 %SP, %rd311; ld.global.v2.u32 {%r115, %r116}, [pixelID]; cvt.u64.u32 %rd29, %r115; cvt.u64.u32 %rd30, %r116; mov.u64 %rd33, uvnormal; cvta.global.u64 %rd28, %rd33; mov.u32 %r113, 2; mov.u32 %r114, 4; mov.u64 %rd32, 0; // inline asm call (%rd27), _rt_buffer_get_64, (%rd28, %r113, %r114, %rd29, %rd30, %rd32, %rd32); // inline asm ld.u32 %r1, [%rd27]; shr.u32 %r119, %r1, 16; cvt.u16.u32 %rs1, %r119; and.b16 %rs14, %rs1, 255; cvt.u16.u32 %rs15, %r1; or.b16 %rs16, %rs15, %rs14; setp.eq.s16 %p6, %rs16, 0; mov.f32 %f1712, 0f00000000; mov.f32 %f1713, %f1712; mov.f32 %f1714, %f1712; @%p6 bra BB0_2; ld.u8 %rs17, [%rd27+1]; and.b16 %rs19, %rs15, 255; cvt.rn.f32.u16 %f306, %rs19; div.rn.f32 %f307, %f306, 0f437F0000; fma.rn.f32 %f308, %f307, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f309, %rs17; div.rn.f32 %f310, %f309, 0f437F0000; fma.rn.f32 %f311, %f310, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f312, %rs14; div.rn.f32 %f313, %f312, 0f437F0000; fma.rn.f32 %f314, %f313, 0f40000000, 0fBF800000; mul.f32 %f315, %f311, %f311; fma.rn.f32 %f316, %f308, %f308, %f315; fma.rn.f32 %f317, %f314, %f314, %f316; sqrt.rn.f32 %f318, %f317; rcp.rn.f32 %f319, %f318; mul.f32 %f1712, %f308, %f319; mul.f32 %f1713, %f311, %f319; mul.f32 %f1714, %f314, %f319; BB0_2: ld.global.v2.u32 {%r120, %r121}, [pixelID]; ld.global.v2.u32 {%r123, %r124}, [tileInfo]; add.s32 %r2, %r120, %r123; add.s32 %r3, %r121, %r124; setp.eq.f32 %p7, %f1713, 0f00000000; setp.eq.f32 %p8, %f1712, 0f00000000; and.pred %p9, %p8, %p7; setp.eq.f32 %p10, %f1714, 0f00000000; and.pred %p11, %p9, %p10; @%p11 bra BB0_170; bra.uni BB0_3; BB0_170: ld.global.u32 %r524, [imageEnabled]; and.b32 %r453, %r524, 1; setp.eq.b32 %p188, %r453, 1; @!%p188 bra BB0_172; bra.uni BB0_171; BB0_171: cvt.u64.u32 %rd215, %r2; cvt.u64.u32 %rd216, %r3; mov.u64 %rd219, image; cvta.global.u64 %rd214, %rd219; mov.u64 %rd218, 0; // inline asm call (%rd213), _rt_buffer_get_64, (%rd214, %r113, %r114, %rd215, %rd216, %rd218, %rd218); // inline asm mov.u16 %rs121, 0; st.v4.u8 [%rd213], {%rs121, %rs121, %rs121, %rs121}; ld.global.u32 %r524, [imageEnabled]; BB0_172: and.b32 %r456, %r524, 8; setp.eq.s32 %p189, %r456, 0; @%p189 bra BB0_174; cvt.u64.u32 %rd223, %r3; cvt.u64.u32 %rd222, %r2; mov.u64 %rd226, image_Mask; cvta.global.u64 %rd221, %rd226; mov.u64 %rd225, 0; // inline asm call (%rd220), _rt_buffer_get_64, (%rd221, %r113, %r113, %rd222, %rd223, %rd225, %rd225); // inline asm mov.f32 %f1681, 0f00000000; cvt.rzi.u32.f32 %r459, %f1681; cvt.u16.u32 %rs122, %r459; mov.u16 %rs123, 0; st.v2.u8 [%rd220], {%rs122, %rs123}; ld.global.u32 %r524, [imageEnabled]; BB0_174: cvt.u64.u32 %rd25, %r2; cvt.u64.u32 %rd26, %r3; and.b32 %r460, %r524, 4; setp.eq.s32 %p190, %r460, 0; @%p190 bra BB0_178; ld.global.u32 %r461, [additive]; setp.eq.s32 %p191, %r461, 0; @%p191 bra BB0_177; mov.u64 %rd239, image_HDR; cvta.global.u64 %rd228, %rd239; mov.u32 %r465, 8; mov.u64 %rd238, 0; // inline asm call (%rd227), _rt_buffer_get_64, (%rd228, %r113, %r465, %rd25, %rd26, %rd238, %rd238); // inline asm ld.v4.u16 {%rs130, %rs131, %rs132, %rs133}, [%rd227]; // inline asm { cvt.f32.f16 %f1682, %rs130;} // inline asm // inline asm { cvt.f32.f16 %f1683, %rs131;} // inline asm // inline asm { cvt.f32.f16 %f1684, %rs132;} // inline asm // inline asm call (%rd233), _rt_buffer_get_64, (%rd228, %r113, %r465, %rd25, %rd26, %rd238, %rd238); // inline asm add.f32 %f1685, %f1682, 0f00000000; add.f32 %f1686, %f1683, 0f00000000; add.f32 %f1687, %f1684, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs129, %f1687;} // inline asm // inline asm { cvt.rn.f16.f32 %rs128, %f1686;} // inline asm // inline asm { cvt.rn.f16.f32 %rs127, %f1685;} // inline asm mov.u16 %rs134, 0; st.v4.u16 [%rd233], {%rs127, %rs128, %rs129, %rs134}; bra.uni BB0_178; BB0_3: ld.global.f32 %f8, [directDir+4]; ld.global.f32 %f9, [directDir+8]; ld.global.f32 %f7, [directDir]; ld.global.v2.u32 {%r136, %r137}, [pixelID]; cvt.u64.u32 %rd36, %r136; cvt.u64.u32 %rd37, %r137; mov.u64 %rd58, uvpos; cvta.global.u64 %rd35, %rd58; mov.u32 %r133, 12; // inline asm call (%rd34), _rt_buffer_get_64, (%rd35, %r113, %r133, %rd36, %rd37, %rd32, %rd32); // inline asm ld.f32 %f324, [%rd34+8]; ld.f32 %f325, [%rd34+4]; ld.f32 %f326, [%rd34]; mul.f32 %f327, %f326, 0f3456BF95; mul.f32 %f328, %f325, 0f3456BF95; mul.f32 %f329, %f324, 0f3456BF95; abs.f32 %f330, %f1712; div.rn.f32 %f331, %f327, %f330; abs.f32 %f332, %f1713; div.rn.f32 %f333, %f328, %f332; abs.f32 %f334, %f1714; div.rn.f32 %f335, %f329, %f334; abs.f32 %f336, %f331; abs.f32 %f337, %f333; abs.f32 %f338, %f335; mov.f32 %f339, 0f38D1B717; max.f32 %f340, %f336, %f339; max.f32 %f341, %f337, %f339; max.f32 %f342, %f338, %f339; fma.rn.f32 %f10, %f1712, %f340, %f326; fma.rn.f32 %f11, %f1713, %f341, %f325; fma.rn.f32 %f12, %f1714, %f342, %f324; setp.gt.f32 %p12, %f330, %f334; neg.f32 %f343, %f1713; selp.f32 %f344, %f343, 0f00000000, %p12; neg.f32 %f345, %f1714; selp.f32 %f346, %f1712, %f345, %p12; selp.f32 %f347, 0f00000000, %f1713, %p12; mul.f32 %f348, %f346, %f346; fma.rn.f32 %f349, %f344, %f344, %f348; fma.rn.f32 %f350, %f347, %f347, %f349; sqrt.rn.f32 %f351, %f350; rcp.rn.f32 %f352, %f351; mul.f32 %f13, %f344, %f352; mul.f32 %f14, %f346, %f352; mul.f32 %f15, %f347, %f352; mul.f32 %f353, %f1714, %f14; mul.f32 %f354, %f1713, %f15; sub.f32 %f16, %f353, %f354; mul.f32 %f355, %f1712, %f15; mul.f32 %f356, %f1714, %f13; sub.f32 %f17, %f355, %f356; mul.f32 %f357, %f1713, %f13; mul.f32 %f358, %f1712, %f14; sub.f32 %f18, %f357, %f358; ld.global.v2.u32 {%r140, %r141}, [pixelID]; cvt.u64.u32 %rd43, %r141; add.s32 %r144, %r140, 1; ld.global.u32 %r145, [resolution]; add.s32 %r146, %r145, -1; min.u32 %r147, %r144, %r146; cvt.u64.u32 %rd42, %r147; // inline asm call (%rd40), _rt_buffer_get_64, (%rd35, %r113, %r133, %rd42, %rd43, %rd32, %rd32); // inline asm ld.f32 %f359, [%rd40+8]; ld.f32 %f360, [%rd40+4]; ld.f32 %f361, [%rd40]; setp.eq.f32 %p13, %f361, 0f00000000; setp.eq.f32 %p14, %f360, 0f00000000; and.pred %p15, %p13, %p14; setp.eq.f32 %p16, %f359, 0f00000000; and.pred %p17, %p15, %p16; selp.f32 %f362, %f326, %f361, %p17; selp.f32 %f363, %f325, %f360, %p17; selp.f32 %f364, %f324, %f359, %p17; ld.global.v2.u32 {%r148, %r149}, [pixelID]; add.s32 %r152, %r149, 1; ld.global.u32 %r153, [resolution+4]; add.s32 %r154, %r153, -1; min.u32 %r155, %r152, %r154; cvt.u64.u32 %rd48, %r148; cvt.u64.u32 %rd49, %r155; // inline asm call (%rd46), _rt_buffer_get_64, (%rd35, %r113, %r133, %rd48, %rd49, %rd32, %rd32); // inline asm ld.f32 %f365, [%rd46+8]; ld.f32 %f366, [%rd46+4]; ld.f32 %f367, [%rd46]; setp.eq.f32 %p18, %f367, 0f00000000; setp.eq.f32 %p19, %f366, 0f00000000; and.pred %p20, %p18, %p19; setp.eq.f32 %p21, %f365, 0f00000000; and.pred %p22, %p20, %p21; selp.f32 %f368, %f326, %f367, %p22; selp.f32 %f369, %f325, %f366, %p22; selp.f32 %f370, %f324, %f365, %p22; sub.f32 %f371, %f362, %f326; sub.f32 %f372, %f363, %f325; sub.f32 %f373, %f364, %f324; sub.f32 %f374, %f368, %f326; sub.f32 %f375, %f369, %f325; sub.f32 %f376, %f370, %f324; abs.f32 %f377, %f371; abs.f32 %f378, %f374; max.f32 %f379, %f377, %f378; abs.f32 %f380, %f372; abs.f32 %f381, %f375; max.f32 %f382, %f380, %f381; abs.f32 %f383, %f373; abs.f32 %f384, %f376; max.f32 %f385, %f383, %f384; max.f32 %f386, %f379, %f382; max.f32 %f387, %f386, %f385; setp.neu.f32 %p23, %f371, 0f00000000; setp.neu.f32 %p24, %f372, 0f00000000; or.pred %p25, %p23, %p24; setp.neu.f32 %p26, %f373, 0f00000000; setp.neu.f32 %p27, %f374, 0f00000000; setp.neu.f32 %p28, %f375, 0f00000000; or.pred %p29, %p27, %p28; setp.neu.f32 %p30, %f376, 0f00000000; or.pred %p31, %p29, %p30; or.pred %p32, %p25, %p26; and.pred %p33, %p32, %p31; selp.f32 %f19, %f387, 0f00000000, %p33; abs.f32 %f388, %f7; abs.f32 %f389, %f9; setp.gt.f32 %p34, %f388, %f389; neg.f32 %f390, %f8; neg.f32 %f391, %f9; selp.f32 %f392, %f390, 0f00000000, %p34; selp.f32 %f393, %f7, %f391, %p34; selp.f32 %f394, 0f00000000, %f8, %p34; mul.f32 %f395, %f393, %f393; fma.rn.f32 %f396, %f392, %f392, %f395; fma.rn.f32 %f397, %f394, %f394, %f396; sqrt.rn.f32 %f398, %f397; rcp.rn.f32 %f399, %f398; mul.f32 %f20, %f392, %f399; mul.f32 %f21, %f393, %f399; mul.f32 %f22, %f394, %f399; ld.global.v2.u32 {%r156, %r157}, [pixelID]; cvt.u64.u32 %rd54, %r156; cvt.u64.u32 %rd55, %r157; mov.u64 %rd59, rnd_seeds; cvta.global.u64 %rd53, %rd59; // inline asm call (%rd52), _rt_buffer_get_64, (%rd53, %r113, %r114, %rd54, %rd55, %rd32, %rd32); // inline asm ld.global.u32 %r493, [samples]; mov.f32 %f36, 0f00000000; setp.lt.s32 %p35, %r493, 1; @%p35 bra BB0_4; cvt.rn.f32.s32 %f404, %r493; rcp.rn.f32 %f23, %f404; ld.u32 %r519, [%rd52]; mul.f32 %f24, %f10, 0f3456BF95; mul.f32 %f25, %f11, 0f3456BF95; mul.f32 %f26, %f12, 0f3456BF95; mul.f32 %f405, %f7, %f21; mul.f32 %f406, %f8, %f20; sub.f32 %f27, %f406, %f405; mul.f32 %f407, %f9, %f20; mul.f32 %f408, %f7, %f22; sub.f32 %f28, %f408, %f407; mul.f32 %f409, %f8, %f22; mul.f32 %f410, %f9, %f21; sub.f32 %f29, %f410, %f409; mov.f32 %f36, 0f00000000; mov.u32 %r494, 0; abs.f32 %f411, %f25; abs.f32 %f412, %f24; max.f32 %f413, %f412, %f411; abs.f32 %f414, %f26; max.f32 %f415, %f413, %f414; mov.f32 %f37, %f36; mov.f32 %f38, %f36; mov.f32 %f39, %f36; BB0_6: setp.lt.s32 %p36, %r493, 1; @%p36 bra BB0_89; mov.u32 %r496, 0; BB0_8: cvt.rn.f32.s32 %f1710, %r494; mad.lo.s32 %r162, %r519, 1664525, 1013904223; and.b32 %r163, %r162, 16777215; cvt.rn.f32.u32 %f417, %r163; fma.rn.f32 %f418, %f417, 0f33800000, %f1710; mul.f32 %f419, %f23, %f418; mad.lo.s32 %r11, %r162, 1664525, 1013904223; and.b32 %r164, %r11, 16777215; cvt.rn.f32.u32 %f420, %r164; cvt.rn.f32.s32 %f421, %r496; fma.rn.f32 %f422, %f420, 0f33800000, %f421; mul.f32 %f423, %f23, %f422; sqrt.rn.f32 %f40, %f419; mul.f32 %f1729, %f423, 0f40C90FDB; abs.f32 %f42, %f1729; setp.neu.f32 %p37, %f42, 0f7F800000; mov.f32 %f1723, %f1729; @%p37 bra BB0_10; mov.f32 %f424, 0f00000000; mul.rn.f32 %f1723, %f1729, %f424; BB0_10: mul.f32 %f425, %f1723, 0f3F22F983; cvt.rni.s32.f32 %r507, %f425; cvt.rn.f32.s32 %f426, %r507; neg.f32 %f427, %f426; mov.f32 %f428, 0f3FC90FDA; fma.rn.f32 %f429, %f427, %f428, %f1723; mov.f32 %f430, 0f33A22168; fma.rn.f32 %f431, %f427, %f430, %f429; mov.f32 %f432, 0f27C234C5; fma.rn.f32 %f1724, %f427, %f432, %f431; abs.f32 %f433, %f1723; setp.leu.f32 %p38, %f433, 0f47CE4780; @%p38 bra BB0_21; add.u64 %rd61, %SP, 24; cvta.to.local.u64 %rd3, %rd61; mov.b32 %r13, %f1723; shr.u32 %r14, %r13, 23; shl.b32 %r167, %r13, 8; or.b32 %r15, %r167, -2147483648; mov.u32 %r498, 0; mov.u64 %rd308, 0; mov.u64 %rd307, %rd3; mov.u32 %r499, %r498; BB0_12: .pragma "nounroll"; shl.b64 %rd62, %rd308, 2; mov.u64 %rd63, __cudart_i2opi_f; add.s64 %rd64, %rd63, %rd62; ld.const.u32 %r170, [%rd64]; // inline asm { mad.lo.cc.u32 %r168, %r170, %r15, %r499; madc.hi.u32 %r499, %r170, %r15, 0; } // inline asm st.local.u32 [%rd307], %r168; add.s32 %r498, %r498, 1; cvt.s64.s32 %rd308, %r498; mul.wide.s32 %rd67, %r498, 4; add.s64 %rd307, %rd3, %rd67; setp.ne.s32 %p39, %r498, 6; @%p39 bra BB0_12; and.b32 %r173, %r14, 255; add.s32 %r174, %r173, -128; shr.u32 %r175, %r174, 5; and.b32 %r20, %r13, -2147483648; cvta.to.local.u64 %rd69, %rd61; st.local.u32 [%rd69+24], %r499; mov.u32 %r176, 6; sub.s32 %r177, %r176, %r175; mul.wide.s32 %rd70, %r177, 4; add.s64 %rd8, %rd69, %rd70; ld.local.u32 %r500, [%rd8]; ld.local.u32 %r501, [%rd8+-4]; and.b32 %r23, %r14, 31; setp.eq.s32 %p40, %r23, 0; @%p40 bra BB0_15; mov.u32 %r178, 32; sub.s32 %r179, %r178, %r23; shr.u32 %r180, %r501, %r179; shl.b32 %r181, %r500, %r23; add.s32 %r500, %r180, %r181; ld.local.u32 %r182, [%rd8+-8]; shr.u32 %r183, %r182, %r179; shl.b32 %r184, %r501, %r23; add.s32 %r501, %r183, %r184; BB0_15: shr.u32 %r185, %r501, 30; shl.b32 %r186, %r500, 2; add.s32 %r502, %r185, %r186; shl.b32 %r29, %r501, 2; shr.u32 %r187, %r502, 31; shr.u32 %r188, %r500, 30; add.s32 %r30, %r187, %r188; setp.eq.s32 %p41, %r187, 0; @%p41 bra BB0_16; bra.uni BB0_17; BB0_16: mov.u32 %r503, %r20; mov.u32 %r504, %r29; bra.uni BB0_18; BB0_17: not.b32 %r189, %r502; neg.s32 %r504, %r29; setp.eq.s32 %p42, %r29, 0; selp.u32 %r190, 1, 0, %p42; add.s32 %r502, %r190, %r189; xor.b32 %r503, %r20, -2147483648; BB0_18: clz.b32 %r506, %r502; setp.eq.s32 %p43, %r506, 0; shl.b32 %r191, %r502, %r506; mov.u32 %r192, 32; sub.s32 %r193, %r192, %r506; shr.u32 %r194, %r504, %r193; add.s32 %r195, %r194, %r191; selp.b32 %r38, %r502, %r195, %p43; mov.u32 %r196, -921707870; mul.hi.u32 %r505, %r38, %r196; setp.eq.s32 %p44, %r20, 0; neg.s32 %r197, %r30; selp.b32 %r507, %r30, %r197, %p44; setp.lt.s32 %p45, %r505, 1; @%p45 bra BB0_20; mul.lo.s32 %r198, %r38, -921707870; shr.u32 %r199, %r198, 31; shl.b32 %r200, %r505, 1; add.s32 %r505, %r199, %r200; add.s32 %r506, %r506, 1; BB0_20: mov.u32 %r201, 126; sub.s32 %r202, %r201, %r506; shl.b32 %r203, %r202, 23; add.s32 %r204, %r505, 1; shr.u32 %r205, %r204, 7; add.s32 %r206, %r205, 1; shr.u32 %r207, %r206, 1; add.s32 %r208, %r207, %r203; or.b32 %r209, %r208, %r503; mov.b32 %f1724, %r209; BB0_21: mul.rn.f32 %f48, %f1724, %f1724; add.s32 %r46, %r507, 1; and.b32 %r47, %r46, 1; setp.eq.s32 %p46, %r47, 0; @%p46 bra BB0_23; bra.uni BB0_22; BB0_23: mov.f32 %f436, 0f3C08839E; mov.f32 %f437, 0fB94CA1F9; fma.rn.f32 %f1725, %f437, %f48, %f436; bra.uni BB0_24; BB0_22: mov.f32 %f434, 0fBAB6061A; mov.f32 %f435, 0f37CCF5CE; fma.rn.f32 %f1725, %f435, %f48, %f434; BB0_24: @%p46 bra BB0_26; bra.uni BB0_25; BB0_26: mov.f32 %f441, 0fBE2AAAA3; fma.rn.f32 %f442, %f1725, %f48, %f441; mov.f32 %f443, 0f00000000; fma.rn.f32 %f1726, %f442, %f48, %f443; bra.uni BB0_27; BB0_25: mov.f32 %f438, 0f3D2AAAA5; fma.rn.f32 %f439, %f1725, %f48, %f438; mov.f32 %f440, 0fBF000000; fma.rn.f32 %f1726, %f439, %f48, %f440; BB0_27: fma.rn.f32 %f1727, %f1726, %f1724, %f1724; @%p46 bra BB0_29; mov.f32 %f444, 0f3F800000; fma.rn.f32 %f1727, %f1726, %f48, %f444; BB0_29: and.b32 %r210, %r46, 2; setp.eq.s32 %p49, %r210, 0; @%p49 bra BB0_31; mov.f32 %f445, 0f00000000; mov.f32 %f446, 0fBF800000; fma.rn.f32 %f1727, %f1727, %f446, %f445; BB0_31: @%p37 bra BB0_33; mov.f32 %f447, 0f00000000; mul.rn.f32 %f1729, %f1729, %f447; BB0_33: mul.f32 %f448, %f1729, 0f3F22F983; cvt.rni.s32.f32 %r517, %f448; cvt.rn.f32.s32 %f449, %r517; neg.f32 %f450, %f449; fma.rn.f32 %f452, %f450, %f428, %f1729; fma.rn.f32 %f454, %f450, %f430, %f452; fma.rn.f32 %f1730, %f450, %f432, %f454; abs.f32 %f456, %f1729; setp.leu.f32 %p51, %f456, 0f47CE4780; @%p51 bra BB0_44; add.u64 %rd72, %SP, 24; cvta.to.local.u64 %rd9, %rd72; mov.b32 %r49, %f1729; shr.u32 %r50, %r49, 23; shl.b32 %r213, %r49, 8; or.b32 %r51, %r213, -2147483648; mov.u32 %r508, 0; mov.u64 %rd309, %rd9; mov.u64 %rd310, %rd32; mov.u32 %r509, %r508; BB0_35: .pragma "nounroll"; shl.b64 %rd73, %rd310, 2; mov.u64 %rd74, __cudart_i2opi_f; add.s64 %rd75, %rd74, %rd73; ld.const.u32 %r216, [%rd75]; // inline asm { mad.lo.cc.u32 %r214, %r216, %r51, %r509; madc.hi.u32 %r509, %r216, %r51, 0; } // inline asm st.local.u32 [%rd309], %r214; add.s32 %r508, %r508, 1; cvt.s64.s32 %rd310, %r508; mul.wide.s32 %rd76, %r508, 4; add.s64 %rd309, %rd9, %rd76; setp.ne.s32 %p52, %r508, 6; @%p52 bra BB0_35; and.b32 %r219, %r50, 255; add.s32 %r220, %r219, -128; shr.u32 %r221, %r220, 5; and.b32 %r56, %r49, -2147483648; cvta.to.local.u64 %rd78, %rd72; st.local.u32 [%rd78+24], %r509; mov.u32 %r222, 6; sub.s32 %r223, %r222, %r221; mul.wide.s32 %rd79, %r223, 4; add.s64 %rd15, %rd78, %rd79; ld.local.u32 %r510, [%rd15]; ld.local.u32 %r511, [%rd15+-4]; and.b32 %r59, %r50, 31; setp.eq.s32 %p53, %r59, 0; @%p53 bra BB0_38; mov.u32 %r224, 32; sub.s32 %r225, %r224, %r59; shr.u32 %r226, %r511, %r225; shl.b32 %r227, %r510, %r59; add.s32 %r510, %r226, %r227; ld.local.u32 %r228, [%rd15+-8]; shr.u32 %r229, %r228, %r225; shl.b32 %r230, %r511, %r59; add.s32 %r511, %r229, %r230; BB0_38: shr.u32 %r231, %r511, 30; shl.b32 %r232, %r510, 2; add.s32 %r512, %r231, %r232; shl.b32 %r65, %r511, 2; shr.u32 %r233, %r512, 31; shr.u32 %r234, %r510, 30; add.s32 %r66, %r233, %r234; setp.eq.s32 %p54, %r233, 0; @%p54 bra BB0_39; bra.uni BB0_40; BB0_39: mov.u32 %r513, %r56; mov.u32 %r514, %r65; bra.uni BB0_41; BB0_40: not.b32 %r235, %r512; neg.s32 %r514, %r65; setp.eq.s32 %p55, %r65, 0; selp.u32 %r236, 1, 0, %p55; add.s32 %r512, %r236, %r235; xor.b32 %r513, %r56, -2147483648; BB0_41: clz.b32 %r516, %r512; setp.eq.s32 %p56, %r516, 0; shl.b32 %r237, %r512, %r516; mov.u32 %r238, 32; sub.s32 %r239, %r238, %r516; shr.u32 %r240, %r514, %r239; add.s32 %r241, %r240, %r237; selp.b32 %r74, %r512, %r241, %p56; mov.u32 %r242, -921707870; mul.hi.u32 %r515, %r74, %r242; setp.eq.s32 %p57, %r56, 0; neg.s32 %r243, %r66; selp.b32 %r517, %r66, %r243, %p57; setp.lt.s32 %p58, %r515, 1; @%p58 bra BB0_43; mul.lo.s32 %r244, %r74, -921707870; shr.u32 %r245, %r244, 31; shl.b32 %r246, %r515, 1; add.s32 %r515, %r245, %r246; add.s32 %r516, %r516, 1; BB0_43: mov.u32 %r247, 126; sub.s32 %r248, %r247, %r516; shl.b32 %r249, %r248, 23; add.s32 %r250, %r515, 1; shr.u32 %r251, %r250, 7; add.s32 %r252, %r251, 1; shr.u32 %r253, %r252, 1; add.s32 %r254, %r253, %r249; or.b32 %r255, %r254, %r513; mov.b32 %f1730, %r255; BB0_44: mul.rn.f32 %f65, %f1730, %f1730; and.b32 %r82, %r517, 1; setp.eq.s32 %p59, %r82, 0; @%p59 bra BB0_46; bra.uni BB0_45; BB0_46: mov.f32 %f459, 0f3C08839E; mov.f32 %f460, 0fB94CA1F9; fma.rn.f32 %f1731, %f460, %f65, %f459; bra.uni BB0_47; BB0_45: mov.f32 %f457, 0fBAB6061A; mov.f32 %f458, 0f37CCF5CE; fma.rn.f32 %f1731, %f458, %f65, %f457; BB0_47: @%p59 bra BB0_49; bra.uni BB0_48; BB0_49: mov.f32 %f464, 0fBE2AAAA3; fma.rn.f32 %f465, %f1731, %f65, %f464; mov.f32 %f466, 0f00000000; fma.rn.f32 %f1732, %f465, %f65, %f466; bra.uni BB0_50; BB0_48: mov.f32 %f461, 0f3D2AAAA5; fma.rn.f32 %f462, %f1731, %f65, %f461; mov.f32 %f463, 0fBF000000; fma.rn.f32 %f1732, %f462, %f65, %f463; BB0_50: fma.rn.f32 %f1733, %f1732, %f1730, %f1730; @%p59 bra BB0_52; mov.f32 %f467, 0f3F800000; fma.rn.f32 %f1733, %f1732, %f65, %f467; BB0_52: and.b32 %r256, %r517, 2; setp.eq.s32 %p62, %r256, 0; @%p62 bra BB0_54; mov.f32 %f468, 0f00000000; mov.f32 %f469, 0fBF800000; fma.rn.f32 %f1733, %f1733, %f469, %f468; BB0_54: max.f32 %f1711, %f415, %f339; mul.f32 %f478, %f40, %f1727; add.u64 %rd80, %SP, 12; cvta.to.local.u64 %rd16, %rd80; mul.f32 %f479, %f478, %f478; mov.f32 %f480, 0f3F800000; sub.f32 %f481, %f480, %f479; mul.f32 %f482, %f40, %f1733; mul.f32 %f483, %f482, %f482; sub.f32 %f484, %f481, %f483; mov.f32 %f485, 0f00000000; max.f32 %f486, %f485, %f484; sqrt.rn.f32 %f487, %f486; mul.f32 %f488, %f20, %f482; mul.f32 %f489, %f21, %f482; mul.f32 %f490, %f22, %f482; fma.rn.f32 %f491, %f29, %f478, %f488; fma.rn.f32 %f492, %f28, %f478, %f489; fma.rn.f32 %f493, %f27, %f478, %f490; fma.rn.f32 %f494, %f7, %f487, %f491; fma.rn.f32 %f495, %f8, %f487, %f492; fma.rn.f32 %f496, %f9, %f487, %f493; add.f32 %f497, %f7, %f494; add.f32 %f498, %f8, %f495; add.f32 %f499, %f9, %f496; ld.global.f32 %f500, [shadowSpread]; mul.f32 %f501, %f500, %f497; mul.f32 %f502, %f500, %f498; mul.f32 %f503, %f500, %f499; sub.f32 %f504, %f501, %f7; sub.f32 %f505, %f502, %f8; sub.f32 %f506, %f503, %f9; mul.f32 %f507, %f505, %f505; fma.rn.f32 %f508, %f504, %f504, %f507; fma.rn.f32 %f509, %f506, %f506, %f508; sqrt.rn.f32 %f510, %f509; rcp.rn.f32 %f511, %f510; mul.f32 %f77, %f511, %f504; mul.f32 %f78, %f511, %f505; mul.f32 %f79, %f511, %f506; ld.global.u32 %r260, [imageEnabled]; and.b32 %r261, %r260, 32; setp.eq.s32 %p63, %r261, 0; selp.f32 %f512, 0f3F800000, 0f41200000, %p63; mul.f32 %f476, %f512, %f1711; mad.lo.s32 %r262, %r11, 1664525, 1013904223; and.b32 %r263, %r262, 16777215; cvt.rn.f32.u32 %f513, %r263; mul.f32 %f514, %f513, 0f33800000; fma.rn.f32 %f515, %f514, 0f40000000, 0fBF800000; mad.lo.s32 %r83, %r262, 1664525, 1013904223; and.b32 %r264, %r83, 16777215; cvt.rn.f32.u32 %f516, %r264; mul.f32 %f517, %f516, 0f33800000; fma.rn.f32 %f518, %f517, 0f40000000, 0fBF800000; mul.f32 %f519, %f13, %f518; mul.f32 %f520, %f14, %f518; mul.f32 %f521, %f15, %f518; fma.rn.f32 %f522, %f16, %f515, %f519; fma.rn.f32 %f523, %f17, %f515, %f520; fma.rn.f32 %f524, %f18, %f515, %f521; mul.f32 %f525, %f523, %f523; fma.rn.f32 %f526, %f522, %f522, %f525; fma.rn.f32 %f527, %f524, %f524, %f526; sqrt.rn.f32 %f528, %f527; rcp.rn.f32 %f529, %f528; mul.f32 %f530, %f522, %f529; mul.f32 %f531, %f523, %f529; mul.f32 %f532, %f524, %f529; mul.f32 %f533, %f1713, %f532; mul.f32 %f534, %f1714, %f531; sub.f32 %f535, %f533, %f534; mul.f32 %f536, %f1714, %f530; mul.f32 %f537, %f1712, %f532; sub.f32 %f538, %f536, %f537; mul.f32 %f539, %f1712, %f531; mul.f32 %f540, %f1713, %f530; sub.f32 %f541, %f539, %f540; mul.f32 %f542, %f530, 0f3E24A490; mul.f32 %f543, %f531, 0f3E24A490; mul.f32 %f544, %f532, 0f3E24A490; fma.rn.f32 %f545, %f19, %f542, %f10; fma.rn.f32 %f546, %f19, %f543, %f11; fma.rn.f32 %f547, %f19, %f544, %f12; mul.f32 %f548, %f535, 0fBECECEDE; mul.f32 %f549, %f538, 0fBECECEDE; mul.f32 %f550, %f541, 0fBECECEDE; fma.rn.f32 %f81, %f19, %f548, %f545; fma.rn.f32 %f82, %f19, %f549, %f546; fma.rn.f32 %f83, %f19, %f550, %f547; sub.f32 %f551, %f81, %f10; sub.f32 %f552, %f82, %f11; sub.f32 %f553, %f83, %f12; mul.f32 %f554, %f552, %f552; fma.rn.f32 %f555, %f551, %f551, %f554; fma.rn.f32 %f556, %f553, %f553, %f555; sqrt.rn.f32 %f477, %f556; rcp.rn.f32 %f557, %f477; mul.f32 %f473, %f557, %f551; mul.f32 %f474, %f557, %f552; mul.f32 %f475, %f557, %f553; mov.u32 %r265, 1065353216; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r257, [root]; mov.u32 %r258, 1; // inline asm call _rt_trace_64, (%r257, %f10, %f11, %f12, %f473, %f474, %f475, %r258, %f476, %f477, %rd80, %r133); // inline asm ld.local.f32 %f558, [%rd16]; mov.u16 %rs179, 0; setp.neu.f32 %p64, %f558, 0f3F800000; @%p64 bra BB0_58; mov.u16 %rs179, 0; ld.local.f32 %f559, [%rd16+4]; setp.neu.f32 %p65, %f559, 0f3F800000; @%p65 bra BB0_58; mov.u16 %rs179, 0; ld.local.f32 %f560, [%rd16+8]; setp.neu.f32 %p66, %f560, 0f3F800000; @%p66 bra BB0_58; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r266, [root]; mov.f32 %f568, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r266, %f81, %f82, %f83, %f77, %f78, %f79, %r258, %f476, %f568, %rd80, %r133); // inline asm ld.local.f32 %f569, [%rd16]; add.f32 %f39, %f39, %f569; ld.local.f32 %f570, [%rd16+4]; add.f32 %f38, %f38, %f570; ld.local.f32 %f571, [%rd16+8]; add.f32 %f37, %f37, %f571; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_58: mad.lo.s32 %r273, %r83, 1664525, 1013904223; and.b32 %r274, %r273, 16777215; cvt.rn.f32.u32 %f580, %r274; mul.f32 %f581, %f580, 0f33800000; fma.rn.f32 %f582, %f581, 0f40000000, 0fBF800000; mad.lo.s32 %r84, %r273, 1664525, 1013904223; and.b32 %r275, %r84, 16777215; cvt.rn.f32.u32 %f583, %r275; mul.f32 %f584, %f583, 0f33800000; fma.rn.f32 %f585, %f584, 0f40000000, 0fBF800000; mul.f32 %f586, %f13, %f585; mul.f32 %f587, %f14, %f585; mul.f32 %f588, %f15, %f585; fma.rn.f32 %f589, %f16, %f582, %f586; fma.rn.f32 %f590, %f17, %f582, %f587; fma.rn.f32 %f591, %f18, %f582, %f588; mul.f32 %f592, %f590, %f590; fma.rn.f32 %f593, %f589, %f589, %f592; fma.rn.f32 %f594, %f591, %f591, %f593; sqrt.rn.f32 %f595, %f594; rcp.rn.f32 %f596, %f595; mul.f32 %f597, %f589, %f596; mul.f32 %f598, %f590, %f596; mul.f32 %f599, %f591, %f596; mul.f32 %f600, %f1713, %f599; mul.f32 %f601, %f1714, %f598; sub.f32 %f602, %f600, %f601; mul.f32 %f603, %f1714, %f597; mul.f32 %f604, %f1712, %f599; sub.f32 %f605, %f603, %f604; mul.f32 %f606, %f1712, %f598; mul.f32 %f607, %f1713, %f597; sub.f32 %f608, %f606, %f607; mul.f32 %f609, %f597, 0fBE24A490; mul.f32 %f610, %f598, 0fBE24A490; mul.f32 %f611, %f599, 0fBE24A490; fma.rn.f32 %f612, %f19, %f609, %f10; fma.rn.f32 %f613, %f19, %f610, %f11; fma.rn.f32 %f614, %f19, %f611, %f12; mul.f32 %f615, %f602, 0f3ECACABC; mul.f32 %f616, %f605, 0f3ECACABC; mul.f32 %f617, %f608, 0f3ECACABC; fma.rn.f32 %f92, %f19, %f615, %f612; fma.rn.f32 %f93, %f19, %f616, %f613; fma.rn.f32 %f94, %f19, %f617, %f614; sub.f32 %f618, %f92, %f10; sub.f32 %f619, %f93, %f11; sub.f32 %f620, %f94, %f12; mul.f32 %f621, %f619, %f619; fma.rn.f32 %f622, %f618, %f618, %f621; fma.rn.f32 %f623, %f620, %f620, %f622; sqrt.rn.f32 %f579, %f623; rcp.rn.f32 %f624, %f579; mul.f32 %f575, %f624, %f618; mul.f32 %f576, %f624, %f619; mul.f32 %f577, %f624, %f620; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r270, [root]; // inline asm call _rt_trace_64, (%r270, %f10, %f11, %f12, %f575, %f576, %f577, %r258, %f476, %f579, %rd80, %r133); // inline asm ld.local.f32 %f625, [%rd16]; setp.neu.f32 %p67, %f625, 0f3F800000; @%p67 bra BB0_62; ld.local.f32 %f626, [%rd16+4]; setp.neu.f32 %p68, %f626, 0f3F800000; @%p68 bra BB0_62; ld.local.f32 %f627, [%rd16+8]; setp.neu.f32 %p69, %f627, 0f3F800000; @%p69 bra BB0_62; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r277, [root]; mov.f32 %f635, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r277, %f92, %f93, %f94, %f77, %f78, %f79, %r258, %f476, %f635, %rd80, %r133); // inline asm ld.local.f32 %f636, [%rd16]; add.f32 %f39, %f39, %f636; ld.local.f32 %f637, [%rd16+4]; add.f32 %f38, %f38, %f637; ld.local.f32 %f638, [%rd16+8]; add.f32 %f37, %f37, %f638; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_62: mad.lo.s32 %r284, %r84, 1664525, 1013904223; and.b32 %r285, %r284, 16777215; cvt.rn.f32.u32 %f647, %r285; mul.f32 %f648, %f647, 0f33800000; fma.rn.f32 %f649, %f648, 0f40000000, 0fBF800000; mad.lo.s32 %r85, %r284, 1664525, 1013904223; and.b32 %r286, %r85, 16777215; cvt.rn.f32.u32 %f650, %r286; mul.f32 %f651, %f650, 0f33800000; fma.rn.f32 %f652, %f651, 0f40000000, 0fBF800000; mul.f32 %f653, %f13, %f652; mul.f32 %f654, %f14, %f652; mul.f32 %f655, %f15, %f652; fma.rn.f32 %f656, %f16, %f649, %f653; fma.rn.f32 %f657, %f17, %f649, %f654; fma.rn.f32 %f658, %f18, %f649, %f655; mul.f32 %f659, %f657, %f657; fma.rn.f32 %f660, %f656, %f656, %f659; fma.rn.f32 %f661, %f658, %f658, %f660; sqrt.rn.f32 %f662, %f661; rcp.rn.f32 %f663, %f662; mul.f32 %f664, %f656, %f663; mul.f32 %f665, %f657, %f663; mul.f32 %f666, %f658, %f663; mul.f32 %f667, %f1713, %f666; mul.f32 %f668, %f1714, %f665; sub.f32 %f669, %f667, %f668; mul.f32 %f670, %f1714, %f664; mul.f32 %f671, %f1712, %f666; sub.f32 %f672, %f670, %f671; mul.f32 %f673, %f1712, %f665; mul.f32 %f674, %f1713, %f664; sub.f32 %f675, %f673, %f674; mul.f32 %f676, %f664, 0f3F23A3A8; mul.f32 %f677, %f665, 0f3F23A3A8; mul.f32 %f678, %f666, 0f3F23A3A8; fma.rn.f32 %f679, %f19, %f676, %f10; fma.rn.f32 %f680, %f19, %f677, %f11; fma.rn.f32 %f681, %f19, %f678, %f12; mul.f32 %f682, %f669, 0f3E24A490; mul.f32 %f683, %f672, 0f3E24A490; mul.f32 %f684, %f675, 0f3E24A490; fma.rn.f32 %f103, %f19, %f682, %f679; fma.rn.f32 %f104, %f19, %f683, %f680; fma.rn.f32 %f105, %f19, %f684, %f681; sub.f32 %f685, %f103, %f10; sub.f32 %f686, %f104, %f11; sub.f32 %f687, %f105, %f12; mul.f32 %f688, %f686, %f686; fma.rn.f32 %f689, %f685, %f685, %f688; fma.rn.f32 %f690, %f687, %f687, %f689; sqrt.rn.f32 %f646, %f690; rcp.rn.f32 %f691, %f646; mul.f32 %f642, %f691, %f685; mul.f32 %f643, %f691, %f686; mul.f32 %f644, %f691, %f687; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r281, [root]; // inline asm call _rt_trace_64, (%r281, %f10, %f11, %f12, %f642, %f643, %f644, %r258, %f476, %f646, %rd80, %r133); // inline asm ld.local.f32 %f692, [%rd16]; setp.neu.f32 %p70, %f692, 0f3F800000; @%p70 bra BB0_66; ld.local.f32 %f693, [%rd16+4]; setp.neu.f32 %p71, %f693, 0f3F800000; @%p71 bra BB0_66; ld.local.f32 %f694, [%rd16+8]; setp.neu.f32 %p72, %f694, 0f3F800000; @%p72 bra BB0_66; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r288, [root]; mov.f32 %f702, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r288, %f103, %f104, %f105, %f77, %f78, %f79, %r258, %f476, %f702, %rd80, %r133); // inline asm ld.local.f32 %f703, [%rd16]; add.f32 %f39, %f39, %f703; ld.local.f32 %f704, [%rd16+4]; add.f32 %f38, %f38, %f704; ld.local.f32 %f705, [%rd16+8]; add.f32 %f37, %f37, %f705; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_66: mad.lo.s32 %r295, %r85, 1664525, 1013904223; and.b32 %r296, %r295, 16777215; cvt.rn.f32.u32 %f714, %r296; mul.f32 %f715, %f714, 0f33800000; fma.rn.f32 %f716, %f715, 0f40000000, 0fBF800000; mad.lo.s32 %r86, %r295, 1664525, 1013904223; and.b32 %r297, %r86, 16777215; cvt.rn.f32.u32 %f717, %r297; mul.f32 %f718, %f717, 0f33800000; fma.rn.f32 %f719, %f718, 0f40000000, 0fBF800000; mul.f32 %f720, %f13, %f719; mul.f32 %f721, %f14, %f719; mul.f32 %f722, %f15, %f719; fma.rn.f32 %f723, %f16, %f716, %f720; fma.rn.f32 %f724, %f17, %f716, %f721; fma.rn.f32 %f725, %f18, %f716, %f722; mul.f32 %f726, %f724, %f724; fma.rn.f32 %f727, %f723, %f723, %f726; fma.rn.f32 %f728, %f725, %f725, %f727; sqrt.rn.f32 %f729, %f728; rcp.rn.f32 %f730, %f729; mul.f32 %f731, %f723, %f730; mul.f32 %f732, %f724, %f730; mul.f32 %f733, %f725, %f730; mul.f32 %f734, %f1713, %f733; mul.f32 %f735, %f1714, %f732; sub.f32 %f736, %f734, %f735; mul.f32 %f737, %f1714, %f731; mul.f32 %f738, %f1712, %f733; sub.f32 %f739, %f737, %f738; mul.f32 %f740, %f1712, %f732; mul.f32 %f741, %f1713, %f731; sub.f32 %f742, %f740, %f741; mul.f32 %f743, %f731, 0fBECECEDE; mul.f32 %f744, %f732, 0fBECECEDE; mul.f32 %f745, %f733, 0fBECECEDE; fma.rn.f32 %f746, %f19, %f743, %f10; fma.rn.f32 %f747, %f19, %f744, %f11; fma.rn.f32 %f748, %f19, %f745, %f12; mul.f32 %f749, %f736, 0fBF23A3A9; mul.f32 %f750, %f739, 0fBF23A3A9; mul.f32 %f751, %f742, 0fBF23A3A9; fma.rn.f32 %f114, %f19, %f749, %f746; fma.rn.f32 %f115, %f19, %f750, %f747; fma.rn.f32 %f116, %f19, %f751, %f748; sub.f32 %f752, %f114, %f10; sub.f32 %f753, %f115, %f11; sub.f32 %f754, %f116, %f12; mul.f32 %f755, %f753, %f753; fma.rn.f32 %f756, %f752, %f752, %f755; fma.rn.f32 %f757, %f754, %f754, %f756; sqrt.rn.f32 %f713, %f757; rcp.rn.f32 %f758, %f713; mul.f32 %f709, %f758, %f752; mul.f32 %f710, %f758, %f753; mul.f32 %f711, %f758, %f754; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r292, [root]; // inline asm call _rt_trace_64, (%r292, %f10, %f11, %f12, %f709, %f710, %f711, %r258, %f476, %f713, %rd80, %r133); // inline asm ld.local.f32 %f759, [%rd16]; setp.neu.f32 %p73, %f759, 0f3F800000; @%p73 bra BB0_70; ld.local.f32 %f760, [%rd16+4]; setp.neu.f32 %p74, %f760, 0f3F800000; @%p74 bra BB0_70; ld.local.f32 %f761, [%rd16+8]; setp.neu.f32 %p75, %f761, 0f3F800000; @%p75 bra BB0_70; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r299, [root]; mov.f32 %f769, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r299, %f114, %f115, %f116, %f77, %f78, %f79, %r258, %f476, %f769, %rd80, %r133); // inline asm ld.local.f32 %f770, [%rd16]; add.f32 %f39, %f39, %f770; ld.local.f32 %f771, [%rd16+4]; add.f32 %f38, %f38, %f771; ld.local.f32 %f772, [%rd16+8]; add.f32 %f37, %f37, %f772; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_70: mad.lo.s32 %r306, %r86, 1664525, 1013904223; and.b32 %r307, %r306, 16777215; cvt.rn.f32.u32 %f781, %r307; mul.f32 %f782, %f781, 0f33800000; fma.rn.f32 %f783, %f782, 0f40000000, 0fBF800000; mad.lo.s32 %r87, %r306, 1664525, 1013904223; and.b32 %r308, %r87, 16777215; cvt.rn.f32.u32 %f784, %r308; mul.f32 %f785, %f784, 0f33800000; fma.rn.f32 %f786, %f785, 0f40000000, 0fBF800000; mul.f32 %f787, %f13, %f786; mul.f32 %f788, %f14, %f786; mul.f32 %f789, %f15, %f786; fma.rn.f32 %f790, %f16, %f783, %f787; fma.rn.f32 %f791, %f17, %f783, %f788; fma.rn.f32 %f792, %f18, %f783, %f789; mul.f32 %f793, %f791, %f791; fma.rn.f32 %f794, %f790, %f790, %f793; fma.rn.f32 %f795, %f792, %f792, %f794; sqrt.rn.f32 %f796, %f795; rcp.rn.f32 %f797, %f796; mul.f32 %f798, %f790, %f797; mul.f32 %f799, %f791, %f797; mul.f32 %f800, %f792, %f797; mul.f32 %f801, %f1713, %f800; mul.f32 %f802, %f1714, %f799; sub.f32 %f803, %f801, %f802; mul.f32 %f804, %f1714, %f798; mul.f32 %f805, %f1712, %f800; sub.f32 %f806, %f804, %f805; mul.f32 %f807, %f1712, %f799; mul.f32 %f808, %f1713, %f798; sub.f32 %f809, %f807, %f808; mul.f32 %f810, %f798, 0fBF23A3A9; mul.f32 %f811, %f799, 0fBF23A3A9; mul.f32 %f812, %f800, 0fBF23A3A9; fma.rn.f32 %f813, %f19, %f810, %f10; fma.rn.f32 %f814, %f19, %f811, %f11; fma.rn.f32 %f815, %f19, %f812, %f12; mul.f32 %f816, %f803, 0f3F23A3A8; mul.f32 %f817, %f806, 0f3F23A3A8; mul.f32 %f818, %f809, 0f3F23A3A8; fma.rn.f32 %f125, %f19, %f816, %f813; fma.rn.f32 %f126, %f19, %f817, %f814; fma.rn.f32 %f127, %f19, %f818, %f815; sub.f32 %f819, %f125, %f10; sub.f32 %f820, %f126, %f11; sub.f32 %f821, %f127, %f12; mul.f32 %f822, %f820, %f820; fma.rn.f32 %f823, %f819, %f819, %f822; fma.rn.f32 %f824, %f821, %f821, %f823; sqrt.rn.f32 %f780, %f824; rcp.rn.f32 %f825, %f780; mul.f32 %f776, %f825, %f819; mul.f32 %f777, %f825, %f820; mul.f32 %f778, %f825, %f821; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r303, [root]; // inline asm call _rt_trace_64, (%r303, %f10, %f11, %f12, %f776, %f777, %f778, %r258, %f476, %f780, %rd80, %r133); // inline asm ld.local.f32 %f826, [%rd16]; setp.neu.f32 %p76, %f826, 0f3F800000; @%p76 bra BB0_74; ld.local.f32 %f827, [%rd16+4]; setp.neu.f32 %p77, %f827, 0f3F800000; @%p77 bra BB0_74; ld.local.f32 %f828, [%rd16+8]; setp.neu.f32 %p78, %f828, 0f3F800000; @%p78 bra BB0_74; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r310, [root]; mov.f32 %f836, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r310, %f125, %f126, %f127, %f77, %f78, %f79, %r258, %f476, %f836, %rd80, %r133); // inline asm ld.local.f32 %f837, [%rd16]; add.f32 %f39, %f39, %f837; ld.local.f32 %f838, [%rd16+4]; add.f32 %f38, %f38, %f838; ld.local.f32 %f839, [%rd16+8]; add.f32 %f37, %f37, %f839; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_74: mad.lo.s32 %r317, %r87, 1664525, 1013904223; and.b32 %r318, %r317, 16777215; cvt.rn.f32.u32 %f848, %r318; mul.f32 %f849, %f848, 0f33800000; fma.rn.f32 %f850, %f849, 0f40000000, 0fBF800000; mad.lo.s32 %r88, %r317, 1664525, 1013904223; and.b32 %r319, %r88, 16777215; cvt.rn.f32.u32 %f851, %r319; mul.f32 %f852, %f851, 0f33800000; fma.rn.f32 %f853, %f852, 0f40000000, 0fBF800000; mul.f32 %f854, %f13, %f853; mul.f32 %f855, %f14, %f853; mul.f32 %f856, %f15, %f853; fma.rn.f32 %f857, %f16, %f850, %f854; fma.rn.f32 %f858, %f17, %f850, %f855; fma.rn.f32 %f859, %f18, %f850, %f856; mul.f32 %f860, %f858, %f858; fma.rn.f32 %f861, %f857, %f857, %f860; fma.rn.f32 %f862, %f859, %f859, %f861; sqrt.rn.f32 %f863, %f862; rcp.rn.f32 %f864, %f863; mul.f32 %f865, %f857, %f864; mul.f32 %f866, %f858, %f864; mul.f32 %f867, %f859, %f864; mul.f32 %f868, %f1713, %f867; mul.f32 %f869, %f1714, %f866; sub.f32 %f870, %f868, %f869; mul.f32 %f871, %f1714, %f865; mul.f32 %f872, %f1712, %f867; sub.f32 %f873, %f871, %f872; mul.f32 %f874, %f1712, %f866; mul.f32 %f875, %f1713, %f865; sub.f32 %f876, %f874, %f875; mul.f32 %f877, %f865, 0fBF61E1E3; mul.f32 %f878, %f866, 0fBF61E1E3; mul.f32 %f879, %f867, 0fBF61E1E3; fma.rn.f32 %f880, %f19, %f877, %f10; fma.rn.f32 %f881, %f19, %f878, %f11; fma.rn.f32 %f882, %f19, %f879, %f12; mul.f32 %f883, %f870, 0fBE24A490; mul.f32 %f884, %f873, 0fBE24A490; mul.f32 %f885, %f876, 0fBE24A490; fma.rn.f32 %f136, %f19, %f883, %f880; fma.rn.f32 %f137, %f19, %f884, %f881; fma.rn.f32 %f138, %f19, %f885, %f882; sub.f32 %f886, %f136, %f10; sub.f32 %f887, %f137, %f11; sub.f32 %f888, %f138, %f12; mul.f32 %f889, %f887, %f887; fma.rn.f32 %f890, %f886, %f886, %f889; fma.rn.f32 %f891, %f888, %f888, %f890; sqrt.rn.f32 %f847, %f891; rcp.rn.f32 %f892, %f847; mul.f32 %f843, %f892, %f886; mul.f32 %f844, %f892, %f887; mul.f32 %f845, %f892, %f888; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r314, [root]; // inline asm call _rt_trace_64, (%r314, %f10, %f11, %f12, %f843, %f844, %f845, %r258, %f476, %f847, %rd80, %r133); // inline asm ld.local.f32 %f893, [%rd16]; setp.neu.f32 %p79, %f893, 0f3F800000; @%p79 bra BB0_78; ld.local.f32 %f894, [%rd16+4]; setp.neu.f32 %p80, %f894, 0f3F800000; @%p80 bra BB0_78; ld.local.f32 %f895, [%rd16+8]; setp.neu.f32 %p81, %f895, 0f3F800000; @%p81 bra BB0_78; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r321, [root]; mov.f32 %f903, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r321, %f136, %f137, %f138, %f77, %f78, %f79, %r258, %f476, %f903, %rd80, %r133); // inline asm ld.local.f32 %f904, [%rd16]; add.f32 %f39, %f39, %f904; ld.local.f32 %f905, [%rd16+4]; add.f32 %f38, %f38, %f905; ld.local.f32 %f906, [%rd16+8]; add.f32 %f37, %f37, %f906; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_78: mad.lo.s32 %r328, %r88, 1664525, 1013904223; and.b32 %r329, %r328, 16777215; cvt.rn.f32.u32 %f915, %r329; mul.f32 %f916, %f915, 0f33800000; fma.rn.f32 %f917, %f916, 0f40000000, 0fBF800000; mad.lo.s32 %r89, %r328, 1664525, 1013904223; and.b32 %r330, %r89, 16777215; cvt.rn.f32.u32 %f918, %r330; mul.f32 %f919, %f918, 0f33800000; fma.rn.f32 %f920, %f919, 0f40000000, 0fBF800000; mul.f32 %f921, %f13, %f920; mul.f32 %f922, %f14, %f920; mul.f32 %f923, %f15, %f920; fma.rn.f32 %f924, %f16, %f917, %f921; fma.rn.f32 %f925, %f17, %f917, %f922; fma.rn.f32 %f926, %f18, %f917, %f923; mul.f32 %f927, %f925, %f925; fma.rn.f32 %f928, %f924, %f924, %f927; fma.rn.f32 %f929, %f926, %f926, %f928; sqrt.rn.f32 %f930, %f929; rcp.rn.f32 %f931, %f930; mul.f32 %f932, %f924, %f931; mul.f32 %f933, %f925, %f931; mul.f32 %f934, %f926, %f931; mul.f32 %f935, %f1713, %f934; mul.f32 %f936, %f1714, %f933; sub.f32 %f937, %f935, %f936; mul.f32 %f938, %f1714, %f932; mul.f32 %f939, %f1712, %f934; sub.f32 %f940, %f938, %f939; mul.f32 %f941, %f1712, %f933; mul.f32 %f942, %f1713, %f932; sub.f32 %f943, %f941, %f942; mul.f32 %f944, %f932, 0f3ECACABC; mul.f32 %f945, %f933, 0f3ECACABC; mul.f32 %f946, %f934, 0f3ECACABC; fma.rn.f32 %f947, %f19, %f944, %f10; fma.rn.f32 %f948, %f19, %f945, %f11; fma.rn.f32 %f949, %f19, %f946, %f12; mul.f32 %f950, %f937, 0f3F61E1D2; mul.f32 %f951, %f940, 0f3F61E1D2; mul.f32 %f952, %f943, 0f3F61E1D2; fma.rn.f32 %f147, %f19, %f950, %f947; fma.rn.f32 %f148, %f19, %f951, %f948; fma.rn.f32 %f149, %f19, %f952, %f949; sub.f32 %f953, %f147, %f10; sub.f32 %f954, %f148, %f11; sub.f32 %f955, %f149, %f12; mul.f32 %f956, %f954, %f954; fma.rn.f32 %f957, %f953, %f953, %f956; fma.rn.f32 %f958, %f955, %f955, %f957; sqrt.rn.f32 %f914, %f958; rcp.rn.f32 %f959, %f914; mul.f32 %f910, %f959, %f953; mul.f32 %f911, %f959, %f954; mul.f32 %f912, %f959, %f955; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r325, [root]; // inline asm call _rt_trace_64, (%r325, %f10, %f11, %f12, %f910, %f911, %f912, %r258, %f476, %f914, %rd80, %r133); // inline asm ld.local.f32 %f960, [%rd16]; setp.neu.f32 %p82, %f960, 0f3F800000; @%p82 bra BB0_82; ld.local.f32 %f961, [%rd16+4]; setp.neu.f32 %p83, %f961, 0f3F800000; @%p83 bra BB0_82; ld.local.f32 %f962, [%rd16+8]; setp.neu.f32 %p84, %f962, 0f3F800000; @%p84 bra BB0_82; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r332, [root]; mov.f32 %f970, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r332, %f147, %f148, %f149, %f77, %f78, %f79, %r258, %f476, %f970, %rd80, %r133); // inline asm ld.local.f32 %f971, [%rd16]; add.f32 %f39, %f39, %f971; ld.local.f32 %f972, [%rd16+4]; add.f32 %f38, %f38, %f972; ld.local.f32 %f973, [%rd16+8]; add.f32 %f37, %f37, %f973; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_82: mad.lo.s32 %r339, %r89, 1664525, 1013904223; and.b32 %r340, %r339, 16777215; cvt.rn.f32.u32 %f982, %r340; mul.f32 %f983, %f982, 0f33800000; fma.rn.f32 %f984, %f983, 0f40000000, 0fBF800000; mad.lo.s32 %r519, %r339, 1664525, 1013904223; and.b32 %r341, %r519, 16777215; cvt.rn.f32.u32 %f985, %r341; mul.f32 %f986, %f985, 0f33800000; fma.rn.f32 %f987, %f986, 0f40000000, 0fBF800000; mul.f32 %f988, %f13, %f987; mul.f32 %f989, %f14, %f987; mul.f32 %f990, %f15, %f987; fma.rn.f32 %f991, %f16, %f984, %f988; fma.rn.f32 %f992, %f17, %f984, %f989; fma.rn.f32 %f993, %f18, %f984, %f990; mul.f32 %f994, %f992, %f992; fma.rn.f32 %f995, %f991, %f991, %f994; fma.rn.f32 %f996, %f993, %f993, %f995; sqrt.rn.f32 %f997, %f996; rcp.rn.f32 %f998, %f997; mul.f32 %f999, %f991, %f998; mul.f32 %f1000, %f992, %f998; mul.f32 %f1001, %f993, %f998; mul.f32 %f1002, %f1713, %f1001; mul.f32 %f1003, %f1714, %f1000; sub.f32 %f1004, %f1002, %f1003; mul.f32 %f1005, %f1714, %f999; mul.f32 %f1006, %f1712, %f1001; sub.f32 %f1007, %f1005, %f1006; mul.f32 %f1008, %f1712, %f1000; mul.f32 %f1009, %f1713, %f999; sub.f32 %f1010, %f1008, %f1009; mul.f32 %f1011, %f999, 0f3F61E1D2; mul.f32 %f1012, %f1000, 0f3F61E1D2; mul.f32 %f1013, %f1001, 0f3F61E1D2; fma.rn.f32 %f1014, %f19, %f1011, %f10; fma.rn.f32 %f1015, %f19, %f1012, %f11; fma.rn.f32 %f1016, %f19, %f1013, %f12; mul.f32 %f1017, %f1004, 0fBF61E1E3; mul.f32 %f1018, %f1007, 0fBF61E1E3; mul.f32 %f1019, %f1010, 0fBF61E1E3; fma.rn.f32 %f158, %f19, %f1017, %f1014; fma.rn.f32 %f159, %f19, %f1018, %f1015; fma.rn.f32 %f160, %f19, %f1019, %f1016; sub.f32 %f1020, %f158, %f10; sub.f32 %f1021, %f159, %f11; sub.f32 %f1022, %f160, %f12; mul.f32 %f1023, %f1021, %f1021; fma.rn.f32 %f1024, %f1020, %f1020, %f1023; fma.rn.f32 %f1025, %f1022, %f1022, %f1024; sqrt.rn.f32 %f981, %f1025; rcp.rn.f32 %f1026, %f981; mul.f32 %f977, %f1026, %f1020; mul.f32 %f978, %f1026, %f1021; mul.f32 %f979, %f1026, %f1022; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r336, [root]; // inline asm call _rt_trace_64, (%r336, %f10, %f11, %f12, %f977, %f978, %f979, %r258, %f476, %f981, %rd80, %r133); // inline asm ld.local.f32 %f1027, [%rd16]; setp.neu.f32 %p85, %f1027, 0f3F800000; @%p85 bra BB0_86; ld.local.f32 %f1028, [%rd16+4]; setp.neu.f32 %p86, %f1028, 0f3F800000; @%p86 bra BB0_86; ld.local.f32 %f1029, [%rd16+8]; setp.neu.f32 %p87, %f1029, 0f3F800000; @%p87 bra BB0_86; st.local.u32 [%rd16+8], %r265; st.local.u32 [%rd16+4], %r265; st.local.u32 [%rd16], %r265; ld.global.u32 %r343, [root]; mov.f32 %f1037, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r343, %f158, %f159, %f160, %f77, %f78, %f79, %r258, %f476, %f1037, %rd80, %r133); // inline asm ld.local.f32 %f1038, [%rd16]; add.f32 %f39, %f39, %f1038; ld.local.f32 %f1039, [%rd16+4]; add.f32 %f38, %f38, %f1039; ld.local.f32 %f1040, [%rd16+8]; add.f32 %f37, %f37, %f1040; add.f32 %f36, %f36, 0f3F800000; mov.u16 %rs179, 1; BB0_86: setp.ne.s16 %p88, %rs179, 0; @%p88 bra BB0_88; add.u64 %rd96, %SP, 0; cvta.to.local.u64 %rd97, %rd96; st.local.u32 [%rd97+8], %r265; st.local.u32 [%rd97+4], %r265; st.local.u32 [%rd97], %r265; ld.global.u32 %r347, [root]; mov.f32 %f1048, 0f6C4ECB8F; // inline asm call _rt_trace_64, (%r347, %f10, %f11, %f12, %f77, %f78, %f79, %r258, %f476, %f1048, %rd96, %r133); // inline asm ld.local.f32 %f1049, [%rd97]; add.f32 %f39, %f39, %f1049; ld.local.f32 %f1050, [%rd97+4]; add.f32 %f38, %f38, %f1050; ld.local.f32 %f1051, [%rd97+8]; add.f32 %f37, %f37, %f1051; add.f32 %f36, %f36, 0f3F800000; BB0_88: ld.global.u32 %r493, [samples]; add.s32 %r496, %r496, 1; setp.lt.s32 %p89, %r496, %r493; @%p89 bra BB0_8; BB0_89: add.s32 %r494, %r494, 1; setp.lt.s32 %p90, %r494, %r493; @%p90 bra BB0_6; bra.uni BB0_90; BB0_4: mov.f32 %f37, %f36; mov.f32 %f38, %f36; mov.f32 %f39, %f36; BB0_90: mul.f32 %f1055, %f1714, %f9; mul.f32 %f1056, %f1713, %f8; neg.f32 %f1057, %f1056; mul.f32 %f1058, %f1712, %f7; sub.f32 %f1059, %f1057, %f1058; sub.f32 %f185, %f1059, %f1055; setp.eq.s32 %p91, %r493, 0; mov.f32 %f1779, 0f3F800000; mov.f32 %f1780, %f1779; mov.f32 %f1781, %f1779; @%p91 bra BB0_92; mov.f32 %f1060, 0f3F800000; max.f32 %f1061, %f36, %f1060; rcp.rn.f32 %f1062, %f1061; mul.f32 %f1779, %f39, %f1062; mul.f32 %f1780, %f38, %f1062; mul.f32 %f1781, %f37, %f1062; BB0_92: ld.global.f32 %f1065, [directColor]; mul.f32 %f192, %f1779, %f1065; ld.global.f32 %f1066, [directColor+4]; mul.f32 %f193, %f1780, %f1066; ld.global.f32 %f1067, [directColor+8]; mul.f32 %f194, %f1781, %f1067; cvt.sat.f32.f32 %f1068, %f185; mul.f32 %f195, %f192, %f1068; mul.f32 %f196, %f193, %f1068; mul.f32 %f197, %f194, %f1068; fma.rn.f32 %f1069, %f185, 0f3F000000, 0f3F000000; cvt.sat.f32.f32 %f1070, %f1069; add.f32 %f198, %f1070, %f1070; mov.f32 %f1071, 0f41200000; cvt.rzi.f32.f32 %f1072, %f1071; add.f32 %f1073, %f1072, %f1072; mov.f32 %f1074, 0f41A00000; sub.f32 %f1075, %f1074, %f1073; abs.f32 %f199, %f1075; abs.f32 %f200, %f198; setp.lt.f32 %p92, %f200, 0f00800000; mul.f32 %f1076, %f200, 0f4B800000; selp.f32 %f1077, 0fC3170000, 0fC2FE0000, %p92; selp.f32 %f1078, %f1076, %f200, %p92; mov.b32 %r351, %f1078; and.b32 %r352, %r351, 8388607; or.b32 %r353, %r352, 1065353216; mov.b32 %f1079, %r353; shr.u32 %r354, %r351, 23; cvt.rn.f32.u32 %f1080, %r354; add.f32 %f1081, %f1077, %f1080; setp.gt.f32 %p93, %f1079, 0f3FB504F3; mul.f32 %f1082, %f1079, 0f3F000000; add.f32 %f1083, %f1081, 0f3F800000; selp.f32 %f1084, %f1082, %f1079, %p93; selp.f32 %f1085, %f1083, %f1081, %p93; add.f32 %f1086, %f1084, 0fBF800000; add.f32 %f1064, %f1084, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1063,%f1064; // inline asm add.f32 %f1087, %f1086, %f1086; mul.f32 %f1088, %f1063, %f1087; mul.f32 %f1089, %f1088, %f1088; mov.f32 %f1090, 0f3C4CAF63; mov.f32 %f1091, 0f3B18F0FE; fma.rn.f32 %f1092, %f1091, %f1089, %f1090; mov.f32 %f1093, 0f3DAAAABD; fma.rn.f32 %f1094, %f1092, %f1089, %f1093; mul.rn.f32 %f1095, %f1094, %f1089; mul.rn.f32 %f1096, %f1095, %f1088; sub.f32 %f1097, %f1086, %f1088; neg.f32 %f1098, %f1088; add.f32 %f1099, %f1097, %f1097; fma.rn.f32 %f1100, %f1098, %f1086, %f1099; mul.rn.f32 %f1101, %f1063, %f1100; add.f32 %f1102, %f1096, %f1088; sub.f32 %f1103, %f1088, %f1102; add.f32 %f1104, %f1096, %f1103; add.f32 %f1105, %f1101, %f1104; add.f32 %f1106, %f1102, %f1105; sub.f32 %f1107, %f1102, %f1106; add.f32 %f1108, %f1105, %f1107; mov.f32 %f1109, 0f3F317200; mul.rn.f32 %f1110, %f1085, %f1109; mov.f32 %f1111, 0f35BFBE8E; mul.rn.f32 %f1112, %f1085, %f1111; add.f32 %f1113, %f1110, %f1106; sub.f32 %f1114, %f1110, %f1113; add.f32 %f1115, %f1106, %f1114; add.f32 %f1116, %f1108, %f1115; add.f32 %f1117, %f1112, %f1116; add.f32 %f1118, %f1113, %f1117; sub.f32 %f1119, %f1113, %f1118; add.f32 %f1120, %f1117, %f1119; mul.rn.f32 %f1121, %f1074, %f1118; neg.f32 %f1122, %f1121; fma.rn.f32 %f1123, %f1074, %f1118, %f1122; fma.rn.f32 %f1124, %f1074, %f1120, %f1123; mov.f32 %f1803, 0f00000000; fma.rn.f32 %f1126, %f1803, %f1118, %f1124; add.rn.f32 %f1127, %f1121, %f1126; neg.f32 %f1128, %f1127; add.rn.f32 %f1129, %f1121, %f1128; add.rn.f32 %f1130, %f1129, %f1126; mov.b32 %r355, %f1127; setp.eq.s32 %p94, %r355, 1118925336; add.s32 %r356, %r355, -1; mov.b32 %f1131, %r356; add.f32 %f1132, %f1130, 0f37000000; selp.f32 %f1133, %f1131, %f1127, %p94; selp.f32 %f201, %f1132, %f1130, %p94; mul.f32 %f1134, %f1133, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1135, %f1134; mov.f32 %f1136, 0fBF317200; fma.rn.f32 %f1137, %f1135, %f1136, %f1133; mov.f32 %f1138, 0fB5BFBE8E; fma.rn.f32 %f1139, %f1135, %f1138, %f1137; mul.f32 %f1140, %f1139, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1141, %f1140; add.f32 %f1142, %f1135, 0f00000000; ex2.approx.f32 %f1143, %f1142; mul.f32 %f1144, %f1141, %f1143; setp.lt.f32 %p95, %f1133, 0fC2D20000; selp.f32 %f1145, 0f00000000, %f1144, %p95; setp.gt.f32 %p96, %f1133, 0f42D20000; selp.f32 %f1782, 0f7F800000, %f1145, %p96; setp.eq.f32 %p97, %f1782, 0f7F800000; @%p97 bra BB0_94; fma.rn.f32 %f1782, %f1782, %f201, %f1782; BB0_94: setp.lt.f32 %p98, %f198, 0f00000000; setp.eq.f32 %p99, %f199, 0f3F800000; and.pred %p1, %p98, %p99; mov.b32 %r357, %f1782; xor.b32 %r358, %r357, -2147483648; mov.b32 %f1146, %r358; selp.f32 %f1784, %f1146, %f1782, %p1; setp.eq.f32 %p100, %f198, 0f00000000; @%p100 bra BB0_97; bra.uni BB0_95; BB0_97: add.f32 %f1149, %f198, %f198; selp.f32 %f1784, %f1149, 0f00000000, %p99; bra.uni BB0_98; BB0_95: setp.geu.f32 %p101, %f198, 0f00000000; @%p101 bra BB0_98; cvt.rzi.f32.f32 %f1148, %f1074; setp.neu.f32 %p102, %f1148, 0f41A00000; selp.f32 %f1784, 0f7FFFFFFF, %f1784, %p102; BB0_98: add.f32 %f1150, %f200, 0f41A00000; mov.b32 %r359, %f1150; setp.lt.s32 %p104, %r359, 2139095040; @%p104 bra BB0_103; setp.gtu.f32 %p105, %f200, 0f7F800000; @%p105 bra BB0_102; bra.uni BB0_100; BB0_102: add.f32 %f1784, %f198, 0f41A00000; bra.uni BB0_103; BB0_100: setp.neu.f32 %p106, %f200, 0f7F800000; @%p106 bra BB0_103; selp.f32 %f1784, 0fFF800000, 0f7F800000, %p1; BB0_103: setp.eq.f32 %p107, %f198, 0f3F800000; selp.f32 %f1151, 0f3F800000, %f1784, %p107; cvt.sat.f32.f32 %f1152, %f1151; mul.f32 %f212, %f192, %f1152; mul.f32 %f213, %f193, %f1152; mul.f32 %f214, %f194, %f1152; ld.global.u32 %r522, [imageEnabled]; and.b32 %r360, %r522, 8; setp.eq.s32 %p108, %r360, 0; @%p108 bra BB0_116; cvt.u64.u32 %rd100, %r2; cvt.u64.u32 %rd101, %r3; mov.u64 %rd104, image_Mask; cvta.global.u64 %rd99, %rd104; // inline asm call (%rd98), _rt_buffer_get_64, (%rd99, %r113, %r113, %rd100, %rd101, %rd32, %rd32); // inline asm mov.f32 %f1155, 0f3E68BA2E; cvt.rzi.f32.f32 %f1156, %f1155; fma.rn.f32 %f1157, %f1156, 0fC0000000, 0f3EE8BA2E; abs.f32 %f215, %f1157; abs.f32 %f216, %f1779; setp.lt.f32 %p109, %f216, 0f00800000; mul.f32 %f1158, %f216, 0f4B800000; selp.f32 %f1159, 0fC3170000, 0fC2FE0000, %p109; selp.f32 %f1160, %f1158, %f216, %p109; mov.b32 %r363, %f1160; and.b32 %r364, %r363, 8388607; or.b32 %r365, %r364, 1065353216; mov.b32 %f1161, %r365; shr.u32 %r366, %r363, 23; cvt.rn.f32.u32 %f1162, %r366; add.f32 %f1163, %f1159, %f1162; setp.gt.f32 %p110, %f1161, 0f3FB504F3; mul.f32 %f1164, %f1161, 0f3F000000; add.f32 %f1165, %f1163, 0f3F800000; selp.f32 %f1166, %f1164, %f1161, %p110; selp.f32 %f1167, %f1165, %f1163, %p110; add.f32 %f1168, %f1166, 0fBF800000; add.f32 %f1154, %f1166, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1153,%f1154; // inline asm add.f32 %f1169, %f1168, %f1168; mul.f32 %f1170, %f1153, %f1169; mul.f32 %f1171, %f1170, %f1170; fma.rn.f32 %f1174, %f1091, %f1171, %f1090; fma.rn.f32 %f1176, %f1174, %f1171, %f1093; mul.rn.f32 %f1177, %f1176, %f1171; mul.rn.f32 %f1178, %f1177, %f1170; sub.f32 %f1179, %f1168, %f1170; neg.f32 %f1180, %f1170; add.f32 %f1181, %f1179, %f1179; fma.rn.f32 %f1182, %f1180, %f1168, %f1181; mul.rn.f32 %f1183, %f1153, %f1182; add.f32 %f1184, %f1178, %f1170; sub.f32 %f1185, %f1170, %f1184; add.f32 %f1186, %f1178, %f1185; add.f32 %f1187, %f1183, %f1186; add.f32 %f1188, %f1184, %f1187; sub.f32 %f1189, %f1184, %f1188; add.f32 %f1190, %f1187, %f1189; mul.rn.f32 %f1192, %f1167, %f1109; mul.rn.f32 %f1194, %f1167, %f1111; add.f32 %f1195, %f1192, %f1188; sub.f32 %f1196, %f1192, %f1195; add.f32 %f1197, %f1188, %f1196; add.f32 %f1198, %f1190, %f1197; add.f32 %f1199, %f1194, %f1198; add.f32 %f1200, %f1195, %f1199; sub.f32 %f1201, %f1195, %f1200; add.f32 %f1202, %f1199, %f1201; mov.f32 %f1203, 0f3EE8BA2E; mul.rn.f32 %f1204, %f1203, %f1200; neg.f32 %f1205, %f1204; fma.rn.f32 %f1206, %f1203, %f1200, %f1205; fma.rn.f32 %f1207, %f1203, %f1202, %f1206; fma.rn.f32 %f1209, %f1803, %f1200, %f1207; add.rn.f32 %f1210, %f1204, %f1209; neg.f32 %f1211, %f1210; add.rn.f32 %f1212, %f1204, %f1211; add.rn.f32 %f1213, %f1212, %f1209; mov.b32 %r367, %f1210; setp.eq.s32 %p111, %r367, 1118925336; add.s32 %r368, %r367, -1; mov.b32 %f1214, %r368; add.f32 %f1215, %f1213, 0f37000000; selp.f32 %f1216, %f1214, %f1210, %p111; selp.f32 %f217, %f1215, %f1213, %p111; mul.f32 %f1217, %f1216, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1218, %f1217; fma.rn.f32 %f1220, %f1218, %f1136, %f1216; fma.rn.f32 %f1222, %f1218, %f1138, %f1220; mul.f32 %f1223, %f1222, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1224, %f1223; add.f32 %f1225, %f1218, 0f00000000; ex2.approx.f32 %f1226, %f1225; mul.f32 %f1227, %f1224, %f1226; setp.lt.f32 %p112, %f1216, 0fC2D20000; selp.f32 %f1228, 0f00000000, %f1227, %p112; setp.gt.f32 %p113, %f1216, 0f42D20000; selp.f32 %f1785, 0f7F800000, %f1228, %p113; setp.eq.f32 %p114, %f1785, 0f7F800000; @%p114 bra BB0_106; fma.rn.f32 %f1785, %f1785, %f217, %f1785; BB0_106: setp.lt.f32 %p115, %f1779, 0f00000000; setp.eq.f32 %p116, %f215, 0f3F800000; and.pred %p2, %p115, %p116; mov.b32 %r369, %f1785; xor.b32 %r370, %r369, -2147483648; mov.b32 %f1229, %r370; selp.f32 %f1787, %f1229, %f1785, %p2; setp.eq.f32 %p117, %f1779, 0f00000000; @%p117 bra BB0_109; bra.uni BB0_107; BB0_109: add.f32 %f1232, %f1779, %f1779; selp.f32 %f1787, %f1232, 0f00000000, %p116; bra.uni BB0_110; BB0_177: mov.u64 %rd246, image_HDR; cvta.global.u64 %rd241, %rd246; mov.u32 %r467, 8; mov.u64 %rd245, 0; // inline asm call (%rd240), _rt_buffer_get_64, (%rd241, %r113, %r467, %rd25, %rd26, %rd245, %rd245); // inline asm mov.f32 %f1688, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs135, %f1688;} // inline asm mov.u16 %rs136, 0; st.v4.u16 [%rd240], {%rs135, %rs135, %rs135, %rs136}; BB0_178: ld.global.u32 %r468, [additive]; setp.eq.s32 %p192, %r468, 0; @%p192 bra BB0_180; mov.u64 %rd259, image_RNM0; cvta.global.u64 %rd248, %rd259; mov.u32 %r472, 8; mov.u64 %rd258, 0; // inline asm call (%rd247), _rt_buffer_get_64, (%rd248, %r113, %r472, %rd25, %rd26, %rd258, %rd258); // inline asm ld.v4.u16 {%rs143, %rs144, %rs145, %rs146}, [%rd247]; // inline asm { cvt.f32.f16 %f1689, %rs143;} // inline asm // inline asm { cvt.f32.f16 %f1690, %rs144;} // inline asm // inline asm { cvt.f32.f16 %f1691, %rs145;} // inline asm // inline asm call (%rd253), _rt_buffer_get_64, (%rd248, %r113, %r472, %rd25, %rd26, %rd258, %rd258); // inline asm add.f32 %f1692, %f1689, 0f00000000; add.f32 %f1693, %f1690, 0f00000000; add.f32 %f1694, %f1691, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs142, %f1694;} // inline asm // inline asm { cvt.rn.f16.f32 %rs141, %f1693;} // inline asm // inline asm { cvt.rn.f16.f32 %rs140, %f1692;} // inline asm mov.u16 %rs147, 0; st.v4.u16 [%rd253], {%rs140, %rs141, %rs142, %rs147}; bra.uni BB0_181; BB0_180: mov.u64 %rd266, image_RNM0; cvta.global.u64 %rd261, %rd266; mov.u32 %r474, 8; mov.u64 %rd265, 0; // inline asm call (%rd260), _rt_buffer_get_64, (%rd261, %r113, %r474, %rd25, %rd26, %rd265, %rd265); // inline asm mov.f32 %f1695, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs148, %f1695;} // inline asm mov.u16 %rs149, 0; st.v4.u16 [%rd260], {%rs148, %rs148, %rs148, %rs149}; BB0_181: ld.global.u32 %r475, [additive]; setp.eq.s32 %p193, %r475, 0; @%p193 bra BB0_183; mov.u64 %rd279, image_RNM1; cvta.global.u64 %rd268, %rd279; mov.u32 %r479, 8; mov.u64 %rd278, 0; // inline asm call (%rd267), _rt_buffer_get_64, (%rd268, %r113, %r479, %rd25, %rd26, %rd278, %rd278); // inline asm ld.v4.u16 {%rs156, %rs157, %rs158, %rs159}, [%rd267]; // inline asm { cvt.f32.f16 %f1696, %rs156;} // inline asm // inline asm { cvt.f32.f16 %f1697, %rs157;} // inline asm // inline asm { cvt.f32.f16 %f1698, %rs158;} // inline asm // inline asm call (%rd273), _rt_buffer_get_64, (%rd268, %r113, %r479, %rd25, %rd26, %rd278, %rd278); // inline asm add.f32 %f1699, %f1696, 0f00000000; add.f32 %f1700, %f1697, 0f00000000; add.f32 %f1701, %f1698, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs155, %f1701;} // inline asm // inline asm { cvt.rn.f16.f32 %rs154, %f1700;} // inline asm // inline asm { cvt.rn.f16.f32 %rs153, %f1699;} // inline asm mov.u16 %rs160, 0; st.v4.u16 [%rd273], {%rs153, %rs154, %rs155, %rs160}; bra.uni BB0_184; BB0_183: mov.u64 %rd286, image_RNM1; cvta.global.u64 %rd281, %rd286; mov.u32 %r481, 8; mov.u64 %rd285, 0; // inline asm call (%rd280), _rt_buffer_get_64, (%rd281, %r113, %r481, %rd25, %rd26, %rd285, %rd285); // inline asm mov.f32 %f1702, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs161, %f1702;} // inline asm mov.u16 %rs162, 0; st.v4.u16 [%rd280], {%rs161, %rs161, %rs161, %rs162}; BB0_184: ld.global.u32 %r482, [additive]; setp.eq.s32 %p194, %r482, 0; @%p194 bra BB0_186; mov.u64 %rd299, image_RNM2; cvta.global.u64 %rd288, %rd299; mov.u32 %r486, 8; mov.u64 %rd298, 0; // inline asm call (%rd287), _rt_buffer_get_64, (%rd288, %r113, %r486, %rd25, %rd26, %rd298, %rd298); // inline asm ld.v4.u16 {%rs169, %rs170, %rs171, %rs172}, [%rd287]; // inline asm { cvt.f32.f16 %f1703, %rs169;} // inline asm // inline asm { cvt.f32.f16 %f1704, %rs170;} // inline asm // inline asm { cvt.f32.f16 %f1705, %rs171;} // inline asm // inline asm call (%rd293), _rt_buffer_get_64, (%rd288, %r113, %r486, %rd25, %rd26, %rd298, %rd298); // inline asm add.f32 %f1706, %f1703, 0f00000000; add.f32 %f1707, %f1704, 0f00000000; add.f32 %f1708, %f1705, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs168, %f1708;} // inline asm // inline asm { cvt.rn.f16.f32 %rs167, %f1707;} // inline asm // inline asm { cvt.rn.f16.f32 %rs166, %f1706;} // inline asm mov.u16 %rs173, 0; st.v4.u16 [%rd293], {%rs166, %rs167, %rs168, %rs173}; bra.uni BB0_187; BB0_186: mov.u64 %rd306, image_RNM2; cvta.global.u64 %rd301, %rd306; mov.u32 %r488, 8; mov.u64 %rd305, 0; // inline asm call (%rd300), _rt_buffer_get_64, (%rd301, %r113, %r488, %rd25, %rd26, %rd305, %rd305); // inline asm mov.f32 %f1709, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs174, %f1709;} // inline asm mov.u16 %rs175, 0; st.v4.u16 [%rd300], {%rs174, %rs174, %rs174, %rs175}; bra.uni BB0_187; BB0_107: setp.geu.f32 %p118, %f1779, 0f00000000; @%p118 bra BB0_110; cvt.rzi.f32.f32 %f1231, %f1203; setp.neu.f32 %p119, %f1231, 0f3EE8BA2E; selp.f32 %f1787, 0f7FFFFFFF, %f1787, %p119; BB0_110: add.f32 %f1233, %f216, 0f3EE8BA2E; mov.b32 %r371, %f1233; setp.lt.s32 %p121, %r371, 2139095040; @%p121 bra BB0_115; setp.gtu.f32 %p122, %f216, 0f7F800000; @%p122 bra BB0_114; bra.uni BB0_112; BB0_114: add.f32 %f1787, %f1779, 0f3EE8BA2E; bra.uni BB0_115; BB0_112: setp.neu.f32 %p123, %f216, 0f7F800000; @%p123 bra BB0_115; selp.f32 %f1787, 0fFF800000, 0f7F800000, %p2; BB0_115: mul.f32 %f1234, %f1787, 0f437F0000; setp.eq.f32 %p124, %f1779, 0f3F800000; selp.f32 %f1235, 0f437F0000, %f1234, %p124; cvt.rzi.u32.f32 %r372, %f1235; cvt.u16.u32 %rs32, %r372; mov.u16 %rs33, 255; st.v2.u8 [%rd98], {%rs32, %rs33}; ld.global.u32 %r522, [imageEnabled]; BB0_116: and.b32 %r373, %r522, 1; setp.eq.b32 %p125, %r373, 1; @!%p125 bra BB0_151; bra.uni BB0_117; BB0_117: mov.f32 %f1238, 0f3E666666; cvt.rzi.f32.f32 %f1239, %f1238; fma.rn.f32 %f1240, %f1239, 0fC0000000, 0f3EE66666; abs.f32 %f228, %f1240; abs.f32 %f229, %f195; setp.lt.f32 %p126, %f229, 0f00800000; mul.f32 %f1241, %f229, 0f4B800000; selp.f32 %f1242, 0fC3170000, 0fC2FE0000, %p126; selp.f32 %f1243, %f1241, %f229, %p126; mov.b32 %r374, %f1243; and.b32 %r375, %r374, 8388607; or.b32 %r376, %r375, 1065353216; mov.b32 %f1244, %r376; shr.u32 %r377, %r374, 23; cvt.rn.f32.u32 %f1245, %r377; add.f32 %f1246, %f1242, %f1245; setp.gt.f32 %p127, %f1244, 0f3FB504F3; mul.f32 %f1247, %f1244, 0f3F000000; add.f32 %f1248, %f1246, 0f3F800000; selp.f32 %f1249, %f1247, %f1244, %p127; selp.f32 %f1250, %f1248, %f1246, %p127; add.f32 %f1251, %f1249, 0fBF800000; add.f32 %f1237, %f1249, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1236,%f1237; // inline asm add.f32 %f1252, %f1251, %f1251; mul.f32 %f1253, %f1236, %f1252; mul.f32 %f1254, %f1253, %f1253; fma.rn.f32 %f1257, %f1091, %f1254, %f1090; fma.rn.f32 %f1259, %f1257, %f1254, %f1093; mul.rn.f32 %f1260, %f1259, %f1254; mul.rn.f32 %f1261, %f1260, %f1253; sub.f32 %f1262, %f1251, %f1253; neg.f32 %f1263, %f1253; add.f32 %f1264, %f1262, %f1262; fma.rn.f32 %f1265, %f1263, %f1251, %f1264; mul.rn.f32 %f1266, %f1236, %f1265; add.f32 %f1267, %f1261, %f1253; sub.f32 %f1268, %f1253, %f1267; add.f32 %f1269, %f1261, %f1268; add.f32 %f1270, %f1266, %f1269; add.f32 %f1271, %f1267, %f1270; sub.f32 %f1272, %f1267, %f1271; add.f32 %f1273, %f1270, %f1272; mul.rn.f32 %f1275, %f1250, %f1109; mul.rn.f32 %f1277, %f1250, %f1111; add.f32 %f1278, %f1275, %f1271; sub.f32 %f1279, %f1275, %f1278; add.f32 %f1280, %f1271, %f1279; add.f32 %f1281, %f1273, %f1280; add.f32 %f1282, %f1277, %f1281; add.f32 %f1283, %f1278, %f1282; sub.f32 %f1284, %f1278, %f1283; add.f32 %f1285, %f1282, %f1284; mov.f32 %f1286, 0f3EE66666; mul.rn.f32 %f1287, %f1286, %f1283; neg.f32 %f1288, %f1287; fma.rn.f32 %f1289, %f1286, %f1283, %f1288; fma.rn.f32 %f1290, %f1286, %f1285, %f1289; fma.rn.f32 %f1292, %f1803, %f1283, %f1290; add.rn.f32 %f1293, %f1287, %f1292; neg.f32 %f1294, %f1293; add.rn.f32 %f1295, %f1287, %f1294; add.rn.f32 %f1296, %f1295, %f1292; mov.b32 %r378, %f1293; setp.eq.s32 %p128, %r378, 1118925336; add.s32 %r379, %r378, -1; mov.b32 %f1297, %r379; add.f32 %f1298, %f1296, 0f37000000; selp.f32 %f1299, %f1297, %f1293, %p128; selp.f32 %f230, %f1298, %f1296, %p128; mul.f32 %f1300, %f1299, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1301, %f1300; fma.rn.f32 %f1303, %f1301, %f1136, %f1299; fma.rn.f32 %f1305, %f1301, %f1138, %f1303; mul.f32 %f1306, %f1305, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1307, %f1306; add.f32 %f1308, %f1301, 0f00000000; ex2.approx.f32 %f1309, %f1308; mul.f32 %f1310, %f1307, %f1309; setp.lt.f32 %p129, %f1299, 0fC2D20000; selp.f32 %f1311, 0f00000000, %f1310, %p129; setp.gt.f32 %p130, %f1299, 0f42D20000; selp.f32 %f1788, 0f7F800000, %f1311, %p130; setp.eq.f32 %p131, %f1788, 0f7F800000; @%p131 bra BB0_119; fma.rn.f32 %f1788, %f1788, %f230, %f1788; BB0_119: setp.lt.f32 %p132, %f195, 0f00000000; setp.eq.f32 %p133, %f228, 0f3F800000; and.pred %p3, %p132, %p133; mov.b32 %r380, %f1788; xor.b32 %r381, %r380, -2147483648; mov.b32 %f1312, %r381; selp.f32 %f1790, %f1312, %f1788, %p3; setp.eq.f32 %p134, %f195, 0f00000000; @%p134 bra BB0_122; bra.uni BB0_120; BB0_122: add.f32 %f1315, %f195, %f195; selp.f32 %f1790, %f1315, 0f00000000, %p133; bra.uni BB0_123; BB0_120: setp.geu.f32 %p135, %f195, 0f00000000; @%p135 bra BB0_123; cvt.rzi.f32.f32 %f1314, %f1286; setp.neu.f32 %p136, %f1314, 0f3EE66666; selp.f32 %f1790, 0f7FFFFFFF, %f1790, %p136; BB0_123: add.f32 %f1316, %f229, 0f3EE66666; mov.b32 %r382, %f1316; setp.lt.s32 %p138, %r382, 2139095040; @%p138 bra BB0_128; setp.gtu.f32 %p139, %f229, 0f7F800000; @%p139 bra BB0_127; bra.uni BB0_125; BB0_127: add.f32 %f1790, %f195, 0f3EE66666; bra.uni BB0_128; BB0_125: setp.neu.f32 %p140, %f229, 0f7F800000; @%p140 bra BB0_128; selp.f32 %f1790, 0fFF800000, 0f7F800000, %p3; BB0_128: setp.eq.f32 %p141, %f195, 0f3F800000; selp.f32 %f241, 0f3F800000, %f1790, %p141; abs.f32 %f242, %f196; setp.lt.f32 %p142, %f242, 0f00800000; mul.f32 %f1319, %f242, 0f4B800000; selp.f32 %f1320, 0fC3170000, 0fC2FE0000, %p142; selp.f32 %f1321, %f1319, %f242, %p142; mov.b32 %r383, %f1321; and.b32 %r384, %r383, 8388607; or.b32 %r385, %r384, 1065353216; mov.b32 %f1322, %r385; shr.u32 %r386, %r383, 23; cvt.rn.f32.u32 %f1323, %r386; add.f32 %f1324, %f1320, %f1323; setp.gt.f32 %p143, %f1322, 0f3FB504F3; mul.f32 %f1325, %f1322, 0f3F000000; add.f32 %f1326, %f1324, 0f3F800000; selp.f32 %f1327, %f1325, %f1322, %p143; selp.f32 %f1328, %f1326, %f1324, %p143; add.f32 %f1329, %f1327, 0fBF800000; add.f32 %f1318, %f1327, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1317,%f1318; // inline asm add.f32 %f1330, %f1329, %f1329; mul.f32 %f1331, %f1317, %f1330; mul.f32 %f1332, %f1331, %f1331; fma.rn.f32 %f1335, %f1091, %f1332, %f1090; fma.rn.f32 %f1337, %f1335, %f1332, %f1093; mul.rn.f32 %f1338, %f1337, %f1332; mul.rn.f32 %f1339, %f1338, %f1331; sub.f32 %f1340, %f1329, %f1331; neg.f32 %f1341, %f1331; add.f32 %f1342, %f1340, %f1340; fma.rn.f32 %f1343, %f1341, %f1329, %f1342; mul.rn.f32 %f1344, %f1317, %f1343; add.f32 %f1345, %f1339, %f1331; sub.f32 %f1346, %f1331, %f1345; add.f32 %f1347, %f1339, %f1346; add.f32 %f1348, %f1344, %f1347; add.f32 %f1349, %f1345, %f1348; sub.f32 %f1350, %f1345, %f1349; add.f32 %f1351, %f1348, %f1350; mul.rn.f32 %f1353, %f1328, %f1109; mul.rn.f32 %f1355, %f1328, %f1111; add.f32 %f1356, %f1353, %f1349; sub.f32 %f1357, %f1353, %f1356; add.f32 %f1358, %f1349, %f1357; add.f32 %f1359, %f1351, %f1358; add.f32 %f1360, %f1355, %f1359; add.f32 %f1361, %f1356, %f1360; sub.f32 %f1362, %f1356, %f1361; add.f32 %f1363, %f1360, %f1362; mul.rn.f32 %f1365, %f1286, %f1361; neg.f32 %f1366, %f1365; fma.rn.f32 %f1367, %f1286, %f1361, %f1366; fma.rn.f32 %f1368, %f1286, %f1363, %f1367; fma.rn.f32 %f1370, %f1803, %f1361, %f1368; add.rn.f32 %f1371, %f1365, %f1370; neg.f32 %f1372, %f1371; add.rn.f32 %f1373, %f1365, %f1372; add.rn.f32 %f1374, %f1373, %f1370; mov.b32 %r387, %f1371; setp.eq.s32 %p144, %r387, 1118925336; add.s32 %r388, %r387, -1; mov.b32 %f1375, %r388; add.f32 %f1376, %f1374, 0f37000000; selp.f32 %f1377, %f1375, %f1371, %p144; selp.f32 %f243, %f1376, %f1374, %p144; mul.f32 %f1378, %f1377, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1379, %f1378; fma.rn.f32 %f1381, %f1379, %f1136, %f1377; fma.rn.f32 %f1383, %f1379, %f1138, %f1381; mul.f32 %f1384, %f1383, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1385, %f1384; add.f32 %f1386, %f1379, 0f00000000; ex2.approx.f32 %f1387, %f1386; mul.f32 %f1388, %f1385, %f1387; setp.lt.f32 %p145, %f1377, 0fC2D20000; selp.f32 %f1389, 0f00000000, %f1388, %p145; setp.gt.f32 %p146, %f1377, 0f42D20000; selp.f32 %f1791, 0f7F800000, %f1389, %p146; setp.eq.f32 %p147, %f1791, 0f7F800000; @%p147 bra BB0_130; fma.rn.f32 %f1791, %f1791, %f243, %f1791; BB0_130: setp.lt.f32 %p148, %f196, 0f00000000; and.pred %p4, %p148, %p133; mov.b32 %r389, %f1791; xor.b32 %r390, %r389, -2147483648; mov.b32 %f1390, %r390; selp.f32 %f1793, %f1390, %f1791, %p4; setp.eq.f32 %p150, %f196, 0f00000000; @%p150 bra BB0_133; bra.uni BB0_131; BB0_133: add.f32 %f1393, %f196, %f196; selp.f32 %f1793, %f1393, 0f00000000, %p133; bra.uni BB0_134; BB0_131: setp.geu.f32 %p151, %f196, 0f00000000; @%p151 bra BB0_134; cvt.rzi.f32.f32 %f1392, %f1286; setp.neu.f32 %p152, %f1392, 0f3EE66666; selp.f32 %f1793, 0f7FFFFFFF, %f1793, %p152; BB0_134: add.f32 %f1394, %f242, 0f3EE66666; mov.b32 %r391, %f1394; setp.lt.s32 %p154, %r391, 2139095040; @%p154 bra BB0_139; setp.gtu.f32 %p155, %f242, 0f7F800000; @%p155 bra BB0_138; bra.uni BB0_136; BB0_138: add.f32 %f1793, %f196, 0f3EE66666; bra.uni BB0_139; BB0_136: setp.neu.f32 %p156, %f242, 0f7F800000; @%p156 bra BB0_139; selp.f32 %f1793, 0fFF800000, 0f7F800000, %p4; BB0_139: setp.eq.f32 %p157, %f196, 0f3F800000; selp.f32 %f254, 0f3F800000, %f1793, %p157; abs.f32 %f255, %f197; setp.lt.f32 %p158, %f255, 0f00800000; mul.f32 %f1397, %f255, 0f4B800000; selp.f32 %f1398, 0fC3170000, 0fC2FE0000, %p158; selp.f32 %f1399, %f1397, %f255, %p158; mov.b32 %r392, %f1399; and.b32 %r393, %r392, 8388607; or.b32 %r394, %r393, 1065353216; mov.b32 %f1400, %r394; shr.u32 %r395, %r392, 23; cvt.rn.f32.u32 %f1401, %r395; add.f32 %f1402, %f1398, %f1401; setp.gt.f32 %p159, %f1400, 0f3FB504F3; mul.f32 %f1403, %f1400, 0f3F000000; add.f32 %f1404, %f1402, 0f3F800000; selp.f32 %f1405, %f1403, %f1400, %p159; selp.f32 %f1406, %f1404, %f1402, %p159; add.f32 %f1407, %f1405, 0fBF800000; add.f32 %f1396, %f1405, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1395,%f1396; // inline asm add.f32 %f1408, %f1407, %f1407; mul.f32 %f1409, %f1395, %f1408; mul.f32 %f1410, %f1409, %f1409; fma.rn.f32 %f1413, %f1091, %f1410, %f1090; fma.rn.f32 %f1415, %f1413, %f1410, %f1093; mul.rn.f32 %f1416, %f1415, %f1410; mul.rn.f32 %f1417, %f1416, %f1409; sub.f32 %f1418, %f1407, %f1409; neg.f32 %f1419, %f1409; add.f32 %f1420, %f1418, %f1418; fma.rn.f32 %f1421, %f1419, %f1407, %f1420; mul.rn.f32 %f1422, %f1395, %f1421; add.f32 %f1423, %f1417, %f1409; sub.f32 %f1424, %f1409, %f1423; add.f32 %f1425, %f1417, %f1424; add.f32 %f1426, %f1422, %f1425; add.f32 %f1427, %f1423, %f1426; sub.f32 %f1428, %f1423, %f1427; add.f32 %f1429, %f1426, %f1428; mul.rn.f32 %f1431, %f1406, %f1109; mul.rn.f32 %f1433, %f1406, %f1111; add.f32 %f1434, %f1431, %f1427; sub.f32 %f1435, %f1431, %f1434; add.f32 %f1436, %f1427, %f1435; add.f32 %f1437, %f1429, %f1436; add.f32 %f1438, %f1433, %f1437; add.f32 %f1439, %f1434, %f1438; sub.f32 %f1440, %f1434, %f1439; add.f32 %f1441, %f1438, %f1440; mul.rn.f32 %f1443, %f1286, %f1439; neg.f32 %f1444, %f1443; fma.rn.f32 %f1445, %f1286, %f1439, %f1444; fma.rn.f32 %f1446, %f1286, %f1441, %f1445; fma.rn.f32 %f1448, %f1803, %f1439, %f1446; add.rn.f32 %f1449, %f1443, %f1448; neg.f32 %f1450, %f1449; add.rn.f32 %f1451, %f1443, %f1450; add.rn.f32 %f1452, %f1451, %f1448; mov.b32 %r396, %f1449; setp.eq.s32 %p160, %r396, 1118925336; add.s32 %r397, %r396, -1; mov.b32 %f1453, %r397; add.f32 %f1454, %f1452, 0f37000000; selp.f32 %f1455, %f1453, %f1449, %p160; selp.f32 %f256, %f1454, %f1452, %p160; mul.f32 %f1456, %f1455, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1457, %f1456; fma.rn.f32 %f1459, %f1457, %f1136, %f1455; fma.rn.f32 %f1461, %f1457, %f1138, %f1459; mul.f32 %f1462, %f1461, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1463, %f1462; add.f32 %f1464, %f1457, 0f00000000; ex2.approx.f32 %f1465, %f1464; mul.f32 %f1466, %f1463, %f1465; setp.lt.f32 %p161, %f1455, 0fC2D20000; selp.f32 %f1467, 0f00000000, %f1466, %p161; setp.gt.f32 %p162, %f1455, 0f42D20000; selp.f32 %f1794, 0f7F800000, %f1467, %p162; setp.eq.f32 %p163, %f1794, 0f7F800000; @%p163 bra BB0_141; fma.rn.f32 %f1794, %f1794, %f256, %f1794; BB0_141: setp.lt.f32 %p164, %f197, 0f00000000; and.pred %p5, %p164, %p133; mov.b32 %r398, %f1794; xor.b32 %r399, %r398, -2147483648; mov.b32 %f1468, %r399; selp.f32 %f1796, %f1468, %f1794, %p5; setp.eq.f32 %p166, %f197, 0f00000000; @%p166 bra BB0_144; bra.uni BB0_142; BB0_144: add.f32 %f1471, %f197, %f197; selp.f32 %f1796, %f1471, 0f00000000, %p133; bra.uni BB0_145; BB0_142: setp.geu.f32 %p167, %f197, 0f00000000; @%p167 bra BB0_145; cvt.rzi.f32.f32 %f1470, %f1286; setp.neu.f32 %p168, %f1470, 0f3EE66666; selp.f32 %f1796, 0f7FFFFFFF, %f1796, %p168; BB0_145: add.f32 %f1472, %f255, 0f3EE66666; mov.b32 %r400, %f1472; setp.lt.s32 %p170, %r400, 2139095040; @%p170 bra BB0_150; setp.gtu.f32 %p171, %f255, 0f7F800000; @%p171 bra BB0_149; bra.uni BB0_147; BB0_149: add.f32 %f1796, %f197, 0f3EE66666; bra.uni BB0_150; BB0_147: setp.neu.f32 %p172, %f255, 0f7F800000; @%p172 bra BB0_150; selp.f32 %f1796, 0fFF800000, 0f7F800000, %p5; BB0_150: mov.u32 %r489, 4; setp.eq.f32 %p173, %f197, 0f3F800000; selp.f32 %f1473, 0f3F800000, %f1796, %p173; cvt.u64.u32 %rd108, %r3; cvt.u64.u32 %rd107, %r2; mov.u64 %rd111, image; cvta.global.u64 %rd106, %rd111; // inline asm call (%rd105), _rt_buffer_get_64, (%rd106, %r113, %r489, %rd107, %rd108, %rd32, %rd32); // inline asm cvt.sat.f32.f32 %f1474, %f1473; mul.f32 %f1475, %f1474, 0f437FFD71; cvt.rzi.u32.f32 %r403, %f1475; cvt.sat.f32.f32 %f1476, %f254; mul.f32 %f1477, %f1476, 0f437FFD71; cvt.rzi.u32.f32 %r404, %f1477; cvt.sat.f32.f32 %f1478, %f241; mul.f32 %f1479, %f1478, 0f437FFD71; cvt.rzi.u32.f32 %r405, %f1479; cvt.u16.u32 %rs34, %r403; cvt.u16.u32 %rs35, %r405; cvt.u16.u32 %rs36, %r404; mov.u16 %rs37, 255; st.v4.u8 [%rd105], {%rs34, %rs36, %rs35, %rs37}; ld.global.u32 %r522, [imageEnabled]; BB0_151: and.b32 %r406, %r522, 4; setp.eq.s32 %p174, %r406, 0; @%p174 bra BB0_155; ld.global.u32 %r407, [additive]; setp.eq.s32 %p175, %r407, 0; cvt.u64.u32 %rd18, %r2; cvt.u64.u32 %rd19, %r3; mov.f32 %f1480, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs38, %f1480;} // inline asm @%p175 bra BB0_154; mov.u64 %rd124, image_HDR; cvta.global.u64 %rd113, %rd124; mov.u32 %r411, 8; // inline asm call (%rd112), _rt_buffer_get_64, (%rd113, %r113, %r411, %rd18, %rd19, %rd32, %rd32); // inline asm ld.v4.u16 {%rs45, %rs46, %rs47, %rs48}, [%rd112]; // inline asm { cvt.f32.f16 %f1481, %rs45;} // inline asm // inline asm { cvt.f32.f16 %f1482, %rs46;} // inline asm // inline asm { cvt.f32.f16 %f1483, %rs47;} // inline asm // inline asm call (%rd118), _rt_buffer_get_64, (%rd113, %r113, %r411, %rd18, %rd19, %rd32, %rd32); // inline asm add.f32 %f1484, %f195, %f1481; add.f32 %f1485, %f196, %f1482; add.f32 %f1486, %f197, %f1483; // inline asm { cvt.rn.f16.f32 %rs44, %f1486;} // inline asm // inline asm { cvt.rn.f16.f32 %rs43, %f1485;} // inline asm // inline asm { cvt.rn.f16.f32 %rs42, %f1484;} // inline asm st.v4.u16 [%rd118], {%rs42, %rs43, %rs44, %rs38}; bra.uni BB0_155; BB0_154: mov.u64 %rd131, image_HDR; cvta.global.u64 %rd126, %rd131; mov.u32 %r413, 8; // inline asm call (%rd125), _rt_buffer_get_64, (%rd126, %r113, %r413, %rd18, %rd19, %rd32, %rd32); // inline asm // inline asm { cvt.rn.f16.f32 %rs51, %f197;} // inline asm // inline asm { cvt.rn.f16.f32 %rs50, %f196;} // inline asm // inline asm { cvt.rn.f16.f32 %rs49, %f195;} // inline asm st.v4.u16 [%rd125], {%rs49, %rs50, %rs51, %rs38}; BB0_155: mov.u32 %r490, 4; ld.global.v2.u32 {%r416, %r417}, [pixelID]; cvt.u64.u32 %rd134, %r416; cvt.u64.u32 %rd135, %r417; mov.u64 %rd138, uvtangent; cvta.global.u64 %rd133, %rd138; // inline asm call (%rd132), _rt_buffer_get_64, (%rd133, %r113, %r490, %rd134, %rd135, %rd32, %rd32); // inline asm ld.u32 %r102, [%rd132]; shr.u32 %r103, %r102, 16; cvt.u16.u32 %rs52, %r103; and.b16 %rs53, %rs52, 255; cvt.u16.u32 %rs54, %r102; or.b16 %rs55, %rs54, %rs53; setp.eq.s16 %p176, %rs55, 0; mov.f32 %f1797, %f1803; mov.f32 %f1798, %f1803; mov.f32 %f1799, %f1803; @%p176 bra BB0_157; ld.u8 %rs56, [%rd132+1]; and.b16 %rs58, %rs54, 255; cvt.rn.f32.u16 %f1493, %rs58; div.rn.f32 %f1494, %f1493, 0f437F0000; fma.rn.f32 %f1495, %f1494, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f1496, %rs56; div.rn.f32 %f1497, %f1496, 0f437F0000; fma.rn.f32 %f1498, %f1497, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f1499, %rs53; div.rn.f32 %f1500, %f1499, 0f437F0000; fma.rn.f32 %f1501, %f1500, 0f40000000, 0fBF800000; mul.f32 %f1502, %f1498, %f1498; fma.rn.f32 %f1503, %f1495, %f1495, %f1502; fma.rn.f32 %f1504, %f1501, %f1501, %f1503; sqrt.rn.f32 %f1505, %f1504; rcp.rn.f32 %f1506, %f1505; mul.f32 %f1797, %f1495, %f1506; mul.f32 %f1798, %f1498, %f1506; mul.f32 %f1799, %f1501, %f1506; BB0_157: mov.u32 %r491, 4; mul.f32 %f1510, %f1714, %f1798; mul.f32 %f1511, %f1713, %f1799; sub.f32 %f1512, %f1511, %f1510; mul.f32 %f1513, %f1712, %f1799; mul.f32 %f1514, %f1714, %f1797; sub.f32 %f1515, %f1514, %f1513; mul.f32 %f1516, %f1713, %f1797; mul.f32 %f1517, %f1712, %f1798; sub.f32 %f1518, %f1517, %f1516; setp.lt.u32 %p177, %r102, 16777216; selp.f32 %f1519, 0fBF800000, 0f3F800000, %p177; mul.f32 %f1520, %f1512, %f1519; mul.f32 %f1521, %f1515, %f1519; mul.f32 %f1522, %f1518, %f1519; mul.f32 %f1523, %f1520, 0f00000000; mul.f32 %f1524, %f1521, 0f00000000; mul.f32 %f1525, %f1522, 0f00000000; fma.rn.f32 %f1526, %f1797, 0f3F5105EC, %f1523; fma.rn.f32 %f1527, %f1798, 0f3F5105EC, %f1524; fma.rn.f32 %f1528, %f1799, 0f3F5105EC, %f1525; mul.f32 %f273, %f1712, 0f3F13CD3A; add.f32 %f274, %f273, %f1526; mul.f32 %f275, %f1713, 0f3F13CD3A; add.f32 %f276, %f275, %f1527; mul.f32 %f277, %f1714, 0f3F13CD3A; add.f32 %f278, %f277, %f1528; ld.global.v2.u32 {%r422, %r423}, [pixelID]; cvt.u64.u32 %rd141, %r422; cvt.u64.u32 %rd142, %r423; // inline asm call (%rd139), _rt_buffer_get_64, (%rd133, %r113, %r491, %rd141, %rd142, %rd32, %rd32); // inline asm ld.u32 %r104, [%rd139]; shr.u32 %r105, %r104, 16; cvt.u16.u32 %rs61, %r105; and.b16 %rs62, %rs61, 255; cvt.u16.u32 %rs63, %r104; or.b16 %rs64, %rs63, %rs62; setp.eq.s16 %p178, %rs64, 0; mov.f32 %f1800, %f1803; mov.f32 %f1801, %f1803; mov.f32 %f1802, %f1803; @%p178 bra BB0_159; ld.u8 %rs65, [%rd139+1]; and.b16 %rs67, %rs63, 255; cvt.rn.f32.u16 %f1529, %rs67; div.rn.f32 %f1530, %f1529, 0f437F0000; fma.rn.f32 %f1531, %f1530, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f1532, %rs65; div.rn.f32 %f1533, %f1532, 0f437F0000; fma.rn.f32 %f1534, %f1533, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f1535, %rs62; div.rn.f32 %f1536, %f1535, 0f437F0000; fma.rn.f32 %f1537, %f1536, 0f40000000, 0fBF800000; mul.f32 %f1538, %f1534, %f1534; fma.rn.f32 %f1539, %f1531, %f1531, %f1538; fma.rn.f32 %f1540, %f1537, %f1537, %f1539; sqrt.rn.f32 %f1541, %f1540; rcp.rn.f32 %f1542, %f1541; mul.f32 %f1800, %f1531, %f1542; mul.f32 %f1801, %f1534, %f1542; mul.f32 %f1802, %f1537, %f1542; BB0_159: mov.u32 %r492, 4; mul.f32 %f1546, %f1714, %f1801; mul.f32 %f1547, %f1713, %f1802; sub.f32 %f1548, %f1547, %f1546; mul.f32 %f1549, %f1712, %f1802; mul.f32 %f1550, %f1714, %f1800; sub.f32 %f1551, %f1550, %f1549; mul.f32 %f1552, %f1713, %f1800; mul.f32 %f1553, %f1712, %f1801; sub.f32 %f1554, %f1553, %f1552; setp.lt.u32 %p179, %r104, 16777216; selp.f32 %f1555, 0fBF800000, 0f3F800000, %p179; mul.f32 %f1556, %f1548, %f1555; mul.f32 %f1557, %f1551, %f1555; mul.f32 %f1558, %f1554, %f1555; mul.f32 %f1559, %f1556, 0f3F3504F3; mul.f32 %f1560, %f1557, 0f3F3504F3; mul.f32 %f1561, %f1558, 0f3F3504F3; fma.rn.f32 %f1562, %f1800, 0fBED105EC, %f1559; fma.rn.f32 %f1563, %f1801, 0fBED105EC, %f1560; fma.rn.f32 %f1564, %f1802, 0fBED105EC, %f1561; add.f32 %f285, %f273, %f1562; add.f32 %f286, %f275, %f1563; add.f32 %f287, %f277, %f1564; ld.global.v2.u32 {%r428, %r429}, [pixelID]; cvt.u64.u32 %rd148, %r428; cvt.u64.u32 %rd149, %r429; // inline asm call (%rd146), _rt_buffer_get_64, (%rd133, %r113, %r492, %rd148, %rd149, %rd32, %rd32); // inline asm ld.u32 %r106, [%rd146]; shr.u32 %r107, %r106, 16; cvt.u16.u32 %rs70, %r107; and.b16 %rs71, %rs70, 255; cvt.u16.u32 %rs72, %r106; or.b16 %rs73, %rs72, %rs71; setp.eq.s16 %p180, %rs73, 0; mov.f32 %f1804, %f1803; mov.f32 %f1805, %f1803; @%p180 bra BB0_161; ld.u8 %rs74, [%rd146+1]; and.b16 %rs76, %rs72, 255; cvt.rn.f32.u16 %f1565, %rs76; div.rn.f32 %f1566, %f1565, 0f437F0000; fma.rn.f32 %f1567, %f1566, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f1568, %rs74; div.rn.f32 %f1569, %f1568, 0f437F0000; fma.rn.f32 %f1570, %f1569, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f1571, %rs71; div.rn.f32 %f1572, %f1571, 0f437F0000; fma.rn.f32 %f1573, %f1572, 0f40000000, 0fBF800000; mul.f32 %f1574, %f1570, %f1570; fma.rn.f32 %f1575, %f1567, %f1567, %f1574; fma.rn.f32 %f1576, %f1573, %f1573, %f1575; sqrt.rn.f32 %f1577, %f1576; rcp.rn.f32 %f1578, %f1577; mul.f32 %f1803, %f1567, %f1578; mul.f32 %f1804, %f1570, %f1578; mul.f32 %f1805, %f1573, %f1578; BB0_161: mul.f32 %f1580, %f1714, %f1804; mul.f32 %f1581, %f1713, %f1805; sub.f32 %f1582, %f1581, %f1580; mul.f32 %f1583, %f1712, %f1805; mul.f32 %f1584, %f1714, %f1803; sub.f32 %f1585, %f1584, %f1583; mul.f32 %f1586, %f1713, %f1803; mul.f32 %f1587, %f1712, %f1804; sub.f32 %f1588, %f1587, %f1586; setp.lt.u32 %p181, %r106, 16777216; selp.f32 %f1589, 0fBF800000, 0f3F800000, %p181; mul.f32 %f1590, %f1582, %f1589; mul.f32 %f1591, %f1585, %f1589; mul.f32 %f1592, %f1588, %f1589; mul.f32 %f1593, %f1590, 0fBF3504F3; mul.f32 %f1594, %f1591, 0fBF3504F3; mul.f32 %f1595, %f1592, 0fBF3504F3; fma.rn.f32 %f1596, %f1803, 0fBED105EC, %f1593; fma.rn.f32 %f1597, %f1804, 0fBED105EC, %f1594; fma.rn.f32 %f1598, %f1805, 0fBED105EC, %f1595; add.f32 %f1599, %f273, %f1596; add.f32 %f1600, %f275, %f1597; add.f32 %f1601, %f277, %f1598; ld.global.f32 %f1602, [directDir]; mul.f32 %f1603, %f274, %f1602; ld.global.f32 %f1604, [directDir+4]; mul.f32 %f1605, %f276, %f1604; neg.f32 %f1606, %f1605; sub.f32 %f1607, %f1606, %f1603; ld.global.f32 %f1608, [directDir+8]; mul.f32 %f1609, %f278, %f1608; sub.f32 %f1610, %f1607, %f1609; cvt.sat.f32.f32 %f1611, %f1610; mul.f32 %f1612, %f212, %f1611; mul.f32 %f1613, %f213, %f1611; mul.f32 %f1614, %f214, %f1611; mul.f32 %f1615, %f285, %f1602; mul.f32 %f1616, %f286, %f1604; neg.f32 %f1617, %f1616; sub.f32 %f1618, %f1617, %f1615; mul.f32 %f1619, %f287, %f1608; sub.f32 %f1620, %f1618, %f1619; cvt.sat.f32.f32 %f1621, %f1620; mul.f32 %f1622, %f212, %f1621; mul.f32 %f1623, %f213, %f1621; mul.f32 %f1624, %f214, %f1621; mul.f32 %f1625, %f1599, %f1602; mul.f32 %f1626, %f1600, %f1604; neg.f32 %f1627, %f1626; sub.f32 %f1628, %f1627, %f1625; mul.f32 %f1629, %f1601, %f1608; sub.f32 %f1630, %f1628, %f1629; cvt.sat.f32.f32 %f1631, %f1630; mul.f32 %f1632, %f212, %f1631; mul.f32 %f1633, %f213, %f1631; mul.f32 %f1634, %f214, %f1631; add.f32 %f1635, %f1612, %f1622; add.f32 %f1636, %f1613, %f1623; add.f32 %f1637, %f1614, %f1624; add.f32 %f1638, %f1635, %f1632; add.f32 %f1639, %f1636, %f1633; add.f32 %f1640, %f1637, %f1634; mul.f32 %f1641, %f1638, 0f3F13CD3A; mul.f32 %f1642, %f1639, 0f3F13CD3A; mul.f32 %f1643, %f1640, 0f3F13CD3A; div.rn.f32 %f1644, %f195, %f1641; div.rn.f32 %f1645, %f196, %f1642; div.rn.f32 %f1646, %f197, %f1643; setp.eq.f32 %p182, %f195, 0f00000000; selp.f32 %f1647, 0f00000000, %f1644, %p182; setp.eq.f32 %p183, %f196, 0f00000000; selp.f32 %f1648, 0f00000000, %f1645, %p183; setp.eq.f32 %p184, %f197, 0f00000000; selp.f32 %f1649, 0f00000000, %f1646, %p184; mul.f32 %f294, %f1612, %f1647; mul.f32 %f295, %f1613, %f1648; mul.f32 %f296, %f1614, %f1649; mul.f32 %f297, %f1622, %f1647; mul.f32 %f298, %f1623, %f1648; mul.f32 %f299, %f1624, %f1649; mul.f32 %f300, %f1632, %f1647; mul.f32 %f301, %f1633, %f1648; mul.f32 %f302, %f1634, %f1649; ld.global.u32 %r432, [additive]; setp.eq.s32 %p185, %r432, 0; cvt.u64.u32 %rd23, %r2; cvt.u64.u32 %rd24, %r3; mov.f32 %f1579, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs79, %f1579;} // inline asm @%p185 bra BB0_163; mov.u64 %rd165, image_RNM0; cvta.global.u64 %rd154, %rd165; mov.u32 %r436, 8; // inline asm call (%rd153), _rt_buffer_get_64, (%rd154, %r113, %r436, %rd23, %rd24, %rd32, %rd32); // inline asm ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd153]; // inline asm { cvt.f32.f16 %f1650, %rs86;} // inline asm // inline asm { cvt.f32.f16 %f1651, %rs87;} // inline asm // inline asm { cvt.f32.f16 %f1652, %rs88;} // inline asm // inline asm call (%rd159), _rt_buffer_get_64, (%rd154, %r113, %r436, %rd23, %rd24, %rd32, %rd32); // inline asm add.f32 %f1653, %f294, %f1650; add.f32 %f1654, %f295, %f1651; add.f32 %f1655, %f296, %f1652; // inline asm { cvt.rn.f16.f32 %rs85, %f1655;} // inline asm // inline asm { cvt.rn.f16.f32 %rs84, %f1654;} // inline asm // inline asm { cvt.rn.f16.f32 %rs83, %f1653;} // inline asm st.v4.u16 [%rd159], {%rs83, %rs84, %rs85, %rs79}; bra.uni BB0_164; BB0_163: mov.u64 %rd172, image_RNM0; cvta.global.u64 %rd167, %rd172; mov.u32 %r438, 8; // inline asm call (%rd166), _rt_buffer_get_64, (%rd167, %r113, %r438, %rd23, %rd24, %rd32, %rd32); // inline asm // inline asm { cvt.rn.f16.f32 %rs92, %f296;} // inline asm // inline asm { cvt.rn.f16.f32 %rs91, %f295;} // inline asm // inline asm { cvt.rn.f16.f32 %rs90, %f294;} // inline asm st.v4.u16 [%rd166], {%rs90, %rs91, %rs92, %rs79}; BB0_164: ld.global.u32 %r439, [additive]; setp.eq.s32 %p186, %r439, 0; // inline asm { cvt.rn.f16.f32 %rs93, %f1579;} // inline asm @%p186 bra BB0_166; mov.u64 %rd185, image_RNM1; cvta.global.u64 %rd174, %rd185; mov.u32 %r443, 8; // inline asm call (%rd173), _rt_buffer_get_64, (%rd174, %r113, %r443, %rd23, %rd24, %rd32, %rd32); // inline asm ld.v4.u16 {%rs100, %rs101, %rs102, %rs103}, [%rd173]; // inline asm { cvt.f32.f16 %f1660, %rs100;} // inline asm // inline asm { cvt.f32.f16 %f1661, %rs101;} // inline asm // inline asm { cvt.f32.f16 %f1662, %rs102;} // inline asm // inline asm call (%rd179), _rt_buffer_get_64, (%rd174, %r113, %r443, %rd23, %rd24, %rd32, %rd32); // inline asm add.f32 %f1663, %f297, %f1660; add.f32 %f1664, %f298, %f1661; add.f32 %f1665, %f299, %f1662; // inline asm { cvt.rn.f16.f32 %rs99, %f1665;} // inline asm // inline asm { cvt.rn.f16.f32 %rs98, %f1664;} // inline asm // inline asm { cvt.rn.f16.f32 %rs97, %f1663;} // inline asm st.v4.u16 [%rd179], {%rs97, %rs98, %rs99, %rs93}; bra.uni BB0_167; BB0_166: mov.u64 %rd192, image_RNM1; cvta.global.u64 %rd187, %rd192; mov.u32 %r445, 8; // inline asm call (%rd186), _rt_buffer_get_64, (%rd187, %r113, %r445, %rd23, %rd24, %rd32, %rd32); // inline asm // inline asm { cvt.rn.f16.f32 %rs106, %f299;} // inline asm // inline asm { cvt.rn.f16.f32 %rs105, %f298;} // inline asm // inline asm { cvt.rn.f16.f32 %rs104, %f297;} // inline asm st.v4.u16 [%rd186], {%rs104, %rs105, %rs106, %rs93}; BB0_167: ld.global.u32 %r446, [additive]; setp.eq.s32 %p187, %r446, 0; // inline asm { cvt.rn.f16.f32 %rs107, %f1579;} // inline asm @%p187 bra BB0_169; mov.u64 %rd205, image_RNM2; cvta.global.u64 %rd194, %rd205; mov.u32 %r450, 8; // inline asm call (%rd193), _rt_buffer_get_64, (%rd194, %r113, %r450, %rd23, %rd24, %rd32, %rd32); // inline asm ld.v4.u16 {%rs114, %rs115, %rs116, %rs117}, [%rd193]; // inline asm { cvt.f32.f16 %f1670, %rs114;} // inline asm // inline asm { cvt.f32.f16 %f1671, %rs115;} // inline asm // inline asm { cvt.f32.f16 %f1672, %rs116;} // inline asm // inline asm call (%rd199), _rt_buffer_get_64, (%rd194, %r113, %r450, %rd23, %rd24, %rd32, %rd32); // inline asm add.f32 %f1673, %f300, %f1670; add.f32 %f1674, %f301, %f1671; add.f32 %f1675, %f302, %f1672; // inline asm { cvt.rn.f16.f32 %rs113, %f1675;} // inline asm // inline asm { cvt.rn.f16.f32 %rs112, %f1674;} // inline asm // inline asm { cvt.rn.f16.f32 %rs111, %f1673;} // inline asm st.v4.u16 [%rd199], {%rs111, %rs112, %rs113, %rs107}; bra.uni BB0_187; BB0_169: mov.u64 %rd212, image_RNM2; cvta.global.u64 %rd207, %rd212; mov.u32 %r452, 8; // inline asm call (%rd206), _rt_buffer_get_64, (%rd207, %r113, %r452, %rd23, %rd24, %rd32, %rd32); // inline asm // inline asm { cvt.rn.f16.f32 %rs120, %f302;} // inline asm // inline asm { cvt.rn.f16.f32 %rs119, %f301;} // inline asm // inline asm { cvt.rn.f16.f32 %rs118, %f300;} // inline asm st.v4.u16 [%rd206], {%rs118, %rs119, %rs120, %rs107}; BB0_187: ret; }