// // Generated by NVIDIA NVVM Compiler // // Compiler Build ID: CL-23083092 // Cuda compilation tools, release 9.1, V9.1.85 // Based on LLVM 3.4svn // .version 6.1 .target sm_30 .address_size 64 // .globl _Z6oxMainv .global .align 8 .b8 pixelID[8]; .global .align 8 .b8 resolution[8]; .global .align 4 .b8 normal[12]; .global .align 4 .b8 camPos[12]; .global .align 4 .b8 root[4]; .global .align 4 .u32 imageEnabled; .global .texref lightmap; .global .align 16 .b8 tileInfo[16]; .global .align 4 .u32 additive; .global .align 1 .b8 image[1]; .global .align 1 .b8 image_HDR[1]; .global .align 1 .b8 image_HDR2[1]; .global .align 1 .b8 image_Mask[1]; .global .align 1 .b8 image_RNM0[1]; .global .align 1 .b8 image_RNM1[1]; .global .align 1 .b8 image_RNM2[1]; .global .align 1 .b8 image_RNM3[1]; .global .align 1 .b8 uvpos[1]; .global .align 1 .b8 uvnormal[1]; .global .align 4 .u32 ignoreNormal; .global .align 1 .b8 localLights[1]; .global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; .global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; .global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0}; .global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919; .global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; .global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1]; .visible .entry _Z6oxMainv( ) { .local .align 4 .b8 __local_depot0[4]; .reg .b64 %SP; .reg .b64 %SPL; .reg .pred %p<138>; .reg .b16 %rs<162>; .reg .f32 %f<1453>; .reg .b32 %r<254>; .reg .b64 %rd<272>; mov.u64 %rd271, __local_depot0; cvta.local.u64 %SP, %rd271; ld.global.v2.u32 {%r30, %r31}, [pixelID]; cvt.u64.u32 %rd10, %r30; cvt.u64.u32 %rd11, %r31; mov.u64 %rd14, uvnormal; cvta.global.u64 %rd9, %rd14; mov.u32 %r28, 2; mov.u32 %r29, 4; mov.u64 %rd13, 0; // inline asm call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13); // inline asm ld.u32 %r1, [%rd8]; shr.u32 %r34, %r1, 16; cvt.u16.u32 %rs1, %r34; and.b16 %rs9, %rs1, 255; cvt.u16.u32 %rs10, %r1; or.b16 %rs11, %rs10, %rs9; setp.eq.s16 %p8, %rs11, 0; mov.f32 %f1357, 0f00000000; mov.f32 %f1358, %f1357; mov.f32 %f1359, %f1357; @%p8 bra BB0_2; ld.u8 %rs12, [%rd8+1]; and.b16 %rs14, %rs10, 255; cvt.rn.f32.u16 %f279, %rs14; div.rn.f32 %f280, %f279, 0f437F0000; fma.rn.f32 %f281, %f280, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f282, %rs12; div.rn.f32 %f283, %f282, 0f437F0000; fma.rn.f32 %f284, %f283, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f285, %rs9; div.rn.f32 %f286, %f285, 0f437F0000; fma.rn.f32 %f287, %f286, 0f40000000, 0fBF800000; mul.f32 %f288, %f284, %f284; fma.rn.f32 %f289, %f281, %f281, %f288; fma.rn.f32 %f290, %f287, %f287, %f289; sqrt.rn.f32 %f291, %f290; rcp.rn.f32 %f292, %f291; mul.f32 %f1357, %f281, %f292; mul.f32 %f1358, %f284, %f292; mul.f32 %f1359, %f287, %f292; BB0_2: ld.global.v2.u32 {%r35, %r36}, [pixelID]; ld.global.v2.u32 {%r38, %r39}, [tileInfo]; add.s32 %r2, %r35, %r38; add.s32 %r3, %r36, %r39; setp.eq.f32 %p9, %f1358, 0f00000000; setp.eq.f32 %p10, %f1357, 0f00000000; and.pred %p11, %p10, %p9; setp.eq.f32 %p12, %f1359, 0f00000000; and.pred %p13, %p11, %p12; @%p13 bra BB0_111; bra.uni BB0_3; BB0_111: ld.global.u32 %r253, [imageEnabled]; and.b32 %r202, %r253, 1; setp.eq.b32 %p129, %r202, 1; @!%p129 bra BB0_113; bra.uni BB0_112; BB0_112: cvt.u64.u32 %rd159, %r2; cvt.u64.u32 %rd160, %r3; mov.u64 %rd163, image; cvta.global.u64 %rd158, %rd163; // inline asm call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13); // inline asm mov.u16 %rs93, 0; st.v4.u8 [%rd157], {%rs93, %rs93, %rs93, %rs93}; ld.global.u32 %r253, [imageEnabled]; BB0_113: and.b32 %r205, %r253, 8; setp.eq.s32 %p130, %r205, 0; @%p130 bra BB0_115; cvt.u64.u32 %rd167, %r3; cvt.u64.u32 %rd166, %r2; mov.u64 %rd170, image_Mask; cvta.global.u64 %rd165, %rd170; // inline asm call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13); // inline asm mov.f32 %f1318, 0f00000000; cvt.rzi.u32.f32 %r208, %f1318; cvt.u16.u32 %rs94, %r208; mov.u16 %rs95, 0; st.v2.u8 [%rd164], {%rs94, %rs95}; ld.global.u32 %r253, [imageEnabled]; BB0_115: cvt.u64.u32 %rd6, %r2; cvt.u64.u32 %rd7, %r3; and.b32 %r209, %r253, 4; setp.eq.s32 %p131, %r209, 0; @%p131 bra BB0_119; ld.global.u32 %r210, [additive]; setp.eq.s32 %p132, %r210, 0; @%p132 bra BB0_118; mov.u64 %rd183, image_HDR; cvta.global.u64 %rd172, %rd183; mov.u32 %r214, 8; // inline asm call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r214, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs102, %rs103, %rs104, %rs105}, [%rd171]; // inline asm { cvt.f32.f16 %f1319, %rs102;} // inline asm // inline asm { cvt.f32.f16 %f1320, %rs103;} // inline asm // inline asm { cvt.f32.f16 %f1321, %rs104;} // inline asm // inline asm call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r214, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1322, %f1319, 0f00000000; add.f32 %f1323, %f1320, 0f00000000; add.f32 %f1324, %f1321, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs101, %f1324;} // inline asm // inline asm { cvt.rn.f16.f32 %rs100, %f1323;} // inline asm // inline asm { cvt.rn.f16.f32 %rs99, %f1322;} // inline asm mov.u16 %rs106, 0; st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs106}; bra.uni BB0_119; BB0_3: ld.global.v2.u32 {%r47, %r48}, [pixelID]; cvt.u64.u32 %rd17, %r47; cvt.u64.u32 %rd18, %r48; mov.u64 %rd26, uvpos; cvta.global.u64 %rd16, %rd26; mov.u32 %r44, 12; // inline asm call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13); // inline asm ld.f32 %f9, [%rd15+8]; ld.f32 %f8, [%rd15+4]; ld.f32 %f7, [%rd15]; mul.f32 %f309, %f7, 0f3456BF95; mul.f32 %f310, %f8, 0f3456BF95; mul.f32 %f311, %f9, 0f3456BF95; abs.f32 %f312, %f1357; div.rn.f32 %f313, %f309, %f312; abs.f32 %f314, %f1358; div.rn.f32 %f315, %f310, %f314; abs.f32 %f316, %f1359; div.rn.f32 %f317, %f311, %f316; abs.f32 %f318, %f313; abs.f32 %f319, %f315; abs.f32 %f320, %f317; mov.f32 %f321, 0f38D1B717; max.f32 %f322, %f318, %f321; max.f32 %f323, %f319, %f321; max.f32 %f324, %f320, %f321; fma.rn.f32 %f10, %f1357, %f322, %f7; fma.rn.f32 %f11, %f1358, %f323, %f8; fma.rn.f32 %f12, %f1359, %f324, %f9; ld.global.v2.u32 {%r51, %r52}, [pixelID]; cvt.rn.f32.u32 %f13, %r51; cvt.rn.f32.u32 %f14, %r52; mov.u64 %rd27, localLights; cvta.global.u64 %rd25, %rd27; mov.u32 %r45, 1; mov.u32 %r46, 96; // inline asm call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46); // inline asm cvt.u32.u64 %r4, %rd21; setp.eq.s32 %p14, %r4, 0; mov.f32 %f1360, 0f00000000; mov.f32 %f1361, %f1360; mov.f32 %f1362, %f1360; mov.f32 %f1363, %f1360; mov.f32 %f1364, %f1360; mov.f32 %f1365, %f1360; mov.f32 %f1366, %f1360; mov.f32 %f1367, %f1360; mov.f32 %f1368, %f1360; mov.f32 %f1369, %f1360; mov.f32 %f1370, %f1360; mov.f32 %f1371, %f1360; mov.f32 %f1372, %f1360; mov.f32 %f1373, %f1360; mov.f32 %f1374, %f1360; mov.f32 %f1375, %f1360; @%p14 bra BB0_47; mov.f32 %f341, 0f40000000; cvt.rzi.f32.f32 %f342, %f341; add.f32 %f343, %f342, %f342; mov.f32 %f344, 0f40800000; sub.f32 %f345, %f344, %f343; abs.f32 %f15, %f345; mul.f32 %f16, %f10, 0f3456BF95; mul.f32 %f17, %f11, 0f3456BF95; mul.f32 %f18, %f12, 0f3456BF95; mul.f32 %f19, %f13, 0f3DD32618; mul.f32 %f20, %f14, 0f3DD2F1AA; mov.f32 %f340, 0f00000000; mov.u32 %r245, 0; abs.f32 %f536, %f16; abs.f32 %f537, %f17; max.f32 %f538, %f536, %f537; abs.f32 %f539, %f18; max.f32 %f540, %f538, %f539; mov.f32 %f1360, %f340; mov.f32 %f1361, %f340; mov.f32 %f1362, %f340; mov.f32 %f1363, %f340; mov.f32 %f1364, %f340; mov.f32 %f1365, %f340; mov.f32 %f1366, %f340; mov.f32 %f1367, %f340; mov.f32 %f1368, %f340; mov.f32 %f1369, %f340; mov.f32 %f1370, %f340; mov.f32 %f1371, %f340; mov.f32 %f1372, %f340; mov.f32 %f1373, %f340; mov.f32 %f1374, %f340; mov.f32 %f1375, %f340; BB0_5: cvt.u64.u32 %rd30, %r245; // inline asm call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13); // inline asm ld.v4.f32 {%f348, %f349, %f350, %f351}, [%rd28+80]; ld.v4.f32 {%f352, %f353, %f354, %f355}, [%rd28+64]; ld.v4.f32 {%f356, %f357, %f358, %f359}, [%rd28+48]; ld.v4.f32 {%f360, %f1384, %f1385, %f363}, [%rd28+32]; ld.v4.f32 {%f364, %f365, %f366, %f367}, [%rd28+16]; ld.v4.f32 {%f368, %f369, %f370, %f371}, [%rd28]; mov.b32 %r6, %f351; sub.f32 %f61, %f369, %f7; sub.f32 %f63, %f370, %f8; sub.f32 %f65, %f371, %f9; mul.f32 %f373, %f63, %f63; fma.rn.f32 %f374, %f61, %f61, %f373; fma.rn.f32 %f375, %f65, %f65, %f374; sqrt.rn.f32 %f66, %f375; rcp.rn.f32 %f376, %f66; mul.f32 %f67, %f61, %f376; mul.f32 %f68, %f63, %f376; mul.f32 %f69, %f65, %f376; mul.f32 %f70, %f66, %f367; abs.f32 %f71, %f70; setp.lt.f32 %p15, %f71, 0f00800000; mul.f32 %f377, %f71, 0f4B800000; selp.f32 %f378, 0fC3170000, 0fC2FE0000, %p15; selp.f32 %f379, %f377, %f71, %p15; mov.b32 %r58, %f379; and.b32 %r59, %r58, 8388607; or.b32 %r60, %r59, 1065353216; mov.b32 %f380, %r60; shr.u32 %r61, %r58, 23; cvt.rn.f32.u32 %f381, %r61; add.f32 %f382, %f378, %f381; setp.gt.f32 %p16, %f380, 0f3FB504F3; mul.f32 %f383, %f380, 0f3F000000; add.f32 %f384, %f382, 0f3F800000; selp.f32 %f385, %f383, %f380, %p16; selp.f32 %f386, %f384, %f382, %p16; add.f32 %f387, %f385, 0fBF800000; add.f32 %f347, %f385, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f346,%f347; // inline asm add.f32 %f388, %f387, %f387; mul.f32 %f389, %f346, %f388; mul.f32 %f390, %f389, %f389; mov.f32 %f391, 0f3C4CAF63; mov.f32 %f392, 0f3B18F0FE; fma.rn.f32 %f393, %f392, %f390, %f391; mov.f32 %f394, 0f3DAAAABD; fma.rn.f32 %f395, %f393, %f390, %f394; mul.rn.f32 %f396, %f395, %f390; mul.rn.f32 %f397, %f396, %f389; sub.f32 %f398, %f387, %f389; neg.f32 %f399, %f389; add.f32 %f400, %f398, %f398; fma.rn.f32 %f401, %f399, %f387, %f400; mul.rn.f32 %f402, %f346, %f401; add.f32 %f403, %f397, %f389; sub.f32 %f404, %f389, %f403; add.f32 %f405, %f397, %f404; add.f32 %f406, %f402, %f405; add.f32 %f407, %f403, %f406; sub.f32 %f408, %f403, %f407; add.f32 %f409, %f406, %f408; mov.f32 %f410, 0f3F317200; mul.rn.f32 %f411, %f386, %f410; mov.f32 %f412, 0f35BFBE8E; mul.rn.f32 %f413, %f386, %f412; add.f32 %f414, %f411, %f407; sub.f32 %f415, %f411, %f414; add.f32 %f416, %f407, %f415; add.f32 %f417, %f409, %f416; add.f32 %f418, %f413, %f417; add.f32 %f419, %f414, %f418; sub.f32 %f420, %f414, %f419; add.f32 %f421, %f418, %f420; mul.rn.f32 %f72, %f344, %f419; neg.f32 %f423, %f72; fma.rn.f32 %f424, %f344, %f419, %f423; fma.rn.f32 %f425, %f344, %f421, %f424; fma.rn.f32 %f73, %f340, %f419, %f425; add.rn.f32 %f74, %f72, %f73; mov.b32 %r62, %f74; setp.eq.s32 %p1, %r62, 1118925336; add.s32 %r63, %r62, -1; mov.b32 %f427, %r63; selp.f32 %f428, %f427, %f74, %p1; mul.f32 %f429, %f428, 0f3FB8AA3B; cvt.rzi.f32.f32 %f430, %f429; mov.f32 %f431, 0fBF317200; fma.rn.f32 %f432, %f430, %f431, %f428; mov.f32 %f433, 0fB5BFBE8E; fma.rn.f32 %f434, %f430, %f433, %f432; mul.f32 %f435, %f434, 0f3FB8AA3B; ex2.approx.ftz.f32 %f436, %f435; add.f32 %f437, %f430, 0f00000000; ex2.approx.f32 %f438, %f437; mul.f32 %f439, %f436, %f438; setp.lt.f32 %p17, %f428, 0fC2D20000; selp.f32 %f440, 0f00000000, %f439, %p17; setp.gt.f32 %p18, %f428, 0f42D20000; selp.f32 %f1376, 0f7F800000, %f440, %p18; setp.eq.f32 %p19, %f1376, 0f7F800000; @%p19 bra BB0_7; neg.f32 %f441, %f74; add.rn.f32 %f442, %f72, %f441; add.rn.f32 %f443, %f442, %f73; add.f32 %f444, %f443, 0f37000000; selp.f32 %f445, %f444, %f443, %p1; fma.rn.f32 %f1376, %f1376, %f445, %f1376; BB0_7: setp.lt.f32 %p20, %f70, 0f00000000; setp.eq.f32 %p21, %f15, 0f3F800000; and.pred %p2, %p20, %p21; mov.b32 %r64, %f1376; xor.b32 %r65, %r64, -2147483648; mov.b32 %f446, %r65; selp.f32 %f1378, %f446, %f1376, %p2; setp.eq.f32 %p22, %f70, 0f00000000; @%p22 bra BB0_10; bra.uni BB0_8; BB0_10: add.f32 %f449, %f70, %f70; selp.f32 %f1378, %f449, 0f00000000, %p21; bra.uni BB0_11; BB0_8: setp.geu.f32 %p23, %f70, 0f00000000; @%p23 bra BB0_11; cvt.rzi.f32.f32 %f448, %f344; setp.neu.f32 %p24, %f448, 0f40800000; selp.f32 %f1378, 0f7FFFFFFF, %f1378, %p24; BB0_11: add.f32 %f450, %f71, 0f40800000; mov.b32 %r66, %f450; setp.lt.s32 %p26, %r66, 2139095040; @%p26 bra BB0_16; setp.gtu.f32 %p27, %f71, 0f7F800000; @%p27 bra BB0_15; bra.uni BB0_13; BB0_15: add.f32 %f1378, %f70, 0f40800000; bra.uni BB0_16; BB0_13: setp.neu.f32 %p28, %f71, 0f7F800000; @%p28 bra BB0_16; selp.f32 %f1378, 0fFF800000, 0f7F800000, %p2; BB0_16: mul.f32 %f451, %f66, %f365; mov.f32 %f1407, 0f3F800000; sub.f32 %f453, %f1407, %f1378; setp.eq.f32 %p29, %f70, 0f3F800000; selp.f32 %f454, 0f00000000, %f453, %p29; cvt.sat.f32.f32 %f455, %f454; fma.rn.f32 %f456, %f451, %f451, %f366; div.rn.f32 %f100, %f455, %f456; mul.f32 %f457, %f1358, %f68; fma.rn.f32 %f458, %f1357, %f67, %f457; fma.rn.f32 %f101, %f1359, %f69, %f458; setp.eq.f32 %p30, %f368, 0f3F800000; @%p30 bra BB0_23; bra.uni BB0_17; BB0_23: setp.leu.f32 %p34, %f363, 0f00000000; @%p34 bra BB0_19; setp.geu.f32 %p35, %f359, 0f00000000; @%p35 bra BB0_25; sub.f32 %f1356, %f371, %f9; sub.f32 %f1355, %f369, %f7; sub.f32 %f1354, %f370, %f8; mul.f32 %f481, %f349, %f1354; fma.rn.f32 %f482, %f348, %f1355, %f481; fma.rn.f32 %f483, %f350, %f1356, %f482; rcp.rn.f32 %f484, %f483; mul.f32 %f1379, %f1355, %f484; mul.f32 %f1380, %f1354, %f484; mul.f32 %f1381, %f1356, %f484; neg.f32 %f359, %f359; bra.uni BB0_27; BB0_17: setp.eq.f32 %p31, %f368, 0f40000000; @%p31 bra BB0_21; bra.uni BB0_18; BB0_21: setp.leu.f32 %p33, %f363, 0f00000000; @%p33 bra BB0_19; mul.f32 %f475, %f357, %f68; fma.rn.f32 %f476, %f356, %f67, %f475; mul.f32 %f477, %f353, %f68; fma.rn.f32 %f478, %f352, %f67, %f477; mul.f32 %f479, %f349, %f68; fma.rn.f32 %f480, %f348, %f67, %f479; fma.rn.f32 %f472, %f358, %f69, %f476; fma.rn.f32 %f473, %f354, %f69, %f478; fma.rn.f32 %f474, %f350, %f69, %f480; cvt.rzi.s32.f32 %r67, %f363; mov.u32 %r68, 6; mov.u32 %r69, 0; // inline asm call (%f468, %f469, %f470, %f471), _rt_texture_get_base_id, (%r67, %r68, %f472, %f473, %f474, %r69); // inline asm mul.f32 %f1383, %f360, %f468; mul.f32 %f1384, %f1384, %f469; mul.f32 %f1385, %f1385, %f470; bra.uni BB0_28; BB0_18: setp.neu.f32 %p32, %f368, 0f40800000; @%p32 bra BB0_19; mul.f32 %f459, %f348, %f67; mul.f32 %f460, %f349, %f68; neg.f32 %f461, %f460; sub.f32 %f462, %f461, %f459; mul.f32 %f463, %f350, %f69; sub.f32 %f464, %f462, %f463; fma.rn.f32 %f465, %f363, %f464, %f359; cvt.sat.f32.f32 %f466, %f465; mul.f32 %f467, %f466, %f466; mul.f32 %f1386, %f100, %f467; mov.f32 %f1383, %f360; bra.uni BB0_29; BB0_19: mov.f32 %f1383, %f360; bra.uni BB0_28; BB0_25: mov.f32 %f1379, %f67; mov.f32 %f1380, %f68; mov.f32 %f1381, %f69; BB0_27: mul.f32 %f493, %f350, %f69; mul.f32 %f494, %f349, %f68; neg.f32 %f495, %f494; mul.f32 %f496, %f348, %f67; sub.f32 %f497, %f495, %f496; sub.f32 %f498, %f497, %f493; setp.gt.f32 %p36, %f498, 0f00000000; selp.f32 %f499, 0f3F800000, 0f00000000, %p36; mul.f32 %f500, %f357, %f1380; fma.rn.f32 %f501, %f356, %f1379, %f500; mul.f32 %f502, %f353, %f1380; fma.rn.f32 %f503, %f352, %f1379, %f502; fma.rn.f32 %f504, %f358, %f1381, %f501; fma.rn.f32 %f505, %f354, %f1381, %f503; fma.rn.f32 %f506, %f359, %f504, 0f3F000000; mov.f32 %f507, 0f3F800000; sub.f32 %f489, %f507, %f506; fma.rn.f32 %f490, %f359, %f505, 0f3F000000; cvt.rzi.s32.f32 %r70, %f363; mov.f32 %f492, 0f00000000; // inline asm call (%f485, %f486, %f487, %f488), _rt_texture_get_f_id, (%r70, %r28, %f489, %f490, %f492, %f492); // inline asm mul.f32 %f508, %f499, %f485; mul.f32 %f509, %f499, %f486; mul.f32 %f510, %f499, %f487; mul.f32 %f1383, %f360, %f508; mul.f32 %f1384, %f1384, %f509; mul.f32 %f1385, %f1385, %f510; BB0_28: mov.f32 %f1386, %f100; BB0_29: max.f32 %f526, %f1383, %f1384; max.f32 %f527, %f526, %f1385; mul.f32 %f528, %f1386, %f527; setp.lt.f32 %p38, %f528, 0f3727C5AC; mov.pred %p137, -1; mov.f32 %f136, 0f00000000; mov.f32 %f1388, %f136; mov.f32 %f1389, %f136; mov.f32 %f1390, %f136; mov.f32 %f1391, %f136; mov.f32 %f1392, %f136; mov.f32 %f1393, %f136; mov.f32 %f1394, %f136; mov.f32 %f1395, %f136; mov.f32 %f1396, %f136; mov.f32 %f1397, %f136; mov.f32 %f1398, %f136; mov.f32 %f1399, %f136; mov.f32 %f1400, %f136; mov.f32 %f1401, %f136; @%p38 bra BB0_31; ld.global.u32 %r72, [ignoreNormal]; setp.eq.s32 %p40, %r72, 0; selp.f32 %f529, %f101, 0f3F800000, %p40; cvt.sat.f32.f32 %f530, %f529; mul.f32 %f531, %f1386, %f530; mul.f32 %f136, %f1383, %f531; mul.f32 %f1388, %f1384, %f531; mul.f32 %f1389, %f1385, %f531; mul.f32 %f532, %f1386, 0f3E800000; mul.f32 %f1390, %f1383, %f532; mul.f32 %f1391, %f1384, %f532; mul.f32 %f1392, %f1385, %f532; mul.f32 %f1393, %f67, %f1390; mul.f32 %f1394, %f67, %f1391; mul.f32 %f1395, %f67, %f1392; mul.f32 %f1396, %f68, %f1390; mul.f32 %f1397, %f68, %f1391; mul.f32 %f1398, %f68, %f1392; mul.f32 %f1399, %f69, %f1390; mul.f32 %f1400, %f69, %f1391; mul.f32 %f1401, %f69, %f1392; mov.pred %p137, 0; BB0_31: @%p137 bra BB0_46; setp.eq.s32 %p41, %r6, 0; mov.u16 %rs161, 0; @%p41 bra BB0_43; abs.s32 %r8, %r6; mov.f32 %f1406, 0f00000000; setp.lt.s32 %p42, %r8, 1; @%p42 bra BB0_42; max.f32 %f152, %f540, %f321; and.b32 %r9, %r8, 3; setp.eq.s32 %p43, %r9, 0; add.u64 %rd35, %SP, 0; cvta.to.local.u64 %rd2, %rd35; mov.f32 %f1406, 0f00000000; mov.u32 %r249, 0; @%p43 bra BB0_40; setp.eq.s32 %p44, %r9, 1; mov.f32 %f1403, 0f00000000; mov.u32 %r247, 0; @%p44 bra BB0_39; setp.eq.s32 %p45, %r9, 2; mov.f32 %f1402, 0f00000000; mov.u32 %r246, 0; @%p45 bra BB0_38; cvt.rmi.f32.f32 %f552, %f19; sub.f32 %f553, %f19, %f552; cvt.rmi.f32.f32 %f554, %f20; sub.f32 %f555, %f20, %f554; add.f32 %f556, %f555, 0f420551EC; add.f32 %f557, %f553, 0f420551EC; mul.f32 %f558, %f553, %f556; fma.rn.f32 %f559, %f555, %f557, %f558; add.f32 %f560, %f559, 0f00000000; add.f32 %f561, %f553, %f560; add.f32 %f562, %f555, %f560; add.f32 %f563, %f561, %f562; mul.f32 %f564, %f560, %f563; cvt.rmi.f32.f32 %f565, %f564; sub.f32 %f566, %f564, %f565; add.f32 %f567, %f561, %f561; mul.f32 %f568, %f562, %f567; cvt.rmi.f32.f32 %f569, %f568; sub.f32 %f570, %f568, %f569; mul.f32 %f571, %f561, %f563; cvt.rmi.f32.f32 %f572, %f571; sub.f32 %f573, %f571, %f572; fma.rn.f32 %f574, %f566, 0f40000000, 0fBF800000; fma.rn.f32 %f575, %f570, 0f40000000, 0fBF800000; fma.rn.f32 %f576, %f573, 0f40000000, 0fBF800000; fma.rn.f32 %f577, %f364, %f574, %f369; fma.rn.f32 %f578, %f364, %f575, %f370; fma.rn.f32 %f579, %f364, %f576, %f371; sub.f32 %f580, %f577, %f7; sub.f32 %f581, %f578, %f8; sub.f32 %f582, %f579, %f9; mul.f32 %f583, %f581, %f581; fma.rn.f32 %f584, %f580, %f580, %f583; fma.rn.f32 %f585, %f582, %f582, %f584; sqrt.rn.f32 %f551, %f585; rcp.rn.f32 %f586, %f551; mul.f32 %f547, %f586, %f580; mul.f32 %f548, %f586, %f581; mul.f32 %f549, %f586, %f582; ld.global.u32 %r80, [imageEnabled]; and.b32 %r81, %r80, 32; setp.eq.s32 %p46, %r81, 0; selp.f32 %f587, 0f3F800000, 0f41200000, %p46; mul.f32 %f550, %f587, %f152; mov.u32 %r82, 1065353216; st.local.u32 [%rd2], %r82; ld.global.u32 %r76, [root]; // inline asm call _rt_trace_64, (%r76, %f10, %f11, %f12, %f547, %f548, %f549, %r45, %f550, %f551, %rd35, %r29); // inline asm ld.local.f32 %f588, [%rd2]; add.f32 %f1402, %f588, 0f00000000; mov.u32 %r246, %r45; BB0_38: cvt.rn.f32.s32 %f597, %r246; add.f32 %f598, %f13, %f597; sub.f32 %f599, %f14, %f597; mul.f32 %f600, %f598, 0f3DD32618; cvt.rmi.f32.f32 %f601, %f600; sub.f32 %f602, %f600, %f601; mul.f32 %f603, %f599, 0f3DD2F1AA; cvt.rmi.f32.f32 %f604, %f603; sub.f32 %f605, %f603, %f604; mul.f32 %f606, %f597, 0f3DC74539; cvt.rmi.f32.f32 %f607, %f606; sub.f32 %f608, %f606, %f607; add.f32 %f609, %f605, 0f420551EC; add.f32 %f610, %f602, 0f420551EC; add.f32 %f611, %f608, 0f420551EC; mul.f32 %f612, %f602, %f609; fma.rn.f32 %f613, %f605, %f610, %f612; fma.rn.f32 %f614, %f608, %f611, %f613; add.f32 %f615, %f602, %f614; add.f32 %f616, %f605, %f614; add.f32 %f617, %f608, %f614; add.f32 %f618, %f615, %f616; mul.f32 %f619, %f617, %f618; cvt.rmi.f32.f32 %f620, %f619; sub.f32 %f621, %f619, %f620; add.f32 %f622, %f615, %f615; mul.f32 %f623, %f616, %f622; cvt.rmi.f32.f32 %f624, %f623; sub.f32 %f625, %f623, %f624; mul.f32 %f626, %f615, %f618; cvt.rmi.f32.f32 %f627, %f626; sub.f32 %f628, %f626, %f627; fma.rn.f32 %f629, %f621, 0f40000000, 0fBF800000; fma.rn.f32 %f630, %f625, 0f40000000, 0fBF800000; fma.rn.f32 %f631, %f628, 0f40000000, 0fBF800000; fma.rn.f32 %f632, %f364, %f629, %f369; fma.rn.f32 %f633, %f364, %f630, %f370; fma.rn.f32 %f634, %f364, %f631, %f371; sub.f32 %f635, %f632, %f7; sub.f32 %f636, %f633, %f8; sub.f32 %f637, %f634, %f9; mul.f32 %f638, %f636, %f636; fma.rn.f32 %f639, %f635, %f635, %f638; fma.rn.f32 %f640, %f637, %f637, %f639; sqrt.rn.f32 %f596, %f640; rcp.rn.f32 %f641, %f596; mul.f32 %f592, %f641, %f635; mul.f32 %f593, %f641, %f636; mul.f32 %f594, %f641, %f637; ld.global.u32 %r86, [imageEnabled]; and.b32 %r87, %r86, 32; setp.eq.s32 %p47, %r87, 0; selp.f32 %f642, 0f3F800000, 0f41200000, %p47; mul.f32 %f595, %f642, %f152; mov.u32 %r88, 1065353216; st.local.u32 [%rd2], %r88; ld.global.u32 %r83, [root]; // inline asm call _rt_trace_64, (%r83, %f10, %f11, %f12, %f592, %f593, %f594, %r45, %f595, %f596, %rd35, %r29); // inline asm ld.local.f32 %f643, [%rd2]; add.f32 %f1403, %f1402, %f643; add.s32 %r247, %r246, 1; BB0_39: cvt.rn.f32.s32 %f652, %r247; add.f32 %f653, %f13, %f652; sub.f32 %f654, %f14, %f652; mul.f32 %f655, %f653, 0f3DD32618; cvt.rmi.f32.f32 %f656, %f655; sub.f32 %f657, %f655, %f656; mul.f32 %f658, %f654, 0f3DD2F1AA; cvt.rmi.f32.f32 %f659, %f658; sub.f32 %f660, %f658, %f659; mul.f32 %f661, %f652, 0f3DC74539; cvt.rmi.f32.f32 %f662, %f661; sub.f32 %f663, %f661, %f662; add.f32 %f664, %f660, 0f420551EC; add.f32 %f665, %f657, 0f420551EC; add.f32 %f666, %f663, 0f420551EC; mul.f32 %f667, %f657, %f664; fma.rn.f32 %f668, %f660, %f665, %f667; fma.rn.f32 %f669, %f663, %f666, %f668; add.f32 %f670, %f657, %f669; add.f32 %f671, %f660, %f669; add.f32 %f672, %f663, %f669; add.f32 %f673, %f670, %f671; mul.f32 %f674, %f672, %f673; cvt.rmi.f32.f32 %f675, %f674; sub.f32 %f676, %f674, %f675; add.f32 %f677, %f670, %f670; mul.f32 %f678, %f671, %f677; cvt.rmi.f32.f32 %f679, %f678; sub.f32 %f680, %f678, %f679; mul.f32 %f681, %f670, %f673; cvt.rmi.f32.f32 %f682, %f681; sub.f32 %f683, %f681, %f682; fma.rn.f32 %f684, %f676, 0f40000000, 0fBF800000; fma.rn.f32 %f685, %f680, 0f40000000, 0fBF800000; fma.rn.f32 %f686, %f683, 0f40000000, 0fBF800000; fma.rn.f32 %f687, %f364, %f684, %f369; fma.rn.f32 %f688, %f364, %f685, %f370; fma.rn.f32 %f689, %f364, %f686, %f371; sub.f32 %f690, %f687, %f7; sub.f32 %f691, %f688, %f8; sub.f32 %f692, %f689, %f9; mul.f32 %f693, %f691, %f691; fma.rn.f32 %f694, %f690, %f690, %f693; fma.rn.f32 %f695, %f692, %f692, %f694; sqrt.rn.f32 %f651, %f695; rcp.rn.f32 %f696, %f651; mul.f32 %f647, %f696, %f690; mul.f32 %f648, %f696, %f691; mul.f32 %f649, %f696, %f692; ld.global.u32 %r92, [imageEnabled]; and.b32 %r93, %r92, 32; setp.eq.s32 %p48, %r93, 0; selp.f32 %f697, 0f3F800000, 0f41200000, %p48; mul.f32 %f650, %f697, %f152; mov.u32 %r94, 1065353216; st.local.u32 [%rd2], %r94; ld.global.u32 %r89, [root]; mov.u32 %r90, 1; // inline asm call _rt_trace_64, (%r89, %f10, %f11, %f12, %f647, %f648, %f649, %r90, %f650, %f651, %rd35, %r29); // inline asm ld.local.f32 %f698, [%rd2]; add.f32 %f1406, %f1403, %f698; add.s32 %r249, %r247, 1; BB0_40: setp.lt.u32 %p49, %r8, 4; @%p49 bra BB0_42; BB0_41: cvt.rn.f32.s32 %f731, %r249; add.f32 %f732, %f13, %f731; sub.f32 %f733, %f14, %f731; mul.f32 %f734, %f732, 0f3DD32618; cvt.rmi.f32.f32 %f735, %f734; sub.f32 %f736, %f734, %f735; mul.f32 %f737, %f733, 0f3DD2F1AA; cvt.rmi.f32.f32 %f738, %f737; sub.f32 %f739, %f737, %f738; mul.f32 %f740, %f731, 0f3DC74539; cvt.rmi.f32.f32 %f741, %f740; sub.f32 %f742, %f740, %f741; add.f32 %f743, %f739, 0f420551EC; add.f32 %f744, %f736, 0f420551EC; add.f32 %f745, %f742, 0f420551EC; mul.f32 %f746, %f736, %f743; fma.rn.f32 %f747, %f739, %f744, %f746; fma.rn.f32 %f748, %f742, %f745, %f747; add.f32 %f749, %f736, %f748; add.f32 %f750, %f739, %f748; add.f32 %f751, %f742, %f748; add.f32 %f752, %f749, %f750; mul.f32 %f753, %f751, %f752; cvt.rmi.f32.f32 %f754, %f753; sub.f32 %f755, %f753, %f754; add.f32 %f756, %f749, %f749; mul.f32 %f757, %f750, %f756; cvt.rmi.f32.f32 %f758, %f757; sub.f32 %f759, %f757, %f758; mul.f32 %f760, %f749, %f752; cvt.rmi.f32.f32 %f761, %f760; sub.f32 %f762, %f760, %f761; fma.rn.f32 %f763, %f755, 0f40000000, 0fBF800000; fma.rn.f32 %f764, %f759, 0f40000000, 0fBF800000; fma.rn.f32 %f765, %f762, 0f40000000, 0fBF800000; fma.rn.f32 %f766, %f364, %f763, %f369; fma.rn.f32 %f767, %f364, %f764, %f370; fma.rn.f32 %f768, %f364, %f765, %f371; sub.f32 %f769, %f766, %f7; sub.f32 %f770, %f767, %f8; sub.f32 %f771, %f768, %f9; mul.f32 %f772, %f770, %f770; fma.rn.f32 %f773, %f769, %f769, %f772; fma.rn.f32 %f774, %f771, %f771, %f773; sqrt.rn.f32 %f706, %f774; rcp.rn.f32 %f775, %f706; mul.f32 %f702, %f775, %f769; mul.f32 %f703, %f775, %f770; mul.f32 %f704, %f775, %f771; ld.global.u32 %r107, [imageEnabled]; and.b32 %r108, %r107, 32; setp.eq.s32 %p50, %r108, 0; selp.f32 %f776, 0f3F800000, 0f41200000, %p50; mul.f32 %f705, %f776, %f152; mov.u32 %r109, 1065353216; st.local.u32 [%rd2], %r109; ld.global.u32 %r95, [root]; mov.u32 %r105, 1; // inline asm call _rt_trace_64, (%r95, %f10, %f11, %f12, %f702, %f703, %f704, %r105, %f705, %f706, %rd35, %r29); // inline asm ld.local.f32 %f777, [%rd2]; add.f32 %f778, %f1406, %f777; add.s32 %r110, %r249, 1; cvt.rn.f32.s32 %f779, %r110; add.f32 %f780, %f13, %f779; sub.f32 %f781, %f14, %f779; mul.f32 %f782, %f780, 0f3DD32618; cvt.rmi.f32.f32 %f783, %f782; sub.f32 %f784, %f782, %f783; mul.f32 %f785, %f781, 0f3DD2F1AA; cvt.rmi.f32.f32 %f786, %f785; sub.f32 %f787, %f785, %f786; mul.f32 %f788, %f779, 0f3DC74539; cvt.rmi.f32.f32 %f789, %f788; sub.f32 %f790, %f788, %f789; add.f32 %f791, %f787, 0f420551EC; add.f32 %f792, %f784, 0f420551EC; add.f32 %f793, %f790, 0f420551EC; mul.f32 %f794, %f784, %f791; fma.rn.f32 %f795, %f787, %f792, %f794; fma.rn.f32 %f796, %f790, %f793, %f795; add.f32 %f797, %f784, %f796; add.f32 %f798, %f787, %f796; add.f32 %f799, %f790, %f796; add.f32 %f800, %f797, %f798; mul.f32 %f801, %f799, %f800; cvt.rmi.f32.f32 %f802, %f801; sub.f32 %f803, %f801, %f802; add.f32 %f804, %f797, %f797; mul.f32 %f805, %f798, %f804; cvt.rmi.f32.f32 %f806, %f805; sub.f32 %f807, %f805, %f806; mul.f32 %f808, %f797, %f800; cvt.rmi.f32.f32 %f809, %f808; sub.f32 %f810, %f808, %f809; fma.rn.f32 %f811, %f803, 0f40000000, 0fBF800000; fma.rn.f32 %f812, %f807, 0f40000000, 0fBF800000; fma.rn.f32 %f813, %f810, 0f40000000, 0fBF800000; fma.rn.f32 %f814, %f364, %f811, %f369; fma.rn.f32 %f815, %f364, %f812, %f370; fma.rn.f32 %f816, %f364, %f813, %f371; sub.f32 %f817, %f814, %f7; sub.f32 %f818, %f815, %f8; sub.f32 %f819, %f816, %f9; mul.f32 %f820, %f818, %f818; fma.rn.f32 %f821, %f817, %f817, %f820; fma.rn.f32 %f822, %f819, %f819, %f821; sqrt.rn.f32 %f714, %f822; rcp.rn.f32 %f823, %f714; mul.f32 %f710, %f823, %f817; mul.f32 %f711, %f823, %f818; mul.f32 %f712, %f823, %f819; ld.global.u32 %r111, [imageEnabled]; and.b32 %r112, %r111, 32; setp.eq.s32 %p51, %r112, 0; selp.f32 %f824, 0f3F800000, 0f41200000, %p51; mul.f32 %f713, %f824, %f152; st.local.u32 [%rd2], %r109; ld.global.u32 %r98, [root]; // inline asm call _rt_trace_64, (%r98, %f10, %f11, %f12, %f710, %f711, %f712, %r105, %f713, %f714, %rd35, %r29); // inline asm ld.local.f32 %f825, [%rd2]; add.f32 %f826, %f778, %f825; add.s32 %r113, %r249, 2; cvt.rn.f32.s32 %f827, %r113; add.f32 %f828, %f13, %f827; sub.f32 %f829, %f14, %f827; mul.f32 %f830, %f828, 0f3DD32618; cvt.rmi.f32.f32 %f831, %f830; sub.f32 %f832, %f830, %f831; mul.f32 %f833, %f829, 0f3DD2F1AA; cvt.rmi.f32.f32 %f834, %f833; sub.f32 %f835, %f833, %f834; mul.f32 %f836, %f827, 0f3DC74539; cvt.rmi.f32.f32 %f837, %f836; sub.f32 %f838, %f836, %f837; add.f32 %f839, %f835, 0f420551EC; add.f32 %f840, %f832, 0f420551EC; add.f32 %f841, %f838, 0f420551EC; mul.f32 %f842, %f832, %f839; fma.rn.f32 %f843, %f835, %f840, %f842; fma.rn.f32 %f844, %f838, %f841, %f843; add.f32 %f845, %f832, %f844; add.f32 %f846, %f835, %f844; add.f32 %f847, %f838, %f844; add.f32 %f848, %f845, %f846; mul.f32 %f849, %f847, %f848; cvt.rmi.f32.f32 %f850, %f849; sub.f32 %f851, %f849, %f850; add.f32 %f852, %f845, %f845; mul.f32 %f853, %f846, %f852; cvt.rmi.f32.f32 %f854, %f853; sub.f32 %f855, %f853, %f854; mul.f32 %f856, %f845, %f848; cvt.rmi.f32.f32 %f857, %f856; sub.f32 %f858, %f856, %f857; fma.rn.f32 %f859, %f851, 0f40000000, 0fBF800000; fma.rn.f32 %f860, %f855, 0f40000000, 0fBF800000; fma.rn.f32 %f861, %f858, 0f40000000, 0fBF800000; fma.rn.f32 %f862, %f364, %f859, %f369; fma.rn.f32 %f863, %f364, %f860, %f370; fma.rn.f32 %f864, %f364, %f861, %f371; sub.f32 %f865, %f862, %f7; sub.f32 %f866, %f863, %f8; sub.f32 %f867, %f864, %f9; mul.f32 %f868, %f866, %f866; fma.rn.f32 %f869, %f865, %f865, %f868; fma.rn.f32 %f870, %f867, %f867, %f869; sqrt.rn.f32 %f722, %f870; rcp.rn.f32 %f871, %f722; mul.f32 %f718, %f871, %f865; mul.f32 %f719, %f871, %f866; mul.f32 %f720, %f871, %f867; ld.global.u32 %r114, [imageEnabled]; and.b32 %r115, %r114, 32; setp.eq.s32 %p52, %r115, 0; selp.f32 %f872, 0f3F800000, 0f41200000, %p52; mul.f32 %f721, %f872, %f152; st.local.u32 [%rd2], %r109; ld.global.u32 %r101, [root]; // inline asm call _rt_trace_64, (%r101, %f10, %f11, %f12, %f718, %f719, %f720, %r105, %f721, %f722, %rd35, %r29); // inline asm ld.local.f32 %f873, [%rd2]; add.f32 %f874, %f826, %f873; add.s32 %r116, %r249, 3; cvt.rn.f32.s32 %f875, %r116; add.f32 %f876, %f13, %f875; sub.f32 %f877, %f14, %f875; mul.f32 %f878, %f876, 0f3DD32618; cvt.rmi.f32.f32 %f879, %f878; sub.f32 %f880, %f878, %f879; mul.f32 %f881, %f877, 0f3DD2F1AA; cvt.rmi.f32.f32 %f882, %f881; sub.f32 %f883, %f881, %f882; mul.f32 %f884, %f875, 0f3DC74539; cvt.rmi.f32.f32 %f885, %f884; sub.f32 %f886, %f884, %f885; add.f32 %f887, %f883, 0f420551EC; add.f32 %f888, %f880, 0f420551EC; add.f32 %f889, %f886, 0f420551EC; mul.f32 %f890, %f880, %f887; fma.rn.f32 %f891, %f883, %f888, %f890; fma.rn.f32 %f892, %f886, %f889, %f891; add.f32 %f893, %f880, %f892; add.f32 %f894, %f883, %f892; add.f32 %f895, %f886, %f892; add.f32 %f896, %f893, %f894; mul.f32 %f897, %f895, %f896; cvt.rmi.f32.f32 %f898, %f897; sub.f32 %f899, %f897, %f898; add.f32 %f900, %f893, %f893; mul.f32 %f901, %f894, %f900; cvt.rmi.f32.f32 %f902, %f901; sub.f32 %f903, %f901, %f902; mul.f32 %f904, %f893, %f896; cvt.rmi.f32.f32 %f905, %f904; sub.f32 %f906, %f904, %f905; fma.rn.f32 %f907, %f899, 0f40000000, 0fBF800000; fma.rn.f32 %f908, %f903, 0f40000000, 0fBF800000; fma.rn.f32 %f909, %f906, 0f40000000, 0fBF800000; fma.rn.f32 %f910, %f364, %f907, %f369; fma.rn.f32 %f911, %f364, %f908, %f370; fma.rn.f32 %f912, %f364, %f909, %f371; sub.f32 %f913, %f910, %f7; sub.f32 %f914, %f911, %f8; sub.f32 %f915, %f912, %f9; mul.f32 %f916, %f914, %f914; fma.rn.f32 %f917, %f913, %f913, %f916; fma.rn.f32 %f918, %f915, %f915, %f917; sqrt.rn.f32 %f730, %f918; rcp.rn.f32 %f919, %f730; mul.f32 %f726, %f919, %f913; mul.f32 %f727, %f919, %f914; mul.f32 %f728, %f919, %f915; ld.global.u32 %r117, [imageEnabled]; and.b32 %r118, %r117, 32; setp.eq.s32 %p53, %r118, 0; selp.f32 %f920, 0f3F800000, 0f41200000, %p53; mul.f32 %f729, %f920, %f152; st.local.u32 [%rd2], %r109; ld.global.u32 %r104, [root]; // inline asm call _rt_trace_64, (%r104, %f10, %f11, %f12, %f726, %f727, %f728, %r105, %f729, %f730, %rd35, %r29); // inline asm ld.local.f32 %f921, [%rd2]; add.f32 %f1406, %f874, %f921; add.s32 %r249, %r249, 4; setp.lt.s32 %p54, %r249, %r8; @%p54 bra BB0_41; BB0_42: cvt.rn.f32.s32 %f922, %r8; div.rn.f32 %f1407, %f1406, %f922; shr.u32 %r119, %r6, 31; cvt.u16.u32 %rs161, %r119; BB0_43: fma.rn.f32 %f1375, %f136, %f1407, %f1375; fma.rn.f32 %f1374, %f1388, %f1407, %f1374; fma.rn.f32 %f1373, %f1389, %f1407, %f1373; fma.rn.f32 %f1372, %f1390, %f1407, %f1372; fma.rn.f32 %f1371, %f1391, %f1407, %f1371; fma.rn.f32 %f1370, %f1392, %f1407, %f1370; fma.rn.f32 %f1369, %f1393, %f1407, %f1369; fma.rn.f32 %f1368, %f1394, %f1407, %f1368; fma.rn.f32 %f1367, %f1395, %f1407, %f1367; fma.rn.f32 %f1366, %f1396, %f1407, %f1366; fma.rn.f32 %f1365, %f1397, %f1407, %f1365; fma.rn.f32 %f1364, %f1398, %f1407, %f1364; fma.rn.f32 %f1363, %f1399, %f1407, %f1363; fma.rn.f32 %f1362, %f1400, %f1407, %f1362; fma.rn.f32 %f1361, %f1401, %f1407, %f1361; setp.eq.s16 %p55, %rs161, 0; @%p55 bra BB0_45; div.rn.f32 %f923, %f136, %f360; div.rn.f32 %f924, %f923, %f100; cvt.sat.f32.f32 %f925, %f924; mul.f32 %f1407, %f1407, %f925; BB0_45: add.f32 %f1360, %f1360, %f1407; BB0_46: add.s32 %r245, %r245, 1; setp.lt.u32 %p56, %r245, %r4; @%p56 bra BB0_5; BB0_47: ld.global.u32 %r251, [imageEnabled]; and.b32 %r120, %r251, 8; setp.eq.s32 %p57, %r120, 0; @%p57 bra BB0_60; cvt.sat.f32.f32 %f214, %f1360; cvt.u64.u32 %rd46, %r3; cvt.u64.u32 %rd45, %r2; mov.u64 %rd49, image_Mask; cvta.global.u64 %rd44, %rd49; // inline asm call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13); // inline asm mov.f32 %f928, 0f3E68BA2E; cvt.rzi.f32.f32 %f929, %f928; fma.rn.f32 %f930, %f929, 0fC0000000, 0f3EE8BA2E; abs.f32 %f215, %f930; abs.f32 %f216, %f214; setp.lt.f32 %p58, %f216, 0f00800000; mul.f32 %f931, %f216, 0f4B800000; selp.f32 %f932, 0fC3170000, 0fC2FE0000, %p58; selp.f32 %f933, %f931, %f216, %p58; mov.b32 %r123, %f933; and.b32 %r124, %r123, 8388607; or.b32 %r125, %r124, 1065353216; mov.b32 %f934, %r125; shr.u32 %r126, %r123, 23; cvt.rn.f32.u32 %f935, %r126; add.f32 %f936, %f932, %f935; setp.gt.f32 %p59, %f934, 0f3FB504F3; mul.f32 %f937, %f934, 0f3F000000; add.f32 %f938, %f936, 0f3F800000; selp.f32 %f939, %f937, %f934, %p59; selp.f32 %f940, %f938, %f936, %p59; add.f32 %f941, %f939, 0fBF800000; add.f32 %f927, %f939, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f926,%f927; // inline asm add.f32 %f942, %f941, %f941; mul.f32 %f943, %f926, %f942; mul.f32 %f944, %f943, %f943; mov.f32 %f945, 0f3C4CAF63; mov.f32 %f946, 0f3B18F0FE; fma.rn.f32 %f947, %f946, %f944, %f945; mov.f32 %f948, 0f3DAAAABD; fma.rn.f32 %f949, %f947, %f944, %f948; mul.rn.f32 %f950, %f949, %f944; mul.rn.f32 %f951, %f950, %f943; sub.f32 %f952, %f941, %f943; neg.f32 %f953, %f943; add.f32 %f954, %f952, %f952; fma.rn.f32 %f955, %f953, %f941, %f954; mul.rn.f32 %f956, %f926, %f955; add.f32 %f957, %f951, %f943; sub.f32 %f958, %f943, %f957; add.f32 %f959, %f951, %f958; add.f32 %f960, %f956, %f959; add.f32 %f961, %f957, %f960; sub.f32 %f962, %f957, %f961; add.f32 %f963, %f960, %f962; mov.f32 %f964, 0f3F317200; mul.rn.f32 %f965, %f940, %f964; mov.f32 %f966, 0f35BFBE8E; mul.rn.f32 %f967, %f940, %f966; add.f32 %f968, %f965, %f961; sub.f32 %f969, %f965, %f968; add.f32 %f970, %f961, %f969; add.f32 %f971, %f963, %f970; add.f32 %f972, %f967, %f971; add.f32 %f973, %f968, %f972; sub.f32 %f974, %f968, %f973; add.f32 %f975, %f972, %f974; mov.f32 %f976, 0f3EE8BA2E; mul.rn.f32 %f977, %f976, %f973; neg.f32 %f978, %f977; fma.rn.f32 %f979, %f976, %f973, %f978; fma.rn.f32 %f980, %f976, %f975, %f979; mov.f32 %f981, 0f00000000; fma.rn.f32 %f982, %f981, %f973, %f980; add.rn.f32 %f983, %f977, %f982; neg.f32 %f984, %f983; add.rn.f32 %f985, %f977, %f984; add.rn.f32 %f986, %f985, %f982; mov.b32 %r127, %f983; setp.eq.s32 %p60, %r127, 1118925336; add.s32 %r128, %r127, -1; mov.b32 %f987, %r128; add.f32 %f988, %f986, 0f37000000; selp.f32 %f989, %f987, %f983, %p60; selp.f32 %f217, %f988, %f986, %p60; mul.f32 %f990, %f989, 0f3FB8AA3B; cvt.rzi.f32.f32 %f991, %f990; mov.f32 %f992, 0fBF317200; fma.rn.f32 %f993, %f991, %f992, %f989; mov.f32 %f994, 0fB5BFBE8E; fma.rn.f32 %f995, %f991, %f994, %f993; mul.f32 %f996, %f995, 0f3FB8AA3B; ex2.approx.ftz.f32 %f997, %f996; add.f32 %f998, %f991, 0f00000000; ex2.approx.f32 %f999, %f998; mul.f32 %f1000, %f997, %f999; setp.lt.f32 %p61, %f989, 0fC2D20000; selp.f32 %f1001, 0f00000000, %f1000, %p61; setp.gt.f32 %p62, %f989, 0f42D20000; selp.f32 %f1441, 0f7F800000, %f1001, %p62; setp.eq.f32 %p63, %f1441, 0f7F800000; @%p63 bra BB0_50; fma.rn.f32 %f1441, %f1441, %f217, %f1441; BB0_50: setp.lt.f32 %p64, %f214, 0f00000000; setp.eq.f32 %p65, %f215, 0f3F800000; and.pred %p4, %p64, %p65; mov.b32 %r129, %f1441; xor.b32 %r130, %r129, -2147483648; mov.b32 %f1002, %r130; selp.f32 %f1443, %f1002, %f1441, %p4; setp.eq.f32 %p66, %f214, 0f00000000; @%p66 bra BB0_53; bra.uni BB0_51; BB0_53: add.f32 %f1005, %f214, %f214; selp.f32 %f1443, %f1005, 0f00000000, %p65; bra.uni BB0_54; BB0_118: mov.u64 %rd190, image_HDR; cvta.global.u64 %rd185, %rd190; mov.u32 %r216, 8; // inline asm call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r216, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1325, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs107, %f1325;} // inline asm mov.u16 %rs108, 0; st.v4.u16 [%rd184], {%rs107, %rs107, %rs107, %rs108}; BB0_119: ld.global.u32 %r217, [additive]; setp.eq.s32 %p133, %r217, 0; @%p133 bra BB0_121; mov.u64 %rd203, image_RNM0; cvta.global.u64 %rd192, %rd203; mov.u32 %r221, 8; // inline asm call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r221, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs115, %rs116, %rs117, %rs118}, [%rd191]; // inline asm { cvt.f32.f16 %f1326, %rs115;} // inline asm // inline asm { cvt.f32.f16 %f1327, %rs116;} // inline asm // inline asm { cvt.f32.f16 %f1328, %rs117;} // inline asm // inline asm call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r221, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1329, %f1326, 0f00000000; add.f32 %f1330, %f1327, 0f00000000; add.f32 %f1331, %f1328, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs114, %f1331;} // inline asm // inline asm { cvt.rn.f16.f32 %rs113, %f1330;} // inline asm // inline asm { cvt.rn.f16.f32 %rs112, %f1329;} // inline asm mov.u16 %rs119, 0; st.v4.u16 [%rd197], {%rs112, %rs113, %rs114, %rs119}; bra.uni BB0_122; BB0_121: mov.u64 %rd210, image_RNM0; cvta.global.u64 %rd205, %rd210; mov.u32 %r223, 8; // inline asm call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r223, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1332, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs120, %f1332;} // inline asm mov.u16 %rs121, 0; st.v4.u16 [%rd204], {%rs120, %rs120, %rs120, %rs121}; BB0_122: ld.global.u32 %r224, [additive]; setp.eq.s32 %p134, %r224, 0; @%p134 bra BB0_124; mov.u64 %rd223, image_RNM1; cvta.global.u64 %rd212, %rd223; mov.u32 %r228, 8; // inline asm call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r228, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs128, %rs129, %rs130, %rs131}, [%rd211]; // inline asm { cvt.f32.f16 %f1333, %rs128;} // inline asm // inline asm { cvt.f32.f16 %f1334, %rs129;} // inline asm // inline asm { cvt.f32.f16 %f1335, %rs130;} // inline asm // inline asm call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r228, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1336, %f1333, 0f00000000; add.f32 %f1337, %f1334, 0f00000000; add.f32 %f1338, %f1335, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs127, %f1338;} // inline asm // inline asm { cvt.rn.f16.f32 %rs126, %f1337;} // inline asm // inline asm { cvt.rn.f16.f32 %rs125, %f1336;} // inline asm mov.u16 %rs132, 0; st.v4.u16 [%rd217], {%rs125, %rs126, %rs127, %rs132}; bra.uni BB0_125; BB0_124: mov.u64 %rd230, image_RNM1; cvta.global.u64 %rd225, %rd230; mov.u32 %r230, 8; // inline asm call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r230, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1339, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs133, %f1339;} // inline asm mov.u16 %rs134, 0; st.v4.u16 [%rd224], {%rs133, %rs133, %rs133, %rs134}; BB0_125: ld.global.u32 %r231, [additive]; setp.eq.s32 %p135, %r231, 0; @%p135 bra BB0_127; mov.u64 %rd243, image_RNM2; cvta.global.u64 %rd232, %rd243; mov.u32 %r235, 8; // inline asm call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r235, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs141, %rs142, %rs143, %rs144}, [%rd231]; // inline asm { cvt.f32.f16 %f1340, %rs141;} // inline asm // inline asm { cvt.f32.f16 %f1341, %rs142;} // inline asm // inline asm { cvt.f32.f16 %f1342, %rs143;} // inline asm // inline asm call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r235, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1343, %f1340, 0f00000000; add.f32 %f1344, %f1341, 0f00000000; add.f32 %f1345, %f1342, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs140, %f1345;} // inline asm // inline asm { cvt.rn.f16.f32 %rs139, %f1344;} // inline asm // inline asm { cvt.rn.f16.f32 %rs138, %f1343;} // inline asm mov.u16 %rs145, 0; st.v4.u16 [%rd237], {%rs138, %rs139, %rs140, %rs145}; bra.uni BB0_128; BB0_127: mov.u64 %rd250, image_RNM2; cvta.global.u64 %rd245, %rd250; mov.u32 %r237, 8; // inline asm call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r237, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1346, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs146, %f1346;} // inline asm mov.u16 %rs147, 0; st.v4.u16 [%rd244], {%rs146, %rs146, %rs146, %rs147}; BB0_128: ld.global.u32 %r238, [additive]; setp.eq.s32 %p136, %r238, 0; @%p136 bra BB0_130; mov.u64 %rd263, image_RNM3; cvta.global.u64 %rd252, %rd263; mov.u32 %r242, 8; // inline asm call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r242, %rd6, %rd7, %rd13, %rd13); // inline asm ld.v4.u16 {%rs154, %rs155, %rs156, %rs157}, [%rd251]; // inline asm { cvt.f32.f16 %f1347, %rs154;} // inline asm // inline asm { cvt.f32.f16 %f1348, %rs155;} // inline asm // inline asm { cvt.f32.f16 %f1349, %rs156;} // inline asm // inline asm call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r242, %rd6, %rd7, %rd13, %rd13); // inline asm add.f32 %f1350, %f1347, 0f00000000; add.f32 %f1351, %f1348, 0f00000000; add.f32 %f1352, %f1349, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs153, %f1352;} // inline asm // inline asm { cvt.rn.f16.f32 %rs152, %f1351;} // inline asm // inline asm { cvt.rn.f16.f32 %rs151, %f1350;} // inline asm mov.u16 %rs158, 0; st.v4.u16 [%rd257], {%rs151, %rs152, %rs153, %rs158}; bra.uni BB0_131; BB0_130: mov.u64 %rd270, image_RNM3; cvta.global.u64 %rd265, %rd270; mov.u32 %r244, 8; // inline asm call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r244, %rd6, %rd7, %rd13, %rd13); // inline asm mov.f32 %f1353, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs159, %f1353;} // inline asm mov.u16 %rs160, 0; st.v4.u16 [%rd264], {%rs159, %rs159, %rs159, %rs160}; bra.uni BB0_131; BB0_51: setp.geu.f32 %p67, %f214, 0f00000000; @%p67 bra BB0_54; cvt.rzi.f32.f32 %f1004, %f976; setp.neu.f32 %p68, %f1004, 0f3EE8BA2E; selp.f32 %f1443, 0f7FFFFFFF, %f1443, %p68; BB0_54: add.f32 %f1006, %f216, 0f3EE8BA2E; mov.b32 %r131, %f1006; setp.lt.s32 %p70, %r131, 2139095040; @%p70 bra BB0_59; setp.gtu.f32 %p71, %f216, 0f7F800000; @%p71 bra BB0_58; bra.uni BB0_56; BB0_58: add.f32 %f1443, %f214, 0f3EE8BA2E; bra.uni BB0_59; BB0_56: setp.neu.f32 %p72, %f216, 0f7F800000; @%p72 bra BB0_59; selp.f32 %f1443, 0fFF800000, 0f7F800000, %p4; BB0_59: mul.f32 %f1007, %f1443, 0f437F0000; setp.eq.f32 %p73, %f214, 0f3F800000; selp.f32 %f1008, 0f437F0000, %f1007, %p73; cvt.rzi.u32.f32 %r132, %f1008; cvt.u16.u32 %rs17, %r132; mov.u16 %rs18, 255; st.v2.u8 [%rd43], {%rs17, %rs18}; ld.global.u32 %r251, [imageEnabled]; BB0_60: and.b32 %r133, %r251, 1; setp.eq.b32 %p74, %r133, 1; @!%p74 bra BB0_95; bra.uni BB0_61; BB0_61: mov.f32 %f1011, 0f3E666666; cvt.rzi.f32.f32 %f1012, %f1011; fma.rn.f32 %f1013, %f1012, 0fC0000000, 0f3EE66666; abs.f32 %f228, %f1013; abs.f32 %f229, %f1375; setp.lt.f32 %p75, %f229, 0f00800000; mul.f32 %f1014, %f229, 0f4B800000; selp.f32 %f1015, 0fC3170000, 0fC2FE0000, %p75; selp.f32 %f1016, %f1014, %f229, %p75; mov.b32 %r134, %f1016; and.b32 %r135, %r134, 8388607; or.b32 %r136, %r135, 1065353216; mov.b32 %f1017, %r136; shr.u32 %r137, %r134, 23; cvt.rn.f32.u32 %f1018, %r137; add.f32 %f1019, %f1015, %f1018; setp.gt.f32 %p76, %f1017, 0f3FB504F3; mul.f32 %f1020, %f1017, 0f3F000000; add.f32 %f1021, %f1019, 0f3F800000; selp.f32 %f1022, %f1020, %f1017, %p76; selp.f32 %f1023, %f1021, %f1019, %p76; add.f32 %f1024, %f1022, 0fBF800000; add.f32 %f1010, %f1022, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1009,%f1010; // inline asm add.f32 %f1025, %f1024, %f1024; mul.f32 %f1026, %f1009, %f1025; mul.f32 %f1027, %f1026, %f1026; mov.f32 %f1028, 0f3C4CAF63; mov.f32 %f1029, 0f3B18F0FE; fma.rn.f32 %f1030, %f1029, %f1027, %f1028; mov.f32 %f1031, 0f3DAAAABD; fma.rn.f32 %f1032, %f1030, %f1027, %f1031; mul.rn.f32 %f1033, %f1032, %f1027; mul.rn.f32 %f1034, %f1033, %f1026; sub.f32 %f1035, %f1024, %f1026; neg.f32 %f1036, %f1026; add.f32 %f1037, %f1035, %f1035; fma.rn.f32 %f1038, %f1036, %f1024, %f1037; mul.rn.f32 %f1039, %f1009, %f1038; add.f32 %f1040, %f1034, %f1026; sub.f32 %f1041, %f1026, %f1040; add.f32 %f1042, %f1034, %f1041; add.f32 %f1043, %f1039, %f1042; add.f32 %f1044, %f1040, %f1043; sub.f32 %f1045, %f1040, %f1044; add.f32 %f1046, %f1043, %f1045; mov.f32 %f1047, 0f3F317200; mul.rn.f32 %f1048, %f1023, %f1047; mov.f32 %f1049, 0f35BFBE8E; mul.rn.f32 %f1050, %f1023, %f1049; add.f32 %f1051, %f1048, %f1044; sub.f32 %f1052, %f1048, %f1051; add.f32 %f1053, %f1044, %f1052; add.f32 %f1054, %f1046, %f1053; add.f32 %f1055, %f1050, %f1054; add.f32 %f1056, %f1051, %f1055; sub.f32 %f1057, %f1051, %f1056; add.f32 %f1058, %f1055, %f1057; mov.f32 %f1059, 0f3EE66666; mul.rn.f32 %f1060, %f1059, %f1056; neg.f32 %f1061, %f1060; fma.rn.f32 %f1062, %f1059, %f1056, %f1061; fma.rn.f32 %f1063, %f1059, %f1058, %f1062; mov.f32 %f1064, 0f00000000; fma.rn.f32 %f1065, %f1064, %f1056, %f1063; add.rn.f32 %f1066, %f1060, %f1065; neg.f32 %f1067, %f1066; add.rn.f32 %f1068, %f1060, %f1067; add.rn.f32 %f1069, %f1068, %f1065; mov.b32 %r138, %f1066; setp.eq.s32 %p77, %r138, 1118925336; add.s32 %r139, %r138, -1; mov.b32 %f1070, %r139; add.f32 %f1071, %f1069, 0f37000000; selp.f32 %f1072, %f1070, %f1066, %p77; selp.f32 %f230, %f1071, %f1069, %p77; mul.f32 %f1073, %f1072, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1074, %f1073; mov.f32 %f1075, 0fBF317200; fma.rn.f32 %f1076, %f1074, %f1075, %f1072; mov.f32 %f1077, 0fB5BFBE8E; fma.rn.f32 %f1078, %f1074, %f1077, %f1076; mul.f32 %f1079, %f1078, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1080, %f1079; add.f32 %f1081, %f1074, 0f00000000; ex2.approx.f32 %f1082, %f1081; mul.f32 %f1083, %f1080, %f1082; setp.lt.f32 %p78, %f1072, 0fC2D20000; selp.f32 %f1084, 0f00000000, %f1083, %p78; setp.gt.f32 %p79, %f1072, 0f42D20000; selp.f32 %f1444, 0f7F800000, %f1084, %p79; setp.eq.f32 %p80, %f1444, 0f7F800000; @%p80 bra BB0_63; fma.rn.f32 %f1444, %f1444, %f230, %f1444; BB0_63: setp.lt.f32 %p81, %f1375, 0f00000000; setp.eq.f32 %p82, %f228, 0f3F800000; and.pred %p5, %p81, %p82; mov.b32 %r140, %f1444; xor.b32 %r141, %r140, -2147483648; mov.b32 %f1085, %r141; selp.f32 %f1446, %f1085, %f1444, %p5; setp.eq.f32 %p83, %f1375, 0f00000000; @%p83 bra BB0_66; bra.uni BB0_64; BB0_66: add.f32 %f1088, %f1375, %f1375; selp.f32 %f1446, %f1088, 0f00000000, %p82; bra.uni BB0_67; BB0_64: setp.geu.f32 %p84, %f1375, 0f00000000; @%p84 bra BB0_67; cvt.rzi.f32.f32 %f1087, %f1059; setp.neu.f32 %p85, %f1087, 0f3EE66666; selp.f32 %f1446, 0f7FFFFFFF, %f1446, %p85; BB0_67: add.f32 %f1089, %f229, 0f3EE66666; mov.b32 %r142, %f1089; setp.lt.s32 %p87, %r142, 2139095040; @%p87 bra BB0_72; setp.gtu.f32 %p88, %f229, 0f7F800000; @%p88 bra BB0_71; bra.uni BB0_69; BB0_71: add.f32 %f1446, %f1375, 0f3EE66666; bra.uni BB0_72; BB0_69: setp.neu.f32 %p89, %f229, 0f7F800000; @%p89 bra BB0_72; selp.f32 %f1446, 0fFF800000, 0f7F800000, %p5; BB0_72: setp.eq.f32 %p90, %f1375, 0f3F800000; selp.f32 %f241, 0f3F800000, %f1446, %p90; abs.f32 %f242, %f1374; setp.lt.f32 %p91, %f242, 0f00800000; mul.f32 %f1092, %f242, 0f4B800000; selp.f32 %f1093, 0fC3170000, 0fC2FE0000, %p91; selp.f32 %f1094, %f1092, %f242, %p91; mov.b32 %r143, %f1094; and.b32 %r144, %r143, 8388607; or.b32 %r145, %r144, 1065353216; mov.b32 %f1095, %r145; shr.u32 %r146, %r143, 23; cvt.rn.f32.u32 %f1096, %r146; add.f32 %f1097, %f1093, %f1096; setp.gt.f32 %p92, %f1095, 0f3FB504F3; mul.f32 %f1098, %f1095, 0f3F000000; add.f32 %f1099, %f1097, 0f3F800000; selp.f32 %f1100, %f1098, %f1095, %p92; selp.f32 %f1101, %f1099, %f1097, %p92; add.f32 %f1102, %f1100, 0fBF800000; add.f32 %f1091, %f1100, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1090,%f1091; // inline asm add.f32 %f1103, %f1102, %f1102; mul.f32 %f1104, %f1090, %f1103; mul.f32 %f1105, %f1104, %f1104; fma.rn.f32 %f1108, %f1029, %f1105, %f1028; fma.rn.f32 %f1110, %f1108, %f1105, %f1031; mul.rn.f32 %f1111, %f1110, %f1105; mul.rn.f32 %f1112, %f1111, %f1104; sub.f32 %f1113, %f1102, %f1104; neg.f32 %f1114, %f1104; add.f32 %f1115, %f1113, %f1113; fma.rn.f32 %f1116, %f1114, %f1102, %f1115; mul.rn.f32 %f1117, %f1090, %f1116; add.f32 %f1118, %f1112, %f1104; sub.f32 %f1119, %f1104, %f1118; add.f32 %f1120, %f1112, %f1119; add.f32 %f1121, %f1117, %f1120; add.f32 %f1122, %f1118, %f1121; sub.f32 %f1123, %f1118, %f1122; add.f32 %f1124, %f1121, %f1123; mul.rn.f32 %f1126, %f1101, %f1047; mul.rn.f32 %f1128, %f1101, %f1049; add.f32 %f1129, %f1126, %f1122; sub.f32 %f1130, %f1126, %f1129; add.f32 %f1131, %f1122, %f1130; add.f32 %f1132, %f1124, %f1131; add.f32 %f1133, %f1128, %f1132; add.f32 %f1134, %f1129, %f1133; sub.f32 %f1135, %f1129, %f1134; add.f32 %f1136, %f1133, %f1135; mul.rn.f32 %f1138, %f1059, %f1134; neg.f32 %f1139, %f1138; fma.rn.f32 %f1140, %f1059, %f1134, %f1139; fma.rn.f32 %f1141, %f1059, %f1136, %f1140; fma.rn.f32 %f1143, %f1064, %f1134, %f1141; add.rn.f32 %f1144, %f1138, %f1143; neg.f32 %f1145, %f1144; add.rn.f32 %f1146, %f1138, %f1145; add.rn.f32 %f1147, %f1146, %f1143; mov.b32 %r147, %f1144; setp.eq.s32 %p93, %r147, 1118925336; add.s32 %r148, %r147, -1; mov.b32 %f1148, %r148; add.f32 %f1149, %f1147, 0f37000000; selp.f32 %f1150, %f1148, %f1144, %p93; selp.f32 %f243, %f1149, %f1147, %p93; mul.f32 %f1151, %f1150, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1152, %f1151; fma.rn.f32 %f1154, %f1152, %f1075, %f1150; fma.rn.f32 %f1156, %f1152, %f1077, %f1154; mul.f32 %f1157, %f1156, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1158, %f1157; add.f32 %f1159, %f1152, 0f00000000; ex2.approx.f32 %f1160, %f1159; mul.f32 %f1161, %f1158, %f1160; setp.lt.f32 %p94, %f1150, 0fC2D20000; selp.f32 %f1162, 0f00000000, %f1161, %p94; setp.gt.f32 %p95, %f1150, 0f42D20000; selp.f32 %f1447, 0f7F800000, %f1162, %p95; setp.eq.f32 %p96, %f1447, 0f7F800000; @%p96 bra BB0_74; fma.rn.f32 %f1447, %f1447, %f243, %f1447; BB0_74: setp.lt.f32 %p97, %f1374, 0f00000000; and.pred %p6, %p97, %p82; mov.b32 %r149, %f1447; xor.b32 %r150, %r149, -2147483648; mov.b32 %f1163, %r150; selp.f32 %f1449, %f1163, %f1447, %p6; setp.eq.f32 %p99, %f1374, 0f00000000; @%p99 bra BB0_77; bra.uni BB0_75; BB0_77: add.f32 %f1166, %f1374, %f1374; selp.f32 %f1449, %f1166, 0f00000000, %p82; bra.uni BB0_78; BB0_75: setp.geu.f32 %p100, %f1374, 0f00000000; @%p100 bra BB0_78; cvt.rzi.f32.f32 %f1165, %f1059; setp.neu.f32 %p101, %f1165, 0f3EE66666; selp.f32 %f1449, 0f7FFFFFFF, %f1449, %p101; BB0_78: add.f32 %f1167, %f242, 0f3EE66666; mov.b32 %r151, %f1167; setp.lt.s32 %p103, %r151, 2139095040; @%p103 bra BB0_83; setp.gtu.f32 %p104, %f242, 0f7F800000; @%p104 bra BB0_82; bra.uni BB0_80; BB0_82: add.f32 %f1449, %f1374, 0f3EE66666; bra.uni BB0_83; BB0_80: setp.neu.f32 %p105, %f242, 0f7F800000; @%p105 bra BB0_83; selp.f32 %f1449, 0fFF800000, 0f7F800000, %p6; BB0_83: setp.eq.f32 %p106, %f1374, 0f3F800000; selp.f32 %f254, 0f3F800000, %f1449, %p106; abs.f32 %f255, %f1373; setp.lt.f32 %p107, %f255, 0f00800000; mul.f32 %f1170, %f255, 0f4B800000; selp.f32 %f1171, 0fC3170000, 0fC2FE0000, %p107; selp.f32 %f1172, %f1170, %f255, %p107; mov.b32 %r152, %f1172; and.b32 %r153, %r152, 8388607; or.b32 %r154, %r153, 1065353216; mov.b32 %f1173, %r154; shr.u32 %r155, %r152, 23; cvt.rn.f32.u32 %f1174, %r155; add.f32 %f1175, %f1171, %f1174; setp.gt.f32 %p108, %f1173, 0f3FB504F3; mul.f32 %f1176, %f1173, 0f3F000000; add.f32 %f1177, %f1175, 0f3F800000; selp.f32 %f1178, %f1176, %f1173, %p108; selp.f32 %f1179, %f1177, %f1175, %p108; add.f32 %f1180, %f1178, 0fBF800000; add.f32 %f1169, %f1178, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f1168,%f1169; // inline asm add.f32 %f1181, %f1180, %f1180; mul.f32 %f1182, %f1168, %f1181; mul.f32 %f1183, %f1182, %f1182; fma.rn.f32 %f1186, %f1029, %f1183, %f1028; fma.rn.f32 %f1188, %f1186, %f1183, %f1031; mul.rn.f32 %f1189, %f1188, %f1183; mul.rn.f32 %f1190, %f1189, %f1182; sub.f32 %f1191, %f1180, %f1182; neg.f32 %f1192, %f1182; add.f32 %f1193, %f1191, %f1191; fma.rn.f32 %f1194, %f1192, %f1180, %f1193; mul.rn.f32 %f1195, %f1168, %f1194; add.f32 %f1196, %f1190, %f1182; sub.f32 %f1197, %f1182, %f1196; add.f32 %f1198, %f1190, %f1197; add.f32 %f1199, %f1195, %f1198; add.f32 %f1200, %f1196, %f1199; sub.f32 %f1201, %f1196, %f1200; add.f32 %f1202, %f1199, %f1201; mul.rn.f32 %f1204, %f1179, %f1047; mul.rn.f32 %f1206, %f1179, %f1049; add.f32 %f1207, %f1204, %f1200; sub.f32 %f1208, %f1204, %f1207; add.f32 %f1209, %f1200, %f1208; add.f32 %f1210, %f1202, %f1209; add.f32 %f1211, %f1206, %f1210; add.f32 %f1212, %f1207, %f1211; sub.f32 %f1213, %f1207, %f1212; add.f32 %f1214, %f1211, %f1213; mul.rn.f32 %f1216, %f1059, %f1212; neg.f32 %f1217, %f1216; fma.rn.f32 %f1218, %f1059, %f1212, %f1217; fma.rn.f32 %f1219, %f1059, %f1214, %f1218; fma.rn.f32 %f1221, %f1064, %f1212, %f1219; add.rn.f32 %f1222, %f1216, %f1221; neg.f32 %f1223, %f1222; add.rn.f32 %f1224, %f1216, %f1223; add.rn.f32 %f1225, %f1224, %f1221; mov.b32 %r156, %f1222; setp.eq.s32 %p109, %r156, 1118925336; add.s32 %r157, %r156, -1; mov.b32 %f1226, %r157; add.f32 %f1227, %f1225, 0f37000000; selp.f32 %f1228, %f1226, %f1222, %p109; selp.f32 %f256, %f1227, %f1225, %p109; mul.f32 %f1229, %f1228, 0f3FB8AA3B; cvt.rzi.f32.f32 %f1230, %f1229; fma.rn.f32 %f1232, %f1230, %f1075, %f1228; fma.rn.f32 %f1234, %f1230, %f1077, %f1232; mul.f32 %f1235, %f1234, 0f3FB8AA3B; ex2.approx.ftz.f32 %f1236, %f1235; add.f32 %f1237, %f1230, 0f00000000; ex2.approx.f32 %f1238, %f1237; mul.f32 %f1239, %f1236, %f1238; setp.lt.f32 %p110, %f1228, 0fC2D20000; selp.f32 %f1240, 0f00000000, %f1239, %p110; setp.gt.f32 %p111, %f1228, 0f42D20000; selp.f32 %f1450, 0f7F800000, %f1240, %p111; setp.eq.f32 %p112, %f1450, 0f7F800000; @%p112 bra BB0_85; fma.rn.f32 %f1450, %f1450, %f256, %f1450; BB0_85: setp.lt.f32 %p113, %f1373, 0f00000000; and.pred %p7, %p113, %p82; mov.b32 %r158, %f1450; xor.b32 %r159, %r158, -2147483648; mov.b32 %f1241, %r159; selp.f32 %f1452, %f1241, %f1450, %p7; setp.eq.f32 %p115, %f1373, 0f00000000; @%p115 bra BB0_88; bra.uni BB0_86; BB0_88: add.f32 %f1244, %f1373, %f1373; selp.f32 %f1452, %f1244, 0f00000000, %p82; bra.uni BB0_89; BB0_86: setp.geu.f32 %p116, %f1373, 0f00000000; @%p116 bra BB0_89; cvt.rzi.f32.f32 %f1243, %f1059; setp.neu.f32 %p117, %f1243, 0f3EE66666; selp.f32 %f1452, 0f7FFFFFFF, %f1452, %p117; BB0_89: add.f32 %f1245, %f255, 0f3EE66666; mov.b32 %r160, %f1245; setp.lt.s32 %p119, %r160, 2139095040; @%p119 bra BB0_94; setp.gtu.f32 %p120, %f255, 0f7F800000; @%p120 bra BB0_93; bra.uni BB0_91; BB0_93: add.f32 %f1452, %f1373, 0f3EE66666; bra.uni BB0_94; BB0_91: setp.neu.f32 %p121, %f255, 0f7F800000; @%p121 bra BB0_94; selp.f32 %f1452, 0fFF800000, 0f7F800000, %p7; BB0_94: setp.eq.f32 %p122, %f1373, 0f3F800000; selp.f32 %f1246, 0f3F800000, %f1452, %p122; cvt.u64.u32 %rd53, %r3; cvt.u64.u32 %rd52, %r2; mov.u64 %rd56, image; cvta.global.u64 %rd51, %rd56; // inline asm call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13); // inline asm cvt.sat.f32.f32 %f1247, %f1246; mul.f32 %f1248, %f1247, 0f437FFD71; cvt.rzi.u32.f32 %r163, %f1248; cvt.sat.f32.f32 %f1249, %f254; mul.f32 %f1250, %f1249, 0f437FFD71; cvt.rzi.u32.f32 %r164, %f1250; cvt.sat.f32.f32 %f1251, %f241; mul.f32 %f1252, %f1251, 0f437FFD71; cvt.rzi.u32.f32 %r165, %f1252; cvt.u16.u32 %rs19, %r163; cvt.u16.u32 %rs20, %r165; cvt.u16.u32 %rs21, %r164; mov.u16 %rs22, 255; st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22}; ld.global.u32 %r251, [imageEnabled]; BB0_95: cvt.u64.u32 %rd4, %r2; cvt.u64.u32 %rd5, %r3; and.b32 %r166, %r251, 4; setp.eq.s32 %p123, %r166, 0; @%p123 bra BB0_99; ld.global.u32 %r167, [additive]; setp.eq.s32 %p124, %r167, 0; mov.f32 %f1253, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs23, %f1253;} // inline asm @%p124 bra BB0_98; mov.u64 %rd69, image_HDR; cvta.global.u64 %rd58, %rd69; mov.u32 %r171, 8; // inline asm call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57]; // inline asm { cvt.f32.f16 %f1254, %rs30;} // inline asm // inline asm { cvt.f32.f16 %f1255, %rs31;} // inline asm // inline asm { cvt.f32.f16 %f1256, %rs32;} // inline asm // inline asm call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1257, %f1375, %f1254; add.f32 %f1258, %f1374, %f1255; add.f32 %f1259, %f1373, %f1256; // inline asm { cvt.rn.f16.f32 %rs29, %f1259;} // inline asm // inline asm { cvt.rn.f16.f32 %rs28, %f1258;} // inline asm // inline asm { cvt.rn.f16.f32 %rs27, %f1257;} // inline asm st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23}; bra.uni BB0_99; BB0_98: mov.u64 %rd76, image_HDR; cvta.global.u64 %rd71, %rd76; mov.u32 %r173, 8; // inline asm call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r173, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs36, %f1373;} // inline asm // inline asm { cvt.rn.f16.f32 %rs35, %f1374;} // inline asm // inline asm { cvt.rn.f16.f32 %rs34, %f1375;} // inline asm st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23}; BB0_99: mov.f32 %f1264, 0f34000000; max.f32 %f1265, %f1372, %f1264; div.rn.f32 %f1266, %f1369, %f1265; max.f32 %f1267, %f1371, %f1264; div.rn.f32 %f1268, %f1368, %f1267; max.f32 %f1269, %f1370, %f1264; div.rn.f32 %f1270, %f1367, %f1269; fma.rn.f32 %f267, %f1266, 0f3F000000, 0f3F000000; fma.rn.f32 %f268, %f1268, 0f3F000000, 0f3F000000; fma.rn.f32 %f269, %f1270, 0f3F000000, 0f3F000000; div.rn.f32 %f1271, %f1366, %f1265; div.rn.f32 %f1272, %f1365, %f1267; div.rn.f32 %f1273, %f1364, %f1269; fma.rn.f32 %f270, %f1271, 0f3F000000, 0f3F000000; fma.rn.f32 %f271, %f1272, 0f3F000000, 0f3F000000; fma.rn.f32 %f272, %f1273, 0f3F000000, 0f3F000000; div.rn.f32 %f1274, %f1363, %f1265; div.rn.f32 %f1275, %f1362, %f1267; div.rn.f32 %f1276, %f1361, %f1269; fma.rn.f32 %f273, %f1274, 0f3F000000, 0f3F000000; fma.rn.f32 %f274, %f1275, 0f3F000000, 0f3F000000; fma.rn.f32 %f275, %f1276, 0f3F000000, 0f3F000000; ld.global.u32 %r174, [additive]; setp.eq.s32 %p125, %r174, 0; mov.f32 %f1263, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs37, %f1263;} // inline asm @%p125 bra BB0_101; mov.u64 %rd89, image_RNM0; cvta.global.u64 %rd78, %rd89; mov.u32 %r178, 8; // inline asm call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r178, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd77]; // inline asm { cvt.f32.f16 %f1277, %rs44;} // inline asm // inline asm { cvt.f32.f16 %f1278, %rs45;} // inline asm // inline asm { cvt.f32.f16 %f1279, %rs46;} // inline asm // inline asm call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r178, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1280, %f1372, %f1277; add.f32 %f1281, %f1371, %f1278; add.f32 %f1282, %f1370, %f1279; // inline asm { cvt.rn.f16.f32 %rs43, %f1282;} // inline asm // inline asm { cvt.rn.f16.f32 %rs42, %f1281;} // inline asm // inline asm { cvt.rn.f16.f32 %rs41, %f1280;} // inline asm st.v4.u16 [%rd83], {%rs41, %rs42, %rs43, %rs37}; bra.uni BB0_102; BB0_101: mov.u64 %rd96, image_RNM0; cvta.global.u64 %rd91, %rd96; mov.u32 %r180, 8; // inline asm call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r180, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs50, %f1370;} // inline asm // inline asm { cvt.rn.f16.f32 %rs49, %f1371;} // inline asm // inline asm { cvt.rn.f16.f32 %rs48, %f1372;} // inline asm st.v4.u16 [%rd90], {%rs48, %rs49, %rs50, %rs37}; BB0_102: ld.global.u32 %r181, [additive]; setp.eq.s32 %p126, %r181, 0; // inline asm { cvt.rn.f16.f32 %rs51, %f1263;} // inline asm @%p126 bra BB0_104; mov.u64 %rd109, image_RNM1; cvta.global.u64 %rd98, %rd109; mov.u32 %r185, 8; // inline asm call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r185, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd97]; // inline asm { cvt.f32.f16 %f1287, %rs58;} // inline asm // inline asm { cvt.f32.f16 %f1288, %rs59;} // inline asm // inline asm { cvt.f32.f16 %f1289, %rs60;} // inline asm // inline asm call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r185, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1290, %f267, %f1287; add.f32 %f1291, %f268, %f1288; add.f32 %f1292, %f269, %f1289; // inline asm { cvt.rn.f16.f32 %rs57, %f1292;} // inline asm // inline asm { cvt.rn.f16.f32 %rs56, %f1291;} // inline asm // inline asm { cvt.rn.f16.f32 %rs55, %f1290;} // inline asm st.v4.u16 [%rd103], {%rs55, %rs56, %rs57, %rs51}; bra.uni BB0_105; BB0_104: mov.u64 %rd116, image_RNM1; cvta.global.u64 %rd111, %rd116; mov.u32 %r187, 8; // inline asm call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r187, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs64, %f269;} // inline asm // inline asm { cvt.rn.f16.f32 %rs63, %f268;} // inline asm // inline asm { cvt.rn.f16.f32 %rs62, %f267;} // inline asm st.v4.u16 [%rd110], {%rs62, %rs63, %rs64, %rs51}; BB0_105: ld.global.u32 %r188, [additive]; setp.eq.s32 %p127, %r188, 0; // inline asm { cvt.rn.f16.f32 %rs65, %f1263;} // inline asm @%p127 bra BB0_107; mov.u64 %rd129, image_RNM2; cvta.global.u64 %rd118, %rd129; mov.u32 %r192, 8; // inline asm call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r192, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd117]; // inline asm { cvt.f32.f16 %f1297, %rs72;} // inline asm // inline asm { cvt.f32.f16 %f1298, %rs73;} // inline asm // inline asm { cvt.f32.f16 %f1299, %rs74;} // inline asm // inline asm call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r192, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1300, %f270, %f1297; add.f32 %f1301, %f271, %f1298; add.f32 %f1302, %f272, %f1299; // inline asm { cvt.rn.f16.f32 %rs71, %f1302;} // inline asm // inline asm { cvt.rn.f16.f32 %rs70, %f1301;} // inline asm // inline asm { cvt.rn.f16.f32 %rs69, %f1300;} // inline asm st.v4.u16 [%rd123], {%rs69, %rs70, %rs71, %rs65}; bra.uni BB0_108; BB0_107: mov.u64 %rd136, image_RNM2; cvta.global.u64 %rd131, %rd136; mov.u32 %r194, 8; // inline asm call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r194, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs78, %f272;} // inline asm // inline asm { cvt.rn.f16.f32 %rs77, %f271;} // inline asm // inline asm { cvt.rn.f16.f32 %rs76, %f270;} // inline asm st.v4.u16 [%rd130], {%rs76, %rs77, %rs78, %rs65}; BB0_108: ld.global.u32 %r195, [additive]; setp.eq.s32 %p128, %r195, 0; // inline asm { cvt.rn.f16.f32 %rs79, %f1263;} // inline asm @%p128 bra BB0_110; mov.u64 %rd149, image_RNM3; cvta.global.u64 %rd138, %rd149; mov.u32 %r199, 8; // inline asm call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r199, %rd4, %rd5, %rd13, %rd13); // inline asm ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd137]; // inline asm { cvt.f32.f16 %f1307, %rs86;} // inline asm // inline asm { cvt.f32.f16 %f1308, %rs87;} // inline asm // inline asm { cvt.f32.f16 %f1309, %rs88;} // inline asm // inline asm call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r199, %rd4, %rd5, %rd13, %rd13); // inline asm add.f32 %f1310, %f273, %f1307; add.f32 %f1311, %f274, %f1308; add.f32 %f1312, %f275, %f1309; // inline asm { cvt.rn.f16.f32 %rs85, %f1312;} // inline asm // inline asm { cvt.rn.f16.f32 %rs84, %f1311;} // inline asm // inline asm { cvt.rn.f16.f32 %rs83, %f1310;} // inline asm st.v4.u16 [%rd143], {%rs83, %rs84, %rs85, %rs79}; bra.uni BB0_131; BB0_110: mov.u64 %rd156, image_RNM3; cvta.global.u64 %rd151, %rd156; mov.u32 %r201, 8; // inline asm call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r201, %rd4, %rd5, %rd13, %rd13); // inline asm // inline asm { cvt.rn.f16.f32 %rs92, %f275;} // inline asm // inline asm { cvt.rn.f16.f32 %rs91, %f274;} // inline asm // inline asm { cvt.rn.f16.f32 %rs90, %f273;} // inline asm st.v4.u16 [%rd150], {%rs90, %rs91, %rs92, %rs79}; BB0_131: ret; }