// // Generated by NVIDIA NVVM Compiler // // Compiler Build ID: CL-23083092 // Cuda compilation tools, release 9.1, V9.1.85 // Based on LLVM 3.4svn // .version 6.1 .target sm_30 .address_size 64 // .globl _Z6oxMainv .global .align 8 .b8 pixelID[8]; .global .align 8 .b8 resolution[8]; .global .align 4 .b8 normal[12]; .global .align 4 .b8 camPos[12]; .global .align 4 .b8 root[4]; .global .align 4 .u32 imageEnabled; .global .texref lightmap; .global .align 16 .b8 tileInfo[16]; .global .align 4 .u32 additive; .global .align 1 .b8 image[1]; .global .align 1 .b8 image_HDR[1]; .global .align 1 .b8 image_HDR2[1]; .global .align 1 .b8 image_RNM0[1]; .global .align 1 .b8 image_RNM1[1]; .global .align 1 .b8 image_RNM2[1]; .global .align 1 .b8 image_RNM3[1]; .global .align 8 .b8 texCoords[8]; .global .align 1 .b8 uvpos[1]; .global .align 1 .b8 uvnormal[1]; .global .align 1 .b8 rnd_seeds[1]; .global .align 1 .b8 lightmapDirect[1]; .global .texref albedoTex; .global .align 4 .u32 samples; .global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; .global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; .global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0}; .global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; .global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; .global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; .global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; .global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0}; .global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; .const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; .visible .entry _Z6oxMainv( ) { .local .align 16 .b8 __local_depot0[48]; .reg .b64 %SP; .reg .b64 %SPL; .reg .pred %p<111>; .reg .b16 %rs<145>; .reg .f32 %f<867>; .reg .b32 %r<398>; .reg .b64 %rd<284>; mov.u64 %rd283, __local_depot0; cvta.local.u64 %SP, %rd283; ld.global.u32 %r1, [samples]; shl.b32 %r2, %r1, 1; ld.global.v2.u32 {%r97, %r98}, [pixelID]; cvt.u64.u32 %rd22, %r97; cvt.u64.u32 %rd23, %r98; mov.u64 %rd26, uvnormal; cvta.global.u64 %rd21, %rd26; mov.u32 %r95, 2; mov.u32 %r96, 4; mov.u64 %rd25, 0; // inline asm call (%rd20), _rt_buffer_get_64, (%rd21, %r95, %r96, %rd22, %rd23, %rd25, %rd25); // inline asm ld.u32 %r3, [%rd20]; shr.u32 %r101, %r3, 16; cvt.u16.u32 %rs1, %r101; and.b16 %rs6, %rs1, 255; cvt.u16.u32 %rs7, %r3; or.b16 %rs8, %rs7, %rs6; setp.eq.s16 %p6, %rs8, 0; mov.f32 %f798, 0f00000000; mov.f32 %f799, %f798; mov.f32 %f800, %f798; @%p6 bra BB0_2; ld.u8 %rs9, [%rd20+1]; and.b16 %rs11, %rs7, 255; cvt.rn.f32.u16 %f198, %rs11; div.rn.f32 %f199, %f198, 0f437F0000; fma.rn.f32 %f200, %f199, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f201, %rs9; div.rn.f32 %f202, %f201, 0f437F0000; fma.rn.f32 %f203, %f202, 0f40000000, 0fBF800000; cvt.rn.f32.u16 %f204, %rs6; div.rn.f32 %f205, %f204, 0f437F0000; fma.rn.f32 %f206, %f205, 0f40000000, 0fBF800000; mul.f32 %f207, %f203, %f203; fma.rn.f32 %f208, %f200, %f200, %f207; fma.rn.f32 %f209, %f206, %f206, %f208; sqrt.rn.f32 %f210, %f209; rcp.rn.f32 %f211, %f210; mul.f32 %f798, %f200, %f211; mul.f32 %f799, %f203, %f211; mul.f32 %f800, %f206, %f211; BB0_2: ld.global.v2.u32 {%r102, %r103}, [pixelID]; ld.global.v2.u32 {%r105, %r106}, [tileInfo]; add.s32 %r4, %r102, %r105; add.s32 %r5, %r103, %r106; setp.eq.f32 %p7, %f799, 0f00000000; setp.eq.f32 %p8, %f798, 0f00000000; and.pred %p9, %p8, %p7; setp.eq.f32 %p10, %f800, 0f00000000; and.pred %p11, %p9, %p10; @%p11 bra BB0_108; bra.uni BB0_3; BB0_108: ld.global.u32 %r397, [imageEnabled]; and.b32 %r296, %r397, 1; setp.eq.b32 %p102, %r296, 1; @!%p102 bra BB0_110; bra.uni BB0_109; BB0_109: cvt.u64.u32 %rd174, %r4; cvt.u64.u32 %rd175, %r5; mov.u64 %rd178, image; cvta.global.u64 %rd173, %rd178; mov.u64 %rd177, 0; // inline asm call (%rd172), _rt_buffer_get_64, (%rd173, %r95, %r96, %rd174, %rd175, %rd177, %rd177); // inline asm mov.u16 %rs88, 0; st.v4.u8 [%rd172], {%rs88, %rs88, %rs88, %rs88}; ld.global.u32 %r397, [imageEnabled]; BB0_110: and.b32 %r299, %r397, 4; setp.eq.s32 %p103, %r299, 0; @%p103 bra BB0_112; cvt.u64.u32 %rd181, %r4; cvt.u64.u32 %rd182, %r5; mov.u64 %rd185, image_HDR; cvta.global.u64 %rd180, %rd185; mov.u32 %r301, 8; mov.u64 %rd184, 0; // inline asm call (%rd179), _rt_buffer_get_64, (%rd180, %r95, %r301, %rd181, %rd182, %rd184, %rd184); // inline asm mov.f32 %f709, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs89, %f709;} // inline asm mov.u16 %rs90, 0; st.v4.u16 [%rd179], {%rs89, %rs89, %rs89, %rs90}; ld.global.u32 %r397, [imageEnabled]; BB0_112: and.b32 %r302, %r397, 16; setp.eq.s32 %p104, %r302, 0; @%p104 bra BB0_114; cvt.u64.u32 %rd189, %r5; cvt.u64.u32 %rd188, %r4; mov.u64 %rd192, image_HDR2; cvta.global.u64 %rd187, %rd192; mov.u32 %r304, 8; mov.u64 %rd191, 0; // inline asm call (%rd186), _rt_buffer_get_64, (%rd187, %r95, %r304, %rd188, %rd189, %rd191, %rd191); // inline asm mov.f32 %f710, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs91, %f710;} // inline asm mov.u16 %rs92, 0; st.v4.u16 [%rd186], {%rs91, %rs91, %rs91, %rs92}; BB0_114: cvt.u64.u32 %rd18, %r4; cvt.u64.u32 %rd19, %r5; ld.global.u32 %r305, [additive]; setp.eq.s32 %p105, %r305, 0; @%p105 bra BB0_116; mov.u64 %rd205, image_RNM0; cvta.global.u64 %rd194, %rd205; mov.u32 %r309, 8; mov.u64 %rd204, 0; // inline asm call (%rd193), _rt_buffer_get_64, (%rd194, %r95, %r309, %rd18, %rd19, %rd204, %rd204); // inline asm ld.v4.u16 {%rs99, %rs100, %rs101, %rs102}, [%rd193]; // inline asm { cvt.f32.f16 %f711, %rs99;} // inline asm // inline asm { cvt.f32.f16 %f712, %rs100;} // inline asm // inline asm { cvt.f32.f16 %f713, %rs101;} // inline asm // inline asm call (%rd199), _rt_buffer_get_64, (%rd194, %r95, %r309, %rd18, %rd19, %rd204, %rd204); // inline asm add.f32 %f714, %f711, 0f00000000; add.f32 %f715, %f712, 0f00000000; add.f32 %f716, %f713, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs98, %f716;} // inline asm // inline asm { cvt.rn.f16.f32 %rs97, %f715;} // inline asm // inline asm { cvt.rn.f16.f32 %rs96, %f714;} // inline asm mov.u16 %rs103, 0; st.v4.u16 [%rd199], {%rs96, %rs97, %rs98, %rs103}; bra.uni BB0_117; BB0_3: ld.global.v2.u32 {%r116, %r117}, [pixelID]; cvt.u64.u32 %rd29, %r116; cvt.u64.u32 %rd30, %r117; mov.u64 %rd45, lightmapDirect; cvta.global.u64 %rd28, %rd45; mov.u32 %r111, 8; // inline asm call (%rd27), _rt_buffer_get_64, (%rd28, %r95, %r111, %rd29, %rd30, %rd25, %rd25); // inline asm ld.v4.u16 {%rs16, %rs17, %rs18, %rs19}, [%rd27]; // inline asm { cvt.f32.f16 %f212, %rs16;} // inline asm // inline asm { cvt.f32.f16 %f213, %rs17;} // inline asm // inline asm { cvt.f32.f16 %f214, %rs18;} // inline asm ld.global.v2.u32 {%r120, %r121}, [pixelID]; cvt.u64.u32 %rd35, %r120; cvt.u64.u32 %rd36, %r121; mov.u64 %rd46, uvpos; cvta.global.u64 %rd34, %rd46; mov.u32 %r113, 12; // inline asm call (%rd33), _rt_buffer_get_64, (%rd34, %r95, %r113, %rd35, %rd36, %rd25, %rd25); // inline asm ld.f32 %f230, [%rd33+8]; ld.f32 %f231, [%rd33+4]; ld.f32 %f232, [%rd33]; mul.f32 %f233, %f232, 0f3456BF95; mul.f32 %f234, %f231, 0f3456BF95; mul.f32 %f235, %f230, 0f3456BF95; abs.f32 %f236, %f798; div.rn.f32 %f237, %f233, %f236; abs.f32 %f238, %f799; div.rn.f32 %f239, %f234, %f238; abs.f32 %f240, %f800; div.rn.f32 %f241, %f235, %f240; abs.f32 %f242, %f237; abs.f32 %f243, %f239; abs.f32 %f244, %f241; mov.f32 %f245, 0f38D1B717; max.f32 %f246, %f242, %f245; max.f32 %f247, %f243, %f245; max.f32 %f248, %f244, %f245; fma.rn.f32 %f10, %f798, %f246, %f232; fma.rn.f32 %f11, %f799, %f247, %f231; fma.rn.f32 %f12, %f800, %f248, %f230; setp.gt.f32 %p12, %f236, %f240; neg.f32 %f249, %f799; selp.f32 %f250, %f249, 0f00000000, %p12; neg.f32 %f251, %f800; selp.f32 %f252, %f798, %f251, %p12; selp.f32 %f253, 0f00000000, %f799, %p12; mul.f32 %f254, %f252, %f252; fma.rn.f32 %f255, %f250, %f250, %f254; fma.rn.f32 %f256, %f253, %f253, %f255; sqrt.rn.f32 %f257, %f256; rcp.rn.f32 %f258, %f257; mul.f32 %f13, %f250, %f258; mul.f32 %f14, %f252, %f258; mul.f32 %f15, %f253, %f258; ld.global.v2.u32 {%r124, %r125}, [pixelID]; cvt.u64.u32 %rd41, %r124; cvt.u64.u32 %rd42, %r125; mov.u64 %rd47, rnd_seeds; cvta.global.u64 %rd40, %rd47; // inline asm call (%rd39), _rt_buffer_get_64, (%rd40, %r95, %r96, %rd41, %rd42, %rd25, %rd25); // inline asm mov.f32 %f816, 0f00000000; setp.lt.s32 %p13, %r1, 1; mov.f32 %f817, %f816; mov.f32 %f818, %f816; mov.f32 %f819, %f816; mov.f32 %f820, %f816; mov.f32 %f821, %f816; mov.f32 %f822, %f816; mov.f32 %f823, %f816; mov.f32 %f824, %f816; mov.f32 %f825, %f816; mov.f32 %f826, %f816; mov.f32 %f827, %f816; mov.f32 %f828, %f816; mov.f32 %f829, %f816; mov.f32 %f830, %f816; @%p13 bra BB0_54; cvt.rn.f32.s32 %f274, %r2; rcp.rn.f32 %f16, %f274; ld.u32 %r373, [%rd39]; mul.f32 %f17, %f10, 0f3456BF95; mul.f32 %f18, %f11, 0f3456BF95; mul.f32 %f19, %f12, 0f3456BF95; mul.f32 %f275, %f798, %f14; mul.f32 %f276, %f799, %f13; sub.f32 %f20, %f276, %f275; mul.f32 %f277, %f800, %f13; mul.f32 %f278, %f798, %f15; sub.f32 %f21, %f278, %f277; mul.f32 %f279, %f799, %f15; mul.f32 %f280, %f800, %f14; sub.f32 %f22, %f280, %f279; mov.f32 %f816, 0f00000000; mov.u32 %r128, 0; abs.f32 %f281, %f18; abs.f32 %f282, %f17; max.f32 %f283, %f282, %f281; abs.f32 %f284, %f19; max.f32 %f285, %f283, %f284; mov.u32 %r370, %r128; mov.f32 %f817, %f816; mov.f32 %f818, %f816; mov.f32 %f819, %f816; mov.f32 %f820, %f816; mov.f32 %f821, %f816; mov.f32 %f822, %f816; mov.f32 %f823, %f816; mov.f32 %f824, %f816; mov.f32 %f825, %f816; mov.f32 %f826, %f816; mov.f32 %f827, %f816; mov.f32 %f828, %f816; mov.f32 %f829, %f816; mov.f32 %f830, %f816; BB0_5: mov.u32 %r372, %r128; BB0_6: mov.u32 %r10, %r373; cvt.rn.f32.s32 %f780, %r370; mad.lo.s32 %r130, %r10, 1664525, 1013904223; and.b32 %r131, %r130, 16777215; cvt.rn.f32.u32 %f287, %r131; fma.rn.f32 %f288, %f287, 0f33800000, %f780; mul.f32 %f289, %f16, %f288; mad.lo.s32 %r11, %r130, 1664525, 1013904223; and.b32 %r132, %r11, 16777215; cvt.rn.f32.u32 %f290, %r132; cvt.rn.f32.s32 %f291, %r372; fma.rn.f32 %f292, %f290, 0f33800000, %f291; mul.f32 %f293, %f16, %f292; fma.rn.f32 %f55, %f289, 0fC0000000, 0f3F800000; mul.f32 %f294, %f55, %f55; mov.f32 %f295, 0f3F800000; sub.f32 %f296, %f295, %f294; mov.f32 %f297, 0f00000000; max.f32 %f298, %f297, %f296; sqrt.rn.f32 %f56, %f298; mul.f32 %f837, %f293, 0f40C90FDB; abs.f32 %f58, %f837; setp.neu.f32 %p14, %f58, 0f7F800000; mov.f32 %f831, %f837; @%p14 bra BB0_8; mov.f32 %f781, 0f00000000; mul.rn.f32 %f831, %f837, %f781; BB0_8: mul.f32 %f300, %f831, 0f3F22F983; cvt.rni.s32.f32 %r383, %f300; cvt.rn.f32.s32 %f301, %r383; neg.f32 %f302, %f301; mov.f32 %f303, 0f3FC90FDA; fma.rn.f32 %f304, %f302, %f303, %f831; mov.f32 %f305, 0f33A22168; fma.rn.f32 %f306, %f302, %f305, %f304; mov.f32 %f307, 0f27C234C5; fma.rn.f32 %f832, %f302, %f307, %f306; abs.f32 %f308, %f831; setp.leu.f32 %p15, %f308, 0f47CE4780; @%p15 bra BB0_19; add.u64 %rd49, %SP, 16; cvta.to.local.u64 %rd279, %rd49; mov.u32 %r374, 0; mov.u64 %rd280, 0; mov.u32 %r375, %r374; BB0_10: .pragma "nounroll"; mov.b32 %r350, %f831; shl.b32 %r349, %r350, 8; or.b32 %r348, %r349, -2147483648; add.u64 %rd275, %SP, 16; cvta.to.local.u64 %rd274, %rd275; shl.b64 %rd50, %rd280, 2; mov.u64 %rd51, __cudart_i2opi_f; add.s64 %rd52, %rd51, %rd50; ld.const.u32 %r138, [%rd52]; // inline asm { mad.lo.cc.u32 %r136, %r138, %r348, %r375; madc.hi.u32 %r375, %r138, %r348, 0; } // inline asm st.local.u32 [%rd279], %r136; add.s32 %r374, %r374, 1; cvt.s64.s32 %rd280, %r374; mul.wide.s32 %rd55, %r374, 4; add.s64 %rd279, %rd274, %rd55; setp.ne.s32 %p16, %r374, 6; @%p16 bra BB0_10; mov.b32 %r352, %f831; shr.u32 %r351, %r352, 23; add.u64 %rd273, %SP, 16; and.b32 %r141, %r351, 255; add.s32 %r142, %r141, -128; shr.u32 %r143, %r142, 5; cvta.to.local.u64 %rd57, %rd273; st.local.u32 [%rd57+24], %r375; mov.u32 %r144, 6; sub.s32 %r145, %r144, %r143; mul.wide.s32 %rd58, %r145, 4; add.s64 %rd8, %rd57, %rd58; ld.local.u32 %r376, [%rd8]; ld.local.u32 %r377, [%rd8+-4]; and.b32 %r23, %r351, 31; setp.eq.s32 %p17, %r23, 0; @%p17 bra BB0_13; mov.u32 %r146, 32; sub.s32 %r147, %r146, %r23; shr.u32 %r148, %r377, %r147; shl.b32 %r149, %r376, %r23; add.s32 %r376, %r148, %r149; ld.local.u32 %r150, [%rd8+-8]; shr.u32 %r151, %r150, %r147; shl.b32 %r152, %r377, %r23; add.s32 %r377, %r151, %r152; BB0_13: mov.b32 %r355, %f831; and.b32 %r379, %r355, -2147483648; shr.u32 %r153, %r377, 30; shl.b32 %r154, %r376, 2; add.s32 %r378, %r153, %r154; shl.b32 %r29, %r377, 2; shr.u32 %r155, %r378, 31; shr.u32 %r156, %r376, 30; add.s32 %r30, %r155, %r156; setp.eq.s32 %p18, %r155, 0; @%p18 bra BB0_14; bra.uni BB0_15; BB0_14: mov.u32 %r380, %r29; bra.uni BB0_16; BB0_15: mov.b32 %r357, %f831; and.b32 %r356, %r357, -2147483648; not.b32 %r157, %r378; neg.s32 %r380, %r29; setp.eq.s32 %p19, %r29, 0; selp.u32 %r158, 1, 0, %p19; add.s32 %r378, %r158, %r157; xor.b32 %r379, %r356, -2147483648; BB0_16: mov.b32 %r359, %f831; and.b32 %r358, %r359, -2147483648; clz.b32 %r382, %r378; setp.eq.s32 %p20, %r382, 0; shl.b32 %r159, %r378, %r382; mov.u32 %r160, 32; sub.s32 %r161, %r160, %r382; shr.u32 %r162, %r380, %r161; add.s32 %r163, %r162, %r159; selp.b32 %r38, %r378, %r163, %p20; mov.u32 %r164, -921707870; mul.hi.u32 %r381, %r38, %r164; setp.eq.s32 %p21, %r358, 0; neg.s32 %r165, %r30; selp.b32 %r383, %r30, %r165, %p21; setp.lt.s32 %p22, %r381, 1; @%p22 bra BB0_18; mul.lo.s32 %r166, %r38, -921707870; shr.u32 %r167, %r166, 31; shl.b32 %r168, %r381, 1; add.s32 %r381, %r167, %r168; add.s32 %r382, %r382, 1; BB0_18: mov.u32 %r169, 126; sub.s32 %r170, %r169, %r382; shl.b32 %r171, %r170, 23; add.s32 %r172, %r381, 1; shr.u32 %r173, %r172, 7; add.s32 %r174, %r173, 1; shr.u32 %r175, %r174, 1; add.s32 %r176, %r175, %r171; or.b32 %r177, %r176, %r379; mov.b32 %f832, %r177; BB0_19: add.s32 %r46, %r383, 1; and.b32 %r47, %r46, 1; setp.eq.s32 %p23, %r47, 0; @%p23 bra BB0_21; bra.uni BB0_20; BB0_21: mul.rn.f32 %f792, %f832, %f832; mov.f32 %f311, 0f3C08839E; mov.f32 %f312, 0fB94CA1F9; fma.rn.f32 %f833, %f312, %f792, %f311; bra.uni BB0_22; BB0_20: mul.rn.f32 %f789, %f832, %f832; mov.f32 %f309, 0fBAB6061A; mov.f32 %f310, 0f37CCF5CE; fma.rn.f32 %f833, %f310, %f789, %f309; BB0_22: @%p23 bra BB0_24; bra.uni BB0_23; BB0_24: mul.rn.f32 %f791, %f832, %f832; mov.f32 %f784, 0f00000000; mov.f32 %f316, 0fBE2AAAA3; fma.rn.f32 %f317, %f833, %f791, %f316; fma.rn.f32 %f834, %f317, %f791, %f784; bra.uni BB0_25; BB0_23: mul.rn.f32 %f790, %f832, %f832; mov.f32 %f313, 0f3D2AAAA5; fma.rn.f32 %f314, %f833, %f790, %f313; mov.f32 %f315, 0fBF000000; fma.rn.f32 %f834, %f314, %f790, %f315; BB0_25: fma.rn.f32 %f835, %f834, %f832, %f832; @%p23 bra BB0_27; mul.rn.f32 %f785, %f832, %f832; mov.f32 %f770, 0f3F800000; fma.rn.f32 %f835, %f834, %f785, %f770; BB0_27: add.s32 %r360, %r383, 1; and.b32 %r178, %r360, 2; setp.eq.s32 %p26, %r178, 0; @%p26 bra BB0_29; mov.f32 %f771, 0f00000000; mov.f32 %f321, 0fBF800000; fma.rn.f32 %f835, %f835, %f321, %f771; BB0_29: abs.f32 %f772, %f837; setp.neu.f32 %p109, %f772, 0f7F800000; @%p109 bra BB0_31; mov.f32 %f783, 0f00000000; mul.rn.f32 %f837, %f837, %f783; BB0_31: mov.f32 %f775, 0f27C234C5; mov.f32 %f774, 0f33A22168; mov.f32 %f773, 0f3FC90FDA; mul.f32 %f323, %f837, 0f3F22F983; cvt.rni.s32.f32 %r393, %f323; cvt.rn.f32.s32 %f324, %r393; neg.f32 %f325, %f324; fma.rn.f32 %f327, %f325, %f773, %f837; fma.rn.f32 %f329, %f325, %f774, %f327; fma.rn.f32 %f838, %f325, %f775, %f329; abs.f32 %f331, %f837; setp.leu.f32 %p28, %f331, 0f47CE4780; @%p28 bra BB0_42; add.u64 %rd60, %SP, 16; cvta.to.local.u64 %rd281, %rd60; mov.b32 %r49, %f837; shl.b32 %r181, %r49, 8; or.b32 %r51, %r181, -2147483648; mov.u32 %r384, 0; mov.u64 %rd282, %rd25; mov.u32 %r385, %r384; BB0_33: .pragma "nounroll"; add.u64 %rd277, %SP, 16; cvta.to.local.u64 %rd276, %rd277; shl.b64 %rd61, %rd282, 2; mov.u64 %rd62, __cudart_i2opi_f; add.s64 %rd63, %rd62, %rd61; ld.const.u32 %r184, [%rd63]; // inline asm { mad.lo.cc.u32 %r182, %r184, %r51, %r385; madc.hi.u32 %r385, %r184, %r51, 0; } // inline asm st.local.u32 [%rd281], %r182; add.s32 %r384, %r384, 1; cvt.s64.s32 %rd282, %r384; mul.wide.s32 %rd64, %r384, 4; add.s64 %rd281, %rd276, %rd64; setp.ne.s32 %p29, %r384, 6; @%p29 bra BB0_33; mov.b32 %r362, %f837; shr.u32 %r361, %r362, 23; add.u64 %rd278, %SP, 16; and.b32 %r187, %r361, 255; add.s32 %r188, %r187, -128; shr.u32 %r189, %r188, 5; cvta.to.local.u64 %rd66, %rd278; st.local.u32 [%rd66+24], %r385; mov.u32 %r190, 6; sub.s32 %r191, %r190, %r189; mul.wide.s32 %rd67, %r191, 4; add.s64 %rd15, %rd66, %rd67; ld.local.u32 %r386, [%rd15]; ld.local.u32 %r387, [%rd15+-4]; and.b32 %r59, %r361, 31; setp.eq.s32 %p30, %r59, 0; @%p30 bra BB0_36; mov.u32 %r192, 32; sub.s32 %r193, %r192, %r59; shr.u32 %r194, %r387, %r193; shl.b32 %r195, %r386, %r59; add.s32 %r386, %r194, %r195; ld.local.u32 %r196, [%rd15+-8]; shr.u32 %r197, %r196, %r193; shl.b32 %r198, %r387, %r59; add.s32 %r387, %r197, %r198; BB0_36: mov.b32 %r365, %f837; and.b32 %r389, %r365, -2147483648; shr.u32 %r199, %r387, 30; shl.b32 %r200, %r386, 2; add.s32 %r388, %r199, %r200; shl.b32 %r65, %r387, 2; shr.u32 %r201, %r388, 31; shr.u32 %r202, %r386, 30; add.s32 %r66, %r201, %r202; setp.eq.s32 %p31, %r201, 0; @%p31 bra BB0_37; bra.uni BB0_38; BB0_37: mov.u32 %r390, %r65; bra.uni BB0_39; BB0_38: mov.b32 %r367, %f837; and.b32 %r366, %r367, -2147483648; not.b32 %r203, %r388; neg.s32 %r390, %r65; setp.eq.s32 %p32, %r65, 0; selp.u32 %r204, 1, 0, %p32; add.s32 %r388, %r204, %r203; xor.b32 %r389, %r366, -2147483648; BB0_39: mov.b32 %r369, %f837; and.b32 %r368, %r369, -2147483648; clz.b32 %r392, %r388; setp.eq.s32 %p33, %r392, 0; shl.b32 %r205, %r388, %r392; mov.u32 %r206, 32; sub.s32 %r207, %r206, %r392; shr.u32 %r208, %r390, %r207; add.s32 %r209, %r208, %r205; selp.b32 %r74, %r388, %r209, %p33; mov.u32 %r210, -921707870; mul.hi.u32 %r391, %r74, %r210; setp.eq.s32 %p34, %r368, 0; neg.s32 %r211, %r66; selp.b32 %r393, %r66, %r211, %p34; setp.lt.s32 %p35, %r391, 1; @%p35 bra BB0_41; mul.lo.s32 %r212, %r74, -921707870; shr.u32 %r213, %r212, 31; shl.b32 %r214, %r391, 1; add.s32 %r391, %r213, %r214; add.s32 %r392, %r392, 1; BB0_41: mov.u32 %r215, 126; sub.s32 %r216, %r215, %r392; shl.b32 %r217, %r216, 23; add.s32 %r218, %r391, 1; shr.u32 %r219, %r218, 7; add.s32 %r220, %r219, 1; shr.u32 %r221, %r220, 1; add.s32 %r222, %r221, %r217; or.b32 %r223, %r222, %r389; mov.b32 %f838, %r223; BB0_42: and.b32 %r82, %r393, 1; setp.eq.s32 %p36, %r82, 0; @%p36 bra BB0_44; bra.uni BB0_43; BB0_44: mul.rn.f32 %f797, %f838, %f838; mov.f32 %f334, 0f3C08839E; mov.f32 %f335, 0fB94CA1F9; fma.rn.f32 %f839, %f335, %f797, %f334; bra.uni BB0_45; BB0_43: mul.rn.f32 %f793, %f838, %f838; mov.f32 %f332, 0fBAB6061A; mov.f32 %f333, 0f37CCF5CE; fma.rn.f32 %f839, %f333, %f793, %f332; BB0_45: @%p36 bra BB0_47; bra.uni BB0_46; BB0_47: mul.rn.f32 %f796, %f838, %f838; mov.f32 %f782, 0f00000000; mov.f32 %f339, 0fBE2AAAA3; fma.rn.f32 %f340, %f839, %f796, %f339; fma.rn.f32 %f840, %f340, %f796, %f782; bra.uni BB0_48; BB0_46: mul.rn.f32 %f794, %f838, %f838; mov.f32 %f336, 0f3D2AAAA5; fma.rn.f32 %f337, %f839, %f794, %f336; mov.f32 %f338, 0fBF000000; fma.rn.f32 %f840, %f337, %f794, %f338; BB0_48: fma.rn.f32 %f841, %f840, %f838, %f838; @%p36 bra BB0_50; mul.rn.f32 %f795, %f838, %f838; mov.f32 %f776, 0f3F800000; fma.rn.f32 %f841, %f840, %f795, %f776; BB0_50: and.b32 %r224, %r393, 2; setp.eq.s32 %p39, %r224, 0; @%p39 bra BB0_52; mov.f32 %f777, 0f00000000; mov.f32 %f344, 0fBF800000; fma.rn.f32 %f841, %f841, %f344, %f777; BB0_52: mad.lo.s32 %r345, %r10, 1664525, 1013904223; mad.lo.s32 %r373, %r345, 1664525, 1013904223; max.f32 %f779, %f285, %f245; mov.f32 %f778, 0f3F800000; mul.f32 %f353, %f56, %f835; add.u64 %rd68, %SP, 0; cvta.to.local.u64 %rd69, %rd68; mul.f32 %f354, %f56, %f841; mul.f32 %f355, %f13, %f354; mul.f32 %f356, %f14, %f354; mul.f32 %f357, %f15, %f354; fma.rn.f32 %f358, %f22, %f353, %f355; fma.rn.f32 %f359, %f21, %f353, %f356; fma.rn.f32 %f360, %f20, %f353, %f357; fma.rn.f32 %f348, %f798, %f55, %f358; fma.rn.f32 %f349, %f799, %f55, %f359; fma.rn.f32 %f350, %f800, %f55, %f360; mov.f32 %f361, 0f7F7FFFFF; st.local.v4.f32 [%rd69], {%f778, %f778, %f778, %f361}; ld.global.u32 %r225, [root]; mov.u32 %r226, 0; mov.f32 %f352, 0f6C4ECB8F; mov.u32 %r227, 16; // inline asm call _rt_trace_64, (%r225, %f10, %f11, %f12, %f348, %f349, %f350, %r226, %f779, %f352, %rd68, %r227); // inline asm ld.local.v4.f32 {%f363, %f364, %f365, %f366}, [%rd69]; setp.ltu.f32 %p40, %f366, 0f00000000; selp.f32 %f371, %f363, 0f00000000, %p40; selp.f32 %f372, %f364, 0f00000000, %p40; selp.f32 %f373, %f365, 0f00000000, %p40; mul.f32 %f374, %f799, %f349; fma.rn.f32 %f375, %f798, %f348, %f374; fma.rn.f32 %f376, %f800, %f350, %f375; fma.rn.f32 %f824, %f348, %f371, %f824; fma.rn.f32 %f823, %f348, %f372, %f823; fma.rn.f32 %f822, %f348, %f373, %f822; fma.rn.f32 %f827, %f349, %f371, %f827; fma.rn.f32 %f826, %f349, %f372, %f826; fma.rn.f32 %f825, %f349, %f373, %f825; fma.rn.f32 %f830, %f350, %f371, %f830; fma.rn.f32 %f829, %f350, %f372, %f829; fma.rn.f32 %f828, %f350, %f373, %f828; add.f32 %f821, %f821, %f371; add.f32 %f820, %f820, %f372; add.f32 %f819, %f819, %f373; cvt.sat.f32.f32 %f377, %f376; fma.rn.f32 %f818, %f377, %f371, %f818; fma.rn.f32 %f817, %f377, %f372, %f817; fma.rn.f32 %f816, %f377, %f373, %f816; add.s32 %r372, %r372, 1; setp.lt.s32 %p41, %r372, %r2; @%p41 bra BB0_6; mad.lo.s32 %r347, %r10, 1664525, 1013904223; mad.lo.s32 %r373, %r347, 1664525, 1013904223; add.s32 %r370, %r370, 1; setp.lt.s32 %p42, %r370, %r2; @%p42 bra BB0_5; BB0_54: mul.lo.s32 %r228, %r2, %r2; cvt.rn.f32.s32 %f378, %r228; rcp.rn.f32 %f379, %f378; cvt.rn.f32.u32 %f380, %r5; cvt.rn.f32.u32 %f381, %r4; tex.2d.v4.f32.f32 {%f382, %f383, %f384, %f385}, [albedoTex, {%f381, %f380}]; mul.f32 %f123, %f821, %f379; mul.f32 %f124, %f820, %f379; mul.f32 %f125, %f819, %f379; mul.f32 %f126, %f824, %f379; mul.f32 %f127, %f823, %f379; mul.f32 %f128, %f822, %f379; mul.f32 %f129, %f827, %f379; mul.f32 %f130, %f826, %f379; mul.f32 %f131, %f825, %f379; mul.f32 %f132, %f830, %f379; mul.f32 %f133, %f829, %f379; mul.f32 %f134, %f828, %f379; mul.f32 %f386, %f818, %f379; mul.f32 %f387, %f817, %f379; mul.f32 %f388, %f816, %f379; fma.rn.f32 %f389, %f818, %f379, %f386; fma.rn.f32 %f390, %f817, %f379, %f387; fma.rn.f32 %f391, %f816, %f379, %f388; mul.f32 %f135, %f389, %f382; mul.f32 %f136, %f390, %f383; mul.f32 %f137, %f391, %f384; add.f32 %f138, %f212, %f135; add.f32 %f139, %f213, %f136; add.f32 %f140, %f214, %f137; abs.f32 %f392, %f138; setp.gtu.f32 %p44, %f392, 0f7F800000; mov.pred %p110, -1; @%p44 bra BB0_57; abs.f32 %f393, %f139; setp.gtu.f32 %p46, %f393, 0f7F800000; @%p46 bra BB0_57; abs.f32 %f394, %f140; setp.gtu.f32 %p110, %f394, 0f7F800000; BB0_57: selp.f32 %f141, 0f00000000, %f138, %p110; selp.f32 %f142, 0f00000000, %f139, %p110; selp.f32 %f143, 0f00000000, %f140, %p110; ld.global.u32 %r395, [imageEnabled]; and.b32 %r229, %r395, 1; setp.eq.b32 %p47, %r229, 1; @!%p47 bra BB0_92; bra.uni BB0_58; BB0_58: abs.f32 %f145, %f141; setp.lt.f32 %p48, %f145, 0f00800000; mul.f32 %f400, %f145, 0f4B800000; selp.f32 %f401, 0fC3170000, 0fC2FE0000, %p48; selp.f32 %f402, %f400, %f145, %p48; mov.b32 %r230, %f402; and.b32 %r231, %r230, 8388607; or.b32 %r232, %r231, 1065353216; mov.b32 %f403, %r232; shr.u32 %r233, %r230, 23; cvt.rn.f32.u32 %f404, %r233; add.f32 %f405, %f401, %f404; setp.gt.f32 %p49, %f403, 0f3FB504F3; mul.f32 %f406, %f403, 0f3F000000; add.f32 %f407, %f405, 0f3F800000; selp.f32 %f408, %f406, %f403, %p49; selp.f32 %f409, %f407, %f405, %p49; add.f32 %f410, %f408, 0fBF800000; add.f32 %f396, %f408, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f395,%f396; // inline asm add.f32 %f411, %f410, %f410; mul.f32 %f412, %f395, %f411; mul.f32 %f413, %f412, %f412; mov.f32 %f414, 0f3C4CAF63; mov.f32 %f415, 0f3B18F0FE; fma.rn.f32 %f416, %f415, %f413, %f414; mov.f32 %f417, 0f3DAAAABD; fma.rn.f32 %f418, %f416, %f413, %f417; mul.rn.f32 %f419, %f418, %f413; mul.rn.f32 %f420, %f419, %f412; sub.f32 %f421, %f410, %f412; neg.f32 %f422, %f412; add.f32 %f423, %f421, %f421; fma.rn.f32 %f424, %f422, %f410, %f423; mul.rn.f32 %f425, %f395, %f424; add.f32 %f426, %f420, %f412; sub.f32 %f427, %f412, %f426; add.f32 %f428, %f420, %f427; add.f32 %f429, %f425, %f428; add.f32 %f430, %f426, %f429; sub.f32 %f431, %f426, %f430; add.f32 %f432, %f429, %f431; mov.f32 %f433, 0f3F317200; mul.rn.f32 %f434, %f409, %f433; mov.f32 %f435, 0f35BFBE8E; mul.rn.f32 %f436, %f409, %f435; add.f32 %f437, %f434, %f430; sub.f32 %f438, %f434, %f437; add.f32 %f439, %f430, %f438; add.f32 %f440, %f432, %f439; add.f32 %f441, %f436, %f440; add.f32 %f442, %f437, %f441; sub.f32 %f443, %f437, %f442; add.f32 %f444, %f441, %f443; mov.f32 %f445, 0f3EE66666; mul.rn.f32 %f446, %f445, %f442; neg.f32 %f447, %f446; fma.rn.f32 %f448, %f445, %f442, %f447; fma.rn.f32 %f449, %f445, %f444, %f448; mov.f32 %f450, 0f00000000; fma.rn.f32 %f451, %f450, %f442, %f449; add.rn.f32 %f452, %f446, %f451; neg.f32 %f453, %f452; add.rn.f32 %f454, %f446, %f453; add.rn.f32 %f455, %f454, %f451; mov.b32 %r234, %f452; setp.eq.s32 %p50, %r234, 1118925336; add.s32 %r235, %r234, -1; mov.b32 %f456, %r235; add.f32 %f457, %f455, 0f37000000; selp.f32 %f458, %f456, %f452, %p50; selp.f32 %f146, %f457, %f455, %p50; mul.f32 %f459, %f458, 0f3FB8AA3B; cvt.rzi.f32.f32 %f460, %f459; mov.f32 %f461, 0fBF317200; fma.rn.f32 %f462, %f460, %f461, %f458; mov.f32 %f463, 0fB5BFBE8E; fma.rn.f32 %f464, %f460, %f463, %f462; mul.f32 %f465, %f464, 0f3FB8AA3B; ex2.approx.ftz.f32 %f466, %f465; add.f32 %f467, %f460, 0f00000000; ex2.approx.f32 %f468, %f467; mul.f32 %f469, %f466, %f468; setp.lt.f32 %p51, %f458, 0fC2D20000; selp.f32 %f470, 0f00000000, %f469, %p51; setp.gt.f32 %p52, %f458, 0f42D20000; selp.f32 %f858, 0f7F800000, %f470, %p52; setp.eq.f32 %p53, %f858, 0f7F800000; @%p53 bra BB0_60; fma.rn.f32 %f858, %f858, %f146, %f858; BB0_60: mov.f32 %f742, 0f3E666666; cvt.rzi.f32.f32 %f741, %f742; fma.rn.f32 %f740, %f741, 0fC0000000, 0f3EE66666; abs.f32 %f739, %f740; setp.lt.f32 %p54, %f141, 0f00000000; setp.eq.f32 %p55, %f739, 0f3F800000; and.pred %p3, %p54, %p55; mov.b32 %r236, %f858; xor.b32 %r237, %r236, -2147483648; mov.b32 %f471, %r237; selp.f32 %f860, %f471, %f858, %p3; setp.eq.f32 %p56, %f141, 0f00000000; @%p56 bra BB0_63; bra.uni BB0_61; BB0_63: add.f32 %f474, %f141, %f141; selp.f32 %f860, %f474, 0f00000000, %p55; bra.uni BB0_64; BB0_116: mov.u64 %rd212, image_RNM0; cvta.global.u64 %rd207, %rd212; mov.u32 %r311, 8; mov.u64 %rd211, 0; // inline asm call (%rd206), _rt_buffer_get_64, (%rd207, %r95, %r311, %rd18, %rd19, %rd211, %rd211); // inline asm mov.f32 %f717, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs104, %f717;} // inline asm mov.u16 %rs105, 0; st.v4.u16 [%rd206], {%rs104, %rs104, %rs104, %rs105}; BB0_117: ld.global.u32 %r312, [additive]; setp.eq.s32 %p106, %r312, 0; @%p106 bra BB0_119; mov.u64 %rd225, image_RNM1; cvta.global.u64 %rd214, %rd225; mov.u32 %r316, 8; mov.u64 %rd224, 0; // inline asm call (%rd213), _rt_buffer_get_64, (%rd214, %r95, %r316, %rd18, %rd19, %rd224, %rd224); // inline asm ld.v4.u16 {%rs112, %rs113, %rs114, %rs115}, [%rd213]; // inline asm { cvt.f32.f16 %f718, %rs112;} // inline asm // inline asm { cvt.f32.f16 %f719, %rs113;} // inline asm // inline asm { cvt.f32.f16 %f720, %rs114;} // inline asm // inline asm call (%rd219), _rt_buffer_get_64, (%rd214, %r95, %r316, %rd18, %rd19, %rd224, %rd224); // inline asm add.f32 %f721, %f718, 0f00000000; add.f32 %f722, %f719, 0f00000000; add.f32 %f723, %f720, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs111, %f723;} // inline asm // inline asm { cvt.rn.f16.f32 %rs110, %f722;} // inline asm // inline asm { cvt.rn.f16.f32 %rs109, %f721;} // inline asm mov.u16 %rs116, 0; st.v4.u16 [%rd219], {%rs109, %rs110, %rs111, %rs116}; bra.uni BB0_120; BB0_119: mov.u64 %rd232, image_RNM1; cvta.global.u64 %rd227, %rd232; mov.u32 %r318, 8; mov.u64 %rd231, 0; // inline asm call (%rd226), _rt_buffer_get_64, (%rd227, %r95, %r318, %rd18, %rd19, %rd231, %rd231); // inline asm mov.f32 %f724, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs117, %f724;} // inline asm mov.u16 %rs118, 0; st.v4.u16 [%rd226], {%rs117, %rs117, %rs117, %rs118}; BB0_120: ld.global.u32 %r319, [additive]; setp.eq.s32 %p107, %r319, 0; @%p107 bra BB0_122; mov.u64 %rd245, image_RNM2; cvta.global.u64 %rd234, %rd245; mov.u32 %r323, 8; mov.u64 %rd244, 0; // inline asm call (%rd233), _rt_buffer_get_64, (%rd234, %r95, %r323, %rd18, %rd19, %rd244, %rd244); // inline asm ld.v4.u16 {%rs125, %rs126, %rs127, %rs128}, [%rd233]; // inline asm { cvt.f32.f16 %f725, %rs125;} // inline asm // inline asm { cvt.f32.f16 %f726, %rs126;} // inline asm // inline asm { cvt.f32.f16 %f727, %rs127;} // inline asm // inline asm call (%rd239), _rt_buffer_get_64, (%rd234, %r95, %r323, %rd18, %rd19, %rd244, %rd244); // inline asm add.f32 %f728, %f725, 0f00000000; add.f32 %f729, %f726, 0f00000000; add.f32 %f730, %f727, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs124, %f730;} // inline asm // inline asm { cvt.rn.f16.f32 %rs123, %f729;} // inline asm // inline asm { cvt.rn.f16.f32 %rs122, %f728;} // inline asm mov.u16 %rs129, 0; st.v4.u16 [%rd239], {%rs122, %rs123, %rs124, %rs129}; bra.uni BB0_123; BB0_122: mov.u64 %rd252, image_RNM2; cvta.global.u64 %rd247, %rd252; mov.u32 %r325, 8; mov.u64 %rd251, 0; // inline asm call (%rd246), _rt_buffer_get_64, (%rd247, %r95, %r325, %rd18, %rd19, %rd251, %rd251); // inline asm mov.f32 %f731, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs130, %f731;} // inline asm mov.u16 %rs131, 0; st.v4.u16 [%rd246], {%rs130, %rs130, %rs130, %rs131}; BB0_123: ld.global.u32 %r326, [additive]; setp.eq.s32 %p108, %r326, 0; @%p108 bra BB0_125; mov.u64 %rd265, image_RNM3; cvta.global.u64 %rd254, %rd265; mov.u32 %r330, 8; mov.u64 %rd264, 0; // inline asm call (%rd253), _rt_buffer_get_64, (%rd254, %r95, %r330, %rd18, %rd19, %rd264, %rd264); // inline asm ld.v4.u16 {%rs138, %rs139, %rs140, %rs141}, [%rd253]; // inline asm { cvt.f32.f16 %f732, %rs138;} // inline asm // inline asm { cvt.f32.f16 %f733, %rs139;} // inline asm // inline asm { cvt.f32.f16 %f734, %rs140;} // inline asm // inline asm call (%rd259), _rt_buffer_get_64, (%rd254, %r95, %r330, %rd18, %rd19, %rd264, %rd264); // inline asm add.f32 %f735, %f732, 0f00000000; add.f32 %f736, %f733, 0f00000000; add.f32 %f737, %f734, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs137, %f737;} // inline asm // inline asm { cvt.rn.f16.f32 %rs136, %f736;} // inline asm // inline asm { cvt.rn.f16.f32 %rs135, %f735;} // inline asm mov.u16 %rs142, 0; st.v4.u16 [%rd259], {%rs135, %rs136, %rs137, %rs142}; bra.uni BB0_126; BB0_125: mov.u64 %rd272, image_RNM3; cvta.global.u64 %rd267, %rd272; mov.u32 %r332, 8; mov.u64 %rd271, 0; // inline asm call (%rd266), _rt_buffer_get_64, (%rd267, %r95, %r332, %rd18, %rd19, %rd271, %rd271); // inline asm mov.f32 %f738, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs143, %f738;} // inline asm mov.u16 %rs144, 0; st.v4.u16 [%rd266], {%rs143, %rs143, %rs143, %rs144}; bra.uni BB0_126; BB0_61: setp.geu.f32 %p57, %f141, 0f00000000; @%p57 bra BB0_64; mov.f32 %f766, 0f3EE66666; cvt.rzi.f32.f32 %f473, %f766; setp.neu.f32 %p58, %f473, 0f3EE66666; selp.f32 %f860, 0f7FFFFFFF, %f860, %p58; BB0_64: abs.f32 %f743, %f141; add.f32 %f475, %f743, 0f3EE66666; mov.b32 %r238, %f475; setp.lt.s32 %p60, %r238, 2139095040; @%p60 bra BB0_69; abs.f32 %f764, %f141; setp.gtu.f32 %p61, %f764, 0f7F800000; @%p61 bra BB0_68; bra.uni BB0_66; BB0_68: add.f32 %f860, %f141, 0f3EE66666; bra.uni BB0_69; BB0_66: abs.f32 %f765, %f141; setp.neu.f32 %p62, %f765, 0f7F800000; @%p62 bra BB0_69; selp.f32 %f860, 0fFF800000, 0f7F800000, %p3; BB0_69: mov.f32 %f752, 0fB5BFBE8E; mov.f32 %f751, 0fBF317200; mov.f32 %f750, 0f00000000; mov.f32 %f749, 0f35BFBE8E; mov.f32 %f748, 0f3F317200; mov.f32 %f747, 0f3DAAAABD; mov.f32 %f746, 0f3C4CAF63; mov.f32 %f745, 0f3B18F0FE; mov.f32 %f744, 0f3EE66666; setp.eq.f32 %p63, %f141, 0f3F800000; selp.f32 %f157, 0f3F800000, %f860, %p63; abs.f32 %f158, %f142; setp.lt.f32 %p64, %f158, 0f00800000; mul.f32 %f478, %f158, 0f4B800000; selp.f32 %f479, 0fC3170000, 0fC2FE0000, %p64; selp.f32 %f480, %f478, %f158, %p64; mov.b32 %r239, %f480; and.b32 %r240, %r239, 8388607; or.b32 %r241, %r240, 1065353216; mov.b32 %f481, %r241; shr.u32 %r242, %r239, 23; cvt.rn.f32.u32 %f482, %r242; add.f32 %f483, %f479, %f482; setp.gt.f32 %p65, %f481, 0f3FB504F3; mul.f32 %f484, %f481, 0f3F000000; add.f32 %f485, %f483, 0f3F800000; selp.f32 %f486, %f484, %f481, %p65; selp.f32 %f487, %f485, %f483, %p65; add.f32 %f488, %f486, 0fBF800000; add.f32 %f477, %f486, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f476,%f477; // inline asm add.f32 %f489, %f488, %f488; mul.f32 %f490, %f476, %f489; mul.f32 %f491, %f490, %f490; fma.rn.f32 %f494, %f745, %f491, %f746; fma.rn.f32 %f496, %f494, %f491, %f747; mul.rn.f32 %f497, %f496, %f491; mul.rn.f32 %f498, %f497, %f490; sub.f32 %f499, %f488, %f490; neg.f32 %f500, %f490; add.f32 %f501, %f499, %f499; fma.rn.f32 %f502, %f500, %f488, %f501; mul.rn.f32 %f503, %f476, %f502; add.f32 %f504, %f498, %f490; sub.f32 %f505, %f490, %f504; add.f32 %f506, %f498, %f505; add.f32 %f507, %f503, %f506; add.f32 %f508, %f504, %f507; sub.f32 %f509, %f504, %f508; add.f32 %f510, %f507, %f509; mul.rn.f32 %f512, %f487, %f748; mul.rn.f32 %f514, %f487, %f749; add.f32 %f515, %f512, %f508; sub.f32 %f516, %f512, %f515; add.f32 %f517, %f508, %f516; add.f32 %f518, %f510, %f517; add.f32 %f519, %f514, %f518; add.f32 %f520, %f515, %f519; sub.f32 %f521, %f515, %f520; add.f32 %f522, %f519, %f521; mul.rn.f32 %f524, %f744, %f520; neg.f32 %f525, %f524; fma.rn.f32 %f526, %f744, %f520, %f525; fma.rn.f32 %f527, %f744, %f522, %f526; fma.rn.f32 %f529, %f750, %f520, %f527; add.rn.f32 %f530, %f524, %f529; neg.f32 %f531, %f530; add.rn.f32 %f532, %f524, %f531; add.rn.f32 %f533, %f532, %f529; mov.b32 %r243, %f530; setp.eq.s32 %p66, %r243, 1118925336; add.s32 %r244, %r243, -1; mov.b32 %f534, %r244; add.f32 %f535, %f533, 0f37000000; selp.f32 %f536, %f534, %f530, %p66; selp.f32 %f159, %f535, %f533, %p66; mul.f32 %f537, %f536, 0f3FB8AA3B; cvt.rzi.f32.f32 %f538, %f537; fma.rn.f32 %f540, %f538, %f751, %f536; fma.rn.f32 %f542, %f538, %f752, %f540; mul.f32 %f543, %f542, 0f3FB8AA3B; ex2.approx.ftz.f32 %f544, %f543; add.f32 %f545, %f538, 0f00000000; ex2.approx.f32 %f546, %f545; mul.f32 %f547, %f544, %f546; setp.lt.f32 %p67, %f536, 0fC2D20000; selp.f32 %f548, 0f00000000, %f547, %p67; setp.gt.f32 %p68, %f536, 0f42D20000; selp.f32 %f861, 0f7F800000, %f548, %p68; setp.eq.f32 %p69, %f861, 0f7F800000; @%p69 bra BB0_71; fma.rn.f32 %f861, %f861, %f159, %f861; BB0_71: setp.lt.f32 %p70, %f142, 0f00000000; and.pred %p4, %p70, %p55; mov.b32 %r245, %f861; xor.b32 %r246, %r245, -2147483648; mov.b32 %f549, %r246; selp.f32 %f863, %f549, %f861, %p4; setp.eq.f32 %p72, %f142, 0f00000000; @%p72 bra BB0_74; bra.uni BB0_72; BB0_74: add.f32 %f552, %f142, %f142; selp.f32 %f863, %f552, 0f00000000, %p55; bra.uni BB0_75; BB0_72: setp.geu.f32 %p73, %f142, 0f00000000; @%p73 bra BB0_75; mov.f32 %f763, 0f3EE66666; cvt.rzi.f32.f32 %f551, %f763; setp.neu.f32 %p74, %f551, 0f3EE66666; selp.f32 %f863, 0f7FFFFFFF, %f863, %p74; BB0_75: abs.f32 %f767, %f142; add.f32 %f553, %f767, 0f3EE66666; mov.b32 %r247, %f553; setp.lt.s32 %p76, %r247, 2139095040; @%p76 bra BB0_80; abs.f32 %f768, %f142; setp.gtu.f32 %p77, %f768, 0f7F800000; @%p77 bra BB0_79; bra.uni BB0_77; BB0_79: add.f32 %f863, %f142, 0f3EE66666; bra.uni BB0_80; BB0_77: abs.f32 %f769, %f142; setp.neu.f32 %p78, %f769, 0f7F800000; @%p78 bra BB0_80; selp.f32 %f863, 0fFF800000, 0f7F800000, %p4; BB0_80: mov.f32 %f761, 0fB5BFBE8E; mov.f32 %f760, 0fBF317200; mov.f32 %f759, 0f00000000; mov.f32 %f758, 0f35BFBE8E; mov.f32 %f757, 0f3F317200; mov.f32 %f756, 0f3DAAAABD; mov.f32 %f755, 0f3C4CAF63; mov.f32 %f754, 0f3B18F0FE; mov.f32 %f753, 0f3EE66666; setp.eq.f32 %p79, %f142, 0f3F800000; selp.f32 %f170, 0f3F800000, %f863, %p79; abs.f32 %f171, %f143; setp.lt.f32 %p80, %f171, 0f00800000; mul.f32 %f556, %f171, 0f4B800000; selp.f32 %f557, 0fC3170000, 0fC2FE0000, %p80; selp.f32 %f558, %f556, %f171, %p80; mov.b32 %r248, %f558; and.b32 %r249, %r248, 8388607; or.b32 %r250, %r249, 1065353216; mov.b32 %f559, %r250; shr.u32 %r251, %r248, 23; cvt.rn.f32.u32 %f560, %r251; add.f32 %f561, %f557, %f560; setp.gt.f32 %p81, %f559, 0f3FB504F3; mul.f32 %f562, %f559, 0f3F000000; add.f32 %f563, %f561, 0f3F800000; selp.f32 %f564, %f562, %f559, %p81; selp.f32 %f565, %f563, %f561, %p81; add.f32 %f566, %f564, 0fBF800000; add.f32 %f555, %f564, 0f3F800000; // inline asm rcp.approx.ftz.f32 %f554,%f555; // inline asm add.f32 %f567, %f566, %f566; mul.f32 %f568, %f554, %f567; mul.f32 %f569, %f568, %f568; fma.rn.f32 %f572, %f754, %f569, %f755; fma.rn.f32 %f574, %f572, %f569, %f756; mul.rn.f32 %f575, %f574, %f569; mul.rn.f32 %f576, %f575, %f568; sub.f32 %f577, %f566, %f568; neg.f32 %f578, %f568; add.f32 %f579, %f577, %f577; fma.rn.f32 %f580, %f578, %f566, %f579; mul.rn.f32 %f581, %f554, %f580; add.f32 %f582, %f576, %f568; sub.f32 %f583, %f568, %f582; add.f32 %f584, %f576, %f583; add.f32 %f585, %f581, %f584; add.f32 %f586, %f582, %f585; sub.f32 %f587, %f582, %f586; add.f32 %f588, %f585, %f587; mul.rn.f32 %f590, %f565, %f757; mul.rn.f32 %f592, %f565, %f758; add.f32 %f593, %f590, %f586; sub.f32 %f594, %f590, %f593; add.f32 %f595, %f586, %f594; add.f32 %f596, %f588, %f595; add.f32 %f597, %f592, %f596; add.f32 %f598, %f593, %f597; sub.f32 %f599, %f593, %f598; add.f32 %f600, %f597, %f599; mul.rn.f32 %f602, %f753, %f598; neg.f32 %f603, %f602; fma.rn.f32 %f604, %f753, %f598, %f603; fma.rn.f32 %f605, %f753, %f600, %f604; fma.rn.f32 %f607, %f759, %f598, %f605; add.rn.f32 %f608, %f602, %f607; neg.f32 %f609, %f608; add.rn.f32 %f610, %f602, %f609; add.rn.f32 %f611, %f610, %f607; mov.b32 %r252, %f608; setp.eq.s32 %p82, %r252, 1118925336; add.s32 %r253, %r252, -1; mov.b32 %f612, %r253; add.f32 %f613, %f611, 0f37000000; selp.f32 %f614, %f612, %f608, %p82; selp.f32 %f172, %f613, %f611, %p82; mul.f32 %f615, %f614, 0f3FB8AA3B; cvt.rzi.f32.f32 %f616, %f615; fma.rn.f32 %f618, %f616, %f760, %f614; fma.rn.f32 %f620, %f616, %f761, %f618; mul.f32 %f621, %f620, 0f3FB8AA3B; ex2.approx.ftz.f32 %f622, %f621; add.f32 %f623, %f616, 0f00000000; ex2.approx.f32 %f624, %f623; mul.f32 %f625, %f622, %f624; setp.lt.f32 %p83, %f614, 0fC2D20000; selp.f32 %f626, 0f00000000, %f625, %p83; setp.gt.f32 %p84, %f614, 0f42D20000; selp.f32 %f864, 0f7F800000, %f626, %p84; setp.eq.f32 %p85, %f864, 0f7F800000; @%p85 bra BB0_82; fma.rn.f32 %f864, %f864, %f172, %f864; BB0_82: setp.lt.f32 %p86, %f143, 0f00000000; and.pred %p5, %p86, %p55; mov.b32 %r254, %f864; xor.b32 %r255, %r254, -2147483648; mov.b32 %f627, %r255; selp.f32 %f866, %f627, %f864, %p5; setp.eq.f32 %p88, %f143, 0f00000000; @%p88 bra BB0_85; bra.uni BB0_83; BB0_85: add.f32 %f630, %f143, %f143; selp.f32 %f866, %f630, 0f00000000, %p55; bra.uni BB0_86; BB0_83: setp.geu.f32 %p89, %f143, 0f00000000; @%p89 bra BB0_86; mov.f32 %f762, 0f3EE66666; cvt.rzi.f32.f32 %f629, %f762; setp.neu.f32 %p90, %f629, 0f3EE66666; selp.f32 %f866, 0f7FFFFFFF, %f866, %p90; BB0_86: abs.f32 %f786, %f143; add.f32 %f631, %f786, 0f3EE66666; mov.b32 %r256, %f631; setp.lt.s32 %p92, %r256, 2139095040; @%p92 bra BB0_91; abs.f32 %f787, %f143; setp.gtu.f32 %p93, %f787, 0f7F800000; @%p93 bra BB0_90; bra.uni BB0_88; BB0_90: add.f32 %f866, %f143, 0f3EE66666; bra.uni BB0_91; BB0_88: abs.f32 %f788, %f143; setp.neu.f32 %p94, %f788, 0f7F800000; @%p94 bra BB0_91; selp.f32 %f866, 0fFF800000, 0f7F800000, %p5; BB0_91: mov.u32 %r333, 4; setp.eq.f32 %p95, %f143, 0f3F800000; selp.f32 %f632, 0f3F800000, %f866, %p95; cvt.u64.u32 %rd74, %r5; cvt.u64.u32 %rd73, %r4; mov.u64 %rd77, image; cvta.global.u64 %rd72, %rd77; // inline asm call (%rd71), _rt_buffer_get_64, (%rd72, %r95, %r333, %rd73, %rd74, %rd25, %rd25); // inline asm cvt.sat.f32.f32 %f633, %f632; mul.f32 %f634, %f633, 0f437FFD71; cvt.rzi.u32.f32 %r259, %f634; cvt.sat.f32.f32 %f635, %f170; mul.f32 %f636, %f635, 0f437FFD71; cvt.rzi.u32.f32 %r260, %f636; cvt.sat.f32.f32 %f637, %f157; mul.f32 %f638, %f637, 0f437FFD71; cvt.rzi.u32.f32 %r261, %f638; cvt.u16.u32 %rs20, %r259; cvt.u16.u32 %rs21, %r261; cvt.u16.u32 %rs22, %r260; mov.u16 %rs23, 255; st.v4.u8 [%rd71], {%rs20, %rs22, %rs21, %rs23}; ld.global.u32 %r395, [imageEnabled]; BB0_92: and.b32 %r262, %r395, 4; setp.eq.s32 %p96, %r262, 0; @%p96 bra BB0_94; mov.u32 %r334, 8; cvt.u64.u32 %rd80, %r4; cvt.u64.u32 %rd81, %r5; mov.u64 %rd84, image_HDR; cvta.global.u64 %rd79, %rd84; // inline asm call (%rd78), _rt_buffer_get_64, (%rd79, %r95, %r334, %rd80, %rd81, %rd25, %rd25); // inline asm mov.f32 %f642, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs27, %f642;} // inline asm // inline asm { cvt.rn.f16.f32 %rs26, %f143;} // inline asm // inline asm { cvt.rn.f16.f32 %rs25, %f142;} // inline asm // inline asm { cvt.rn.f16.f32 %rs24, %f141;} // inline asm st.v4.u16 [%rd78], {%rs24, %rs25, %rs26, %rs27}; ld.global.u32 %r395, [imageEnabled]; BB0_94: and.b32 %r265, %r395, 16; setp.eq.s32 %p97, %r265, 0; @%p97 bra BB0_96; mov.u32 %r335, 8; cvt.u64.u32 %rd88, %r5; cvt.u64.u32 %rd87, %r4; mov.u64 %rd91, image_HDR2; cvta.global.u64 %rd86, %rd91; // inline asm call (%rd85), _rt_buffer_get_64, (%rd86, %r95, %r335, %rd87, %rd88, %rd25, %rd25); // inline asm mov.f32 %f646, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs31, %f646;} // inline asm // inline asm { cvt.rn.f16.f32 %rs30, %f137;} // inline asm // inline asm { cvt.rn.f16.f32 %rs29, %f136;} // inline asm // inline asm { cvt.rn.f16.f32 %rs28, %f135;} // inline asm st.v4.u16 [%rd85], {%rs28, %rs29, %rs30, %rs31}; BB0_96: cvt.u64.u32 %rd16, %r4; cvt.u64.u32 %rd17, %r5; mul.f32 %f183, %f123, 0f3F000000; mul.f32 %f184, %f124, 0f3F000000; mul.f32 %f185, %f125, 0f3F000000; ld.global.u32 %r268, [additive]; setp.eq.s32 %p98, %r268, 0; mov.f32 %f647, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs32, %f647;} // inline asm @%p98 bra BB0_98; mov.u32 %r336, 8; mov.u64 %rd104, image_RNM0; cvta.global.u64 %rd93, %rd104; // inline asm call (%rd92), _rt_buffer_get_64, (%rd93, %r95, %r336, %rd16, %rd17, %rd25, %rd25); // inline asm ld.v4.u16 {%rs39, %rs40, %rs41, %rs42}, [%rd92]; // inline asm { cvt.f32.f16 %f648, %rs39;} // inline asm // inline asm { cvt.f32.f16 %f649, %rs40;} // inline asm // inline asm { cvt.f32.f16 %f650, %rs41;} // inline asm // inline asm call (%rd98), _rt_buffer_get_64, (%rd93, %r95, %r336, %rd16, %rd17, %rd25, %rd25); // inline asm add.f32 %f651, %f183, %f648; add.f32 %f652, %f184, %f649; add.f32 %f653, %f185, %f650; // inline asm { cvt.rn.f16.f32 %rs38, %f653;} // inline asm // inline asm { cvt.rn.f16.f32 %rs37, %f652;} // inline asm // inline asm { cvt.rn.f16.f32 %rs36, %f651;} // inline asm st.v4.u16 [%rd98], {%rs36, %rs37, %rs38, %rs32}; bra.uni BB0_99; BB0_98: mov.u32 %r343, 8; mov.u64 %rd111, image_RNM0; cvta.global.u64 %rd106, %rd111; // inline asm call (%rd105), _rt_buffer_get_64, (%rd106, %r95, %r343, %rd16, %rd17, %rd25, %rd25); // inline asm // inline asm { cvt.rn.f16.f32 %rs45, %f185;} // inline asm // inline asm { cvt.rn.f16.f32 %rs44, %f184;} // inline asm // inline asm { cvt.rn.f16.f32 %rs43, %f183;} // inline asm st.v4.u16 [%rd105], {%rs43, %rs44, %rs45, %rs32}; BB0_99: mov.f32 %f658, 0f34000000; max.f32 %f659, %f183, %f658; mul.f32 %f660, %f126, 0f3F000000; div.rn.f32 %f661, %f660, %f659; max.f32 %f662, %f184, %f658; mul.f32 %f663, %f127, 0f3F000000; div.rn.f32 %f664, %f663, %f662; max.f32 %f665, %f185, %f658; mul.f32 %f666, %f128, 0f3F000000; div.rn.f32 %f667, %f666, %f665; fma.rn.f32 %f186, %f661, 0f3F000000, 0f3F000000; fma.rn.f32 %f187, %f664, 0f3F000000, 0f3F000000; fma.rn.f32 %f188, %f667, 0f3F000000, 0f3F000000; mul.f32 %f668, %f129, 0f3F000000; div.rn.f32 %f669, %f668, %f659; mul.f32 %f670, %f130, 0f3F000000; div.rn.f32 %f671, %f670, %f662; mul.f32 %f672, %f131, 0f3F000000; div.rn.f32 %f673, %f672, %f665; fma.rn.f32 %f189, %f669, 0f3F000000, 0f3F000000; fma.rn.f32 %f190, %f671, 0f3F000000, 0f3F000000; fma.rn.f32 %f191, %f673, 0f3F000000, 0f3F000000; mul.f32 %f674, %f132, 0f3F000000; div.rn.f32 %f675, %f674, %f659; mul.f32 %f676, %f133, 0f3F000000; div.rn.f32 %f677, %f676, %f662; mul.f32 %f678, %f134, 0f3F000000; div.rn.f32 %f679, %f678, %f665; fma.rn.f32 %f192, %f675, 0f3F000000, 0f3F000000; fma.rn.f32 %f193, %f677, 0f3F000000, 0f3F000000; fma.rn.f32 %f194, %f679, 0f3F000000, 0f3F000000; ld.global.u32 %r275, [additive]; setp.eq.s32 %p99, %r275, 0; // inline asm { cvt.rn.f16.f32 %rs46, %f647;} // inline asm @%p99 bra BB0_101; mov.u32 %r337, 8; mov.u64 %rd124, image_RNM1; cvta.global.u64 %rd113, %rd124; // inline asm call (%rd112), _rt_buffer_get_64, (%rd113, %r95, %r337, %rd16, %rd17, %rd25, %rd25); // inline asm ld.v4.u16 {%rs53, %rs54, %rs55, %rs56}, [%rd112]; // inline asm { cvt.f32.f16 %f680, %rs53;} // inline asm // inline asm { cvt.f32.f16 %f681, %rs54;} // inline asm // inline asm { cvt.f32.f16 %f682, %rs55;} // inline asm // inline asm call (%rd118), _rt_buffer_get_64, (%rd113, %r95, %r337, %rd16, %rd17, %rd25, %rd25); // inline asm add.f32 %f683, %f186, %f680; add.f32 %f684, %f187, %f681; add.f32 %f685, %f188, %f682; // inline asm { cvt.rn.f16.f32 %rs52, %f685;} // inline asm // inline asm { cvt.rn.f16.f32 %rs51, %f684;} // inline asm // inline asm { cvt.rn.f16.f32 %rs50, %f683;} // inline asm st.v4.u16 [%rd118], {%rs50, %rs51, %rs52, %rs46}; bra.uni BB0_102; BB0_101: mov.u32 %r342, 8; mov.u64 %rd131, image_RNM1; cvta.global.u64 %rd126, %rd131; // inline asm call (%rd125), _rt_buffer_get_64, (%rd126, %r95, %r342, %rd16, %rd17, %rd25, %rd25); // inline asm // inline asm { cvt.rn.f16.f32 %rs59, %f188;} // inline asm // inline asm { cvt.rn.f16.f32 %rs58, %f187;} // inline asm // inline asm { cvt.rn.f16.f32 %rs57, %f186;} // inline asm st.v4.u16 [%rd125], {%rs57, %rs58, %rs59, %rs46}; BB0_102: ld.global.u32 %r282, [additive]; setp.eq.s32 %p100, %r282, 0; // inline asm { cvt.rn.f16.f32 %rs60, %f647;} // inline asm @%p100 bra BB0_104; mov.u32 %r338, 8; mov.u64 %rd144, image_RNM2; cvta.global.u64 %rd133, %rd144; // inline asm call (%rd132), _rt_buffer_get_64, (%rd133, %r95, %r338, %rd16, %rd17, %rd25, %rd25); // inline asm ld.v4.u16 {%rs67, %rs68, %rs69, %rs70}, [%rd132]; // inline asm { cvt.f32.f16 %f690, %rs67;} // inline asm // inline asm { cvt.f32.f16 %f691, %rs68;} // inline asm // inline asm { cvt.f32.f16 %f692, %rs69;} // inline asm // inline asm call (%rd138), _rt_buffer_get_64, (%rd133, %r95, %r338, %rd16, %rd17, %rd25, %rd25); // inline asm add.f32 %f693, %f189, %f690; add.f32 %f694, %f190, %f691; add.f32 %f695, %f191, %f692; // inline asm { cvt.rn.f16.f32 %rs66, %f695;} // inline asm // inline asm { cvt.rn.f16.f32 %rs65, %f694;} // inline asm // inline asm { cvt.rn.f16.f32 %rs64, %f693;} // inline asm st.v4.u16 [%rd138], {%rs64, %rs65, %rs66, %rs60}; bra.uni BB0_105; BB0_104: mov.u32 %r341, 8; mov.u64 %rd151, image_RNM2; cvta.global.u64 %rd146, %rd151; // inline asm call (%rd145), _rt_buffer_get_64, (%rd146, %r95, %r341, %rd16, %rd17, %rd25, %rd25); // inline asm // inline asm { cvt.rn.f16.f32 %rs73, %f191;} // inline asm // inline asm { cvt.rn.f16.f32 %rs72, %f190;} // inline asm // inline asm { cvt.rn.f16.f32 %rs71, %f189;} // inline asm st.v4.u16 [%rd145], {%rs71, %rs72, %rs73, %rs60}; BB0_105: ld.global.u32 %r289, [additive]; setp.eq.s32 %p101, %r289, 0; // inline asm { cvt.rn.f16.f32 %rs74, %f647;} // inline asm @%p101 bra BB0_107; mov.u32 %r339, 8; mov.u64 %rd164, image_RNM3; cvta.global.u64 %rd153, %rd164; // inline asm call (%rd152), _rt_buffer_get_64, (%rd153, %r95, %r339, %rd16, %rd17, %rd25, %rd25); // inline asm ld.v4.u16 {%rs81, %rs82, %rs83, %rs84}, [%rd152]; // inline asm { cvt.f32.f16 %f700, %rs81;} // inline asm // inline asm { cvt.f32.f16 %f701, %rs82;} // inline asm // inline asm { cvt.f32.f16 %f702, %rs83;} // inline asm // inline asm call (%rd158), _rt_buffer_get_64, (%rd153, %r95, %r339, %rd16, %rd17, %rd25, %rd25); // inline asm add.f32 %f703, %f192, %f700; add.f32 %f704, %f193, %f701; add.f32 %f705, %f194, %f702; // inline asm { cvt.rn.f16.f32 %rs80, %f705;} // inline asm // inline asm { cvt.rn.f16.f32 %rs79, %f704;} // inline asm // inline asm { cvt.rn.f16.f32 %rs78, %f703;} // inline asm st.v4.u16 [%rd158], {%rs78, %rs79, %rs80, %rs74}; bra.uni BB0_126; BB0_107: mov.u32 %r340, 8; mov.u64 %rd171, image_RNM3; cvta.global.u64 %rd166, %rd171; // inline asm call (%rd165), _rt_buffer_get_64, (%rd166, %r95, %r340, %rd16, %rd17, %rd25, %rd25); // inline asm // inline asm { cvt.rn.f16.f32 %rs87, %f194;} // inline asm // inline asm { cvt.rn.f16.f32 %rs86, %f193;} // inline asm // inline asm { cvt.rn.f16.f32 %rs85, %f192;} // inline asm st.v4.u16 [%rd165], {%rs85, %rs86, %rs87, %rs74}; BB0_126: ret; }