//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 uvtangent[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .texref albedoTex;
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[40];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<117>;
	.reg .b16 	%rs<144>;
	.reg .f32 	%f<961>;
	.reg .b32 	%r<413>;
	.reg .b64 	%rd<278>;


	mov.u64 	%rd277, __local_depot0;
	cvta.local.u64 	%SP, %rd277;
	ld.global.u32 	%r1, [samples];
	ld.global.v2.u32 	{%r102, %r103}, [pixelID];
	cvt.u64.u32	%rd24, %r102;
	cvt.u64.u32	%rd25, %r103;
	mov.u64 	%rd28, uvnormal;
	cvta.global.u64 	%rd23, %rd28;
	mov.u32 	%r100, 2;
	mov.u32 	%r101, 4;
	mov.u64 	%rd27, 0;
	// inline asm
	call (%rd22), _rt_buffer_get_64, (%rd23, %r100, %r101, %rd24, %rd25, %rd27, %rd27);
	// inline asm
	ld.u32 	%r2, [%rd22];
	shr.u32 	%r106, %r2, 16;
	cvt.u16.u32	%rs1, %r106;
	and.b16  	%rs5, %rs1, 255;
	cvt.u16.u32	%rs6, %r2;
	or.b16  	%rs7, %rs6, %rs5;
	setp.eq.s16	%p6, %rs7, 0;
	mov.f32 	%f892, 0f00000000;
	mov.f32 	%f893, %f892;
	mov.f32 	%f894, %f892;
	@%p6 bra 	BB0_2;

	ld.u8 	%rs8, [%rd22+1];
	and.b16  	%rs10, %rs6, 255;
	cvt.rn.f32.u16	%f213, %rs10;
	div.rn.f32 	%f214, %f213, 0f437F0000;
	fma.rn.f32 	%f215, %f214, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f216, %rs8;
	div.rn.f32 	%f217, %f216, 0f437F0000;
	fma.rn.f32 	%f218, %f217, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f219, %rs5;
	div.rn.f32 	%f220, %f219, 0f437F0000;
	fma.rn.f32 	%f221, %f220, 0f40000000, 0fBF800000;
	mul.f32 	%f222, %f218, %f218;
	fma.rn.f32 	%f223, %f215, %f215, %f222;
	fma.rn.f32 	%f224, %f221, %f221, %f223;
	sqrt.rn.f32 	%f225, %f224;
	rcp.rn.f32 	%f226, %f225;
	mul.f32 	%f892, %f215, %f226;
	mul.f32 	%f893, %f218, %f226;
	mul.f32 	%f894, %f221, %f226;

BB0_2:
	ld.global.v2.u32 	{%r107, %r108}, [pixelID];
	ld.global.v2.u32 	{%r110, %r111}, [tileInfo];
	add.s32 	%r3, %r107, %r110;
	add.s32 	%r4, %r108, %r111;
	setp.eq.f32	%p7, %f893, 0f00000000;
	setp.eq.f32	%p8, %f892, 0f00000000;
	and.pred  	%p9, %p8, %p7;
	setp.eq.f32	%p10, %f894, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	@%p11 bra 	BB0_111;
	bra.uni 	BB0_3;

BB0_111:
	ld.global.u32 	%r412, [imageEnabled];
	and.b32  	%r312, %r412, 1;
	setp.eq.b32	%p109, %r312, 1;
	@!%p109 bra 	BB0_113;
	bra.uni 	BB0_112;

BB0_112:
	cvt.u64.u32	%rd177, %r3;
	cvt.u64.u32	%rd178, %r4;
	mov.u64 	%rd181, image;
	cvta.global.u64 	%rd176, %rd181;
	mov.u64 	%rd180, 0;
	// inline asm
	call (%rd175), _rt_buffer_get_64, (%rd176, %r100, %r101, %rd177, %rd178, %rd180, %rd180);
	// inline asm
	mov.u16 	%rs100, 0;
	st.v4.u8 	[%rd175], {%rs100, %rs100, %rs100, %rs100};
	ld.global.u32 	%r412, [imageEnabled];

BB0_113:
	and.b32  	%r315, %r412, 4;
	setp.eq.s32	%p110, %r315, 0;
	@%p110 bra 	BB0_115;

	cvt.u64.u32	%rd184, %r3;
	cvt.u64.u32	%rd185, %r4;
	mov.u64 	%rd188, image_HDR;
	cvta.global.u64 	%rd183, %rd188;
	mov.u32 	%r317, 8;
	mov.u64 	%rd187, 0;
	// inline asm
	call (%rd182), _rt_buffer_get_64, (%rd183, %r100, %r317, %rd184, %rd185, %rd187, %rd187);
	// inline asm
	mov.f32 	%f807, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs101, %f807;}

	// inline asm
	mov.u16 	%rs102, 0;
	st.v4.u16 	[%rd182], {%rs101, %rs101, %rs101, %rs102};
	ld.global.u32 	%r412, [imageEnabled];

BB0_115:
	and.b32  	%r318, %r412, 16;
	setp.eq.s32	%p111, %r318, 0;
	@%p111 bra 	BB0_117;

	cvt.u64.u32	%rd192, %r4;
	cvt.u64.u32	%rd191, %r3;
	mov.u64 	%rd195, image_HDR2;
	cvta.global.u64 	%rd190, %rd195;
	mov.u32 	%r320, 8;
	mov.u64 	%rd194, 0;
	// inline asm
	call (%rd189), _rt_buffer_get_64, (%rd190, %r100, %r320, %rd191, %rd192, %rd194, %rd194);
	// inline asm
	mov.f32 	%f808, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs103, %f808;}

	// inline asm
	mov.u16 	%rs104, 0;
	st.v4.u16 	[%rd189], {%rs103, %rs103, %rs103, %rs104};

BB0_117:
	cvt.u64.u32	%rd20, %r3;
	cvt.u64.u32	%rd21, %r4;
	ld.global.u32 	%r321, [additive];
	setp.eq.s32	%p112, %r321, 0;
	@%p112 bra 	BB0_119;

	mov.u64 	%rd208, image_RNM0;
	cvta.global.u64 	%rd197, %rd208;
	mov.u32 	%r325, 8;
	mov.u64 	%rd207, 0;
	// inline asm
	call (%rd196), _rt_buffer_get_64, (%rd197, %r100, %r325, %rd20, %rd21, %rd207, %rd207);
	// inline asm
	ld.v4.u16 	{%rs111, %rs112, %rs113, %rs114}, [%rd196];
	// inline asm
	{  cvt.f32.f16 %f809, %rs111;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f810, %rs112;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f811, %rs113;}

	// inline asm
	// inline asm
	call (%rd202), _rt_buffer_get_64, (%rd197, %r100, %r325, %rd20, %rd21, %rd207, %rd207);
	// inline asm
	add.f32 	%f812, %f809, 0f00000000;
	add.f32 	%f813, %f810, 0f00000000;
	add.f32 	%f814, %f811, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs110, %f814;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs109, %f813;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs108, %f812;}

	// inline asm
	mov.u16 	%rs115, 0;
	st.v4.u16 	[%rd202], {%rs108, %rs109, %rs110, %rs115};
	bra.uni 	BB0_120;

BB0_3:
	ld.global.v2.u32 	{%r123, %r124}, [pixelID];
	cvt.u64.u32	%rd31, %r123;
	cvt.u64.u32	%rd32, %r124;
	mov.u64 	%rd53, lightmapDirect;
	cvta.global.u64 	%rd30, %rd53;
	mov.u32 	%r116, 8;
	// inline asm
	call (%rd29), _rt_buffer_get_64, (%rd30, %r100, %r116, %rd31, %rd32, %rd27, %rd27);
	// inline asm
	ld.v4.u16 	{%rs15, %rs16, %rs17, %rs18}, [%rd29];
	// inline asm
	{  cvt.f32.f16 %f227, %rs15;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f228, %rs16;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f229, %rs17;}

	// inline asm
	ld.global.v2.u32 	{%r127, %r128}, [pixelID];
	cvt.u64.u32	%rd37, %r127;
	cvt.u64.u32	%rd38, %r128;
	mov.u64 	%rd54, uvpos;
	cvta.global.u64 	%rd36, %rd54;
	mov.u32 	%r118, 12;
	// inline asm
	call (%rd35), _rt_buffer_get_64, (%rd36, %r100, %r118, %rd37, %rd38, %rd27, %rd27);
	// inline asm
	ld.f32 	%f233, [%rd35+8];
	ld.f32 	%f234, [%rd35+4];
	ld.f32 	%f235, [%rd35];
	mul.f32 	%f236, %f235, 0f3456BF95;
	mul.f32 	%f237, %f234, 0f3456BF95;
	mul.f32 	%f238, %f233, 0f3456BF95;
	abs.f32 	%f239, %f892;
	div.rn.f32 	%f240, %f236, %f239;
	abs.f32 	%f241, %f893;
	div.rn.f32 	%f242, %f237, %f241;
	abs.f32 	%f243, %f894;
	div.rn.f32 	%f244, %f238, %f243;
	abs.f32 	%f245, %f240;
	abs.f32 	%f246, %f242;
	abs.f32 	%f247, %f244;
	mov.f32 	%f248, 0f38D1B717;
	max.f32 	%f249, %f245, %f248;
	max.f32 	%f250, %f246, %f248;
	max.f32 	%f251, %f247, %f248;
	fma.rn.f32 	%f10, %f892, %f249, %f235;
	fma.rn.f32 	%f11, %f893, %f250, %f234;
	fma.rn.f32 	%f12, %f894, %f251, %f233;
	setp.gt.f32	%p12, %f239, %f243;
	neg.f32 	%f252, %f893;
	selp.f32	%f253, %f252, 0f00000000, %p12;
	neg.f32 	%f254, %f894;
	selp.f32	%f255, %f892, %f254, %p12;
	selp.f32	%f256, 0f00000000, %f893, %p12;
	mul.f32 	%f257, %f255, %f255;
	fma.rn.f32 	%f258, %f253, %f253, %f257;
	fma.rn.f32 	%f259, %f256, %f256, %f258;
	sqrt.rn.f32 	%f260, %f259;
	rcp.rn.f32 	%f261, %f260;
	mul.f32 	%f13, %f253, %f261;
	mul.f32 	%f14, %f255, %f261;
	mul.f32 	%f15, %f256, %f261;
	ld.global.v2.u32 	{%r131, %r132}, [pixelID];
	cvt.u64.u32	%rd43, %r131;
	cvt.u64.u32	%rd44, %r132;
	mov.u64 	%rd55, rnd_seeds;
	cvta.global.u64 	%rd42, %rd55;
	// inline asm
	call (%rd41), _rt_buffer_get_64, (%rd42, %r100, %r101, %rd43, %rd44, %rd27, %rd27);
	// inline asm
	ld.u32 	%r388, [%rd41];
	ld.global.v2.u32 	{%r135, %r136}, [pixelID];
	cvt.u64.u32	%rd49, %r135;
	cvt.u64.u32	%rd50, %r136;
	mov.u64 	%rd56, uvtangent;
	cvta.global.u64 	%rd48, %rd56;
	// inline asm
	call (%rd47), _rt_buffer_get_64, (%rd48, %r100, %r101, %rd49, %rd50, %rd27, %rd27);
	// inline asm
	ld.u32 	%r6, [%rd47];
	shr.u32 	%r7, %r6, 16;
	cvt.u16.u32	%rs19, %r7;
	and.b16  	%rs20, %rs19, 255;
	cvt.u16.u32	%rs21, %r6;
	or.b16  	%rs22, %rs21, %rs20;
	setp.eq.s16	%p13, %rs22, 0;
	mov.f32 	%f898, 0f00000000;
	mov.f32 	%f895, %f898;
	mov.f32 	%f896, %f898;
	mov.f32 	%f897, %f898;
	@%p13 bra 	BB0_5;

	ld.u8 	%rs23, [%rd47+1];
	and.b16  	%rs25, %rs21, 255;
	cvt.rn.f32.u16	%f262, %rs25;
	div.rn.f32 	%f263, %f262, 0f437F0000;
	fma.rn.f32 	%f264, %f263, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f265, %rs23;
	div.rn.f32 	%f266, %f265, 0f437F0000;
	fma.rn.f32 	%f267, %f266, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f268, %rs20;
	div.rn.f32 	%f269, %f268, 0f437F0000;
	fma.rn.f32 	%f270, %f269, 0f40000000, 0fBF800000;
	mul.f32 	%f271, %f267, %f267;
	fma.rn.f32 	%f272, %f264, %f264, %f271;
	fma.rn.f32 	%f273, %f270, %f270, %f272;
	sqrt.rn.f32 	%f274, %f273;
	rcp.rn.f32 	%f275, %f274;
	mul.f32 	%f895, %f264, %f275;
	mul.f32 	%f896, %f267, %f275;
	mul.f32 	%f897, %f270, %f275;

BB0_5:
	mul.f32 	%f279, %f894, %f896;
	mul.f32 	%f280, %f893, %f897;
	sub.f32 	%f281, %f280, %f279;
	mul.f32 	%f282, %f892, %f897;
	mul.f32 	%f283, %f894, %f895;
	sub.f32 	%f284, %f283, %f282;
	mul.f32 	%f285, %f893, %f895;
	mul.f32 	%f286, %f892, %f896;
	sub.f32 	%f287, %f286, %f285;
	setp.lt.u32	%p14, %r6, 16777216;
	selp.f32	%f288, 0fBF800000, 0f3F800000, %p14;
	mul.f32 	%f289, %f281, %f288;
	mul.f32 	%f290, %f284, %f288;
	mul.f32 	%f291, %f287, %f288;
	mul.f32 	%f292, %f289, 0f00000000;
	mul.f32 	%f293, %f290, 0f00000000;
	mul.f32 	%f294, %f291, 0f00000000;
	fma.rn.f32 	%f295, %f895, 0f3F5105EC, %f292;
	fma.rn.f32 	%f296, %f896, 0f3F5105EC, %f293;
	fma.rn.f32 	%f297, %f897, 0f3F5105EC, %f294;
	mul.f32 	%f22, %f892, 0f3F13CD3A;
	add.f32 	%f23, %f22, %f295;
	mul.f32 	%f24, %f893, 0f3F13CD3A;
	add.f32 	%f25, %f24, %f296;
	mul.f32 	%f26, %f894, 0f3F13CD3A;
	add.f32 	%f27, %f26, %f297;
	ld.global.v2.u32 	{%r141, %r142}, [pixelID];
	cvt.u64.u32	%rd59, %r141;
	cvt.u64.u32	%rd60, %r142;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd48, %r100, %r101, %rd59, %rd60, %rd27, %rd27);
	// inline asm
	ld.u32 	%r8, [%rd57];
	shr.u32 	%r9, %r8, 16;
	cvt.u16.u32	%rs28, %r9;
	and.b16  	%rs29, %rs28, 255;
	cvt.u16.u32	%rs30, %r8;
	or.b16  	%rs31, %rs30, %rs29;
	setp.eq.s16	%p15, %rs31, 0;
	mov.f32 	%f899, %f898;
	mov.f32 	%f900, %f898;
	@%p15 bra 	BB0_7;

	ld.u8 	%rs32, [%rd57+1];
	and.b16  	%rs34, %rs30, 255;
	cvt.rn.f32.u16	%f298, %rs34;
	div.rn.f32 	%f299, %f298, 0f437F0000;
	fma.rn.f32 	%f300, %f299, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f301, %rs32;
	div.rn.f32 	%f302, %f301, 0f437F0000;
	fma.rn.f32 	%f303, %f302, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f304, %rs29;
	div.rn.f32 	%f305, %f304, 0f437F0000;
	fma.rn.f32 	%f306, %f305, 0f40000000, 0fBF800000;
	mul.f32 	%f307, %f303, %f303;
	fma.rn.f32 	%f308, %f300, %f300, %f307;
	fma.rn.f32 	%f309, %f306, %f306, %f308;
	sqrt.rn.f32 	%f310, %f309;
	rcp.rn.f32 	%f311, %f310;
	mul.f32 	%f898, %f300, %f311;
	mul.f32 	%f899, %f303, %f311;
	mul.f32 	%f900, %f306, %f311;

BB0_7:
	mov.f32 	%f901, 0f00000000;
	mov.u32 	%r384, 4;
	mov.u64 	%rd272, 0;
	mov.u32 	%r383, 2;
	mul.f32 	%f315, %f894, %f899;
	mul.f32 	%f316, %f893, %f900;
	sub.f32 	%f317, %f316, %f315;
	mul.f32 	%f318, %f892, %f900;
	mul.f32 	%f319, %f894, %f898;
	sub.f32 	%f320, %f319, %f318;
	mul.f32 	%f321, %f893, %f898;
	mul.f32 	%f322, %f892, %f899;
	sub.f32 	%f323, %f322, %f321;
	setp.lt.u32	%p16, %r8, 16777216;
	selp.f32	%f324, 0fBF800000, 0f3F800000, %p16;
	mul.f32 	%f325, %f317, %f324;
	mul.f32 	%f326, %f320, %f324;
	mul.f32 	%f327, %f323, %f324;
	mul.f32 	%f328, %f325, 0f3F3504F3;
	mul.f32 	%f329, %f326, 0f3F3504F3;
	mul.f32 	%f330, %f327, 0f3F3504F3;
	fma.rn.f32 	%f331, %f898, 0fBED105EC, %f328;
	fma.rn.f32 	%f332, %f899, 0fBED105EC, %f329;
	fma.rn.f32 	%f333, %f900, 0fBED105EC, %f330;
	add.f32 	%f34, %f22, %f331;
	add.f32 	%f35, %f24, %f332;
	add.f32 	%f36, %f26, %f333;
	ld.global.v2.u32 	{%r147, %r148}, [pixelID];
	cvt.u64.u32	%rd66, %r147;
	cvt.u64.u32	%rd67, %r148;
	// inline asm
	call (%rd64), _rt_buffer_get_64, (%rd48, %r383, %r384, %rd66, %rd67, %rd272, %rd272);
	// inline asm
	ld.u32 	%r10, [%rd64];
	shr.u32 	%r11, %r10, 16;
	cvt.u16.u32	%rs37, %r11;
	and.b16  	%rs38, %rs37, 255;
	cvt.u16.u32	%rs39, %r10;
	or.b16  	%rs40, %rs39, %rs38;
	setp.eq.s16	%p17, %rs40, 0;
	mov.f32 	%f902, %f901;
	mov.f32 	%f903, %f901;
	@%p17 bra 	BB0_9;

	ld.u8 	%rs41, [%rd64+1];
	and.b16  	%rs43, %rs39, 255;
	cvt.rn.f32.u16	%f334, %rs43;
	div.rn.f32 	%f335, %f334, 0f437F0000;
	fma.rn.f32 	%f336, %f335, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f337, %rs41;
	div.rn.f32 	%f338, %f337, 0f437F0000;
	fma.rn.f32 	%f339, %f338, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f340, %rs38;
	div.rn.f32 	%f341, %f340, 0f437F0000;
	fma.rn.f32 	%f342, %f341, 0f40000000, 0fBF800000;
	mul.f32 	%f343, %f339, %f339;
	fma.rn.f32 	%f344, %f336, %f336, %f343;
	fma.rn.f32 	%f345, %f342, %f342, %f344;
	sqrt.rn.f32 	%f346, %f345;
	rcp.rn.f32 	%f347, %f346;
	mul.f32 	%f901, %f336, %f347;
	mul.f32 	%f902, %f339, %f347;
	mul.f32 	%f903, %f342, %f347;

BB0_9:
	mul.f32 	%f887, %f893, 0f3F13CD3A;
	mul.f32 	%f886, %f892, 0f3F13CD3A;
	mov.f32 	%f916, 0f00000000;
	mul.f32 	%f360, %f894, %f902;
	mul.f32 	%f361, %f893, %f903;
	sub.f32 	%f362, %f361, %f360;
	mul.f32 	%f363, %f892, %f903;
	mul.f32 	%f364, %f894, %f901;
	sub.f32 	%f365, %f364, %f363;
	mul.f32 	%f366, %f893, %f901;
	mul.f32 	%f367, %f892, %f902;
	sub.f32 	%f368, %f367, %f366;
	setp.lt.u32	%p18, %r10, 16777216;
	selp.f32	%f369, 0fBF800000, 0f3F800000, %p18;
	mul.f32 	%f370, %f362, %f369;
	mul.f32 	%f371, %f365, %f369;
	mul.f32 	%f372, %f368, %f369;
	mul.f32 	%f373, %f370, 0fBF3504F3;
	mul.f32 	%f374, %f371, 0fBF3504F3;
	mul.f32 	%f375, %f372, 0fBF3504F3;
	fma.rn.f32 	%f376, %f901, 0fBED105EC, %f373;
	fma.rn.f32 	%f377, %f902, 0fBED105EC, %f374;
	fma.rn.f32 	%f378, %f903, 0fBED105EC, %f375;
	add.f32 	%f43, %f886, %f376;
	add.f32 	%f44, %f887, %f377;
	add.f32 	%f45, %f26, %f378;
	setp.lt.s32	%p19, %r1, 1;
	mov.f32 	%f917, %f916;
	mov.f32 	%f918, %f916;
	mov.f32 	%f919, %f916;
	mov.f32 	%f920, %f916;
	mov.f32 	%f921, %f916;
	mov.f32 	%f922, %f916;
	mov.f32 	%f923, %f916;
	mov.f32 	%f924, %f916;
	mov.f32 	%f925, %f916;
	mov.f32 	%f926, %f916;
	mov.f32 	%f927, %f916;
	@%p19 bra 	BB0_60;

	cvt.rn.f32.s32	%f391, %r1;
	rcp.rn.f32 	%f46, %f391;
	mul.f32 	%f47, %f10, 0f3456BF95;
	mul.f32 	%f48, %f11, 0f3456BF95;
	mul.f32 	%f49, %f12, 0f3456BF95;
	mul.f32 	%f392, %f894, %f14;
	mul.f32 	%f393, %f893, %f15;
	sub.f32 	%f50, %f392, %f393;
	mul.f32 	%f394, %f892, %f15;
	mul.f32 	%f395, %f894, %f13;
	sub.f32 	%f51, %f394, %f395;
	mul.f32 	%f396, %f893, %f13;
	mul.f32 	%f397, %f892, %f14;
	sub.f32 	%f52, %f396, %f397;
	mov.f32 	%f916, 0f00000000;
	mov.u32 	%r151, 0;
	abs.f32 	%f398, %f48;
	abs.f32 	%f399, %f47;
	max.f32 	%f400, %f399, %f398;
	abs.f32 	%f401, %f49;
	max.f32 	%f402, %f400, %f401;
	mov.u32 	%r385, %r151;
	mov.f32 	%f917, %f916;
	mov.f32 	%f918, %f916;
	mov.f32 	%f919, %f916;
	mov.f32 	%f920, %f916;
	mov.f32 	%f921, %f916;
	mov.f32 	%f922, %f916;
	mov.f32 	%f923, %f916;
	mov.f32 	%f924, %f916;
	mov.f32 	%f925, %f916;
	mov.f32 	%f926, %f916;
	mov.f32 	%f927, %f916;

BB0_11:
	mov.u32 	%r387, %r151;

BB0_12:
	mov.u32 	%r15, %r388;
	cvt.rn.f32.s32	%f870, %r385;
	mad.lo.s32 	%r153, %r15, 1664525, 1013904223;
	and.b32  	%r154, %r153, 16777215;
	cvt.rn.f32.u32	%f404, %r154;
	fma.rn.f32 	%f405, %f404, 0f33800000, %f870;
	mul.f32 	%f79, %f46, %f405;
	mad.lo.s32 	%r16, %r153, 1664525, 1013904223;
	and.b32  	%r155, %r16, 16777215;
	cvt.rn.f32.u32	%f406, %r155;
	cvt.rn.f32.s32	%f407, %r387;
	fma.rn.f32 	%f408, %f406, 0f33800000, %f407;
	mul.f32 	%f409, %f46, %f408;
	mul.f32 	%f410, %f79, %f79;
	mov.f32 	%f411, 0f3F800000;
	sub.f32 	%f412, %f411, %f410;
	mov.f32 	%f413, 0f00000000;
	max.f32 	%f414, %f413, %f412;
	sqrt.rn.f32 	%f80, %f414;
	mul.f32 	%f934, %f409, 0f40C90FDB;
	abs.f32 	%f82, %f934;
	setp.neu.f32	%p20, %f82, 0f7F800000;
	mov.f32 	%f928, %f934;
	@%p20 bra 	BB0_14;

	mov.f32 	%f871, 0f00000000;
	mul.rn.f32 	%f928, %f934, %f871;

BB0_14:
	mul.f32 	%f416, %f928, 0f3F22F983;
	cvt.rni.s32.f32	%r398, %f416;
	cvt.rn.f32.s32	%f417, %r398;
	neg.f32 	%f418, %f417;
	mov.f32 	%f419, 0f3FC90FDA;
	fma.rn.f32 	%f420, %f418, %f419, %f928;
	mov.f32 	%f421, 0f33A22168;
	fma.rn.f32 	%f422, %f418, %f421, %f420;
	mov.f32 	%f423, 0f27C234C5;
	fma.rn.f32 	%f929, %f418, %f423, %f422;
	abs.f32 	%f424, %f928;
	setp.leu.f32	%p21, %f424, 0f47CE4780;
	@%p21 bra 	BB0_25;

	add.u64 	%rd72, %SP, 12;
	cvta.to.local.u64 	%rd273, %rd72;
	mov.b32 	 %r18, %f928;
	shl.b32 	%r158, %r18, 8;
	or.b32  	%r20, %r158, -2147483648;
	mov.u32 	%r389, 0;
	mov.u64 	%rd274, 0;
	mov.u32 	%r390, %r389;

BB0_16:
	.pragma "nounroll";
	add.u64 	%rd267, %SP, 12;
	cvta.to.local.u64 	%rd266, %rd267;
	shl.b64 	%rd73, %rd274, 2;
	mov.u64 	%rd74, __cudart_i2opi_f;
	add.s64 	%rd75, %rd74, %rd73;
	ld.const.u32 	%r161, [%rd75];
	// inline asm
	{
	mad.lo.cc.u32   %r159, %r161, %r20, %r390;
	madc.hi.u32     %r390, %r161, %r20,  0;
	}
	// inline asm
	st.local.u32 	[%rd273], %r159;
	add.s32 	%r389, %r389, 1;
	cvt.s64.s32	%rd274, %r389;
	mul.wide.s32 	%rd78, %r389, 4;
	add.s64 	%rd273, %rd266, %rd78;
	setp.ne.s32	%p22, %r389, 6;
	@%p22 bra 	BB0_16;

	mov.b32 	 %r365, %f928;
	shr.u32 	%r364, %r365, 23;
	add.u64 	%rd268, %SP, 12;
	and.b32  	%r164, %r364, 255;
	add.s32 	%r165, %r164, -128;
	shr.u32 	%r166, %r165, 5;
	cvta.to.local.u64 	%rd80, %rd268;
	st.local.u32 	[%rd80+24], %r390;
	mov.u32 	%r167, 6;
	sub.s32 	%r168, %r167, %r166;
	mul.wide.s32 	%rd81, %r168, 4;
	add.s64 	%rd10, %rd80, %rd81;
	ld.local.u32 	%r391, [%rd10];
	ld.local.u32 	%r392, [%rd10+-4];
	and.b32  	%r28, %r364, 31;
	setp.eq.s32	%p23, %r28, 0;
	@%p23 bra 	BB0_19;

	mov.u32 	%r169, 32;
	sub.s32 	%r170, %r169, %r28;
	shr.u32 	%r171, %r392, %r170;
	shl.b32 	%r172, %r391, %r28;
	add.s32 	%r391, %r171, %r172;
	ld.local.u32 	%r173, [%rd10+-8];
	shr.u32 	%r174, %r173, %r170;
	shl.b32 	%r175, %r392, %r28;
	add.s32 	%r392, %r174, %r175;

BB0_19:
	mov.b32 	 %r368, %f928;
	and.b32  	%r394, %r368, -2147483648;
	shr.u32 	%r176, %r392, 30;
	shl.b32 	%r177, %r391, 2;
	add.s32 	%r393, %r176, %r177;
	shl.b32 	%r34, %r392, 2;
	shr.u32 	%r178, %r393, 31;
	shr.u32 	%r179, %r391, 30;
	add.s32 	%r35, %r178, %r179;
	setp.eq.s32	%p24, %r178, 0;
	@%p24 bra 	BB0_20;
	bra.uni 	BB0_21;

BB0_20:
	mov.u32 	%r395, %r34;
	bra.uni 	BB0_22;

BB0_21:
	mov.b32 	 %r370, %f928;
	and.b32  	%r369, %r370, -2147483648;
	not.b32 	%r180, %r393;
	neg.s32 	%r395, %r34;
	setp.eq.s32	%p25, %r34, 0;
	selp.u32	%r181, 1, 0, %p25;
	add.s32 	%r393, %r181, %r180;
	xor.b32  	%r394, %r369, -2147483648;

BB0_22:
	mov.b32 	 %r372, %f928;
	and.b32  	%r371, %r372, -2147483648;
	clz.b32 	%r397, %r393;
	setp.eq.s32	%p26, %r397, 0;
	shl.b32 	%r182, %r393, %r397;
	mov.u32 	%r183, 32;
	sub.s32 	%r184, %r183, %r397;
	shr.u32 	%r185, %r395, %r184;
	add.s32 	%r186, %r185, %r182;
	selp.b32	%r43, %r393, %r186, %p26;
	mov.u32 	%r187, -921707870;
	mul.hi.u32 	%r396, %r43, %r187;
	setp.eq.s32	%p27, %r371, 0;
	neg.s32 	%r188, %r35;
	selp.b32	%r398, %r35, %r188, %p27;
	setp.lt.s32	%p28, %r396, 1;
	@%p28 bra 	BB0_24;

	mul.lo.s32 	%r189, %r43, -921707870;
	shr.u32 	%r190, %r189, 31;
	shl.b32 	%r191, %r396, 1;
	add.s32 	%r396, %r190, %r191;
	add.s32 	%r397, %r397, 1;

BB0_24:
	mov.u32 	%r192, 126;
	sub.s32 	%r193, %r192, %r397;
	shl.b32 	%r194, %r193, 23;
	add.s32 	%r195, %r396, 1;
	shr.u32 	%r196, %r195, 7;
	add.s32 	%r197, %r196, 1;
	shr.u32 	%r198, %r197, 1;
	add.s32 	%r199, %r198, %r194;
	or.b32  	%r200, %r199, %r394;
	mov.b32 	 %f929, %r200;

BB0_25:
	add.s32 	%r51, %r398, 1;
	and.b32  	%r52, %r51, 1;
	setp.eq.s32	%p29, %r52, 0;
	@%p29 bra 	BB0_27;
	bra.uni 	BB0_26;

BB0_27:
	mul.rn.f32 	%f879, %f929, %f929;
	mov.f32 	%f427, 0f3C08839E;
	mov.f32 	%f428, 0fB94CA1F9;
	fma.rn.f32 	%f930, %f428, %f879, %f427;
	bra.uni 	BB0_28;

BB0_26:
	mul.rn.f32 	%f875, %f929, %f929;
	mov.f32 	%f425, 0fBAB6061A;
	mov.f32 	%f426, 0f37CCF5CE;
	fma.rn.f32 	%f930, %f426, %f875, %f425;

BB0_28:
	@%p29 bra 	BB0_30;
	bra.uni 	BB0_29;

BB0_30:
	mul.rn.f32 	%f878, %f929, %f929;
	mov.f32 	%f874, 0f00000000;
	mov.f32 	%f432, 0fBE2AAAA3;
	fma.rn.f32 	%f433, %f930, %f878, %f432;
	fma.rn.f32 	%f931, %f433, %f878, %f874;
	bra.uni 	BB0_31;

BB0_29:
	mul.rn.f32 	%f876, %f929, %f929;
	mov.f32 	%f429, 0f3D2AAAA5;
	fma.rn.f32 	%f430, %f930, %f876, %f429;
	mov.f32 	%f431, 0fBF000000;
	fma.rn.f32 	%f931, %f430, %f876, %f431;

BB0_31:
	fma.rn.f32 	%f932, %f931, %f929, %f929;
	@%p29 bra 	BB0_33;

	mul.rn.f32 	%f877, %f929, %f929;
	mov.f32 	%f861, 0f3F800000;
	fma.rn.f32 	%f932, %f931, %f877, %f861;

BB0_33:
	add.s32 	%r373, %r398, 1;
	and.b32  	%r201, %r373, 2;
	setp.eq.s32	%p32, %r201, 0;
	@%p32 bra 	BB0_35;

	mov.f32 	%f862, 0f00000000;
	mov.f32 	%f437, 0fBF800000;
	fma.rn.f32 	%f932, %f932, %f437, %f862;

BB0_35:
	abs.f32 	%f863, %f934;
	setp.neu.f32	%p115, %f863, 0f7F800000;
	@%p115 bra 	BB0_37;

	mov.f32 	%f873, 0f00000000;
	mul.rn.f32 	%f934, %f934, %f873;

BB0_37:
	mov.f32 	%f866, 0f27C234C5;
	mov.f32 	%f865, 0f33A22168;
	mov.f32 	%f864, 0f3FC90FDA;
	mul.f32 	%f439, %f934, 0f3F22F983;
	cvt.rni.s32.f32	%r408, %f439;
	cvt.rn.f32.s32	%f440, %r408;
	neg.f32 	%f441, %f440;
	fma.rn.f32 	%f443, %f441, %f864, %f934;
	fma.rn.f32 	%f445, %f441, %f865, %f443;
	fma.rn.f32 	%f935, %f441, %f866, %f445;
	abs.f32 	%f447, %f934;
	setp.leu.f32	%p34, %f447, 0f47CE4780;
	@%p34 bra 	BB0_48;

	mov.u64 	%rd276, 0;
	add.u64 	%rd83, %SP, 12;
	cvta.to.local.u64 	%rd275, %rd83;
	mov.b32 	 %r54, %f934;
	shl.b32 	%r204, %r54, 8;
	or.b32  	%r56, %r204, -2147483648;
	mov.u32 	%r399, 0;
	mov.u32 	%r400, %r399;

BB0_39:
	.pragma "nounroll";
	add.u64 	%rd270, %SP, 12;
	cvta.to.local.u64 	%rd269, %rd270;
	shl.b64 	%rd84, %rd276, 2;
	mov.u64 	%rd85, __cudart_i2opi_f;
	add.s64 	%rd86, %rd85, %rd84;
	ld.const.u32 	%r207, [%rd86];
	// inline asm
	{
	mad.lo.cc.u32   %r205, %r207, %r56, %r400;
	madc.hi.u32     %r400, %r207, %r56,  0;
	}
	// inline asm
	st.local.u32 	[%rd275], %r205;
	add.s32 	%r399, %r399, 1;
	cvt.s64.s32	%rd276, %r399;
	mul.wide.s32 	%rd87, %r399, 4;
	add.s64 	%rd275, %rd269, %rd87;
	setp.ne.s32	%p35, %r399, 6;
	@%p35 bra 	BB0_39;

	mov.b32 	 %r375, %f934;
	shr.u32 	%r374, %r375, 23;
	add.u64 	%rd271, %SP, 12;
	and.b32  	%r210, %r374, 255;
	add.s32 	%r211, %r210, -128;
	shr.u32 	%r212, %r211, 5;
	cvta.to.local.u64 	%rd89, %rd271;
	st.local.u32 	[%rd89+24], %r400;
	mov.u32 	%r213, 6;
	sub.s32 	%r214, %r213, %r212;
	mul.wide.s32 	%rd90, %r214, 4;
	add.s64 	%rd17, %rd89, %rd90;
	ld.local.u32 	%r401, [%rd17];
	ld.local.u32 	%r402, [%rd17+-4];
	and.b32  	%r64, %r374, 31;
	setp.eq.s32	%p36, %r64, 0;
	@%p36 bra 	BB0_42;

	mov.u32 	%r215, 32;
	sub.s32 	%r216, %r215, %r64;
	shr.u32 	%r217, %r402, %r216;
	shl.b32 	%r218, %r401, %r64;
	add.s32 	%r401, %r217, %r218;
	ld.local.u32 	%r219, [%rd17+-8];
	shr.u32 	%r220, %r219, %r216;
	shl.b32 	%r221, %r402, %r64;
	add.s32 	%r402, %r220, %r221;

BB0_42:
	mov.b32 	 %r378, %f934;
	and.b32  	%r404, %r378, -2147483648;
	shr.u32 	%r222, %r402, 30;
	shl.b32 	%r223, %r401, 2;
	add.s32 	%r403, %r222, %r223;
	shl.b32 	%r70, %r402, 2;
	shr.u32 	%r224, %r403, 31;
	shr.u32 	%r225, %r401, 30;
	add.s32 	%r71, %r224, %r225;
	setp.eq.s32	%p37, %r224, 0;
	@%p37 bra 	BB0_43;
	bra.uni 	BB0_44;

BB0_43:
	mov.u32 	%r405, %r70;
	bra.uni 	BB0_45;

BB0_44:
	mov.b32 	 %r380, %f934;
	and.b32  	%r379, %r380, -2147483648;
	not.b32 	%r226, %r403;
	neg.s32 	%r405, %r70;
	setp.eq.s32	%p38, %r70, 0;
	selp.u32	%r227, 1, 0, %p38;
	add.s32 	%r403, %r227, %r226;
	xor.b32  	%r404, %r379, -2147483648;

BB0_45:
	mov.b32 	 %r382, %f934;
	and.b32  	%r381, %r382, -2147483648;
	clz.b32 	%r407, %r403;
	setp.eq.s32	%p39, %r407, 0;
	shl.b32 	%r228, %r403, %r407;
	mov.u32 	%r229, 32;
	sub.s32 	%r230, %r229, %r407;
	shr.u32 	%r231, %r405, %r230;
	add.s32 	%r232, %r231, %r228;
	selp.b32	%r79, %r403, %r232, %p39;
	mov.u32 	%r233, -921707870;
	mul.hi.u32 	%r406, %r79, %r233;
	setp.eq.s32	%p40, %r381, 0;
	neg.s32 	%r234, %r71;
	selp.b32	%r408, %r71, %r234, %p40;
	setp.lt.s32	%p41, %r406, 1;
	@%p41 bra 	BB0_47;

	mul.lo.s32 	%r235, %r79, -921707870;
	shr.u32 	%r236, %r235, 31;
	shl.b32 	%r237, %r406, 1;
	add.s32 	%r406, %r236, %r237;
	add.s32 	%r407, %r407, 1;

BB0_47:
	mov.u32 	%r238, 126;
	sub.s32 	%r239, %r238, %r407;
	shl.b32 	%r240, %r239, 23;
	add.s32 	%r241, %r406, 1;
	shr.u32 	%r242, %r241, 7;
	add.s32 	%r243, %r242, 1;
	shr.u32 	%r244, %r243, 1;
	add.s32 	%r245, %r244, %r240;
	or.b32  	%r246, %r245, %r404;
	mov.b32 	 %f935, %r246;

BB0_48:
	and.b32  	%r87, %r408, 1;
	setp.eq.s32	%p42, %r87, 0;
	@%p42 bra 	BB0_50;
	bra.uni 	BB0_49;

BB0_50:
	mul.rn.f32 	%f891, %f935, %f935;
	mov.f32 	%f450, 0f3C08839E;
	mov.f32 	%f451, 0fB94CA1F9;
	fma.rn.f32 	%f936, %f451, %f891, %f450;
	bra.uni 	BB0_51;

BB0_49:
	mul.rn.f32 	%f888, %f935, %f935;
	mov.f32 	%f448, 0fBAB6061A;
	mov.f32 	%f449, 0f37CCF5CE;
	fma.rn.f32 	%f936, %f449, %f888, %f448;

BB0_51:
	@%p42 bra 	BB0_53;
	bra.uni 	BB0_52;

BB0_53:
	mul.rn.f32 	%f890, %f935, %f935;
	mov.f32 	%f872, 0f00000000;
	mov.f32 	%f455, 0fBE2AAAA3;
	fma.rn.f32 	%f456, %f936, %f890, %f455;
	fma.rn.f32 	%f937, %f456, %f890, %f872;
	bra.uni 	BB0_54;

BB0_52:
	mul.rn.f32 	%f889, %f935, %f935;
	mov.f32 	%f452, 0f3D2AAAA5;
	fma.rn.f32 	%f453, %f936, %f889, %f452;
	mov.f32 	%f454, 0fBF000000;
	fma.rn.f32 	%f937, %f453, %f889, %f454;

BB0_54:
	fma.rn.f32 	%f938, %f937, %f935, %f935;
	@%p42 bra 	BB0_56;

	mul.rn.f32 	%f880, %f935, %f935;
	mov.f32 	%f867, 0f3F800000;
	fma.rn.f32 	%f938, %f937, %f880, %f867;

BB0_56:
	and.b32  	%r247, %r408, 2;
	setp.eq.s32	%p45, %r247, 0;
	@%p45 bra 	BB0_58;

	mov.f32 	%f868, 0f00000000;
	mov.f32 	%f460, 0fBF800000;
	fma.rn.f32 	%f938, %f938, %f460, %f868;

BB0_58:
	mad.lo.s32 	%r361, %r15, 1664525, 1013904223;
	mad.lo.s32 	%r388, %r361, 1664525, 1013904223;
	max.f32 	%f869, %f402, %f248;
	mul.f32 	%f469, %f80, %f932;
	add.u64 	%rd91, %SP, 0;
	cvta.to.local.u64 	%rd92, %rd91;
	mul.f32 	%f470, %f80, %f938;
	mul.f32 	%f471, %f13, %f470;
	mul.f32 	%f472, %f14, %f470;
	mul.f32 	%f473, %f15, %f470;
	fma.rn.f32 	%f474, %f50, %f469, %f471;
	fma.rn.f32 	%f475, %f51, %f469, %f472;
	fma.rn.f32 	%f476, %f52, %f469, %f473;
	fma.rn.f32 	%f464, %f892, %f79, %f474;
	fma.rn.f32 	%f465, %f893, %f79, %f475;
	fma.rn.f32 	%f466, %f894, %f79, %f476;
	mov.u32 	%r249, 0;
	st.local.u32 	[%rd92+8], %r249;
	st.local.u32 	[%rd92+4], %r249;
	st.local.u32 	[%rd92], %r249;
	ld.global.u32 	%r248, [root];
	mov.f32 	%f468, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r248, %f10, %f11, %f12, %f464, %f465, %f466, %r249, %f869, %f468, %rd91, %r118);
	// inline asm
	mul.f32 	%f477, %f25, %f465;
	fma.rn.f32 	%f478, %f23, %f464, %f477;
	fma.rn.f32 	%f479, %f27, %f466, %f478;
	cvt.sat.f32.f32	%f480, %f479;
	ld.local.f32 	%f481, [%rd92+8];
	ld.local.f32 	%f482, [%rd92+4];
	ld.local.f32 	%f483, [%rd92];
	fma.rn.f32 	%f921, %f483, %f480, %f921;
	fma.rn.f32 	%f920, %f482, %f480, %f920;
	fma.rn.f32 	%f919, %f481, %f480, %f919;
	mul.f32 	%f484, %f35, %f465;
	fma.rn.f32 	%f485, %f34, %f464, %f484;
	fma.rn.f32 	%f486, %f36, %f466, %f485;
	cvt.sat.f32.f32	%f487, %f486;
	fma.rn.f32 	%f924, %f483, %f487, %f924;
	fma.rn.f32 	%f923, %f482, %f487, %f923;
	fma.rn.f32 	%f922, %f481, %f487, %f922;
	mul.f32 	%f488, %f44, %f465;
	fma.rn.f32 	%f489, %f43, %f464, %f488;
	fma.rn.f32 	%f490, %f45, %f466, %f489;
	cvt.sat.f32.f32	%f491, %f490;
	fma.rn.f32 	%f927, %f483, %f491, %f927;
	fma.rn.f32 	%f926, %f482, %f491, %f926;
	fma.rn.f32 	%f925, %f481, %f491, %f925;
	mul.f32 	%f492, %f893, %f465;
	fma.rn.f32 	%f493, %f892, %f464, %f492;
	fma.rn.f32 	%f494, %f894, %f466, %f493;
	cvt.sat.f32.f32	%f495, %f494;
	fma.rn.f32 	%f918, %f483, %f495, %f918;
	fma.rn.f32 	%f917, %f482, %f495, %f917;
	fma.rn.f32 	%f916, %f481, %f495, %f916;
	add.s32 	%r387, %r387, 1;
	setp.lt.s32	%p46, %r387, %r1;
	@%p46 bra 	BB0_12;

	mad.lo.s32 	%r363, %r15, 1664525, 1013904223;
	mad.lo.s32 	%r388, %r363, 1664525, 1013904223;
	add.s32 	%r385, %r385, 1;
	setp.lt.s32	%p47, %r385, %r1;
	@%p47 bra 	BB0_11;

BB0_60:
	mul.lo.s32 	%r251, %r1, %r1;
	cvt.rn.f32.s32	%f496, %r251;
	rcp.rn.f32 	%f497, %f496;
	cvt.rn.f32.u32	%f498, %r4;
	cvt.rn.f32.u32	%f499, %r3;
	tex.2d.v4.f32.f32	{%f500, %f501, %f502, %f503}, [albedoTex, {%f499, %f498}];
	mul.f32 	%f141, %f921, %f497;
	mul.f32 	%f142, %f920, %f497;
	mul.f32 	%f143, %f919, %f497;
	mul.f32 	%f144, %f924, %f497;
	mul.f32 	%f145, %f923, %f497;
	mul.f32 	%f146, %f922, %f497;
	mul.f32 	%f147, %f927, %f497;
	mul.f32 	%f148, %f926, %f497;
	mul.f32 	%f149, %f925, %f497;
	mul.f32 	%f504, %f918, %f497;
	mul.f32 	%f505, %f917, %f497;
	mul.f32 	%f506, %f916, %f497;
	fma.rn.f32 	%f150, %f918, %f497, %f504;
	fma.rn.f32 	%f151, %f917, %f497, %f505;
	fma.rn.f32 	%f152, %f916, %f497, %f506;
	mul.f32 	%f153, %f150, %f500;
	mul.f32 	%f154, %f151, %f501;
	mul.f32 	%f155, %f152, %f502;
	add.f32 	%f156, %f227, %f153;
	add.f32 	%f157, %f228, %f154;
	add.f32 	%f158, %f229, %f155;
	abs.f32 	%f507, %f156;
	setp.gtu.f32	%p49, %f507, 0f7F800000;
	mov.pred 	%p116, -1;
	@%p49 bra 	BB0_63;

	abs.f32 	%f508, %f157;
	setp.gtu.f32	%p51, %f508, 0f7F800000;
	@%p51 bra 	BB0_63;

	abs.f32 	%f509, %f158;
	setp.gtu.f32	%p116, %f509, 0f7F800000;

BB0_63:
	selp.f32	%f159, 0f00000000, %f156, %p116;
	selp.f32	%f160, 0f00000000, %f157, %p116;
	selp.f32	%f161, 0f00000000, %f158, %p116;
	ld.global.u32 	%r410, [imageEnabled];
	and.b32  	%r252, %r410, 1;
	setp.eq.b32	%p52, %r252, 1;
	@!%p52 bra 	BB0_98;
	bra.uni 	BB0_64;

BB0_64:
	abs.f32 	%f163, %f159;
	setp.lt.f32	%p53, %f163, 0f00800000;
	mul.f32 	%f515, %f163, 0f4B800000;
	selp.f32	%f516, 0fC3170000, 0fC2FE0000, %p53;
	selp.f32	%f517, %f515, %f163, %p53;
	mov.b32 	 %r253, %f517;
	and.b32  	%r254, %r253, 8388607;
	or.b32  	%r255, %r254, 1065353216;
	mov.b32 	 %f518, %r255;
	shr.u32 	%r256, %r253, 23;
	cvt.rn.f32.u32	%f519, %r256;
	add.f32 	%f520, %f516, %f519;
	setp.gt.f32	%p54, %f518, 0f3FB504F3;
	mul.f32 	%f521, %f518, 0f3F000000;
	add.f32 	%f522, %f520, 0f3F800000;
	selp.f32	%f523, %f521, %f518, %p54;
	selp.f32	%f524, %f522, %f520, %p54;
	add.f32 	%f525, %f523, 0fBF800000;
	add.f32 	%f511, %f523, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f510,%f511;
	// inline asm
	add.f32 	%f526, %f525, %f525;
	mul.f32 	%f527, %f510, %f526;
	mul.f32 	%f528, %f527, %f527;
	mov.f32 	%f529, 0f3C4CAF63;
	mov.f32 	%f530, 0f3B18F0FE;
	fma.rn.f32 	%f531, %f530, %f528, %f529;
	mov.f32 	%f532, 0f3DAAAABD;
	fma.rn.f32 	%f533, %f531, %f528, %f532;
	mul.rn.f32 	%f534, %f533, %f528;
	mul.rn.f32 	%f535, %f534, %f527;
	sub.f32 	%f536, %f525, %f527;
	neg.f32 	%f537, %f527;
	add.f32 	%f538, %f536, %f536;
	fma.rn.f32 	%f539, %f537, %f525, %f538;
	mul.rn.f32 	%f540, %f510, %f539;
	add.f32 	%f541, %f535, %f527;
	sub.f32 	%f542, %f527, %f541;
	add.f32 	%f543, %f535, %f542;
	add.f32 	%f544, %f540, %f543;
	add.f32 	%f545, %f541, %f544;
	sub.f32 	%f546, %f541, %f545;
	add.f32 	%f547, %f544, %f546;
	mov.f32 	%f548, 0f3F317200;
	mul.rn.f32 	%f549, %f524, %f548;
	mov.f32 	%f550, 0f35BFBE8E;
	mul.rn.f32 	%f551, %f524, %f550;
	add.f32 	%f552, %f549, %f545;
	sub.f32 	%f553, %f549, %f552;
	add.f32 	%f554, %f545, %f553;
	add.f32 	%f555, %f547, %f554;
	add.f32 	%f556, %f551, %f555;
	add.f32 	%f557, %f552, %f556;
	sub.f32 	%f558, %f552, %f557;
	add.f32 	%f559, %f556, %f558;
	mov.f32 	%f560, 0f3EE66666;
	mul.rn.f32 	%f561, %f560, %f557;
	neg.f32 	%f562, %f561;
	fma.rn.f32 	%f563, %f560, %f557, %f562;
	fma.rn.f32 	%f564, %f560, %f559, %f563;
	mov.f32 	%f565, 0f00000000;
	fma.rn.f32 	%f566, %f565, %f557, %f564;
	add.rn.f32 	%f567, %f561, %f566;
	neg.f32 	%f568, %f567;
	add.rn.f32 	%f569, %f561, %f568;
	add.rn.f32 	%f570, %f569, %f566;
	mov.b32 	 %r257, %f567;
	setp.eq.s32	%p55, %r257, 1118925336;
	add.s32 	%r258, %r257, -1;
	mov.b32 	 %f571, %r258;
	add.f32 	%f572, %f570, 0f37000000;
	selp.f32	%f573, %f571, %f567, %p55;
	selp.f32	%f164, %f572, %f570, %p55;
	mul.f32 	%f574, %f573, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f575, %f574;
	mov.f32 	%f576, 0fBF317200;
	fma.rn.f32 	%f577, %f575, %f576, %f573;
	mov.f32 	%f578, 0fB5BFBE8E;
	fma.rn.f32 	%f579, %f575, %f578, %f577;
	mul.f32 	%f580, %f579, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f581, %f580;
	add.f32 	%f582, %f575, 0f00000000;
	ex2.approx.f32 	%f583, %f582;
	mul.f32 	%f584, %f581, %f583;
	setp.lt.f32	%p56, %f573, 0fC2D20000;
	selp.f32	%f585, 0f00000000, %f584, %p56;
	setp.gt.f32	%p57, %f573, 0f42D20000;
	selp.f32	%f952, 0f7F800000, %f585, %p57;
	setp.eq.f32	%p58, %f952, 0f7F800000;
	@%p58 bra 	BB0_66;

	fma.rn.f32 	%f952, %f952, %f164, %f952;

BB0_66:
	mov.f32 	%f833, 0f3E666666;
	cvt.rzi.f32.f32	%f832, %f833;
	fma.rn.f32 	%f831, %f832, 0fC0000000, 0f3EE66666;
	abs.f32 	%f830, %f831;
	setp.lt.f32	%p59, %f159, 0f00000000;
	setp.eq.f32	%p60, %f830, 0f3F800000;
	and.pred  	%p3, %p59, %p60;
	mov.b32 	 %r259, %f952;
	xor.b32  	%r260, %r259, -2147483648;
	mov.b32 	 %f586, %r260;
	selp.f32	%f954, %f586, %f952, %p3;
	setp.eq.f32	%p61, %f159, 0f00000000;
	@%p61 bra 	BB0_69;
	bra.uni 	BB0_67;

BB0_69:
	add.f32 	%f589, %f159, %f159;
	selp.f32	%f954, %f589, 0f00000000, %p60;
	bra.uni 	BB0_70;

BB0_119:
	mov.u64 	%rd215, image_RNM0;
	cvta.global.u64 	%rd210, %rd215;
	mov.u32 	%r327, 8;
	mov.u64 	%rd214, 0;
	// inline asm
	call (%rd209), _rt_buffer_get_64, (%rd210, %r100, %r327, %rd20, %rd21, %rd214, %rd214);
	// inline asm
	mov.f32 	%f815, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs116, %f815;}

	// inline asm
	mov.u16 	%rs117, 0;
	st.v4.u16 	[%rd209], {%rs116, %rs116, %rs116, %rs117};

BB0_120:
	ld.global.u32 	%r328, [additive];
	setp.eq.s32	%p113, %r328, 0;
	@%p113 bra 	BB0_122;

	mov.u64 	%rd228, image_RNM1;
	cvta.global.u64 	%rd217, %rd228;
	mov.u32 	%r332, 8;
	mov.u64 	%rd227, 0;
	// inline asm
	call (%rd216), _rt_buffer_get_64, (%rd217, %r100, %r332, %rd20, %rd21, %rd227, %rd227);
	// inline asm
	ld.v4.u16 	{%rs124, %rs125, %rs126, %rs127}, [%rd216];
	// inline asm
	{  cvt.f32.f16 %f816, %rs124;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f817, %rs125;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f818, %rs126;}

	// inline asm
	// inline asm
	call (%rd222), _rt_buffer_get_64, (%rd217, %r100, %r332, %rd20, %rd21, %rd227, %rd227);
	// inline asm
	add.f32 	%f819, %f816, 0f00000000;
	add.f32 	%f820, %f817, 0f00000000;
	add.f32 	%f821, %f818, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs123, %f821;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs122, %f820;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs121, %f819;}

	// inline asm
	mov.u16 	%rs128, 0;
	st.v4.u16 	[%rd222], {%rs121, %rs122, %rs123, %rs128};
	bra.uni 	BB0_123;

BB0_122:
	mov.u64 	%rd235, image_RNM1;
	cvta.global.u64 	%rd230, %rd235;
	mov.u32 	%r334, 8;
	mov.u64 	%rd234, 0;
	// inline asm
	call (%rd229), _rt_buffer_get_64, (%rd230, %r100, %r334, %rd20, %rd21, %rd234, %rd234);
	// inline asm
	mov.f32 	%f822, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs129, %f822;}

	// inline asm
	mov.u16 	%rs130, 0;
	st.v4.u16 	[%rd229], {%rs129, %rs129, %rs129, %rs130};

BB0_123:
	ld.global.u32 	%r335, [additive];
	setp.eq.s32	%p114, %r335, 0;
	@%p114 bra 	BB0_125;

	mov.u64 	%rd248, image_RNM2;
	cvta.global.u64 	%rd237, %rd248;
	mov.u32 	%r339, 8;
	mov.u64 	%rd247, 0;
	// inline asm
	call (%rd236), _rt_buffer_get_64, (%rd237, %r100, %r339, %rd20, %rd21, %rd247, %rd247);
	// inline asm
	ld.v4.u16 	{%rs137, %rs138, %rs139, %rs140}, [%rd236];
	// inline asm
	{  cvt.f32.f16 %f823, %rs137;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f824, %rs138;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f825, %rs139;}

	// inline asm
	// inline asm
	call (%rd242), _rt_buffer_get_64, (%rd237, %r100, %r339, %rd20, %rd21, %rd247, %rd247);
	// inline asm
	add.f32 	%f826, %f823, 0f00000000;
	add.f32 	%f827, %f824, 0f00000000;
	add.f32 	%f828, %f825, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs136, %f828;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs135, %f827;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs134, %f826;}

	// inline asm
	mov.u16 	%rs141, 0;
	st.v4.u16 	[%rd242], {%rs134, %rs135, %rs136, %rs141};
	bra.uni 	BB0_126;

BB0_125:
	mov.u64 	%rd255, image_RNM2;
	cvta.global.u64 	%rd250, %rd255;
	mov.u32 	%r341, 8;
	mov.u64 	%rd254, 0;
	// inline asm
	call (%rd249), _rt_buffer_get_64, (%rd250, %r100, %r341, %rd20, %rd21, %rd254, %rd254);
	// inline asm
	mov.f32 	%f829, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs142, %f829;}

	// inline asm
	mov.u16 	%rs143, 0;
	st.v4.u16 	[%rd249], {%rs142, %rs142, %rs142, %rs143};
	bra.uni 	BB0_126;

BB0_67:
	setp.geu.f32	%p62, %f159, 0f00000000;
	@%p62 bra 	BB0_70;

	mov.f32 	%f857, 0f3EE66666;
	cvt.rzi.f32.f32	%f588, %f857;
	setp.neu.f32	%p63, %f588, 0f3EE66666;
	selp.f32	%f954, 0f7FFFFFFF, %f954, %p63;

BB0_70:
	abs.f32 	%f834, %f159;
	add.f32 	%f590, %f834, 0f3EE66666;
	mov.b32 	 %r261, %f590;
	setp.lt.s32	%p65, %r261, 2139095040;
	@%p65 bra 	BB0_75;

	abs.f32 	%f855, %f159;
	setp.gtu.f32	%p66, %f855, 0f7F800000;
	@%p66 bra 	BB0_74;
	bra.uni 	BB0_72;

BB0_74:
	add.f32 	%f954, %f159, 0f3EE66666;
	bra.uni 	BB0_75;

BB0_72:
	abs.f32 	%f856, %f159;
	setp.neu.f32	%p67, %f856, 0f7F800000;
	@%p67 bra 	BB0_75;

	selp.f32	%f954, 0fFF800000, 0f7F800000, %p3;

BB0_75:
	mov.f32 	%f843, 0fB5BFBE8E;
	mov.f32 	%f842, 0fBF317200;
	mov.f32 	%f841, 0f00000000;
	mov.f32 	%f840, 0f35BFBE8E;
	mov.f32 	%f839, 0f3F317200;
	mov.f32 	%f838, 0f3DAAAABD;
	mov.f32 	%f837, 0f3C4CAF63;
	mov.f32 	%f836, 0f3B18F0FE;
	mov.f32 	%f835, 0f3EE66666;
	setp.eq.f32	%p68, %f159, 0f3F800000;
	selp.f32	%f175, 0f3F800000, %f954, %p68;
	abs.f32 	%f176, %f160;
	setp.lt.f32	%p69, %f176, 0f00800000;
	mul.f32 	%f593, %f176, 0f4B800000;
	selp.f32	%f594, 0fC3170000, 0fC2FE0000, %p69;
	selp.f32	%f595, %f593, %f176, %p69;
	mov.b32 	 %r262, %f595;
	and.b32  	%r263, %r262, 8388607;
	or.b32  	%r264, %r263, 1065353216;
	mov.b32 	 %f596, %r264;
	shr.u32 	%r265, %r262, 23;
	cvt.rn.f32.u32	%f597, %r265;
	add.f32 	%f598, %f594, %f597;
	setp.gt.f32	%p70, %f596, 0f3FB504F3;
	mul.f32 	%f599, %f596, 0f3F000000;
	add.f32 	%f600, %f598, 0f3F800000;
	selp.f32	%f601, %f599, %f596, %p70;
	selp.f32	%f602, %f600, %f598, %p70;
	add.f32 	%f603, %f601, 0fBF800000;
	add.f32 	%f592, %f601, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f591,%f592;
	// inline asm
	add.f32 	%f604, %f603, %f603;
	mul.f32 	%f605, %f591, %f604;
	mul.f32 	%f606, %f605, %f605;
	fma.rn.f32 	%f609, %f836, %f606, %f837;
	fma.rn.f32 	%f611, %f609, %f606, %f838;
	mul.rn.f32 	%f612, %f611, %f606;
	mul.rn.f32 	%f613, %f612, %f605;
	sub.f32 	%f614, %f603, %f605;
	neg.f32 	%f615, %f605;
	add.f32 	%f616, %f614, %f614;
	fma.rn.f32 	%f617, %f615, %f603, %f616;
	mul.rn.f32 	%f618, %f591, %f617;
	add.f32 	%f619, %f613, %f605;
	sub.f32 	%f620, %f605, %f619;
	add.f32 	%f621, %f613, %f620;
	add.f32 	%f622, %f618, %f621;
	add.f32 	%f623, %f619, %f622;
	sub.f32 	%f624, %f619, %f623;
	add.f32 	%f625, %f622, %f624;
	mul.rn.f32 	%f627, %f602, %f839;
	mul.rn.f32 	%f629, %f602, %f840;
	add.f32 	%f630, %f627, %f623;
	sub.f32 	%f631, %f627, %f630;
	add.f32 	%f632, %f623, %f631;
	add.f32 	%f633, %f625, %f632;
	add.f32 	%f634, %f629, %f633;
	add.f32 	%f635, %f630, %f634;
	sub.f32 	%f636, %f630, %f635;
	add.f32 	%f637, %f634, %f636;
	mul.rn.f32 	%f639, %f835, %f635;
	neg.f32 	%f640, %f639;
	fma.rn.f32 	%f641, %f835, %f635, %f640;
	fma.rn.f32 	%f642, %f835, %f637, %f641;
	fma.rn.f32 	%f644, %f841, %f635, %f642;
	add.rn.f32 	%f645, %f639, %f644;
	neg.f32 	%f646, %f645;
	add.rn.f32 	%f647, %f639, %f646;
	add.rn.f32 	%f648, %f647, %f644;
	mov.b32 	 %r266, %f645;
	setp.eq.s32	%p71, %r266, 1118925336;
	add.s32 	%r267, %r266, -1;
	mov.b32 	 %f649, %r267;
	add.f32 	%f650, %f648, 0f37000000;
	selp.f32	%f651, %f649, %f645, %p71;
	selp.f32	%f177, %f650, %f648, %p71;
	mul.f32 	%f652, %f651, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f653, %f652;
	fma.rn.f32 	%f655, %f653, %f842, %f651;
	fma.rn.f32 	%f657, %f653, %f843, %f655;
	mul.f32 	%f658, %f657, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f659, %f658;
	add.f32 	%f660, %f653, 0f00000000;
	ex2.approx.f32 	%f661, %f660;
	mul.f32 	%f662, %f659, %f661;
	setp.lt.f32	%p72, %f651, 0fC2D20000;
	selp.f32	%f663, 0f00000000, %f662, %p72;
	setp.gt.f32	%p73, %f651, 0f42D20000;
	selp.f32	%f955, 0f7F800000, %f663, %p73;
	setp.eq.f32	%p74, %f955, 0f7F800000;
	@%p74 bra 	BB0_77;

	fma.rn.f32 	%f955, %f955, %f177, %f955;

BB0_77:
	setp.lt.f32	%p75, %f160, 0f00000000;
	and.pred  	%p4, %p75, %p60;
	mov.b32 	 %r268, %f955;
	xor.b32  	%r269, %r268, -2147483648;
	mov.b32 	 %f664, %r269;
	selp.f32	%f957, %f664, %f955, %p4;
	setp.eq.f32	%p77, %f160, 0f00000000;
	@%p77 bra 	BB0_80;
	bra.uni 	BB0_78;

BB0_80:
	add.f32 	%f667, %f160, %f160;
	selp.f32	%f957, %f667, 0f00000000, %p60;
	bra.uni 	BB0_81;

BB0_78:
	setp.geu.f32	%p78, %f160, 0f00000000;
	@%p78 bra 	BB0_81;

	mov.f32 	%f854, 0f3EE66666;
	cvt.rzi.f32.f32	%f666, %f854;
	setp.neu.f32	%p79, %f666, 0f3EE66666;
	selp.f32	%f957, 0f7FFFFFFF, %f957, %p79;

BB0_81:
	abs.f32 	%f858, %f160;
	add.f32 	%f668, %f858, 0f3EE66666;
	mov.b32 	 %r270, %f668;
	setp.lt.s32	%p81, %r270, 2139095040;
	@%p81 bra 	BB0_86;

	abs.f32 	%f859, %f160;
	setp.gtu.f32	%p82, %f859, 0f7F800000;
	@%p82 bra 	BB0_85;
	bra.uni 	BB0_83;

BB0_85:
	add.f32 	%f957, %f160, 0f3EE66666;
	bra.uni 	BB0_86;

BB0_83:
	abs.f32 	%f860, %f160;
	setp.neu.f32	%p83, %f860, 0f7F800000;
	@%p83 bra 	BB0_86;

	selp.f32	%f957, 0fFF800000, 0f7F800000, %p4;

BB0_86:
	mov.f32 	%f852, 0fB5BFBE8E;
	mov.f32 	%f851, 0fBF317200;
	mov.f32 	%f850, 0f00000000;
	mov.f32 	%f849, 0f35BFBE8E;
	mov.f32 	%f848, 0f3F317200;
	mov.f32 	%f847, 0f3DAAAABD;
	mov.f32 	%f846, 0f3C4CAF63;
	mov.f32 	%f845, 0f3B18F0FE;
	mov.f32 	%f844, 0f3EE66666;
	setp.eq.f32	%p84, %f160, 0f3F800000;
	selp.f32	%f188, 0f3F800000, %f957, %p84;
	abs.f32 	%f189, %f161;
	setp.lt.f32	%p85, %f189, 0f00800000;
	mul.f32 	%f671, %f189, 0f4B800000;
	selp.f32	%f672, 0fC3170000, 0fC2FE0000, %p85;
	selp.f32	%f673, %f671, %f189, %p85;
	mov.b32 	 %r271, %f673;
	and.b32  	%r272, %r271, 8388607;
	or.b32  	%r273, %r272, 1065353216;
	mov.b32 	 %f674, %r273;
	shr.u32 	%r274, %r271, 23;
	cvt.rn.f32.u32	%f675, %r274;
	add.f32 	%f676, %f672, %f675;
	setp.gt.f32	%p86, %f674, 0f3FB504F3;
	mul.f32 	%f677, %f674, 0f3F000000;
	add.f32 	%f678, %f676, 0f3F800000;
	selp.f32	%f679, %f677, %f674, %p86;
	selp.f32	%f680, %f678, %f676, %p86;
	add.f32 	%f681, %f679, 0fBF800000;
	add.f32 	%f670, %f679, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f669,%f670;
	// inline asm
	add.f32 	%f682, %f681, %f681;
	mul.f32 	%f683, %f669, %f682;
	mul.f32 	%f684, %f683, %f683;
	fma.rn.f32 	%f687, %f845, %f684, %f846;
	fma.rn.f32 	%f689, %f687, %f684, %f847;
	mul.rn.f32 	%f690, %f689, %f684;
	mul.rn.f32 	%f691, %f690, %f683;
	sub.f32 	%f692, %f681, %f683;
	neg.f32 	%f693, %f683;
	add.f32 	%f694, %f692, %f692;
	fma.rn.f32 	%f695, %f693, %f681, %f694;
	mul.rn.f32 	%f696, %f669, %f695;
	add.f32 	%f697, %f691, %f683;
	sub.f32 	%f698, %f683, %f697;
	add.f32 	%f699, %f691, %f698;
	add.f32 	%f700, %f696, %f699;
	add.f32 	%f701, %f697, %f700;
	sub.f32 	%f702, %f697, %f701;
	add.f32 	%f703, %f700, %f702;
	mul.rn.f32 	%f705, %f680, %f848;
	mul.rn.f32 	%f707, %f680, %f849;
	add.f32 	%f708, %f705, %f701;
	sub.f32 	%f709, %f705, %f708;
	add.f32 	%f710, %f701, %f709;
	add.f32 	%f711, %f703, %f710;
	add.f32 	%f712, %f707, %f711;
	add.f32 	%f713, %f708, %f712;
	sub.f32 	%f714, %f708, %f713;
	add.f32 	%f715, %f712, %f714;
	mul.rn.f32 	%f717, %f844, %f713;
	neg.f32 	%f718, %f717;
	fma.rn.f32 	%f719, %f844, %f713, %f718;
	fma.rn.f32 	%f720, %f844, %f715, %f719;
	fma.rn.f32 	%f722, %f850, %f713, %f720;
	add.rn.f32 	%f723, %f717, %f722;
	neg.f32 	%f724, %f723;
	add.rn.f32 	%f725, %f717, %f724;
	add.rn.f32 	%f726, %f725, %f722;
	mov.b32 	 %r275, %f723;
	setp.eq.s32	%p87, %r275, 1118925336;
	add.s32 	%r276, %r275, -1;
	mov.b32 	 %f727, %r276;
	add.f32 	%f728, %f726, 0f37000000;
	selp.f32	%f729, %f727, %f723, %p87;
	selp.f32	%f190, %f728, %f726, %p87;
	mul.f32 	%f730, %f729, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f731, %f730;
	fma.rn.f32 	%f733, %f731, %f851, %f729;
	fma.rn.f32 	%f735, %f731, %f852, %f733;
	mul.f32 	%f736, %f735, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f737, %f736;
	add.f32 	%f738, %f731, 0f00000000;
	ex2.approx.f32 	%f739, %f738;
	mul.f32 	%f740, %f737, %f739;
	setp.lt.f32	%p88, %f729, 0fC2D20000;
	selp.f32	%f741, 0f00000000, %f740, %p88;
	setp.gt.f32	%p89, %f729, 0f42D20000;
	selp.f32	%f958, 0f7F800000, %f741, %p89;
	setp.eq.f32	%p90, %f958, 0f7F800000;
	@%p90 bra 	BB0_88;

	fma.rn.f32 	%f958, %f958, %f190, %f958;

BB0_88:
	setp.lt.f32	%p91, %f161, 0f00000000;
	and.pred  	%p5, %p91, %p60;
	mov.b32 	 %r277, %f958;
	xor.b32  	%r278, %r277, -2147483648;
	mov.b32 	 %f742, %r278;
	selp.f32	%f960, %f742, %f958, %p5;
	setp.eq.f32	%p93, %f161, 0f00000000;
	@%p93 bra 	BB0_91;
	bra.uni 	BB0_89;

BB0_91:
	add.f32 	%f745, %f161, %f161;
	selp.f32	%f960, %f745, 0f00000000, %p60;
	bra.uni 	BB0_92;

BB0_89:
	setp.geu.f32	%p94, %f161, 0f00000000;
	@%p94 bra 	BB0_92;

	mov.f32 	%f853, 0f3EE66666;
	cvt.rzi.f32.f32	%f744, %f853;
	setp.neu.f32	%p95, %f744, 0f3EE66666;
	selp.f32	%f960, 0f7FFFFFFF, %f960, %p95;

BB0_92:
	abs.f32 	%f881, %f161;
	add.f32 	%f746, %f881, 0f3EE66666;
	mov.b32 	 %r279, %f746;
	setp.lt.s32	%p97, %r279, 2139095040;
	@%p97 bra 	BB0_97;

	abs.f32 	%f882, %f161;
	setp.gtu.f32	%p98, %f882, 0f7F800000;
	@%p98 bra 	BB0_96;
	bra.uni 	BB0_94;

BB0_96:
	add.f32 	%f960, %f161, 0f3EE66666;
	bra.uni 	BB0_97;

BB0_94:
	abs.f32 	%f883, %f161;
	setp.neu.f32	%p99, %f883, 0f7F800000;
	@%p99 bra 	BB0_97;

	selp.f32	%f960, 0fFF800000, 0f7F800000, %p5;

BB0_97:
	mov.u32 	%r351, 2;
	mov.u32 	%r342, 4;
	mov.u64 	%rd256, 0;
	setp.eq.f32	%p100, %f161, 0f3F800000;
	selp.f32	%f747, 0f3F800000, %f960, %p100;
	cvt.u64.u32	%rd97, %r4;
	cvt.u64.u32	%rd96, %r3;
	mov.u64 	%rd100, image;
	cvta.global.u64 	%rd95, %rd100;
	// inline asm
	call (%rd94), _rt_buffer_get_64, (%rd95, %r351, %r342, %rd96, %rd97, %rd256, %rd256);
	// inline asm
	cvt.sat.f32.f32	%f748, %f747;
	mul.f32 	%f749, %f748, 0f437FFD71;
	cvt.rzi.u32.f32	%r282, %f749;
	cvt.sat.f32.f32	%f750, %f188;
	mul.f32 	%f751, %f750, 0f437FFD71;
	cvt.rzi.u32.f32	%r283, %f751;
	cvt.sat.f32.f32	%f752, %f175;
	mul.f32 	%f753, %f752, 0f437FFD71;
	cvt.rzi.u32.f32	%r284, %f753;
	cvt.u16.u32	%rs46, %r282;
	cvt.u16.u32	%rs47, %r284;
	cvt.u16.u32	%rs48, %r283;
	mov.u16 	%rs49, 255;
	st.v4.u8 	[%rd94], {%rs46, %rs48, %rs47, %rs49};
	ld.global.u32 	%r410, [imageEnabled];

BB0_98:
	and.b32  	%r285, %r410, 4;
	setp.eq.s32	%p101, %r285, 0;
	@%p101 bra 	BB0_100;

	mov.u32 	%r352, 2;
	mov.u32 	%r343, 8;
	mov.u64 	%rd257, 0;
	cvt.u64.u32	%rd103, %r3;
	cvt.u64.u32	%rd104, %r4;
	mov.u64 	%rd107, image_HDR;
	cvta.global.u64 	%rd102, %rd107;
	// inline asm
	call (%rd101), _rt_buffer_get_64, (%rd102, %r352, %r343, %rd103, %rd104, %rd257, %rd257);
	// inline asm
	mov.f32 	%f757, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs53, %f757;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs52, %f161;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f160;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f159;}

	// inline asm
	st.v4.u16 	[%rd101], {%rs50, %rs51, %rs52, %rs53};
	ld.global.u32 	%r410, [imageEnabled];

BB0_100:
	and.b32  	%r288, %r410, 16;
	setp.eq.s32	%p102, %r288, 0;
	@%p102 bra 	BB0_102;

	mov.u32 	%r353, 2;
	mov.u32 	%r344, 8;
	mov.u64 	%rd258, 0;
	cvt.u64.u32	%rd111, %r4;
	cvt.u64.u32	%rd110, %r3;
	mov.u64 	%rd114, image_HDR2;
	cvta.global.u64 	%rd109, %rd114;
	// inline asm
	call (%rd108), _rt_buffer_get_64, (%rd109, %r353, %r344, %rd110, %rd111, %rd258, %rd258);
	// inline asm
	mov.f32 	%f761, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f761;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs56, %f155;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs55, %f154;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs54, %f153;}

	// inline asm
	st.v4.u16 	[%rd108], {%rs54, %rs55, %rs56, %rs57};

BB0_102:
	cvt.u64.u32	%rd18, %r3;
	cvt.u64.u32	%rd19, %r4;
	add.f32 	%f763, %f141, %f144;
	add.f32 	%f764, %f147, %f763;
	add.f32 	%f765, %f142, %f145;
	add.f32 	%f766, %f148, %f765;
	add.f32 	%f767, %f143, %f146;
	add.f32 	%f768, %f149, %f767;
	mul.f32 	%f769, %f764, 0f3F13CD3A;
	mul.f32 	%f770, %f766, 0f3F13CD3A;
	mul.f32 	%f771, %f768, 0f3F13CD3A;
	div.rn.f32 	%f772, %f150, %f769;
	div.rn.f32 	%f773, %f151, %f770;
	div.rn.f32 	%f774, %f152, %f771;
	setp.eq.f32	%p103, %f150, 0f00000000;
	selp.f32	%f775, 0f00000000, %f772, %p103;
	setp.eq.f32	%p104, %f151, 0f00000000;
	selp.f32	%f776, 0f00000000, %f773, %p104;
	setp.eq.f32	%p105, %f152, 0f00000000;
	selp.f32	%f777, 0f00000000, %f774, %p105;
	mul.f32 	%f201, %f141, %f775;
	mul.f32 	%f202, %f142, %f776;
	mul.f32 	%f203, %f143, %f777;
	mul.f32 	%f204, %f144, %f775;
	mul.f32 	%f205, %f145, %f776;
	mul.f32 	%f206, %f146, %f777;
	mul.f32 	%f207, %f147, %f775;
	mul.f32 	%f208, %f148, %f776;
	mul.f32 	%f209, %f149, %f777;
	ld.global.u32 	%r291, [additive];
	setp.eq.s32	%p106, %r291, 0;
	mov.f32 	%f762, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs58, %f762;}

	// inline asm
	@%p106 bra 	BB0_104;

	mov.u32 	%r354, 2;
	mov.u32 	%r345, 8;
	mov.u64 	%rd259, 0;
	mov.u64 	%rd127, image_RNM0;
	cvta.global.u64 	%rd116, %rd127;
	// inline asm
	call (%rd115), _rt_buffer_get_64, (%rd116, %r354, %r345, %rd18, %rd19, %rd259, %rd259);
	// inline asm
	ld.v4.u16 	{%rs65, %rs66, %rs67, %rs68}, [%rd115];
	// inline asm
	{  cvt.f32.f16 %f778, %rs65;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f779, %rs66;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f780, %rs67;}

	// inline asm
	// inline asm
	call (%rd121), _rt_buffer_get_64, (%rd116, %r354, %r345, %rd18, %rd19, %rd259, %rd259);
	// inline asm
	add.f32 	%f781, %f201, %f778;
	add.f32 	%f782, %f202, %f779;
	add.f32 	%f783, %f203, %f780;
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f783;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs63, %f782;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs62, %f781;}

	// inline asm
	st.v4.u16 	[%rd121], {%rs62, %rs63, %rs64, %rs58};
	bra.uni 	BB0_105;

BB0_104:
	mov.u32 	%r359, 2;
	mov.u32 	%r350, 8;
	mov.u64 	%rd264, 0;
	mov.u64 	%rd134, image_RNM0;
	cvta.global.u64 	%rd129, %rd134;
	// inline asm
	call (%rd128), _rt_buffer_get_64, (%rd129, %r359, %r350, %rd18, %rd19, %rd264, %rd264);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f203;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs70, %f202;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs69, %f201;}

	// inline asm
	st.v4.u16 	[%rd128], {%rs69, %rs70, %rs71, %rs58};

BB0_105:
	ld.global.u32 	%r298, [additive];
	setp.eq.s32	%p107, %r298, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs72, %f762;}

	// inline asm
	@%p107 bra 	BB0_107;

	mov.u32 	%r355, 2;
	mov.u32 	%r346, 8;
	mov.u64 	%rd260, 0;
	mov.u64 	%rd147, image_RNM1;
	cvta.global.u64 	%rd136, %rd147;
	// inline asm
	call (%rd135), _rt_buffer_get_64, (%rd136, %r355, %r346, %rd18, %rd19, %rd260, %rd260);
	// inline asm
	ld.v4.u16 	{%rs79, %rs80, %rs81, %rs82}, [%rd135];
	// inline asm
	{  cvt.f32.f16 %f788, %rs79;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f789, %rs80;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f790, %rs81;}

	// inline asm
	// inline asm
	call (%rd141), _rt_buffer_get_64, (%rd136, %r355, %r346, %rd18, %rd19, %rd260, %rd260);
	// inline asm
	add.f32 	%f791, %f204, %f788;
	add.f32 	%f792, %f205, %f789;
	add.f32 	%f793, %f206, %f790;
	// inline asm
	{  cvt.rn.f16.f32 %rs78, %f793;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs77, %f792;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs76, %f791;}

	// inline asm
	st.v4.u16 	[%rd141], {%rs76, %rs77, %rs78, %rs72};
	bra.uni 	BB0_108;

BB0_107:
	mov.u32 	%r358, 2;
	mov.u32 	%r349, 8;
	mov.u64 	%rd263, 0;
	mov.u64 	%rd154, image_RNM1;
	cvta.global.u64 	%rd149, %rd154;
	// inline asm
	call (%rd148), _rt_buffer_get_64, (%rd149, %r358, %r349, %rd18, %rd19, %rd263, %rd263);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs85, %f206;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs84, %f205;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs83, %f204;}

	// inline asm
	st.v4.u16 	[%rd148], {%rs83, %rs84, %rs85, %rs72};

BB0_108:
	ld.global.u32 	%r305, [additive];
	setp.eq.s32	%p108, %r305, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs86, %f762;}

	// inline asm
	@%p108 bra 	BB0_110;

	mov.u32 	%r356, 2;
	mov.u32 	%r347, 8;
	mov.u64 	%rd261, 0;
	mov.u64 	%rd167, image_RNM2;
	cvta.global.u64 	%rd156, %rd167;
	// inline asm
	call (%rd155), _rt_buffer_get_64, (%rd156, %r356, %r347, %rd18, %rd19, %rd261, %rd261);
	// inline asm
	ld.v4.u16 	{%rs93, %rs94, %rs95, %rs96}, [%rd155];
	// inline asm
	{  cvt.f32.f16 %f798, %rs93;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f799, %rs94;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f800, %rs95;}

	// inline asm
	// inline asm
	call (%rd161), _rt_buffer_get_64, (%rd156, %r356, %r347, %rd18, %rd19, %rd261, %rd261);
	// inline asm
	add.f32 	%f801, %f207, %f798;
	add.f32 	%f802, %f208, %f799;
	add.f32 	%f803, %f209, %f800;
	// inline asm
	{  cvt.rn.f16.f32 %rs92, %f803;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f802;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs90, %f801;}

	// inline asm
	st.v4.u16 	[%rd161], {%rs90, %rs91, %rs92, %rs86};
	bra.uni 	BB0_126;

BB0_110:
	mov.u32 	%r357, 2;
	mov.u32 	%r348, 8;
	mov.u64 	%rd262, 0;
	mov.u64 	%rd174, image_RNM2;
	cvta.global.u64 	%rd169, %rd174;
	// inline asm
	call (%rd168), _rt_buffer_get_64, (%rd169, %r357, %r348, %rd18, %rd19, %rd262, %rd262);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs99, %f209;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs98, %f208;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs97, %f207;}

	// inline asm
	st.v4.u16 	[%rd168], {%rs97, %rs98, %rs99, %rs86};

BB0_126:
	ret;
}