//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 ignoreNormal;
.global .align 1 .b8 localLights[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[12];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<166>;
	.reg .b16 	%rs<162>;
	.reg .f32 	%f<1624>;
	.reg .b32 	%r<270>;
	.reg .b64 	%rd<272>;


	mov.u64 	%rd271, __local_depot0;
	cvta.local.u64 	%SP, %rd271;
	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
	cvt.u64.u32	%rd10, %r30;
	cvt.u64.u32	%rd11, %r31;
	mov.u64 	%rd14, uvnormal;
	cvta.global.u64 	%rd9, %rd14;
	mov.u32 	%r28, 2;
	mov.u32 	%r29, 4;
	mov.u64 	%rd13, 0;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
	// inline asm
	ld.u32 	%r1, [%rd8];
	shr.u32 	%r34, %r1, 16;
	cvt.u16.u32	%rs1, %r34;
	and.b16  	%rs9, %rs1, 255;
	cvt.u16.u32	%rs10, %r1;
	or.b16  	%rs11, %rs10, %rs9;
	setp.eq.s16	%p9, %rs11, 0;
	mov.f32 	%f1513, 0f00000000;
	mov.f32 	%f1514, %f1513;
	mov.f32 	%f1515, %f1513;
	@%p9 bra 	BB0_2;

	ld.u8 	%rs12, [%rd8+1];
	and.b16  	%rs14, %rs10, 255;
	cvt.rn.f32.u16	%f317, %rs14;
	div.rn.f32 	%f318, %f317, 0f437F0000;
	fma.rn.f32 	%f319, %f318, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f320, %rs12;
	div.rn.f32 	%f321, %f320, 0f437F0000;
	fma.rn.f32 	%f322, %f321, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f323, %rs9;
	div.rn.f32 	%f324, %f323, 0f437F0000;
	fma.rn.f32 	%f325, %f324, 0f40000000, 0fBF800000;
	mul.f32 	%f326, %f322, %f322;
	fma.rn.f32 	%f327, %f319, %f319, %f326;
	fma.rn.f32 	%f328, %f325, %f325, %f327;
	sqrt.rn.f32 	%f329, %f328;
	rcp.rn.f32 	%f330, %f329;
	mul.f32 	%f1513, %f319, %f330;
	mul.f32 	%f1514, %f322, %f330;
	mul.f32 	%f1515, %f325, %f330;

BB0_2:
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	ld.global.v2.u32 	{%r38, %r39}, [tileInfo];
	add.s32 	%r2, %r35, %r38;
	add.s32 	%r3, %r36, %r39;
	setp.eq.f32	%p10, %f1514, 0f00000000;
	setp.eq.f32	%p11, %f1513, 0f00000000;
	and.pred  	%p12, %p11, %p10;
	setp.eq.f32	%p13, %f1515, 0f00000000;
	and.pred  	%p14, %p12, %p13;
	@%p14 bra 	BB0_124;
	bra.uni 	BB0_3;

BB0_124:
	ld.global.u32 	%r269, [imageEnabled];
	and.b32  	%r217, %r269, 1;
	setp.eq.b32	%p157, %r217, 1;
	@!%p157 bra 	BB0_126;
	bra.uni 	BB0_125;

BB0_125:
	cvt.u64.u32	%rd159, %r2;
	cvt.u64.u32	%rd160, %r3;
	mov.u64 	%rd163, image;
	cvta.global.u64 	%rd158, %rd163;
	// inline asm
	call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs93, 0;
	st.v4.u8 	[%rd157], {%rs93, %rs93, %rs93, %rs93};
	ld.global.u32 	%r269, [imageEnabled];

BB0_126:
	and.b32  	%r220, %r269, 8;
	setp.eq.s32	%p158, %r220, 0;
	@%p158 bra 	BB0_128;

	cvt.u64.u32	%rd167, %r3;
	cvt.u64.u32	%rd166, %r2;
	mov.u64 	%rd170, image_Mask;
	cvta.global.u64 	%rd165, %rd170;
	// inline asm
	call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1467, 0f00000000;
	cvt.rzi.u32.f32	%r223, %f1467;
	cvt.u16.u32	%rs94, %r223;
	mov.u16 	%rs95, 0;
	st.v2.u8 	[%rd164], {%rs94, %rs95};
	ld.global.u32 	%r269, [imageEnabled];

BB0_128:
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	and.b32  	%r224, %r269, 4;
	setp.eq.s32	%p159, %r224, 0;
	@%p159 bra 	BB0_132;

	ld.global.u32 	%r225, [additive];
	setp.eq.s32	%p160, %r225, 0;
	@%p160 bra 	BB0_131;

	mov.u64 	%rd183, image_HDR;
	cvta.global.u64 	%rd172, %rd183;
	mov.u32 	%r229, 8;
	// inline asm
	call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r229, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs102, %rs103, %rs104, %rs105}, [%rd171];
	// inline asm
	{  cvt.f32.f16 %f1468, %rs102;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1469, %rs103;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1470, %rs104;}

	// inline asm
	// inline asm
	call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r229, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1471, %f1468, 0f00000000;
	add.f32 	%f1472, %f1469, 0f00000000;
	add.f32 	%f1473, %f1470, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs101, %f1473;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs100, %f1472;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs99, %f1471;}

	// inline asm
	mov.u16 	%rs106, 0;
	st.v4.u16 	[%rd177], {%rs99, %rs100, %rs101, %rs106};
	bra.uni 	BB0_132;

BB0_3:
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd17, %r47;
	cvt.u64.u32	%rd18, %r48;
	mov.u64 	%rd26, uvpos;
	cvta.global.u64 	%rd16, %rd26;
	mov.u32 	%r44, 12;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
	// inline asm
	ld.f32 	%f9, [%rd15+8];
	ld.f32 	%f8, [%rd15+4];
	ld.f32 	%f7, [%rd15];
	mul.f32 	%f347, %f7, 0f3456BF95;
	mul.f32 	%f348, %f8, 0f3456BF95;
	mul.f32 	%f349, %f9, 0f3456BF95;
	abs.f32 	%f350, %f1513;
	div.rn.f32 	%f351, %f347, %f350;
	abs.f32 	%f352, %f1514;
	div.rn.f32 	%f353, %f348, %f352;
	abs.f32 	%f354, %f1515;
	div.rn.f32 	%f355, %f349, %f354;
	abs.f32 	%f356, %f351;
	abs.f32 	%f357, %f353;
	abs.f32 	%f358, %f355;
	mov.f32 	%f359, 0f38D1B717;
	max.f32 	%f360, %f356, %f359;
	max.f32 	%f361, %f357, %f359;
	max.f32 	%f362, %f358, %f359;
	fma.rn.f32 	%f10, %f1513, %f360, %f7;
	fma.rn.f32 	%f11, %f1514, %f361, %f8;
	fma.rn.f32 	%f12, %f1515, %f362, %f9;
	mov.u64 	%rd27, localLights;
	cvta.global.u64 	%rd25, %rd27;
	mov.u32 	%r45, 1;
	mov.u32 	%r46, 96;
	// inline asm
	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
	// inline asm
	cvt.u32.u64	%r4, %rd21;
	setp.eq.s32	%p15, %r4, 0;
	mov.f32 	%f1516, 0f00000000;
	mov.f32 	%f1517, %f1516;
	mov.f32 	%f1518, %f1516;
	mov.f32 	%f1519, %f1516;
	mov.f32 	%f1520, %f1516;
	mov.f32 	%f1521, %f1516;
	mov.f32 	%f1522, %f1516;
	mov.f32 	%f1523, %f1516;
	mov.f32 	%f1524, %f1516;
	mov.f32 	%f1525, %f1516;
	mov.f32 	%f1526, %f1516;
	mov.f32 	%f1527, %f1516;
	mov.f32 	%f1528, %f1516;
	mov.f32 	%f1529, %f1516;
	mov.f32 	%f1530, %f1516;
	mov.f32 	%f1531, %f1516;
	@%p15 bra 	BB0_60;

	mov.f32 	%f379, 0f40000000;
	cvt.rzi.f32.f32	%f380, %f379;
	add.f32 	%f381, %f380, %f380;
	mov.f32 	%f382, 0f40800000;
	sub.f32 	%f383, %f382, %f381;
	abs.f32 	%f13, %f383;
	mul.f32 	%f14, %f10, 0f3456BF95;
	mul.f32 	%f15, %f11, 0f3456BF95;
	mul.f32 	%f16, %f12, 0f3456BF95;
	mov.f32 	%f378, 0f00000000;
	mov.u32 	%r261, 0;
	abs.f32 	%f583, %f14;
	abs.f32 	%f584, %f15;
	max.f32 	%f585, %f583, %f584;
	abs.f32 	%f586, %f16;
	max.f32 	%f587, %f585, %f586;
	mov.f32 	%f1516, %f378;
	mov.f32 	%f1517, %f378;
	mov.f32 	%f1518, %f378;
	mov.f32 	%f1519, %f378;
	mov.f32 	%f1520, %f378;
	mov.f32 	%f1521, %f378;
	mov.f32 	%f1522, %f378;
	mov.f32 	%f1523, %f378;
	mov.f32 	%f1524, %f378;
	mov.f32 	%f1525, %f378;
	mov.f32 	%f1526, %f378;
	mov.f32 	%f1527, %f378;
	mov.f32 	%f1528, %f378;
	mov.f32 	%f1529, %f378;
	mov.f32 	%f1530, %f378;
	mov.f32 	%f1531, %f378;

BB0_5:
	cvt.u64.u32	%rd30, %r261;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
	// inline asm
	ld.v4.f32 	{%f386, %f387, %f388, %f389}, [%rd28+80];
	ld.v4.f32 	{%f390, %f391, %f392, %f393}, [%rd28+64];
	ld.v4.f32 	{%f394, %f395, %f396, %f397}, [%rd28+48];
	ld.v4.f32 	{%f398, %f1540, %f1541, %f401}, [%rd28+32];
	ld.v4.f32 	{%f402, %f403, %f404, %f405}, [%rd28+16];
	ld.v4.f32 	{%f406, %f407, %f408, %f409}, [%rd28];
	mov.b32 	 %r6, %f389;
	sub.f32 	%f57, %f407, %f7;
	sub.f32 	%f59, %f408, %f8;
	sub.f32 	%f61, %f409, %f9;
	mul.f32 	%f411, %f59, %f59;
	fma.rn.f32 	%f412, %f57, %f57, %f411;
	fma.rn.f32 	%f413, %f61, %f61, %f412;
	sqrt.rn.f32 	%f62, %f413;
	rcp.rn.f32 	%f414, %f62;
	mul.f32 	%f63, %f57, %f414;
	mul.f32 	%f64, %f59, %f414;
	mul.f32 	%f65, %f61, %f414;
	mul.f32 	%f66, %f62, %f405;
	abs.f32 	%f67, %f66;
	setp.lt.f32	%p16, %f67, 0f00800000;
	mul.f32 	%f415, %f67, 0f4B800000;
	selp.f32	%f416, 0fC3170000, 0fC2FE0000, %p16;
	selp.f32	%f417, %f415, %f67, %p16;
	mov.b32 	 %r54, %f417;
	and.b32  	%r55, %r54, 8388607;
	or.b32  	%r56, %r55, 1065353216;
	mov.b32 	 %f418, %r56;
	shr.u32 	%r57, %r54, 23;
	cvt.rn.f32.u32	%f419, %r57;
	add.f32 	%f420, %f416, %f419;
	setp.gt.f32	%p17, %f418, 0f3FB504F3;
	mul.f32 	%f421, %f418, 0f3F000000;
	add.f32 	%f422, %f420, 0f3F800000;
	selp.f32	%f423, %f421, %f418, %p17;
	selp.f32	%f424, %f422, %f420, %p17;
	add.f32 	%f425, %f423, 0fBF800000;
	add.f32 	%f385, %f423, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f384,%f385;
	// inline asm
	add.f32 	%f426, %f425, %f425;
	mul.f32 	%f427, %f384, %f426;
	mul.f32 	%f428, %f427, %f427;
	mov.f32 	%f429, 0f3C4CAF63;
	mov.f32 	%f430, 0f3B18F0FE;
	fma.rn.f32 	%f431, %f430, %f428, %f429;
	mov.f32 	%f432, 0f3DAAAABD;
	fma.rn.f32 	%f433, %f431, %f428, %f432;
	mul.rn.f32 	%f434, %f433, %f428;
	mul.rn.f32 	%f435, %f434, %f427;
	sub.f32 	%f436, %f425, %f427;
	neg.f32 	%f437, %f427;
	add.f32 	%f438, %f436, %f436;
	fma.rn.f32 	%f439, %f437, %f425, %f438;
	mul.rn.f32 	%f440, %f384, %f439;
	add.f32 	%f441, %f435, %f427;
	sub.f32 	%f442, %f427, %f441;
	add.f32 	%f443, %f435, %f442;
	add.f32 	%f444, %f440, %f443;
	add.f32 	%f445, %f441, %f444;
	sub.f32 	%f446, %f441, %f445;
	add.f32 	%f447, %f444, %f446;
	mov.f32 	%f448, 0f3F317200;
	mul.rn.f32 	%f449, %f424, %f448;
	mov.f32 	%f450, 0f35BFBE8E;
	mul.rn.f32 	%f451, %f424, %f450;
	add.f32 	%f452, %f449, %f445;
	sub.f32 	%f453, %f449, %f452;
	add.f32 	%f454, %f445, %f453;
	add.f32 	%f455, %f447, %f454;
	add.f32 	%f456, %f451, %f455;
	add.f32 	%f457, %f452, %f456;
	sub.f32 	%f458, %f452, %f457;
	add.f32 	%f459, %f456, %f458;
	mul.rn.f32 	%f68, %f382, %f457;
	neg.f32 	%f461, %f68;
	fma.rn.f32 	%f462, %f382, %f457, %f461;
	fma.rn.f32 	%f463, %f382, %f459, %f462;
	fma.rn.f32 	%f69, %f378, %f457, %f463;
	add.rn.f32 	%f70, %f68, %f69;
	mov.b32 	 %r58, %f70;
	setp.eq.s32	%p1, %r58, 1118925336;
	add.s32 	%r59, %r58, -1;
	mov.b32 	 %f465, %r59;
	selp.f32	%f466, %f465, %f70, %p1;
	mul.f32 	%f467, %f466, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f468, %f467;
	mov.f32 	%f469, 0fBF317200;
	fma.rn.f32 	%f470, %f468, %f469, %f466;
	mov.f32 	%f471, 0fB5BFBE8E;
	fma.rn.f32 	%f472, %f468, %f471, %f470;
	mul.f32 	%f473, %f472, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f474, %f473;
	add.f32 	%f475, %f468, 0f00000000;
	ex2.approx.f32 	%f476, %f475;
	mul.f32 	%f477, %f474, %f476;
	setp.lt.f32	%p18, %f466, 0fC2D20000;
	selp.f32	%f478, 0f00000000, %f477, %p18;
	setp.gt.f32	%p19, %f466, 0f42D20000;
	selp.f32	%f1532, 0f7F800000, %f478, %p19;
	setp.eq.f32	%p20, %f1532, 0f7F800000;
	@%p20 bra 	BB0_7;

	neg.f32 	%f479, %f70;
	add.rn.f32 	%f480, %f68, %f479;
	add.rn.f32 	%f481, %f480, %f69;
	add.f32 	%f482, %f481, 0f37000000;
	selp.f32	%f483, %f482, %f481, %p1;
	fma.rn.f32 	%f1532, %f1532, %f483, %f1532;

BB0_7:
	setp.lt.f32	%p21, %f66, 0f00000000;
	setp.eq.f32	%p22, %f13, 0f3F800000;
	and.pred  	%p2, %p21, %p22;
	mov.b32 	 %r60, %f1532;
	xor.b32  	%r61, %r60, -2147483648;
	mov.b32 	 %f484, %r61;
	selp.f32	%f1534, %f484, %f1532, %p2;
	setp.eq.f32	%p23, %f66, 0f00000000;
	@%p23 bra 	BB0_10;
	bra.uni 	BB0_8;

BB0_10:
	add.f32 	%f487, %f66, %f66;
	selp.f32	%f1534, %f487, 0f00000000, %p22;
	bra.uni 	BB0_11;

BB0_8:
	setp.geu.f32	%p24, %f66, 0f00000000;
	@%p24 bra 	BB0_11;

	cvt.rzi.f32.f32	%f486, %f382;
	setp.neu.f32	%p25, %f486, 0f40800000;
	selp.f32	%f1534, 0f7FFFFFFF, %f1534, %p25;

BB0_11:
	add.f32 	%f488, %f67, 0f40800000;
	mov.b32 	 %r62, %f488;
	setp.lt.s32	%p27, %r62, 2139095040;
	@%p27 bra 	BB0_16;

	setp.gtu.f32	%p28, %f67, 0f7F800000;
	@%p28 bra 	BB0_15;
	bra.uni 	BB0_13;

BB0_15:
	add.f32 	%f1534, %f66, 0f40800000;
	bra.uni 	BB0_16;

BB0_13:
	setp.neu.f32	%p29, %f67, 0f7F800000;
	@%p29 bra 	BB0_16;

	selp.f32	%f1534, 0fFF800000, 0f7F800000, %p2;

BB0_16:
	mul.f32 	%f489, %f62, %f403;
	mov.f32 	%f1573, 0f3F800000;
	sub.f32 	%f491, %f1573, %f1534;
	setp.eq.f32	%p30, %f66, 0f3F800000;
	selp.f32	%f492, 0f00000000, %f491, %p30;
	cvt.sat.f32.f32	%f493, %f492;
	fma.rn.f32 	%f494, %f489, %f489, %f404;
	div.rn.f32 	%f96, %f493, %f494;
	mul.f32 	%f495, %f1514, %f64;
	fma.rn.f32 	%f496, %f1513, %f63, %f495;
	fma.rn.f32 	%f497, %f1515, %f65, %f496;
	ld.global.u32 	%r63, [ignoreNormal];
	setp.eq.s32	%p31, %r63, 0;
	selp.f32	%f97, %f497, 0f3F800000, %p31;
	mul.f32 	%f498, %f97, 0f40800000;
	cvt.sat.f32.f32	%f98, %f498;
	setp.eq.f32	%p32, %f406, 0f3F800000;
	@%p32 bra 	BB0_23;
	bra.uni 	BB0_17;

BB0_23:
	setp.leu.f32	%p36, %f401, 0f00000000;
	@%p36 bra 	BB0_19;

	setp.geu.f32	%p37, %f397, 0f00000000;
	@%p37 bra 	BB0_25;

	sub.f32 	%f1512, %f409, %f9;
	sub.f32 	%f1511, %f407, %f7;
	sub.f32 	%f1510, %f408, %f8;
	mul.f32 	%f521, %f387, %f1510;
	fma.rn.f32 	%f522, %f386, %f1511, %f521;
	fma.rn.f32 	%f523, %f388, %f1512, %f522;
	rcp.rn.f32 	%f524, %f523;
	mul.f32 	%f1535, %f1511, %f524;
	mul.f32 	%f1536, %f1510, %f524;
	mul.f32 	%f1537, %f1512, %f524;
	neg.f32 	%f397, %f397;
	bra.uni 	BB0_27;

BB0_17:
	setp.eq.f32	%p33, %f406, 0f40000000;
	@%p33 bra 	BB0_21;
	bra.uni 	BB0_18;

BB0_21:
	setp.leu.f32	%p35, %f401, 0f00000000;
	@%p35 bra 	BB0_19;

	mul.f32 	%f515, %f395, %f64;
	fma.rn.f32 	%f516, %f394, %f63, %f515;
	mul.f32 	%f517, %f391, %f64;
	fma.rn.f32 	%f518, %f390, %f63, %f517;
	mul.f32 	%f519, %f387, %f64;
	fma.rn.f32 	%f520, %f386, %f63, %f519;
	fma.rn.f32 	%f512, %f396, %f65, %f516;
	fma.rn.f32 	%f513, %f392, %f65, %f518;
	fma.rn.f32 	%f514, %f388, %f65, %f520;
	cvt.rzi.s32.f32	%r64, %f401;
	mov.u32 	%r65, 6;
	mov.u32 	%r66, 0;
	// inline asm
	call (%f508, %f509, %f510, %f511), _rt_texture_get_base_id, (%r64, %r65, %f512, %f513, %f514, %r66);
	// inline asm
	mul.f32 	%f1539, %f398, %f508;
	mul.f32 	%f1540, %f1540, %f509;
	mul.f32 	%f1541, %f1541, %f510;
	bra.uni 	BB0_28;

BB0_18:
	setp.neu.f32	%p34, %f406, 0f40800000;
	@%p34 bra 	BB0_19;

	mul.f32 	%f499, %f386, %f63;
	mul.f32 	%f500, %f387, %f64;
	neg.f32 	%f501, %f500;
	sub.f32 	%f502, %f501, %f499;
	mul.f32 	%f503, %f388, %f65;
	sub.f32 	%f504, %f502, %f503;
	fma.rn.f32 	%f505, %f401, %f504, %f397;
	cvt.sat.f32.f32	%f506, %f505;
	mul.f32 	%f507, %f506, %f506;
	mul.f32 	%f1542, %f96, %f507;
	mov.f32 	%f1539, %f398;
	bra.uni 	BB0_29;

BB0_19:
	mov.f32 	%f1539, %f398;
	bra.uni 	BB0_28;

BB0_25:
	mov.f32 	%f1535, %f63;
	mov.f32 	%f1536, %f64;
	mov.f32 	%f1537, %f65;

BB0_27:
	mul.f32 	%f533, %f388, %f65;
	mul.f32 	%f534, %f387, %f64;
	neg.f32 	%f535, %f534;
	mul.f32 	%f536, %f386, %f63;
	sub.f32 	%f537, %f535, %f536;
	sub.f32 	%f538, %f537, %f533;
	setp.gt.f32	%p38, %f538, 0f00000000;
	selp.f32	%f539, 0f3F800000, 0f00000000, %p38;
	mul.f32 	%f540, %f395, %f1536;
	fma.rn.f32 	%f541, %f394, %f1535, %f540;
	mul.f32 	%f542, %f391, %f1536;
	fma.rn.f32 	%f543, %f390, %f1535, %f542;
	fma.rn.f32 	%f544, %f396, %f1537, %f541;
	fma.rn.f32 	%f545, %f392, %f1537, %f543;
	fma.rn.f32 	%f546, %f397, %f544, 0f3F000000;
	mov.f32 	%f547, 0f3F800000;
	sub.f32 	%f529, %f547, %f546;
	fma.rn.f32 	%f530, %f397, %f545, 0f3F000000;
	cvt.rzi.s32.f32	%r67, %f401;
	mov.f32 	%f532, 0f00000000;
	// inline asm
	call (%f525, %f526, %f527, %f528), _rt_texture_get_f_id, (%r67, %r28, %f529, %f530, %f532, %f532);
	// inline asm
	mul.f32 	%f548, %f539, %f525;
	mul.f32 	%f549, %f539, %f526;
	mul.f32 	%f550, %f539, %f527;
	mul.f32 	%f1539, %f398, %f548;
	mul.f32 	%f1540, %f1540, %f549;
	mul.f32 	%f1541, %f1541, %f550;

BB0_28:
	mov.f32 	%f1542, %f96;

BB0_29:
	max.f32 	%f566, %f1539, %f1540;
	max.f32 	%f567, %f566, %f1541;
	mul.f32 	%f568, %f98, %f1542;
	mul.f32 	%f569, %f568, %f567;
	setp.lt.f32	%p40, %f569, 0f3727C5AC;
	mov.pred 	%p165, -1;
	mov.f32 	%f1543, 0f00000000;
	mov.f32 	%f1544, %f1543;
	mov.f32 	%f1545, %f1543;
	mov.f32 	%f136, %f1543;
	mov.f32 	%f1547, %f1543;
	mov.f32 	%f1548, %f1543;
	mov.f32 	%f139, %f1543;
	mov.f32 	%f1550, %f1543;
	mov.f32 	%f1551, %f1543;
	mov.f32 	%f142, %f1543;
	mov.f32 	%f1553, %f1543;
	mov.f32 	%f1554, %f1543;
	mov.f32 	%f145, %f1543;
	mov.f32 	%f1556, %f1543;
	mov.f32 	%f1557, %f1543;
	@%p40 bra 	BB0_31;

	cvt.sat.f32.f32	%f570, %f97;
	mul.f32 	%f571, %f1542, %f570;
	mul.f32 	%f1543, %f1539, %f571;
	mul.f32 	%f1544, %f1540, %f571;
	mul.f32 	%f1545, %f1541, %f571;
	mul.f32 	%f572, %f1542, 0f3E800000;
	mul.f32 	%f573, %f98, %f572;
	mul.f32 	%f136, %f1539, %f573;
	mul.f32 	%f1547, %f1540, %f573;
	mul.f32 	%f1548, %f1541, %f573;
	mul.f32 	%f139, %f63, %f136;
	mul.f32 	%f1550, %f63, %f1547;
	mul.f32 	%f1551, %f63, %f1548;
	mul.f32 	%f142, %f64, %f136;
	mul.f32 	%f1553, %f64, %f1547;
	mul.f32 	%f1554, %f64, %f1548;
	mul.f32 	%f145, %f65, %f136;
	mul.f32 	%f1556, %f65, %f1547;
	mul.f32 	%f1557, %f65, %f1548;
	mov.pred 	%p165, 0;

BB0_31:
	@%p165 bra 	BB0_59;

	setp.eq.s32	%p42, %r6, 0;
	mov.u16 	%rs161, 0;
	mov.f32 	%f1574, %f1573;
	mov.f32 	%f1575, %f1573;
	@%p42 bra 	BB0_43;

	abs.s32 	%r8, %r6;
	mov.f32 	%f1570, 0f00000000;
	setp.lt.s32	%p43, %r8, 1;
	mov.f32 	%f1571, %f1570;
	mov.f32 	%f1572, %f1570;
	@%p43 bra 	BB0_42;

	max.f32 	%f149, %f587, %f359;
	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p44, %r9, 0;
	add.u64 	%rd35, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd35;
	mov.f32 	%f1570, 0f00000000;
	mov.u32 	%r265, 0;
	mov.f32 	%f1571, %f1570;
	mov.f32 	%f1572, %f1570;
	@%p44 bra 	BB0_40;

	setp.eq.s32	%p45, %r9, 1;
	mov.f32 	%f1561, 0f00000000;
	mov.u32 	%r263, 0;
	mov.f32 	%f1562, %f1561;
	mov.f32 	%f1563, %f1561;
	@%p45 bra 	BB0_39;

	setp.eq.s32	%p46, %r9, 2;
	mov.f32 	%f1558, 0f00000000;
	mov.u32 	%r262, 0;
	mov.f32 	%f1559, %f1558;
	mov.f32 	%f1560, %f1558;
	@%p46 bra 	BB0_38;

	sub.f32 	%f603, %f407, %f402;
	sub.f32 	%f604, %f408, %f402;
	sub.f32 	%f605, %f409, %f402;
	sub.f32 	%f606, %f603, %f7;
	sub.f32 	%f607, %f604, %f8;
	sub.f32 	%f608, %f605, %f9;
	mul.f32 	%f609, %f607, %f607;
	fma.rn.f32 	%f610, %f606, %f606, %f609;
	fma.rn.f32 	%f611, %f608, %f608, %f610;
	sqrt.rn.f32 	%f602, %f611;
	rcp.rn.f32 	%f612, %f602;
	mul.f32 	%f598, %f612, %f606;
	mul.f32 	%f599, %f612, %f607;
	mul.f32 	%f600, %f612, %f608;
	ld.global.u32 	%r76, [imageEnabled];
	and.b32  	%r77, %r76, 32;
	setp.eq.s32	%p47, %r77, 0;
	selp.f32	%f613, 0f3F800000, 0f41200000, %p47;
	mul.f32 	%f601, %f613, %f149;
	mov.u32 	%r78, 1065353216;
	st.local.u32 	[%rd2+8], %r78;
	st.local.u32 	[%rd2+4], %r78;
	st.local.u32 	[%rd2], %r78;
	ld.global.u32 	%r72, [root];
	// inline asm
	call _rt_trace_64, (%r72, %f10, %f11, %f12, %f598, %f599, %f600, %r45, %f601, %f602, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f614, [%rd2];
	add.f32 	%f1560, %f614, 0f00000000;
	ld.local.f32 	%f615, [%rd2+4];
	add.f32 	%f1559, %f615, 0f00000000;
	ld.local.f32 	%f616, [%rd2+8];
	add.f32 	%f1558, %f616, 0f00000000;
	mov.u32 	%r262, %r45;

BB0_38:
	cvt.rn.f32.s32	%f625, %r262;
	mul.f32 	%f626, %f625, 0f3DD32618;
	cvt.rmi.f32.f32	%f627, %f626;
	sub.f32 	%f628, %f626, %f627;
	mul.f32 	%f629, %f625, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f630, %f629;
	sub.f32 	%f631, %f629, %f630;
	mul.f32 	%f632, %f625, 0f3DC74539;
	cvt.rmi.f32.f32	%f633, %f632;
	sub.f32 	%f634, %f632, %f633;
	add.f32 	%f635, %f631, 0f4199851F;
	add.f32 	%f636, %f634, 0f4199851F;
	add.f32 	%f637, %f628, 0f4199851F;
	mul.f32 	%f638, %f631, %f636;
	fma.rn.f32 	%f639, %f628, %f635, %f638;
	fma.rn.f32 	%f640, %f637, %f634, %f639;
	add.f32 	%f641, %f628, %f640;
	add.f32 	%f642, %f631, %f640;
	add.f32 	%f643, %f634, %f640;
	add.f32 	%f644, %f641, %f642;
	mul.f32 	%f645, %f643, %f644;
	cvt.rmi.f32.f32	%f646, %f645;
	sub.f32 	%f647, %f645, %f646;
	add.f32 	%f648, %f641, %f643;
	mul.f32 	%f649, %f642, %f648;
	cvt.rmi.f32.f32	%f650, %f649;
	sub.f32 	%f651, %f649, %f650;
	add.f32 	%f652, %f642, %f643;
	mul.f32 	%f653, %f641, %f652;
	cvt.rmi.f32.f32	%f654, %f653;
	sub.f32 	%f655, %f653, %f654;
	fma.rn.f32 	%f656, %f647, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f657, %f651, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f658, %f655, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f659, %f402, %f656, %f407;
	fma.rn.f32 	%f660, %f402, %f657, %f408;
	fma.rn.f32 	%f661, %f402, %f658, %f409;
	sub.f32 	%f662, %f659, %f7;
	sub.f32 	%f663, %f660, %f8;
	sub.f32 	%f664, %f661, %f9;
	mul.f32 	%f665, %f663, %f663;
	fma.rn.f32 	%f666, %f662, %f662, %f665;
	fma.rn.f32 	%f667, %f664, %f664, %f666;
	sqrt.rn.f32 	%f624, %f667;
	rcp.rn.f32 	%f668, %f624;
	mul.f32 	%f620, %f668, %f662;
	mul.f32 	%f621, %f668, %f663;
	mul.f32 	%f622, %f668, %f664;
	ld.global.u32 	%r82, [imageEnabled];
	and.b32  	%r83, %r82, 32;
	setp.eq.s32	%p48, %r83, 0;
	selp.f32	%f669, 0f3F800000, 0f41200000, %p48;
	mul.f32 	%f623, %f669, %f149;
	mov.u32 	%r84, 1065353216;
	st.local.u32 	[%rd2+8], %r84;
	st.local.u32 	[%rd2+4], %r84;
	st.local.u32 	[%rd2], %r84;
	ld.global.u32 	%r79, [root];
	// inline asm
	call _rt_trace_64, (%r79, %f10, %f11, %f12, %f620, %f621, %f622, %r45, %f623, %f624, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f670, [%rd2];
	add.f32 	%f1563, %f1560, %f670;
	ld.local.f32 	%f671, [%rd2+4];
	add.f32 	%f1562, %f1559, %f671;
	ld.local.f32 	%f672, [%rd2+8];
	add.f32 	%f1561, %f1558, %f672;
	add.s32 	%r263, %r262, 1;

BB0_39:
	cvt.rn.f32.s32	%f681, %r263;
	mul.f32 	%f682, %f681, 0f3DD32618;
	cvt.rmi.f32.f32	%f683, %f682;
	sub.f32 	%f684, %f682, %f683;
	mul.f32 	%f685, %f681, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f686, %f685;
	sub.f32 	%f687, %f685, %f686;
	mul.f32 	%f688, %f681, 0f3DC74539;
	cvt.rmi.f32.f32	%f689, %f688;
	sub.f32 	%f690, %f688, %f689;
	add.f32 	%f691, %f687, 0f4199851F;
	add.f32 	%f692, %f690, 0f4199851F;
	add.f32 	%f693, %f684, 0f4199851F;
	mul.f32 	%f694, %f687, %f692;
	fma.rn.f32 	%f695, %f684, %f691, %f694;
	fma.rn.f32 	%f696, %f693, %f690, %f695;
	add.f32 	%f697, %f684, %f696;
	add.f32 	%f698, %f687, %f696;
	add.f32 	%f699, %f690, %f696;
	add.f32 	%f700, %f697, %f698;
	mul.f32 	%f701, %f699, %f700;
	cvt.rmi.f32.f32	%f702, %f701;
	sub.f32 	%f703, %f701, %f702;
	add.f32 	%f704, %f697, %f699;
	mul.f32 	%f705, %f698, %f704;
	cvt.rmi.f32.f32	%f706, %f705;
	sub.f32 	%f707, %f705, %f706;
	add.f32 	%f708, %f698, %f699;
	mul.f32 	%f709, %f697, %f708;
	cvt.rmi.f32.f32	%f710, %f709;
	sub.f32 	%f711, %f709, %f710;
	fma.rn.f32 	%f712, %f703, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f713, %f707, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f714, %f711, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f715, %f402, %f712, %f407;
	fma.rn.f32 	%f716, %f402, %f713, %f408;
	fma.rn.f32 	%f717, %f402, %f714, %f409;
	sub.f32 	%f718, %f715, %f7;
	sub.f32 	%f719, %f716, %f8;
	sub.f32 	%f720, %f717, %f9;
	mul.f32 	%f721, %f719, %f719;
	fma.rn.f32 	%f722, %f718, %f718, %f721;
	fma.rn.f32 	%f723, %f720, %f720, %f722;
	sqrt.rn.f32 	%f680, %f723;
	rcp.rn.f32 	%f724, %f680;
	mul.f32 	%f676, %f724, %f718;
	mul.f32 	%f677, %f724, %f719;
	mul.f32 	%f678, %f724, %f720;
	ld.global.u32 	%r88, [imageEnabled];
	and.b32  	%r89, %r88, 32;
	setp.eq.s32	%p49, %r89, 0;
	selp.f32	%f725, 0f3F800000, 0f41200000, %p49;
	mul.f32 	%f679, %f725, %f149;
	mov.u32 	%r90, 1065353216;
	st.local.u32 	[%rd2+8], %r90;
	st.local.u32 	[%rd2+4], %r90;
	st.local.u32 	[%rd2], %r90;
	ld.global.u32 	%r85, [root];
	mov.u32 	%r86, 1;
	// inline asm
	call _rt_trace_64, (%r85, %f10, %f11, %f12, %f676, %f677, %f678, %r86, %f679, %f680, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f726, [%rd2];
	add.f32 	%f1572, %f1563, %f726;
	ld.local.f32 	%f727, [%rd2+4];
	add.f32 	%f1571, %f1562, %f727;
	ld.local.f32 	%f728, [%rd2+8];
	add.f32 	%f1570, %f1561, %f728;
	add.s32 	%r265, %r263, 1;

BB0_40:
	setp.lt.u32	%p50, %r8, 4;
	@%p50 bra 	BB0_42;

BB0_41:
	cvt.rn.f32.s32	%f761, %r265;
	mul.f32 	%f762, %f761, 0f3DD32618;
	cvt.rmi.f32.f32	%f763, %f762;
	sub.f32 	%f764, %f762, %f763;
	mul.f32 	%f765, %f761, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f766, %f765;
	sub.f32 	%f767, %f765, %f766;
	mul.f32 	%f768, %f761, 0f3DC74539;
	cvt.rmi.f32.f32	%f769, %f768;
	sub.f32 	%f770, %f768, %f769;
	add.f32 	%f771, %f767, 0f4199851F;
	add.f32 	%f772, %f770, 0f4199851F;
	add.f32 	%f773, %f764, 0f4199851F;
	mul.f32 	%f774, %f767, %f772;
	fma.rn.f32 	%f775, %f764, %f771, %f774;
	fma.rn.f32 	%f776, %f773, %f770, %f775;
	add.f32 	%f777, %f764, %f776;
	add.f32 	%f778, %f767, %f776;
	add.f32 	%f779, %f770, %f776;
	add.f32 	%f780, %f777, %f778;
	mul.f32 	%f781, %f779, %f780;
	cvt.rmi.f32.f32	%f782, %f781;
	sub.f32 	%f783, %f781, %f782;
	add.f32 	%f784, %f777, %f779;
	mul.f32 	%f785, %f778, %f784;
	cvt.rmi.f32.f32	%f786, %f785;
	sub.f32 	%f787, %f785, %f786;
	add.f32 	%f788, %f778, %f779;
	mul.f32 	%f789, %f777, %f788;
	cvt.rmi.f32.f32	%f790, %f789;
	sub.f32 	%f791, %f789, %f790;
	fma.rn.f32 	%f792, %f783, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f793, %f787, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f794, %f791, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f795, %f402, %f792, %f407;
	fma.rn.f32 	%f796, %f402, %f793, %f408;
	fma.rn.f32 	%f797, %f402, %f794, %f409;
	sub.f32 	%f798, %f795, %f7;
	sub.f32 	%f799, %f796, %f8;
	sub.f32 	%f800, %f797, %f9;
	mul.f32 	%f801, %f799, %f799;
	fma.rn.f32 	%f802, %f798, %f798, %f801;
	fma.rn.f32 	%f803, %f800, %f800, %f802;
	sqrt.rn.f32 	%f736, %f803;
	rcp.rn.f32 	%f804, %f736;
	mul.f32 	%f732, %f804, %f798;
	mul.f32 	%f733, %f804, %f799;
	mul.f32 	%f734, %f804, %f800;
	ld.global.u32 	%r103, [imageEnabled];
	and.b32  	%r104, %r103, 32;
	setp.eq.s32	%p51, %r104, 0;
	selp.f32	%f805, 0f3F800000, 0f41200000, %p51;
	mul.f32 	%f735, %f805, %f149;
	mov.u32 	%r105, 1065353216;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r91, [root];
	mov.u32 	%r101, 1;
	// inline asm
	call _rt_trace_64, (%r91, %f10, %f11, %f12, %f732, %f733, %f734, %r101, %f735, %f736, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f806, [%rd2];
	add.f32 	%f807, %f1572, %f806;
	ld.local.f32 	%f808, [%rd2+4];
	add.f32 	%f809, %f1571, %f808;
	ld.local.f32 	%f810, [%rd2+8];
	add.f32 	%f811, %f1570, %f810;
	add.s32 	%r106, %r265, 1;
	cvt.rn.f32.s32	%f812, %r106;
	mul.f32 	%f813, %f812, 0f3DD32618;
	cvt.rmi.f32.f32	%f814, %f813;
	sub.f32 	%f815, %f813, %f814;
	mul.f32 	%f816, %f812, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f817, %f816;
	sub.f32 	%f818, %f816, %f817;
	mul.f32 	%f819, %f812, 0f3DC74539;
	cvt.rmi.f32.f32	%f820, %f819;
	sub.f32 	%f821, %f819, %f820;
	add.f32 	%f822, %f818, 0f4199851F;
	add.f32 	%f823, %f821, 0f4199851F;
	add.f32 	%f824, %f815, 0f4199851F;
	mul.f32 	%f825, %f818, %f823;
	fma.rn.f32 	%f826, %f815, %f822, %f825;
	fma.rn.f32 	%f827, %f824, %f821, %f826;
	add.f32 	%f828, %f815, %f827;
	add.f32 	%f829, %f818, %f827;
	add.f32 	%f830, %f821, %f827;
	add.f32 	%f831, %f828, %f829;
	mul.f32 	%f832, %f830, %f831;
	cvt.rmi.f32.f32	%f833, %f832;
	sub.f32 	%f834, %f832, %f833;
	add.f32 	%f835, %f828, %f830;
	mul.f32 	%f836, %f829, %f835;
	cvt.rmi.f32.f32	%f837, %f836;
	sub.f32 	%f838, %f836, %f837;
	add.f32 	%f839, %f829, %f830;
	mul.f32 	%f840, %f828, %f839;
	cvt.rmi.f32.f32	%f841, %f840;
	sub.f32 	%f842, %f840, %f841;
	fma.rn.f32 	%f843, %f834, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f844, %f838, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f845, %f842, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f846, %f402, %f843, %f407;
	fma.rn.f32 	%f847, %f402, %f844, %f408;
	fma.rn.f32 	%f848, %f402, %f845, %f409;
	sub.f32 	%f849, %f846, %f7;
	sub.f32 	%f850, %f847, %f8;
	sub.f32 	%f851, %f848, %f9;
	mul.f32 	%f852, %f850, %f850;
	fma.rn.f32 	%f853, %f849, %f849, %f852;
	fma.rn.f32 	%f854, %f851, %f851, %f853;
	sqrt.rn.f32 	%f744, %f854;
	rcp.rn.f32 	%f855, %f744;
	mul.f32 	%f740, %f855, %f849;
	mul.f32 	%f741, %f855, %f850;
	mul.f32 	%f742, %f855, %f851;
	ld.global.u32 	%r107, [imageEnabled];
	and.b32  	%r108, %r107, 32;
	setp.eq.s32	%p52, %r108, 0;
	selp.f32	%f856, 0f3F800000, 0f41200000, %p52;
	mul.f32 	%f743, %f856, %f149;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r94, [root];
	// inline asm
	call _rt_trace_64, (%r94, %f10, %f11, %f12, %f740, %f741, %f742, %r101, %f743, %f744, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f857, [%rd2];
	add.f32 	%f858, %f807, %f857;
	ld.local.f32 	%f859, [%rd2+4];
	add.f32 	%f860, %f809, %f859;
	ld.local.f32 	%f861, [%rd2+8];
	add.f32 	%f862, %f811, %f861;
	add.s32 	%r109, %r265, 2;
	cvt.rn.f32.s32	%f863, %r109;
	mul.f32 	%f864, %f863, 0f3DD32618;
	cvt.rmi.f32.f32	%f865, %f864;
	sub.f32 	%f866, %f864, %f865;
	mul.f32 	%f867, %f863, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f868, %f867;
	sub.f32 	%f869, %f867, %f868;
	mul.f32 	%f870, %f863, 0f3DC74539;
	cvt.rmi.f32.f32	%f871, %f870;
	sub.f32 	%f872, %f870, %f871;
	add.f32 	%f873, %f869, 0f4199851F;
	add.f32 	%f874, %f872, 0f4199851F;
	add.f32 	%f875, %f866, 0f4199851F;
	mul.f32 	%f876, %f869, %f874;
	fma.rn.f32 	%f877, %f866, %f873, %f876;
	fma.rn.f32 	%f878, %f875, %f872, %f877;
	add.f32 	%f879, %f866, %f878;
	add.f32 	%f880, %f869, %f878;
	add.f32 	%f881, %f872, %f878;
	add.f32 	%f882, %f879, %f880;
	mul.f32 	%f883, %f881, %f882;
	cvt.rmi.f32.f32	%f884, %f883;
	sub.f32 	%f885, %f883, %f884;
	add.f32 	%f886, %f879, %f881;
	mul.f32 	%f887, %f880, %f886;
	cvt.rmi.f32.f32	%f888, %f887;
	sub.f32 	%f889, %f887, %f888;
	add.f32 	%f890, %f880, %f881;
	mul.f32 	%f891, %f879, %f890;
	cvt.rmi.f32.f32	%f892, %f891;
	sub.f32 	%f893, %f891, %f892;
	fma.rn.f32 	%f894, %f885, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f895, %f889, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f896, %f893, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f897, %f402, %f894, %f407;
	fma.rn.f32 	%f898, %f402, %f895, %f408;
	fma.rn.f32 	%f899, %f402, %f896, %f409;
	sub.f32 	%f900, %f897, %f7;
	sub.f32 	%f901, %f898, %f8;
	sub.f32 	%f902, %f899, %f9;
	mul.f32 	%f903, %f901, %f901;
	fma.rn.f32 	%f904, %f900, %f900, %f903;
	fma.rn.f32 	%f905, %f902, %f902, %f904;
	sqrt.rn.f32 	%f752, %f905;
	rcp.rn.f32 	%f906, %f752;
	mul.f32 	%f748, %f906, %f900;
	mul.f32 	%f749, %f906, %f901;
	mul.f32 	%f750, %f906, %f902;
	ld.global.u32 	%r110, [imageEnabled];
	and.b32  	%r111, %r110, 32;
	setp.eq.s32	%p53, %r111, 0;
	selp.f32	%f907, 0f3F800000, 0f41200000, %p53;
	mul.f32 	%f751, %f907, %f149;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r97, [root];
	// inline asm
	call _rt_trace_64, (%r97, %f10, %f11, %f12, %f748, %f749, %f750, %r101, %f751, %f752, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f908, [%rd2];
	add.f32 	%f909, %f858, %f908;
	ld.local.f32 	%f910, [%rd2+4];
	add.f32 	%f911, %f860, %f910;
	ld.local.f32 	%f912, [%rd2+8];
	add.f32 	%f913, %f862, %f912;
	add.s32 	%r112, %r265, 3;
	cvt.rn.f32.s32	%f914, %r112;
	mul.f32 	%f915, %f914, 0f3DD32618;
	cvt.rmi.f32.f32	%f916, %f915;
	sub.f32 	%f917, %f915, %f916;
	mul.f32 	%f918, %f914, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f919, %f918;
	sub.f32 	%f920, %f918, %f919;
	mul.f32 	%f921, %f914, 0f3DC74539;
	cvt.rmi.f32.f32	%f922, %f921;
	sub.f32 	%f923, %f921, %f922;
	add.f32 	%f924, %f920, 0f4199851F;
	add.f32 	%f925, %f923, 0f4199851F;
	add.f32 	%f926, %f917, 0f4199851F;
	mul.f32 	%f927, %f920, %f925;
	fma.rn.f32 	%f928, %f917, %f924, %f927;
	fma.rn.f32 	%f929, %f926, %f923, %f928;
	add.f32 	%f930, %f917, %f929;
	add.f32 	%f931, %f920, %f929;
	add.f32 	%f932, %f923, %f929;
	add.f32 	%f933, %f930, %f931;
	mul.f32 	%f934, %f932, %f933;
	cvt.rmi.f32.f32	%f935, %f934;
	sub.f32 	%f936, %f934, %f935;
	add.f32 	%f937, %f930, %f932;
	mul.f32 	%f938, %f931, %f937;
	cvt.rmi.f32.f32	%f939, %f938;
	sub.f32 	%f940, %f938, %f939;
	add.f32 	%f941, %f931, %f932;
	mul.f32 	%f942, %f930, %f941;
	cvt.rmi.f32.f32	%f943, %f942;
	sub.f32 	%f944, %f942, %f943;
	fma.rn.f32 	%f945, %f936, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f946, %f940, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f947, %f944, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f948, %f402, %f945, %f407;
	fma.rn.f32 	%f949, %f402, %f946, %f408;
	fma.rn.f32 	%f950, %f402, %f947, %f409;
	sub.f32 	%f951, %f948, %f7;
	sub.f32 	%f952, %f949, %f8;
	sub.f32 	%f953, %f950, %f9;
	mul.f32 	%f954, %f952, %f952;
	fma.rn.f32 	%f955, %f951, %f951, %f954;
	fma.rn.f32 	%f956, %f953, %f953, %f955;
	sqrt.rn.f32 	%f760, %f956;
	rcp.rn.f32 	%f957, %f760;
	mul.f32 	%f756, %f957, %f951;
	mul.f32 	%f757, %f957, %f952;
	mul.f32 	%f758, %f957, %f953;
	ld.global.u32 	%r113, [imageEnabled];
	and.b32  	%r114, %r113, 32;
	setp.eq.s32	%p54, %r114, 0;
	selp.f32	%f958, 0f3F800000, 0f41200000, %p54;
	mul.f32 	%f759, %f958, %f149;
	st.local.u32 	[%rd2+8], %r105;
	st.local.u32 	[%rd2+4], %r105;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r100, [root];
	// inline asm
	call _rt_trace_64, (%r100, %f10, %f11, %f12, %f756, %f757, %f758, %r101, %f759, %f760, %rd35, %r44);
	// inline asm
	ld.local.f32 	%f959, [%rd2];
	add.f32 	%f1572, %f909, %f959;
	ld.local.f32 	%f960, [%rd2+4];
	add.f32 	%f1571, %f911, %f960;
	ld.local.f32 	%f961, [%rd2+8];
	add.f32 	%f1570, %f913, %f961;
	add.s32 	%r265, %r265, 4;
	setp.lt.s32	%p55, %r265, %r8;
	@%p55 bra 	BB0_41;

BB0_42:
	cvt.rn.f32.s32	%f962, %r8;
	rcp.rn.f32 	%f963, %f962;
	mul.f32 	%f1573, %f1572, %f963;
	mul.f32 	%f1574, %f1571, %f963;
	mul.f32 	%f1575, %f1570, %f963;
	shr.u32 	%r115, %r6, 31;
	cvt.u16.u32	%rs161, %r115;

BB0_43:
	fma.rn.f32 	%f1531, %f1543, %f1573, %f1531;
	fma.rn.f32 	%f1530, %f1544, %f1574, %f1530;
	fma.rn.f32 	%f1529, %f1545, %f1575, %f1529;
	fma.rn.f32 	%f1528, %f136, %f1573, %f1528;
	fma.rn.f32 	%f1527, %f1547, %f1574, %f1527;
	fma.rn.f32 	%f1526, %f1548, %f1575, %f1526;
	fma.rn.f32 	%f1525, %f139, %f1573, %f1525;
	fma.rn.f32 	%f1524, %f1550, %f1574, %f1524;
	fma.rn.f32 	%f1523, %f1551, %f1575, %f1523;
	fma.rn.f32 	%f1522, %f142, %f1573, %f1522;
	fma.rn.f32 	%f1521, %f1553, %f1574, %f1521;
	fma.rn.f32 	%f1520, %f1554, %f1575, %f1520;
	fma.rn.f32 	%f1519, %f145, %f1573, %f1519;
	fma.rn.f32 	%f1518, %f1556, %f1574, %f1518;
	fma.rn.f32 	%f1517, %f1557, %f1575, %f1517;
	setp.eq.s16	%p56, %rs161, 0;
	@%p56 bra 	BB0_58;

	mov.f32 	%f1509, 0fB5BFBE8E;
	mov.f32 	%f1508, 0fBF317200;
	mov.f32 	%f1507, 0f35BFBE8E;
	mov.f32 	%f1506, 0f3F317200;
	mov.f32 	%f1505, 0f3DAAAABD;
	mov.f32 	%f1504, 0f3C4CAF63;
	mov.f32 	%f1503, 0f3B18F0FE;
	mul.f32 	%f966, %f139, 0f3F000000;
	mul.f32 	%f967, %f142, 0f3F000000;
	mul.f32 	%f968, %f967, %f967;
	fma.rn.f32 	%f969, %f966, %f966, %f968;
	mul.f32 	%f970, %f145, 0f3F000000;
	fma.rn.f32 	%f971, %f970, %f970, %f969;
	sqrt.rn.f32 	%f972, %f971;
	rcp.rn.f32 	%f973, %f972;
	mul.f32 	%f974, %f966, %f973;
	mul.f32 	%f975, %f967, %f973;
	mul.f32 	%f976, %f970, %f973;
	mul.f32 	%f977, %f1514, %f975;
	fma.rn.f32 	%f978, %f1513, %f974, %f977;
	fma.rn.f32 	%f979, %f1515, %f976, %f978;
	fma.rn.f32 	%f198, %f979, 0f3F000000, 0f3F000000;
	add.f32 	%f980, %f972, %f972;
	div.rn.f32 	%f981, %f980, %f136;
	add.f32 	%f199, %f981, 0f3F800000;
	div.rn.f32 	%f982, %f972, %f136;
	mov.f32 	%f983, 0f3F800000;
	sub.f32 	%f984, %f983, %f982;
	add.f32 	%f985, %f982, 0f3F800000;
	div.rn.f32 	%f200, %f984, %f985;
	sub.f32 	%f986, %f983, %f200;
	add.f32 	%f987, %f199, 0f3F800000;
	mul.f32 	%f201, %f987, %f986;
	mul.f32 	%f988, %f199, 0f3F000000;
	cvt.rzi.f32.f32	%f989, %f988;
	add.f32 	%f990, %f989, %f989;
	sub.f32 	%f991, %f199, %f990;
	abs.f32 	%f202, %f991;
	abs.f32 	%f203, %f198;
	setp.lt.f32	%p57, %f203, 0f00800000;
	mul.f32 	%f992, %f203, 0f4B800000;
	selp.f32	%f993, 0fC3170000, 0fC2FE0000, %p57;
	selp.f32	%f994, %f992, %f203, %p57;
	mov.b32 	 %r116, %f994;
	and.b32  	%r117, %r116, 8388607;
	or.b32  	%r118, %r117, 1065353216;
	mov.b32 	 %f995, %r118;
	shr.u32 	%r119, %r116, 23;
	cvt.rn.f32.u32	%f996, %r119;
	add.f32 	%f997, %f993, %f996;
	setp.gt.f32	%p58, %f995, 0f3FB504F3;
	mul.f32 	%f998, %f995, 0f3F000000;
	add.f32 	%f999, %f997, 0f3F800000;
	selp.f32	%f1000, %f998, %f995, %p58;
	selp.f32	%f1001, %f999, %f997, %p58;
	add.f32 	%f1002, %f1000, 0fBF800000;
	add.f32 	%f965, %f1000, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f964,%f965;
	// inline asm
	add.f32 	%f1003, %f1002, %f1002;
	mul.f32 	%f1004, %f964, %f1003;
	mul.f32 	%f1005, %f1004, %f1004;
	fma.rn.f32 	%f1008, %f1503, %f1005, %f1504;
	fma.rn.f32 	%f1010, %f1008, %f1005, %f1505;
	mul.rn.f32 	%f1011, %f1010, %f1005;
	mul.rn.f32 	%f1012, %f1011, %f1004;
	sub.f32 	%f1013, %f1002, %f1004;
	neg.f32 	%f1014, %f1004;
	add.f32 	%f1015, %f1013, %f1013;
	fma.rn.f32 	%f1016, %f1014, %f1002, %f1015;
	mul.rn.f32 	%f1017, %f964, %f1016;
	add.f32 	%f1018, %f1012, %f1004;
	sub.f32 	%f1019, %f1004, %f1018;
	add.f32 	%f1020, %f1012, %f1019;
	add.f32 	%f1021, %f1017, %f1020;
	add.f32 	%f1022, %f1018, %f1021;
	sub.f32 	%f1023, %f1018, %f1022;
	add.f32 	%f1024, %f1021, %f1023;
	mul.rn.f32 	%f1026, %f1001, %f1506;
	mul.rn.f32 	%f1028, %f1001, %f1507;
	add.f32 	%f1029, %f1026, %f1022;
	sub.f32 	%f1030, %f1026, %f1029;
	add.f32 	%f1031, %f1022, %f1030;
	add.f32 	%f1032, %f1024, %f1031;
	add.f32 	%f1033, %f1028, %f1032;
	add.f32 	%f1034, %f1029, %f1033;
	sub.f32 	%f1035, %f1029, %f1034;
	add.f32 	%f1036, %f1033, %f1035;
	abs.f32 	%f204, %f199;
	setp.gt.f32	%p59, %f204, 0f77F684DF;
	mul.f32 	%f1037, %f199, 0f39000000;
	selp.f32	%f1038, %f1037, %f199, %p59;
	mul.rn.f32 	%f1039, %f1038, %f1034;
	neg.f32 	%f1040, %f1039;
	fma.rn.f32 	%f1041, %f1038, %f1034, %f1040;
	fma.rn.f32 	%f1042, %f1038, %f1036, %f1041;
	mov.f32 	%f1043, 0f00000000;
	fma.rn.f32 	%f1044, %f1043, %f1034, %f1042;
	add.rn.f32 	%f1045, %f1039, %f1044;
	neg.f32 	%f1046, %f1045;
	add.rn.f32 	%f1047, %f1039, %f1046;
	add.rn.f32 	%f1048, %f1047, %f1044;
	mov.b32 	 %r120, %f1045;
	setp.eq.s32	%p60, %r120, 1118925336;
	add.s32 	%r121, %r120, -1;
	mov.b32 	 %f1049, %r121;
	add.f32 	%f1050, %f1048, 0f37000000;
	selp.f32	%f1051, %f1049, %f1045, %p60;
	selp.f32	%f205, %f1050, %f1048, %p60;
	mul.f32 	%f1052, %f1051, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1053, %f1052;
	fma.rn.f32 	%f1055, %f1053, %f1508, %f1051;
	fma.rn.f32 	%f1057, %f1053, %f1509, %f1055;
	mul.f32 	%f1058, %f1057, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1059, %f1058;
	add.f32 	%f1060, %f1053, 0f00000000;
	ex2.approx.f32 	%f1061, %f1060;
	mul.f32 	%f1062, %f1059, %f1061;
	setp.lt.f32	%p61, %f1051, 0fC2D20000;
	selp.f32	%f1063, 0f00000000, %f1062, %p61;
	setp.gt.f32	%p62, %f1051, 0f42D20000;
	selp.f32	%f1576, 0f7F800000, %f1063, %p62;
	setp.eq.f32	%p63, %f1576, 0f7F800000;
	@%p63 bra 	BB0_46;

	fma.rn.f32 	%f1576, %f1576, %f205, %f1576;

BB0_46:
	setp.lt.f32	%p64, %f198, 0f00000000;
	setp.eq.f32	%p65, %f202, 0f3F800000;
	and.pred  	%p4, %p64, %p65;
	mov.b32 	 %r122, %f1576;
	xor.b32  	%r123, %r122, -2147483648;
	mov.b32 	 %f1064, %r123;
	selp.f32	%f1578, %f1064, %f1576, %p4;
	setp.eq.f32	%p66, %f198, 0f00000000;
	@%p66 bra 	BB0_49;
	bra.uni 	BB0_47;

BB0_49:
	add.f32 	%f1066, %f198, %f198;
	mov.b32 	 %r124, %f1066;
	selp.b32	%r125, %r124, 0, %p65;
	or.b32  	%r126, %r125, 2139095040;
	setp.lt.f32	%p70, %f199, 0f00000000;
	selp.b32	%r127, %r126, %r125, %p70;
	mov.b32 	 %f1578, %r127;
	bra.uni 	BB0_50;

BB0_47:
	setp.geu.f32	%p67, %f198, 0f00000000;
	@%p67 bra 	BB0_50;

	cvt.rzi.f32.f32	%f1065, %f199;
	setp.neu.f32	%p68, %f1065, %f199;
	selp.f32	%f1578, 0f7FFFFFFF, %f1578, %p68;

BB0_50:
	add.f32 	%f1067, %f203, %f204;
	mov.b32 	 %r128, %f1067;
	setp.lt.s32	%p71, %r128, 2139095040;
	@%p71 bra 	BB0_57;

	setp.gtu.f32	%p72, %f203, 0f7F800000;
	setp.gtu.f32	%p73, %f204, 0f7F800000;
	or.pred  	%p74, %p72, %p73;
	@%p74 bra 	BB0_56;
	bra.uni 	BB0_52;

BB0_56:
	add.f32 	%f1578, %f199, %f198;
	bra.uni 	BB0_57;

BB0_52:
	setp.eq.f32	%p75, %f204, 0f7F800000;
	@%p75 bra 	BB0_55;
	bra.uni 	BB0_53;

BB0_55:
	setp.gt.f32	%p78, %f203, 0f3F800000;
	selp.b32	%r132, 2139095040, 0, %p78;
	xor.b32  	%r133, %r132, 2139095040;
	setp.lt.f32	%p79, %f199, 0f00000000;
	selp.b32	%r134, %r133, %r132, %p79;
	mov.b32 	 %f1068, %r134;
	setp.eq.f32	%p80, %f198, 0fBF800000;
	selp.f32	%f1578, 0f3F800000, %f1068, %p80;
	bra.uni 	BB0_57;

BB0_53:
	setp.neu.f32	%p76, %f203, 0f7F800000;
	@%p76 bra 	BB0_57;

	setp.ltu.f32	%p77, %f199, 0f00000000;
	selp.b32	%r129, 0, 2139095040, %p77;
	or.b32  	%r130, %r129, -2147483648;
	selp.b32	%r131, %r130, %r129, %p4;
	mov.b32 	 %f1578, %r131;

BB0_57:
	setp.eq.f32	%p81, %f199, 0f00000000;
	setp.eq.f32	%p82, %f198, 0f3F800000;
	or.pred  	%p83, %p82, %p81;
	selp.f32	%f1069, 0f3F800000, %f1578, %p83;
	fma.rn.f32 	%f1070, %f201, %f1069, %f200;
	mul.f32 	%f1071, %f136, %f1070;
	div.rn.f32 	%f1072, %f1071, %f398;
	div.rn.f32 	%f1073, %f1072, %f96;
	cvt.sat.f32.f32	%f1074, %f1073;
	mul.f32 	%f1573, %f1573, %f1074;

BB0_58:
	add.f32 	%f1516, %f1516, %f1573;

BB0_59:
	add.s32 	%r261, %r261, 1;
	setp.lt.u32	%p84, %r261, %r4;
	@%p84 bra 	BB0_5;

BB0_60:
	ld.global.u32 	%r267, [imageEnabled];
	and.b32  	%r135, %r267, 8;
	setp.eq.s32	%p85, %r135, 0;
	@%p85 bra 	BB0_73;

	cvt.sat.f32.f32	%f252, %f1516;
	cvt.u64.u32	%rd46, %r3;
	cvt.u64.u32	%rd45, %r2;
	mov.u64 	%rd49, image_Mask;
	cvta.global.u64 	%rd44, %rd49;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1077, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f1078, %f1077;
	fma.rn.f32 	%f1079, %f1078, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f253, %f1079;
	abs.f32 	%f254, %f252;
	setp.lt.f32	%p86, %f254, 0f00800000;
	mul.f32 	%f1080, %f254, 0f4B800000;
	selp.f32	%f1081, 0fC3170000, 0fC2FE0000, %p86;
	selp.f32	%f1082, %f1080, %f254, %p86;
	mov.b32 	 %r138, %f1082;
	and.b32  	%r139, %r138, 8388607;
	or.b32  	%r140, %r139, 1065353216;
	mov.b32 	 %f1083, %r140;
	shr.u32 	%r141, %r138, 23;
	cvt.rn.f32.u32	%f1084, %r141;
	add.f32 	%f1085, %f1081, %f1084;
	setp.gt.f32	%p87, %f1083, 0f3FB504F3;
	mul.f32 	%f1086, %f1083, 0f3F000000;
	add.f32 	%f1087, %f1085, 0f3F800000;
	selp.f32	%f1088, %f1086, %f1083, %p87;
	selp.f32	%f1089, %f1087, %f1085, %p87;
	add.f32 	%f1090, %f1088, 0fBF800000;
	add.f32 	%f1076, %f1088, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1075,%f1076;
	// inline asm
	add.f32 	%f1091, %f1090, %f1090;
	mul.f32 	%f1092, %f1075, %f1091;
	mul.f32 	%f1093, %f1092, %f1092;
	mov.f32 	%f1094, 0f3C4CAF63;
	mov.f32 	%f1095, 0f3B18F0FE;
	fma.rn.f32 	%f1096, %f1095, %f1093, %f1094;
	mov.f32 	%f1097, 0f3DAAAABD;
	fma.rn.f32 	%f1098, %f1096, %f1093, %f1097;
	mul.rn.f32 	%f1099, %f1098, %f1093;
	mul.rn.f32 	%f1100, %f1099, %f1092;
	sub.f32 	%f1101, %f1090, %f1092;
	neg.f32 	%f1102, %f1092;
	add.f32 	%f1103, %f1101, %f1101;
	fma.rn.f32 	%f1104, %f1102, %f1090, %f1103;
	mul.rn.f32 	%f1105, %f1075, %f1104;
	add.f32 	%f1106, %f1100, %f1092;
	sub.f32 	%f1107, %f1092, %f1106;
	add.f32 	%f1108, %f1100, %f1107;
	add.f32 	%f1109, %f1105, %f1108;
	add.f32 	%f1110, %f1106, %f1109;
	sub.f32 	%f1111, %f1106, %f1110;
	add.f32 	%f1112, %f1109, %f1111;
	mov.f32 	%f1113, 0f3F317200;
	mul.rn.f32 	%f1114, %f1089, %f1113;
	mov.f32 	%f1115, 0f35BFBE8E;
	mul.rn.f32 	%f1116, %f1089, %f1115;
	add.f32 	%f1117, %f1114, %f1110;
	sub.f32 	%f1118, %f1114, %f1117;
	add.f32 	%f1119, %f1110, %f1118;
	add.f32 	%f1120, %f1112, %f1119;
	add.f32 	%f1121, %f1116, %f1120;
	add.f32 	%f1122, %f1117, %f1121;
	sub.f32 	%f1123, %f1117, %f1122;
	add.f32 	%f1124, %f1121, %f1123;
	mov.f32 	%f1125, 0f3EE8BA2E;
	mul.rn.f32 	%f1126, %f1125, %f1122;
	neg.f32 	%f1127, %f1126;
	fma.rn.f32 	%f1128, %f1125, %f1122, %f1127;
	fma.rn.f32 	%f1129, %f1125, %f1124, %f1128;
	mov.f32 	%f1130, 0f00000000;
	fma.rn.f32 	%f1131, %f1130, %f1122, %f1129;
	add.rn.f32 	%f1132, %f1126, %f1131;
	neg.f32 	%f1133, %f1132;
	add.rn.f32 	%f1134, %f1126, %f1133;
	add.rn.f32 	%f1135, %f1134, %f1131;
	mov.b32 	 %r142, %f1132;
	setp.eq.s32	%p88, %r142, 1118925336;
	add.s32 	%r143, %r142, -1;
	mov.b32 	 %f1136, %r143;
	add.f32 	%f1137, %f1135, 0f37000000;
	selp.f32	%f1138, %f1136, %f1132, %p88;
	selp.f32	%f255, %f1137, %f1135, %p88;
	mul.f32 	%f1139, %f1138, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1140, %f1139;
	mov.f32 	%f1141, 0fBF317200;
	fma.rn.f32 	%f1142, %f1140, %f1141, %f1138;
	mov.f32 	%f1143, 0fB5BFBE8E;
	fma.rn.f32 	%f1144, %f1140, %f1143, %f1142;
	mul.f32 	%f1145, %f1144, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1146, %f1145;
	add.f32 	%f1147, %f1140, 0f00000000;
	ex2.approx.f32 	%f1148, %f1147;
	mul.f32 	%f1149, %f1146, %f1148;
	setp.lt.f32	%p89, %f1138, 0fC2D20000;
	selp.f32	%f1150, 0f00000000, %f1149, %p89;
	setp.gt.f32	%p90, %f1138, 0f42D20000;
	selp.f32	%f1612, 0f7F800000, %f1150, %p90;
	setp.eq.f32	%p91, %f1612, 0f7F800000;
	@%p91 bra 	BB0_63;

	fma.rn.f32 	%f1612, %f1612, %f255, %f1612;

BB0_63:
	setp.lt.f32	%p92, %f252, 0f00000000;
	setp.eq.f32	%p93, %f253, 0f3F800000;
	and.pred  	%p5, %p92, %p93;
	mov.b32 	 %r144, %f1612;
	xor.b32  	%r145, %r144, -2147483648;
	mov.b32 	 %f1151, %r145;
	selp.f32	%f1614, %f1151, %f1612, %p5;
	setp.eq.f32	%p94, %f252, 0f00000000;
	@%p94 bra 	BB0_66;
	bra.uni 	BB0_64;

BB0_66:
	add.f32 	%f1154, %f252, %f252;
	selp.f32	%f1614, %f1154, 0f00000000, %p93;
	bra.uni 	BB0_67;

BB0_131:
	mov.u64 	%rd190, image_HDR;
	cvta.global.u64 	%rd185, %rd190;
	mov.u32 	%r231, 8;
	// inline asm
	call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r231, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1474, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs107, %f1474;}

	// inline asm
	mov.u16 	%rs108, 0;
	st.v4.u16 	[%rd184], {%rs107, %rs107, %rs107, %rs108};

BB0_132:
	ld.global.u32 	%r232, [additive];
	setp.eq.s32	%p161, %r232, 0;
	@%p161 bra 	BB0_134;

	mov.u64 	%rd203, image_RNM0;
	cvta.global.u64 	%rd192, %rd203;
	mov.u32 	%r236, 8;
	// inline asm
	call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r236, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs115, %rs116, %rs117, %rs118}, [%rd191];
	// inline asm
	{  cvt.f32.f16 %f1475, %rs115;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1476, %rs116;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1477, %rs117;}

	// inline asm
	// inline asm
	call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r236, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1478, %f1475, 0f00000000;
	add.f32 	%f1479, %f1476, 0f00000000;
	add.f32 	%f1480, %f1477, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs114, %f1480;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs113, %f1479;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs112, %f1478;}

	// inline asm
	mov.u16 	%rs119, 0;
	st.v4.u16 	[%rd197], {%rs112, %rs113, %rs114, %rs119};
	bra.uni 	BB0_135;

BB0_134:
	mov.u64 	%rd210, image_RNM0;
	cvta.global.u64 	%rd205, %rd210;
	mov.u32 	%r238, 8;
	// inline asm
	call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r238, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1481, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs120, %f1481;}

	// inline asm
	mov.u16 	%rs121, 0;
	st.v4.u16 	[%rd204], {%rs120, %rs120, %rs120, %rs121};

BB0_135:
	ld.global.u32 	%r239, [additive];
	setp.eq.s32	%p162, %r239, 0;
	@%p162 bra 	BB0_137;

	mov.u64 	%rd223, image_RNM1;
	cvta.global.u64 	%rd212, %rd223;
	mov.u32 	%r243, 8;
	// inline asm
	call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r243, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs128, %rs129, %rs130, %rs131}, [%rd211];
	// inline asm
	{  cvt.f32.f16 %f1482, %rs128;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1483, %rs129;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1484, %rs130;}

	// inline asm
	// inline asm
	call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r243, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1485, %f1482, 0f00000000;
	add.f32 	%f1486, %f1483, 0f00000000;
	add.f32 	%f1487, %f1484, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs127, %f1487;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs126, %f1486;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs125, %f1485;}

	// inline asm
	mov.u16 	%rs132, 0;
	st.v4.u16 	[%rd217], {%rs125, %rs126, %rs127, %rs132};
	bra.uni 	BB0_138;

BB0_137:
	mov.u64 	%rd230, image_RNM1;
	cvta.global.u64 	%rd225, %rd230;
	mov.u32 	%r245, 8;
	// inline asm
	call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r245, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1488, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs133, %f1488;}

	// inline asm
	mov.u16 	%rs134, 0;
	st.v4.u16 	[%rd224], {%rs133, %rs133, %rs133, %rs134};

BB0_138:
	ld.global.u32 	%r246, [additive];
	setp.eq.s32	%p163, %r246, 0;
	@%p163 bra 	BB0_140;

	mov.u64 	%rd243, image_RNM2;
	cvta.global.u64 	%rd232, %rd243;
	mov.u32 	%r250, 8;
	// inline asm
	call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r250, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs141, %rs142, %rs143, %rs144}, [%rd231];
	// inline asm
	{  cvt.f32.f16 %f1489, %rs141;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1490, %rs142;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1491, %rs143;}

	// inline asm
	// inline asm
	call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r250, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1492, %f1489, 0f00000000;
	add.f32 	%f1493, %f1490, 0f00000000;
	add.f32 	%f1494, %f1491, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs140, %f1494;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs139, %f1493;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs138, %f1492;}

	// inline asm
	mov.u16 	%rs145, 0;
	st.v4.u16 	[%rd237], {%rs138, %rs139, %rs140, %rs145};
	bra.uni 	BB0_141;

BB0_140:
	mov.u64 	%rd250, image_RNM2;
	cvta.global.u64 	%rd245, %rd250;
	mov.u32 	%r252, 8;
	// inline asm
	call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r252, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1495, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs146, %f1495;}

	// inline asm
	mov.u16 	%rs147, 0;
	st.v4.u16 	[%rd244], {%rs146, %rs146, %rs146, %rs147};

BB0_141:
	ld.global.u32 	%r253, [additive];
	setp.eq.s32	%p164, %r253, 0;
	@%p164 bra 	BB0_143;

	mov.u64 	%rd263, image_RNM3;
	cvta.global.u64 	%rd252, %rd263;
	mov.u32 	%r257, 8;
	// inline asm
	call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r257, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs154, %rs155, %rs156, %rs157}, [%rd251];
	// inline asm
	{  cvt.f32.f16 %f1496, %rs154;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1497, %rs155;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1498, %rs156;}

	// inline asm
	// inline asm
	call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r257, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1499, %f1496, 0f00000000;
	add.f32 	%f1500, %f1497, 0f00000000;
	add.f32 	%f1501, %f1498, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs153, %f1501;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs152, %f1500;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs151, %f1499;}

	// inline asm
	mov.u16 	%rs158, 0;
	st.v4.u16 	[%rd257], {%rs151, %rs152, %rs153, %rs158};
	bra.uni 	BB0_144;

BB0_143:
	mov.u64 	%rd270, image_RNM3;
	cvta.global.u64 	%rd265, %rd270;
	mov.u32 	%r259, 8;
	// inline asm
	call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r259, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1502, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs159, %f1502;}

	// inline asm
	mov.u16 	%rs160, 0;
	st.v4.u16 	[%rd264], {%rs159, %rs159, %rs159, %rs160};
	bra.uni 	BB0_144;

BB0_64:
	setp.geu.f32	%p95, %f252, 0f00000000;
	@%p95 bra 	BB0_67;

	cvt.rzi.f32.f32	%f1153, %f1125;
	setp.neu.f32	%p96, %f1153, 0f3EE8BA2E;
	selp.f32	%f1614, 0f7FFFFFFF, %f1614, %p96;

BB0_67:
	add.f32 	%f1155, %f254, 0f3EE8BA2E;
	mov.b32 	 %r146, %f1155;
	setp.lt.s32	%p98, %r146, 2139095040;
	@%p98 bra 	BB0_72;

	setp.gtu.f32	%p99, %f254, 0f7F800000;
	@%p99 bra 	BB0_71;
	bra.uni 	BB0_69;

BB0_71:
	add.f32 	%f1614, %f252, 0f3EE8BA2E;
	bra.uni 	BB0_72;

BB0_69:
	setp.neu.f32	%p100, %f254, 0f7F800000;
	@%p100 bra 	BB0_72;

	selp.f32	%f1614, 0fFF800000, 0f7F800000, %p5;

BB0_72:
	mul.f32 	%f1156, %f1614, 0f437F0000;
	setp.eq.f32	%p101, %f252, 0f3F800000;
	selp.f32	%f1157, 0f437F0000, %f1156, %p101;
	cvt.rzi.u32.f32	%r147, %f1157;
	cvt.u16.u32	%rs17, %r147;
	mov.u16 	%rs18, 255;
	st.v2.u8 	[%rd43], {%rs17, %rs18};
	ld.global.u32 	%r267, [imageEnabled];

BB0_73:
	and.b32  	%r148, %r267, 1;
	setp.eq.b32	%p102, %r148, 1;
	@!%p102 bra 	BB0_108;
	bra.uni 	BB0_74;

BB0_74:
	mov.f32 	%f1160, 0f3E666666;
	cvt.rzi.f32.f32	%f1161, %f1160;
	fma.rn.f32 	%f1162, %f1161, 0fC0000000, 0f3EE66666;
	abs.f32 	%f266, %f1162;
	abs.f32 	%f267, %f1531;
	setp.lt.f32	%p103, %f267, 0f00800000;
	mul.f32 	%f1163, %f267, 0f4B800000;
	selp.f32	%f1164, 0fC3170000, 0fC2FE0000, %p103;
	selp.f32	%f1165, %f1163, %f267, %p103;
	mov.b32 	 %r149, %f1165;
	and.b32  	%r150, %r149, 8388607;
	or.b32  	%r151, %r150, 1065353216;
	mov.b32 	 %f1166, %r151;
	shr.u32 	%r152, %r149, 23;
	cvt.rn.f32.u32	%f1167, %r152;
	add.f32 	%f1168, %f1164, %f1167;
	setp.gt.f32	%p104, %f1166, 0f3FB504F3;
	mul.f32 	%f1169, %f1166, 0f3F000000;
	add.f32 	%f1170, %f1168, 0f3F800000;
	selp.f32	%f1171, %f1169, %f1166, %p104;
	selp.f32	%f1172, %f1170, %f1168, %p104;
	add.f32 	%f1173, %f1171, 0fBF800000;
	add.f32 	%f1159, %f1171, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1158,%f1159;
	// inline asm
	add.f32 	%f1174, %f1173, %f1173;
	mul.f32 	%f1175, %f1158, %f1174;
	mul.f32 	%f1176, %f1175, %f1175;
	mov.f32 	%f1177, 0f3C4CAF63;
	mov.f32 	%f1178, 0f3B18F0FE;
	fma.rn.f32 	%f1179, %f1178, %f1176, %f1177;
	mov.f32 	%f1180, 0f3DAAAABD;
	fma.rn.f32 	%f1181, %f1179, %f1176, %f1180;
	mul.rn.f32 	%f1182, %f1181, %f1176;
	mul.rn.f32 	%f1183, %f1182, %f1175;
	sub.f32 	%f1184, %f1173, %f1175;
	neg.f32 	%f1185, %f1175;
	add.f32 	%f1186, %f1184, %f1184;
	fma.rn.f32 	%f1187, %f1185, %f1173, %f1186;
	mul.rn.f32 	%f1188, %f1158, %f1187;
	add.f32 	%f1189, %f1183, %f1175;
	sub.f32 	%f1190, %f1175, %f1189;
	add.f32 	%f1191, %f1183, %f1190;
	add.f32 	%f1192, %f1188, %f1191;
	add.f32 	%f1193, %f1189, %f1192;
	sub.f32 	%f1194, %f1189, %f1193;
	add.f32 	%f1195, %f1192, %f1194;
	mov.f32 	%f1196, 0f3F317200;
	mul.rn.f32 	%f1197, %f1172, %f1196;
	mov.f32 	%f1198, 0f35BFBE8E;
	mul.rn.f32 	%f1199, %f1172, %f1198;
	add.f32 	%f1200, %f1197, %f1193;
	sub.f32 	%f1201, %f1197, %f1200;
	add.f32 	%f1202, %f1193, %f1201;
	add.f32 	%f1203, %f1195, %f1202;
	add.f32 	%f1204, %f1199, %f1203;
	add.f32 	%f1205, %f1200, %f1204;
	sub.f32 	%f1206, %f1200, %f1205;
	add.f32 	%f1207, %f1204, %f1206;
	mov.f32 	%f1208, 0f3EE66666;
	mul.rn.f32 	%f1209, %f1208, %f1205;
	neg.f32 	%f1210, %f1209;
	fma.rn.f32 	%f1211, %f1208, %f1205, %f1210;
	fma.rn.f32 	%f1212, %f1208, %f1207, %f1211;
	mov.f32 	%f1213, 0f00000000;
	fma.rn.f32 	%f1214, %f1213, %f1205, %f1212;
	add.rn.f32 	%f1215, %f1209, %f1214;
	neg.f32 	%f1216, %f1215;
	add.rn.f32 	%f1217, %f1209, %f1216;
	add.rn.f32 	%f1218, %f1217, %f1214;
	mov.b32 	 %r153, %f1215;
	setp.eq.s32	%p105, %r153, 1118925336;
	add.s32 	%r154, %r153, -1;
	mov.b32 	 %f1219, %r154;
	add.f32 	%f1220, %f1218, 0f37000000;
	selp.f32	%f1221, %f1219, %f1215, %p105;
	selp.f32	%f268, %f1220, %f1218, %p105;
	mul.f32 	%f1222, %f1221, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1223, %f1222;
	mov.f32 	%f1224, 0fBF317200;
	fma.rn.f32 	%f1225, %f1223, %f1224, %f1221;
	mov.f32 	%f1226, 0fB5BFBE8E;
	fma.rn.f32 	%f1227, %f1223, %f1226, %f1225;
	mul.f32 	%f1228, %f1227, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1229, %f1228;
	add.f32 	%f1230, %f1223, 0f00000000;
	ex2.approx.f32 	%f1231, %f1230;
	mul.f32 	%f1232, %f1229, %f1231;
	setp.lt.f32	%p106, %f1221, 0fC2D20000;
	selp.f32	%f1233, 0f00000000, %f1232, %p106;
	setp.gt.f32	%p107, %f1221, 0f42D20000;
	selp.f32	%f1615, 0f7F800000, %f1233, %p107;
	setp.eq.f32	%p108, %f1615, 0f7F800000;
	@%p108 bra 	BB0_76;

	fma.rn.f32 	%f1615, %f1615, %f268, %f1615;

BB0_76:
	setp.lt.f32	%p109, %f1531, 0f00000000;
	setp.eq.f32	%p110, %f266, 0f3F800000;
	and.pred  	%p6, %p109, %p110;
	mov.b32 	 %r155, %f1615;
	xor.b32  	%r156, %r155, -2147483648;
	mov.b32 	 %f1234, %r156;
	selp.f32	%f1617, %f1234, %f1615, %p6;
	setp.eq.f32	%p111, %f1531, 0f00000000;
	@%p111 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f1237, %f1531, %f1531;
	selp.f32	%f1617, %f1237, 0f00000000, %p110;
	bra.uni 	BB0_80;

BB0_77:
	setp.geu.f32	%p112, %f1531, 0f00000000;
	@%p112 bra 	BB0_80;

	cvt.rzi.f32.f32	%f1236, %f1208;
	setp.neu.f32	%p113, %f1236, 0f3EE66666;
	selp.f32	%f1617, 0f7FFFFFFF, %f1617, %p113;

BB0_80:
	add.f32 	%f1238, %f267, 0f3EE66666;
	mov.b32 	 %r157, %f1238;
	setp.lt.s32	%p115, %r157, 2139095040;
	@%p115 bra 	BB0_85;

	setp.gtu.f32	%p116, %f267, 0f7F800000;
	@%p116 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f1617, %f1531, 0f3EE66666;
	bra.uni 	BB0_85;

BB0_82:
	setp.neu.f32	%p117, %f267, 0f7F800000;
	@%p117 bra 	BB0_85;

	selp.f32	%f1617, 0fFF800000, 0f7F800000, %p6;

BB0_85:
	setp.eq.f32	%p118, %f1531, 0f3F800000;
	selp.f32	%f279, 0f3F800000, %f1617, %p118;
	abs.f32 	%f280, %f1530;
	setp.lt.f32	%p119, %f280, 0f00800000;
	mul.f32 	%f1241, %f280, 0f4B800000;
	selp.f32	%f1242, 0fC3170000, 0fC2FE0000, %p119;
	selp.f32	%f1243, %f1241, %f280, %p119;
	mov.b32 	 %r158, %f1243;
	and.b32  	%r159, %r158, 8388607;
	or.b32  	%r160, %r159, 1065353216;
	mov.b32 	 %f1244, %r160;
	shr.u32 	%r161, %r158, 23;
	cvt.rn.f32.u32	%f1245, %r161;
	add.f32 	%f1246, %f1242, %f1245;
	setp.gt.f32	%p120, %f1244, 0f3FB504F3;
	mul.f32 	%f1247, %f1244, 0f3F000000;
	add.f32 	%f1248, %f1246, 0f3F800000;
	selp.f32	%f1249, %f1247, %f1244, %p120;
	selp.f32	%f1250, %f1248, %f1246, %p120;
	add.f32 	%f1251, %f1249, 0fBF800000;
	add.f32 	%f1240, %f1249, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1239,%f1240;
	// inline asm
	add.f32 	%f1252, %f1251, %f1251;
	mul.f32 	%f1253, %f1239, %f1252;
	mul.f32 	%f1254, %f1253, %f1253;
	fma.rn.f32 	%f1257, %f1178, %f1254, %f1177;
	fma.rn.f32 	%f1259, %f1257, %f1254, %f1180;
	mul.rn.f32 	%f1260, %f1259, %f1254;
	mul.rn.f32 	%f1261, %f1260, %f1253;
	sub.f32 	%f1262, %f1251, %f1253;
	neg.f32 	%f1263, %f1253;
	add.f32 	%f1264, %f1262, %f1262;
	fma.rn.f32 	%f1265, %f1263, %f1251, %f1264;
	mul.rn.f32 	%f1266, %f1239, %f1265;
	add.f32 	%f1267, %f1261, %f1253;
	sub.f32 	%f1268, %f1253, %f1267;
	add.f32 	%f1269, %f1261, %f1268;
	add.f32 	%f1270, %f1266, %f1269;
	add.f32 	%f1271, %f1267, %f1270;
	sub.f32 	%f1272, %f1267, %f1271;
	add.f32 	%f1273, %f1270, %f1272;
	mul.rn.f32 	%f1275, %f1250, %f1196;
	mul.rn.f32 	%f1277, %f1250, %f1198;
	add.f32 	%f1278, %f1275, %f1271;
	sub.f32 	%f1279, %f1275, %f1278;
	add.f32 	%f1280, %f1271, %f1279;
	add.f32 	%f1281, %f1273, %f1280;
	add.f32 	%f1282, %f1277, %f1281;
	add.f32 	%f1283, %f1278, %f1282;
	sub.f32 	%f1284, %f1278, %f1283;
	add.f32 	%f1285, %f1282, %f1284;
	mul.rn.f32 	%f1287, %f1208, %f1283;
	neg.f32 	%f1288, %f1287;
	fma.rn.f32 	%f1289, %f1208, %f1283, %f1288;
	fma.rn.f32 	%f1290, %f1208, %f1285, %f1289;
	fma.rn.f32 	%f1292, %f1213, %f1283, %f1290;
	add.rn.f32 	%f1293, %f1287, %f1292;
	neg.f32 	%f1294, %f1293;
	add.rn.f32 	%f1295, %f1287, %f1294;
	add.rn.f32 	%f1296, %f1295, %f1292;
	mov.b32 	 %r162, %f1293;
	setp.eq.s32	%p121, %r162, 1118925336;
	add.s32 	%r163, %r162, -1;
	mov.b32 	 %f1297, %r163;
	add.f32 	%f1298, %f1296, 0f37000000;
	selp.f32	%f1299, %f1297, %f1293, %p121;
	selp.f32	%f281, %f1298, %f1296, %p121;
	mul.f32 	%f1300, %f1299, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1301, %f1300;
	fma.rn.f32 	%f1303, %f1301, %f1224, %f1299;
	fma.rn.f32 	%f1305, %f1301, %f1226, %f1303;
	mul.f32 	%f1306, %f1305, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1307, %f1306;
	add.f32 	%f1308, %f1301, 0f00000000;
	ex2.approx.f32 	%f1309, %f1308;
	mul.f32 	%f1310, %f1307, %f1309;
	setp.lt.f32	%p122, %f1299, 0fC2D20000;
	selp.f32	%f1311, 0f00000000, %f1310, %p122;
	setp.gt.f32	%p123, %f1299, 0f42D20000;
	selp.f32	%f1618, 0f7F800000, %f1311, %p123;
	setp.eq.f32	%p124, %f1618, 0f7F800000;
	@%p124 bra 	BB0_87;

	fma.rn.f32 	%f1618, %f1618, %f281, %f1618;

BB0_87:
	setp.lt.f32	%p125, %f1530, 0f00000000;
	and.pred  	%p7, %p125, %p110;
	mov.b32 	 %r164, %f1618;
	xor.b32  	%r165, %r164, -2147483648;
	mov.b32 	 %f1312, %r165;
	selp.f32	%f1620, %f1312, %f1618, %p7;
	setp.eq.f32	%p127, %f1530, 0f00000000;
	@%p127 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f1315, %f1530, %f1530;
	selp.f32	%f1620, %f1315, 0f00000000, %p110;
	bra.uni 	BB0_91;

BB0_88:
	setp.geu.f32	%p128, %f1530, 0f00000000;
	@%p128 bra 	BB0_91;

	cvt.rzi.f32.f32	%f1314, %f1208;
	setp.neu.f32	%p129, %f1314, 0f3EE66666;
	selp.f32	%f1620, 0f7FFFFFFF, %f1620, %p129;

BB0_91:
	add.f32 	%f1316, %f280, 0f3EE66666;
	mov.b32 	 %r166, %f1316;
	setp.lt.s32	%p131, %r166, 2139095040;
	@%p131 bra 	BB0_96;

	setp.gtu.f32	%p132, %f280, 0f7F800000;
	@%p132 bra 	BB0_95;
	bra.uni 	BB0_93;

BB0_95:
	add.f32 	%f1620, %f1530, 0f3EE66666;
	bra.uni 	BB0_96;

BB0_93:
	setp.neu.f32	%p133, %f280, 0f7F800000;
	@%p133 bra 	BB0_96;

	selp.f32	%f1620, 0fFF800000, 0f7F800000, %p7;

BB0_96:
	setp.eq.f32	%p134, %f1530, 0f3F800000;
	selp.f32	%f292, 0f3F800000, %f1620, %p134;
	abs.f32 	%f293, %f1529;
	setp.lt.f32	%p135, %f293, 0f00800000;
	mul.f32 	%f1319, %f293, 0f4B800000;
	selp.f32	%f1320, 0fC3170000, 0fC2FE0000, %p135;
	selp.f32	%f1321, %f1319, %f293, %p135;
	mov.b32 	 %r167, %f1321;
	and.b32  	%r168, %r167, 8388607;
	or.b32  	%r169, %r168, 1065353216;
	mov.b32 	 %f1322, %r169;
	shr.u32 	%r170, %r167, 23;
	cvt.rn.f32.u32	%f1323, %r170;
	add.f32 	%f1324, %f1320, %f1323;
	setp.gt.f32	%p136, %f1322, 0f3FB504F3;
	mul.f32 	%f1325, %f1322, 0f3F000000;
	add.f32 	%f1326, %f1324, 0f3F800000;
	selp.f32	%f1327, %f1325, %f1322, %p136;
	selp.f32	%f1328, %f1326, %f1324, %p136;
	add.f32 	%f1329, %f1327, 0fBF800000;
	add.f32 	%f1318, %f1327, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1317,%f1318;
	// inline asm
	add.f32 	%f1330, %f1329, %f1329;
	mul.f32 	%f1331, %f1317, %f1330;
	mul.f32 	%f1332, %f1331, %f1331;
	fma.rn.f32 	%f1335, %f1178, %f1332, %f1177;
	fma.rn.f32 	%f1337, %f1335, %f1332, %f1180;
	mul.rn.f32 	%f1338, %f1337, %f1332;
	mul.rn.f32 	%f1339, %f1338, %f1331;
	sub.f32 	%f1340, %f1329, %f1331;
	neg.f32 	%f1341, %f1331;
	add.f32 	%f1342, %f1340, %f1340;
	fma.rn.f32 	%f1343, %f1341, %f1329, %f1342;
	mul.rn.f32 	%f1344, %f1317, %f1343;
	add.f32 	%f1345, %f1339, %f1331;
	sub.f32 	%f1346, %f1331, %f1345;
	add.f32 	%f1347, %f1339, %f1346;
	add.f32 	%f1348, %f1344, %f1347;
	add.f32 	%f1349, %f1345, %f1348;
	sub.f32 	%f1350, %f1345, %f1349;
	add.f32 	%f1351, %f1348, %f1350;
	mul.rn.f32 	%f1353, %f1328, %f1196;
	mul.rn.f32 	%f1355, %f1328, %f1198;
	add.f32 	%f1356, %f1353, %f1349;
	sub.f32 	%f1357, %f1353, %f1356;
	add.f32 	%f1358, %f1349, %f1357;
	add.f32 	%f1359, %f1351, %f1358;
	add.f32 	%f1360, %f1355, %f1359;
	add.f32 	%f1361, %f1356, %f1360;
	sub.f32 	%f1362, %f1356, %f1361;
	add.f32 	%f1363, %f1360, %f1362;
	mul.rn.f32 	%f1365, %f1208, %f1361;
	neg.f32 	%f1366, %f1365;
	fma.rn.f32 	%f1367, %f1208, %f1361, %f1366;
	fma.rn.f32 	%f1368, %f1208, %f1363, %f1367;
	fma.rn.f32 	%f1370, %f1213, %f1361, %f1368;
	add.rn.f32 	%f1371, %f1365, %f1370;
	neg.f32 	%f1372, %f1371;
	add.rn.f32 	%f1373, %f1365, %f1372;
	add.rn.f32 	%f1374, %f1373, %f1370;
	mov.b32 	 %r171, %f1371;
	setp.eq.s32	%p137, %r171, 1118925336;
	add.s32 	%r172, %r171, -1;
	mov.b32 	 %f1375, %r172;
	add.f32 	%f1376, %f1374, 0f37000000;
	selp.f32	%f1377, %f1375, %f1371, %p137;
	selp.f32	%f294, %f1376, %f1374, %p137;
	mul.f32 	%f1378, %f1377, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1379, %f1378;
	fma.rn.f32 	%f1381, %f1379, %f1224, %f1377;
	fma.rn.f32 	%f1383, %f1379, %f1226, %f1381;
	mul.f32 	%f1384, %f1383, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1385, %f1384;
	add.f32 	%f1386, %f1379, 0f00000000;
	ex2.approx.f32 	%f1387, %f1386;
	mul.f32 	%f1388, %f1385, %f1387;
	setp.lt.f32	%p138, %f1377, 0fC2D20000;
	selp.f32	%f1389, 0f00000000, %f1388, %p138;
	setp.gt.f32	%p139, %f1377, 0f42D20000;
	selp.f32	%f1621, 0f7F800000, %f1389, %p139;
	setp.eq.f32	%p140, %f1621, 0f7F800000;
	@%p140 bra 	BB0_98;

	fma.rn.f32 	%f1621, %f1621, %f294, %f1621;

BB0_98:
	setp.lt.f32	%p141, %f1529, 0f00000000;
	and.pred  	%p8, %p141, %p110;
	mov.b32 	 %r173, %f1621;
	xor.b32  	%r174, %r173, -2147483648;
	mov.b32 	 %f1390, %r174;
	selp.f32	%f1623, %f1390, %f1621, %p8;
	setp.eq.f32	%p143, %f1529, 0f00000000;
	@%p143 bra 	BB0_101;
	bra.uni 	BB0_99;

BB0_101:
	add.f32 	%f1393, %f1529, %f1529;
	selp.f32	%f1623, %f1393, 0f00000000, %p110;
	bra.uni 	BB0_102;

BB0_99:
	setp.geu.f32	%p144, %f1529, 0f00000000;
	@%p144 bra 	BB0_102;

	cvt.rzi.f32.f32	%f1392, %f1208;
	setp.neu.f32	%p145, %f1392, 0f3EE66666;
	selp.f32	%f1623, 0f7FFFFFFF, %f1623, %p145;

BB0_102:
	add.f32 	%f1394, %f293, 0f3EE66666;
	mov.b32 	 %r175, %f1394;
	setp.lt.s32	%p147, %r175, 2139095040;
	@%p147 bra 	BB0_107;

	setp.gtu.f32	%p148, %f293, 0f7F800000;
	@%p148 bra 	BB0_106;
	bra.uni 	BB0_104;

BB0_106:
	add.f32 	%f1623, %f1529, 0f3EE66666;
	bra.uni 	BB0_107;

BB0_104:
	setp.neu.f32	%p149, %f293, 0f7F800000;
	@%p149 bra 	BB0_107;

	selp.f32	%f1623, 0fFF800000, 0f7F800000, %p8;

BB0_107:
	mov.u32 	%r260, 4;
	setp.eq.f32	%p150, %f1529, 0f3F800000;
	selp.f32	%f1395, 0f3F800000, %f1623, %p150;
	cvt.u64.u32	%rd53, %r3;
	cvt.u64.u32	%rd52, %r2;
	mov.u64 	%rd56, image;
	cvta.global.u64 	%rd51, %rd56;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r260, %rd52, %rd53, %rd13, %rd13);
	// inline asm
	cvt.sat.f32.f32	%f1396, %f1395;
	mul.f32 	%f1397, %f1396, 0f437FFD71;
	cvt.rzi.u32.f32	%r178, %f1397;
	cvt.sat.f32.f32	%f1398, %f292;
	mul.f32 	%f1399, %f1398, 0f437FFD71;
	cvt.rzi.u32.f32	%r179, %f1399;
	cvt.sat.f32.f32	%f1400, %f279;
	mul.f32 	%f1401, %f1400, 0f437FFD71;
	cvt.rzi.u32.f32	%r180, %f1401;
	cvt.u16.u32	%rs19, %r178;
	cvt.u16.u32	%rs20, %r180;
	cvt.u16.u32	%rs21, %r179;
	mov.u16 	%rs22, 255;
	st.v4.u8 	[%rd50], {%rs19, %rs21, %rs20, %rs22};
	ld.global.u32 	%r267, [imageEnabled];

BB0_108:
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	and.b32  	%r181, %r267, 4;
	setp.eq.s32	%p151, %r181, 0;
	@%p151 bra 	BB0_112;

	ld.global.u32 	%r182, [additive];
	setp.eq.s32	%p152, %r182, 0;
	mov.f32 	%f1402, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f1402;}

	// inline asm
	@%p152 bra 	BB0_111;

	mov.u64 	%rd69, image_HDR;
	cvta.global.u64 	%rd58, %rd69;
	mov.u32 	%r186, 8;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r186, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd57];
	// inline asm
	{  cvt.f32.f16 %f1403, %rs30;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1404, %rs31;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1405, %rs32;}

	// inline asm
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r186, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1406, %f1531, %f1403;
	add.f32 	%f1407, %f1530, %f1404;
	add.f32 	%f1408, %f1529, %f1405;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f1408;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f1407;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f1406;}

	// inline asm
	st.v4.u16 	[%rd63], {%rs27, %rs28, %rs29, %rs23};
	bra.uni 	BB0_112;

BB0_111:
	mov.u64 	%rd76, image_HDR;
	cvta.global.u64 	%rd71, %rd76;
	mov.u32 	%r188, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r188, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f1529;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs35, %f1530;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f1531;}

	// inline asm
	st.v4.u16 	[%rd70], {%rs34, %rs35, %rs36, %rs23};

BB0_112:
	mov.f32 	%f1413, 0f34000000;
	max.f32 	%f1414, %f1528, %f1413;
	div.rn.f32 	%f1415, %f1525, %f1414;
	max.f32 	%f1416, %f1527, %f1413;
	div.rn.f32 	%f1417, %f1524, %f1416;
	max.f32 	%f1418, %f1526, %f1413;
	div.rn.f32 	%f1419, %f1523, %f1418;
	fma.rn.f32 	%f305, %f1415, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f306, %f1417, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f307, %f1419, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f1420, %f1522, %f1414;
	div.rn.f32 	%f1421, %f1521, %f1416;
	div.rn.f32 	%f1422, %f1520, %f1418;
	fma.rn.f32 	%f308, %f1420, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f309, %f1421, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f310, %f1422, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f1423, %f1519, %f1414;
	div.rn.f32 	%f1424, %f1518, %f1416;
	div.rn.f32 	%f1425, %f1517, %f1418;
	fma.rn.f32 	%f311, %f1423, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f312, %f1424, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f313, %f1425, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r189, [additive];
	setp.eq.s32	%p153, %r189, 0;
	mov.f32 	%f1412, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs37, %f1412;}

	// inline asm
	@%p153 bra 	BB0_114;

	mov.u64 	%rd89, image_RNM0;
	cvta.global.u64 	%rd78, %rd89;
	mov.u32 	%r193, 8;
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r193, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs44, %rs45, %rs46, %rs47}, [%rd77];
	// inline asm
	{  cvt.f32.f16 %f1426, %rs44;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1427, %rs45;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1428, %rs46;}

	// inline asm
	// inline asm
	call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r193, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1429, %f1528, %f1426;
	add.f32 	%f1430, %f1527, %f1427;
	add.f32 	%f1431, %f1526, %f1428;
	// inline asm
	{  cvt.rn.f16.f32 %rs43, %f1431;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs42, %f1430;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs41, %f1429;}

	// inline asm
	st.v4.u16 	[%rd83], {%rs41, %rs42, %rs43, %rs37};
	bra.uni 	BB0_115;

BB0_114:
	mov.u64 	%rd96, image_RNM0;
	cvta.global.u64 	%rd91, %rd96;
	mov.u32 	%r195, 8;
	// inline asm
	call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r195, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f1526;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs49, %f1527;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs48, %f1528;}

	// inline asm
	st.v4.u16 	[%rd90], {%rs48, %rs49, %rs50, %rs37};

BB0_115:
	ld.global.u32 	%r196, [additive];
	setp.eq.s32	%p154, %r196, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1412;}

	// inline asm
	@%p154 bra 	BB0_117;

	mov.u64 	%rd109, image_RNM1;
	cvta.global.u64 	%rd98, %rd109;
	mov.u32 	%r200, 8;
	// inline asm
	call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r200, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs58, %rs59, %rs60, %rs61}, [%rd97];
	// inline asm
	{  cvt.f32.f16 %f1436, %rs58;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1437, %rs59;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1438, %rs60;}

	// inline asm
	// inline asm
	call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r200, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1439, %f305, %f1436;
	add.f32 	%f1440, %f306, %f1437;
	add.f32 	%f1441, %f307, %f1438;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f1441;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs56, %f1440;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs55, %f1439;}

	// inline asm
	st.v4.u16 	[%rd103], {%rs55, %rs56, %rs57, %rs51};
	bra.uni 	BB0_118;

BB0_117:
	mov.u64 	%rd116, image_RNM1;
	cvta.global.u64 	%rd111, %rd116;
	mov.u32 	%r202, 8;
	// inline asm
	call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r202, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f307;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs63, %f306;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs62, %f305;}

	// inline asm
	st.v4.u16 	[%rd110], {%rs62, %rs63, %rs64, %rs51};

BB0_118:
	ld.global.u32 	%r203, [additive];
	setp.eq.s32	%p155, %r203, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f1412;}

	// inline asm
	@%p155 bra 	BB0_120;

	mov.u64 	%rd129, image_RNM2;
	cvta.global.u64 	%rd118, %rd129;
	mov.u32 	%r207, 8;
	// inline asm
	call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r207, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs72, %rs73, %rs74, %rs75}, [%rd117];
	// inline asm
	{  cvt.f32.f16 %f1446, %rs72;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1447, %rs73;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1448, %rs74;}

	// inline asm
	// inline asm
	call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r207, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1449, %f308, %f1446;
	add.f32 	%f1450, %f309, %f1447;
	add.f32 	%f1451, %f310, %f1448;
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f1451;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs70, %f1450;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs69, %f1449;}

	// inline asm
	st.v4.u16 	[%rd123], {%rs69, %rs70, %rs71, %rs65};
	bra.uni 	BB0_121;

BB0_120:
	mov.u64 	%rd136, image_RNM2;
	cvta.global.u64 	%rd131, %rd136;
	mov.u32 	%r209, 8;
	// inline asm
	call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r209, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs78, %f310;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs77, %f309;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs76, %f308;}

	// inline asm
	st.v4.u16 	[%rd130], {%rs76, %rs77, %rs78, %rs65};

BB0_121:
	ld.global.u32 	%r210, [additive];
	setp.eq.s32	%p156, %r210, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs79, %f1412;}

	// inline asm
	@%p156 bra 	BB0_123;

	mov.u64 	%rd149, image_RNM3;
	cvta.global.u64 	%rd138, %rd149;
	mov.u32 	%r214, 8;
	// inline asm
	call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r214, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs86, %rs87, %rs88, %rs89}, [%rd137];
	// inline asm
	{  cvt.f32.f16 %f1456, %rs86;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1457, %rs87;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1458, %rs88;}

	// inline asm
	// inline asm
	call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r214, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1459, %f311, %f1456;
	add.f32 	%f1460, %f312, %f1457;
	add.f32 	%f1461, %f313, %f1458;
	// inline asm
	{  cvt.rn.f16.f32 %rs85, %f1461;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs84, %f1460;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs83, %f1459;}

	// inline asm
	st.v4.u16 	[%rd143], {%rs83, %rs84, %rs85, %rs79};
	bra.uni 	BB0_144;

BB0_123:
	mov.u64 	%rd156, image_RNM3;
	cvta.global.u64 	%rd151, %rd156;
	mov.u32 	%r216, 8;
	// inline asm
	call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r216, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs92, %f313;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f312;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs90, %f311;}

	// inline asm
	st.v4.u16 	[%rd150], {%rs90, %rs91, %rs92, %rs79};

BB0_144:
	ret;
}