//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__closesthit__oxMain
.const .align 16 .b8 params[1184];

.visible .entry __closesthit__oxMain()
{
	.reg .pred 	%p<20>;
	.reg .b16 	%rs<9>;
	.reg .f32 	%f<141>;
	.reg .b32 	%r<35>;
	.reg .b64 	%rd<3>;


	// begin inline asm
	call (%r2), _optix_read_primitive_idx, ();
	// end inline asm
	// begin inline asm
	call (%f23, %f24), _optix_get_triangle_barycentrics, ();
	// end inline asm
	mov.u32 	%r4, 0;
	// begin inline asm
	call (%rd1), _optix_call_direct_callable,(%r4);
	// end inline asm
	{ // callseq 0, 0
	.reg .b32 temp_param_reg;
	.param .b32 param0;
	st.param.b32 	[param0+0], %r2;
	.param .align 8 .b8 param1[8];
	st.param.v2.f32 	[param1+0], {%f23, %f24};
	.param .align 8 .b8 retval0[32];
	prototype_0 : .callprototype (.param .align 8 .b8 _[32]) _ (.param .b32 _, .param .align 8 .b8 _[8]);
	call (retval0), 
	%rd1, 
	(
	param0, 
	param1
	)
	, prototype_0;
	ld.param.v2.f32 	{%f1, %f2}, [retval0+0];
	ld.param.f32 	%f3, [retval0+8];
	ld.param.v4.b8 	{%rs1, %rs2, %rs3, %rs4}, [retval0+12];
	ld.param.v2.f32 	{%f7, %f5}, [retval0+16];
	ld.param.f32 	%f6, [retval0+24];
	ld.param.v4.b8 	{%rs5, %rs6, %rs7, %rs8}, [retval0+28];
	} // callseq 0
	mov.u32 	%r6, 1;
	div.rn.f32 	%f29, %f7, 0f41200000;
	mov.b32 	%r10, %f29;
	and.b32  	%r11, %r10, -2147483648;
	or.b32  	%r12, %r11, 1056964608;
	mov.b32 	%f30, %r12;
	add.rz.f32 	%f31, %f29, %f30;
	cvt.rzi.f32.f32 	%f32, %f31;
	cvt.rzi.s32.f32 	%r1, %f32;
	// begin inline asm
	call (%f25), _optix_get_world_ray_direction_x, ();
	// end inline asm
	// begin inline asm
	call (%f26), _optix_get_world_ray_direction_y, ();
	// end inline asm
	// begin inline asm
	call (%f27), _optix_get_world_ray_direction_z, ();
	// end inline asm
	mul.f32 	%f33, %f2, %f26;
	fma.rn.f32 	%f34, %f1, %f25, %f33;
	fma.rn.f32 	%f35, %f3, %f27, %f34;
	setp.gt.f32 	%p2, %f35, 0f00000000;
	// begin inline asm
	call (%f28), _optix_get_ray_tmax, ();
	// end inline asm
	mov.u32 	%r9, -1082130432;
	// begin inline asm
	call _optix_set_payload, (%r4, %r9);
	// end inline asm
	// begin inline asm
	call _optix_set_payload, (%r6, %r9);
	// end inline asm
	mov.u32 	%r8, 2;
	// begin inline asm
	call _optix_set_payload, (%r8, %r9);
	// end inline asm
	ld.const.u32 	%r13, [params+664];
	setp.ne.s32 	%p3, %r1, %r13;
	or.pred  	%p4, %p2, %p3;
	@%p4 bra 	$L__BB0_14;

	ld.const.f32 	%f37, [params+660];
	mul.f32 	%f10, %f28, %f37;
	mov.f32 	%f38, 0f40000000;
	cvt.rzi.f32.f32 	%f39, %f38;
	add.f32 	%f40, %f39, %f39;
	mov.f32 	%f41, 0f40800000;
	sub.f32 	%f42, %f41, %f40;
	abs.f32 	%f11, %f42;
	abs.f32 	%f12, %f10;
	setp.lt.f32 	%p5, %f12, 0f00800000;
	mul.f32 	%f43, %f12, 0f4B800000;
	selp.f32 	%f44, %f43, %f12, %p5;
	selp.f32 	%f45, 0fC3170000, 0fC2FE0000, %p5;
	mov.b32 	%r14, %f44;
	and.b32  	%r15, %r14, 8388607;
	or.b32  	%r16, %r15, 1065353216;
	mov.b32 	%f46, %r16;
	shr.u32 	%r17, %r14, 23;
	cvt.rn.f32.u32 	%f47, %r17;
	add.f32 	%f48, %f45, %f47;
	setp.gt.f32 	%p6, %f46, 0f3FB504F3;
	mul.f32 	%f49, %f46, 0f3F000000;
	add.f32 	%f50, %f48, 0f3F800000;
	selp.f32 	%f51, %f50, %f48, %p6;
	selp.f32 	%f52, %f49, %f46, %p6;
	add.f32 	%f53, %f52, 0fBF800000;
	add.f32 	%f54, %f52, 0f3F800000;
	rcp.approx.ftz.f32 	%f55, %f54;
	add.f32 	%f56, %f53, %f53;
	mul.f32 	%f57, %f56, %f55;
	mul.f32 	%f58, %f57, %f57;
	mov.f32 	%f59, 0f3C4CAF63;
	mov.f32 	%f60, 0f3B18F0FE;
	fma.rn.f32 	%f61, %f60, %f58, %f59;
	mov.f32 	%f62, 0f3DAAAABD;
	fma.rn.f32 	%f63, %f61, %f58, %f62;
	mul.rn.f32 	%f64, %f63, %f58;
	mul.rn.f32 	%f65, %f64, %f57;
	sub.f32 	%f66, %f53, %f57;
	add.f32 	%f67, %f66, %f66;
	neg.f32 	%f68, %f57;
	fma.rn.f32 	%f69, %f68, %f53, %f67;
	mul.rn.f32 	%f70, %f55, %f69;
	add.f32 	%f71, %f65, %f57;
	sub.f32 	%f72, %f57, %f71;
	add.f32 	%f73, %f65, %f72;
	add.f32 	%f74, %f70, %f73;
	add.f32 	%f75, %f71, %f74;
	sub.f32 	%f76, %f71, %f75;
	add.f32 	%f77, %f74, %f76;
	mov.f32 	%f78, 0f3F317200;
	mul.rn.f32 	%f79, %f51, %f78;
	mov.f32 	%f80, 0f35BFBE8E;
	mul.rn.f32 	%f81, %f51, %f80;
	add.f32 	%f82, %f79, %f75;
	sub.f32 	%f83, %f79, %f82;
	add.f32 	%f84, %f75, %f83;
	add.f32 	%f85, %f77, %f84;
	add.f32 	%f86, %f81, %f85;
	add.f32 	%f87, %f82, %f86;
	sub.f32 	%f88, %f82, %f87;
	add.f32 	%f89, %f86, %f88;
	mul.rn.f32 	%f90, %f41, %f87;
	neg.f32 	%f91, %f90;
	fma.rn.f32 	%f92, %f41, %f87, %f91;
	fma.rn.f32 	%f93, %f41, %f89, %f92;
	mov.f32 	%f94, 0f00000000;
	fma.rn.f32 	%f95, %f94, %f87, %f93;
	add.rn.f32 	%f96, %f90, %f95;
	neg.f32 	%f97, %f96;
	add.rn.f32 	%f98, %f90, %f97;
	add.rn.f32 	%f99, %f98, %f95;
	mov.b32 	%r18, %f96;
	setp.eq.s32 	%p7, %r18, 1118925336;
	add.s32 	%r19, %r18, -1;
	mov.b32 	%f100, %r19;
	add.f32 	%f101, %f99, 0f37000000;
	selp.f32 	%f13, %f101, %f99, %p7;
	selp.f32 	%f102, %f100, %f96, %p7;
	mov.f32 	%f103, 0f3FB8AA3B;
	mul.rn.f32 	%f104, %f102, %f103;
	cvt.rzi.f32.f32 	%f105, %f104;
	abs.f32 	%f106, %f105;
	setp.gt.f32 	%p8, %f106, 0f42FC0000;
	mov.b32 	%r20, %f105;
	and.b32  	%r21, %r20, -2147483648;
	or.b32  	%r22, %r21, 1123811328;
	mov.b32 	%f107, %r22;
	selp.f32 	%f108, %f107, %f105, %p8;
	mov.f32 	%f109, 0fBF317218;
	fma.rn.f32 	%f110, %f108, %f109, %f102;
	mov.f32 	%f111, 0f3102E308;
	fma.rn.f32 	%f112, %f108, %f111, %f110;
	mul.f32 	%f113, %f112, 0f3FB8AA3B;
	add.f32 	%f114, %f108, 0f4B40007F;
	mov.b32 	%r23, %f114;
	shl.b32 	%r24, %r23, 23;
	mov.b32 	%f115, %r24;
	ex2.approx.ftz.f32 	%f116, %f113;
	mul.f32 	%f14, %f116, %f115;
	setp.eq.f32 	%p9, %f14, 0f7F800000;
	mov.f32 	%f138, 0f7F800000;
	@%p9 bra 	$L__BB0_3;

	fma.rn.f32 	%f138, %f14, %f13, %f14;

$L__BB0_3:
	setp.lt.f32 	%p10, %f10, 0f00000000;
	setp.eq.f32 	%p11, %f11, 0f3F800000;
	and.pred  	%p1, %p10, %p11;
	setp.eq.f32 	%p12, %f10, 0f00000000;
	@%p12 bra 	$L__BB0_7;
	bra.uni 	$L__BB0_4;

$L__BB0_7:
	add.f32 	%f121, %f10, %f10;
	selp.f32 	%f140, %f121, 0f00000000, %p11;
	bra.uni 	$L__BB0_8;

$L__BB0_4:
	mov.b32 	%r25, %f138;
	xor.b32  	%r26, %r25, -2147483648;
	mov.b32 	%f117, %r26;
	selp.f32 	%f140, %f117, %f138, %p1;
	setp.geu.f32 	%p13, %f10, 0f00000000;
	@%p13 bra 	$L__BB0_8;

	mov.f32 	%f118, 0f40800000;
	cvt.rzi.f32.f32 	%f119, %f118;
	setp.eq.f32 	%p14, %f119, 0f40800000;
	@%p14 bra 	$L__BB0_8;

	mov.f32 	%f140, 0f7FFFFFFF;

$L__BB0_8:
	add.f32 	%f122, %f12, 0f40800000;
	mov.b32 	%r27, %f122;
	setp.lt.s32 	%p16, %r27, 2139095040;
	@%p16 bra 	$L__BB0_13;

	setp.gtu.f32 	%p17, %f12, 0f7F800000;
	@%p17 bra 	$L__BB0_12;
	bra.uni 	$L__BB0_10;

$L__BB0_12:
	add.f32 	%f140, %f10, 0f40800000;
	bra.uni 	$L__BB0_13;

$L__BB0_10:
	setp.neu.f32 	%p18, %f12, 0f7F800000;
	@%p18 bra 	$L__BB0_13;

	selp.f32 	%f140, 0fFF800000, 0f7F800000, %p1;

$L__BB0_13:
	mov.f32 	%f123, 0f3F800000;
	sub.f32 	%f124, %f123, %f140;
	setp.eq.f32 	%p19, %f10, 0f3F800000;
	selp.f32 	%f125, 0f00000000, %f124, %p19;
	cvt.sat.f32.f32 	%f126, %f125;
	ld.const.u64 	%rd2, [params+552];
	mul.lo.s32 	%r34, %r1, 10;
	cvt.rn.f32.s32 	%f127, %r34;
	sub.f32 	%f128, %f7, %f127;
	mul.f32 	%f129, %f128, 0fC1200000;
	mul.f32 	%f130, %f5, 0f41200000;
	tex.2d.v4.f32.f32 	{%f131, %f132, %f133, %f134}, [%rd2, {%f129, %f130}];
	mul.f32 	%f135, %f126, %f131;
	mul.f32 	%f136, %f126, %f132;
	mul.f32 	%f137, %f126, %f133;
	mov.b32 	%r29, %f135;
	mov.u32 	%r28, 0;
	// begin inline asm
	call _optix_set_payload, (%r28, %r29);
	// end inline asm
	mov.b32 	%r31, %f136;
	mov.u32 	%r30, 1;
	// begin inline asm
	call _optix_set_payload, (%r30, %r31);
	// end inline asm
	mov.b32 	%r33, %f137;
	mov.u32 	%r32, 2;
	// begin inline asm
	call _optix_set_payload, (%r32, %r33);
	// end inline asm

$L__BB0_14:
	ret;

}