//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .texref albedoTex;
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 16 .b8 	__local_depot0[48];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<111>;
	.reg .b16 	%rs<145>;
	.reg .f32 	%f<871>;
	.reg .b32 	%r<397>;
	.reg .b64 	%rd<284>;


	mov.u64 	%rd283, __local_depot0;
	cvta.local.u64 	%SP, %rd283;
	ld.global.u32 	%r1, [samples];
	ld.global.v2.u32 	{%r96, %r97}, [pixelID];
	cvt.u64.u32	%rd22, %r96;
	cvt.u64.u32	%rd23, %r97;
	mov.u64 	%rd26, uvnormal;
	cvta.global.u64 	%rd21, %rd26;
	mov.u32 	%r94, 2;
	mov.u32 	%r95, 4;
	mov.u64 	%rd25, 0;
	// inline asm
	call (%rd20), _rt_buffer_get_64, (%rd21, %r94, %r95, %rd22, %rd23, %rd25, %rd25);
	// inline asm
	ld.u32 	%r2, [%rd20];
	shr.u32 	%r100, %r2, 16;
	cvt.u16.u32	%rs1, %r100;
	and.b16  	%rs6, %rs1, 255;
	cvt.u16.u32	%rs7, %r2;
	or.b16  	%rs8, %rs7, %rs6;
	setp.eq.s16	%p6, %rs8, 0;
	mov.f32 	%f802, 0f00000000;
	mov.f32 	%f803, %f802;
	mov.f32 	%f804, %f802;
	@%p6 bra 	BB0_2;

	ld.u8 	%rs9, [%rd20+1];
	and.b16  	%rs11, %rs7, 255;
	cvt.rn.f32.u16	%f198, %rs11;
	div.rn.f32 	%f199, %f198, 0f437F0000;
	fma.rn.f32 	%f200, %f199, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f201, %rs9;
	div.rn.f32 	%f202, %f201, 0f437F0000;
	fma.rn.f32 	%f203, %f202, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f204, %rs6;
	div.rn.f32 	%f205, %f204, 0f437F0000;
	fma.rn.f32 	%f206, %f205, 0f40000000, 0fBF800000;
	mul.f32 	%f207, %f203, %f203;
	fma.rn.f32 	%f208, %f200, %f200, %f207;
	fma.rn.f32 	%f209, %f206, %f206, %f208;
	sqrt.rn.f32 	%f210, %f209;
	rcp.rn.f32 	%f211, %f210;
	mul.f32 	%f802, %f200, %f211;
	mul.f32 	%f803, %f203, %f211;
	mul.f32 	%f804, %f206, %f211;

BB0_2:
	ld.global.v2.u32 	{%r101, %r102}, [pixelID];
	ld.global.v2.u32 	{%r104, %r105}, [tileInfo];
	add.s32 	%r3, %r101, %r104;
	add.s32 	%r4, %r102, %r105;
	setp.eq.f32	%p7, %f803, 0f00000000;
	setp.eq.f32	%p8, %f802, 0f00000000;
	and.pred  	%p9, %p8, %p7;
	setp.eq.f32	%p10, %f804, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	@%p11 bra 	BB0_108;
	bra.uni 	BB0_3;

BB0_108:
	ld.global.u32 	%r396, [imageEnabled];
	and.b32  	%r295, %r396, 1;
	setp.eq.b32	%p102, %r295, 1;
	@!%p102 bra 	BB0_110;
	bra.uni 	BB0_109;

BB0_109:
	cvt.u64.u32	%rd174, %r3;
	cvt.u64.u32	%rd175, %r4;
	mov.u64 	%rd178, image;
	cvta.global.u64 	%rd173, %rd178;
	mov.u64 	%rd177, 0;
	// inline asm
	call (%rd172), _rt_buffer_get_64, (%rd173, %r94, %r95, %rd174, %rd175, %rd177, %rd177);
	// inline asm
	mov.u16 	%rs88, 0;
	st.v4.u8 	[%rd172], {%rs88, %rs88, %rs88, %rs88};
	ld.global.u32 	%r396, [imageEnabled];

BB0_110:
	and.b32  	%r298, %r396, 4;
	setp.eq.s32	%p103, %r298, 0;
	@%p103 bra 	BB0_112;

	cvt.u64.u32	%rd181, %r3;
	cvt.u64.u32	%rd182, %r4;
	mov.u64 	%rd185, image_HDR;
	cvta.global.u64 	%rd180, %rd185;
	mov.u32 	%r300, 8;
	mov.u64 	%rd184, 0;
	// inline asm
	call (%rd179), _rt_buffer_get_64, (%rd180, %r94, %r300, %rd181, %rd182, %rd184, %rd184);
	// inline asm
	mov.f32 	%f713, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs89, %f713;}

	// inline asm
	mov.u16 	%rs90, 0;
	st.v4.u16 	[%rd179], {%rs89, %rs89, %rs89, %rs90};
	ld.global.u32 	%r396, [imageEnabled];

BB0_112:
	and.b32  	%r301, %r396, 16;
	setp.eq.s32	%p104, %r301, 0;
	@%p104 bra 	BB0_114;

	cvt.u64.u32	%rd189, %r4;
	cvt.u64.u32	%rd188, %r3;
	mov.u64 	%rd192, image_HDR2;
	cvta.global.u64 	%rd187, %rd192;
	mov.u32 	%r303, 8;
	mov.u64 	%rd191, 0;
	// inline asm
	call (%rd186), _rt_buffer_get_64, (%rd187, %r94, %r303, %rd188, %rd189, %rd191, %rd191);
	// inline asm
	mov.f32 	%f714, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f714;}

	// inline asm
	mov.u16 	%rs92, 0;
	st.v4.u16 	[%rd186], {%rs91, %rs91, %rs91, %rs92};

BB0_114:
	cvt.u64.u32	%rd18, %r3;
	cvt.u64.u32	%rd19, %r4;
	ld.global.u32 	%r304, [additive];
	setp.eq.s32	%p105, %r304, 0;
	@%p105 bra 	BB0_116;

	mov.u64 	%rd205, image_RNM0;
	cvta.global.u64 	%rd194, %rd205;
	mov.u32 	%r308, 8;
	mov.u64 	%rd204, 0;
	// inline asm
	call (%rd193), _rt_buffer_get_64, (%rd194, %r94, %r308, %rd18, %rd19, %rd204, %rd204);
	// inline asm
	ld.v4.u16 	{%rs99, %rs100, %rs101, %rs102}, [%rd193];
	// inline asm
	{  cvt.f32.f16 %f715, %rs99;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f716, %rs100;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f717, %rs101;}

	// inline asm
	// inline asm
	call (%rd199), _rt_buffer_get_64, (%rd194, %r94, %r308, %rd18, %rd19, %rd204, %rd204);
	// inline asm
	add.f32 	%f718, %f715, 0f00000000;
	add.f32 	%f719, %f716, 0f00000000;
	add.f32 	%f720, %f717, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs98, %f720;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs97, %f719;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs96, %f718;}

	// inline asm
	mov.u16 	%rs103, 0;
	st.v4.u16 	[%rd199], {%rs96, %rs97, %rs98, %rs103};
	bra.uni 	BB0_117;

BB0_3:
	ld.global.v2.u32 	{%r115, %r116}, [pixelID];
	cvt.u64.u32	%rd29, %r115;
	cvt.u64.u32	%rd30, %r116;
	mov.u64 	%rd45, lightmapDirect;
	cvta.global.u64 	%rd28, %rd45;
	mov.u32 	%r110, 8;
	// inline asm
	call (%rd27), _rt_buffer_get_64, (%rd28, %r94, %r110, %rd29, %rd30, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs16, %rs17, %rs18, %rs19}, [%rd27];
	// inline asm
	{  cvt.f32.f16 %f212, %rs16;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f213, %rs17;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f214, %rs18;}

	// inline asm
	ld.global.v2.u32 	{%r119, %r120}, [pixelID];
	cvt.u64.u32	%rd35, %r119;
	cvt.u64.u32	%rd36, %r120;
	mov.u64 	%rd46, uvpos;
	cvta.global.u64 	%rd34, %rd46;
	mov.u32 	%r112, 12;
	// inline asm
	call (%rd33), _rt_buffer_get_64, (%rd34, %r94, %r112, %rd35, %rd36, %rd25, %rd25);
	// inline asm
	ld.f32 	%f230, [%rd33+8];
	ld.f32 	%f231, [%rd33+4];
	ld.f32 	%f232, [%rd33];
	mul.f32 	%f233, %f232, 0f3456BF95;
	mul.f32 	%f234, %f231, 0f3456BF95;
	mul.f32 	%f235, %f230, 0f3456BF95;
	abs.f32 	%f236, %f802;
	div.rn.f32 	%f237, %f233, %f236;
	abs.f32 	%f238, %f803;
	div.rn.f32 	%f239, %f234, %f238;
	abs.f32 	%f240, %f804;
	div.rn.f32 	%f241, %f235, %f240;
	abs.f32 	%f242, %f237;
	abs.f32 	%f243, %f239;
	abs.f32 	%f244, %f241;
	mov.f32 	%f245, 0f38D1B717;
	max.f32 	%f246, %f242, %f245;
	max.f32 	%f247, %f243, %f245;
	max.f32 	%f248, %f244, %f245;
	fma.rn.f32 	%f10, %f802, %f246, %f232;
	fma.rn.f32 	%f11, %f803, %f247, %f231;
	fma.rn.f32 	%f12, %f804, %f248, %f230;
	setp.gt.f32	%p12, %f236, %f240;
	neg.f32 	%f249, %f803;
	selp.f32	%f250, %f249, 0f00000000, %p12;
	neg.f32 	%f251, %f804;
	selp.f32	%f252, %f802, %f251, %p12;
	selp.f32	%f253, 0f00000000, %f803, %p12;
	mul.f32 	%f254, %f252, %f252;
	fma.rn.f32 	%f255, %f250, %f250, %f254;
	fma.rn.f32 	%f256, %f253, %f253, %f255;
	sqrt.rn.f32 	%f257, %f256;
	rcp.rn.f32 	%f258, %f257;
	mul.f32 	%f13, %f250, %f258;
	mul.f32 	%f14, %f252, %f258;
	mul.f32 	%f15, %f253, %f258;
	ld.global.v2.u32 	{%r123, %r124}, [pixelID];
	cvt.u64.u32	%rd41, %r123;
	cvt.u64.u32	%rd42, %r124;
	mov.u64 	%rd47, rnd_seeds;
	cvta.global.u64 	%rd40, %rd47;
	// inline asm
	call (%rd39), _rt_buffer_get_64, (%rd40, %r94, %r95, %rd41, %rd42, %rd25, %rd25);
	// inline asm
	mov.f32 	%f820, 0f00000000;
	setp.lt.s32	%p13, %r1, 1;
	mov.f32 	%f821, %f820;
	mov.f32 	%f822, %f820;
	mov.f32 	%f823, %f820;
	mov.f32 	%f824, %f820;
	mov.f32 	%f825, %f820;
	mov.f32 	%f826, %f820;
	mov.f32 	%f827, %f820;
	mov.f32 	%f828, %f820;
	mov.f32 	%f829, %f820;
	mov.f32 	%f830, %f820;
	mov.f32 	%f831, %f820;
	mov.f32 	%f832, %f820;
	mov.f32 	%f833, %f820;
	mov.f32 	%f834, %f820;
	@%p13 bra 	BB0_54;

	cvt.rn.f32.s32	%f274, %r1;
	rcp.rn.f32 	%f16, %f274;
	ld.u32 	%r372, [%rd39];
	mul.f32 	%f17, %f10, 0f3456BF95;
	mul.f32 	%f18, %f11, 0f3456BF95;
	mul.f32 	%f19, %f12, 0f3456BF95;
	mul.f32 	%f275, %f802, %f14;
	mul.f32 	%f276, %f803, %f13;
	sub.f32 	%f20, %f276, %f275;
	mul.f32 	%f277, %f804, %f13;
	mul.f32 	%f278, %f802, %f15;
	sub.f32 	%f21, %f278, %f277;
	mul.f32 	%f279, %f803, %f15;
	mul.f32 	%f280, %f804, %f14;
	sub.f32 	%f22, %f280, %f279;
	mov.f32 	%f820, 0f00000000;
	mov.u32 	%r127, 0;
	abs.f32 	%f281, %f18;
	abs.f32 	%f282, %f17;
	max.f32 	%f283, %f282, %f281;
	abs.f32 	%f284, %f19;
	max.f32 	%f285, %f283, %f284;
	mov.u32 	%r369, %r127;
	mov.f32 	%f821, %f820;
	mov.f32 	%f822, %f820;
	mov.f32 	%f823, %f820;
	mov.f32 	%f824, %f820;
	mov.f32 	%f825, %f820;
	mov.f32 	%f826, %f820;
	mov.f32 	%f827, %f820;
	mov.f32 	%f828, %f820;
	mov.f32 	%f829, %f820;
	mov.f32 	%f830, %f820;
	mov.f32 	%f831, %f820;
	mov.f32 	%f832, %f820;
	mov.f32 	%f833, %f820;
	mov.f32 	%f834, %f820;

BB0_5:
	mov.u32 	%r371, %r127;

BB0_6:
	mov.u32 	%r9, %r372;
	cvt.rn.f32.s32	%f784, %r369;
	mad.lo.s32 	%r129, %r9, 1664525, 1013904223;
	and.b32  	%r130, %r129, 16777215;
	cvt.rn.f32.u32	%f287, %r130;
	fma.rn.f32 	%f288, %f287, 0f33800000, %f784;
	mul.f32 	%f55, %f16, %f288;
	mad.lo.s32 	%r10, %r129, 1664525, 1013904223;
	and.b32  	%r131, %r10, 16777215;
	cvt.rn.f32.u32	%f289, %r131;
	cvt.rn.f32.s32	%f290, %r371;
	fma.rn.f32 	%f291, %f289, 0f33800000, %f290;
	mul.f32 	%f292, %f16, %f291;
	mul.f32 	%f293, %f55, %f55;
	mov.f32 	%f294, 0f3F800000;
	sub.f32 	%f295, %f294, %f293;
	mov.f32 	%f296, 0f00000000;
	max.f32 	%f297, %f296, %f295;
	sqrt.rn.f32 	%f56, %f297;
	mul.f32 	%f841, %f292, 0f40C90FDB;
	abs.f32 	%f58, %f841;
	setp.neu.f32	%p14, %f58, 0f7F800000;
	mov.f32 	%f835, %f841;
	@%p14 bra 	BB0_8;

	mov.f32 	%f785, 0f00000000;
	mul.rn.f32 	%f835, %f841, %f785;

BB0_8:
	mul.f32 	%f299, %f835, 0f3F22F983;
	cvt.rni.s32.f32	%r382, %f299;
	cvt.rn.f32.s32	%f300, %r382;
	neg.f32 	%f301, %f300;
	mov.f32 	%f302, 0f3FC90FDA;
	fma.rn.f32 	%f303, %f301, %f302, %f835;
	mov.f32 	%f304, 0f33A22168;
	fma.rn.f32 	%f305, %f301, %f304, %f303;
	mov.f32 	%f306, 0f27C234C5;
	fma.rn.f32 	%f836, %f301, %f306, %f305;
	abs.f32 	%f307, %f835;
	setp.leu.f32	%p15, %f307, 0f47CE4780;
	@%p15 bra 	BB0_19;

	add.u64 	%rd49, %SP, 16;
	cvta.to.local.u64 	%rd279, %rd49;
	mov.u32 	%r373, 0;
	mov.u64 	%rd280, 0;
	mov.u32 	%r374, %r373;

BB0_10:
	.pragma "nounroll";
	mov.b32 	 %r349, %f835;
	shl.b32 	%r348, %r349, 8;
	or.b32  	%r347, %r348, -2147483648;
	add.u64 	%rd275, %SP, 16;
	cvta.to.local.u64 	%rd274, %rd275;
	shl.b64 	%rd50, %rd280, 2;
	mov.u64 	%rd51, __cudart_i2opi_f;
	add.s64 	%rd52, %rd51, %rd50;
	ld.const.u32 	%r137, [%rd52];
	// inline asm
	{
	mad.lo.cc.u32   %r135, %r137, %r347, %r374;
	madc.hi.u32     %r374, %r137, %r347,  0;
	}
	// inline asm
	st.local.u32 	[%rd279], %r135;
	add.s32 	%r373, %r373, 1;
	cvt.s64.s32	%rd280, %r373;
	mul.wide.s32 	%rd55, %r373, 4;
	add.s64 	%rd279, %rd274, %rd55;
	setp.ne.s32	%p16, %r373, 6;
	@%p16 bra 	BB0_10;

	mov.b32 	 %r351, %f835;
	shr.u32 	%r350, %r351, 23;
	add.u64 	%rd273, %SP, 16;
	and.b32  	%r140, %r350, 255;
	add.s32 	%r141, %r140, -128;
	shr.u32 	%r142, %r141, 5;
	cvta.to.local.u64 	%rd57, %rd273;
	st.local.u32 	[%rd57+24], %r374;
	mov.u32 	%r143, 6;
	sub.s32 	%r144, %r143, %r142;
	mul.wide.s32 	%rd58, %r144, 4;
	add.s64 	%rd8, %rd57, %rd58;
	ld.local.u32 	%r375, [%rd8];
	ld.local.u32 	%r376, [%rd8+-4];
	and.b32  	%r22, %r350, 31;
	setp.eq.s32	%p17, %r22, 0;
	@%p17 bra 	BB0_13;

	mov.u32 	%r145, 32;
	sub.s32 	%r146, %r145, %r22;
	shr.u32 	%r147, %r376, %r146;
	shl.b32 	%r148, %r375, %r22;
	add.s32 	%r375, %r147, %r148;
	ld.local.u32 	%r149, [%rd8+-8];
	shr.u32 	%r150, %r149, %r146;
	shl.b32 	%r151, %r376, %r22;
	add.s32 	%r376, %r150, %r151;

BB0_13:
	mov.b32 	 %r354, %f835;
	and.b32  	%r378, %r354, -2147483648;
	shr.u32 	%r152, %r376, 30;
	shl.b32 	%r153, %r375, 2;
	add.s32 	%r377, %r152, %r153;
	shl.b32 	%r28, %r376, 2;
	shr.u32 	%r154, %r377, 31;
	shr.u32 	%r155, %r375, 30;
	add.s32 	%r29, %r154, %r155;
	setp.eq.s32	%p18, %r154, 0;
	@%p18 bra 	BB0_14;
	bra.uni 	BB0_15;

BB0_14:
	mov.u32 	%r379, %r28;
	bra.uni 	BB0_16;

BB0_15:
	mov.b32 	 %r356, %f835;
	and.b32  	%r355, %r356, -2147483648;
	not.b32 	%r156, %r377;
	neg.s32 	%r379, %r28;
	setp.eq.s32	%p19, %r28, 0;
	selp.u32	%r157, 1, 0, %p19;
	add.s32 	%r377, %r157, %r156;
	xor.b32  	%r378, %r355, -2147483648;

BB0_16:
	mov.b32 	 %r358, %f835;
	and.b32  	%r357, %r358, -2147483648;
	clz.b32 	%r381, %r377;
	setp.eq.s32	%p20, %r381, 0;
	shl.b32 	%r158, %r377, %r381;
	mov.u32 	%r159, 32;
	sub.s32 	%r160, %r159, %r381;
	shr.u32 	%r161, %r379, %r160;
	add.s32 	%r162, %r161, %r158;
	selp.b32	%r37, %r377, %r162, %p20;
	mov.u32 	%r163, -921707870;
	mul.hi.u32 	%r380, %r37, %r163;
	setp.eq.s32	%p21, %r357, 0;
	neg.s32 	%r164, %r29;
	selp.b32	%r382, %r29, %r164, %p21;
	setp.lt.s32	%p22, %r380, 1;
	@%p22 bra 	BB0_18;

	mul.lo.s32 	%r165, %r37, -921707870;
	shr.u32 	%r166, %r165, 31;
	shl.b32 	%r167, %r380, 1;
	add.s32 	%r380, %r166, %r167;
	add.s32 	%r381, %r381, 1;

BB0_18:
	mov.u32 	%r168, 126;
	sub.s32 	%r169, %r168, %r381;
	shl.b32 	%r170, %r169, 23;
	add.s32 	%r171, %r380, 1;
	shr.u32 	%r172, %r171, 7;
	add.s32 	%r173, %r172, 1;
	shr.u32 	%r174, %r173, 1;
	add.s32 	%r175, %r174, %r170;
	or.b32  	%r176, %r175, %r378;
	mov.b32 	 %f836, %r176;

BB0_19:
	add.s32 	%r45, %r382, 1;
	and.b32  	%r46, %r45, 1;
	setp.eq.s32	%p23, %r46, 0;
	@%p23 bra 	BB0_21;
	bra.uni 	BB0_20;

BB0_21:
	mul.rn.f32 	%f796, %f836, %f836;
	mov.f32 	%f310, 0f3C08839E;
	mov.f32 	%f311, 0fB94CA1F9;
	fma.rn.f32 	%f837, %f311, %f796, %f310;
	bra.uni 	BB0_22;

BB0_20:
	mul.rn.f32 	%f793, %f836, %f836;
	mov.f32 	%f308, 0fBAB6061A;
	mov.f32 	%f309, 0f37CCF5CE;
	fma.rn.f32 	%f837, %f309, %f793, %f308;

BB0_22:
	@%p23 bra 	BB0_24;
	bra.uni 	BB0_23;

BB0_24:
	mul.rn.f32 	%f795, %f836, %f836;
	mov.f32 	%f788, 0f00000000;
	mov.f32 	%f315, 0fBE2AAAA3;
	fma.rn.f32 	%f316, %f837, %f795, %f315;
	fma.rn.f32 	%f838, %f316, %f795, %f788;
	bra.uni 	BB0_25;

BB0_23:
	mul.rn.f32 	%f794, %f836, %f836;
	mov.f32 	%f312, 0f3D2AAAA5;
	fma.rn.f32 	%f313, %f837, %f794, %f312;
	mov.f32 	%f314, 0fBF000000;
	fma.rn.f32 	%f838, %f313, %f794, %f314;

BB0_25:
	fma.rn.f32 	%f839, %f838, %f836, %f836;
	@%p23 bra 	BB0_27;

	mul.rn.f32 	%f789, %f836, %f836;
	mov.f32 	%f774, 0f3F800000;
	fma.rn.f32 	%f839, %f838, %f789, %f774;

BB0_27:
	add.s32 	%r359, %r382, 1;
	and.b32  	%r177, %r359, 2;
	setp.eq.s32	%p26, %r177, 0;
	@%p26 bra 	BB0_29;

	mov.f32 	%f775, 0f00000000;
	mov.f32 	%f320, 0fBF800000;
	fma.rn.f32 	%f839, %f839, %f320, %f775;

BB0_29:
	abs.f32 	%f776, %f841;
	setp.neu.f32	%p109, %f776, 0f7F800000;
	@%p109 bra 	BB0_31;

	mov.f32 	%f787, 0f00000000;
	mul.rn.f32 	%f841, %f841, %f787;

BB0_31:
	mov.f32 	%f779, 0f27C234C5;
	mov.f32 	%f778, 0f33A22168;
	mov.f32 	%f777, 0f3FC90FDA;
	mul.f32 	%f322, %f841, 0f3F22F983;
	cvt.rni.s32.f32	%r392, %f322;
	cvt.rn.f32.s32	%f323, %r392;
	neg.f32 	%f324, %f323;
	fma.rn.f32 	%f326, %f324, %f777, %f841;
	fma.rn.f32 	%f328, %f324, %f778, %f326;
	fma.rn.f32 	%f842, %f324, %f779, %f328;
	abs.f32 	%f330, %f841;
	setp.leu.f32	%p28, %f330, 0f47CE4780;
	@%p28 bra 	BB0_42;

	add.u64 	%rd60, %SP, 16;
	cvta.to.local.u64 	%rd281, %rd60;
	mov.b32 	 %r48, %f841;
	shl.b32 	%r180, %r48, 8;
	or.b32  	%r50, %r180, -2147483648;
	mov.u32 	%r383, 0;
	mov.u64 	%rd282, %rd25;
	mov.u32 	%r384, %r383;

BB0_33:
	.pragma "nounroll";
	add.u64 	%rd277, %SP, 16;
	cvta.to.local.u64 	%rd276, %rd277;
	shl.b64 	%rd61, %rd282, 2;
	mov.u64 	%rd62, __cudart_i2opi_f;
	add.s64 	%rd63, %rd62, %rd61;
	ld.const.u32 	%r183, [%rd63];
	// inline asm
	{
	mad.lo.cc.u32   %r181, %r183, %r50, %r384;
	madc.hi.u32     %r384, %r183, %r50,  0;
	}
	// inline asm
	st.local.u32 	[%rd281], %r181;
	add.s32 	%r383, %r383, 1;
	cvt.s64.s32	%rd282, %r383;
	mul.wide.s32 	%rd64, %r383, 4;
	add.s64 	%rd281, %rd276, %rd64;
	setp.ne.s32	%p29, %r383, 6;
	@%p29 bra 	BB0_33;

	mov.b32 	 %r361, %f841;
	shr.u32 	%r360, %r361, 23;
	add.u64 	%rd278, %SP, 16;
	and.b32  	%r186, %r360, 255;
	add.s32 	%r187, %r186, -128;
	shr.u32 	%r188, %r187, 5;
	cvta.to.local.u64 	%rd66, %rd278;
	st.local.u32 	[%rd66+24], %r384;
	mov.u32 	%r189, 6;
	sub.s32 	%r190, %r189, %r188;
	mul.wide.s32 	%rd67, %r190, 4;
	add.s64 	%rd15, %rd66, %rd67;
	ld.local.u32 	%r385, [%rd15];
	ld.local.u32 	%r386, [%rd15+-4];
	and.b32  	%r58, %r360, 31;
	setp.eq.s32	%p30, %r58, 0;
	@%p30 bra 	BB0_36;

	mov.u32 	%r191, 32;
	sub.s32 	%r192, %r191, %r58;
	shr.u32 	%r193, %r386, %r192;
	shl.b32 	%r194, %r385, %r58;
	add.s32 	%r385, %r193, %r194;
	ld.local.u32 	%r195, [%rd15+-8];
	shr.u32 	%r196, %r195, %r192;
	shl.b32 	%r197, %r386, %r58;
	add.s32 	%r386, %r196, %r197;

BB0_36:
	mov.b32 	 %r364, %f841;
	and.b32  	%r388, %r364, -2147483648;
	shr.u32 	%r198, %r386, 30;
	shl.b32 	%r199, %r385, 2;
	add.s32 	%r387, %r198, %r199;
	shl.b32 	%r64, %r386, 2;
	shr.u32 	%r200, %r387, 31;
	shr.u32 	%r201, %r385, 30;
	add.s32 	%r65, %r200, %r201;
	setp.eq.s32	%p31, %r200, 0;
	@%p31 bra 	BB0_37;
	bra.uni 	BB0_38;

BB0_37:
	mov.u32 	%r389, %r64;
	bra.uni 	BB0_39;

BB0_38:
	mov.b32 	 %r366, %f841;
	and.b32  	%r365, %r366, -2147483648;
	not.b32 	%r202, %r387;
	neg.s32 	%r389, %r64;
	setp.eq.s32	%p32, %r64, 0;
	selp.u32	%r203, 1, 0, %p32;
	add.s32 	%r387, %r203, %r202;
	xor.b32  	%r388, %r365, -2147483648;

BB0_39:
	mov.b32 	 %r368, %f841;
	and.b32  	%r367, %r368, -2147483648;
	clz.b32 	%r391, %r387;
	setp.eq.s32	%p33, %r391, 0;
	shl.b32 	%r204, %r387, %r391;
	mov.u32 	%r205, 32;
	sub.s32 	%r206, %r205, %r391;
	shr.u32 	%r207, %r389, %r206;
	add.s32 	%r208, %r207, %r204;
	selp.b32	%r73, %r387, %r208, %p33;
	mov.u32 	%r209, -921707870;
	mul.hi.u32 	%r390, %r73, %r209;
	setp.eq.s32	%p34, %r367, 0;
	neg.s32 	%r210, %r65;
	selp.b32	%r392, %r65, %r210, %p34;
	setp.lt.s32	%p35, %r390, 1;
	@%p35 bra 	BB0_41;

	mul.lo.s32 	%r211, %r73, -921707870;
	shr.u32 	%r212, %r211, 31;
	shl.b32 	%r213, %r390, 1;
	add.s32 	%r390, %r212, %r213;
	add.s32 	%r391, %r391, 1;

BB0_41:
	mov.u32 	%r214, 126;
	sub.s32 	%r215, %r214, %r391;
	shl.b32 	%r216, %r215, 23;
	add.s32 	%r217, %r390, 1;
	shr.u32 	%r218, %r217, 7;
	add.s32 	%r219, %r218, 1;
	shr.u32 	%r220, %r219, 1;
	add.s32 	%r221, %r220, %r216;
	or.b32  	%r222, %r221, %r388;
	mov.b32 	 %f842, %r222;

BB0_42:
	and.b32  	%r81, %r392, 1;
	setp.eq.s32	%p36, %r81, 0;
	@%p36 bra 	BB0_44;
	bra.uni 	BB0_43;

BB0_44:
	mul.rn.f32 	%f801, %f842, %f842;
	mov.f32 	%f333, 0f3C08839E;
	mov.f32 	%f334, 0fB94CA1F9;
	fma.rn.f32 	%f843, %f334, %f801, %f333;
	bra.uni 	BB0_45;

BB0_43:
	mul.rn.f32 	%f797, %f842, %f842;
	mov.f32 	%f331, 0fBAB6061A;
	mov.f32 	%f332, 0f37CCF5CE;
	fma.rn.f32 	%f843, %f332, %f797, %f331;

BB0_45:
	@%p36 bra 	BB0_47;
	bra.uni 	BB0_46;

BB0_47:
	mul.rn.f32 	%f800, %f842, %f842;
	mov.f32 	%f786, 0f00000000;
	mov.f32 	%f338, 0fBE2AAAA3;
	fma.rn.f32 	%f339, %f843, %f800, %f338;
	fma.rn.f32 	%f844, %f339, %f800, %f786;
	bra.uni 	BB0_48;

BB0_46:
	mul.rn.f32 	%f798, %f842, %f842;
	mov.f32 	%f335, 0f3D2AAAA5;
	fma.rn.f32 	%f336, %f843, %f798, %f335;
	mov.f32 	%f337, 0fBF000000;
	fma.rn.f32 	%f844, %f336, %f798, %f337;

BB0_48:
	fma.rn.f32 	%f845, %f844, %f842, %f842;
	@%p36 bra 	BB0_50;

	mul.rn.f32 	%f799, %f842, %f842;
	mov.f32 	%f780, 0f3F800000;
	fma.rn.f32 	%f845, %f844, %f799, %f780;

BB0_50:
	and.b32  	%r223, %r392, 2;
	setp.eq.s32	%p39, %r223, 0;
	@%p39 bra 	BB0_52;

	mov.f32 	%f781, 0f00000000;
	mov.f32 	%f343, 0fBF800000;
	fma.rn.f32 	%f845, %f845, %f343, %f781;

BB0_52:
	mad.lo.s32 	%r344, %r9, 1664525, 1013904223;
	mad.lo.s32 	%r372, %r344, 1664525, 1013904223;
	max.f32 	%f783, %f285, %f245;
	mov.f32 	%f782, 0f3F800000;
	mul.f32 	%f352, %f56, %f839;
	add.u64 	%rd68, %SP, 0;
	cvta.to.local.u64 	%rd69, %rd68;
	mul.f32 	%f353, %f56, %f845;
	mul.f32 	%f354, %f13, %f353;
	mul.f32 	%f355, %f14, %f353;
	mul.f32 	%f356, %f15, %f353;
	fma.rn.f32 	%f357, %f22, %f352, %f354;
	fma.rn.f32 	%f358, %f21, %f352, %f355;
	fma.rn.f32 	%f359, %f20, %f352, %f356;
	fma.rn.f32 	%f347, %f802, %f55, %f357;
	fma.rn.f32 	%f348, %f803, %f55, %f358;
	fma.rn.f32 	%f349, %f804, %f55, %f359;
	mov.f32 	%f360, 0f7F7FFFFF;
	st.local.v4.f32 	[%rd69], {%f782, %f782, %f782, %f360};
	ld.global.u32 	%r224, [root];
	mov.u32 	%r225, 0;
	mov.f32 	%f351, 0f6C4ECB8F;
	mov.u32 	%r226, 16;
	// inline asm
	call _rt_trace_64, (%r224, %f10, %f11, %f12, %f347, %f348, %f349, %r225, %f783, %f351, %rd68, %r226);
	// inline asm
	ld.local.v4.f32 	{%f362, %f363, %f364, %f365}, [%rd69];
	setp.ltu.f32	%p40, %f365, 0f00000000;
	selp.f32	%f370, %f362, 0f00000000, %p40;
	selp.f32	%f371, %f363, 0f00000000, %p40;
	selp.f32	%f372, %f364, 0f00000000, %p40;
	mul.f32 	%f373, %f803, %f348;
	fma.rn.f32 	%f374, %f802, %f347, %f373;
	fma.rn.f32 	%f375, %f804, %f349, %f374;
	mul.f32 	%f376, %f375, 0f40800000;
	cvt.sat.f32.f32	%f377, %f376;
	mul.f32 	%f378, %f377, %f370;
	mul.f32 	%f379, %f377, %f371;
	mul.f32 	%f380, %f377, %f372;
	fma.rn.f32 	%f828, %f347, %f378, %f828;
	fma.rn.f32 	%f827, %f347, %f379, %f827;
	fma.rn.f32 	%f826, %f347, %f380, %f826;
	fma.rn.f32 	%f831, %f348, %f378, %f831;
	fma.rn.f32 	%f830, %f348, %f379, %f830;
	fma.rn.f32 	%f829, %f348, %f380, %f829;
	fma.rn.f32 	%f834, %f349, %f378, %f834;
	fma.rn.f32 	%f833, %f349, %f379, %f833;
	fma.rn.f32 	%f832, %f349, %f380, %f832;
	add.f32 	%f825, %f825, %f378;
	add.f32 	%f824, %f824, %f379;
	add.f32 	%f823, %f823, %f380;
	cvt.sat.f32.f32	%f381, %f375;
	fma.rn.f32 	%f822, %f370, %f381, %f822;
	fma.rn.f32 	%f821, %f371, %f381, %f821;
	fma.rn.f32 	%f820, %f372, %f381, %f820;
	add.s32 	%r371, %r371, 1;
	setp.lt.s32	%p41, %r371, %r1;
	@%p41 bra 	BB0_6;

	mad.lo.s32 	%r346, %r9, 1664525, 1013904223;
	mad.lo.s32 	%r372, %r346, 1664525, 1013904223;
	add.s32 	%r369, %r369, 1;
	setp.lt.s32	%p42, %r369, %r1;
	@%p42 bra 	BB0_5;

BB0_54:
	mul.lo.s32 	%r227, %r1, %r1;
	cvt.rn.f32.s32	%f382, %r227;
	rcp.rn.f32 	%f383, %f382;
	cvt.rn.f32.u32	%f384, %r4;
	cvt.rn.f32.u32	%f385, %r3;
	tex.2d.v4.f32.f32	{%f386, %f387, %f388, %f389}, [albedoTex, {%f385, %f384}];
	mul.f32 	%f123, %f825, %f383;
	mul.f32 	%f124, %f824, %f383;
	mul.f32 	%f125, %f823, %f383;
	mul.f32 	%f126, %f828, %f383;
	mul.f32 	%f127, %f827, %f383;
	mul.f32 	%f128, %f826, %f383;
	mul.f32 	%f129, %f831, %f383;
	mul.f32 	%f130, %f830, %f383;
	mul.f32 	%f131, %f829, %f383;
	mul.f32 	%f132, %f834, %f383;
	mul.f32 	%f133, %f833, %f383;
	mul.f32 	%f134, %f832, %f383;
	mul.f32 	%f390, %f822, %f383;
	mul.f32 	%f391, %f821, %f383;
	mul.f32 	%f392, %f820, %f383;
	fma.rn.f32 	%f393, %f822, %f383, %f390;
	fma.rn.f32 	%f394, %f821, %f383, %f391;
	fma.rn.f32 	%f395, %f820, %f383, %f392;
	mul.f32 	%f135, %f393, %f386;
	mul.f32 	%f136, %f394, %f387;
	mul.f32 	%f137, %f395, %f388;
	add.f32 	%f138, %f212, %f135;
	add.f32 	%f139, %f213, %f136;
	add.f32 	%f140, %f214, %f137;
	abs.f32 	%f396, %f138;
	setp.gtu.f32	%p44, %f396, 0f7F800000;
	mov.pred 	%p110, -1;
	@%p44 bra 	BB0_57;

	abs.f32 	%f397, %f139;
	setp.gtu.f32	%p46, %f397, 0f7F800000;
	@%p46 bra 	BB0_57;

	abs.f32 	%f398, %f140;
	setp.gtu.f32	%p110, %f398, 0f7F800000;

BB0_57:
	selp.f32	%f141, 0f00000000, %f138, %p110;
	selp.f32	%f142, 0f00000000, %f139, %p110;
	selp.f32	%f143, 0f00000000, %f140, %p110;
	ld.global.u32 	%r394, [imageEnabled];
	and.b32  	%r228, %r394, 1;
	setp.eq.b32	%p47, %r228, 1;
	@!%p47 bra 	BB0_92;
	bra.uni 	BB0_58;

BB0_58:
	abs.f32 	%f145, %f141;
	setp.lt.f32	%p48, %f145, 0f00800000;
	mul.f32 	%f404, %f145, 0f4B800000;
	selp.f32	%f405, 0fC3170000, 0fC2FE0000, %p48;
	selp.f32	%f406, %f404, %f145, %p48;
	mov.b32 	 %r229, %f406;
	and.b32  	%r230, %r229, 8388607;
	or.b32  	%r231, %r230, 1065353216;
	mov.b32 	 %f407, %r231;
	shr.u32 	%r232, %r229, 23;
	cvt.rn.f32.u32	%f408, %r232;
	add.f32 	%f409, %f405, %f408;
	setp.gt.f32	%p49, %f407, 0f3FB504F3;
	mul.f32 	%f410, %f407, 0f3F000000;
	add.f32 	%f411, %f409, 0f3F800000;
	selp.f32	%f412, %f410, %f407, %p49;
	selp.f32	%f413, %f411, %f409, %p49;
	add.f32 	%f414, %f412, 0fBF800000;
	add.f32 	%f400, %f412, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f399,%f400;
	// inline asm
	add.f32 	%f415, %f414, %f414;
	mul.f32 	%f416, %f399, %f415;
	mul.f32 	%f417, %f416, %f416;
	mov.f32 	%f418, 0f3C4CAF63;
	mov.f32 	%f419, 0f3B18F0FE;
	fma.rn.f32 	%f420, %f419, %f417, %f418;
	mov.f32 	%f421, 0f3DAAAABD;
	fma.rn.f32 	%f422, %f420, %f417, %f421;
	mul.rn.f32 	%f423, %f422, %f417;
	mul.rn.f32 	%f424, %f423, %f416;
	sub.f32 	%f425, %f414, %f416;
	neg.f32 	%f426, %f416;
	add.f32 	%f427, %f425, %f425;
	fma.rn.f32 	%f428, %f426, %f414, %f427;
	mul.rn.f32 	%f429, %f399, %f428;
	add.f32 	%f430, %f424, %f416;
	sub.f32 	%f431, %f416, %f430;
	add.f32 	%f432, %f424, %f431;
	add.f32 	%f433, %f429, %f432;
	add.f32 	%f434, %f430, %f433;
	sub.f32 	%f435, %f430, %f434;
	add.f32 	%f436, %f433, %f435;
	mov.f32 	%f437, 0f3F317200;
	mul.rn.f32 	%f438, %f413, %f437;
	mov.f32 	%f439, 0f35BFBE8E;
	mul.rn.f32 	%f440, %f413, %f439;
	add.f32 	%f441, %f438, %f434;
	sub.f32 	%f442, %f438, %f441;
	add.f32 	%f443, %f434, %f442;
	add.f32 	%f444, %f436, %f443;
	add.f32 	%f445, %f440, %f444;
	add.f32 	%f446, %f441, %f445;
	sub.f32 	%f447, %f441, %f446;
	add.f32 	%f448, %f445, %f447;
	mov.f32 	%f449, 0f3EE66666;
	mul.rn.f32 	%f450, %f449, %f446;
	neg.f32 	%f451, %f450;
	fma.rn.f32 	%f452, %f449, %f446, %f451;
	fma.rn.f32 	%f453, %f449, %f448, %f452;
	mov.f32 	%f454, 0f00000000;
	fma.rn.f32 	%f455, %f454, %f446, %f453;
	add.rn.f32 	%f456, %f450, %f455;
	neg.f32 	%f457, %f456;
	add.rn.f32 	%f458, %f450, %f457;
	add.rn.f32 	%f459, %f458, %f455;
	mov.b32 	 %r233, %f456;
	setp.eq.s32	%p50, %r233, 1118925336;
	add.s32 	%r234, %r233, -1;
	mov.b32 	 %f460, %r234;
	add.f32 	%f461, %f459, 0f37000000;
	selp.f32	%f462, %f460, %f456, %p50;
	selp.f32	%f146, %f461, %f459, %p50;
	mul.f32 	%f463, %f462, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f464, %f463;
	mov.f32 	%f465, 0fBF317200;
	fma.rn.f32 	%f466, %f464, %f465, %f462;
	mov.f32 	%f467, 0fB5BFBE8E;
	fma.rn.f32 	%f468, %f464, %f467, %f466;
	mul.f32 	%f469, %f468, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f470, %f469;
	add.f32 	%f471, %f464, 0f00000000;
	ex2.approx.f32 	%f472, %f471;
	mul.f32 	%f473, %f470, %f472;
	setp.lt.f32	%p51, %f462, 0fC2D20000;
	selp.f32	%f474, 0f00000000, %f473, %p51;
	setp.gt.f32	%p52, %f462, 0f42D20000;
	selp.f32	%f862, 0f7F800000, %f474, %p52;
	setp.eq.f32	%p53, %f862, 0f7F800000;
	@%p53 bra 	BB0_60;

	fma.rn.f32 	%f862, %f862, %f146, %f862;

BB0_60:
	mov.f32 	%f746, 0f3E666666;
	cvt.rzi.f32.f32	%f745, %f746;
	fma.rn.f32 	%f744, %f745, 0fC0000000, 0f3EE66666;
	abs.f32 	%f743, %f744;
	setp.lt.f32	%p54, %f141, 0f00000000;
	setp.eq.f32	%p55, %f743, 0f3F800000;
	and.pred  	%p3, %p54, %p55;
	mov.b32 	 %r235, %f862;
	xor.b32  	%r236, %r235, -2147483648;
	mov.b32 	 %f475, %r236;
	selp.f32	%f864, %f475, %f862, %p3;
	setp.eq.f32	%p56, %f141, 0f00000000;
	@%p56 bra 	BB0_63;
	bra.uni 	BB0_61;

BB0_63:
	add.f32 	%f478, %f141, %f141;
	selp.f32	%f864, %f478, 0f00000000, %p55;
	bra.uni 	BB0_64;

BB0_116:
	mov.u64 	%rd212, image_RNM0;
	cvta.global.u64 	%rd207, %rd212;
	mov.u32 	%r310, 8;
	mov.u64 	%rd211, 0;
	// inline asm
	call (%rd206), _rt_buffer_get_64, (%rd207, %r94, %r310, %rd18, %rd19, %rd211, %rd211);
	// inline asm
	mov.f32 	%f721, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs104, %f721;}

	// inline asm
	mov.u16 	%rs105, 0;
	st.v4.u16 	[%rd206], {%rs104, %rs104, %rs104, %rs105};

BB0_117:
	ld.global.u32 	%r311, [additive];
	setp.eq.s32	%p106, %r311, 0;
	@%p106 bra 	BB0_119;

	mov.u64 	%rd225, image_RNM1;
	cvta.global.u64 	%rd214, %rd225;
	mov.u32 	%r315, 8;
	mov.u64 	%rd224, 0;
	// inline asm
	call (%rd213), _rt_buffer_get_64, (%rd214, %r94, %r315, %rd18, %rd19, %rd224, %rd224);
	// inline asm
	ld.v4.u16 	{%rs112, %rs113, %rs114, %rs115}, [%rd213];
	// inline asm
	{  cvt.f32.f16 %f722, %rs112;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f723, %rs113;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f724, %rs114;}

	// inline asm
	// inline asm
	call (%rd219), _rt_buffer_get_64, (%rd214, %r94, %r315, %rd18, %rd19, %rd224, %rd224);
	// inline asm
	add.f32 	%f725, %f722, 0f00000000;
	add.f32 	%f726, %f723, 0f00000000;
	add.f32 	%f727, %f724, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs111, %f727;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs110, %f726;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs109, %f725;}

	// inline asm
	mov.u16 	%rs116, 0;
	st.v4.u16 	[%rd219], {%rs109, %rs110, %rs111, %rs116};
	bra.uni 	BB0_120;

BB0_119:
	mov.u64 	%rd232, image_RNM1;
	cvta.global.u64 	%rd227, %rd232;
	mov.u32 	%r317, 8;
	mov.u64 	%rd231, 0;
	// inline asm
	call (%rd226), _rt_buffer_get_64, (%rd227, %r94, %r317, %rd18, %rd19, %rd231, %rd231);
	// inline asm
	mov.f32 	%f728, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs117, %f728;}

	// inline asm
	mov.u16 	%rs118, 0;
	st.v4.u16 	[%rd226], {%rs117, %rs117, %rs117, %rs118};

BB0_120:
	ld.global.u32 	%r318, [additive];
	setp.eq.s32	%p107, %r318, 0;
	@%p107 bra 	BB0_122;

	mov.u64 	%rd245, image_RNM2;
	cvta.global.u64 	%rd234, %rd245;
	mov.u32 	%r322, 8;
	mov.u64 	%rd244, 0;
	// inline asm
	call (%rd233), _rt_buffer_get_64, (%rd234, %r94, %r322, %rd18, %rd19, %rd244, %rd244);
	// inline asm
	ld.v4.u16 	{%rs125, %rs126, %rs127, %rs128}, [%rd233];
	// inline asm
	{  cvt.f32.f16 %f729, %rs125;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f730, %rs126;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f731, %rs127;}

	// inline asm
	// inline asm
	call (%rd239), _rt_buffer_get_64, (%rd234, %r94, %r322, %rd18, %rd19, %rd244, %rd244);
	// inline asm
	add.f32 	%f732, %f729, 0f00000000;
	add.f32 	%f733, %f730, 0f00000000;
	add.f32 	%f734, %f731, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs124, %f734;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs123, %f733;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs122, %f732;}

	// inline asm
	mov.u16 	%rs129, 0;
	st.v4.u16 	[%rd239], {%rs122, %rs123, %rs124, %rs129};
	bra.uni 	BB0_123;

BB0_122:
	mov.u64 	%rd252, image_RNM2;
	cvta.global.u64 	%rd247, %rd252;
	mov.u32 	%r324, 8;
	mov.u64 	%rd251, 0;
	// inline asm
	call (%rd246), _rt_buffer_get_64, (%rd247, %r94, %r324, %rd18, %rd19, %rd251, %rd251);
	// inline asm
	mov.f32 	%f735, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs130, %f735;}

	// inline asm
	mov.u16 	%rs131, 0;
	st.v4.u16 	[%rd246], {%rs130, %rs130, %rs130, %rs131};

BB0_123:
	ld.global.u32 	%r325, [additive];
	setp.eq.s32	%p108, %r325, 0;
	@%p108 bra 	BB0_125;

	mov.u64 	%rd265, image_RNM3;
	cvta.global.u64 	%rd254, %rd265;
	mov.u32 	%r329, 8;
	mov.u64 	%rd264, 0;
	// inline asm
	call (%rd253), _rt_buffer_get_64, (%rd254, %r94, %r329, %rd18, %rd19, %rd264, %rd264);
	// inline asm
	ld.v4.u16 	{%rs138, %rs139, %rs140, %rs141}, [%rd253];
	// inline asm
	{  cvt.f32.f16 %f736, %rs138;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f737, %rs139;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f738, %rs140;}

	// inline asm
	// inline asm
	call (%rd259), _rt_buffer_get_64, (%rd254, %r94, %r329, %rd18, %rd19, %rd264, %rd264);
	// inline asm
	add.f32 	%f739, %f736, 0f00000000;
	add.f32 	%f740, %f737, 0f00000000;
	add.f32 	%f741, %f738, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs137, %f741;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs136, %f740;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs135, %f739;}

	// inline asm
	mov.u16 	%rs142, 0;
	st.v4.u16 	[%rd259], {%rs135, %rs136, %rs137, %rs142};
	bra.uni 	BB0_126;

BB0_125:
	mov.u64 	%rd272, image_RNM3;
	cvta.global.u64 	%rd267, %rd272;
	mov.u32 	%r331, 8;
	mov.u64 	%rd271, 0;
	// inline asm
	call (%rd266), _rt_buffer_get_64, (%rd267, %r94, %r331, %rd18, %rd19, %rd271, %rd271);
	// inline asm
	mov.f32 	%f742, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs143, %f742;}

	// inline asm
	mov.u16 	%rs144, 0;
	st.v4.u16 	[%rd266], {%rs143, %rs143, %rs143, %rs144};
	bra.uni 	BB0_126;

BB0_61:
	setp.geu.f32	%p57, %f141, 0f00000000;
	@%p57 bra 	BB0_64;

	mov.f32 	%f770, 0f3EE66666;
	cvt.rzi.f32.f32	%f477, %f770;
	setp.neu.f32	%p58, %f477, 0f3EE66666;
	selp.f32	%f864, 0f7FFFFFFF, %f864, %p58;

BB0_64:
	abs.f32 	%f747, %f141;
	add.f32 	%f479, %f747, 0f3EE66666;
	mov.b32 	 %r237, %f479;
	setp.lt.s32	%p60, %r237, 2139095040;
	@%p60 bra 	BB0_69;

	abs.f32 	%f768, %f141;
	setp.gtu.f32	%p61, %f768, 0f7F800000;
	@%p61 bra 	BB0_68;
	bra.uni 	BB0_66;

BB0_68:
	add.f32 	%f864, %f141, 0f3EE66666;
	bra.uni 	BB0_69;

BB0_66:
	abs.f32 	%f769, %f141;
	setp.neu.f32	%p62, %f769, 0f7F800000;
	@%p62 bra 	BB0_69;

	selp.f32	%f864, 0fFF800000, 0f7F800000, %p3;

BB0_69:
	mov.f32 	%f756, 0fB5BFBE8E;
	mov.f32 	%f755, 0fBF317200;
	mov.f32 	%f754, 0f00000000;
	mov.f32 	%f753, 0f35BFBE8E;
	mov.f32 	%f752, 0f3F317200;
	mov.f32 	%f751, 0f3DAAAABD;
	mov.f32 	%f750, 0f3C4CAF63;
	mov.f32 	%f749, 0f3B18F0FE;
	mov.f32 	%f748, 0f3EE66666;
	setp.eq.f32	%p63, %f141, 0f3F800000;
	selp.f32	%f157, 0f3F800000, %f864, %p63;
	abs.f32 	%f158, %f142;
	setp.lt.f32	%p64, %f158, 0f00800000;
	mul.f32 	%f482, %f158, 0f4B800000;
	selp.f32	%f483, 0fC3170000, 0fC2FE0000, %p64;
	selp.f32	%f484, %f482, %f158, %p64;
	mov.b32 	 %r238, %f484;
	and.b32  	%r239, %r238, 8388607;
	or.b32  	%r240, %r239, 1065353216;
	mov.b32 	 %f485, %r240;
	shr.u32 	%r241, %r238, 23;
	cvt.rn.f32.u32	%f486, %r241;
	add.f32 	%f487, %f483, %f486;
	setp.gt.f32	%p65, %f485, 0f3FB504F3;
	mul.f32 	%f488, %f485, 0f3F000000;
	add.f32 	%f489, %f487, 0f3F800000;
	selp.f32	%f490, %f488, %f485, %p65;
	selp.f32	%f491, %f489, %f487, %p65;
	add.f32 	%f492, %f490, 0fBF800000;
	add.f32 	%f481, %f490, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f480,%f481;
	// inline asm
	add.f32 	%f493, %f492, %f492;
	mul.f32 	%f494, %f480, %f493;
	mul.f32 	%f495, %f494, %f494;
	fma.rn.f32 	%f498, %f749, %f495, %f750;
	fma.rn.f32 	%f500, %f498, %f495, %f751;
	mul.rn.f32 	%f501, %f500, %f495;
	mul.rn.f32 	%f502, %f501, %f494;
	sub.f32 	%f503, %f492, %f494;
	neg.f32 	%f504, %f494;
	add.f32 	%f505, %f503, %f503;
	fma.rn.f32 	%f506, %f504, %f492, %f505;
	mul.rn.f32 	%f507, %f480, %f506;
	add.f32 	%f508, %f502, %f494;
	sub.f32 	%f509, %f494, %f508;
	add.f32 	%f510, %f502, %f509;
	add.f32 	%f511, %f507, %f510;
	add.f32 	%f512, %f508, %f511;
	sub.f32 	%f513, %f508, %f512;
	add.f32 	%f514, %f511, %f513;
	mul.rn.f32 	%f516, %f491, %f752;
	mul.rn.f32 	%f518, %f491, %f753;
	add.f32 	%f519, %f516, %f512;
	sub.f32 	%f520, %f516, %f519;
	add.f32 	%f521, %f512, %f520;
	add.f32 	%f522, %f514, %f521;
	add.f32 	%f523, %f518, %f522;
	add.f32 	%f524, %f519, %f523;
	sub.f32 	%f525, %f519, %f524;
	add.f32 	%f526, %f523, %f525;
	mul.rn.f32 	%f528, %f748, %f524;
	neg.f32 	%f529, %f528;
	fma.rn.f32 	%f530, %f748, %f524, %f529;
	fma.rn.f32 	%f531, %f748, %f526, %f530;
	fma.rn.f32 	%f533, %f754, %f524, %f531;
	add.rn.f32 	%f534, %f528, %f533;
	neg.f32 	%f535, %f534;
	add.rn.f32 	%f536, %f528, %f535;
	add.rn.f32 	%f537, %f536, %f533;
	mov.b32 	 %r242, %f534;
	setp.eq.s32	%p66, %r242, 1118925336;
	add.s32 	%r243, %r242, -1;
	mov.b32 	 %f538, %r243;
	add.f32 	%f539, %f537, 0f37000000;
	selp.f32	%f540, %f538, %f534, %p66;
	selp.f32	%f159, %f539, %f537, %p66;
	mul.f32 	%f541, %f540, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f542, %f541;
	fma.rn.f32 	%f544, %f542, %f755, %f540;
	fma.rn.f32 	%f546, %f542, %f756, %f544;
	mul.f32 	%f547, %f546, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f548, %f547;
	add.f32 	%f549, %f542, 0f00000000;
	ex2.approx.f32 	%f550, %f549;
	mul.f32 	%f551, %f548, %f550;
	setp.lt.f32	%p67, %f540, 0fC2D20000;
	selp.f32	%f552, 0f00000000, %f551, %p67;
	setp.gt.f32	%p68, %f540, 0f42D20000;
	selp.f32	%f865, 0f7F800000, %f552, %p68;
	setp.eq.f32	%p69, %f865, 0f7F800000;
	@%p69 bra 	BB0_71;

	fma.rn.f32 	%f865, %f865, %f159, %f865;

BB0_71:
	setp.lt.f32	%p70, %f142, 0f00000000;
	and.pred  	%p4, %p70, %p55;
	mov.b32 	 %r244, %f865;
	xor.b32  	%r245, %r244, -2147483648;
	mov.b32 	 %f553, %r245;
	selp.f32	%f867, %f553, %f865, %p4;
	setp.eq.f32	%p72, %f142, 0f00000000;
	@%p72 bra 	BB0_74;
	bra.uni 	BB0_72;

BB0_74:
	add.f32 	%f556, %f142, %f142;
	selp.f32	%f867, %f556, 0f00000000, %p55;
	bra.uni 	BB0_75;

BB0_72:
	setp.geu.f32	%p73, %f142, 0f00000000;
	@%p73 bra 	BB0_75;

	mov.f32 	%f767, 0f3EE66666;
	cvt.rzi.f32.f32	%f555, %f767;
	setp.neu.f32	%p74, %f555, 0f3EE66666;
	selp.f32	%f867, 0f7FFFFFFF, %f867, %p74;

BB0_75:
	abs.f32 	%f771, %f142;
	add.f32 	%f557, %f771, 0f3EE66666;
	mov.b32 	 %r246, %f557;
	setp.lt.s32	%p76, %r246, 2139095040;
	@%p76 bra 	BB0_80;

	abs.f32 	%f772, %f142;
	setp.gtu.f32	%p77, %f772, 0f7F800000;
	@%p77 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f867, %f142, 0f3EE66666;
	bra.uni 	BB0_80;

BB0_77:
	abs.f32 	%f773, %f142;
	setp.neu.f32	%p78, %f773, 0f7F800000;
	@%p78 bra 	BB0_80;

	selp.f32	%f867, 0fFF800000, 0f7F800000, %p4;

BB0_80:
	mov.f32 	%f765, 0fB5BFBE8E;
	mov.f32 	%f764, 0fBF317200;
	mov.f32 	%f763, 0f00000000;
	mov.f32 	%f762, 0f35BFBE8E;
	mov.f32 	%f761, 0f3F317200;
	mov.f32 	%f760, 0f3DAAAABD;
	mov.f32 	%f759, 0f3C4CAF63;
	mov.f32 	%f758, 0f3B18F0FE;
	mov.f32 	%f757, 0f3EE66666;
	setp.eq.f32	%p79, %f142, 0f3F800000;
	selp.f32	%f170, 0f3F800000, %f867, %p79;
	abs.f32 	%f171, %f143;
	setp.lt.f32	%p80, %f171, 0f00800000;
	mul.f32 	%f560, %f171, 0f4B800000;
	selp.f32	%f561, 0fC3170000, 0fC2FE0000, %p80;
	selp.f32	%f562, %f560, %f171, %p80;
	mov.b32 	 %r247, %f562;
	and.b32  	%r248, %r247, 8388607;
	or.b32  	%r249, %r248, 1065353216;
	mov.b32 	 %f563, %r249;
	shr.u32 	%r250, %r247, 23;
	cvt.rn.f32.u32	%f564, %r250;
	add.f32 	%f565, %f561, %f564;
	setp.gt.f32	%p81, %f563, 0f3FB504F3;
	mul.f32 	%f566, %f563, 0f3F000000;
	add.f32 	%f567, %f565, 0f3F800000;
	selp.f32	%f568, %f566, %f563, %p81;
	selp.f32	%f569, %f567, %f565, %p81;
	add.f32 	%f570, %f568, 0fBF800000;
	add.f32 	%f559, %f568, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f558,%f559;
	// inline asm
	add.f32 	%f571, %f570, %f570;
	mul.f32 	%f572, %f558, %f571;
	mul.f32 	%f573, %f572, %f572;
	fma.rn.f32 	%f576, %f758, %f573, %f759;
	fma.rn.f32 	%f578, %f576, %f573, %f760;
	mul.rn.f32 	%f579, %f578, %f573;
	mul.rn.f32 	%f580, %f579, %f572;
	sub.f32 	%f581, %f570, %f572;
	neg.f32 	%f582, %f572;
	add.f32 	%f583, %f581, %f581;
	fma.rn.f32 	%f584, %f582, %f570, %f583;
	mul.rn.f32 	%f585, %f558, %f584;
	add.f32 	%f586, %f580, %f572;
	sub.f32 	%f587, %f572, %f586;
	add.f32 	%f588, %f580, %f587;
	add.f32 	%f589, %f585, %f588;
	add.f32 	%f590, %f586, %f589;
	sub.f32 	%f591, %f586, %f590;
	add.f32 	%f592, %f589, %f591;
	mul.rn.f32 	%f594, %f569, %f761;
	mul.rn.f32 	%f596, %f569, %f762;
	add.f32 	%f597, %f594, %f590;
	sub.f32 	%f598, %f594, %f597;
	add.f32 	%f599, %f590, %f598;
	add.f32 	%f600, %f592, %f599;
	add.f32 	%f601, %f596, %f600;
	add.f32 	%f602, %f597, %f601;
	sub.f32 	%f603, %f597, %f602;
	add.f32 	%f604, %f601, %f603;
	mul.rn.f32 	%f606, %f757, %f602;
	neg.f32 	%f607, %f606;
	fma.rn.f32 	%f608, %f757, %f602, %f607;
	fma.rn.f32 	%f609, %f757, %f604, %f608;
	fma.rn.f32 	%f611, %f763, %f602, %f609;
	add.rn.f32 	%f612, %f606, %f611;
	neg.f32 	%f613, %f612;
	add.rn.f32 	%f614, %f606, %f613;
	add.rn.f32 	%f615, %f614, %f611;
	mov.b32 	 %r251, %f612;
	setp.eq.s32	%p82, %r251, 1118925336;
	add.s32 	%r252, %r251, -1;
	mov.b32 	 %f616, %r252;
	add.f32 	%f617, %f615, 0f37000000;
	selp.f32	%f618, %f616, %f612, %p82;
	selp.f32	%f172, %f617, %f615, %p82;
	mul.f32 	%f619, %f618, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f620, %f619;
	fma.rn.f32 	%f622, %f620, %f764, %f618;
	fma.rn.f32 	%f624, %f620, %f765, %f622;
	mul.f32 	%f625, %f624, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f626, %f625;
	add.f32 	%f627, %f620, 0f00000000;
	ex2.approx.f32 	%f628, %f627;
	mul.f32 	%f629, %f626, %f628;
	setp.lt.f32	%p83, %f618, 0fC2D20000;
	selp.f32	%f630, 0f00000000, %f629, %p83;
	setp.gt.f32	%p84, %f618, 0f42D20000;
	selp.f32	%f868, 0f7F800000, %f630, %p84;
	setp.eq.f32	%p85, %f868, 0f7F800000;
	@%p85 bra 	BB0_82;

	fma.rn.f32 	%f868, %f868, %f172, %f868;

BB0_82:
	setp.lt.f32	%p86, %f143, 0f00000000;
	and.pred  	%p5, %p86, %p55;
	mov.b32 	 %r253, %f868;
	xor.b32  	%r254, %r253, -2147483648;
	mov.b32 	 %f631, %r254;
	selp.f32	%f870, %f631, %f868, %p5;
	setp.eq.f32	%p88, %f143, 0f00000000;
	@%p88 bra 	BB0_85;
	bra.uni 	BB0_83;

BB0_85:
	add.f32 	%f634, %f143, %f143;
	selp.f32	%f870, %f634, 0f00000000, %p55;
	bra.uni 	BB0_86;

BB0_83:
	setp.geu.f32	%p89, %f143, 0f00000000;
	@%p89 bra 	BB0_86;

	mov.f32 	%f766, 0f3EE66666;
	cvt.rzi.f32.f32	%f633, %f766;
	setp.neu.f32	%p90, %f633, 0f3EE66666;
	selp.f32	%f870, 0f7FFFFFFF, %f870, %p90;

BB0_86:
	abs.f32 	%f790, %f143;
	add.f32 	%f635, %f790, 0f3EE66666;
	mov.b32 	 %r255, %f635;
	setp.lt.s32	%p92, %r255, 2139095040;
	@%p92 bra 	BB0_91;

	abs.f32 	%f791, %f143;
	setp.gtu.f32	%p93, %f791, 0f7F800000;
	@%p93 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f870, %f143, 0f3EE66666;
	bra.uni 	BB0_91;

BB0_88:
	abs.f32 	%f792, %f143;
	setp.neu.f32	%p94, %f792, 0f7F800000;
	@%p94 bra 	BB0_91;

	selp.f32	%f870, 0fFF800000, 0f7F800000, %p5;

BB0_91:
	mov.u32 	%r332, 4;
	setp.eq.f32	%p95, %f143, 0f3F800000;
	selp.f32	%f636, 0f3F800000, %f870, %p95;
	cvt.u64.u32	%rd74, %r4;
	cvt.u64.u32	%rd73, %r3;
	mov.u64 	%rd77, image;
	cvta.global.u64 	%rd72, %rd77;
	// inline asm
	call (%rd71), _rt_buffer_get_64, (%rd72, %r94, %r332, %rd73, %rd74, %rd25, %rd25);
	// inline asm
	cvt.sat.f32.f32	%f637, %f636;
	mul.f32 	%f638, %f637, 0f437FFD71;
	cvt.rzi.u32.f32	%r258, %f638;
	cvt.sat.f32.f32	%f639, %f170;
	mul.f32 	%f640, %f639, 0f437FFD71;
	cvt.rzi.u32.f32	%r259, %f640;
	cvt.sat.f32.f32	%f641, %f157;
	mul.f32 	%f642, %f641, 0f437FFD71;
	cvt.rzi.u32.f32	%r260, %f642;
	cvt.u16.u32	%rs20, %r258;
	cvt.u16.u32	%rs21, %r260;
	cvt.u16.u32	%rs22, %r259;
	mov.u16 	%rs23, 255;
	st.v4.u8 	[%rd71], {%rs20, %rs22, %rs21, %rs23};
	ld.global.u32 	%r394, [imageEnabled];

BB0_92:
	and.b32  	%r261, %r394, 4;
	setp.eq.s32	%p96, %r261, 0;
	@%p96 bra 	BB0_94;

	mov.u32 	%r333, 8;
	cvt.u64.u32	%rd80, %r3;
	cvt.u64.u32	%rd81, %r4;
	mov.u64 	%rd84, image_HDR;
	cvta.global.u64 	%rd79, %rd84;
	// inline asm
	call (%rd78), _rt_buffer_get_64, (%rd79, %r94, %r333, %rd80, %rd81, %rd25, %rd25);
	// inline asm
	mov.f32 	%f646, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f646;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f143;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f142;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs24, %f141;}

	// inline asm
	st.v4.u16 	[%rd78], {%rs24, %rs25, %rs26, %rs27};
	ld.global.u32 	%r394, [imageEnabled];

BB0_94:
	and.b32  	%r264, %r394, 16;
	setp.eq.s32	%p97, %r264, 0;
	@%p97 bra 	BB0_96;

	mov.u32 	%r334, 8;
	cvt.u64.u32	%rd88, %r4;
	cvt.u64.u32	%rd87, %r3;
	mov.u64 	%rd91, image_HDR2;
	cvta.global.u64 	%rd86, %rd91;
	// inline asm
	call (%rd85), _rt_buffer_get_64, (%rd86, %r94, %r334, %rd87, %rd88, %rd25, %rd25);
	// inline asm
	mov.f32 	%f650, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs31, %f650;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs30, %f137;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f136;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f135;}

	// inline asm
	st.v4.u16 	[%rd85], {%rs28, %rs29, %rs30, %rs31};

BB0_96:
	cvt.u64.u32	%rd16, %r3;
	cvt.u64.u32	%rd17, %r4;
	mul.f32 	%f183, %f123, 0f3F000000;
	mul.f32 	%f184, %f124, 0f3F000000;
	mul.f32 	%f185, %f125, 0f3F000000;
	ld.global.u32 	%r267, [additive];
	setp.eq.s32	%p98, %r267, 0;
	mov.f32 	%f651, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs32, %f651;}

	// inline asm
	@%p98 bra 	BB0_98;

	mov.u32 	%r335, 8;
	mov.u64 	%rd104, image_RNM0;
	cvta.global.u64 	%rd93, %rd104;
	// inline asm
	call (%rd92), _rt_buffer_get_64, (%rd93, %r94, %r335, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs39, %rs40, %rs41, %rs42}, [%rd92];
	// inline asm
	{  cvt.f32.f16 %f652, %rs39;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f653, %rs40;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f654, %rs41;}

	// inline asm
	// inline asm
	call (%rd98), _rt_buffer_get_64, (%rd93, %r94, %r335, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f655, %f183, %f652;
	add.f32 	%f656, %f184, %f653;
	add.f32 	%f657, %f185, %f654;
	// inline asm
	{  cvt.rn.f16.f32 %rs38, %f657;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs37, %f656;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f655;}

	// inline asm
	st.v4.u16 	[%rd98], {%rs36, %rs37, %rs38, %rs32};
	bra.uni 	BB0_99;

BB0_98:
	mov.u32 	%r342, 8;
	mov.u64 	%rd111, image_RNM0;
	cvta.global.u64 	%rd106, %rd111;
	// inline asm
	call (%rd105), _rt_buffer_get_64, (%rd106, %r94, %r342, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs45, %f185;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs44, %f184;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs43, %f183;}

	// inline asm
	st.v4.u16 	[%rd105], {%rs43, %rs44, %rs45, %rs32};

BB0_99:
	mov.f32 	%f662, 0f34000000;
	max.f32 	%f663, %f183, %f662;
	mul.f32 	%f664, %f126, 0f3F000000;
	div.rn.f32 	%f665, %f664, %f663;
	max.f32 	%f666, %f184, %f662;
	mul.f32 	%f667, %f127, 0f3F000000;
	div.rn.f32 	%f668, %f667, %f666;
	max.f32 	%f669, %f185, %f662;
	mul.f32 	%f670, %f128, 0f3F000000;
	div.rn.f32 	%f671, %f670, %f669;
	fma.rn.f32 	%f186, %f665, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f187, %f668, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f188, %f671, 0f3F000000, 0f3F000000;
	mul.f32 	%f672, %f129, 0f3F000000;
	div.rn.f32 	%f673, %f672, %f663;
	mul.f32 	%f674, %f130, 0f3F000000;
	div.rn.f32 	%f675, %f674, %f666;
	mul.f32 	%f676, %f131, 0f3F000000;
	div.rn.f32 	%f677, %f676, %f669;
	fma.rn.f32 	%f189, %f673, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f190, %f675, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f191, %f677, 0f3F000000, 0f3F000000;
	mul.f32 	%f678, %f132, 0f3F000000;
	div.rn.f32 	%f679, %f678, %f663;
	mul.f32 	%f680, %f133, 0f3F000000;
	div.rn.f32 	%f681, %f680, %f666;
	mul.f32 	%f682, %f134, 0f3F000000;
	div.rn.f32 	%f683, %f682, %f669;
	fma.rn.f32 	%f192, %f679, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f193, %f681, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f194, %f683, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r274, [additive];
	setp.eq.s32	%p99, %r274, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs46, %f651;}

	// inline asm
	@%p99 bra 	BB0_101;

	mov.u32 	%r336, 8;
	mov.u64 	%rd124, image_RNM1;
	cvta.global.u64 	%rd113, %rd124;
	// inline asm
	call (%rd112), _rt_buffer_get_64, (%rd113, %r94, %r336, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs53, %rs54, %rs55, %rs56}, [%rd112];
	// inline asm
	{  cvt.f32.f16 %f684, %rs53;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f685, %rs54;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f686, %rs55;}

	// inline asm
	// inline asm
	call (%rd118), _rt_buffer_get_64, (%rd113, %r94, %r336, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f687, %f186, %f684;
	add.f32 	%f688, %f187, %f685;
	add.f32 	%f689, %f188, %f686;
	// inline asm
	{  cvt.rn.f16.f32 %rs52, %f689;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f688;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f687;}

	// inline asm
	st.v4.u16 	[%rd118], {%rs50, %rs51, %rs52, %rs46};
	bra.uni 	BB0_102;

BB0_101:
	mov.u32 	%r341, 8;
	mov.u64 	%rd131, image_RNM1;
	cvta.global.u64 	%rd126, %rd131;
	// inline asm
	call (%rd125), _rt_buffer_get_64, (%rd126, %r94, %r341, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs59, %f188;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs58, %f187;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f186;}

	// inline asm
	st.v4.u16 	[%rd125], {%rs57, %rs58, %rs59, %rs46};

BB0_102:
	ld.global.u32 	%r281, [additive];
	setp.eq.s32	%p100, %r281, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs60, %f651;}

	// inline asm
	@%p100 bra 	BB0_104;

	mov.u32 	%r337, 8;
	mov.u64 	%rd144, image_RNM2;
	cvta.global.u64 	%rd133, %rd144;
	// inline asm
	call (%rd132), _rt_buffer_get_64, (%rd133, %r94, %r337, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs67, %rs68, %rs69, %rs70}, [%rd132];
	// inline asm
	{  cvt.f32.f16 %f694, %rs67;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f695, %rs68;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f696, %rs69;}

	// inline asm
	// inline asm
	call (%rd138), _rt_buffer_get_64, (%rd133, %r94, %r337, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f697, %f189, %f694;
	add.f32 	%f698, %f190, %f695;
	add.f32 	%f699, %f191, %f696;
	// inline asm
	{  cvt.rn.f16.f32 %rs66, %f699;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f698;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f697;}

	// inline asm
	st.v4.u16 	[%rd138], {%rs64, %rs65, %rs66, %rs60};
	bra.uni 	BB0_105;

BB0_104:
	mov.u32 	%r340, 8;
	mov.u64 	%rd151, image_RNM2;
	cvta.global.u64 	%rd146, %rd151;
	// inline asm
	call (%rd145), _rt_buffer_get_64, (%rd146, %r94, %r340, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs73, %f191;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs72, %f190;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f189;}

	// inline asm
	st.v4.u16 	[%rd145], {%rs71, %rs72, %rs73, %rs60};

BB0_105:
	ld.global.u32 	%r288, [additive];
	setp.eq.s32	%p101, %r288, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs74, %f651;}

	// inline asm
	@%p101 bra 	BB0_107;

	mov.u32 	%r338, 8;
	mov.u64 	%rd164, image_RNM3;
	cvta.global.u64 	%rd153, %rd164;
	// inline asm
	call (%rd152), _rt_buffer_get_64, (%rd153, %r94, %r338, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs81, %rs82, %rs83, %rs84}, [%rd152];
	// inline asm
	{  cvt.f32.f16 %f704, %rs81;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f705, %rs82;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f706, %rs83;}

	// inline asm
	// inline asm
	call (%rd158), _rt_buffer_get_64, (%rd153, %r94, %r338, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f707, %f192, %f704;
	add.f32 	%f708, %f193, %f705;
	add.f32 	%f709, %f194, %f706;
	// inline asm
	{  cvt.rn.f16.f32 %rs80, %f709;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs79, %f708;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs78, %f707;}

	// inline asm
	st.v4.u16 	[%rd158], {%rs78, %rs79, %rs80, %rs74};
	bra.uni 	BB0_126;

BB0_107:
	mov.u32 	%r339, 8;
	mov.u64 	%rd171, image_RNM3;
	cvta.global.u64 	%rd166, %rd171;
	// inline asm
	call (%rd165), _rt_buffer_get_64, (%rd166, %r94, %r339, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs87, %f194;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs86, %f193;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs85, %f192;}

	// inline asm
	st.v4.u16 	[%rd165], {%rs85, %rs86, %rs87, %rs74};

BB0_126:
	ret;
}