//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//

.version 8.0
.target sm_52
.address_size 64

	// .globl	__raygen__oxMain
.const .align 16 .b8 params[1184];

.visible .entry __raygen__oxMain()
{
	.reg .pred 	%p<179>;
	.reg .b16 	%rs<65>;
	.reg .f32 	%f<1412>;
	.reg .b32 	%r<418>;
	.reg .b64 	%rd<54>;


	// begin inline asm
	call (%r23), _optix_get_launch_index_x, ();
	// end inline asm
	// begin inline asm
	call (%r24), _optix_get_launch_index_y, ();
	// end inline asm
	ld.const.u64 	%rd13, [params+400];
	cvta.to.global.u64 	%rd14, %rd13;
	ld.const.u32 	%r29, [params+392];
	mad.lo.s32 	%r30, %r29, %r24, %r23;
	mul.wide.u32 	%rd15, %r30, 4;
	add.s64 	%rd1, %rd14, %rd15;
	ld.global.v2.u8 	{%rs9, %rs63}, [%rd1];
	or.b16  	%rs11, %rs9, %rs63;
	and.b16  	%rs12, %rs11, 255;
	setp.eq.s16 	%p10, %rs12, 0;
	@%p10 bra 	$L__BB0_2;

	ld.global.u8 	%rs62, [%rd1+2];
	bra.uni 	$L__BB0_3;

$L__BB0_2:
	ld.global.u8 	%rs62, [%rd1+2];
	setp.eq.s16 	%p11, %rs62, 0;
	mov.f32 	%f1331, 0f00000000;
	mov.u16 	%rs63, 0;
	mov.f32 	%f1332, %f1331;
	mov.f32 	%f1333, %f1331;
	@%p11 bra 	$L__BB0_4;

$L__BB0_3:
	cvt.rn.f32.u16 	%f237, %rs9;
	div.rn.f32 	%f238, %f237, 0f437F0000;
	fma.rn.f32 	%f239, %f238, 0f40000000, 0fBF800000;
	and.b16  	%rs15, %rs63, 255;
	cvt.rn.f32.u16 	%f240, %rs15;
	div.rn.f32 	%f241, %f240, 0f437F0000;
	fma.rn.f32 	%f242, %f241, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16 	%f243, %rs62;
	div.rn.f32 	%f244, %f243, 0f437F0000;
	fma.rn.f32 	%f245, %f244, 0f40000000, 0fBF800000;
	mul.f32 	%f246, %f242, %f242;
	fma.rn.f32 	%f247, %f239, %f239, %f246;
	fma.rn.f32 	%f248, %f245, %f245, %f247;
	sqrt.rn.f32 	%f249, %f248;
	rcp.rn.f32 	%f250, %f249;
	mul.f32 	%f1333, %f250, %f245;
	mul.f32 	%f1332, %f250, %f242;
	mul.f32 	%f1331, %f239, %f250;

$L__BB0_4:
	ld.const.v2.u32 	{%r31, %r32}, [params];
	add.s32 	%r3, %r31, %r23;
	add.s32 	%r4, %r32, %r24;
	setp.eq.f32 	%p12, %f1331, 0f00000000;
	setp.eq.f32 	%p13, %f1332, 0f00000000;
	and.pred  	%p14, %p12, %p13;
	setp.eq.f32 	%p15, %f1333, 0f00000000;
	and.pred  	%p16, %p15, %p14;
	@%p16 bra 	$L__BB0_141;
	bra.uni 	$L__BB0_5;

$L__BB0_141:
	ld.const.u32 	%r22, [params+104];
	and.b32  	%r399, %r22, 1;
	setp.eq.b32 	%p170, %r399, 1;
	mov.pred 	%p171, 0;
	xor.pred  	%p172, %p170, %p171;
	not.pred 	%p173, %p172;
	@%p173 bra 	$L__BB0_143;

	ld.const.u64 	%rd38, [params+144];
	cvta.to.global.u64 	%rd39, %rd38;
	ld.const.u32 	%r400, [params+136];
	mad.lo.s32 	%r401, %r400, %r4, %r3;
	mul.wide.u32 	%rd40, %r401, 4;
	add.s64 	%rd41, %rd39, %rd40;
	mov.u16 	%rs43, 0;
	st.global.v4.u8 	[%rd41], {%rs43, %rs43, %rs43, %rs43};

$L__BB0_143:
	and.b32  	%r402, %r22, 8;
	setp.eq.s32 	%p174, %r402, 0;
	@%p174 bra 	$L__BB0_145;

	ld.const.u64 	%rd42, [params+192];
	cvta.to.global.u64 	%rd43, %rd42;
	ld.const.u32 	%r403, [params+184];
	mad.lo.s32 	%r404, %r403, %r4, %r3;
	mov.f32 	%f1318, 0f00000000;
	cvt.rzi.u32.f32 	%r405, %f1318;
	mul.wide.u32 	%rd44, %r404, 2;
	add.s64 	%rd45, %rd43, %rd44;
	mov.u16 	%rs44, 0;
	cvt.u16.u32 	%rs45, %r405;
	st.global.v2.u8 	[%rd45], {%rs45, %rs44};

$L__BB0_145:
	and.b32  	%r406, %r22, 4;
	setp.eq.s32 	%p175, %r406, 0;
	@%p175 bra 	$L__BB0_149;

	ld.const.u32 	%r407, [params+108];
	setp.eq.s32 	%p176, %r407, 0;
	ld.const.u64 	%rd46, [params+224];
	cvta.to.global.u64 	%rd47, %rd46;
	ld.const.u32 	%r408, [params+216];
	mad.lo.s32 	%r409, %r408, %r4, %r3;
	mul.wide.u32 	%rd48, %r409, 8;
	add.s64 	%rd12, %rd47, %rd48;
	@%p176 bra 	$L__BB0_148;

	ld.global.v4.u16 	{%rs52, %rs53, %rs54, %rs55}, [%rd12];
	// begin inline asm
	{  cvt.f32.f16 %f1319, %rs52;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1320, %rs53;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1321, %rs54;}

	// end inline asm
	add.f32 	%f1322, %f1319, 0f00000000;
	add.f32 	%f1323, %f1320, 0f00000000;
	add.f32 	%f1324, %f1321, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs51, %f1324;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f1323;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs49, %f1322;}

	// end inline asm
	mov.u16 	%rs56, 0;
	st.global.v4.u16 	[%rd12], {%rs49, %rs50, %rs51, %rs56};
	bra.uni 	$L__BB0_149;

$L__BB0_5:
	ld.const.u64 	%rd16, [params+432];
	cvta.to.global.u64 	%rd17, %rd16;
	ld.const.u32 	%r35, [params+424];
	mad.lo.s32 	%r36, %r35, %r24, %r23;
	mul.wide.u32 	%rd18, %r36, 12;
	add.s64 	%rd19, %rd17, %rd18;
	ld.global.f32 	%f10, [%rd19];
	mul.f32 	%f251, %f10, 0f3456BF95;
	ld.global.f32 	%f11, [%rd19+4];
	mul.f32 	%f252, %f11, 0f3456BF95;
	ld.global.f32 	%f12, [%rd19+8];
	mul.f32 	%f253, %f12, 0f3456BF95;
	abs.f32 	%f254, %f1331;
	div.rn.f32 	%f255, %f251, %f254;
	abs.f32 	%f256, %f1332;
	div.rn.f32 	%f257, %f252, %f256;
	abs.f32 	%f258, %f1333;
	div.rn.f32 	%f259, %f253, %f258;
	abs.f32 	%f260, %f255;
	abs.f32 	%f261, %f257;
	abs.f32 	%f262, %f259;
	mov.f32 	%f263, 0f38D1B717;
	max.f32 	%f264, %f260, %f263;
	max.f32 	%f265, %f261, %f263;
	max.f32 	%f266, %f262, %f263;
	fma.rn.f32 	%f13, %f1331, %f264, %f10;
	fma.rn.f32 	%f14, %f1332, %f265, %f11;
	fma.rn.f32 	%f15, %f1333, %f266, %f12;
	ld.const.u32 	%r5, [params+600];
	setp.eq.s32 	%p17, %r5, 0;
	@%p17 bra 	$L__BB0_46;

	ld.const.u64 	%rd20, [params+608];
	cvta.to.global.u64 	%rd2, %rd20;
	mov.f32 	%f274, 0f40000000;
	cvt.rzi.f32.f32 	%f275, %f274;
	add.f32 	%f276, %f275, %f275;
	mov.f32 	%f277, 0f40800000;
	sub.f32 	%f278, %f277, %f276;
	abs.f32 	%f16, %f278;
	ld.const.u32 	%r6, [params+544];
	ld.const.u32 	%r417, [params+104];
	and.b32  	%r8, %r417, 64;
	and.b32  	%r38, %r417, 32;
	setp.eq.s32 	%p18, %r38, 0;
	mov.u32 	%r413, 0;
	selp.f32 	%f17, 0f3F800000, 0f41200000, %p18;
	mul.f32 	%f18, %f13, 0f3456BF95;
	mul.f32 	%f19, %f14, 0f3456BF95;
	mul.f32 	%f20, %f15, 0f3456BF95;
	mov.f32 	%f273, 0f00000000;
	ld.const.u64 	%rd3, [params+96];
	abs.f32 	%f469, %f18;
	abs.f32 	%f470, %f19;
	max.f32 	%f471, %f469, %f470;
	abs.f32 	%f472, %f20;
	max.f32 	%f473, %f471, %f472;
	mov.f32 	%f1383, %f273;
	mov.f32 	%f1382, %f273;
	mov.f32 	%f1381, %f273;
	mov.f32 	%f1380, %f273;
	mov.f32 	%f1379, %f273;
	mov.f32 	%f1378, %f273;
	mov.f32 	%f1377, %f273;

$L__BB0_7:
	mul.wide.u32 	%rd21, %r413, 112;
	add.s64 	%rd5, %rd2, %rd21;
	ld.global.v4.f32 	{%f280, %f281, %f282, %f283}, [%rd5];
	ld.global.v4.f32 	{%f287, %f288, %f289, %f290}, [%rd5+16];
	ld.global.v4.f32 	{%f293, %f1349, %f1350, %f296}, [%rd5+32];
	ld.global.v4.f32 	{%f297, %f298, %f299, %f1347}, [%rd5+48];
	ld.global.v4.f32 	{%f301, %f302, %f303, %f304}, [%rd5+64];
	ld.global.v4.u32 	{%r39, %r40, %r41, %r42}, [%rd5+80];
	mov.b32 	%f41, %r39;
	mov.b32 	%f42, %r40;
	mov.b32 	%f43, %r41;
	ld.global.u64 	%rd6, [%rd5+96];
	sub.f32 	%f44, %f281, %f10;
	sub.f32 	%f45, %f282, %f11;
	sub.f32 	%f46, %f283, %f12;
	mul.f32 	%f305, %f45, %f45;
	fma.rn.f32 	%f306, %f44, %f44, %f305;
	fma.rn.f32 	%f307, %f46, %f46, %f306;
	sqrt.rn.f32 	%f308, %f307;
	rcp.rn.f32 	%f309, %f308;
	mul.f32 	%f47, %f44, %f309;
	mul.f32 	%f48, %f45, %f309;
	mul.f32 	%f49, %f46, %f309;
	mul.f32 	%f50, %f308, %f288;
	mul.f32 	%f51, %f308, %f290;
	abs.f32 	%f52, %f51;
	setp.lt.f32 	%p19, %f52, 0f00800000;
	mul.f32 	%f310, %f52, 0f4B800000;
	selp.f32 	%f311, %f310, %f52, %p19;
	selp.f32 	%f312, 0fC3170000, 0fC2FE0000, %p19;
	mov.b32 	%r46, %f311;
	and.b32  	%r47, %r46, 8388607;
	or.b32  	%r48, %r47, 1065353216;
	mov.b32 	%f313, %r48;
	shr.u32 	%r49, %r46, 23;
	cvt.rn.f32.u32 	%f314, %r49;
	add.f32 	%f315, %f312, %f314;
	setp.gt.f32 	%p20, %f313, 0f3FB504F3;
	mul.f32 	%f316, %f313, 0f3F000000;
	add.f32 	%f317, %f315, 0f3F800000;
	selp.f32 	%f318, %f317, %f315, %p20;
	selp.f32 	%f319, %f316, %f313, %p20;
	add.f32 	%f320, %f319, 0fBF800000;
	add.f32 	%f321, %f319, 0f3F800000;
	rcp.approx.ftz.f32 	%f322, %f321;
	add.f32 	%f323, %f320, %f320;
	mul.f32 	%f324, %f323, %f322;
	mul.f32 	%f325, %f324, %f324;
	mov.f32 	%f326, 0f3C4CAF63;
	mov.f32 	%f327, 0f3B18F0FE;
	fma.rn.f32 	%f328, %f327, %f325, %f326;
	mov.f32 	%f329, 0f3DAAAABD;
	fma.rn.f32 	%f330, %f328, %f325, %f329;
	mul.rn.f32 	%f331, %f330, %f325;
	mul.rn.f32 	%f332, %f331, %f324;
	sub.f32 	%f333, %f320, %f324;
	add.f32 	%f334, %f333, %f333;
	neg.f32 	%f335, %f324;
	fma.rn.f32 	%f336, %f335, %f320, %f334;
	mul.rn.f32 	%f337, %f322, %f336;
	add.f32 	%f338, %f332, %f324;
	sub.f32 	%f339, %f324, %f338;
	add.f32 	%f340, %f332, %f339;
	add.f32 	%f341, %f337, %f340;
	add.f32 	%f342, %f338, %f341;
	sub.f32 	%f343, %f338, %f342;
	add.f32 	%f344, %f341, %f343;
	mov.f32 	%f345, 0f3F317200;
	mul.rn.f32 	%f346, %f318, %f345;
	mov.f32 	%f347, 0f35BFBE8E;
	mul.rn.f32 	%f348, %f318, %f347;
	add.f32 	%f349, %f346, %f342;
	sub.f32 	%f350, %f346, %f349;
	add.f32 	%f351, %f342, %f350;
	add.f32 	%f352, %f344, %f351;
	add.f32 	%f353, %f348, %f352;
	add.f32 	%f354, %f349, %f353;
	sub.f32 	%f355, %f349, %f354;
	add.f32 	%f356, %f353, %f355;
	mul.rn.f32 	%f358, %f277, %f354;
	neg.f32 	%f359, %f358;
	fma.rn.f32 	%f360, %f277, %f354, %f359;
	fma.rn.f32 	%f361, %f277, %f356, %f360;
	fma.rn.f32 	%f363, %f273, %f354, %f361;
	add.rn.f32 	%f364, %f358, %f363;
	neg.f32 	%f365, %f364;
	add.rn.f32 	%f366, %f358, %f365;
	add.rn.f32 	%f367, %f366, %f363;
	mov.b32 	%r50, %f364;
	setp.eq.s32 	%p21, %r50, 1118925336;
	add.s32 	%r51, %r50, -1;
	mov.b32 	%f368, %r51;
	add.f32 	%f369, %f367, 0f37000000;
	selp.f32 	%f53, %f369, %f367, %p21;
	selp.f32 	%f370, %f368, %f364, %p21;
	mov.f32 	%f371, 0f3FB8AA3B;
	mul.rn.f32 	%f372, %f370, %f371;
	cvt.rzi.f32.f32 	%f373, %f372;
	abs.f32 	%f374, %f373;
	setp.gt.f32 	%p22, %f374, 0f42FC0000;
	mov.b32 	%r52, %f373;
	and.b32  	%r53, %r52, -2147483648;
	or.b32  	%r54, %r53, 1123811328;
	mov.b32 	%f375, %r54;
	selp.f32 	%f376, %f375, %f373, %p22;
	mov.f32 	%f377, 0fBF317218;
	fma.rn.f32 	%f378, %f376, %f377, %f370;
	mov.f32 	%f379, 0f3102E308;
	fma.rn.f32 	%f380, %f376, %f379, %f378;
	mul.f32 	%f381, %f380, 0f3FB8AA3B;
	add.f32 	%f382, %f376, 0f4B40007F;
	mov.b32 	%r55, %f382;
	shl.b32 	%r56, %r55, 23;
	mov.b32 	%f383, %r56;
	ex2.approx.ftz.f32 	%f384, %f381;
	mul.f32 	%f54, %f384, %f383;
	setp.eq.f32 	%p23, %f54, 0f7F800000;
	mov.f32 	%f1341, 0f7F800000;
	@%p23 bra 	$L__BB0_9;

	fma.rn.f32 	%f1341, %f54, %f53, %f54;

$L__BB0_9:
	setp.lt.f32 	%p24, %f51, 0f00000000;
	setp.eq.f32 	%p25, %f16, 0f3F800000;
	and.pred  	%p1, %p24, %p25;
	setp.eq.f32 	%p26, %f51, 0f00000000;
	@%p26 bra 	$L__BB0_13;
	bra.uni 	$L__BB0_10;

$L__BB0_13:
	add.f32 	%f389, %f51, %f51;
	selp.f32 	%f1343, %f389, 0f00000000, %p25;
	bra.uni 	$L__BB0_14;

$L__BB0_10:
	mov.b32 	%r57, %f1341;
	xor.b32  	%r58, %r57, -2147483648;
	mov.b32 	%f385, %r58;
	selp.f32 	%f1343, %f385, %f1341, %p1;
	setp.geu.f32 	%p27, %f51, 0f00000000;
	@%p27 bra 	$L__BB0_14;

	mov.f32 	%f386, 0f40800000;
	cvt.rzi.f32.f32 	%f387, %f386;
	setp.eq.f32 	%p28, %f387, 0f40800000;
	@%p28 bra 	$L__BB0_14;

	mov.f32 	%f1343, 0f7FFFFFFF;

$L__BB0_14:
	abs.f32 	%f1328, %f51;
	add.f32 	%f390, %f1328, 0f40800000;
	mov.b32 	%r59, %f390;
	setp.lt.s32 	%p30, %r59, 2139095040;
	@%p30 bra 	$L__BB0_19;

	abs.f32 	%f1329, %f51;
	setp.gtu.f32 	%p31, %f1329, 0f7F800000;
	@%p31 bra 	$L__BB0_18;
	bra.uni 	$L__BB0_16;

$L__BB0_18:
	add.f32 	%f1343, %f51, 0f40800000;
	bra.uni 	$L__BB0_19;

$L__BB0_16:
	abs.f32 	%f1330, %f51;
	setp.neu.f32 	%p32, %f1330, 0f7F800000;
	@%p32 bra 	$L__BB0_19;

	selp.f32 	%f1343, 0fFF800000, 0f7F800000, %p1;

$L__BB0_19:
	mov.f32 	%f391, 0f3F800000;
	sub.f32 	%f392, %f391, %f1343;
	setp.eq.f32 	%p33, %f51, 0f3F800000;
	selp.f32 	%f393, 0f00000000, %f392, %p33;
	cvt.sat.f32.f32 	%f394, %f393;
	fma.rn.f32 	%f395, %f50, %f50, %f289;
	div.rn.f32 	%f63, %f394, %f395;
	mul.f32 	%f396, %f1332, %f48;
	fma.rn.f32 	%f397, %f1331, %f47, %f396;
	fma.rn.f32 	%f64, %f1333, %f49, %f397;
	setp.eq.f32 	%p34, %f280, 0f3F800000;
	@%p34 bra 	$L__BB0_25;
	bra.uni 	$L__BB0_20;

$L__BB0_25:
	setp.eq.s64 	%p38, %rd6, 0;
	mov.f32 	%f1348, %f293;
	mov.f32 	%f1351, %f63;
	@%p38 bra 	$L__BB0_29;

	setp.geu.f32 	%p39, %f1347, 0f00000000;
	mov.f32 	%f1344, %f47;
	mov.f32 	%f1345, %f48;
	mov.f32 	%f1346, %f49;
	@%p39 bra 	$L__BB0_28;

	mul.f32 	%f420, %f42, %f45;
	fma.rn.f32 	%f421, %f41, %f44, %f420;
	fma.rn.f32 	%f422, %f43, %f46, %f421;
	rcp.rn.f32 	%f423, %f422;
	mul.f32 	%f1344, %f44, %f423;
	mul.f32 	%f1345, %f45, %f423;
	mul.f32 	%f1346, %f46, %f423;
	neg.f32 	%f1347, %f1347;

$L__BB0_28:
	mul.f32 	%f424, %f43, %f49;
	mul.f32 	%f425, %f42, %f48;
	neg.f32 	%f426, %f425;
	mul.f32 	%f427, %f41, %f47;
	sub.f32 	%f428, %f426, %f427;
	sub.f32 	%f429, %f428, %f424;
	setp.gt.f32 	%p40, %f429, 0f00000000;
	selp.f32 	%f430, 0f3F800000, 0f00000000, %p40;
	mov.f32 	%f431, 0f3F800000;
	mul.f32 	%f432, %f298, %f1345;
	fma.rn.f32 	%f433, %f297, %f1344, %f432;
	mul.f32 	%f434, %f302, %f1345;
	fma.rn.f32 	%f435, %f301, %f1344, %f434;
	fma.rn.f32 	%f436, %f299, %f1346, %f433;
	fma.rn.f32 	%f437, %f303, %f1346, %f435;
	fma.rn.f32 	%f438, %f1347, %f436, 0f3F000000;
	sub.f32 	%f439, %f431, %f438;
	fma.rn.f32 	%f440, %f1347, %f437, 0f3F000000;
	tex.2d.v4.f32.f32 	{%f441, %f442, %f443, %f444}, [%rd6, {%f439, %f440}];
	mul.f32 	%f445, %f430, %f441;
	mul.f32 	%f446, %f430, %f442;
	mul.f32 	%f447, %f430, %f443;
	mul.f32 	%f1348, %f293, %f445;
	mul.f32 	%f1349, %f1349, %f446;
	mul.f32 	%f1350, %f1350, %f447;
	mov.f32 	%f1351, %f63;
	bra.uni 	$L__BB0_29;

$L__BB0_20:
	setp.eq.f32 	%p35, %f280, 0f40000000;
	@%p35 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_21;

$L__BB0_23:
	setp.eq.s64 	%p37, %rd6, 0;
	mov.f32 	%f1348, %f293;
	mov.f32 	%f1351, %f63;
	@%p37 bra 	$L__BB0_29;

	mul.f32 	%f407, %f298, %f48;
	fma.rn.f32 	%f408, %f297, %f47, %f407;
	mul.f32 	%f409, %f302, %f48;
	fma.rn.f32 	%f410, %f301, %f47, %f409;
	mul.f32 	%f411, %f42, %f48;
	fma.rn.f32 	%f412, %f41, %f47, %f411;
	fma.rn.f32 	%f413, %f299, %f49, %f408;
	fma.rn.f32 	%f414, %f303, %f49, %f410;
	fma.rn.f32 	%f415, %f43, %f49, %f412;
	tex.cube.v4.f32.f32 	{%f416, %f417, %f418, %f419}, [%rd6, {%f413, %f414, %f415, %f415}];
	mul.f32 	%f1348, %f293, %f416;
	mul.f32 	%f1349, %f1349, %f417;
	mul.f32 	%f1350, %f1350, %f418;
	mov.f32 	%f1351, %f63;
	bra.uni 	$L__BB0_29;

$L__BB0_21:
	setp.neu.f32 	%p36, %f280, 0f40800000;
	mov.f32 	%f1348, %f293;
	mov.f32 	%f1351, %f63;
	@%p36 bra 	$L__BB0_29;

	mul.f32 	%f398, %f41, %f47;
	mul.f32 	%f399, %f42, %f48;
	neg.f32 	%f400, %f399;
	sub.f32 	%f401, %f400, %f398;
	mul.f32 	%f402, %f43, %f49;
	sub.f32 	%f403, %f401, %f402;
	fma.rn.f32 	%f404, %f296, %f403, %f1347;
	cvt.sat.f32.f32 	%f405, %f404;
	mul.f32 	%f406, %f405, %f405;
	mul.f32 	%f1351, %f63, %f406;
	mov.f32 	%f1348, %f293;

$L__BB0_29:
	max.f32 	%f454, %f1348, %f1349;
	max.f32 	%f455, %f454, %f1350;
	setp.eq.s32 	%p42, %r6, 0;
	selp.f32 	%f456, %f64, 0f3F800000, %p42;
	cvt.sat.f32.f32 	%f457, %f456;
	mul.f32 	%f84, %f457, %f1351;
	mul.f32 	%f458, %f84, %f455;
	setp.lt.f32 	%p43, %f458, 0f3727C5AC;
	mov.pred 	%p178, -1;
	mov.f32 	%f1352, 0f00000000;
	mov.f32 	%f1353, %f1352;
	mov.f32 	%f1354, %f1352;
	mov.f32 	%f1355, %f1352;
	mov.f32 	%f1356, %f1352;
	mov.f32 	%f1357, %f1352;
	@%p43 bra 	$L__BB0_31;

	setp.eq.s32 	%p45, %r8, 0;
	mul.f32 	%f1352, %f1348, %f84;
	mul.f32 	%f1353, %f1349, %f84;
	mul.f32 	%f1354, %f1350, %f84;
	selp.f32 	%f1355, 0f00000000, %f47, %p45;
	selp.f32 	%f1356, 0f00000000, %f48, %p45;
	selp.f32 	%f1357, 0f00000000, %f49, %p45;
	mov.pred 	%p178, 0;

$L__BB0_31:
	@%p178 bra 	$L__BB0_45;

	setp.eq.s32 	%p46, %r42, 0;
	mov.u16 	%rs64, 0;
	mov.f32 	%f1376, 0f3F800000;
	mov.f32 	%f1371, %f1376;
	mov.f32 	%f1372, %f1376;
	@%p46 bra 	$L__BB0_40;

	abs.s32 	%r11, %r42;
	setp.lt.s32 	%p47, %r11, 1;
	mov.f32 	%f1361, 0f00000000;
	mov.f32 	%f1362, %f1361;
	mov.f32 	%f1363, %f1361;
	@%p47 bra 	$L__BB0_39;

	mov.f32 	%f474, 0f38D1B717;
	max.f32 	%f475, %f473, %f474;
	mul.f32 	%f97, %f17, %f475;
	and.b32  	%r12, %r11, 1;
	setp.eq.s32 	%p48, %r11, 1;
	mov.f32 	%f1363, 0f00000000;
	mov.u32 	%r416, 0;
	mov.f32 	%f1362, %f1363;
	mov.f32 	%f1361, %f1363;
	@%p48 bra 	$L__BB0_37;

	sub.s32 	%r415, %r11, %r12;

$L__BB0_36:
	cvt.rn.f32.s32 	%f497, %r416;
	mul.f32 	%f498, %f497, 0f3DD32618;
	cvt.rmi.f32.f32 	%f499, %f498;
	sub.f32 	%f500, %f498, %f499;
	mul.f32 	%f501, %f497, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f502, %f501;
	sub.f32 	%f503, %f501, %f502;
	mul.f32 	%f504, %f497, 0f3DC74539;
	cvt.rmi.f32.f32 	%f505, %f504;
	sub.f32 	%f506, %f504, %f505;
	add.f32 	%f507, %f503, 0f4199851F;
	add.f32 	%f508, %f506, 0f4199851F;
	add.f32 	%f509, %f500, 0f4199851F;
	mul.f32 	%f510, %f503, %f508;
	fma.rn.f32 	%f511, %f500, %f507, %f510;
	fma.rn.f32 	%f512, %f509, %f506, %f511;
	add.f32 	%f513, %f500, %f512;
	add.f32 	%f514, %f503, %f512;
	add.f32 	%f515, %f506, %f512;
	add.f32 	%f516, %f513, %f514;
	mul.f32 	%f517, %f515, %f516;
	cvt.rmi.f32.f32 	%f518, %f517;
	sub.f32 	%f519, %f517, %f518;
	add.f32 	%f520, %f513, %f515;
	mul.f32 	%f521, %f514, %f520;
	cvt.rmi.f32.f32 	%f522, %f521;
	sub.f32 	%f523, %f521, %f522;
	add.f32 	%f524, %f514, %f515;
	mul.f32 	%f525, %f513, %f524;
	cvt.rmi.f32.f32 	%f526, %f525;
	sub.f32 	%f527, %f525, %f526;
	fma.rn.f32 	%f528, %f519, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f529, %f523, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f530, %f527, 0f40000000, 0fBF800000;
	ld.global.f32 	%f531, [%rd5+16];
	ld.global.f32 	%f532, [%rd5+4];
	fma.rn.f32 	%f533, %f531, %f528, %f532;
	ld.global.f32 	%f534, [%rd5+8];
	fma.rn.f32 	%f535, %f531, %f529, %f534;
	ld.global.f32 	%f536, [%rd5+12];
	fma.rn.f32 	%f537, %f531, %f530, %f536;
	sub.f32 	%f538, %f533, %f10;
	sub.f32 	%f539, %f535, %f11;
	sub.f32 	%f540, %f537, %f12;
	mul.f32 	%f541, %f539, %f539;
	fma.rn.f32 	%f542, %f538, %f538, %f541;
	fma.rn.f32 	%f543, %f540, %f540, %f542;
	sqrt.rn.f32 	%f486, %f543;
	rcp.rn.f32 	%f544, %f486;
	mul.f32 	%f482, %f544, %f538;
	mul.f32 	%f483, %f544, %f539;
	mul.f32 	%f484, %f544, %f540;
	mov.f32 	%f496, 0f00000000;
	mov.u32 	%r169, 2;
	mov.u32 	%r170, 1;
	mov.u32 	%r171, 3;
	mov.u32 	%r174, 1065353216;
	mov.u32 	%r203, 0;
	// begin inline asm
	call(%r62,%r63,%r64,%r65,%r66,%r67,%r68,%r69,%r70,%r71,%r72,%r73,%r74,%r75,%r76,%r77,%r78,%r79,%r80,%r81,%r82,%r83,%r84,%r85,%r86,%r87,%r88,%r89,%r90,%r91,%r92,%r93),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f482,%f483,%f484,%f97,%f486,%f496,%r170,%r203,%r170,%r169,%r170,%r171,%r174,%r174,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f545, %r62;
	mov.b32 	%f546, %r63;
	mov.b32 	%f547, %r64;
	add.f32 	%f548, %f1361, %f545;
	add.f32 	%f549, %f1362, %f546;
	add.f32 	%f550, %f1363, %f547;
	add.s32 	%r204, %r416, 1;
	cvt.rn.f32.s32 	%f551, %r204;
	mul.f32 	%f552, %f551, 0f3DD32618;
	cvt.rmi.f32.f32 	%f553, %f552;
	sub.f32 	%f554, %f552, %f553;
	mul.f32 	%f555, %f551, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f556, %f555;
	sub.f32 	%f557, %f555, %f556;
	mul.f32 	%f558, %f551, 0f3DC74539;
	cvt.rmi.f32.f32 	%f559, %f558;
	sub.f32 	%f560, %f558, %f559;
	add.f32 	%f561, %f557, 0f4199851F;
	add.f32 	%f562, %f560, 0f4199851F;
	add.f32 	%f563, %f554, 0f4199851F;
	mul.f32 	%f564, %f557, %f562;
	fma.rn.f32 	%f565, %f554, %f561, %f564;
	fma.rn.f32 	%f566, %f563, %f560, %f565;
	add.f32 	%f567, %f554, %f566;
	add.f32 	%f568, %f557, %f566;
	add.f32 	%f569, %f560, %f566;
	add.f32 	%f570, %f567, %f568;
	mul.f32 	%f571, %f569, %f570;
	cvt.rmi.f32.f32 	%f572, %f571;
	sub.f32 	%f573, %f571, %f572;
	add.f32 	%f574, %f567, %f569;
	mul.f32 	%f575, %f568, %f574;
	cvt.rmi.f32.f32 	%f576, %f575;
	sub.f32 	%f577, %f575, %f576;
	add.f32 	%f578, %f568, %f569;
	mul.f32 	%f579, %f567, %f578;
	cvt.rmi.f32.f32 	%f580, %f579;
	sub.f32 	%f581, %f579, %f580;
	fma.rn.f32 	%f582, %f573, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f583, %f577, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f584, %f581, 0f40000000, 0fBF800000;
	ld.global.f32 	%f585, [%rd5+16];
	ld.global.f32 	%f586, [%rd5+4];
	fma.rn.f32 	%f587, %f585, %f582, %f586;
	ld.global.f32 	%f588, [%rd5+8];
	fma.rn.f32 	%f589, %f585, %f583, %f588;
	ld.global.f32 	%f590, [%rd5+12];
	fma.rn.f32 	%f591, %f585, %f584, %f590;
	sub.f32 	%f592, %f587, %f10;
	sub.f32 	%f593, %f589, %f11;
	sub.f32 	%f594, %f591, %f12;
	mul.f32 	%f595, %f593, %f593;
	fma.rn.f32 	%f596, %f592, %f592, %f595;
	fma.rn.f32 	%f597, %f594, %f594, %f596;
	sqrt.rn.f32 	%f495, %f597;
	rcp.rn.f32 	%f598, %f495;
	mul.f32 	%f491, %f598, %f592;
	mul.f32 	%f492, %f598, %f593;
	mul.f32 	%f493, %f598, %f594;
	// begin inline asm
	call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f491,%f492,%f493,%f97,%f495,%f496,%r170,%r203,%r170,%r169,%r170,%r171,%r174,%r174,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
	// end inline asm
	mov.b32 	%f599, %r133;
	mov.b32 	%f600, %r134;
	mov.b32 	%f601, %r135;
	add.f32 	%f1361, %f548, %f599;
	add.f32 	%f1362, %f549, %f600;
	add.f32 	%f1363, %f550, %f601;
	add.s32 	%r416, %r416, 2;
	add.s32 	%r415, %r415, -2;
	setp.ne.s32 	%p49, %r415, 0;
	@%p49 bra 	$L__BB0_36;

$L__BB0_37:
	setp.eq.s32 	%p50, %r12, 0;
	@%p50 bra 	$L__BB0_39;

	cvt.rn.f32.s32 	%f611, %r416;
	mul.f32 	%f612, %f611, 0f3DD32618;
	cvt.rmi.f32.f32 	%f613, %f612;
	sub.f32 	%f614, %f612, %f613;
	mul.f32 	%f615, %f611, 0f3DD2F1AA;
	cvt.rmi.f32.f32 	%f616, %f615;
	sub.f32 	%f617, %f615, %f616;
	mul.f32 	%f618, %f611, 0f3DC74539;
	cvt.rmi.f32.f32 	%f619, %f618;
	sub.f32 	%f620, %f618, %f619;
	add.f32 	%f621, %f617, 0f4199851F;
	add.f32 	%f622, %f620, 0f4199851F;
	add.f32 	%f623, %f614, 0f4199851F;
	mul.f32 	%f624, %f617, %f622;
	fma.rn.f32 	%f625, %f614, %f621, %f624;
	fma.rn.f32 	%f626, %f623, %f620, %f625;
	add.f32 	%f627, %f614, %f626;
	add.f32 	%f628, %f617, %f626;
	add.f32 	%f629, %f620, %f626;
	add.f32 	%f630, %f627, %f628;
	mul.f32 	%f631, %f629, %f630;
	cvt.rmi.f32.f32 	%f632, %f631;
	sub.f32 	%f633, %f631, %f632;
	add.f32 	%f634, %f627, %f629;
	mul.f32 	%f635, %f628, %f634;
	cvt.rmi.f32.f32 	%f636, %f635;
	sub.f32 	%f637, %f635, %f636;
	add.f32 	%f638, %f628, %f629;
	mul.f32 	%f639, %f627, %f638;
	cvt.rmi.f32.f32 	%f640, %f639;
	sub.f32 	%f641, %f639, %f640;
	fma.rn.f32 	%f642, %f633, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f643, %f637, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f644, %f641, 0f40000000, 0fBF800000;
	ld.global.f32 	%f645, [%rd5+16];
	ld.global.f32 	%f646, [%rd5+4];
	fma.rn.f32 	%f647, %f645, %f642, %f646;
	ld.global.f32 	%f648, [%rd5+8];
	fma.rn.f32 	%f649, %f645, %f643, %f648;
	ld.global.f32 	%f650, [%rd5+12];
	fma.rn.f32 	%f651, %f645, %f644, %f650;
	sub.f32 	%f652, %f647, %f10;
	sub.f32 	%f653, %f649, %f11;
	sub.f32 	%f654, %f651, %f12;
	mul.f32 	%f655, %f653, %f653;
	fma.rn.f32 	%f656, %f652, %f652, %f655;
	fma.rn.f32 	%f657, %f654, %f654, %f656;
	sqrt.rn.f32 	%f609, %f657;
	rcp.rn.f32 	%f658, %f609;
	mul.f32 	%f605, %f658, %f652;
	mul.f32 	%f606, %f658, %f653;
	mul.f32 	%f607, %f658, %f654;
	mov.f32 	%f610, 0f00000000;
	mov.u32 	%r241, 2;
	mov.u32 	%r242, 1;
	mov.u32 	%r243, 3;
	mov.u32 	%r246, 1065353216;
	mov.u32 	%r275, 0;
	// begin inline asm
	call(%r205,%r206,%r207,%r208,%r209,%r210,%r211,%r212,%r213,%r214,%r215,%r216,%r217,%r218,%r219,%r220,%r221,%r222,%r223,%r224,%r225,%r226,%r227,%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236),_optix_trace_typed_32,(%r275,%rd3,%f13,%f14,%f15,%f605,%f606,%f607,%f97,%f609,%f610,%r242,%r275,%r242,%r241,%r242,%r243,%r246,%r246,%r246,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275);
	// end inline asm
	mov.b32 	%f659, %r205;
	mov.b32 	%f660, %r206;
	mov.b32 	%f661, %r207;
	add.f32 	%f1361, %f1361, %f659;
	add.f32 	%f1362, %f1362, %f660;
	add.f32 	%f1363, %f1363, %f661;

$L__BB0_39:
	cvt.rn.f32.s32 	%f662, %r11;
	rcp.rn.f32 	%f663, %f662;
	mul.f32 	%f1376, %f663, %f1361;
	mul.f32 	%f1371, %f663, %f1362;
	mul.f32 	%f1372, %f663, %f1363;
	shr.u32 	%r276, %r42, 31;
	cvt.u16.u32 	%rs64, %r276;

$L__BB0_40:
	fma.rn.f32 	%f1377, %f1352, %f1376, %f1377;
	fma.rn.f32 	%f1378, %f1353, %f1371, %f1378;
	fma.rn.f32 	%f1379, %f1354, %f1372, %f1379;
	setp.eq.s32 	%p51, %r8, 0;
	@%p51 bra 	$L__BB0_42;

	mul.f32 	%f664, %f1353, 0f3F372474;
	fma.rn.f32 	%f665, %f1352, 0f3E59999A, %f664;
	fma.rn.f32 	%f666, %f1354, 0f3D93A92A, %f665;
	fma.rn.f32 	%f1380, %f1355, %f666, %f1380;
	fma.rn.f32 	%f1381, %f1356, %f666, %f1381;
	fma.rn.f32 	%f1382, %f666, %f1357, %f1382;

$L__BB0_42:
	setp.eq.s16 	%p52, %rs64, 0;
	@%p52 bra 	$L__BB0_44;

	div.rn.f32 	%f667, %f1352, %f293;
	div.rn.f32 	%f668, %f667, %f63;
	cvt.sat.f32.f32 	%f669, %f668;
	mul.f32 	%f1376, %f1376, %f669;

$L__BB0_44:
	add.f32 	%f1383, %f1383, %f1376;

$L__BB0_45:
	cvt.u64.u32 	%rd53, %r413;
	cvt.u32.u64 	%r277, %rd53;
	add.s32 	%r413, %r277, 1;
	setp.lt.u32 	%p53, %r413, %r5;
	@%p53 bra 	$L__BB0_7;
	bra.uni 	$L__BB0_47;

$L__BB0_46:
	mov.f32 	%f1377, 0f00000000;
	ld.const.u32 	%r417, [params+104];
	mov.f32 	%f1378, %f1377;
	mov.f32 	%f1379, %f1377;
	mov.f32 	%f1380, %f1377;
	mov.f32 	%f1381, %f1377;
	mov.f32 	%f1382, %f1377;
	mov.f32 	%f1383, %f1377;

$L__BB0_47:
	and.b32  	%r278, %r417, 8;
	setp.eq.s32 	%p54, %r278, 0;
	@%p54 bra 	$L__BB0_61;

	cvt.sat.f32.f32 	%f148, %f1383;
	ld.const.u64 	%rd25, [params+192];
	cvta.to.global.u64 	%rd7, %rd25;
	ld.const.u32 	%r279, [params+184];
	mad.lo.s32 	%r280, %r279, %r4, %r3;
	cvt.u64.u32 	%rd8, %r280;
	mov.f32 	%f678, 0f3E68BA2E;
	cvt.rzi.f32.f32 	%f679, %f678;
	add.f32 	%f680, %f679, %f679;
	mov.f32 	%f681, 0f3EE8BA2E;
	sub.f32 	%f682, %f681, %f680;
	abs.f32 	%f149, %f682;
	abs.f32 	%f150, %f148;
	setp.lt.f32 	%p55, %f150, 0f00800000;
	mul.f32 	%f683, %f150, 0f4B800000;
	selp.f32 	%f684, %f683, %f150, %p55;
	selp.f32 	%f685, 0fC3170000, 0fC2FE0000, %p55;
	mov.b32 	%r281, %f684;
	and.b32  	%r282, %r281, 8388607;
	or.b32  	%r283, %r282, 1065353216;
	mov.b32 	%f686, %r283;
	shr.u32 	%r284, %r281, 23;
	cvt.rn.f32.u32 	%f687, %r284;
	add.f32 	%f688, %f685, %f687;
	setp.gt.f32 	%p56, %f686, 0f3FB504F3;
	mul.f32 	%f689, %f686, 0f3F000000;
	add.f32 	%f690, %f688, 0f3F800000;
	selp.f32 	%f691, %f690, %f688, %p56;
	selp.f32 	%f692, %f689, %f686, %p56;
	add.f32 	%f693, %f692, 0fBF800000;
	add.f32 	%f694, %f692, 0f3F800000;
	rcp.approx.ftz.f32 	%f695, %f694;
	add.f32 	%f696, %f693, %f693;
	mul.f32 	%f697, %f696, %f695;
	mul.f32 	%f698, %f697, %f697;
	mov.f32 	%f699, 0f3C4CAF63;
	mov.f32 	%f700, 0f3B18F0FE;
	fma.rn.f32 	%f701, %f700, %f698, %f699;
	mov.f32 	%f702, 0f3DAAAABD;
	fma.rn.f32 	%f703, %f701, %f698, %f702;
	mul.rn.f32 	%f704, %f703, %f698;
	mul.rn.f32 	%f705, %f704, %f697;
	sub.f32 	%f706, %f693, %f697;
	add.f32 	%f707, %f706, %f706;
	neg.f32 	%f708, %f697;
	fma.rn.f32 	%f709, %f708, %f693, %f707;
	mul.rn.f32 	%f710, %f695, %f709;
	add.f32 	%f711, %f705, %f697;
	sub.f32 	%f712, %f697, %f711;
	add.f32 	%f713, %f705, %f712;
	add.f32 	%f714, %f710, %f713;
	add.f32 	%f715, %f711, %f714;
	sub.f32 	%f716, %f711, %f715;
	add.f32 	%f717, %f714, %f716;
	mov.f32 	%f718, 0f3F317200;
	mul.rn.f32 	%f719, %f691, %f718;
	mov.f32 	%f720, 0f35BFBE8E;
	mul.rn.f32 	%f721, %f691, %f720;
	add.f32 	%f722, %f719, %f715;
	sub.f32 	%f723, %f719, %f722;
	add.f32 	%f724, %f715, %f723;
	add.f32 	%f725, %f717, %f724;
	add.f32 	%f726, %f721, %f725;
	add.f32 	%f727, %f722, %f726;
	sub.f32 	%f728, %f722, %f727;
	add.f32 	%f729, %f726, %f728;
	mul.rn.f32 	%f730, %f681, %f727;
	neg.f32 	%f731, %f730;
	fma.rn.f32 	%f732, %f681, %f727, %f731;
	fma.rn.f32 	%f733, %f681, %f729, %f732;
	mov.f32 	%f734, 0f00000000;
	fma.rn.f32 	%f735, %f734, %f727, %f733;
	add.rn.f32 	%f736, %f730, %f735;
	neg.f32 	%f737, %f736;
	add.rn.f32 	%f738, %f730, %f737;
	add.rn.f32 	%f739, %f738, %f735;
	mov.b32 	%r285, %f736;
	setp.eq.s32 	%p57, %r285, 1118925336;
	add.s32 	%r286, %r285, -1;
	mov.b32 	%f740, %r286;
	add.f32 	%f741, %f739, 0f37000000;
	selp.f32 	%f151, %f741, %f739, %p57;
	selp.f32 	%f742, %f740, %f736, %p57;
	mov.f32 	%f743, 0f3FB8AA3B;
	mul.rn.f32 	%f744, %f742, %f743;
	cvt.rzi.f32.f32 	%f745, %f744;
	abs.f32 	%f746, %f745;
	setp.gt.f32 	%p58, %f746, 0f42FC0000;
	mov.b32 	%r287, %f745;
	and.b32  	%r288, %r287, -2147483648;
	or.b32  	%r289, %r288, 1123811328;
	mov.b32 	%f747, %r289;
	selp.f32 	%f748, %f747, %f745, %p58;
	mov.f32 	%f749, 0fBF317218;
	fma.rn.f32 	%f750, %f748, %f749, %f742;
	mov.f32 	%f751, 0f3102E308;
	fma.rn.f32 	%f752, %f748, %f751, %f750;
	mul.f32 	%f753, %f752, 0f3FB8AA3B;
	add.f32 	%f754, %f748, 0f4B40007F;
	mov.b32 	%r290, %f754;
	shl.b32 	%r291, %r290, 23;
	mov.b32 	%f755, %r291;
	ex2.approx.ftz.f32 	%f756, %f753;
	mul.f32 	%f152, %f756, %f755;
	setp.eq.f32 	%p59, %f152, 0f7F800000;
	mov.f32 	%f1391, 0f7F800000;
	@%p59 bra 	$L__BB0_50;

	fma.rn.f32 	%f1391, %f152, %f151, %f152;

$L__BB0_50:
	setp.lt.f32 	%p60, %f148, 0f00000000;
	setp.eq.f32 	%p61, %f149, 0f3F800000;
	and.pred  	%p3, %p60, %p61;
	setp.eq.f32 	%p62, %f148, 0f00000000;
	@%p62 bra 	$L__BB0_54;
	bra.uni 	$L__BB0_51;

$L__BB0_54:
	add.f32 	%f761, %f148, %f148;
	selp.f32 	%f1393, %f761, 0f00000000, %p61;
	bra.uni 	$L__BB0_55;

$L__BB0_148:
	mov.f32 	%f1327, 0f00000000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs59, %f1327;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs58, %f1327;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs57, %f1327;}

	// end inline asm
	mov.u16 	%rs60, 0;
	st.global.v4.u16 	[%rd12], {%rs57, %rs58, %rs59, %rs60};

$L__BB0_149:
	and.b32  	%r410, %r22, 64;
	setp.eq.s32 	%p177, %r410, 0;
	@%p177 bra 	$L__BB0_151;

	ld.const.u64 	%rd49, [params+208];
	cvta.to.global.u64 	%rd50, %rd49;
	ld.const.u32 	%r411, [params+200];
	mad.lo.s32 	%r412, %r411, %r4, %r3;
	mul.wide.u32 	%rd51, %r412, 4;
	add.s64 	%rd52, %rd50, %rd51;
	mov.u16 	%rs61, 0;
	st.global.v4.u8 	[%rd52], {%rs61, %rs61, %rs61, %rs61};
	bra.uni 	$L__BB0_151;

$L__BB0_51:
	mov.b32 	%r292, %f1391;
	xor.b32  	%r293, %r292, -2147483648;
	mov.b32 	%f757, %r293;
	selp.f32 	%f1393, %f757, %f1391, %p3;
	setp.geu.f32 	%p63, %f148, 0f00000000;
	@%p63 bra 	$L__BB0_55;

	mov.f32 	%f758, 0f3EE8BA2E;
	cvt.rzi.f32.f32 	%f759, %f758;
	setp.eq.f32 	%p64, %f759, 0f3EE8BA2E;
	@%p64 bra 	$L__BB0_55;

	mov.f32 	%f1393, 0f7FFFFFFF;

$L__BB0_55:
	add.f32 	%f762, %f150, 0f3EE8BA2E;
	mov.b32 	%r294, %f762;
	setp.lt.s32 	%p66, %r294, 2139095040;
	@%p66 bra 	$L__BB0_60;

	setp.gtu.f32 	%p67, %f150, 0f7F800000;
	@%p67 bra 	$L__BB0_59;
	bra.uni 	$L__BB0_57;

$L__BB0_59:
	add.f32 	%f1393, %f148, 0f3EE8BA2E;
	bra.uni 	$L__BB0_60;

$L__BB0_57:
	setp.neu.f32 	%p68, %f150, 0f7F800000;
	@%p68 bra 	$L__BB0_60;

	selp.f32 	%f1393, 0fFF800000, 0f7F800000, %p3;

$L__BB0_60:
	mul.f32 	%f763, %f1393, 0f437F0000;
	setp.eq.f32 	%p69, %f148, 0f3F800000;
	selp.f32 	%f764, 0f437F0000, %f763, %p69;
	cvt.rzi.u32.f32 	%r295, %f764;
	shl.b64 	%rd26, %rd8, 1;
	add.s64 	%rd27, %rd7, %rd26;
	cvt.u16.u32 	%rs18, %r295;
	mov.u16 	%rs19, 255;
	st.global.v2.u8 	[%rd27], {%rs18, %rs19};

$L__BB0_61:
	and.b32  	%r296, %r417, 1;
	setp.eq.b32 	%p70, %r296, 1;
	mov.pred 	%p71, 0;
	xor.pred  	%p72, %p70, %p71;
	not.pred 	%p73, %p72;
	@%p73 bra 	$L__BB0_135;

	mov.f32 	%f766, 0f3E666666;
	cvt.rzi.f32.f32 	%f767, %f766;
	add.f32 	%f768, %f767, %f767;
	mov.f32 	%f769, 0f3EE66666;
	sub.f32 	%f770, %f769, %f768;
	abs.f32 	%f161, %f770;
	abs.f32 	%f162, %f1377;
	setp.lt.f32 	%p74, %f162, 0f00800000;
	mul.f32 	%f771, %f162, 0f4B800000;
	selp.f32 	%f772, %f771, %f162, %p74;
	selp.f32 	%f773, 0fC3170000, 0fC2FE0000, %p74;
	mov.b32 	%r297, %f772;
	and.b32  	%r298, %r297, 8388607;
	or.b32  	%r299, %r298, 1065353216;
	mov.b32 	%f774, %r299;
	shr.u32 	%r300, %r297, 23;
	cvt.rn.f32.u32 	%f775, %r300;
	add.f32 	%f776, %f773, %f775;
	setp.gt.f32 	%p75, %f774, 0f3FB504F3;
	mul.f32 	%f777, %f774, 0f3F000000;
	add.f32 	%f778, %f776, 0f3F800000;
	selp.f32 	%f779, %f778, %f776, %p75;
	selp.f32 	%f780, %f777, %f774, %p75;
	add.f32 	%f781, %f780, 0fBF800000;
	add.f32 	%f782, %f780, 0f3F800000;
	rcp.approx.ftz.f32 	%f783, %f782;
	add.f32 	%f784, %f781, %f781;
	mul.f32 	%f785, %f784, %f783;
	mul.f32 	%f786, %f785, %f785;
	mov.f32 	%f787, 0f3C4CAF63;
	mov.f32 	%f788, 0f3B18F0FE;
	fma.rn.f32 	%f789, %f788, %f786, %f787;
	mov.f32 	%f790, 0f3DAAAABD;
	fma.rn.f32 	%f791, %f789, %f786, %f790;
	mul.rn.f32 	%f792, %f791, %f786;
	mul.rn.f32 	%f793, %f792, %f785;
	sub.f32 	%f794, %f781, %f785;
	add.f32 	%f795, %f794, %f794;
	neg.f32 	%f796, %f785;
	fma.rn.f32 	%f797, %f796, %f781, %f795;
	mul.rn.f32 	%f798, %f783, %f797;
	add.f32 	%f799, %f793, %f785;
	sub.f32 	%f800, %f785, %f799;
	add.f32 	%f801, %f793, %f800;
	add.f32 	%f802, %f798, %f801;
	add.f32 	%f803, %f799, %f802;
	sub.f32 	%f804, %f799, %f803;
	add.f32 	%f805, %f802, %f804;
	mov.f32 	%f806, 0f3F317200;
	mul.rn.f32 	%f807, %f779, %f806;
	mov.f32 	%f808, 0f35BFBE8E;
	mul.rn.f32 	%f809, %f779, %f808;
	add.f32 	%f810, %f807, %f803;
	sub.f32 	%f811, %f807, %f810;
	add.f32 	%f812, %f803, %f811;
	add.f32 	%f813, %f805, %f812;
	add.f32 	%f814, %f809, %f813;
	add.f32 	%f815, %f810, %f814;
	sub.f32 	%f816, %f810, %f815;
	add.f32 	%f817, %f814, %f816;
	mul.rn.f32 	%f818, %f769, %f815;
	neg.f32 	%f819, %f818;
	fma.rn.f32 	%f820, %f769, %f815, %f819;
	fma.rn.f32 	%f821, %f769, %f817, %f820;
	mov.f32 	%f822, 0f00000000;
	fma.rn.f32 	%f823, %f822, %f815, %f821;
	add.rn.f32 	%f824, %f818, %f823;
	neg.f32 	%f825, %f824;
	add.rn.f32 	%f826, %f818, %f825;
	add.rn.f32 	%f827, %f826, %f823;
	mov.b32 	%r301, %f824;
	setp.eq.s32 	%p76, %r301, 1118925336;
	add.s32 	%r302, %r301, -1;
	mov.b32 	%f828, %r302;
	add.f32 	%f829, %f827, 0f37000000;
	selp.f32 	%f163, %f829, %f827, %p76;
	selp.f32 	%f830, %f828, %f824, %p76;
	mov.f32 	%f831, 0f3FB8AA3B;
	mul.rn.f32 	%f832, %f830, %f831;
	cvt.rzi.f32.f32 	%f833, %f832;
	abs.f32 	%f834, %f833;
	setp.gt.f32 	%p77, %f834, 0f42FC0000;
	mov.b32 	%r303, %f833;
	and.b32  	%r304, %r303, -2147483648;
	or.b32  	%r305, %r304, 1123811328;
	mov.b32 	%f835, %r305;
	selp.f32 	%f836, %f835, %f833, %p77;
	mov.f32 	%f837, 0fBF317218;
	fma.rn.f32 	%f838, %f836, %f837, %f830;
	mov.f32 	%f839, 0f3102E308;
	fma.rn.f32 	%f840, %f836, %f839, %f838;
	mul.f32 	%f841, %f840, 0f3FB8AA3B;
	add.f32 	%f842, %f836, 0f4B40007F;
	mov.b32 	%r306, %f842;
	shl.b32 	%r307, %r306, 23;
	mov.b32 	%f843, %r307;
	ex2.approx.ftz.f32 	%f844, %f841;
	mul.f32 	%f164, %f844, %f843;
	setp.eq.f32 	%p78, %f164, 0f7F800000;
	mov.f32 	%f1394, 0f7F800000;
	@%p78 bra 	$L__BB0_64;

	fma.rn.f32 	%f1394, %f164, %f163, %f164;

$L__BB0_64:
	setp.lt.f32 	%p79, %f1377, 0f00000000;
	setp.eq.f32 	%p80, %f161, 0f3F800000;
	and.pred  	%p4, %p79, %p80;
	setp.eq.f32 	%p81, %f1377, 0f00000000;
	@%p81 bra 	$L__BB0_68;
	bra.uni 	$L__BB0_65;

$L__BB0_68:
	add.f32 	%f849, %f1377, %f1377;
	selp.f32 	%f1396, %f849, 0f00000000, %p80;
	bra.uni 	$L__BB0_69;

$L__BB0_65:
	mov.b32 	%r308, %f1394;
	xor.b32  	%r309, %r308, -2147483648;
	mov.b32 	%f845, %r309;
	selp.f32 	%f1396, %f845, %f1394, %p4;
	setp.geu.f32 	%p82, %f1377, 0f00000000;
	@%p82 bra 	$L__BB0_69;

	mov.f32 	%f846, 0f3EE66666;
	cvt.rzi.f32.f32 	%f847, %f846;
	setp.eq.f32 	%p83, %f847, 0f3EE66666;
	@%p83 bra 	$L__BB0_69;

	mov.f32 	%f1396, 0f7FFFFFFF;

$L__BB0_69:
	add.f32 	%f850, %f162, 0f3EE66666;
	mov.b32 	%r310, %f850;
	setp.lt.s32 	%p85, %r310, 2139095040;
	@%p85 bra 	$L__BB0_74;

	setp.gtu.f32 	%p86, %f162, 0f7F800000;
	@%p86 bra 	$L__BB0_73;
	bra.uni 	$L__BB0_71;

$L__BB0_73:
	add.f32 	%f1396, %f1377, 0f3EE66666;
	bra.uni 	$L__BB0_74;

$L__BB0_71:
	setp.neu.f32 	%p87, %f162, 0f7F800000;
	@%p87 bra 	$L__BB0_74;

	selp.f32 	%f1396, 0fFF800000, 0f7F800000, %p4;

$L__BB0_74:
	setp.eq.f32 	%p88, %f1377, 0f3F800000;
	selp.f32 	%f173, 0f3F800000, %f1396, %p88;
	abs.f32 	%f174, %f1378;
	setp.lt.f32 	%p89, %f174, 0f00800000;
	mul.f32 	%f852, %f174, 0f4B800000;
	selp.f32 	%f853, %f852, %f174, %p89;
	selp.f32 	%f854, 0fC3170000, 0fC2FE0000, %p89;
	mov.b32 	%r311, %f853;
	and.b32  	%r312, %r311, 8388607;
	or.b32  	%r313, %r312, 1065353216;
	mov.b32 	%f855, %r313;
	shr.u32 	%r314, %r311, 23;
	cvt.rn.f32.u32 	%f856, %r314;
	add.f32 	%f857, %f854, %f856;
	setp.gt.f32 	%p90, %f855, 0f3FB504F3;
	mul.f32 	%f858, %f855, 0f3F000000;
	add.f32 	%f859, %f857, 0f3F800000;
	selp.f32 	%f860, %f859, %f857, %p90;
	selp.f32 	%f861, %f858, %f855, %p90;
	add.f32 	%f862, %f861, 0fBF800000;
	add.f32 	%f863, %f861, 0f3F800000;
	rcp.approx.ftz.f32 	%f864, %f863;
	add.f32 	%f865, %f862, %f862;
	mul.f32 	%f866, %f865, %f864;
	mul.f32 	%f867, %f866, %f866;
	mov.f32 	%f868, 0f3C4CAF63;
	mov.f32 	%f869, 0f3B18F0FE;
	fma.rn.f32 	%f870, %f869, %f867, %f868;
	mov.f32 	%f871, 0f3DAAAABD;
	fma.rn.f32 	%f872, %f870, %f867, %f871;
	mul.rn.f32 	%f873, %f872, %f867;
	mul.rn.f32 	%f874, %f873, %f866;
	sub.f32 	%f875, %f862, %f866;
	add.f32 	%f876, %f875, %f875;
	neg.f32 	%f877, %f866;
	fma.rn.f32 	%f878, %f877, %f862, %f876;
	mul.rn.f32 	%f879, %f864, %f878;
	add.f32 	%f880, %f874, %f866;
	sub.f32 	%f881, %f866, %f880;
	add.f32 	%f882, %f874, %f881;
	add.f32 	%f883, %f879, %f882;
	add.f32 	%f884, %f880, %f883;
	sub.f32 	%f885, %f880, %f884;
	add.f32 	%f886, %f883, %f885;
	mov.f32 	%f887, 0f3F317200;
	mul.rn.f32 	%f888, %f860, %f887;
	mov.f32 	%f889, 0f35BFBE8E;
	mul.rn.f32 	%f890, %f860, %f889;
	add.f32 	%f891, %f888, %f884;
	sub.f32 	%f892, %f888, %f891;
	add.f32 	%f893, %f884, %f892;
	add.f32 	%f894, %f886, %f893;
	add.f32 	%f895, %f890, %f894;
	add.f32 	%f896, %f891, %f895;
	sub.f32 	%f897, %f891, %f896;
	add.f32 	%f898, %f895, %f897;
	mov.f32 	%f899, 0f3EE66666;
	mul.rn.f32 	%f900, %f899, %f896;
	neg.f32 	%f901, %f900;
	fma.rn.f32 	%f902, %f899, %f896, %f901;
	fma.rn.f32 	%f903, %f899, %f898, %f902;
	mov.f32 	%f904, 0f00000000;
	fma.rn.f32 	%f905, %f904, %f896, %f903;
	add.rn.f32 	%f906, %f900, %f905;
	neg.f32 	%f907, %f906;
	add.rn.f32 	%f908, %f900, %f907;
	add.rn.f32 	%f909, %f908, %f905;
	mov.b32 	%r315, %f906;
	setp.eq.s32 	%p91, %r315, 1118925336;
	add.s32 	%r316, %r315, -1;
	mov.b32 	%f910, %r316;
	add.f32 	%f911, %f909, 0f37000000;
	selp.f32 	%f175, %f911, %f909, %p91;
	selp.f32 	%f912, %f910, %f906, %p91;
	mov.f32 	%f913, 0f3FB8AA3B;
	mul.rn.f32 	%f914, %f912, %f913;
	cvt.rzi.f32.f32 	%f915, %f914;
	abs.f32 	%f916, %f915;
	setp.gt.f32 	%p92, %f916, 0f42FC0000;
	mov.b32 	%r317, %f915;
	and.b32  	%r318, %r317, -2147483648;
	or.b32  	%r319, %r318, 1123811328;
	mov.b32 	%f917, %r319;
	selp.f32 	%f918, %f917, %f915, %p92;
	mov.f32 	%f919, 0fBF317218;
	fma.rn.f32 	%f920, %f918, %f919, %f912;
	mov.f32 	%f921, 0f3102E308;
	fma.rn.f32 	%f922, %f918, %f921, %f920;
	mul.f32 	%f923, %f922, 0f3FB8AA3B;
	add.f32 	%f924, %f918, 0f4B40007F;
	mov.b32 	%r320, %f924;
	shl.b32 	%r321, %r320, 23;
	mov.b32 	%f925, %r321;
	ex2.approx.ftz.f32 	%f926, %f923;
	mul.f32 	%f176, %f926, %f925;
	setp.eq.f32 	%p93, %f176, 0f7F800000;
	mov.f32 	%f1397, 0f7F800000;
	@%p93 bra 	$L__BB0_76;

	fma.rn.f32 	%f1397, %f176, %f175, %f176;

$L__BB0_76:
	setp.lt.f32 	%p94, %f1378, 0f00000000;
	and.pred  	%p5, %p94, %p80;
	setp.eq.f32 	%p96, %f1378, 0f00000000;
	@%p96 bra 	$L__BB0_80;
	bra.uni 	$L__BB0_77;

$L__BB0_80:
	add.f32 	%f931, %f1378, %f1378;
	selp.f32 	%f1399, %f931, 0f00000000, %p80;
	bra.uni 	$L__BB0_81;

$L__BB0_77:
	mov.b32 	%r322, %f1397;
	xor.b32  	%r323, %r322, -2147483648;
	mov.b32 	%f927, %r323;
	selp.f32 	%f1399, %f927, %f1397, %p5;
	setp.geu.f32 	%p97, %f1378, 0f00000000;
	@%p97 bra 	$L__BB0_81;

	mov.f32 	%f928, 0f3EE66666;
	cvt.rzi.f32.f32 	%f929, %f928;
	setp.eq.f32 	%p98, %f929, 0f3EE66666;
	@%p98 bra 	$L__BB0_81;

	mov.f32 	%f1399, 0f7FFFFFFF;

$L__BB0_81:
	add.f32 	%f932, %f174, 0f3EE66666;
	mov.b32 	%r324, %f932;
	setp.lt.s32 	%p100, %r324, 2139095040;
	@%p100 bra 	$L__BB0_86;

	setp.gtu.f32 	%p101, %f174, 0f7F800000;
	@%p101 bra 	$L__BB0_85;
	bra.uni 	$L__BB0_83;

$L__BB0_85:
	add.f32 	%f1399, %f1378, 0f3EE66666;
	bra.uni 	$L__BB0_86;

$L__BB0_83:
	setp.neu.f32 	%p102, %f174, 0f7F800000;
	@%p102 bra 	$L__BB0_86;

	selp.f32 	%f1399, 0fFF800000, 0f7F800000, %p5;

$L__BB0_86:
	setp.eq.f32 	%p103, %f1378, 0f3F800000;
	selp.f32 	%f185, 0f3F800000, %f1399, %p103;
	abs.f32 	%f186, %f1379;
	setp.lt.f32 	%p104, %f186, 0f00800000;
	mul.f32 	%f934, %f186, 0f4B800000;
	selp.f32 	%f935, %f934, %f186, %p104;
	selp.f32 	%f936, 0fC3170000, 0fC2FE0000, %p104;
	mov.b32 	%r325, %f935;
	and.b32  	%r326, %r325, 8388607;
	or.b32  	%r327, %r326, 1065353216;
	mov.b32 	%f937, %r327;
	shr.u32 	%r328, %r325, 23;
	cvt.rn.f32.u32 	%f938, %r328;
	add.f32 	%f939, %f936, %f938;
	setp.gt.f32 	%p105, %f937, 0f3FB504F3;
	mul.f32 	%f940, %f937, 0f3F000000;
	add.f32 	%f941, %f939, 0f3F800000;
	selp.f32 	%f942, %f941, %f939, %p105;
	selp.f32 	%f943, %f940, %f937, %p105;
	add.f32 	%f944, %f943, 0fBF800000;
	add.f32 	%f945, %f943, 0f3F800000;
	rcp.approx.ftz.f32 	%f946, %f945;
	add.f32 	%f947, %f944, %f944;
	mul.f32 	%f948, %f947, %f946;
	mul.f32 	%f949, %f948, %f948;
	mov.f32 	%f950, 0f3C4CAF63;
	mov.f32 	%f951, 0f3B18F0FE;
	fma.rn.f32 	%f952, %f951, %f949, %f950;
	mov.f32 	%f953, 0f3DAAAABD;
	fma.rn.f32 	%f954, %f952, %f949, %f953;
	mul.rn.f32 	%f955, %f954, %f949;
	mul.rn.f32 	%f956, %f955, %f948;
	sub.f32 	%f957, %f944, %f948;
	add.f32 	%f958, %f957, %f957;
	neg.f32 	%f959, %f948;
	fma.rn.f32 	%f960, %f959, %f944, %f958;
	mul.rn.f32 	%f961, %f946, %f960;
	add.f32 	%f962, %f956, %f948;
	sub.f32 	%f963, %f948, %f962;
	add.f32 	%f964, %f956, %f963;
	add.f32 	%f965, %f961, %f964;
	add.f32 	%f966, %f962, %f965;
	sub.f32 	%f967, %f962, %f966;
	add.f32 	%f968, %f965, %f967;
	mov.f32 	%f969, 0f3F317200;
	mul.rn.f32 	%f970, %f942, %f969;
	mov.f32 	%f971, 0f35BFBE8E;
	mul.rn.f32 	%f972, %f942, %f971;
	add.f32 	%f973, %f970, %f966;
	sub.f32 	%f974, %f970, %f973;
	add.f32 	%f975, %f966, %f974;
	add.f32 	%f976, %f968, %f975;
	add.f32 	%f977, %f972, %f976;
	add.f32 	%f978, %f973, %f977;
	sub.f32 	%f979, %f973, %f978;
	add.f32 	%f980, %f977, %f979;
	mov.f32 	%f981, 0f3EE66666;
	mul.rn.f32 	%f982, %f981, %f978;
	neg.f32 	%f983, %f982;
	fma.rn.f32 	%f984, %f981, %f978, %f983;
	fma.rn.f32 	%f985, %f981, %f980, %f984;
	mov.f32 	%f986, 0f00000000;
	fma.rn.f32 	%f987, %f986, %f978, %f985;
	add.rn.f32 	%f988, %f982, %f987;
	neg.f32 	%f989, %f988;
	add.rn.f32 	%f990, %f982, %f989;
	add.rn.f32 	%f991, %f990, %f987;
	mov.b32 	%r329, %f988;
	setp.eq.s32 	%p106, %r329, 1118925336;
	add.s32 	%r330, %r329, -1;
	mov.b32 	%f992, %r330;
	add.f32 	%f993, %f991, 0f37000000;
	selp.f32 	%f187, %f993, %f991, %p106;
	selp.f32 	%f994, %f992, %f988, %p106;
	mov.f32 	%f995, 0f3FB8AA3B;
	mul.rn.f32 	%f996, %f994, %f995;
	cvt.rzi.f32.f32 	%f997, %f996;
	abs.f32 	%f998, %f997;
	setp.gt.f32 	%p107, %f998, 0f42FC0000;
	mov.b32 	%r331, %f997;
	and.b32  	%r332, %r331, -2147483648;
	or.b32  	%r333, %r332, 1123811328;
	mov.b32 	%f999, %r333;
	selp.f32 	%f1000, %f999, %f997, %p107;
	mov.f32 	%f1001, 0fBF317218;
	fma.rn.f32 	%f1002, %f1000, %f1001, %f994;
	mov.f32 	%f1003, 0f3102E308;
	fma.rn.f32 	%f1004, %f1000, %f1003, %f1002;
	mul.f32 	%f1005, %f1004, 0f3FB8AA3B;
	add.f32 	%f1006, %f1000, 0f4B40007F;
	mov.b32 	%r334, %f1006;
	shl.b32 	%r335, %r334, 23;
	mov.b32 	%f1007, %r335;
	ex2.approx.ftz.f32 	%f1008, %f1005;
	mul.f32 	%f188, %f1008, %f1007;
	setp.eq.f32 	%p108, %f188, 0f7F800000;
	mov.f32 	%f1400, 0f7F800000;
	@%p108 bra 	$L__BB0_88;

	fma.rn.f32 	%f1400, %f188, %f187, %f188;

$L__BB0_88:
	setp.lt.f32 	%p109, %f1379, 0f00000000;
	and.pred  	%p6, %p109, %p80;
	setp.eq.f32 	%p111, %f1379, 0f00000000;
	@%p111 bra 	$L__BB0_92;
	bra.uni 	$L__BB0_89;

$L__BB0_92:
	add.f32 	%f1013, %f1379, %f1379;
	selp.f32 	%f1402, %f1013, 0f00000000, %p80;
	bra.uni 	$L__BB0_93;

$L__BB0_89:
	mov.b32 	%r336, %f1400;
	xor.b32  	%r337, %r336, -2147483648;
	mov.b32 	%f1009, %r337;
	selp.f32 	%f1402, %f1009, %f1400, %p6;
	setp.geu.f32 	%p112, %f1379, 0f00000000;
	@%p112 bra 	$L__BB0_93;

	mov.f32 	%f1010, 0f3EE66666;
	cvt.rzi.f32.f32 	%f1011, %f1010;
	setp.eq.f32 	%p113, %f1011, 0f3EE66666;
	@%p113 bra 	$L__BB0_93;

	mov.f32 	%f1402, 0f7FFFFFFF;

$L__BB0_93:
	add.f32 	%f1014, %f186, 0f3EE66666;
	mov.b32 	%r338, %f1014;
	setp.lt.s32 	%p115, %r338, 2139095040;
	@%p115 bra 	$L__BB0_98;

	setp.gtu.f32 	%p116, %f186, 0f7F800000;
	@%p116 bra 	$L__BB0_97;
	bra.uni 	$L__BB0_95;

$L__BB0_97:
	add.f32 	%f1402, %f1379, 0f3EE66666;
	bra.uni 	$L__BB0_98;

$L__BB0_95:
	setp.neu.f32 	%p117, %f186, 0f7F800000;
	@%p117 bra 	$L__BB0_98;

	selp.f32 	%f1402, 0fFF800000, 0f7F800000, %p6;

$L__BB0_98:
	setp.eq.f32 	%p118, %f1379, 0f3F800000;
	mov.f32 	%f1016, 0f3F800000;
	selp.f32 	%f1017, 0f3F800000, %f1402, %p118;
	ld.const.u64 	%rd28, [params+144];
	cvta.to.global.u64 	%rd9, %rd28;
	ld.const.u32 	%r339, [params+136];
	mad.lo.s32 	%r340, %r339, %r4, %r3;
	cvt.u64.u32 	%rd10, %r340;
	min.f32 	%f1018, %f173, %f1016;
	mov.f32 	%f1019, 0f00000000;
	max.f32 	%f197, %f1019, %f1018;
	min.f32 	%f1020, %f185, %f1016;
	max.f32 	%f198, %f1019, %f1020;
	min.f32 	%f1021, %f1017, %f1016;
	max.f32 	%f199, %f1019, %f1021;
	mov.f32 	%f1022, 0f3E555555;
	cvt.rzi.f32.f32 	%f1023, %f1022;
	add.f32 	%f1024, %f1023, %f1023;
	mov.f32 	%f1025, 0f3ED55555;
	sub.f32 	%f1026, %f1025, %f1024;
	abs.f32 	%f200, %f1026;
	abs.f32 	%f201, %f197;
	setp.lt.f32 	%p119, %f201, 0f00800000;
	mul.f32 	%f1027, %f201, 0f4B800000;
	selp.f32 	%f1028, %f1027, %f201, %p119;
	selp.f32 	%f1029, 0fC3170000, 0fC2FE0000, %p119;
	mov.b32 	%r341, %f1028;
	and.b32  	%r342, %r341, 8388607;
	or.b32  	%r343, %r342, 1065353216;
	mov.b32 	%f1030, %r343;
	shr.u32 	%r344, %r341, 23;
	cvt.rn.f32.u32 	%f1031, %r344;
	add.f32 	%f1032, %f1029, %f1031;
	setp.gt.f32 	%p120, %f1030, 0f3FB504F3;
	mul.f32 	%f1033, %f1030, 0f3F000000;
	add.f32 	%f1034, %f1032, 0f3F800000;
	selp.f32 	%f1035, %f1034, %f1032, %p120;
	selp.f32 	%f1036, %f1033, %f1030, %p120;
	add.f32 	%f1037, %f1036, 0fBF800000;
	add.f32 	%f1038, %f1036, 0f3F800000;
	rcp.approx.ftz.f32 	%f1039, %f1038;
	add.f32 	%f1040, %f1037, %f1037;
	mul.f32 	%f1041, %f1040, %f1039;
	mul.f32 	%f1042, %f1041, %f1041;
	mov.f32 	%f1043, 0f3C4CAF63;
	mov.f32 	%f1044, 0f3B18F0FE;
	fma.rn.f32 	%f1045, %f1044, %f1042, %f1043;
	mov.f32 	%f1046, 0f3DAAAABD;
	fma.rn.f32 	%f1047, %f1045, %f1042, %f1046;
	mul.rn.f32 	%f1048, %f1047, %f1042;
	mul.rn.f32 	%f1049, %f1048, %f1041;
	sub.f32 	%f1050, %f1037, %f1041;
	add.f32 	%f1051, %f1050, %f1050;
	neg.f32 	%f1052, %f1041;
	fma.rn.f32 	%f1053, %f1052, %f1037, %f1051;
	mul.rn.f32 	%f1054, %f1039, %f1053;
	add.f32 	%f1055, %f1049, %f1041;
	sub.f32 	%f1056, %f1041, %f1055;
	add.f32 	%f1057, %f1049, %f1056;
	add.f32 	%f1058, %f1054, %f1057;
	add.f32 	%f1059, %f1055, %f1058;
	sub.f32 	%f1060, %f1055, %f1059;
	add.f32 	%f1061, %f1058, %f1060;
	mov.f32 	%f1062, 0f3F317200;
	mul.rn.f32 	%f1063, %f1035, %f1062;
	mov.f32 	%f1064, 0f35BFBE8E;
	mul.rn.f32 	%f1065, %f1035, %f1064;
	add.f32 	%f1066, %f1063, %f1059;
	sub.f32 	%f1067, %f1063, %f1066;
	add.f32 	%f1068, %f1059, %f1067;
	add.f32 	%f1069, %f1061, %f1068;
	add.f32 	%f1070, %f1065, %f1069;
	add.f32 	%f1071, %f1066, %f1070;
	sub.f32 	%f1072, %f1066, %f1071;
	add.f32 	%f1073, %f1070, %f1072;
	mul.rn.f32 	%f1074, %f1025, %f1071;
	neg.f32 	%f1075, %f1074;
	fma.rn.f32 	%f1076, %f1025, %f1071, %f1075;
	fma.rn.f32 	%f1077, %f1025, %f1073, %f1076;
	fma.rn.f32 	%f1078, %f1019, %f1071, %f1077;
	add.rn.f32 	%f1079, %f1074, %f1078;
	neg.f32 	%f1080, %f1079;
	add.rn.f32 	%f1081, %f1074, %f1080;
	add.rn.f32 	%f1082, %f1081, %f1078;
	mov.b32 	%r345, %f1079;
	setp.eq.s32 	%p121, %r345, 1118925336;
	add.s32 	%r346, %r345, -1;
	mov.b32 	%f1083, %r346;
	add.f32 	%f1084, %f1082, 0f37000000;
	selp.f32 	%f202, %f1084, %f1082, %p121;
	selp.f32 	%f1085, %f1083, %f1079, %p121;
	mov.f32 	%f1086, 0f3FB8AA3B;
	mul.rn.f32 	%f1087, %f1085, %f1086;
	cvt.rzi.f32.f32 	%f1088, %f1087;
	abs.f32 	%f1089, %f1088;
	setp.gt.f32 	%p122, %f1089, 0f42FC0000;
	mov.b32 	%r347, %f1088;
	and.b32  	%r348, %r347, -2147483648;
	or.b32  	%r349, %r348, 1123811328;
	mov.b32 	%f1090, %r349;
	selp.f32 	%f1091, %f1090, %f1088, %p122;
	mov.f32 	%f1092, 0fBF317218;
	fma.rn.f32 	%f1093, %f1091, %f1092, %f1085;
	mov.f32 	%f1094, 0f3102E308;
	fma.rn.f32 	%f1095, %f1091, %f1094, %f1093;
	mul.f32 	%f1096, %f1095, 0f3FB8AA3B;
	add.f32 	%f1097, %f1091, 0f4B40007F;
	mov.b32 	%r350, %f1097;
	shl.b32 	%r351, %r350, 23;
	mov.b32 	%f1098, %r351;
	ex2.approx.ftz.f32 	%f1099, %f1096;
	mul.f32 	%f203, %f1099, %f1098;
	setp.eq.f32 	%p123, %f203, 0f7F800000;
	mov.f32 	%f1403, 0f7F800000;
	@%p123 bra 	$L__BB0_100;

	fma.rn.f32 	%f1403, %f203, %f202, %f203;

$L__BB0_100:
	setp.lt.f32 	%p124, %f197, 0f00000000;
	setp.eq.f32 	%p125, %f200, 0f3F800000;
	and.pred  	%p7, %p124, %p125;
	setp.eq.f32 	%p126, %f197, 0f00000000;
	@%p126 bra 	$L__BB0_104;
	bra.uni 	$L__BB0_101;

$L__BB0_104:
	add.f32 	%f1104, %f197, %f197;
	selp.f32 	%f1405, %f1104, 0f00000000, %p125;
	bra.uni 	$L__BB0_105;

$L__BB0_101:
	mov.b32 	%r352, %f1403;
	xor.b32  	%r353, %r352, -2147483648;
	mov.b32 	%f1100, %r353;
	selp.f32 	%f1405, %f1100, %f1403, %p7;
	setp.geu.f32 	%p127, %f197, 0f00000000;
	@%p127 bra 	$L__BB0_105;

	mov.f32 	%f1101, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1102, %f1101;
	setp.eq.f32 	%p128, %f1102, 0f3ED55555;
	@%p128 bra 	$L__BB0_105;

	mov.f32 	%f1405, 0f7FFFFFFF;

$L__BB0_105:
	add.f32 	%f1105, %f201, 0f3ED55555;
	mov.b32 	%r354, %f1105;
	setp.lt.s32 	%p130, %r354, 2139095040;
	@%p130 bra 	$L__BB0_110;

	setp.gtu.f32 	%p131, %f201, 0f7F800000;
	@%p131 bra 	$L__BB0_109;
	bra.uni 	$L__BB0_107;

$L__BB0_109:
	add.f32 	%f1405, %f197, 0f3ED55555;
	bra.uni 	$L__BB0_110;

$L__BB0_107:
	setp.neu.f32 	%p132, %f201, 0f7F800000;
	@%p132 bra 	$L__BB0_110;

	selp.f32 	%f1405, 0fFF800000, 0f7F800000, %p7;

$L__BB0_110:
	abs.f32 	%f212, %f198;
	setp.lt.f32 	%p133, %f212, 0f00800000;
	mul.f32 	%f1107, %f212, 0f4B800000;
	selp.f32 	%f1108, %f1107, %f212, %p133;
	selp.f32 	%f1109, 0fC3170000, 0fC2FE0000, %p133;
	mov.b32 	%r355, %f1108;
	and.b32  	%r356, %r355, 8388607;
	or.b32  	%r357, %r356, 1065353216;
	mov.b32 	%f1110, %r357;
	shr.u32 	%r358, %r355, 23;
	cvt.rn.f32.u32 	%f1111, %r358;
	add.f32 	%f1112, %f1109, %f1111;
	setp.gt.f32 	%p134, %f1110, 0f3FB504F3;
	mul.f32 	%f1113, %f1110, 0f3F000000;
	add.f32 	%f1114, %f1112, 0f3F800000;
	selp.f32 	%f1115, %f1114, %f1112, %p134;
	selp.f32 	%f1116, %f1113, %f1110, %p134;
	add.f32 	%f1117, %f1116, 0fBF800000;
	add.f32 	%f1118, %f1116, 0f3F800000;
	rcp.approx.ftz.f32 	%f1119, %f1118;
	add.f32 	%f1120, %f1117, %f1117;
	mul.f32 	%f1121, %f1120, %f1119;
	mul.f32 	%f1122, %f1121, %f1121;
	mov.f32 	%f1123, 0f3C4CAF63;
	mov.f32 	%f1124, 0f3B18F0FE;
	fma.rn.f32 	%f1125, %f1124, %f1122, %f1123;
	mov.f32 	%f1126, 0f3DAAAABD;
	fma.rn.f32 	%f1127, %f1125, %f1122, %f1126;
	mul.rn.f32 	%f1128, %f1127, %f1122;
	mul.rn.f32 	%f1129, %f1128, %f1121;
	sub.f32 	%f1130, %f1117, %f1121;
	add.f32 	%f1131, %f1130, %f1130;
	neg.f32 	%f1132, %f1121;
	fma.rn.f32 	%f1133, %f1132, %f1117, %f1131;
	mul.rn.f32 	%f1134, %f1119, %f1133;
	add.f32 	%f1135, %f1129, %f1121;
	sub.f32 	%f1136, %f1121, %f1135;
	add.f32 	%f1137, %f1129, %f1136;
	add.f32 	%f1138, %f1134, %f1137;
	add.f32 	%f1139, %f1135, %f1138;
	sub.f32 	%f1140, %f1135, %f1139;
	add.f32 	%f1141, %f1138, %f1140;
	mov.f32 	%f1142, 0f3F317200;
	mul.rn.f32 	%f1143, %f1115, %f1142;
	mov.f32 	%f1144, 0f35BFBE8E;
	mul.rn.f32 	%f1145, %f1115, %f1144;
	add.f32 	%f1146, %f1143, %f1139;
	sub.f32 	%f1147, %f1143, %f1146;
	add.f32 	%f1148, %f1139, %f1147;
	add.f32 	%f1149, %f1141, %f1148;
	add.f32 	%f1150, %f1145, %f1149;
	add.f32 	%f1151, %f1146, %f1150;
	sub.f32 	%f1152, %f1146, %f1151;
	add.f32 	%f1153, %f1150, %f1152;
	mov.f32 	%f1154, 0f3ED55555;
	mul.rn.f32 	%f1155, %f1154, %f1151;
	neg.f32 	%f1156, %f1155;
	fma.rn.f32 	%f1157, %f1154, %f1151, %f1156;
	fma.rn.f32 	%f1158, %f1154, %f1153, %f1157;
	mov.f32 	%f1159, 0f00000000;
	fma.rn.f32 	%f1160, %f1159, %f1151, %f1158;
	add.rn.f32 	%f1161, %f1155, %f1160;
	neg.f32 	%f1162, %f1161;
	add.rn.f32 	%f1163, %f1155, %f1162;
	add.rn.f32 	%f1164, %f1163, %f1160;
	mov.b32 	%r359, %f1161;
	setp.eq.s32 	%p135, %r359, 1118925336;
	add.s32 	%r360, %r359, -1;
	mov.b32 	%f1165, %r360;
	add.f32 	%f1166, %f1164, 0f37000000;
	selp.f32 	%f213, %f1166, %f1164, %p135;
	selp.f32 	%f1167, %f1165, %f1161, %p135;
	mov.f32 	%f1168, 0f3FB8AA3B;
	mul.rn.f32 	%f1169, %f1167, %f1168;
	cvt.rzi.f32.f32 	%f1170, %f1169;
	abs.f32 	%f1171, %f1170;
	setp.gt.f32 	%p136, %f1171, 0f42FC0000;
	mov.b32 	%r361, %f1170;
	and.b32  	%r362, %r361, -2147483648;
	or.b32  	%r363, %r362, 1123811328;
	mov.b32 	%f1172, %r363;
	selp.f32 	%f1173, %f1172, %f1170, %p136;
	mov.f32 	%f1174, 0fBF317218;
	fma.rn.f32 	%f1175, %f1173, %f1174, %f1167;
	mov.f32 	%f1176, 0f3102E308;
	fma.rn.f32 	%f1177, %f1173, %f1176, %f1175;
	mul.f32 	%f1178, %f1177, 0f3FB8AA3B;
	add.f32 	%f1179, %f1173, 0f4B40007F;
	mov.b32 	%r364, %f1179;
	shl.b32 	%r365, %r364, 23;
	mov.b32 	%f1180, %r365;
	ex2.approx.ftz.f32 	%f1181, %f1178;
	mul.f32 	%f214, %f1181, %f1180;
	setp.eq.f32 	%p137, %f214, 0f7F800000;
	mov.f32 	%f1406, 0f7F800000;
	@%p137 bra 	$L__BB0_112;

	fma.rn.f32 	%f1406, %f214, %f213, %f214;

$L__BB0_112:
	setp.lt.f32 	%p138, %f198, 0f00000000;
	and.pred  	%p8, %p138, %p125;
	setp.eq.f32 	%p140, %f198, 0f00000000;
	@%p140 bra 	$L__BB0_116;
	bra.uni 	$L__BB0_113;

$L__BB0_116:
	add.f32 	%f1186, %f198, %f198;
	selp.f32 	%f1408, %f1186, 0f00000000, %p125;
	bra.uni 	$L__BB0_117;

$L__BB0_113:
	mov.b32 	%r366, %f1406;
	xor.b32  	%r367, %r366, -2147483648;
	mov.b32 	%f1182, %r367;
	selp.f32 	%f1408, %f1182, %f1406, %p8;
	setp.geu.f32 	%p141, %f198, 0f00000000;
	@%p141 bra 	$L__BB0_117;

	mov.f32 	%f1183, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1184, %f1183;
	setp.eq.f32 	%p142, %f1184, 0f3ED55555;
	@%p142 bra 	$L__BB0_117;

	mov.f32 	%f1408, 0f7FFFFFFF;

$L__BB0_117:
	add.f32 	%f1187, %f212, 0f3ED55555;
	mov.b32 	%r368, %f1187;
	setp.lt.s32 	%p144, %r368, 2139095040;
	@%p144 bra 	$L__BB0_122;

	setp.gtu.f32 	%p145, %f212, 0f7F800000;
	@%p145 bra 	$L__BB0_121;
	bra.uni 	$L__BB0_119;

$L__BB0_121:
	add.f32 	%f1408, %f198, 0f3ED55555;
	bra.uni 	$L__BB0_122;

$L__BB0_119:
	setp.neu.f32 	%p146, %f212, 0f7F800000;
	@%p146 bra 	$L__BB0_122;

	selp.f32 	%f1408, 0fFF800000, 0f7F800000, %p8;

$L__BB0_122:
	abs.f32 	%f223, %f199;
	setp.lt.f32 	%p147, %f223, 0f00800000;
	mul.f32 	%f1189, %f223, 0f4B800000;
	selp.f32 	%f1190, %f1189, %f223, %p147;
	selp.f32 	%f1191, 0fC3170000, 0fC2FE0000, %p147;
	mov.b32 	%r369, %f1190;
	and.b32  	%r370, %r369, 8388607;
	or.b32  	%r371, %r370, 1065353216;
	mov.b32 	%f1192, %r371;
	shr.u32 	%r372, %r369, 23;
	cvt.rn.f32.u32 	%f1193, %r372;
	add.f32 	%f1194, %f1191, %f1193;
	setp.gt.f32 	%p148, %f1192, 0f3FB504F3;
	mul.f32 	%f1195, %f1192, 0f3F000000;
	add.f32 	%f1196, %f1194, 0f3F800000;
	selp.f32 	%f1197, %f1196, %f1194, %p148;
	selp.f32 	%f1198, %f1195, %f1192, %p148;
	add.f32 	%f1199, %f1198, 0fBF800000;
	add.f32 	%f1200, %f1198, 0f3F800000;
	rcp.approx.ftz.f32 	%f1201, %f1200;
	add.f32 	%f1202, %f1199, %f1199;
	mul.f32 	%f1203, %f1202, %f1201;
	mul.f32 	%f1204, %f1203, %f1203;
	mov.f32 	%f1205, 0f3C4CAF63;
	mov.f32 	%f1206, 0f3B18F0FE;
	fma.rn.f32 	%f1207, %f1206, %f1204, %f1205;
	mov.f32 	%f1208, 0f3DAAAABD;
	fma.rn.f32 	%f1209, %f1207, %f1204, %f1208;
	mul.rn.f32 	%f1210, %f1209, %f1204;
	mul.rn.f32 	%f1211, %f1210, %f1203;
	sub.f32 	%f1212, %f1199, %f1203;
	add.f32 	%f1213, %f1212, %f1212;
	neg.f32 	%f1214, %f1203;
	fma.rn.f32 	%f1215, %f1214, %f1199, %f1213;
	mul.rn.f32 	%f1216, %f1201, %f1215;
	add.f32 	%f1217, %f1211, %f1203;
	sub.f32 	%f1218, %f1203, %f1217;
	add.f32 	%f1219, %f1211, %f1218;
	add.f32 	%f1220, %f1216, %f1219;
	add.f32 	%f1221, %f1217, %f1220;
	sub.f32 	%f1222, %f1217, %f1221;
	add.f32 	%f1223, %f1220, %f1222;
	mov.f32 	%f1224, 0f3F317200;
	mul.rn.f32 	%f1225, %f1197, %f1224;
	mov.f32 	%f1226, 0f35BFBE8E;
	mul.rn.f32 	%f1227, %f1197, %f1226;
	add.f32 	%f1228, %f1225, %f1221;
	sub.f32 	%f1229, %f1225, %f1228;
	add.f32 	%f1230, %f1221, %f1229;
	add.f32 	%f1231, %f1223, %f1230;
	add.f32 	%f1232, %f1227, %f1231;
	add.f32 	%f1233, %f1228, %f1232;
	sub.f32 	%f1234, %f1228, %f1233;
	add.f32 	%f1235, %f1232, %f1234;
	mov.f32 	%f1236, 0f3ED55555;
	mul.rn.f32 	%f1237, %f1236, %f1233;
	neg.f32 	%f1238, %f1237;
	fma.rn.f32 	%f1239, %f1236, %f1233, %f1238;
	fma.rn.f32 	%f1240, %f1236, %f1235, %f1239;
	mov.f32 	%f1241, 0f00000000;
	fma.rn.f32 	%f1242, %f1241, %f1233, %f1240;
	add.rn.f32 	%f1243, %f1237, %f1242;
	neg.f32 	%f1244, %f1243;
	add.rn.f32 	%f1245, %f1237, %f1244;
	add.rn.f32 	%f1246, %f1245, %f1242;
	mov.b32 	%r373, %f1243;
	setp.eq.s32 	%p149, %r373, 1118925336;
	add.s32 	%r374, %r373, -1;
	mov.b32 	%f1247, %r374;
	add.f32 	%f1248, %f1246, 0f37000000;
	selp.f32 	%f224, %f1248, %f1246, %p149;
	selp.f32 	%f1249, %f1247, %f1243, %p149;
	mov.f32 	%f1250, 0f3FB8AA3B;
	mul.rn.f32 	%f1251, %f1249, %f1250;
	cvt.rzi.f32.f32 	%f1252, %f1251;
	abs.f32 	%f1253, %f1252;
	setp.gt.f32 	%p150, %f1253, 0f42FC0000;
	mov.b32 	%r375, %f1252;
	and.b32  	%r376, %r375, -2147483648;
	or.b32  	%r377, %r376, 1123811328;
	mov.b32 	%f1254, %r377;
	selp.f32 	%f1255, %f1254, %f1252, %p150;
	mov.f32 	%f1256, 0fBF317218;
	fma.rn.f32 	%f1257, %f1255, %f1256, %f1249;
	mov.f32 	%f1258, 0f3102E308;
	fma.rn.f32 	%f1259, %f1255, %f1258, %f1257;
	mul.f32 	%f1260, %f1259, 0f3FB8AA3B;
	add.f32 	%f1261, %f1255, 0f4B40007F;
	mov.b32 	%r378, %f1261;
	shl.b32 	%r379, %r378, 23;
	mov.b32 	%f1262, %r379;
	ex2.approx.ftz.f32 	%f1263, %f1260;
	mul.f32 	%f225, %f1263, %f1262;
	setp.eq.f32 	%p151, %f225, 0f7F800000;
	mov.f32 	%f1409, 0f7F800000;
	@%p151 bra 	$L__BB0_124;

	fma.rn.f32 	%f1409, %f225, %f224, %f225;

$L__BB0_124:
	setp.lt.f32 	%p152, %f199, 0f00000000;
	and.pred  	%p9, %p152, %p125;
	setp.eq.f32 	%p154, %f199, 0f00000000;
	@%p154 bra 	$L__BB0_128;
	bra.uni 	$L__BB0_125;

$L__BB0_128:
	add.f32 	%f1268, %f199, %f199;
	selp.f32 	%f1411, %f1268, 0f00000000, %p125;
	bra.uni 	$L__BB0_129;

$L__BB0_125:
	mov.b32 	%r380, %f1409;
	xor.b32  	%r381, %r380, -2147483648;
	mov.b32 	%f1264, %r381;
	selp.f32 	%f1411, %f1264, %f1409, %p9;
	setp.geu.f32 	%p155, %f199, 0f00000000;
	@%p155 bra 	$L__BB0_129;

	mov.f32 	%f1265, 0f3ED55555;
	cvt.rzi.f32.f32 	%f1266, %f1265;
	setp.eq.f32 	%p156, %f1266, 0f3ED55555;
	@%p156 bra 	$L__BB0_129;

	mov.f32 	%f1411, 0f7FFFFFFF;

$L__BB0_129:
	add.f32 	%f1269, %f223, 0f3ED55555;
	mov.b32 	%r382, %f1269;
	setp.lt.s32 	%p158, %r382, 2139095040;
	@%p158 bra 	$L__BB0_134;

	setp.gtu.f32 	%p159, %f223, 0f7F800000;
	@%p159 bra 	$L__BB0_133;
	bra.uni 	$L__BB0_131;

$L__BB0_133:
	add.f32 	%f1411, %f199, 0f3ED55555;
	bra.uni 	$L__BB0_134;

$L__BB0_131:
	setp.neu.f32 	%p160, %f223, 0f7F800000;
	@%p160 bra 	$L__BB0_134;

	selp.f32 	%f1411, 0fFF800000, 0f7F800000, %p9;

$L__BB0_134:
	fma.rn.f32 	%f1270, %f1405, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p161, %f197, 0f3F800000;
	mov.f32 	%f1271, 0f3F800000;
	selp.f32 	%f1272, 0f3F7FFFFF, %f1270, %p161;
	mul.f32 	%f1273, %f197, 0f414EB852;
	setp.lt.f32 	%p162, %f197, 0f3B4D2E1C;
	selp.f32 	%f1274, %f1273, %f1272, %p162;
	fma.rn.f32 	%f1275, %f1408, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p163, %f198, 0f3F800000;
	selp.f32 	%f1276, 0f3F7FFFFF, %f1275, %p163;
	mul.f32 	%f1277, %f198, 0f414EB852;
	setp.lt.f32 	%p164, %f198, 0f3B4D2E1C;
	selp.f32 	%f1278, %f1277, %f1276, %p164;
	fma.rn.f32 	%f1279, %f1411, 0f3F870A3D, 0fBD6147AE;
	setp.eq.f32 	%p165, %f199, 0f3F800000;
	selp.f32 	%f1280, 0f3F7FFFFF, %f1279, %p165;
	mul.f32 	%f1281, %f199, 0f414EB852;
	setp.lt.f32 	%p166, %f199, 0f3B4D2E1C;
	selp.f32 	%f1282, %f1281, %f1280, %p166;
	min.f32 	%f1283, %f1274, %f1271;
	mov.f32 	%f1284, 0f00000000;
	max.f32 	%f1285, %f1284, %f1283;
	mul.f32 	%f1286, %f1285, 0f43800000;
	cvt.rzi.u32.f32 	%r383, %f1286;
	min.u32 	%r384, %r383, 255;
	min.f32 	%f1287, %f1278, %f1271;
	max.f32 	%f1288, %f1284, %f1287;
	mul.f32 	%f1289, %f1288, 0f43800000;
	cvt.rzi.u32.f32 	%r385, %f1289;
	min.u32 	%r386, %r385, 255;
	min.f32 	%f1290, %f1282, %f1271;
	max.f32 	%f1291, %f1284, %f1290;
	mul.f32 	%f1292, %f1291, 0f43800000;
	cvt.rzi.u32.f32 	%r387, %f1292;
	min.u32 	%r388, %r387, 255;
	shl.b64 	%rd29, %rd10, 2;
	add.s64 	%rd30, %rd9, %rd29;
	cvt.u16.u32 	%rs20, %r388;
	cvt.u16.u32 	%rs21, %r386;
	cvt.u16.u32 	%rs22, %r384;
	mov.u16 	%rs23, 255;
	st.global.v4.u8 	[%rd30], {%rs22, %rs21, %rs20, %rs23};

$L__BB0_135:
	and.b32  	%r389, %r417, 4;
	setp.eq.s32 	%p167, %r389, 0;
	@%p167 bra 	$L__BB0_139;

	ld.const.u32 	%r390, [params+108];
	setp.eq.s32 	%p168, %r390, 0;
	ld.const.u64 	%rd31, [params+224];
	cvta.to.global.u64 	%rd32, %rd31;
	ld.const.u32 	%r391, [params+216];
	mad.lo.s32 	%r392, %r391, %r4, %r3;
	mul.wide.u32 	%rd33, %r392, 8;
	add.s64 	%rd11, %rd32, %rd33;
	@%p168 bra 	$L__BB0_138;

	ld.global.v4.u16 	{%rs31, %rs32, %rs33, %rs34}, [%rd11];
	// begin inline asm
	{  cvt.f32.f16 %f1293, %rs31;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1294, %rs32;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f1295, %rs33;}

	// end inline asm
	add.f32 	%f1296, %f1377, %f1293;
	add.f32 	%f1297, %f1378, %f1294;
	add.f32 	%f1298, %f1379, %f1295;
	mov.f32 	%f1299, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs29, %f1298;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f1297;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs27, %f1296;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f1299;}

	// end inline asm
	st.global.v4.u16 	[%rd11], {%rs27, %rs28, %rs29, %rs30};
	bra.uni 	$L__BB0_139;

$L__BB0_138:
	mov.f32 	%f1303, 0f3F800000;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs38, %f1303;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs37, %f1379;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs36, %f1378;}

	// end inline asm
	// begin inline asm
	{  cvt.rn.f16.f32 %rs35, %f1377;}

	// end inline asm
	st.global.v4.u16 	[%rd11], {%rs35, %rs36, %rs37, %rs38};

$L__BB0_139:
	and.b32  	%r393, %r417, 64;
	setp.eq.s32 	%p169, %r393, 0;
	@%p169 bra 	$L__BB0_151;

	mul.f32 	%f1304, %f1381, %f1381;
	fma.rn.f32 	%f1305, %f1380, %f1380, %f1304;
	fma.rn.f32 	%f1306, %f1382, %f1382, %f1305;
	sqrt.rn.f32 	%f1307, %f1306;
	rcp.rn.f32 	%f1308, %f1307;
	mul.f32 	%f1309, %f1380, %f1308;
	mul.f32 	%f1310, %f1381, %f1308;
	mul.f32 	%f1311, %f1382, %f1308;
	ld.const.u64 	%rd34, [params+208];
	cvta.to.global.u64 	%rd35, %rd34;
	ld.const.u32 	%r394, [params+200];
	mad.lo.s32 	%r395, %r394, %r4, %r3;
	fma.rn.f32 	%f1312, %f1309, 0f3F000000, 0f3F000000;
	mul.f32 	%f1313, %f1312, 0f437F0000;
	cvt.rzi.u32.f32 	%r396, %f1313;
	fma.rn.f32 	%f1314, %f1310, 0f3F000000, 0f3F000000;
	mul.f32 	%f1315, %f1314, 0f437F0000;
	cvt.rzi.u32.f32 	%r397, %f1315;
	fma.rn.f32 	%f1316, %f1311, 0f3F000000, 0f3F000000;
	mul.f32 	%f1317, %f1316, 0f437F0000;
	cvt.rzi.u32.f32 	%r398, %f1317;
	mul.wide.u32 	%rd36, %r395, 4;
	add.s64 	%rd37, %rd35, %rd36;
	cvt.u16.u32 	%rs39, %r398;
	cvt.u16.u32 	%rs40, %r397;
	cvt.u16.u32 	%rs41, %r396;
	mov.u16 	%rs42, 255;
	st.global.v4.u8 	[%rd37], {%rs41, %rs40, %rs39, %rs42};

$L__BB0_151:
	ret;

}