404 lines
14 KiB
Plaintext
404 lines
14 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image2[1];
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.global .align 4 .f32 intensity;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo9intensityE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename9intensityE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum9intensityE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic9intensityE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation9intensityE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.reg .pred %p<31>;
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.reg .b16 %rs<10>;
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.reg .f32 %f<128>;
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.reg .b32 %r<57>;
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.reg .b64 %rd<40>;
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ld.global.v2.u32 {%r11, %r12}, [pixelID];
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cvt.u64.u32 %rd3, %r11;
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cvt.u64.u32 %rd4, %r12;
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mov.u64 %rd31, image;
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cvta.global.u64 %rd2, %rd31;
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mov.u32 %r9, 2;
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mov.u32 %r8, 8;
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mov.u64 %rd30, 0;
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// inline asm
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call (%rd1), _rt_buffer_get_64, (%rd2, %r9, %r8, %rd3, %rd4, %rd30, %rd30);
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// inline asm
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ld.u16 %rs1, [%rd1+6];
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// inline asm
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{ cvt.f32.f16 %f27, %rs1;}
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// inline asm
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ld.global.v2.u32 {%r15, %r16}, [pixelID];
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cvt.u64.u32 %rd9, %r15;
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cvt.u64.u32 %rd10, %r16;
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// inline asm
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call (%rd7), _rt_buffer_get_64, (%rd2, %r9, %r8, %rd9, %rd10, %rd30, %rd30);
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// inline asm
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ld.u16 %rs2, [%rd7];
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// inline asm
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{ cvt.f32.f16 %f28, %rs2;}
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// inline asm
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ld.global.v2.u32 {%r19, %r20}, [pixelID];
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cvt.u64.u32 %rd15, %r19;
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cvt.u64.u32 %rd16, %r20;
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// inline asm
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call (%rd13), _rt_buffer_get_64, (%rd2, %r9, %r8, %rd15, %rd16, %rd30, %rd30);
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// inline asm
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ld.u16 %rs3, [%rd13+2];
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// inline asm
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{ cvt.f32.f16 %f29, %rs3;}
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// inline asm
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ld.global.v2.u32 {%r23, %r24}, [pixelID];
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cvt.u64.u32 %rd21, %r23;
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cvt.u64.u32 %rd22, %r24;
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// inline asm
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call (%rd19), _rt_buffer_get_64, (%rd2, %r9, %r8, %rd21, %rd22, %rd30, %rd30);
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// inline asm
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ld.u16 %rs4, [%rd19+4];
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// inline asm
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{ cvt.f32.f16 %f30, %rs4;}
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// inline asm
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ld.global.v2.u32 {%r27, %r28}, [pixelID];
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cvt.u64.u32 %rd27, %r27;
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cvt.u64.u32 %rd28, %r28;
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mov.u64 %rd32, image2;
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cvta.global.u64 %rd26, %rd32;
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mov.u32 %r10, 1;
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// inline asm
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call (%rd25), _rt_buffer_get_64, (%rd26, %r9, %r10, %rd27, %rd28, %rd30, %rd30);
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// inline asm
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ld.u8 %rs5, [%rd25];
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cvt.rn.f32.u16 %f31, %rs5;
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div.rn.f32 %f5, %f31, 0f437F0000;
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ld.global.f32 %f6, [intensity];
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setp.lt.f32 %p2, %f6, 0f00000000;
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@%p2 bra BB0_2;
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bra.uni BB0_1;
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BB0_2:
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neg.f32 %f8, %f6;
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setp.lt.f32 %p3, %f6, 0fBF800000;
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@%p3 bra BB0_4;
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bra.uni BB0_3;
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BB0_4:
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mul.f32 %f38, %f6, 0fBF000000;
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cvt.rzi.f32.f32 %f39, %f38;
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fma.rn.f32 %f40, %f39, 0fC0000000, %f8;
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abs.f32 %f10, %f40;
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abs.f32 %f11, %f5;
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setp.lt.f32 %p4, %f11, 0f00800000;
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mul.f32 %f41, %f11, 0f4B800000;
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selp.f32 %f42, 0fC3170000, 0fC2FE0000, %p4;
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selp.f32 %f43, %f41, %f11, %p4;
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mov.b32 %r31, %f43;
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and.b32 %r32, %r31, 8388607;
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or.b32 %r33, %r32, 1065353216;
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mov.b32 %f44, %r33;
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shr.u32 %r34, %r31, 23;
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cvt.rn.f32.u32 %f45, %r34;
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add.f32 %f46, %f42, %f45;
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setp.gt.f32 %p5, %f44, 0f3FB504F3;
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mul.f32 %f47, %f44, 0f3F000000;
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add.f32 %f48, %f46, 0f3F800000;
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selp.f32 %f49, %f47, %f44, %p5;
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selp.f32 %f50, %f48, %f46, %p5;
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add.f32 %f51, %f49, 0fBF800000;
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add.f32 %f37, %f49, 0f3F800000;
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// inline asm
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rcp.approx.ftz.f32 %f36,%f37;
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// inline asm
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add.f32 %f52, %f51, %f51;
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mul.f32 %f53, %f36, %f52;
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mul.f32 %f54, %f53, %f53;
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mov.f32 %f55, 0f3C4CAF63;
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mov.f32 %f56, 0f3B18F0FE;
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fma.rn.f32 %f57, %f56, %f54, %f55;
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mov.f32 %f58, 0f3DAAAABD;
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fma.rn.f32 %f59, %f57, %f54, %f58;
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mul.rn.f32 %f60, %f59, %f54;
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mul.rn.f32 %f61, %f60, %f53;
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sub.f32 %f62, %f51, %f53;
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neg.f32 %f63, %f53;
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add.f32 %f64, %f62, %f62;
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fma.rn.f32 %f65, %f63, %f51, %f64;
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mul.rn.f32 %f66, %f36, %f65;
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add.f32 %f67, %f61, %f53;
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sub.f32 %f68, %f53, %f67;
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add.f32 %f69, %f61, %f68;
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add.f32 %f70, %f66, %f69;
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add.f32 %f71, %f67, %f70;
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sub.f32 %f72, %f67, %f71;
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add.f32 %f73, %f70, %f72;
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mov.f32 %f74, 0f3F317200;
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mul.rn.f32 %f75, %f50, %f74;
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mov.f32 %f76, 0f35BFBE8E;
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mul.rn.f32 %f77, %f50, %f76;
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add.f32 %f78, %f75, %f71;
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sub.f32 %f79, %f75, %f78;
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add.f32 %f80, %f71, %f79;
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add.f32 %f81, %f73, %f80;
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add.f32 %f82, %f77, %f81;
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add.f32 %f83, %f78, %f82;
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sub.f32 %f84, %f78, %f83;
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add.f32 %f85, %f82, %f84;
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abs.f32 %f12, %f8;
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setp.gt.f32 %p6, %f12, 0f77F684DF;
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mul.f32 %f86, %f6, 0fB9000000;
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selp.f32 %f87, %f86, %f8, %p6;
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mul.rn.f32 %f88, %f87, %f83;
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neg.f32 %f89, %f88;
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fma.rn.f32 %f90, %f87, %f83, %f89;
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fma.rn.f32 %f91, %f87, %f85, %f90;
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mov.f32 %f92, 0f00000000;
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fma.rn.f32 %f93, %f92, %f83, %f91;
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add.rn.f32 %f94, %f88, %f93;
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neg.f32 %f95, %f94;
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add.rn.f32 %f96, %f88, %f95;
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add.rn.f32 %f97, %f96, %f93;
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mov.b32 %r35, %f94;
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setp.eq.s32 %p7, %r35, 1118925336;
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add.s32 %r36, %r35, -1;
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mov.b32 %f98, %r36;
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add.f32 %f99, %f97, 0f37000000;
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selp.f32 %f100, %f98, %f94, %p7;
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selp.f32 %f13, %f99, %f97, %p7;
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mul.f32 %f101, %f100, 0f3FB8AA3B;
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cvt.rzi.f32.f32 %f102, %f101;
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mov.f32 %f103, 0fBF317200;
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fma.rn.f32 %f104, %f102, %f103, %f100;
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mov.f32 %f105, 0fB5BFBE8E;
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fma.rn.f32 %f106, %f102, %f105, %f104;
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mul.f32 %f107, %f106, 0f3FB8AA3B;
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ex2.approx.ftz.f32 %f108, %f107;
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add.f32 %f109, %f102, 0f00000000;
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ex2.approx.f32 %f110, %f109;
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mul.f32 %f111, %f108, %f110;
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setp.lt.f32 %p8, %f100, 0fC2D20000;
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selp.f32 %f112, 0f00000000, %f111, %p8;
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setp.gt.f32 %p9, %f100, 0f42D20000;
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selp.f32 %f124, 0f7F800000, %f112, %p9;
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setp.eq.f32 %p10, %f124, 0f7F800000;
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@%p10 bra BB0_6;
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fma.rn.f32 %f124, %f124, %f13, %f124;
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BB0_6:
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setp.lt.f32 %p11, %f5, 0f00000000;
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setp.eq.f32 %p12, %f10, 0f3F800000;
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and.pred %p1, %p11, %p12;
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mov.b32 %r37, %f124;
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xor.b32 %r38, %r37, -2147483648;
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mov.b32 %f113, %r38;
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selp.f32 %f126, %f113, %f124, %p1;
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setp.eq.f32 %p13, %f5, 0f00000000;
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@%p13 bra BB0_9;
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bra.uni BB0_7;
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BB0_9:
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add.f32 %f116, %f5, %f5;
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mov.b32 %r39, %f116;
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selp.b32 %r40, %r39, 0, %p12;
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or.b32 %r41, %r40, 2139095040;
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setp.gt.f32 %p17, %f6, 0f80000000;
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selp.b32 %r42, %r41, %r40, %p17;
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mov.b32 %f126, %r42;
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bra.uni BB0_10;
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BB0_1:
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add.f32 %f32, %f5, 0fBF800000;
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fma.rn.f32 %f33, %f6, %f32, 0f3F800000;
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cvt.sat.f32.f32 %f127, %f33;
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bra.uni BB0_18;
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BB0_3:
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add.f32 %f34, %f5, 0fBF800000;
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fma.rn.f32 %f35, %f34, %f8, 0f3F800000;
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cvt.sat.f32.f32 %f127, %f35;
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bra.uni BB0_18;
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BB0_7:
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setp.geu.f32 %p14, %f5, 0f00000000;
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@%p14 bra BB0_10;
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cvt.rzi.f32.f32 %f115, %f8;
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setp.neu.f32 %p15, %f115, %f8;
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selp.f32 %f126, 0f7FFFFFFF, %f126, %p15;
|
|
|
|
BB0_10:
|
|
add.f32 %f117, %f11, %f12;
|
|
mov.b32 %r43, %f117;
|
|
setp.lt.s32 %p18, %r43, 2139095040;
|
|
@%p18 bra BB0_17;
|
|
|
|
setp.gtu.f32 %p19, %f11, 0f7F800000;
|
|
setp.gtu.f32 %p20, %f12, 0f7F800000;
|
|
or.pred %p21, %p19, %p20;
|
|
@%p21 bra BB0_16;
|
|
bra.uni BB0_12;
|
|
|
|
BB0_16:
|
|
sub.f32 %f126, %f5, %f6;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_12:
|
|
setp.eq.f32 %p22, %f12, 0f7F800000;
|
|
@%p22 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
setp.gt.f32 %p25, %f11, 0f3F800000;
|
|
selp.b32 %r47, 2139095040, 0, %p25;
|
|
xor.b32 %r48, %r47, 2139095040;
|
|
setp.gt.f32 %p26, %f6, 0f80000000;
|
|
selp.b32 %r49, %r48, %r47, %p26;
|
|
mov.b32 %f118, %r49;
|
|
setp.eq.f32 %p27, %f5, 0fBF800000;
|
|
selp.f32 %f126, 0f3F800000, %f118, %p27;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p23, %f11, 0f7F800000;
|
|
@%p23 bra BB0_17;
|
|
|
|
setp.gtu.f32 %p24, %f6, 0f80000000;
|
|
selp.b32 %r44, 0, 2139095040, %p24;
|
|
or.b32 %r45, %r44, -2147483648;
|
|
selp.b32 %r46, %r45, %r44, %p1;
|
|
mov.b32 %f126, %r46;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p28, %f6, 0f80000000;
|
|
setp.eq.f32 %p29, %f5, 0f3F800000;
|
|
or.pred %p30, %p29, %p28;
|
|
selp.f32 %f119, 0f3F800000, %f126, %p30;
|
|
cvt.sat.f32.f32 %f127, %f119;
|
|
|
|
BB0_18:
|
|
mov.u32 %r56, 2;
|
|
ld.global.v2.u32 {%r52, %r53}, [pixelID];
|
|
cvt.u64.u32 %rd35, %r52;
|
|
cvt.u64.u32 %rd36, %r53;
|
|
// inline asm
|
|
call (%rd33), _rt_buffer_get_64, (%rd2, %r56, %r8, %rd35, %rd36, %rd30, %rd30);
|
|
// inline asm
|
|
mul.f32 %f120, %f28, %f127;
|
|
mul.f32 %f121, %f29, %f127;
|
|
mul.f32 %f122, %f30, %f127;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs8, %f122;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs7, %f121;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs6, %f120;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs9, %f27;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd33], {%rs6, %rs7, %rs8, %rs9};
|
|
ret;
|
|
}
|
|
|
|
|