2671 lines
77 KiB
Plaintext
2671 lines
77 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 image_RNM3[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<166>;
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.reg .b16 %rs<162>;
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.reg .f32 %f<1594>;
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.reg .b32 %r<273>;
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.reg .b64 %rd<272>;
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mov.u64 %rd271, __local_depot0;
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cvta.local.u64 %SP, %rd271;
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ld.global.v2.u32 {%r30, %r31}, [pixelID];
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cvt.u64.u32 %rd10, %r30;
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cvt.u64.u32 %rd11, %r31;
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mov.u64 %rd14, uvnormal;
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cvta.global.u64 %rd9, %rd14;
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mov.u32 %r28, 2;
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mov.u32 %r29, 4;
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mov.u64 %rd13, 0;
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// inline asm
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call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
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// inline asm
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ld.u32 %r1, [%rd8];
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shr.u32 %r34, %r1, 16;
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cvt.u16.u32 %rs1, %r34;
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and.b16 %rs9, %rs1, 255;
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cvt.u16.u32 %rs10, %r1;
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or.b16 %rs11, %rs10, %rs9;
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setp.eq.s16 %p9, %rs11, 0;
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mov.f32 %f1495, 0f00000000;
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mov.f32 %f1496, %f1495;
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mov.f32 %f1497, %f1495;
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@%p9 bra BB0_2;
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ld.u8 %rs12, [%rd8+1];
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and.b16 %rs14, %rs10, 255;
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cvt.rn.f32.u16 %f299, %rs14;
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div.rn.f32 %f300, %f299, 0f437F0000;
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fma.rn.f32 %f301, %f300, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f302, %rs12;
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div.rn.f32 %f303, %f302, 0f437F0000;
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fma.rn.f32 %f304, %f303, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f305, %rs9;
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div.rn.f32 %f306, %f305, 0f437F0000;
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fma.rn.f32 %f307, %f306, 0f40000000, 0fBF800000;
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mul.f32 %f308, %f304, %f304;
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fma.rn.f32 %f309, %f301, %f301, %f308;
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fma.rn.f32 %f310, %f307, %f307, %f309;
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sqrt.rn.f32 %f311, %f310;
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rcp.rn.f32 %f312, %f311;
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mul.f32 %f1495, %f301, %f312;
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mul.f32 %f1496, %f304, %f312;
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mul.f32 %f1497, %f307, %f312;
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BB0_2:
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ld.global.v2.u32 {%r35, %r36}, [pixelID];
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ld.global.v2.u32 {%r38, %r39}, [tileInfo];
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add.s32 %r2, %r35, %r38;
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add.s32 %r3, %r36, %r39;
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setp.eq.f32 %p10, %f1496, 0f00000000;
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setp.eq.f32 %p11, %f1495, 0f00000000;
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and.pred %p12, %p11, %p10;
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setp.eq.f32 %p13, %f1497, 0f00000000;
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and.pred %p14, %p12, %p13;
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@%p14 bra BB0_124;
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bra.uni BB0_3;
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BB0_124:
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ld.global.u32 %r272, [imageEnabled];
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and.b32 %r221, %r272, 1;
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setp.eq.b32 %p157, %r221, 1;
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@!%p157 bra BB0_126;
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bra.uni BB0_125;
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BB0_125:
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cvt.u64.u32 %rd159, %r2;
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cvt.u64.u32 %rd160, %r3;
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mov.u64 %rd163, image;
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cvta.global.u64 %rd158, %rd163;
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// inline asm
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call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13);
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// inline asm
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mov.u16 %rs93, 0;
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st.v4.u8 [%rd157], {%rs93, %rs93, %rs93, %rs93};
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ld.global.u32 %r272, [imageEnabled];
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BB0_126:
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and.b32 %r224, %r272, 8;
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setp.eq.s32 %p158, %r224, 0;
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@%p158 bra BB0_128;
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cvt.u64.u32 %rd167, %r3;
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cvt.u64.u32 %rd166, %r2;
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mov.u64 %rd170, image_Mask;
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cvta.global.u64 %rd165, %rd170;
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// inline asm
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call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13);
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// inline asm
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mov.f32 %f1449, 0f00000000;
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cvt.rzi.u32.f32 %r227, %f1449;
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cvt.u16.u32 %rs94, %r227;
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mov.u16 %rs95, 0;
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st.v2.u8 [%rd164], {%rs94, %rs95};
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ld.global.u32 %r272, [imageEnabled];
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BB0_128:
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cvt.u64.u32 %rd6, %r2;
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cvt.u64.u32 %rd7, %r3;
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and.b32 %r228, %r272, 4;
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setp.eq.s32 %p159, %r228, 0;
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@%p159 bra BB0_132;
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ld.global.u32 %r229, [additive];
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setp.eq.s32 %p160, %r229, 0;
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@%p160 bra BB0_131;
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mov.u64 %rd183, image_HDR;
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cvta.global.u64 %rd172, %rd183;
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mov.u32 %r233, 8;
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// inline asm
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call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r233, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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ld.v4.u16 {%rs102, %rs103, %rs104, %rs105}, [%rd171];
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// inline asm
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{ cvt.f32.f16 %f1450, %rs102;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1451, %rs103;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1452, %rs104;}
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// inline asm
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// inline asm
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call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r233, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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add.f32 %f1453, %f1450, 0f00000000;
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add.f32 %f1454, %f1451, 0f00000000;
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add.f32 %f1455, %f1452, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs101, %f1455;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs100, %f1454;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs99, %f1453;}
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// inline asm
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mov.u16 %rs106, 0;
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st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs106};
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bra.uni BB0_132;
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BB0_3:
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ld.global.v2.u32 {%r47, %r48}, [pixelID];
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cvt.u64.u32 %rd17, %r47;
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cvt.u64.u32 %rd18, %r48;
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mov.u64 %rd26, uvpos;
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cvta.global.u64 %rd16, %rd26;
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mov.u32 %r44, 12;
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// inline asm
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call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
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// inline asm
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ld.f32 %f9, [%rd15+8];
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ld.f32 %f8, [%rd15+4];
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ld.f32 %f7, [%rd15];
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mul.f32 %f329, %f7, 0f3456BF95;
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mul.f32 %f330, %f8, 0f3456BF95;
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mul.f32 %f331, %f9, 0f3456BF95;
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abs.f32 %f332, %f1495;
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div.rn.f32 %f333, %f329, %f332;
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abs.f32 %f334, %f1496;
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div.rn.f32 %f335, %f330, %f334;
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abs.f32 %f336, %f1497;
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div.rn.f32 %f337, %f331, %f336;
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abs.f32 %f338, %f333;
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abs.f32 %f339, %f335;
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abs.f32 %f340, %f337;
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mov.f32 %f341, 0f38D1B717;
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max.f32 %f342, %f338, %f341;
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max.f32 %f343, %f339, %f341;
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max.f32 %f344, %f340, %f341;
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fma.rn.f32 %f10, %f1495, %f342, %f7;
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fma.rn.f32 %f11, %f1496, %f343, %f8;
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fma.rn.f32 %f12, %f1497, %f344, %f9;
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ld.global.v2.u32 {%r51, %r52}, [pixelID];
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cvt.rn.f32.u32 %f13, %r51;
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cvt.rn.f32.u32 %f14, %r52;
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mov.u64 %rd27, localLights;
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cvta.global.u64 %rd25, %rd27;
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mov.u32 %r45, 1;
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mov.u32 %r46, 96;
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// inline asm
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call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
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// inline asm
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cvt.u32.u64 %r4, %rd21;
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setp.eq.s32 %p15, %r4, 0;
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mov.f32 %f1498, 0f00000000;
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mov.f32 %f1499, %f1498;
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mov.f32 %f1500, %f1498;
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mov.f32 %f1501, %f1498;
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mov.f32 %f1502, %f1498;
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mov.f32 %f1503, %f1498;
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mov.f32 %f1504, %f1498;
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mov.f32 %f1505, %f1498;
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mov.f32 %f1506, %f1498;
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mov.f32 %f1507, %f1498;
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mov.f32 %f1508, %f1498;
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mov.f32 %f1509, %f1498;
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mov.f32 %f1510, %f1498;
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mov.f32 %f1511, %f1498;
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mov.f32 %f1512, %f1498;
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mov.f32 %f1513, %f1498;
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@%p15 bra BB0_60;
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mov.f32 %f361, 0f40000000;
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cvt.rzi.f32.f32 %f362, %f361;
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add.f32 %f363, %f362, %f362;
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mov.f32 %f364, 0f40800000;
|
|
sub.f32 %f365, %f364, %f363;
|
|
abs.f32 %f15, %f365;
|
|
mul.f32 %f16, %f10, 0f3456BF95;
|
|
mul.f32 %f17, %f11, 0f3456BF95;
|
|
mul.f32 %f18, %f12, 0f3456BF95;
|
|
mul.f32 %f19, %f13, 0f3DD32618;
|
|
mul.f32 %f20, %f14, 0f3DD2F1AA;
|
|
mov.f32 %f360, 0f00000000;
|
|
mov.u32 %r264, 0;
|
|
abs.f32 %f559, %f16;
|
|
abs.f32 %f560, %f17;
|
|
max.f32 %f561, %f559, %f560;
|
|
abs.f32 %f562, %f18;
|
|
max.f32 %f563, %f561, %f562;
|
|
mov.f32 %f1498, %f360;
|
|
mov.f32 %f1499, %f360;
|
|
mov.f32 %f1500, %f360;
|
|
mov.f32 %f1501, %f360;
|
|
mov.f32 %f1502, %f360;
|
|
mov.f32 %f1503, %f360;
|
|
mov.f32 %f1504, %f360;
|
|
mov.f32 %f1505, %f360;
|
|
mov.f32 %f1506, %f360;
|
|
mov.f32 %f1507, %f360;
|
|
mov.f32 %f1508, %f360;
|
|
mov.f32 %f1509, %f360;
|
|
mov.f32 %f1510, %f360;
|
|
mov.f32 %f1511, %f360;
|
|
mov.f32 %f1512, %f360;
|
|
mov.f32 %f1513, %f360;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd30, %r264;
|
|
// inline asm
|
|
call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.f32 {%f368, %f369, %f370, %f371}, [%rd28+80];
|
|
ld.v4.f32 {%f372, %f373, %f374, %f375}, [%rd28+64];
|
|
ld.v4.f32 {%f376, %f377, %f378, %f379}, [%rd28+48];
|
|
ld.v4.f32 {%f380, %f1522, %f1523, %f383}, [%rd28+32];
|
|
ld.v4.f32 {%f384, %f385, %f386, %f387}, [%rd28+16];
|
|
ld.v4.f32 {%f388, %f389, %f390, %f391}, [%rd28];
|
|
mov.b32 %r6, %f371;
|
|
sub.f32 %f61, %f389, %f7;
|
|
sub.f32 %f63, %f390, %f8;
|
|
sub.f32 %f65, %f391, %f9;
|
|
mul.f32 %f393, %f63, %f63;
|
|
fma.rn.f32 %f394, %f61, %f61, %f393;
|
|
fma.rn.f32 %f395, %f65, %f65, %f394;
|
|
sqrt.rn.f32 %f66, %f395;
|
|
rcp.rn.f32 %f396, %f66;
|
|
mul.f32 %f67, %f61, %f396;
|
|
mul.f32 %f68, %f63, %f396;
|
|
mul.f32 %f69, %f65, %f396;
|
|
mul.f32 %f70, %f66, %f387;
|
|
abs.f32 %f71, %f70;
|
|
setp.lt.f32 %p16, %f71, 0f00800000;
|
|
mul.f32 %f397, %f71, 0f4B800000;
|
|
selp.f32 %f398, 0fC3170000, 0fC2FE0000, %p16;
|
|
selp.f32 %f399, %f397, %f71, %p16;
|
|
mov.b32 %r58, %f399;
|
|
and.b32 %r59, %r58, 8388607;
|
|
or.b32 %r60, %r59, 1065353216;
|
|
mov.b32 %f400, %r60;
|
|
shr.u32 %r61, %r58, 23;
|
|
cvt.rn.f32.u32 %f401, %r61;
|
|
add.f32 %f402, %f398, %f401;
|
|
setp.gt.f32 %p17, %f400, 0f3FB504F3;
|
|
mul.f32 %f403, %f400, 0f3F000000;
|
|
add.f32 %f404, %f402, 0f3F800000;
|
|
selp.f32 %f405, %f403, %f400, %p17;
|
|
selp.f32 %f406, %f404, %f402, %p17;
|
|
add.f32 %f407, %f405, 0fBF800000;
|
|
add.f32 %f367, %f405, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f366,%f367;
|
|
// inline asm
|
|
add.f32 %f408, %f407, %f407;
|
|
mul.f32 %f409, %f366, %f408;
|
|
mul.f32 %f410, %f409, %f409;
|
|
mov.f32 %f411, 0f3C4CAF63;
|
|
mov.f32 %f412, 0f3B18F0FE;
|
|
fma.rn.f32 %f413, %f412, %f410, %f411;
|
|
mov.f32 %f414, 0f3DAAAABD;
|
|
fma.rn.f32 %f415, %f413, %f410, %f414;
|
|
mul.rn.f32 %f416, %f415, %f410;
|
|
mul.rn.f32 %f417, %f416, %f409;
|
|
sub.f32 %f418, %f407, %f409;
|
|
neg.f32 %f419, %f409;
|
|
add.f32 %f420, %f418, %f418;
|
|
fma.rn.f32 %f421, %f419, %f407, %f420;
|
|
mul.rn.f32 %f422, %f366, %f421;
|
|
add.f32 %f423, %f417, %f409;
|
|
sub.f32 %f424, %f409, %f423;
|
|
add.f32 %f425, %f417, %f424;
|
|
add.f32 %f426, %f422, %f425;
|
|
add.f32 %f427, %f423, %f426;
|
|
sub.f32 %f428, %f423, %f427;
|
|
add.f32 %f429, %f426, %f428;
|
|
mov.f32 %f430, 0f3F317200;
|
|
mul.rn.f32 %f431, %f406, %f430;
|
|
mov.f32 %f432, 0f35BFBE8E;
|
|
mul.rn.f32 %f433, %f406, %f432;
|
|
add.f32 %f434, %f431, %f427;
|
|
sub.f32 %f435, %f431, %f434;
|
|
add.f32 %f436, %f427, %f435;
|
|
add.f32 %f437, %f429, %f436;
|
|
add.f32 %f438, %f433, %f437;
|
|
add.f32 %f439, %f434, %f438;
|
|
sub.f32 %f440, %f434, %f439;
|
|
add.f32 %f441, %f438, %f440;
|
|
mul.rn.f32 %f72, %f364, %f439;
|
|
neg.f32 %f443, %f72;
|
|
fma.rn.f32 %f444, %f364, %f439, %f443;
|
|
fma.rn.f32 %f445, %f364, %f441, %f444;
|
|
fma.rn.f32 %f73, %f360, %f439, %f445;
|
|
add.rn.f32 %f74, %f72, %f73;
|
|
mov.b32 %r62, %f74;
|
|
setp.eq.s32 %p1, %r62, 1118925336;
|
|
add.s32 %r63, %r62, -1;
|
|
mov.b32 %f447, %r63;
|
|
selp.f32 %f448, %f447, %f74, %p1;
|
|
mul.f32 %f449, %f448, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f450, %f449;
|
|
mov.f32 %f451, 0fBF317200;
|
|
fma.rn.f32 %f452, %f450, %f451, %f448;
|
|
mov.f32 %f453, 0fB5BFBE8E;
|
|
fma.rn.f32 %f454, %f450, %f453, %f452;
|
|
mul.f32 %f455, %f454, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f456, %f455;
|
|
add.f32 %f457, %f450, 0f00000000;
|
|
ex2.approx.f32 %f458, %f457;
|
|
mul.f32 %f459, %f456, %f458;
|
|
setp.lt.f32 %p18, %f448, 0fC2D20000;
|
|
selp.f32 %f460, 0f00000000, %f459, %p18;
|
|
setp.gt.f32 %p19, %f448, 0f42D20000;
|
|
selp.f32 %f1514, 0f7F800000, %f460, %p19;
|
|
setp.eq.f32 %p20, %f1514, 0f7F800000;
|
|
@%p20 bra BB0_7;
|
|
|
|
neg.f32 %f461, %f74;
|
|
add.rn.f32 %f462, %f72, %f461;
|
|
add.rn.f32 %f463, %f462, %f73;
|
|
add.f32 %f464, %f463, 0f37000000;
|
|
selp.f32 %f465, %f464, %f463, %p1;
|
|
fma.rn.f32 %f1514, %f1514, %f465, %f1514;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p21, %f70, 0f00000000;
|
|
setp.eq.f32 %p22, %f15, 0f3F800000;
|
|
and.pred %p2, %p21, %p22;
|
|
mov.b32 %r64, %f1514;
|
|
xor.b32 %r65, %r64, -2147483648;
|
|
mov.b32 %f466, %r65;
|
|
selp.f32 %f1516, %f466, %f1514, %p2;
|
|
setp.eq.f32 %p23, %f70, 0f00000000;
|
|
@%p23 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f469, %f70, %f70;
|
|
selp.f32 %f1516, %f469, 0f00000000, %p22;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p24, %f70, 0f00000000;
|
|
@%p24 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f468, %f364;
|
|
setp.neu.f32 %p25, %f468, 0f40800000;
|
|
selp.f32 %f1516, 0f7FFFFFFF, %f1516, %p25;
|
|
|
|
BB0_11:
|
|
add.f32 %f470, %f71, 0f40800000;
|
|
mov.b32 %r66, %f470;
|
|
setp.lt.s32 %p27, %r66, 2139095040;
|
|
@%p27 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p28, %f71, 0f7F800000;
|
|
@%p28 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1516, %f70, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p29, %f71, 0f7F800000;
|
|
@%p29 bra BB0_16;
|
|
|
|
selp.f32 %f1516, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f471, %f66, %f385;
|
|
mov.f32 %f1545, 0f3F800000;
|
|
sub.f32 %f473, %f1545, %f1516;
|
|
setp.eq.f32 %p30, %f70, 0f3F800000;
|
|
selp.f32 %f474, 0f00000000, %f473, %p30;
|
|
cvt.sat.f32.f32 %f475, %f474;
|
|
fma.rn.f32 %f476, %f471, %f471, %f386;
|
|
div.rn.f32 %f100, %f475, %f476;
|
|
mul.f32 %f477, %f1496, %f68;
|
|
fma.rn.f32 %f478, %f1495, %f67, %f477;
|
|
fma.rn.f32 %f479, %f1497, %f69, %f478;
|
|
ld.global.u32 %r67, [ignoreNormal];
|
|
setp.eq.s32 %p31, %r67, 0;
|
|
selp.f32 %f101, %f479, 0f3F800000, %p31;
|
|
mul.f32 %f480, %f101, 0f40800000;
|
|
cvt.sat.f32.f32 %f102, %f480;
|
|
setp.eq.f32 %p32, %f388, 0f3F800000;
|
|
@%p32 bra BB0_23;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_23:
|
|
setp.leu.f32 %p36, %f383, 0f00000000;
|
|
@%p36 bra BB0_19;
|
|
|
|
setp.geu.f32 %p37, %f379, 0f00000000;
|
|
@%p37 bra BB0_25;
|
|
|
|
sub.f32 %f1494, %f391, %f9;
|
|
sub.f32 %f1493, %f389, %f7;
|
|
sub.f32 %f1492, %f390, %f8;
|
|
mul.f32 %f503, %f369, %f1492;
|
|
fma.rn.f32 %f504, %f368, %f1493, %f503;
|
|
fma.rn.f32 %f505, %f370, %f1494, %f504;
|
|
rcp.rn.f32 %f506, %f505;
|
|
mul.f32 %f1517, %f1493, %f506;
|
|
mul.f32 %f1518, %f1492, %f506;
|
|
mul.f32 %f1519, %f1494, %f506;
|
|
neg.f32 %f379, %f379;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p33, %f388, 0f40000000;
|
|
@%p33 bra BB0_21;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_21:
|
|
setp.leu.f32 %p35, %f383, 0f00000000;
|
|
@%p35 bra BB0_19;
|
|
|
|
mul.f32 %f497, %f377, %f68;
|
|
fma.rn.f32 %f498, %f376, %f67, %f497;
|
|
mul.f32 %f499, %f373, %f68;
|
|
fma.rn.f32 %f500, %f372, %f67, %f499;
|
|
mul.f32 %f501, %f369, %f68;
|
|
fma.rn.f32 %f502, %f368, %f67, %f501;
|
|
fma.rn.f32 %f494, %f378, %f69, %f498;
|
|
fma.rn.f32 %f495, %f374, %f69, %f500;
|
|
fma.rn.f32 %f496, %f370, %f69, %f502;
|
|
cvt.rzi.s32.f32 %r68, %f383;
|
|
mov.u32 %r69, 6;
|
|
mov.u32 %r70, 0;
|
|
// inline asm
|
|
call (%f490, %f491, %f492, %f493), _rt_texture_get_base_id, (%r68, %r69, %f494, %f495, %f496, %r70);
|
|
// inline asm
|
|
mul.f32 %f1521, %f380, %f490;
|
|
mul.f32 %f1522, %f1522, %f491;
|
|
mul.f32 %f1523, %f1523, %f492;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p34, %f388, 0f40800000;
|
|
@%p34 bra BB0_19;
|
|
|
|
mul.f32 %f481, %f368, %f67;
|
|
mul.f32 %f482, %f369, %f68;
|
|
neg.f32 %f483, %f482;
|
|
sub.f32 %f484, %f483, %f481;
|
|
mul.f32 %f485, %f370, %f69;
|
|
sub.f32 %f486, %f484, %f485;
|
|
fma.rn.f32 %f487, %f383, %f486, %f379;
|
|
cvt.sat.f32.f32 %f488, %f487;
|
|
mul.f32 %f489, %f488, %f488;
|
|
mul.f32 %f1524, %f100, %f489;
|
|
mov.f32 %f1521, %f380;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_19:
|
|
mov.f32 %f1521, %f380;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1517, %f67;
|
|
mov.f32 %f1518, %f68;
|
|
mov.f32 %f1519, %f69;
|
|
|
|
BB0_27:
|
|
mul.f32 %f515, %f370, %f69;
|
|
mul.f32 %f516, %f369, %f68;
|
|
neg.f32 %f517, %f516;
|
|
mul.f32 %f518, %f368, %f67;
|
|
sub.f32 %f519, %f517, %f518;
|
|
sub.f32 %f520, %f519, %f515;
|
|
setp.gt.f32 %p38, %f520, 0f00000000;
|
|
selp.f32 %f521, 0f3F800000, 0f00000000, %p38;
|
|
mul.f32 %f522, %f377, %f1518;
|
|
fma.rn.f32 %f523, %f376, %f1517, %f522;
|
|
mul.f32 %f524, %f373, %f1518;
|
|
fma.rn.f32 %f525, %f372, %f1517, %f524;
|
|
fma.rn.f32 %f526, %f378, %f1519, %f523;
|
|
fma.rn.f32 %f527, %f374, %f1519, %f525;
|
|
fma.rn.f32 %f528, %f379, %f526, 0f3F000000;
|
|
mov.f32 %f529, 0f3F800000;
|
|
sub.f32 %f511, %f529, %f528;
|
|
fma.rn.f32 %f512, %f379, %f527, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r71, %f383;
|
|
mov.f32 %f514, 0f00000000;
|
|
// inline asm
|
|
call (%f507, %f508, %f509, %f510), _rt_texture_get_f_id, (%r71, %r28, %f511, %f512, %f514, %f514);
|
|
// inline asm
|
|
mul.f32 %f530, %f521, %f507;
|
|
mul.f32 %f531, %f521, %f508;
|
|
mul.f32 %f532, %f521, %f509;
|
|
mul.f32 %f1521, %f380, %f530;
|
|
mul.f32 %f1522, %f1522, %f531;
|
|
mul.f32 %f1523, %f1523, %f532;
|
|
|
|
BB0_28:
|
|
mov.f32 %f1524, %f100;
|
|
|
|
BB0_29:
|
|
max.f32 %f548, %f1521, %f1522;
|
|
max.f32 %f549, %f548, %f1523;
|
|
mul.f32 %f550, %f102, %f1524;
|
|
mul.f32 %f551, %f550, %f549;
|
|
setp.lt.f32 %p40, %f551, 0f3727C5AC;
|
|
mov.pred %p165, -1;
|
|
mov.f32 %f1525, 0f00000000;
|
|
mov.f32 %f1526, %f1525;
|
|
mov.f32 %f1527, %f1525;
|
|
mov.f32 %f140, %f1525;
|
|
mov.f32 %f1529, %f1525;
|
|
mov.f32 %f1530, %f1525;
|
|
mov.f32 %f143, %f1525;
|
|
mov.f32 %f1532, %f1525;
|
|
mov.f32 %f1533, %f1525;
|
|
mov.f32 %f146, %f1525;
|
|
mov.f32 %f1535, %f1525;
|
|
mov.f32 %f1536, %f1525;
|
|
mov.f32 %f149, %f1525;
|
|
mov.f32 %f1538, %f1525;
|
|
mov.f32 %f1539, %f1525;
|
|
@%p40 bra BB0_31;
|
|
|
|
cvt.sat.f32.f32 %f552, %f101;
|
|
mul.f32 %f553, %f1524, %f552;
|
|
mul.f32 %f1525, %f1521, %f553;
|
|
mul.f32 %f1526, %f1522, %f553;
|
|
mul.f32 %f1527, %f1523, %f553;
|
|
mul.f32 %f554, %f1524, 0f3E800000;
|
|
mul.f32 %f555, %f102, %f554;
|
|
mul.f32 %f140, %f1521, %f555;
|
|
mul.f32 %f1529, %f1522, %f555;
|
|
mul.f32 %f1530, %f1523, %f555;
|
|
mul.f32 %f143, %f67, %f140;
|
|
mul.f32 %f1532, %f67, %f1529;
|
|
mul.f32 %f1533, %f67, %f1530;
|
|
mul.f32 %f146, %f68, %f140;
|
|
mul.f32 %f1535, %f68, %f1529;
|
|
mul.f32 %f1536, %f68, %f1530;
|
|
mul.f32 %f149, %f69, %f140;
|
|
mul.f32 %f1538, %f69, %f1529;
|
|
mul.f32 %f1539, %f69, %f1530;
|
|
mov.pred %p165, 0;
|
|
|
|
BB0_31:
|
|
@%p165 bra BB0_59;
|
|
|
|
setp.eq.s32 %p42, %r6, 0;
|
|
mov.u16 %rs161, 0;
|
|
@%p42 bra BB0_43;
|
|
|
|
abs.s32 %r8, %r6;
|
|
mov.f32 %f1544, 0f00000000;
|
|
setp.lt.s32 %p43, %r8, 1;
|
|
@%p43 bra BB0_42;
|
|
|
|
max.f32 %f153, %f563, %f341;
|
|
and.b32 %r9, %r8, 3;
|
|
setp.eq.s32 %p44, %r9, 0;
|
|
add.u64 %rd35, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd35;
|
|
mov.f32 %f1544, 0f00000000;
|
|
mov.u32 %r268, 0;
|
|
@%p44 bra BB0_40;
|
|
|
|
setp.eq.s32 %p45, %r9, 1;
|
|
mov.f32 %f1541, 0f00000000;
|
|
mov.u32 %r266, 0;
|
|
@%p45 bra BB0_39;
|
|
|
|
setp.eq.s32 %p46, %r9, 2;
|
|
mov.f32 %f1540, 0f00000000;
|
|
mov.u32 %r265, 0;
|
|
@%p46 bra BB0_38;
|
|
|
|
cvt.rmi.f32.f32 %f575, %f19;
|
|
sub.f32 %f576, %f19, %f575;
|
|
cvt.rmi.f32.f32 %f577, %f20;
|
|
sub.f32 %f578, %f20, %f577;
|
|
add.f32 %f579, %f578, 0f420551EC;
|
|
add.f32 %f580, %f576, 0f420551EC;
|
|
mul.f32 %f581, %f576, %f579;
|
|
fma.rn.f32 %f582, %f578, %f580, %f581;
|
|
add.f32 %f583, %f582, 0f00000000;
|
|
add.f32 %f584, %f576, %f583;
|
|
add.f32 %f585, %f578, %f583;
|
|
add.f32 %f586, %f584, %f585;
|
|
mul.f32 %f587, %f583, %f586;
|
|
cvt.rmi.f32.f32 %f588, %f587;
|
|
sub.f32 %f589, %f587, %f588;
|
|
add.f32 %f590, %f584, %f584;
|
|
mul.f32 %f591, %f585, %f590;
|
|
cvt.rmi.f32.f32 %f592, %f591;
|
|
sub.f32 %f593, %f591, %f592;
|
|
mul.f32 %f594, %f584, %f586;
|
|
cvt.rmi.f32.f32 %f595, %f594;
|
|
sub.f32 %f596, %f594, %f595;
|
|
fma.rn.f32 %f597, %f589, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f598, %f593, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f599, %f596, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f600, %f384, %f597, %f389;
|
|
fma.rn.f32 %f601, %f384, %f598, %f390;
|
|
fma.rn.f32 %f602, %f384, %f599, %f391;
|
|
sub.f32 %f603, %f600, %f7;
|
|
sub.f32 %f604, %f601, %f8;
|
|
sub.f32 %f605, %f602, %f9;
|
|
mul.f32 %f606, %f604, %f604;
|
|
fma.rn.f32 %f607, %f603, %f603, %f606;
|
|
fma.rn.f32 %f608, %f605, %f605, %f607;
|
|
sqrt.rn.f32 %f574, %f608;
|
|
rcp.rn.f32 %f609, %f574;
|
|
mul.f32 %f570, %f609, %f603;
|
|
mul.f32 %f571, %f609, %f604;
|
|
mul.f32 %f572, %f609, %f605;
|
|
ld.global.u32 %r80, [imageEnabled];
|
|
and.b32 %r81, %r80, 32;
|
|
setp.eq.s32 %p47, %r81, 0;
|
|
selp.f32 %f610, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f573, %f610, %f153;
|
|
mov.u32 %r82, 1065353216;
|
|
st.local.u32 [%rd2], %r82;
|
|
ld.global.u32 %r76, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r76, %f10, %f11, %f12, %f570, %f571, %f572, %r45, %f573, %f574, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f611, [%rd2];
|
|
add.f32 %f1540, %f611, 0f00000000;
|
|
mov.u32 %r265, %r45;
|
|
|
|
BB0_38:
|
|
cvt.rn.f32.s32 %f620, %r265;
|
|
add.f32 %f621, %f13, %f620;
|
|
sub.f32 %f622, %f14, %f620;
|
|
mul.f32 %f623, %f621, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f624, %f623;
|
|
sub.f32 %f625, %f623, %f624;
|
|
mul.f32 %f626, %f622, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f627, %f626;
|
|
sub.f32 %f628, %f626, %f627;
|
|
mul.f32 %f629, %f620, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f630, %f629;
|
|
sub.f32 %f631, %f629, %f630;
|
|
add.f32 %f632, %f628, 0f420551EC;
|
|
add.f32 %f633, %f625, 0f420551EC;
|
|
add.f32 %f634, %f631, 0f420551EC;
|
|
mul.f32 %f635, %f625, %f632;
|
|
fma.rn.f32 %f636, %f628, %f633, %f635;
|
|
fma.rn.f32 %f637, %f631, %f634, %f636;
|
|
add.f32 %f638, %f625, %f637;
|
|
add.f32 %f639, %f628, %f637;
|
|
add.f32 %f640, %f631, %f637;
|
|
add.f32 %f641, %f638, %f639;
|
|
mul.f32 %f642, %f640, %f641;
|
|
cvt.rmi.f32.f32 %f643, %f642;
|
|
sub.f32 %f644, %f642, %f643;
|
|
add.f32 %f645, %f638, %f638;
|
|
mul.f32 %f646, %f639, %f645;
|
|
cvt.rmi.f32.f32 %f647, %f646;
|
|
sub.f32 %f648, %f646, %f647;
|
|
mul.f32 %f649, %f638, %f641;
|
|
cvt.rmi.f32.f32 %f650, %f649;
|
|
sub.f32 %f651, %f649, %f650;
|
|
fma.rn.f32 %f652, %f644, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f653, %f648, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f654, %f651, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f655, %f384, %f652, %f389;
|
|
fma.rn.f32 %f656, %f384, %f653, %f390;
|
|
fma.rn.f32 %f657, %f384, %f654, %f391;
|
|
sub.f32 %f658, %f655, %f7;
|
|
sub.f32 %f659, %f656, %f8;
|
|
sub.f32 %f660, %f657, %f9;
|
|
mul.f32 %f661, %f659, %f659;
|
|
fma.rn.f32 %f662, %f658, %f658, %f661;
|
|
fma.rn.f32 %f663, %f660, %f660, %f662;
|
|
sqrt.rn.f32 %f619, %f663;
|
|
rcp.rn.f32 %f664, %f619;
|
|
mul.f32 %f615, %f664, %f658;
|
|
mul.f32 %f616, %f664, %f659;
|
|
mul.f32 %f617, %f664, %f660;
|
|
ld.global.u32 %r86, [imageEnabled];
|
|
and.b32 %r87, %r86, 32;
|
|
setp.eq.s32 %p48, %r87, 0;
|
|
selp.f32 %f665, 0f3F800000, 0f41200000, %p48;
|
|
mul.f32 %f618, %f665, %f153;
|
|
mov.u32 %r88, 1065353216;
|
|
st.local.u32 [%rd2], %r88;
|
|
ld.global.u32 %r83, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r83, %f10, %f11, %f12, %f615, %f616, %f617, %r45, %f618, %f619, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f666, [%rd2];
|
|
add.f32 %f1541, %f1540, %f666;
|
|
add.s32 %r266, %r265, 1;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f675, %r266;
|
|
add.f32 %f676, %f13, %f675;
|
|
sub.f32 %f677, %f14, %f675;
|
|
mul.f32 %f678, %f676, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f679, %f678;
|
|
sub.f32 %f680, %f678, %f679;
|
|
mul.f32 %f681, %f677, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f682, %f681;
|
|
sub.f32 %f683, %f681, %f682;
|
|
mul.f32 %f684, %f675, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f685, %f684;
|
|
sub.f32 %f686, %f684, %f685;
|
|
add.f32 %f687, %f683, 0f420551EC;
|
|
add.f32 %f688, %f680, 0f420551EC;
|
|
add.f32 %f689, %f686, 0f420551EC;
|
|
mul.f32 %f690, %f680, %f687;
|
|
fma.rn.f32 %f691, %f683, %f688, %f690;
|
|
fma.rn.f32 %f692, %f686, %f689, %f691;
|
|
add.f32 %f693, %f680, %f692;
|
|
add.f32 %f694, %f683, %f692;
|
|
add.f32 %f695, %f686, %f692;
|
|
add.f32 %f696, %f693, %f694;
|
|
mul.f32 %f697, %f695, %f696;
|
|
cvt.rmi.f32.f32 %f698, %f697;
|
|
sub.f32 %f699, %f697, %f698;
|
|
add.f32 %f700, %f693, %f693;
|
|
mul.f32 %f701, %f694, %f700;
|
|
cvt.rmi.f32.f32 %f702, %f701;
|
|
sub.f32 %f703, %f701, %f702;
|
|
mul.f32 %f704, %f693, %f696;
|
|
cvt.rmi.f32.f32 %f705, %f704;
|
|
sub.f32 %f706, %f704, %f705;
|
|
fma.rn.f32 %f707, %f699, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f708, %f703, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f709, %f706, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f710, %f384, %f707, %f389;
|
|
fma.rn.f32 %f711, %f384, %f708, %f390;
|
|
fma.rn.f32 %f712, %f384, %f709, %f391;
|
|
sub.f32 %f713, %f710, %f7;
|
|
sub.f32 %f714, %f711, %f8;
|
|
sub.f32 %f715, %f712, %f9;
|
|
mul.f32 %f716, %f714, %f714;
|
|
fma.rn.f32 %f717, %f713, %f713, %f716;
|
|
fma.rn.f32 %f718, %f715, %f715, %f717;
|
|
sqrt.rn.f32 %f674, %f718;
|
|
rcp.rn.f32 %f719, %f674;
|
|
mul.f32 %f670, %f719, %f713;
|
|
mul.f32 %f671, %f719, %f714;
|
|
mul.f32 %f672, %f719, %f715;
|
|
ld.global.u32 %r92, [imageEnabled];
|
|
and.b32 %r93, %r92, 32;
|
|
setp.eq.s32 %p49, %r93, 0;
|
|
selp.f32 %f720, 0f3F800000, 0f41200000, %p49;
|
|
mul.f32 %f673, %f720, %f153;
|
|
mov.u32 %r94, 1065353216;
|
|
st.local.u32 [%rd2], %r94;
|
|
ld.global.u32 %r89, [root];
|
|
mov.u32 %r90, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r89, %f10, %f11, %f12, %f670, %f671, %f672, %r90, %f673, %f674, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f721, [%rd2];
|
|
add.f32 %f1544, %f1541, %f721;
|
|
add.s32 %r268, %r266, 1;
|
|
|
|
BB0_40:
|
|
setp.lt.u32 %p50, %r8, 4;
|
|
@%p50 bra BB0_42;
|
|
|
|
BB0_41:
|
|
cvt.rn.f32.s32 %f754, %r268;
|
|
add.f32 %f755, %f13, %f754;
|
|
sub.f32 %f756, %f14, %f754;
|
|
mul.f32 %f757, %f755, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f758, %f757;
|
|
sub.f32 %f759, %f757, %f758;
|
|
mul.f32 %f760, %f756, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f761, %f760;
|
|
sub.f32 %f762, %f760, %f761;
|
|
mul.f32 %f763, %f754, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f764, %f763;
|
|
sub.f32 %f765, %f763, %f764;
|
|
add.f32 %f766, %f762, 0f420551EC;
|
|
add.f32 %f767, %f759, 0f420551EC;
|
|
add.f32 %f768, %f765, 0f420551EC;
|
|
mul.f32 %f769, %f759, %f766;
|
|
fma.rn.f32 %f770, %f762, %f767, %f769;
|
|
fma.rn.f32 %f771, %f765, %f768, %f770;
|
|
add.f32 %f772, %f759, %f771;
|
|
add.f32 %f773, %f762, %f771;
|
|
add.f32 %f774, %f765, %f771;
|
|
add.f32 %f775, %f772, %f773;
|
|
mul.f32 %f776, %f774, %f775;
|
|
cvt.rmi.f32.f32 %f777, %f776;
|
|
sub.f32 %f778, %f776, %f777;
|
|
add.f32 %f779, %f772, %f772;
|
|
mul.f32 %f780, %f773, %f779;
|
|
cvt.rmi.f32.f32 %f781, %f780;
|
|
sub.f32 %f782, %f780, %f781;
|
|
mul.f32 %f783, %f772, %f775;
|
|
cvt.rmi.f32.f32 %f784, %f783;
|
|
sub.f32 %f785, %f783, %f784;
|
|
fma.rn.f32 %f786, %f778, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f787, %f782, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f788, %f785, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f789, %f384, %f786, %f389;
|
|
fma.rn.f32 %f790, %f384, %f787, %f390;
|
|
fma.rn.f32 %f791, %f384, %f788, %f391;
|
|
sub.f32 %f792, %f789, %f7;
|
|
sub.f32 %f793, %f790, %f8;
|
|
sub.f32 %f794, %f791, %f9;
|
|
mul.f32 %f795, %f793, %f793;
|
|
fma.rn.f32 %f796, %f792, %f792, %f795;
|
|
fma.rn.f32 %f797, %f794, %f794, %f796;
|
|
sqrt.rn.f32 %f729, %f797;
|
|
rcp.rn.f32 %f798, %f729;
|
|
mul.f32 %f725, %f798, %f792;
|
|
mul.f32 %f726, %f798, %f793;
|
|
mul.f32 %f727, %f798, %f794;
|
|
ld.global.u32 %r107, [imageEnabled];
|
|
and.b32 %r108, %r107, 32;
|
|
setp.eq.s32 %p51, %r108, 0;
|
|
selp.f32 %f799, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f728, %f799, %f153;
|
|
mov.u32 %r109, 1065353216;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r95, [root];
|
|
mov.u32 %r105, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r95, %f10, %f11, %f12, %f725, %f726, %f727, %r105, %f728, %f729, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f800, [%rd2];
|
|
add.f32 %f801, %f1544, %f800;
|
|
add.s32 %r110, %r268, 1;
|
|
cvt.rn.f32.s32 %f802, %r110;
|
|
add.f32 %f803, %f13, %f802;
|
|
sub.f32 %f804, %f14, %f802;
|
|
mul.f32 %f805, %f803, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f806, %f805;
|
|
sub.f32 %f807, %f805, %f806;
|
|
mul.f32 %f808, %f804, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f809, %f808;
|
|
sub.f32 %f810, %f808, %f809;
|
|
mul.f32 %f811, %f802, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f812, %f811;
|
|
sub.f32 %f813, %f811, %f812;
|
|
add.f32 %f814, %f810, 0f420551EC;
|
|
add.f32 %f815, %f807, 0f420551EC;
|
|
add.f32 %f816, %f813, 0f420551EC;
|
|
mul.f32 %f817, %f807, %f814;
|
|
fma.rn.f32 %f818, %f810, %f815, %f817;
|
|
fma.rn.f32 %f819, %f813, %f816, %f818;
|
|
add.f32 %f820, %f807, %f819;
|
|
add.f32 %f821, %f810, %f819;
|
|
add.f32 %f822, %f813, %f819;
|
|
add.f32 %f823, %f820, %f821;
|
|
mul.f32 %f824, %f822, %f823;
|
|
cvt.rmi.f32.f32 %f825, %f824;
|
|
sub.f32 %f826, %f824, %f825;
|
|
add.f32 %f827, %f820, %f820;
|
|
mul.f32 %f828, %f821, %f827;
|
|
cvt.rmi.f32.f32 %f829, %f828;
|
|
sub.f32 %f830, %f828, %f829;
|
|
mul.f32 %f831, %f820, %f823;
|
|
cvt.rmi.f32.f32 %f832, %f831;
|
|
sub.f32 %f833, %f831, %f832;
|
|
fma.rn.f32 %f834, %f826, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f835, %f830, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f836, %f833, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f837, %f384, %f834, %f389;
|
|
fma.rn.f32 %f838, %f384, %f835, %f390;
|
|
fma.rn.f32 %f839, %f384, %f836, %f391;
|
|
sub.f32 %f840, %f837, %f7;
|
|
sub.f32 %f841, %f838, %f8;
|
|
sub.f32 %f842, %f839, %f9;
|
|
mul.f32 %f843, %f841, %f841;
|
|
fma.rn.f32 %f844, %f840, %f840, %f843;
|
|
fma.rn.f32 %f845, %f842, %f842, %f844;
|
|
sqrt.rn.f32 %f737, %f845;
|
|
rcp.rn.f32 %f846, %f737;
|
|
mul.f32 %f733, %f846, %f840;
|
|
mul.f32 %f734, %f846, %f841;
|
|
mul.f32 %f735, %f846, %f842;
|
|
ld.global.u32 %r111, [imageEnabled];
|
|
and.b32 %r112, %r111, 32;
|
|
setp.eq.s32 %p52, %r112, 0;
|
|
selp.f32 %f847, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f736, %f847, %f153;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r98, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r98, %f10, %f11, %f12, %f733, %f734, %f735, %r105, %f736, %f737, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f848, [%rd2];
|
|
add.f32 %f849, %f801, %f848;
|
|
add.s32 %r113, %r268, 2;
|
|
cvt.rn.f32.s32 %f850, %r113;
|
|
add.f32 %f851, %f13, %f850;
|
|
sub.f32 %f852, %f14, %f850;
|
|
mul.f32 %f853, %f851, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f854, %f853;
|
|
sub.f32 %f855, %f853, %f854;
|
|
mul.f32 %f856, %f852, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f857, %f856;
|
|
sub.f32 %f858, %f856, %f857;
|
|
mul.f32 %f859, %f850, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f860, %f859;
|
|
sub.f32 %f861, %f859, %f860;
|
|
add.f32 %f862, %f858, 0f420551EC;
|
|
add.f32 %f863, %f855, 0f420551EC;
|
|
add.f32 %f864, %f861, 0f420551EC;
|
|
mul.f32 %f865, %f855, %f862;
|
|
fma.rn.f32 %f866, %f858, %f863, %f865;
|
|
fma.rn.f32 %f867, %f861, %f864, %f866;
|
|
add.f32 %f868, %f855, %f867;
|
|
add.f32 %f869, %f858, %f867;
|
|
add.f32 %f870, %f861, %f867;
|
|
add.f32 %f871, %f868, %f869;
|
|
mul.f32 %f872, %f870, %f871;
|
|
cvt.rmi.f32.f32 %f873, %f872;
|
|
sub.f32 %f874, %f872, %f873;
|
|
add.f32 %f875, %f868, %f868;
|
|
mul.f32 %f876, %f869, %f875;
|
|
cvt.rmi.f32.f32 %f877, %f876;
|
|
sub.f32 %f878, %f876, %f877;
|
|
mul.f32 %f879, %f868, %f871;
|
|
cvt.rmi.f32.f32 %f880, %f879;
|
|
sub.f32 %f881, %f879, %f880;
|
|
fma.rn.f32 %f882, %f874, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f883, %f878, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f884, %f881, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f885, %f384, %f882, %f389;
|
|
fma.rn.f32 %f886, %f384, %f883, %f390;
|
|
fma.rn.f32 %f887, %f384, %f884, %f391;
|
|
sub.f32 %f888, %f885, %f7;
|
|
sub.f32 %f889, %f886, %f8;
|
|
sub.f32 %f890, %f887, %f9;
|
|
mul.f32 %f891, %f889, %f889;
|
|
fma.rn.f32 %f892, %f888, %f888, %f891;
|
|
fma.rn.f32 %f893, %f890, %f890, %f892;
|
|
sqrt.rn.f32 %f745, %f893;
|
|
rcp.rn.f32 %f894, %f745;
|
|
mul.f32 %f741, %f894, %f888;
|
|
mul.f32 %f742, %f894, %f889;
|
|
mul.f32 %f743, %f894, %f890;
|
|
ld.global.u32 %r114, [imageEnabled];
|
|
and.b32 %r115, %r114, 32;
|
|
setp.eq.s32 %p53, %r115, 0;
|
|
selp.f32 %f895, 0f3F800000, 0f41200000, %p53;
|
|
mul.f32 %f744, %f895, %f153;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r101, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r101, %f10, %f11, %f12, %f741, %f742, %f743, %r105, %f744, %f745, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f896, [%rd2];
|
|
add.f32 %f897, %f849, %f896;
|
|
add.s32 %r116, %r268, 3;
|
|
cvt.rn.f32.s32 %f898, %r116;
|
|
add.f32 %f899, %f13, %f898;
|
|
sub.f32 %f900, %f14, %f898;
|
|
mul.f32 %f901, %f899, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f902, %f901;
|
|
sub.f32 %f903, %f901, %f902;
|
|
mul.f32 %f904, %f900, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f905, %f904;
|
|
sub.f32 %f906, %f904, %f905;
|
|
mul.f32 %f907, %f898, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f908, %f907;
|
|
sub.f32 %f909, %f907, %f908;
|
|
add.f32 %f910, %f906, 0f420551EC;
|
|
add.f32 %f911, %f903, 0f420551EC;
|
|
add.f32 %f912, %f909, 0f420551EC;
|
|
mul.f32 %f913, %f903, %f910;
|
|
fma.rn.f32 %f914, %f906, %f911, %f913;
|
|
fma.rn.f32 %f915, %f909, %f912, %f914;
|
|
add.f32 %f916, %f903, %f915;
|
|
add.f32 %f917, %f906, %f915;
|
|
add.f32 %f918, %f909, %f915;
|
|
add.f32 %f919, %f916, %f917;
|
|
mul.f32 %f920, %f918, %f919;
|
|
cvt.rmi.f32.f32 %f921, %f920;
|
|
sub.f32 %f922, %f920, %f921;
|
|
add.f32 %f923, %f916, %f916;
|
|
mul.f32 %f924, %f917, %f923;
|
|
cvt.rmi.f32.f32 %f925, %f924;
|
|
sub.f32 %f926, %f924, %f925;
|
|
mul.f32 %f927, %f916, %f919;
|
|
cvt.rmi.f32.f32 %f928, %f927;
|
|
sub.f32 %f929, %f927, %f928;
|
|
fma.rn.f32 %f930, %f922, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f931, %f926, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f932, %f929, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f933, %f384, %f930, %f389;
|
|
fma.rn.f32 %f934, %f384, %f931, %f390;
|
|
fma.rn.f32 %f935, %f384, %f932, %f391;
|
|
sub.f32 %f936, %f933, %f7;
|
|
sub.f32 %f937, %f934, %f8;
|
|
sub.f32 %f938, %f935, %f9;
|
|
mul.f32 %f939, %f937, %f937;
|
|
fma.rn.f32 %f940, %f936, %f936, %f939;
|
|
fma.rn.f32 %f941, %f938, %f938, %f940;
|
|
sqrt.rn.f32 %f753, %f941;
|
|
rcp.rn.f32 %f942, %f753;
|
|
mul.f32 %f749, %f942, %f936;
|
|
mul.f32 %f750, %f942, %f937;
|
|
mul.f32 %f751, %f942, %f938;
|
|
ld.global.u32 %r117, [imageEnabled];
|
|
and.b32 %r118, %r117, 32;
|
|
setp.eq.s32 %p54, %r118, 0;
|
|
selp.f32 %f943, 0f3F800000, 0f41200000, %p54;
|
|
mul.f32 %f752, %f943, %f153;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r104, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r104, %f10, %f11, %f12, %f749, %f750, %f751, %r105, %f752, %f753, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f944, [%rd2];
|
|
add.f32 %f1544, %f897, %f944;
|
|
add.s32 %r268, %r268, 4;
|
|
setp.lt.s32 %p55, %r268, %r8;
|
|
@%p55 bra BB0_41;
|
|
|
|
BB0_42:
|
|
cvt.rn.f32.s32 %f945, %r8;
|
|
div.rn.f32 %f1545, %f1544, %f945;
|
|
shr.u32 %r119, %r6, 31;
|
|
cvt.u16.u32 %rs161, %r119;
|
|
|
|
BB0_43:
|
|
fma.rn.f32 %f1513, %f1525, %f1545, %f1513;
|
|
fma.rn.f32 %f1512, %f1526, %f1545, %f1512;
|
|
fma.rn.f32 %f1511, %f1527, %f1545, %f1511;
|
|
fma.rn.f32 %f1510, %f140, %f1545, %f1510;
|
|
fma.rn.f32 %f1509, %f1529, %f1545, %f1509;
|
|
fma.rn.f32 %f1508, %f1530, %f1545, %f1508;
|
|
fma.rn.f32 %f1507, %f143, %f1545, %f1507;
|
|
fma.rn.f32 %f1506, %f1532, %f1545, %f1506;
|
|
fma.rn.f32 %f1505, %f1533, %f1545, %f1505;
|
|
fma.rn.f32 %f1504, %f146, %f1545, %f1504;
|
|
fma.rn.f32 %f1503, %f1535, %f1545, %f1503;
|
|
fma.rn.f32 %f1502, %f1536, %f1545, %f1502;
|
|
fma.rn.f32 %f1501, %f149, %f1545, %f1501;
|
|
fma.rn.f32 %f1500, %f1538, %f1545, %f1500;
|
|
fma.rn.f32 %f1499, %f1539, %f1545, %f1499;
|
|
setp.eq.s16 %p56, %rs161, 0;
|
|
@%p56 bra BB0_58;
|
|
|
|
mov.f32 %f1491, 0fB5BFBE8E;
|
|
mov.f32 %f1490, 0fBF317200;
|
|
mov.f32 %f1489, 0f35BFBE8E;
|
|
mov.f32 %f1488, 0f3F317200;
|
|
mov.f32 %f1487, 0f3DAAAABD;
|
|
mov.f32 %f1486, 0f3C4CAF63;
|
|
mov.f32 %f1485, 0f3B18F0FE;
|
|
mul.f32 %f948, %f143, 0f3F000000;
|
|
mul.f32 %f949, %f146, 0f3F000000;
|
|
mul.f32 %f950, %f949, %f949;
|
|
fma.rn.f32 %f951, %f948, %f948, %f950;
|
|
mul.f32 %f952, %f149, 0f3F000000;
|
|
fma.rn.f32 %f953, %f952, %f952, %f951;
|
|
sqrt.rn.f32 %f954, %f953;
|
|
rcp.rn.f32 %f955, %f954;
|
|
mul.f32 %f956, %f948, %f955;
|
|
mul.f32 %f957, %f949, %f955;
|
|
mul.f32 %f958, %f952, %f955;
|
|
mul.f32 %f959, %f1496, %f957;
|
|
fma.rn.f32 %f960, %f1495, %f956, %f959;
|
|
fma.rn.f32 %f961, %f1497, %f958, %f960;
|
|
fma.rn.f32 %f180, %f961, 0f3F000000, 0f3F000000;
|
|
add.f32 %f962, %f954, %f954;
|
|
div.rn.f32 %f963, %f962, %f140;
|
|
add.f32 %f181, %f963, 0f3F800000;
|
|
div.rn.f32 %f964, %f954, %f140;
|
|
mov.f32 %f965, 0f3F800000;
|
|
sub.f32 %f966, %f965, %f964;
|
|
add.f32 %f967, %f964, 0f3F800000;
|
|
div.rn.f32 %f182, %f966, %f967;
|
|
sub.f32 %f968, %f965, %f182;
|
|
add.f32 %f969, %f181, 0f3F800000;
|
|
mul.f32 %f183, %f969, %f968;
|
|
mul.f32 %f970, %f181, 0f3F000000;
|
|
cvt.rzi.f32.f32 %f971, %f970;
|
|
add.f32 %f972, %f971, %f971;
|
|
sub.f32 %f973, %f181, %f972;
|
|
abs.f32 %f184, %f973;
|
|
abs.f32 %f185, %f180;
|
|
setp.lt.f32 %p57, %f185, 0f00800000;
|
|
mul.f32 %f974, %f185, 0f4B800000;
|
|
selp.f32 %f975, 0fC3170000, 0fC2FE0000, %p57;
|
|
selp.f32 %f976, %f974, %f185, %p57;
|
|
mov.b32 %r120, %f976;
|
|
and.b32 %r121, %r120, 8388607;
|
|
or.b32 %r122, %r121, 1065353216;
|
|
mov.b32 %f977, %r122;
|
|
shr.u32 %r123, %r120, 23;
|
|
cvt.rn.f32.u32 %f978, %r123;
|
|
add.f32 %f979, %f975, %f978;
|
|
setp.gt.f32 %p58, %f977, 0f3FB504F3;
|
|
mul.f32 %f980, %f977, 0f3F000000;
|
|
add.f32 %f981, %f979, 0f3F800000;
|
|
selp.f32 %f982, %f980, %f977, %p58;
|
|
selp.f32 %f983, %f981, %f979, %p58;
|
|
add.f32 %f984, %f982, 0fBF800000;
|
|
add.f32 %f947, %f982, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f946,%f947;
|
|
// inline asm
|
|
add.f32 %f985, %f984, %f984;
|
|
mul.f32 %f986, %f946, %f985;
|
|
mul.f32 %f987, %f986, %f986;
|
|
fma.rn.f32 %f990, %f1485, %f987, %f1486;
|
|
fma.rn.f32 %f992, %f990, %f987, %f1487;
|
|
mul.rn.f32 %f993, %f992, %f987;
|
|
mul.rn.f32 %f994, %f993, %f986;
|
|
sub.f32 %f995, %f984, %f986;
|
|
neg.f32 %f996, %f986;
|
|
add.f32 %f997, %f995, %f995;
|
|
fma.rn.f32 %f998, %f996, %f984, %f997;
|
|
mul.rn.f32 %f999, %f946, %f998;
|
|
add.f32 %f1000, %f994, %f986;
|
|
sub.f32 %f1001, %f986, %f1000;
|
|
add.f32 %f1002, %f994, %f1001;
|
|
add.f32 %f1003, %f999, %f1002;
|
|
add.f32 %f1004, %f1000, %f1003;
|
|
sub.f32 %f1005, %f1000, %f1004;
|
|
add.f32 %f1006, %f1003, %f1005;
|
|
mul.rn.f32 %f1008, %f983, %f1488;
|
|
mul.rn.f32 %f1010, %f983, %f1489;
|
|
add.f32 %f1011, %f1008, %f1004;
|
|
sub.f32 %f1012, %f1008, %f1011;
|
|
add.f32 %f1013, %f1004, %f1012;
|
|
add.f32 %f1014, %f1006, %f1013;
|
|
add.f32 %f1015, %f1010, %f1014;
|
|
add.f32 %f1016, %f1011, %f1015;
|
|
sub.f32 %f1017, %f1011, %f1016;
|
|
add.f32 %f1018, %f1015, %f1017;
|
|
abs.f32 %f186, %f181;
|
|
setp.gt.f32 %p59, %f186, 0f77F684DF;
|
|
mul.f32 %f1019, %f181, 0f39000000;
|
|
selp.f32 %f1020, %f1019, %f181, %p59;
|
|
mul.rn.f32 %f1021, %f1020, %f1016;
|
|
neg.f32 %f1022, %f1021;
|
|
fma.rn.f32 %f1023, %f1020, %f1016, %f1022;
|
|
fma.rn.f32 %f1024, %f1020, %f1018, %f1023;
|
|
mov.f32 %f1025, 0f00000000;
|
|
fma.rn.f32 %f1026, %f1025, %f1016, %f1024;
|
|
add.rn.f32 %f1027, %f1021, %f1026;
|
|
neg.f32 %f1028, %f1027;
|
|
add.rn.f32 %f1029, %f1021, %f1028;
|
|
add.rn.f32 %f1030, %f1029, %f1026;
|
|
mov.b32 %r124, %f1027;
|
|
setp.eq.s32 %p60, %r124, 1118925336;
|
|
add.s32 %r125, %r124, -1;
|
|
mov.b32 %f1031, %r125;
|
|
add.f32 %f1032, %f1030, 0f37000000;
|
|
selp.f32 %f1033, %f1031, %f1027, %p60;
|
|
selp.f32 %f187, %f1032, %f1030, %p60;
|
|
mul.f32 %f1034, %f1033, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1035, %f1034;
|
|
fma.rn.f32 %f1037, %f1035, %f1490, %f1033;
|
|
fma.rn.f32 %f1039, %f1035, %f1491, %f1037;
|
|
mul.f32 %f1040, %f1039, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1041, %f1040;
|
|
add.f32 %f1042, %f1035, 0f00000000;
|
|
ex2.approx.f32 %f1043, %f1042;
|
|
mul.f32 %f1044, %f1041, %f1043;
|
|
setp.lt.f32 %p61, %f1033, 0fC2D20000;
|
|
selp.f32 %f1045, 0f00000000, %f1044, %p61;
|
|
setp.gt.f32 %p62, %f1033, 0f42D20000;
|
|
selp.f32 %f1546, 0f7F800000, %f1045, %p62;
|
|
setp.eq.f32 %p63, %f1546, 0f7F800000;
|
|
@%p63 bra BB0_46;
|
|
|
|
fma.rn.f32 %f1546, %f1546, %f187, %f1546;
|
|
|
|
BB0_46:
|
|
setp.lt.f32 %p64, %f180, 0f00000000;
|
|
setp.eq.f32 %p65, %f184, 0f3F800000;
|
|
and.pred %p4, %p64, %p65;
|
|
mov.b32 %r126, %f1546;
|
|
xor.b32 %r127, %r126, -2147483648;
|
|
mov.b32 %f1046, %r127;
|
|
selp.f32 %f1548, %f1046, %f1546, %p4;
|
|
setp.eq.f32 %p66, %f180, 0f00000000;
|
|
@%p66 bra BB0_49;
|
|
bra.uni BB0_47;
|
|
|
|
BB0_49:
|
|
add.f32 %f1048, %f180, %f180;
|
|
mov.b32 %r128, %f1048;
|
|
selp.b32 %r129, %r128, 0, %p65;
|
|
or.b32 %r130, %r129, 2139095040;
|
|
setp.lt.f32 %p70, %f181, 0f00000000;
|
|
selp.b32 %r131, %r130, %r129, %p70;
|
|
mov.b32 %f1548, %r131;
|
|
bra.uni BB0_50;
|
|
|
|
BB0_47:
|
|
setp.geu.f32 %p67, %f180, 0f00000000;
|
|
@%p67 bra BB0_50;
|
|
|
|
cvt.rzi.f32.f32 %f1047, %f181;
|
|
setp.neu.f32 %p68, %f1047, %f181;
|
|
selp.f32 %f1548, 0f7FFFFFFF, %f1548, %p68;
|
|
|
|
BB0_50:
|
|
add.f32 %f1049, %f185, %f186;
|
|
mov.b32 %r132, %f1049;
|
|
setp.lt.s32 %p71, %r132, 2139095040;
|
|
@%p71 bra BB0_57;
|
|
|
|
setp.gtu.f32 %p72, %f185, 0f7F800000;
|
|
setp.gtu.f32 %p73, %f186, 0f7F800000;
|
|
or.pred %p74, %p72, %p73;
|
|
@%p74 bra BB0_56;
|
|
bra.uni BB0_52;
|
|
|
|
BB0_56:
|
|
add.f32 %f1548, %f181, %f180;
|
|
bra.uni BB0_57;
|
|
|
|
BB0_52:
|
|
setp.eq.f32 %p75, %f186, 0f7F800000;
|
|
@%p75 bra BB0_55;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_55:
|
|
setp.gt.f32 %p78, %f185, 0f3F800000;
|
|
selp.b32 %r136, 2139095040, 0, %p78;
|
|
xor.b32 %r137, %r136, 2139095040;
|
|
setp.lt.f32 %p79, %f181, 0f00000000;
|
|
selp.b32 %r138, %r137, %r136, %p79;
|
|
mov.b32 %f1050, %r138;
|
|
setp.eq.f32 %p80, %f180, 0fBF800000;
|
|
selp.f32 %f1548, 0f3F800000, %f1050, %p80;
|
|
bra.uni BB0_57;
|
|
|
|
BB0_53:
|
|
setp.neu.f32 %p76, %f185, 0f7F800000;
|
|
@%p76 bra BB0_57;
|
|
|
|
setp.ltu.f32 %p77, %f181, 0f00000000;
|
|
selp.b32 %r133, 0, 2139095040, %p77;
|
|
or.b32 %r134, %r133, -2147483648;
|
|
selp.b32 %r135, %r134, %r133, %p4;
|
|
mov.b32 %f1548, %r135;
|
|
|
|
BB0_57:
|
|
setp.eq.f32 %p81, %f181, 0f00000000;
|
|
setp.eq.f32 %p82, %f180, 0f3F800000;
|
|
or.pred %p83, %p82, %p81;
|
|
selp.f32 %f1051, 0f3F800000, %f1548, %p83;
|
|
fma.rn.f32 %f1052, %f183, %f1051, %f182;
|
|
mul.f32 %f1053, %f140, %f1052;
|
|
div.rn.f32 %f1054, %f1053, %f380;
|
|
div.rn.f32 %f1055, %f1054, %f100;
|
|
cvt.sat.f32.f32 %f1056, %f1055;
|
|
mul.f32 %f1545, %f1545, %f1056;
|
|
|
|
BB0_58:
|
|
add.f32 %f1498, %f1498, %f1545;
|
|
|
|
BB0_59:
|
|
add.s32 %r264, %r264, 1;
|
|
setp.lt.u32 %p84, %r264, %r4;
|
|
@%p84 bra BB0_5;
|
|
|
|
BB0_60:
|
|
ld.global.u32 %r270, [imageEnabled];
|
|
and.b32 %r139, %r270, 8;
|
|
setp.eq.s32 %p85, %r139, 0;
|
|
@%p85 bra BB0_73;
|
|
|
|
cvt.sat.f32.f32 %f234, %f1498;
|
|
cvt.u64.u32 %rd46, %r3;
|
|
cvt.u64.u32 %rd45, %r2;
|
|
mov.u64 %rd49, image_Mask;
|
|
cvta.global.u64 %rd44, %rd49;
|
|
// inline asm
|
|
call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1059, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1060, %f1059;
|
|
fma.rn.f32 %f1061, %f1060, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f235, %f1061;
|
|
abs.f32 %f236, %f234;
|
|
setp.lt.f32 %p86, %f236, 0f00800000;
|
|
mul.f32 %f1062, %f236, 0f4B800000;
|
|
selp.f32 %f1063, 0fC3170000, 0fC2FE0000, %p86;
|
|
selp.f32 %f1064, %f1062, %f236, %p86;
|
|
mov.b32 %r142, %f1064;
|
|
and.b32 %r143, %r142, 8388607;
|
|
or.b32 %r144, %r143, 1065353216;
|
|
mov.b32 %f1065, %r144;
|
|
shr.u32 %r145, %r142, 23;
|
|
cvt.rn.f32.u32 %f1066, %r145;
|
|
add.f32 %f1067, %f1063, %f1066;
|
|
setp.gt.f32 %p87, %f1065, 0f3FB504F3;
|
|
mul.f32 %f1068, %f1065, 0f3F000000;
|
|
add.f32 %f1069, %f1067, 0f3F800000;
|
|
selp.f32 %f1070, %f1068, %f1065, %p87;
|
|
selp.f32 %f1071, %f1069, %f1067, %p87;
|
|
add.f32 %f1072, %f1070, 0fBF800000;
|
|
add.f32 %f1058, %f1070, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1057,%f1058;
|
|
// inline asm
|
|
add.f32 %f1073, %f1072, %f1072;
|
|
mul.f32 %f1074, %f1057, %f1073;
|
|
mul.f32 %f1075, %f1074, %f1074;
|
|
mov.f32 %f1076, 0f3C4CAF63;
|
|
mov.f32 %f1077, 0f3B18F0FE;
|
|
fma.rn.f32 %f1078, %f1077, %f1075, %f1076;
|
|
mov.f32 %f1079, 0f3DAAAABD;
|
|
fma.rn.f32 %f1080, %f1078, %f1075, %f1079;
|
|
mul.rn.f32 %f1081, %f1080, %f1075;
|
|
mul.rn.f32 %f1082, %f1081, %f1074;
|
|
sub.f32 %f1083, %f1072, %f1074;
|
|
neg.f32 %f1084, %f1074;
|
|
add.f32 %f1085, %f1083, %f1083;
|
|
fma.rn.f32 %f1086, %f1084, %f1072, %f1085;
|
|
mul.rn.f32 %f1087, %f1057, %f1086;
|
|
add.f32 %f1088, %f1082, %f1074;
|
|
sub.f32 %f1089, %f1074, %f1088;
|
|
add.f32 %f1090, %f1082, %f1089;
|
|
add.f32 %f1091, %f1087, %f1090;
|
|
add.f32 %f1092, %f1088, %f1091;
|
|
sub.f32 %f1093, %f1088, %f1092;
|
|
add.f32 %f1094, %f1091, %f1093;
|
|
mov.f32 %f1095, 0f3F317200;
|
|
mul.rn.f32 %f1096, %f1071, %f1095;
|
|
mov.f32 %f1097, 0f35BFBE8E;
|
|
mul.rn.f32 %f1098, %f1071, %f1097;
|
|
add.f32 %f1099, %f1096, %f1092;
|
|
sub.f32 %f1100, %f1096, %f1099;
|
|
add.f32 %f1101, %f1092, %f1100;
|
|
add.f32 %f1102, %f1094, %f1101;
|
|
add.f32 %f1103, %f1098, %f1102;
|
|
add.f32 %f1104, %f1099, %f1103;
|
|
sub.f32 %f1105, %f1099, %f1104;
|
|
add.f32 %f1106, %f1103, %f1105;
|
|
mov.f32 %f1107, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1108, %f1107, %f1104;
|
|
neg.f32 %f1109, %f1108;
|
|
fma.rn.f32 %f1110, %f1107, %f1104, %f1109;
|
|
fma.rn.f32 %f1111, %f1107, %f1106, %f1110;
|
|
mov.f32 %f1112, 0f00000000;
|
|
fma.rn.f32 %f1113, %f1112, %f1104, %f1111;
|
|
add.rn.f32 %f1114, %f1108, %f1113;
|
|
neg.f32 %f1115, %f1114;
|
|
add.rn.f32 %f1116, %f1108, %f1115;
|
|
add.rn.f32 %f1117, %f1116, %f1113;
|
|
mov.b32 %r146, %f1114;
|
|
setp.eq.s32 %p88, %r146, 1118925336;
|
|
add.s32 %r147, %r146, -1;
|
|
mov.b32 %f1118, %r147;
|
|
add.f32 %f1119, %f1117, 0f37000000;
|
|
selp.f32 %f1120, %f1118, %f1114, %p88;
|
|
selp.f32 %f237, %f1119, %f1117, %p88;
|
|
mul.f32 %f1121, %f1120, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1122, %f1121;
|
|
mov.f32 %f1123, 0fBF317200;
|
|
fma.rn.f32 %f1124, %f1122, %f1123, %f1120;
|
|
mov.f32 %f1125, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1126, %f1122, %f1125, %f1124;
|
|
mul.f32 %f1127, %f1126, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1128, %f1127;
|
|
add.f32 %f1129, %f1122, 0f00000000;
|
|
ex2.approx.f32 %f1130, %f1129;
|
|
mul.f32 %f1131, %f1128, %f1130;
|
|
setp.lt.f32 %p89, %f1120, 0fC2D20000;
|
|
selp.f32 %f1132, 0f00000000, %f1131, %p89;
|
|
setp.gt.f32 %p90, %f1120, 0f42D20000;
|
|
selp.f32 %f1582, 0f7F800000, %f1132, %p90;
|
|
setp.eq.f32 %p91, %f1582, 0f7F800000;
|
|
@%p91 bra BB0_63;
|
|
|
|
fma.rn.f32 %f1582, %f1582, %f237, %f1582;
|
|
|
|
BB0_63:
|
|
setp.lt.f32 %p92, %f234, 0f00000000;
|
|
setp.eq.f32 %p93, %f235, 0f3F800000;
|
|
and.pred %p5, %p92, %p93;
|
|
mov.b32 %r148, %f1582;
|
|
xor.b32 %r149, %r148, -2147483648;
|
|
mov.b32 %f1133, %r149;
|
|
selp.f32 %f1584, %f1133, %f1582, %p5;
|
|
setp.eq.f32 %p94, %f234, 0f00000000;
|
|
@%p94 bra BB0_66;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_66:
|
|
add.f32 %f1136, %f234, %f234;
|
|
selp.f32 %f1584, %f1136, 0f00000000, %p93;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_131:
|
|
mov.u64 %rd190, image_HDR;
|
|
cvta.global.u64 %rd185, %rd190;
|
|
mov.u32 %r235, 8;
|
|
// inline asm
|
|
call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r235, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1456, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs107, %f1456;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs108, 0;
|
|
st.v4.u16 [%rd184], {%rs107, %rs107, %rs107, %rs108};
|
|
|
|
BB0_132:
|
|
ld.global.u32 %r236, [additive];
|
|
setp.eq.s32 %p161, %r236, 0;
|
|
@%p161 bra BB0_134;
|
|
|
|
mov.u64 %rd203, image_RNM0;
|
|
cvta.global.u64 %rd192, %rd203;
|
|
mov.u32 %r240, 8;
|
|
// inline asm
|
|
call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r240, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs115, %rs116, %rs117, %rs118}, [%rd191];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1457, %rs115;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1458, %rs116;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1459, %rs117;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r240, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1460, %f1457, 0f00000000;
|
|
add.f32 %f1461, %f1458, 0f00000000;
|
|
add.f32 %f1462, %f1459, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs114, %f1462;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs113, %f1461;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1460;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs119, 0;
|
|
st.v4.u16 [%rd197], {%rs112, %rs113, %rs114, %rs119};
|
|
bra.uni BB0_135;
|
|
|
|
BB0_134:
|
|
mov.u64 %rd210, image_RNM0;
|
|
cvta.global.u64 %rd205, %rd210;
|
|
mov.u32 %r242, 8;
|
|
// inline asm
|
|
call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r242, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1463, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs120, %f1463;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs121, 0;
|
|
st.v4.u16 [%rd204], {%rs120, %rs120, %rs120, %rs121};
|
|
|
|
BB0_135:
|
|
ld.global.u32 %r243, [additive];
|
|
setp.eq.s32 %p162, %r243, 0;
|
|
@%p162 bra BB0_137;
|
|
|
|
mov.u64 %rd223, image_RNM1;
|
|
cvta.global.u64 %rd212, %rd223;
|
|
mov.u32 %r247, 8;
|
|
// inline asm
|
|
call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r247, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs128, %rs129, %rs130, %rs131}, [%rd211];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1464, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1465, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1466, %rs130;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r247, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1467, %f1464, 0f00000000;
|
|
add.f32 %f1468, %f1465, 0f00000000;
|
|
add.f32 %f1469, %f1466, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1469;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1468;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1467;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs132, 0;
|
|
st.v4.u16 [%rd217], {%rs125, %rs126, %rs127, %rs132};
|
|
bra.uni BB0_138;
|
|
|
|
BB0_137:
|
|
mov.u64 %rd230, image_RNM1;
|
|
cvta.global.u64 %rd225, %rd230;
|
|
mov.u32 %r249, 8;
|
|
// inline asm
|
|
call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r249, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1470, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f1470;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs134, 0;
|
|
st.v4.u16 [%rd224], {%rs133, %rs133, %rs133, %rs134};
|
|
|
|
BB0_138:
|
|
ld.global.u32 %r250, [additive];
|
|
setp.eq.s32 %p163, %r250, 0;
|
|
@%p163 bra BB0_140;
|
|
|
|
mov.u64 %rd243, image_RNM2;
|
|
cvta.global.u64 %rd232, %rd243;
|
|
mov.u32 %r254, 8;
|
|
// inline asm
|
|
call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r254, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs141, %rs142, %rs143, %rs144}, [%rd231];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1471, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1472, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1473, %rs143;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r254, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1474, %f1471, 0f00000000;
|
|
add.f32 %f1475, %f1472, 0f00000000;
|
|
add.f32 %f1476, %f1473, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f1476;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1475;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1474;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs145, 0;
|
|
st.v4.u16 [%rd237], {%rs138, %rs139, %rs140, %rs145};
|
|
bra.uni BB0_141;
|
|
|
|
BB0_140:
|
|
mov.u64 %rd250, image_RNM2;
|
|
cvta.global.u64 %rd245, %rd250;
|
|
mov.u32 %r256, 8;
|
|
// inline asm
|
|
call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r256, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1477, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1477;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs147, 0;
|
|
st.v4.u16 [%rd244], {%rs146, %rs146, %rs146, %rs147};
|
|
|
|
BB0_141:
|
|
ld.global.u32 %r257, [additive];
|
|
setp.eq.s32 %p164, %r257, 0;
|
|
@%p164 bra BB0_143;
|
|
|
|
mov.u64 %rd263, image_RNM3;
|
|
cvta.global.u64 %rd252, %rd263;
|
|
mov.u32 %r261, 8;
|
|
// inline asm
|
|
call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r261, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs154, %rs155, %rs156, %rs157}, [%rd251];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1478, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1479, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1480, %rs156;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r261, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1481, %f1478, 0f00000000;
|
|
add.f32 %f1482, %f1479, 0f00000000;
|
|
add.f32 %f1483, %f1480, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f1483;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1482;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1481;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs158, 0;
|
|
st.v4.u16 [%rd257], {%rs151, %rs152, %rs153, %rs158};
|
|
bra.uni BB0_144;
|
|
|
|
BB0_143:
|
|
mov.u64 %rd270, image_RNM3;
|
|
cvta.global.u64 %rd265, %rd270;
|
|
mov.u32 %r263, 8;
|
|
// inline asm
|
|
call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r263, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1484, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1484;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs160, 0;
|
|
st.v4.u16 [%rd264], {%rs159, %rs159, %rs159, %rs160};
|
|
bra.uni BB0_144;
|
|
|
|
BB0_64:
|
|
setp.geu.f32 %p95, %f234, 0f00000000;
|
|
@%p95 bra BB0_67;
|
|
|
|
cvt.rzi.f32.f32 %f1135, %f1107;
|
|
setp.neu.f32 %p96, %f1135, 0f3EE8BA2E;
|
|
selp.f32 %f1584, 0f7FFFFFFF, %f1584, %p96;
|
|
|
|
BB0_67:
|
|
add.f32 %f1137, %f236, 0f3EE8BA2E;
|
|
mov.b32 %r150, %f1137;
|
|
setp.lt.s32 %p98, %r150, 2139095040;
|
|
@%p98 bra BB0_72;
|
|
|
|
setp.gtu.f32 %p99, %f236, 0f7F800000;
|
|
@%p99 bra BB0_71;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_71:
|
|
add.f32 %f1584, %f234, 0f3EE8BA2E;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_69:
|
|
setp.neu.f32 %p100, %f236, 0f7F800000;
|
|
@%p100 bra BB0_72;
|
|
|
|
selp.f32 %f1584, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_72:
|
|
mul.f32 %f1138, %f1584, 0f437F0000;
|
|
setp.eq.f32 %p101, %f234, 0f3F800000;
|
|
selp.f32 %f1139, 0f437F0000, %f1138, %p101;
|
|
cvt.rzi.u32.f32 %r151, %f1139;
|
|
cvt.u16.u32 %rs17, %r151;
|
|
mov.u16 %rs18, 255;
|
|
st.v2.u8 [%rd43], {%rs17, %rs18};
|
|
ld.global.u32 %r270, [imageEnabled];
|
|
|
|
BB0_73:
|
|
and.b32 %r152, %r270, 1;
|
|
setp.eq.b32 %p102, %r152, 1;
|
|
@!%p102 bra BB0_108;
|
|
bra.uni BB0_74;
|
|
|
|
BB0_74:
|
|
mov.f32 %f1142, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1143, %f1142;
|
|
fma.rn.f32 %f1144, %f1143, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f248, %f1144;
|
|
abs.f32 %f249, %f1513;
|
|
setp.lt.f32 %p103, %f249, 0f00800000;
|
|
mul.f32 %f1145, %f249, 0f4B800000;
|
|
selp.f32 %f1146, 0fC3170000, 0fC2FE0000, %p103;
|
|
selp.f32 %f1147, %f1145, %f249, %p103;
|
|
mov.b32 %r153, %f1147;
|
|
and.b32 %r154, %r153, 8388607;
|
|
or.b32 %r155, %r154, 1065353216;
|
|
mov.b32 %f1148, %r155;
|
|
shr.u32 %r156, %r153, 23;
|
|
cvt.rn.f32.u32 %f1149, %r156;
|
|
add.f32 %f1150, %f1146, %f1149;
|
|
setp.gt.f32 %p104, %f1148, 0f3FB504F3;
|
|
mul.f32 %f1151, %f1148, 0f3F000000;
|
|
add.f32 %f1152, %f1150, 0f3F800000;
|
|
selp.f32 %f1153, %f1151, %f1148, %p104;
|
|
selp.f32 %f1154, %f1152, %f1150, %p104;
|
|
add.f32 %f1155, %f1153, 0fBF800000;
|
|
add.f32 %f1141, %f1153, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1140,%f1141;
|
|
// inline asm
|
|
add.f32 %f1156, %f1155, %f1155;
|
|
mul.f32 %f1157, %f1140, %f1156;
|
|
mul.f32 %f1158, %f1157, %f1157;
|
|
mov.f32 %f1159, 0f3C4CAF63;
|
|
mov.f32 %f1160, 0f3B18F0FE;
|
|
fma.rn.f32 %f1161, %f1160, %f1158, %f1159;
|
|
mov.f32 %f1162, 0f3DAAAABD;
|
|
fma.rn.f32 %f1163, %f1161, %f1158, %f1162;
|
|
mul.rn.f32 %f1164, %f1163, %f1158;
|
|
mul.rn.f32 %f1165, %f1164, %f1157;
|
|
sub.f32 %f1166, %f1155, %f1157;
|
|
neg.f32 %f1167, %f1157;
|
|
add.f32 %f1168, %f1166, %f1166;
|
|
fma.rn.f32 %f1169, %f1167, %f1155, %f1168;
|
|
mul.rn.f32 %f1170, %f1140, %f1169;
|
|
add.f32 %f1171, %f1165, %f1157;
|
|
sub.f32 %f1172, %f1157, %f1171;
|
|
add.f32 %f1173, %f1165, %f1172;
|
|
add.f32 %f1174, %f1170, %f1173;
|
|
add.f32 %f1175, %f1171, %f1174;
|
|
sub.f32 %f1176, %f1171, %f1175;
|
|
add.f32 %f1177, %f1174, %f1176;
|
|
mov.f32 %f1178, 0f3F317200;
|
|
mul.rn.f32 %f1179, %f1154, %f1178;
|
|
mov.f32 %f1180, 0f35BFBE8E;
|
|
mul.rn.f32 %f1181, %f1154, %f1180;
|
|
add.f32 %f1182, %f1179, %f1175;
|
|
sub.f32 %f1183, %f1179, %f1182;
|
|
add.f32 %f1184, %f1175, %f1183;
|
|
add.f32 %f1185, %f1177, %f1184;
|
|
add.f32 %f1186, %f1181, %f1185;
|
|
add.f32 %f1187, %f1182, %f1186;
|
|
sub.f32 %f1188, %f1182, %f1187;
|
|
add.f32 %f1189, %f1186, %f1188;
|
|
mov.f32 %f1190, 0f3EE66666;
|
|
mul.rn.f32 %f1191, %f1190, %f1187;
|
|
neg.f32 %f1192, %f1191;
|
|
fma.rn.f32 %f1193, %f1190, %f1187, %f1192;
|
|
fma.rn.f32 %f1194, %f1190, %f1189, %f1193;
|
|
mov.f32 %f1195, 0f00000000;
|
|
fma.rn.f32 %f1196, %f1195, %f1187, %f1194;
|
|
add.rn.f32 %f1197, %f1191, %f1196;
|
|
neg.f32 %f1198, %f1197;
|
|
add.rn.f32 %f1199, %f1191, %f1198;
|
|
add.rn.f32 %f1200, %f1199, %f1196;
|
|
mov.b32 %r157, %f1197;
|
|
setp.eq.s32 %p105, %r157, 1118925336;
|
|
add.s32 %r158, %r157, -1;
|
|
mov.b32 %f1201, %r158;
|
|
add.f32 %f1202, %f1200, 0f37000000;
|
|
selp.f32 %f1203, %f1201, %f1197, %p105;
|
|
selp.f32 %f250, %f1202, %f1200, %p105;
|
|
mul.f32 %f1204, %f1203, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1205, %f1204;
|
|
mov.f32 %f1206, 0fBF317200;
|
|
fma.rn.f32 %f1207, %f1205, %f1206, %f1203;
|
|
mov.f32 %f1208, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1209, %f1205, %f1208, %f1207;
|
|
mul.f32 %f1210, %f1209, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1211, %f1210;
|
|
add.f32 %f1212, %f1205, 0f00000000;
|
|
ex2.approx.f32 %f1213, %f1212;
|
|
mul.f32 %f1214, %f1211, %f1213;
|
|
setp.lt.f32 %p106, %f1203, 0fC2D20000;
|
|
selp.f32 %f1215, 0f00000000, %f1214, %p106;
|
|
setp.gt.f32 %p107, %f1203, 0f42D20000;
|
|
selp.f32 %f1585, 0f7F800000, %f1215, %p107;
|
|
setp.eq.f32 %p108, %f1585, 0f7F800000;
|
|
@%p108 bra BB0_76;
|
|
|
|
fma.rn.f32 %f1585, %f1585, %f250, %f1585;
|
|
|
|
BB0_76:
|
|
setp.lt.f32 %p109, %f1513, 0f00000000;
|
|
setp.eq.f32 %p110, %f248, 0f3F800000;
|
|
and.pred %p6, %p109, %p110;
|
|
mov.b32 %r159, %f1585;
|
|
xor.b32 %r160, %r159, -2147483648;
|
|
mov.b32 %f1216, %r160;
|
|
selp.f32 %f1587, %f1216, %f1585, %p6;
|
|
setp.eq.f32 %p111, %f1513, 0f00000000;
|
|
@%p111 bra BB0_79;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_79:
|
|
add.f32 %f1219, %f1513, %f1513;
|
|
selp.f32 %f1587, %f1219, 0f00000000, %p110;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_77:
|
|
setp.geu.f32 %p112, %f1513, 0f00000000;
|
|
@%p112 bra BB0_80;
|
|
|
|
cvt.rzi.f32.f32 %f1218, %f1190;
|
|
setp.neu.f32 %p113, %f1218, 0f3EE66666;
|
|
selp.f32 %f1587, 0f7FFFFFFF, %f1587, %p113;
|
|
|
|
BB0_80:
|
|
add.f32 %f1220, %f249, 0f3EE66666;
|
|
mov.b32 %r161, %f1220;
|
|
setp.lt.s32 %p115, %r161, 2139095040;
|
|
@%p115 bra BB0_85;
|
|
|
|
setp.gtu.f32 %p116, %f249, 0f7F800000;
|
|
@%p116 bra BB0_84;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_84:
|
|
add.f32 %f1587, %f1513, 0f3EE66666;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_82:
|
|
setp.neu.f32 %p117, %f249, 0f7F800000;
|
|
@%p117 bra BB0_85;
|
|
|
|
selp.f32 %f1587, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_85:
|
|
setp.eq.f32 %p118, %f1513, 0f3F800000;
|
|
selp.f32 %f261, 0f3F800000, %f1587, %p118;
|
|
abs.f32 %f262, %f1512;
|
|
setp.lt.f32 %p119, %f262, 0f00800000;
|
|
mul.f32 %f1223, %f262, 0f4B800000;
|
|
selp.f32 %f1224, 0fC3170000, 0fC2FE0000, %p119;
|
|
selp.f32 %f1225, %f1223, %f262, %p119;
|
|
mov.b32 %r162, %f1225;
|
|
and.b32 %r163, %r162, 8388607;
|
|
or.b32 %r164, %r163, 1065353216;
|
|
mov.b32 %f1226, %r164;
|
|
shr.u32 %r165, %r162, 23;
|
|
cvt.rn.f32.u32 %f1227, %r165;
|
|
add.f32 %f1228, %f1224, %f1227;
|
|
setp.gt.f32 %p120, %f1226, 0f3FB504F3;
|
|
mul.f32 %f1229, %f1226, 0f3F000000;
|
|
add.f32 %f1230, %f1228, 0f3F800000;
|
|
selp.f32 %f1231, %f1229, %f1226, %p120;
|
|
selp.f32 %f1232, %f1230, %f1228, %p120;
|
|
add.f32 %f1233, %f1231, 0fBF800000;
|
|
add.f32 %f1222, %f1231, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1221,%f1222;
|
|
// inline asm
|
|
add.f32 %f1234, %f1233, %f1233;
|
|
mul.f32 %f1235, %f1221, %f1234;
|
|
mul.f32 %f1236, %f1235, %f1235;
|
|
fma.rn.f32 %f1239, %f1160, %f1236, %f1159;
|
|
fma.rn.f32 %f1241, %f1239, %f1236, %f1162;
|
|
mul.rn.f32 %f1242, %f1241, %f1236;
|
|
mul.rn.f32 %f1243, %f1242, %f1235;
|
|
sub.f32 %f1244, %f1233, %f1235;
|
|
neg.f32 %f1245, %f1235;
|
|
add.f32 %f1246, %f1244, %f1244;
|
|
fma.rn.f32 %f1247, %f1245, %f1233, %f1246;
|
|
mul.rn.f32 %f1248, %f1221, %f1247;
|
|
add.f32 %f1249, %f1243, %f1235;
|
|
sub.f32 %f1250, %f1235, %f1249;
|
|
add.f32 %f1251, %f1243, %f1250;
|
|
add.f32 %f1252, %f1248, %f1251;
|
|
add.f32 %f1253, %f1249, %f1252;
|
|
sub.f32 %f1254, %f1249, %f1253;
|
|
add.f32 %f1255, %f1252, %f1254;
|
|
mul.rn.f32 %f1257, %f1232, %f1178;
|
|
mul.rn.f32 %f1259, %f1232, %f1180;
|
|
add.f32 %f1260, %f1257, %f1253;
|
|
sub.f32 %f1261, %f1257, %f1260;
|
|
add.f32 %f1262, %f1253, %f1261;
|
|
add.f32 %f1263, %f1255, %f1262;
|
|
add.f32 %f1264, %f1259, %f1263;
|
|
add.f32 %f1265, %f1260, %f1264;
|
|
sub.f32 %f1266, %f1260, %f1265;
|
|
add.f32 %f1267, %f1264, %f1266;
|
|
mul.rn.f32 %f1269, %f1190, %f1265;
|
|
neg.f32 %f1270, %f1269;
|
|
fma.rn.f32 %f1271, %f1190, %f1265, %f1270;
|
|
fma.rn.f32 %f1272, %f1190, %f1267, %f1271;
|
|
fma.rn.f32 %f1274, %f1195, %f1265, %f1272;
|
|
add.rn.f32 %f1275, %f1269, %f1274;
|
|
neg.f32 %f1276, %f1275;
|
|
add.rn.f32 %f1277, %f1269, %f1276;
|
|
add.rn.f32 %f1278, %f1277, %f1274;
|
|
mov.b32 %r166, %f1275;
|
|
setp.eq.s32 %p121, %r166, 1118925336;
|
|
add.s32 %r167, %r166, -1;
|
|
mov.b32 %f1279, %r167;
|
|
add.f32 %f1280, %f1278, 0f37000000;
|
|
selp.f32 %f1281, %f1279, %f1275, %p121;
|
|
selp.f32 %f263, %f1280, %f1278, %p121;
|
|
mul.f32 %f1282, %f1281, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1283, %f1282;
|
|
fma.rn.f32 %f1285, %f1283, %f1206, %f1281;
|
|
fma.rn.f32 %f1287, %f1283, %f1208, %f1285;
|
|
mul.f32 %f1288, %f1287, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1289, %f1288;
|
|
add.f32 %f1290, %f1283, 0f00000000;
|
|
ex2.approx.f32 %f1291, %f1290;
|
|
mul.f32 %f1292, %f1289, %f1291;
|
|
setp.lt.f32 %p122, %f1281, 0fC2D20000;
|
|
selp.f32 %f1293, 0f00000000, %f1292, %p122;
|
|
setp.gt.f32 %p123, %f1281, 0f42D20000;
|
|
selp.f32 %f1588, 0f7F800000, %f1293, %p123;
|
|
setp.eq.f32 %p124, %f1588, 0f7F800000;
|
|
@%p124 bra BB0_87;
|
|
|
|
fma.rn.f32 %f1588, %f1588, %f263, %f1588;
|
|
|
|
BB0_87:
|
|
setp.lt.f32 %p125, %f1512, 0f00000000;
|
|
and.pred %p7, %p125, %p110;
|
|
mov.b32 %r168, %f1588;
|
|
xor.b32 %r169, %r168, -2147483648;
|
|
mov.b32 %f1294, %r169;
|
|
selp.f32 %f1590, %f1294, %f1588, %p7;
|
|
setp.eq.f32 %p127, %f1512, 0f00000000;
|
|
@%p127 bra BB0_90;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_90:
|
|
add.f32 %f1297, %f1512, %f1512;
|
|
selp.f32 %f1590, %f1297, 0f00000000, %p110;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_88:
|
|
setp.geu.f32 %p128, %f1512, 0f00000000;
|
|
@%p128 bra BB0_91;
|
|
|
|
cvt.rzi.f32.f32 %f1296, %f1190;
|
|
setp.neu.f32 %p129, %f1296, 0f3EE66666;
|
|
selp.f32 %f1590, 0f7FFFFFFF, %f1590, %p129;
|
|
|
|
BB0_91:
|
|
add.f32 %f1298, %f262, 0f3EE66666;
|
|
mov.b32 %r170, %f1298;
|
|
setp.lt.s32 %p131, %r170, 2139095040;
|
|
@%p131 bra BB0_96;
|
|
|
|
setp.gtu.f32 %p132, %f262, 0f7F800000;
|
|
@%p132 bra BB0_95;
|
|
bra.uni BB0_93;
|
|
|
|
BB0_95:
|
|
add.f32 %f1590, %f1512, 0f3EE66666;
|
|
bra.uni BB0_96;
|
|
|
|
BB0_93:
|
|
setp.neu.f32 %p133, %f262, 0f7F800000;
|
|
@%p133 bra BB0_96;
|
|
|
|
selp.f32 %f1590, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_96:
|
|
setp.eq.f32 %p134, %f1512, 0f3F800000;
|
|
selp.f32 %f274, 0f3F800000, %f1590, %p134;
|
|
abs.f32 %f275, %f1511;
|
|
setp.lt.f32 %p135, %f275, 0f00800000;
|
|
mul.f32 %f1301, %f275, 0f4B800000;
|
|
selp.f32 %f1302, 0fC3170000, 0fC2FE0000, %p135;
|
|
selp.f32 %f1303, %f1301, %f275, %p135;
|
|
mov.b32 %r171, %f1303;
|
|
and.b32 %r172, %r171, 8388607;
|
|
or.b32 %r173, %r172, 1065353216;
|
|
mov.b32 %f1304, %r173;
|
|
shr.u32 %r174, %r171, 23;
|
|
cvt.rn.f32.u32 %f1305, %r174;
|
|
add.f32 %f1306, %f1302, %f1305;
|
|
setp.gt.f32 %p136, %f1304, 0f3FB504F3;
|
|
mul.f32 %f1307, %f1304, 0f3F000000;
|
|
add.f32 %f1308, %f1306, 0f3F800000;
|
|
selp.f32 %f1309, %f1307, %f1304, %p136;
|
|
selp.f32 %f1310, %f1308, %f1306, %p136;
|
|
add.f32 %f1311, %f1309, 0fBF800000;
|
|
add.f32 %f1300, %f1309, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1299,%f1300;
|
|
// inline asm
|
|
add.f32 %f1312, %f1311, %f1311;
|
|
mul.f32 %f1313, %f1299, %f1312;
|
|
mul.f32 %f1314, %f1313, %f1313;
|
|
fma.rn.f32 %f1317, %f1160, %f1314, %f1159;
|
|
fma.rn.f32 %f1319, %f1317, %f1314, %f1162;
|
|
mul.rn.f32 %f1320, %f1319, %f1314;
|
|
mul.rn.f32 %f1321, %f1320, %f1313;
|
|
sub.f32 %f1322, %f1311, %f1313;
|
|
neg.f32 %f1323, %f1313;
|
|
add.f32 %f1324, %f1322, %f1322;
|
|
fma.rn.f32 %f1325, %f1323, %f1311, %f1324;
|
|
mul.rn.f32 %f1326, %f1299, %f1325;
|
|
add.f32 %f1327, %f1321, %f1313;
|
|
sub.f32 %f1328, %f1313, %f1327;
|
|
add.f32 %f1329, %f1321, %f1328;
|
|
add.f32 %f1330, %f1326, %f1329;
|
|
add.f32 %f1331, %f1327, %f1330;
|
|
sub.f32 %f1332, %f1327, %f1331;
|
|
add.f32 %f1333, %f1330, %f1332;
|
|
mul.rn.f32 %f1335, %f1310, %f1178;
|
|
mul.rn.f32 %f1337, %f1310, %f1180;
|
|
add.f32 %f1338, %f1335, %f1331;
|
|
sub.f32 %f1339, %f1335, %f1338;
|
|
add.f32 %f1340, %f1331, %f1339;
|
|
add.f32 %f1341, %f1333, %f1340;
|
|
add.f32 %f1342, %f1337, %f1341;
|
|
add.f32 %f1343, %f1338, %f1342;
|
|
sub.f32 %f1344, %f1338, %f1343;
|
|
add.f32 %f1345, %f1342, %f1344;
|
|
mul.rn.f32 %f1347, %f1190, %f1343;
|
|
neg.f32 %f1348, %f1347;
|
|
fma.rn.f32 %f1349, %f1190, %f1343, %f1348;
|
|
fma.rn.f32 %f1350, %f1190, %f1345, %f1349;
|
|
fma.rn.f32 %f1352, %f1195, %f1343, %f1350;
|
|
add.rn.f32 %f1353, %f1347, %f1352;
|
|
neg.f32 %f1354, %f1353;
|
|
add.rn.f32 %f1355, %f1347, %f1354;
|
|
add.rn.f32 %f1356, %f1355, %f1352;
|
|
mov.b32 %r175, %f1353;
|
|
setp.eq.s32 %p137, %r175, 1118925336;
|
|
add.s32 %r176, %r175, -1;
|
|
mov.b32 %f1357, %r176;
|
|
add.f32 %f1358, %f1356, 0f37000000;
|
|
selp.f32 %f1359, %f1357, %f1353, %p137;
|
|
selp.f32 %f276, %f1358, %f1356, %p137;
|
|
mul.f32 %f1360, %f1359, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1361, %f1360;
|
|
fma.rn.f32 %f1363, %f1361, %f1206, %f1359;
|
|
fma.rn.f32 %f1365, %f1361, %f1208, %f1363;
|
|
mul.f32 %f1366, %f1365, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1367, %f1366;
|
|
add.f32 %f1368, %f1361, 0f00000000;
|
|
ex2.approx.f32 %f1369, %f1368;
|
|
mul.f32 %f1370, %f1367, %f1369;
|
|
setp.lt.f32 %p138, %f1359, 0fC2D20000;
|
|
selp.f32 %f1371, 0f00000000, %f1370, %p138;
|
|
setp.gt.f32 %p139, %f1359, 0f42D20000;
|
|
selp.f32 %f1591, 0f7F800000, %f1371, %p139;
|
|
setp.eq.f32 %p140, %f1591, 0f7F800000;
|
|
@%p140 bra BB0_98;
|
|
|
|
fma.rn.f32 %f1591, %f1591, %f276, %f1591;
|
|
|
|
BB0_98:
|
|
setp.lt.f32 %p141, %f1511, 0f00000000;
|
|
and.pred %p8, %p141, %p110;
|
|
mov.b32 %r177, %f1591;
|
|
xor.b32 %r178, %r177, -2147483648;
|
|
mov.b32 %f1372, %r178;
|
|
selp.f32 %f1593, %f1372, %f1591, %p8;
|
|
setp.eq.f32 %p143, %f1511, 0f00000000;
|
|
@%p143 bra BB0_101;
|
|
bra.uni BB0_99;
|
|
|
|
BB0_101:
|
|
add.f32 %f1375, %f1511, %f1511;
|
|
selp.f32 %f1593, %f1375, 0f00000000, %p110;
|
|
bra.uni BB0_102;
|
|
|
|
BB0_99:
|
|
setp.geu.f32 %p144, %f1511, 0f00000000;
|
|
@%p144 bra BB0_102;
|
|
|
|
cvt.rzi.f32.f32 %f1374, %f1190;
|
|
setp.neu.f32 %p145, %f1374, 0f3EE66666;
|
|
selp.f32 %f1593, 0f7FFFFFFF, %f1593, %p145;
|
|
|
|
BB0_102:
|
|
add.f32 %f1376, %f275, 0f3EE66666;
|
|
mov.b32 %r179, %f1376;
|
|
setp.lt.s32 %p147, %r179, 2139095040;
|
|
@%p147 bra BB0_107;
|
|
|
|
setp.gtu.f32 %p148, %f275, 0f7F800000;
|
|
@%p148 bra BB0_106;
|
|
bra.uni BB0_104;
|
|
|
|
BB0_106:
|
|
add.f32 %f1593, %f1511, 0f3EE66666;
|
|
bra.uni BB0_107;
|
|
|
|
BB0_104:
|
|
setp.neu.f32 %p149, %f275, 0f7F800000;
|
|
@%p149 bra BB0_107;
|
|
|
|
selp.f32 %f1593, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
BB0_107:
|
|
setp.eq.f32 %p150, %f1511, 0f3F800000;
|
|
selp.f32 %f1377, 0f3F800000, %f1593, %p150;
|
|
cvt.u64.u32 %rd53, %r3;
|
|
cvt.u64.u32 %rd52, %r2;
|
|
mov.u64 %rd56, image;
|
|
cvta.global.u64 %rd51, %rd56;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1378, %f1377;
|
|
mul.f32 %f1379, %f1378, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r182, %f1379;
|
|
cvt.sat.f32.f32 %f1380, %f274;
|
|
mul.f32 %f1381, %f1380, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r183, %f1381;
|
|
cvt.sat.f32.f32 %f1382, %f261;
|
|
mul.f32 %f1383, %f1382, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r184, %f1383;
|
|
cvt.u16.u32 %rs19, %r182;
|
|
cvt.u16.u32 %rs20, %r184;
|
|
cvt.u16.u32 %rs21, %r183;
|
|
mov.u16 %rs22, 255;
|
|
st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22};
|
|
ld.global.u32 %r270, [imageEnabled];
|
|
|
|
BB0_108:
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
and.b32 %r185, %r270, 4;
|
|
setp.eq.s32 %p151, %r185, 0;
|
|
@%p151 bra BB0_112;
|
|
|
|
ld.global.u32 %r186, [additive];
|
|
setp.eq.s32 %p152, %r186, 0;
|
|
mov.f32 %f1384, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f1384;}
|
|
|
|
// inline asm
|
|
@%p152 bra BB0_111;
|
|
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd58, %rd69;
|
|
mov.u32 %r190, 8;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r190, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1385, %rs30;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1386, %rs31;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1387, %rs32;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r190, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1388, %f1513, %f1385;
|
|
add.f32 %f1389, %f1512, %f1386;
|
|
add.f32 %f1390, %f1511, %f1387;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1390;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1389;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1388;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23};
|
|
bra.uni BB0_112;
|
|
|
|
BB0_111:
|
|
mov.u64 %rd76, image_HDR;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
mov.u32 %r192, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r192, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1511;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1512;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f1513;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23};
|
|
|
|
BB0_112:
|
|
mov.f32 %f1395, 0f34000000;
|
|
max.f32 %f1396, %f1510, %f1395;
|
|
div.rn.f32 %f1397, %f1507, %f1396;
|
|
max.f32 %f1398, %f1509, %f1395;
|
|
div.rn.f32 %f1399, %f1506, %f1398;
|
|
max.f32 %f1400, %f1508, %f1395;
|
|
div.rn.f32 %f1401, %f1505, %f1400;
|
|
fma.rn.f32 %f287, %f1397, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f288, %f1399, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f289, %f1401, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1402, %f1504, %f1396;
|
|
div.rn.f32 %f1403, %f1503, %f1398;
|
|
div.rn.f32 %f1404, %f1502, %f1400;
|
|
fma.rn.f32 %f290, %f1402, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f291, %f1403, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f292, %f1404, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1405, %f1501, %f1396;
|
|
div.rn.f32 %f1406, %f1500, %f1398;
|
|
div.rn.f32 %f1407, %f1499, %f1400;
|
|
fma.rn.f32 %f293, %f1405, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f294, %f1406, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f295, %f1407, 0f3F000000, 0f3F000000;
|
|
ld.global.u32 %r193, [additive];
|
|
setp.eq.s32 %p153, %r193, 0;
|
|
mov.f32 %f1394, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f1394;}
|
|
|
|
// inline asm
|
|
@%p153 bra BB0_114;
|
|
|
|
mov.u64 %rd89, image_RNM0;
|
|
cvta.global.u64 %rd78, %rd89;
|
|
mov.u32 %r197, 8;
|
|
// inline asm
|
|
call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r197, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd77];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1408, %rs44;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1409, %rs45;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1410, %rs46;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r197, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1411, %f1510, %f1408;
|
|
add.f32 %f1412, %f1509, %f1409;
|
|
add.f32 %f1413, %f1508, %f1410;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1413;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1412;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f1411;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd83], {%rs41, %rs42, %rs43, %rs37};
|
|
bra.uni BB0_115;
|
|
|
|
BB0_114:
|
|
mov.u64 %rd96, image_RNM0;
|
|
cvta.global.u64 %rd91, %rd96;
|
|
mov.u32 %r199, 8;
|
|
// inline asm
|
|
call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r199, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f1508;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1509;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f1510;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd90], {%rs48, %rs49, %rs50, %rs37};
|
|
|
|
BB0_115:
|
|
ld.global.u32 %r200, [additive];
|
|
setp.eq.s32 %p154, %r200, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1394;}
|
|
|
|
// inline asm
|
|
@%p154 bra BB0_117;
|
|
|
|
mov.u64 %rd109, image_RNM1;
|
|
cvta.global.u64 %rd98, %rd109;
|
|
mov.u32 %r204, 8;
|
|
// inline asm
|
|
call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r204, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd97];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1418, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1419, %rs59;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1420, %rs60;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r204, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1421, %f287, %f1418;
|
|
add.f32 %f1422, %f288, %f1419;
|
|
add.f32 %f1423, %f289, %f1420;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1423;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1422;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1421;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd103], {%rs55, %rs56, %rs57, %rs51};
|
|
bra.uni BB0_118;
|
|
|
|
BB0_117:
|
|
mov.u64 %rd116, image_RNM1;
|
|
cvta.global.u64 %rd111, %rd116;
|
|
mov.u32 %r206, 8;
|
|
// inline asm
|
|
call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r206, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f289;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f288;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f287;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd110], {%rs62, %rs63, %rs64, %rs51};
|
|
|
|
BB0_118:
|
|
ld.global.u32 %r207, [additive];
|
|
setp.eq.s32 %p155, %r207, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1394;}
|
|
|
|
// inline asm
|
|
@%p155 bra BB0_120;
|
|
|
|
mov.u64 %rd129, image_RNM2;
|
|
cvta.global.u64 %rd118, %rd129;
|
|
mov.u32 %r211, 8;
|
|
// inline asm
|
|
call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r211, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd117];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1428, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1429, %rs73;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1430, %rs74;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r211, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1431, %f290, %f1428;
|
|
add.f32 %f1432, %f291, %f1429;
|
|
add.f32 %f1433, %f292, %f1430;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1433;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f1432;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1431;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd123], {%rs69, %rs70, %rs71, %rs65};
|
|
bra.uni BB0_121;
|
|
|
|
BB0_120:
|
|
mov.u64 %rd136, image_RNM2;
|
|
cvta.global.u64 %rd131, %rd136;
|
|
mov.u32 %r213, 8;
|
|
// inline asm
|
|
call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r213, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f292;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f291;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f290;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd130], {%rs76, %rs77, %rs78, %rs65};
|
|
|
|
BB0_121:
|
|
ld.global.u32 %r214, [additive];
|
|
setp.eq.s32 %p156, %r214, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1394;}
|
|
|
|
// inline asm
|
|
@%p156 bra BB0_123;
|
|
|
|
mov.u64 %rd149, image_RNM3;
|
|
cvta.global.u64 %rd138, %rd149;
|
|
mov.u32 %r218, 8;
|
|
// inline asm
|
|
call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r218, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd137];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1438, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1439, %rs87;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1440, %rs88;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r218, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1441, %f293, %f1438;
|
|
add.f32 %f1442, %f294, %f1439;
|
|
add.f32 %f1443, %f295, %f1440;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f1443;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f1442;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1441;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd143], {%rs83, %rs84, %rs85, %rs79};
|
|
bra.uni BB0_144;
|
|
|
|
BB0_123:
|
|
mov.u64 %rd156, image_RNM3;
|
|
cvta.global.u64 %rd151, %rd156;
|
|
mov.u32 %r220, 8;
|
|
// inline asm
|
|
call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r220, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f295;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f294;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f293;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd150], {%rs90, %rs91, %rs92, %rs79};
|
|
|
|
BB0_144:
|
|
ret;
|
|
}
|
|
|
|
|