3271 lines
91 KiB
Plaintext
3271 lines
91 KiB
Plaintext
//
|
|
// Generated by NVIDIA NVVM Compiler
|
|
//
|
|
// Compiler Build ID: CL-23083092
|
|
// Cuda compilation tools, release 9.1, V9.1.85
|
|
// Based on LLVM 3.4svn
|
|
//
|
|
|
|
.version 6.1
|
|
.target sm_30
|
|
.address_size 64
|
|
|
|
// .globl _Z6oxMainv
|
|
.global .align 8 .b8 pixelID[8];
|
|
.global .align 8 .b8 resolution[8];
|
|
.global .align 4 .b8 normal[12];
|
|
.global .align 4 .b8 camPos[12];
|
|
.global .align 4 .b8 root[4];
|
|
.global .align 4 .u32 imageEnabled;
|
|
.global .texref lightmap;
|
|
.global .align 16 .b8 tileInfo[16];
|
|
.global .align 4 .u32 additive;
|
|
.global .align 1 .b8 image[1];
|
|
.global .align 1 .b8 image_HDR[1];
|
|
.global .align 1 .b8 image_HDR2[1];
|
|
.global .align 1 .b8 image_Mask[1];
|
|
.global .align 1 .b8 image_RNM0[1];
|
|
.global .align 1 .b8 image_RNM1[1];
|
|
.global .align 1 .b8 image_RNM2[1];
|
|
.global .align 1 .b8 image_RNM3[1];
|
|
.global .align 1 .b8 image_RNM4[1];
|
|
.global .align 1 .b8 image_RNM5[1];
|
|
.global .align 1 .b8 image_RNM6[1];
|
|
.global .align 1 .b8 image_RNM7[1];
|
|
.global .align 1 .b8 image_RNM8[1];
|
|
.global .align 1 .b8 uvpos[1];
|
|
.global .align 1 .b8 uvnormal[1];
|
|
.global .align 4 .u32 ignoreNormal;
|
|
.global .align 1 .b8 localLights[1];
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
|
|
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
|
|
|
|
.visible .entry _Z6oxMainv(
|
|
|
|
)
|
|
{
|
|
.local .align 4 .b8 __local_depot0[12];
|
|
.reg .b64 %SP;
|
|
.reg .b64 %SPL;
|
|
.reg .pred %p<148>;
|
|
.reg .b16 %rs<302>;
|
|
.reg .f32 %f<1812>;
|
|
.reg .b32 %r<327>;
|
|
.reg .b64 %rd<474>;
|
|
|
|
|
|
mov.u64 %rd473, __local_depot0;
|
|
cvta.local.u64 %SP, %rd473;
|
|
ld.global.v2.u32 {%r29, %r30}, [pixelID];
|
|
cvt.u64.u32 %rd9, %r29;
|
|
cvt.u64.u32 %rd10, %r30;
|
|
mov.u64 %rd13, uvnormal;
|
|
cvta.global.u64 %rd8, %rd13;
|
|
mov.u32 %r27, 2;
|
|
mov.u32 %r28, 4;
|
|
mov.u64 %rd12, 0;
|
|
// inline asm
|
|
call (%rd7), _rt_buffer_get_64, (%rd8, %r27, %r28, %rd9, %rd10, %rd12, %rd12);
|
|
// inline asm
|
|
ld.u32 %r1, [%rd7];
|
|
shr.u32 %r33, %r1, 16;
|
|
cvt.u16.u32 %rs1, %r33;
|
|
and.b16 %rs14, %rs1, 255;
|
|
cvt.u16.u32 %rs15, %r1;
|
|
or.b16 %rs16, %rs15, %rs14;
|
|
setp.eq.s16 %p8, %rs16, 0;
|
|
mov.f32 %f1644, 0f00000000;
|
|
mov.f32 %f1645, %f1644;
|
|
mov.f32 %f1646, %f1644;
|
|
@%p8 bra BB0_2;
|
|
|
|
ld.u8 %rs17, [%rd7+1];
|
|
and.b16 %rs19, %rs15, 255;
|
|
cvt.rn.f32.u16 %f409, %rs19;
|
|
div.rn.f32 %f410, %f409, 0f437F0000;
|
|
fma.rn.f32 %f411, %f410, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f412, %rs17;
|
|
div.rn.f32 %f413, %f412, 0f437F0000;
|
|
fma.rn.f32 %f414, %f413, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f415, %rs14;
|
|
div.rn.f32 %f416, %f415, 0f437F0000;
|
|
fma.rn.f32 %f417, %f416, 0f40000000, 0fBF800000;
|
|
mul.f32 %f418, %f414, %f414;
|
|
fma.rn.f32 %f419, %f411, %f411, %f418;
|
|
fma.rn.f32 %f420, %f417, %f417, %f419;
|
|
sqrt.rn.f32 %f421, %f420;
|
|
rcp.rn.f32 %f422, %f421;
|
|
mul.f32 %f1644, %f411, %f422;
|
|
mul.f32 %f1645, %f414, %f422;
|
|
mul.f32 %f1646, %f417, %f422;
|
|
|
|
BB0_2:
|
|
ld.global.v2.u32 {%r34, %r35}, [pixelID];
|
|
ld.global.v2.u32 {%r37, %r38}, [tileInfo];
|
|
add.s32 %r2, %r34, %r37;
|
|
add.s32 %r3, %r35, %r38;
|
|
setp.eq.f32 %p9, %f1645, 0f00000000;
|
|
setp.eq.f32 %p10, %f1644, 0f00000000;
|
|
and.pred %p11, %p10, %p9;
|
|
setp.eq.f32 %p12, %f1646, 0f00000000;
|
|
and.pred %p13, %p11, %p12;
|
|
@%p13 bra BB0_126;
|
|
bra.uni BB0_3;
|
|
|
|
BB0_126:
|
|
ld.global.u32 %r326, [imageEnabled];
|
|
and.b32 %r239, %r326, 1;
|
|
setp.eq.b32 %p134, %r239, 1;
|
|
@!%p134 bra BB0_128;
|
|
bra.uni BB0_127;
|
|
|
|
BB0_127:
|
|
cvt.u64.u32 %rd261, %r2;
|
|
cvt.u64.u32 %rd262, %r3;
|
|
mov.u64 %rd265, image;
|
|
cvta.global.u64 %rd260, %rd265;
|
|
// inline asm
|
|
call (%rd259), _rt_buffer_get_64, (%rd260, %r27, %r28, %rd261, %rd262, %rd12, %rd12);
|
|
// inline asm
|
|
mov.u16 %rs168, 0;
|
|
st.v4.u8 [%rd259], {%rs168, %rs168, %rs168, %rs168};
|
|
ld.global.u32 %r326, [imageEnabled];
|
|
|
|
BB0_128:
|
|
and.b32 %r242, %r326, 8;
|
|
setp.eq.s32 %p135, %r242, 0;
|
|
@%p135 bra BB0_130;
|
|
|
|
cvt.u64.u32 %rd269, %r3;
|
|
cvt.u64.u32 %rd268, %r2;
|
|
mov.u64 %rd272, image_Mask;
|
|
cvta.global.u64 %rd267, %rd272;
|
|
// inline asm
|
|
call (%rd266), _rt_buffer_get_64, (%rd267, %r27, %r27, %rd268, %rd269, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1570, 0f00000000;
|
|
cvt.rzi.u32.f32 %r245, %f1570;
|
|
cvt.u16.u32 %rs169, %r245;
|
|
mov.u16 %rs170, 0;
|
|
st.v2.u8 [%rd266], {%rs169, %rs170};
|
|
ld.global.u32 %r326, [imageEnabled];
|
|
|
|
BB0_130:
|
|
cvt.u64.u32 %rd5, %r2;
|
|
cvt.u64.u32 %rd6, %r3;
|
|
and.b32 %r246, %r326, 4;
|
|
setp.eq.s32 %p136, %r246, 0;
|
|
@%p136 bra BB0_134;
|
|
|
|
ld.global.u32 %r247, [additive];
|
|
setp.eq.s32 %p137, %r247, 0;
|
|
@%p137 bra BB0_133;
|
|
|
|
mov.u64 %rd285, image_HDR;
|
|
cvta.global.u64 %rd274, %rd285;
|
|
mov.u32 %r251, 8;
|
|
// inline asm
|
|
call (%rd273), _rt_buffer_get_64, (%rd274, %r27, %r251, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs177, %rs178, %rs179, %rs180}, [%rd273];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1571, %rs177;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1572, %rs178;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1573, %rs179;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd279), _rt_buffer_get_64, (%rd274, %r27, %r251, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1574, %f1571, 0f00000000;
|
|
add.f32 %f1575, %f1572, 0f00000000;
|
|
add.f32 %f1576, %f1573, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs176, %f1576;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs175, %f1575;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs174, %f1574;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs181, 0;
|
|
st.v4.u16 [%rd279], {%rs174, %rs175, %rs176, %rs181};
|
|
bra.uni BB0_134;
|
|
|
|
BB0_3:
|
|
ld.global.v2.u32 {%r46, %r47}, [pixelID];
|
|
cvt.u64.u32 %rd16, %r46;
|
|
cvt.u64.u32 %rd17, %r47;
|
|
mov.u64 %rd25, uvpos;
|
|
cvta.global.u64 %rd15, %rd25;
|
|
mov.u32 %r43, 12;
|
|
// inline asm
|
|
call (%rd14), _rt_buffer_get_64, (%rd15, %r27, %r43, %rd16, %rd17, %rd12, %rd12);
|
|
// inline asm
|
|
ld.f32 %f9, [%rd14+8];
|
|
ld.f32 %f8, [%rd14+4];
|
|
ld.f32 %f7, [%rd14];
|
|
mul.f32 %f454, %f7, 0f3456BF95;
|
|
mul.f32 %f455, %f8, 0f3456BF95;
|
|
mul.f32 %f456, %f9, 0f3456BF95;
|
|
abs.f32 %f457, %f1644;
|
|
div.rn.f32 %f458, %f454, %f457;
|
|
abs.f32 %f459, %f1645;
|
|
div.rn.f32 %f460, %f455, %f459;
|
|
abs.f32 %f461, %f1646;
|
|
div.rn.f32 %f462, %f456, %f461;
|
|
abs.f32 %f463, %f458;
|
|
abs.f32 %f464, %f460;
|
|
abs.f32 %f465, %f462;
|
|
mov.f32 %f466, 0f38D1B717;
|
|
max.f32 %f467, %f463, %f466;
|
|
max.f32 %f468, %f464, %f466;
|
|
max.f32 %f469, %f465, %f466;
|
|
fma.rn.f32 %f10, %f1644, %f467, %f7;
|
|
fma.rn.f32 %f11, %f1645, %f468, %f8;
|
|
fma.rn.f32 %f12, %f1646, %f469, %f9;
|
|
ld.global.v2.u32 {%r50, %r51}, [pixelID];
|
|
cvt.rn.f32.u32 %f13, %r50;
|
|
cvt.rn.f32.u32 %f14, %r51;
|
|
mov.u64 %rd26, localLights;
|
|
cvta.global.u64 %rd24, %rd26;
|
|
mov.u32 %r44, 1;
|
|
mov.u32 %r45, 96;
|
|
// inline asm
|
|
call (%rd20, %rd21, %rd22, %rd23), _rt_buffer_get_size_64, (%rd24, %r44, %r45);
|
|
// inline asm
|
|
cvt.u32.u64 %r4, %rd20;
|
|
setp.eq.s32 %p14, %r4, 0;
|
|
mov.f32 %f1647, 0f00000000;
|
|
mov.f32 %f1648, %f1647;
|
|
mov.f32 %f1649, %f1647;
|
|
mov.f32 %f1650, %f1647;
|
|
mov.f32 %f1651, %f1647;
|
|
mov.f32 %f1652, %f1647;
|
|
mov.f32 %f1653, %f1647;
|
|
mov.f32 %f1654, %f1647;
|
|
mov.f32 %f1655, %f1647;
|
|
mov.f32 %f1656, %f1647;
|
|
mov.f32 %f1657, %f1647;
|
|
mov.f32 %f1658, %f1647;
|
|
mov.f32 %f1659, %f1647;
|
|
mov.f32 %f1660, %f1647;
|
|
mov.f32 %f1661, %f1647;
|
|
mov.f32 %f1662, %f1647;
|
|
mov.f32 %f1663, %f1647;
|
|
mov.f32 %f1664, %f1647;
|
|
mov.f32 %f1665, %f1647;
|
|
mov.f32 %f1666, %f1647;
|
|
mov.f32 %f1667, %f1647;
|
|
mov.f32 %f1668, %f1647;
|
|
mov.f32 %f1669, %f1647;
|
|
mov.f32 %f1670, %f1647;
|
|
mov.f32 %f1671, %f1647;
|
|
mov.f32 %f1672, %f1647;
|
|
mov.f32 %f1673, %f1647;
|
|
mov.f32 %f1674, %f1647;
|
|
mov.f32 %f1675, %f1647;
|
|
mov.f32 %f1676, %f1647;
|
|
mov.f32 %f1677, %f1647;
|
|
@%p14 bra BB0_47;
|
|
|
|
mov.f32 %f501, 0f40000000;
|
|
cvt.rzi.f32.f32 %f502, %f501;
|
|
add.f32 %f503, %f502, %f502;
|
|
mov.f32 %f504, 0f40800000;
|
|
sub.f32 %f505, %f504, %f503;
|
|
abs.f32 %f15, %f505;
|
|
mul.f32 %f16, %f10, 0f3456BF95;
|
|
mul.f32 %f17, %f11, 0f3456BF95;
|
|
mul.f32 %f18, %f12, 0f3456BF95;
|
|
mul.f32 %f19, %f13, 0f3DD32618;
|
|
mul.f32 %f20, %f14, 0f3DD2F1AA;
|
|
mov.f32 %f500, 0f00000000;
|
|
mov.u32 %r318, 0;
|
|
abs.f32 %f726, %f16;
|
|
abs.f32 %f727, %f17;
|
|
max.f32 %f728, %f726, %f727;
|
|
abs.f32 %f729, %f18;
|
|
max.f32 %f730, %f728, %f729;
|
|
mov.f32 %f1647, %f500;
|
|
mov.f32 %f1648, %f500;
|
|
mov.f32 %f1649, %f500;
|
|
mov.f32 %f1650, %f500;
|
|
mov.f32 %f1651, %f500;
|
|
mov.f32 %f1652, %f500;
|
|
mov.f32 %f1653, %f500;
|
|
mov.f32 %f1654, %f500;
|
|
mov.f32 %f1655, %f500;
|
|
mov.f32 %f1656, %f500;
|
|
mov.f32 %f1657, %f500;
|
|
mov.f32 %f1658, %f500;
|
|
mov.f32 %f1659, %f500;
|
|
mov.f32 %f1660, %f500;
|
|
mov.f32 %f1661, %f500;
|
|
mov.f32 %f1662, %f500;
|
|
mov.f32 %f1663, %f500;
|
|
mov.f32 %f1664, %f500;
|
|
mov.f32 %f1665, %f500;
|
|
mov.f32 %f1666, %f500;
|
|
mov.f32 %f1667, %f500;
|
|
mov.f32 %f1668, %f500;
|
|
mov.f32 %f1669, %f500;
|
|
mov.f32 %f1670, %f500;
|
|
mov.f32 %f1671, %f500;
|
|
mov.f32 %f1672, %f500;
|
|
mov.f32 %f1673, %f500;
|
|
mov.f32 %f1674, %f500;
|
|
mov.f32 %f1675, %f500;
|
|
mov.f32 %f1676, %f500;
|
|
mov.f32 %f1677, %f500;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd29, %r318;
|
|
// inline asm
|
|
call (%rd27), _rt_buffer_get_64, (%rd24, %r44, %r45, %rd29, %rd12, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.f32 {%f508, %f509, %f510, %f511}, [%rd27+80];
|
|
ld.v4.f32 {%f512, %f513, %f514, %f515}, [%rd27+64];
|
|
ld.v4.f32 {%f516, %f517, %f518, %f519}, [%rd27+48];
|
|
ld.v4.f32 {%f520, %f1686, %f1687, %f523}, [%rd27+32];
|
|
ld.v4.f32 {%f524, %f525, %f526, %f527}, [%rd27+16];
|
|
ld.v4.f32 {%f528, %f529, %f530, %f531}, [%rd27];
|
|
mov.b32 %r6, %f511;
|
|
sub.f32 %f76, %f529, %f7;
|
|
sub.f32 %f78, %f530, %f8;
|
|
sub.f32 %f80, %f531, %f9;
|
|
mul.f32 %f533, %f78, %f78;
|
|
fma.rn.f32 %f534, %f76, %f76, %f533;
|
|
fma.rn.f32 %f535, %f80, %f80, %f534;
|
|
sqrt.rn.f32 %f81, %f535;
|
|
rcp.rn.f32 %f536, %f81;
|
|
mul.f32 %f82, %f76, %f536;
|
|
mul.f32 %f83, %f78, %f536;
|
|
mul.f32 %f84, %f80, %f536;
|
|
mul.f32 %f85, %f81, %f527;
|
|
abs.f32 %f86, %f85;
|
|
setp.lt.f32 %p15, %f86, 0f00800000;
|
|
mul.f32 %f537, %f86, 0f4B800000;
|
|
selp.f32 %f538, 0fC3170000, 0fC2FE0000, %p15;
|
|
selp.f32 %f539, %f537, %f86, %p15;
|
|
mov.b32 %r57, %f539;
|
|
and.b32 %r58, %r57, 8388607;
|
|
or.b32 %r59, %r58, 1065353216;
|
|
mov.b32 %f540, %r59;
|
|
shr.u32 %r60, %r57, 23;
|
|
cvt.rn.f32.u32 %f541, %r60;
|
|
add.f32 %f542, %f538, %f541;
|
|
setp.gt.f32 %p16, %f540, 0f3FB504F3;
|
|
mul.f32 %f543, %f540, 0f3F000000;
|
|
add.f32 %f544, %f542, 0f3F800000;
|
|
selp.f32 %f545, %f543, %f540, %p16;
|
|
selp.f32 %f546, %f544, %f542, %p16;
|
|
add.f32 %f547, %f545, 0fBF800000;
|
|
add.f32 %f507, %f545, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f506,%f507;
|
|
// inline asm
|
|
add.f32 %f548, %f547, %f547;
|
|
mul.f32 %f549, %f506, %f548;
|
|
mul.f32 %f550, %f549, %f549;
|
|
mov.f32 %f551, 0f3C4CAF63;
|
|
mov.f32 %f552, 0f3B18F0FE;
|
|
fma.rn.f32 %f553, %f552, %f550, %f551;
|
|
mov.f32 %f554, 0f3DAAAABD;
|
|
fma.rn.f32 %f555, %f553, %f550, %f554;
|
|
mul.rn.f32 %f556, %f555, %f550;
|
|
mul.rn.f32 %f557, %f556, %f549;
|
|
sub.f32 %f558, %f547, %f549;
|
|
neg.f32 %f559, %f549;
|
|
add.f32 %f560, %f558, %f558;
|
|
fma.rn.f32 %f561, %f559, %f547, %f560;
|
|
mul.rn.f32 %f562, %f506, %f561;
|
|
add.f32 %f563, %f557, %f549;
|
|
sub.f32 %f564, %f549, %f563;
|
|
add.f32 %f565, %f557, %f564;
|
|
add.f32 %f566, %f562, %f565;
|
|
add.f32 %f567, %f563, %f566;
|
|
sub.f32 %f568, %f563, %f567;
|
|
add.f32 %f569, %f566, %f568;
|
|
mov.f32 %f570, 0f3F317200;
|
|
mul.rn.f32 %f571, %f546, %f570;
|
|
mov.f32 %f572, 0f35BFBE8E;
|
|
mul.rn.f32 %f573, %f546, %f572;
|
|
add.f32 %f574, %f571, %f567;
|
|
sub.f32 %f575, %f571, %f574;
|
|
add.f32 %f576, %f567, %f575;
|
|
add.f32 %f577, %f569, %f576;
|
|
add.f32 %f578, %f573, %f577;
|
|
add.f32 %f579, %f574, %f578;
|
|
sub.f32 %f580, %f574, %f579;
|
|
add.f32 %f581, %f578, %f580;
|
|
mul.rn.f32 %f87, %f504, %f579;
|
|
neg.f32 %f583, %f87;
|
|
fma.rn.f32 %f584, %f504, %f579, %f583;
|
|
fma.rn.f32 %f585, %f504, %f581, %f584;
|
|
fma.rn.f32 %f88, %f500, %f579, %f585;
|
|
add.rn.f32 %f89, %f87, %f88;
|
|
mov.b32 %r61, %f89;
|
|
setp.eq.s32 %p1, %r61, 1118925336;
|
|
add.s32 %r62, %r61, -1;
|
|
mov.b32 %f587, %r62;
|
|
selp.f32 %f588, %f587, %f89, %p1;
|
|
mul.f32 %f589, %f588, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f590, %f589;
|
|
mov.f32 %f591, 0fBF317200;
|
|
fma.rn.f32 %f592, %f590, %f591, %f588;
|
|
mov.f32 %f593, 0fB5BFBE8E;
|
|
fma.rn.f32 %f594, %f590, %f593, %f592;
|
|
mul.f32 %f595, %f594, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f596, %f595;
|
|
add.f32 %f597, %f590, 0f00000000;
|
|
ex2.approx.f32 %f598, %f597;
|
|
mul.f32 %f599, %f596, %f598;
|
|
setp.lt.f32 %p17, %f588, 0fC2D20000;
|
|
selp.f32 %f600, 0f00000000, %f599, %p17;
|
|
setp.gt.f32 %p18, %f588, 0f42D20000;
|
|
selp.f32 %f1678, 0f7F800000, %f600, %p18;
|
|
setp.eq.f32 %p19, %f1678, 0f7F800000;
|
|
@%p19 bra BB0_7;
|
|
|
|
neg.f32 %f601, %f89;
|
|
add.rn.f32 %f602, %f87, %f601;
|
|
add.rn.f32 %f603, %f602, %f88;
|
|
add.f32 %f604, %f603, 0f37000000;
|
|
selp.f32 %f605, %f604, %f603, %p1;
|
|
fma.rn.f32 %f1678, %f1678, %f605, %f1678;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p20, %f85, 0f00000000;
|
|
setp.eq.f32 %p21, %f15, 0f3F800000;
|
|
and.pred %p2, %p20, %p21;
|
|
mov.b32 %r63, %f1678;
|
|
xor.b32 %r64, %r63, -2147483648;
|
|
mov.b32 %f606, %r64;
|
|
selp.f32 %f1680, %f606, %f1678, %p2;
|
|
setp.eq.f32 %p22, %f85, 0f00000000;
|
|
@%p22 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f609, %f85, %f85;
|
|
selp.f32 %f1680, %f609, 0f00000000, %p21;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p23, %f85, 0f00000000;
|
|
@%p23 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f608, %f504;
|
|
setp.neu.f32 %p24, %f608, 0f40800000;
|
|
selp.f32 %f1680, 0f7FFFFFFF, %f1680, %p24;
|
|
|
|
BB0_11:
|
|
add.f32 %f610, %f86, 0f40800000;
|
|
mov.b32 %r65, %f610;
|
|
setp.lt.s32 %p26, %r65, 2139095040;
|
|
@%p26 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p27, %f86, 0f7F800000;
|
|
@%p27 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1680, %f85, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p28, %f86, 0f7F800000;
|
|
@%p28 bra BB0_16;
|
|
|
|
selp.f32 %f1680, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f611, %f81, %f525;
|
|
mov.f32 %f1734, 0f3F800000;
|
|
sub.f32 %f613, %f1734, %f1680;
|
|
setp.eq.f32 %p29, %f85, 0f3F800000;
|
|
selp.f32 %f614, 0f00000000, %f613, %p29;
|
|
cvt.sat.f32.f32 %f615, %f614;
|
|
fma.rn.f32 %f616, %f611, %f611, %f526;
|
|
div.rn.f32 %f115, %f615, %f616;
|
|
mul.f32 %f617, %f1645, %f83;
|
|
fma.rn.f32 %f618, %f1644, %f82, %f617;
|
|
fma.rn.f32 %f116, %f1646, %f84, %f618;
|
|
setp.eq.f32 %p30, %f528, 0f3F800000;
|
|
@%p30 bra BB0_23;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_23:
|
|
setp.leu.f32 %p34, %f523, 0f00000000;
|
|
@%p34 bra BB0_19;
|
|
|
|
setp.geu.f32 %p35, %f519, 0f00000000;
|
|
@%p35 bra BB0_25;
|
|
|
|
sub.f32 %f1643, %f531, %f9;
|
|
sub.f32 %f1642, %f529, %f7;
|
|
sub.f32 %f1641, %f530, %f8;
|
|
mul.f32 %f641, %f509, %f1641;
|
|
fma.rn.f32 %f642, %f508, %f1642, %f641;
|
|
fma.rn.f32 %f643, %f510, %f1643, %f642;
|
|
rcp.rn.f32 %f644, %f643;
|
|
mul.f32 %f1681, %f1642, %f644;
|
|
mul.f32 %f1682, %f1641, %f644;
|
|
mul.f32 %f1683, %f1643, %f644;
|
|
neg.f32 %f519, %f519;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p31, %f528, 0f40000000;
|
|
@%p31 bra BB0_21;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_21:
|
|
setp.leu.f32 %p33, %f523, 0f00000000;
|
|
@%p33 bra BB0_19;
|
|
|
|
mul.f32 %f635, %f517, %f83;
|
|
fma.rn.f32 %f636, %f516, %f82, %f635;
|
|
mul.f32 %f637, %f513, %f83;
|
|
fma.rn.f32 %f638, %f512, %f82, %f637;
|
|
mul.f32 %f639, %f509, %f83;
|
|
fma.rn.f32 %f640, %f508, %f82, %f639;
|
|
fma.rn.f32 %f632, %f518, %f84, %f636;
|
|
fma.rn.f32 %f633, %f514, %f84, %f638;
|
|
fma.rn.f32 %f634, %f510, %f84, %f640;
|
|
cvt.rzi.s32.f32 %r66, %f523;
|
|
mov.u32 %r67, 6;
|
|
mov.u32 %r68, 0;
|
|
// inline asm
|
|
call (%f628, %f629, %f630, %f631), _rt_texture_get_base_id, (%r66, %r67, %f632, %f633, %f634, %r68);
|
|
// inline asm
|
|
mul.f32 %f1685, %f520, %f628;
|
|
mul.f32 %f1686, %f1686, %f629;
|
|
mul.f32 %f1687, %f1687, %f630;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p32, %f528, 0f40800000;
|
|
@%p32 bra BB0_19;
|
|
|
|
mul.f32 %f619, %f508, %f82;
|
|
mul.f32 %f620, %f509, %f83;
|
|
neg.f32 %f621, %f620;
|
|
sub.f32 %f622, %f621, %f619;
|
|
mul.f32 %f623, %f510, %f84;
|
|
sub.f32 %f624, %f622, %f623;
|
|
fma.rn.f32 %f625, %f523, %f624, %f519;
|
|
cvt.sat.f32.f32 %f626, %f625;
|
|
mul.f32 %f627, %f626, %f626;
|
|
mul.f32 %f1688, %f115, %f627;
|
|
mov.f32 %f1685, %f520;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_19:
|
|
mov.f32 %f1685, %f520;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1681, %f82;
|
|
mov.f32 %f1682, %f83;
|
|
mov.f32 %f1683, %f84;
|
|
|
|
BB0_27:
|
|
mul.f32 %f653, %f510, %f84;
|
|
mul.f32 %f654, %f509, %f83;
|
|
neg.f32 %f655, %f654;
|
|
mul.f32 %f656, %f508, %f82;
|
|
sub.f32 %f657, %f655, %f656;
|
|
sub.f32 %f658, %f657, %f653;
|
|
setp.gt.f32 %p36, %f658, 0f00000000;
|
|
selp.f32 %f659, 0f3F800000, 0f00000000, %p36;
|
|
mul.f32 %f660, %f517, %f1682;
|
|
fma.rn.f32 %f661, %f516, %f1681, %f660;
|
|
mul.f32 %f662, %f513, %f1682;
|
|
fma.rn.f32 %f663, %f512, %f1681, %f662;
|
|
fma.rn.f32 %f664, %f518, %f1683, %f661;
|
|
fma.rn.f32 %f665, %f514, %f1683, %f663;
|
|
fma.rn.f32 %f666, %f519, %f664, 0f3F000000;
|
|
mov.f32 %f667, 0f3F800000;
|
|
sub.f32 %f649, %f667, %f666;
|
|
fma.rn.f32 %f650, %f519, %f665, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r69, %f523;
|
|
mov.f32 %f652, 0f00000000;
|
|
// inline asm
|
|
call (%f645, %f646, %f647, %f648), _rt_texture_get_f_id, (%r69, %r27, %f649, %f650, %f652, %f652);
|
|
// inline asm
|
|
mul.f32 %f668, %f659, %f645;
|
|
mul.f32 %f669, %f659, %f646;
|
|
mul.f32 %f670, %f659, %f647;
|
|
mul.f32 %f1685, %f520, %f668;
|
|
mul.f32 %f1686, %f1686, %f669;
|
|
mul.f32 %f1687, %f1687, %f670;
|
|
|
|
BB0_28:
|
|
mov.f32 %f1688, %f115;
|
|
|
|
BB0_29:
|
|
max.f32 %f701, %f1685, %f1686;
|
|
max.f32 %f702, %f701, %f1687;
|
|
mul.f32 %f703, %f1688, %f702;
|
|
setp.lt.f32 %p38, %f703, 0f3727C5AC;
|
|
mov.pred %p147, -1;
|
|
mov.f32 %f166, 0f00000000;
|
|
mov.f32 %f1690, %f166;
|
|
mov.f32 %f1691, %f166;
|
|
mov.f32 %f1692, %f166;
|
|
mov.f32 %f1693, %f166;
|
|
mov.f32 %f1694, %f166;
|
|
mov.f32 %f1695, %f166;
|
|
mov.f32 %f1696, %f166;
|
|
mov.f32 %f1697, %f166;
|
|
mov.f32 %f1698, %f166;
|
|
mov.f32 %f1699, %f166;
|
|
mov.f32 %f1700, %f166;
|
|
mov.f32 %f1701, %f166;
|
|
mov.f32 %f1702, %f166;
|
|
mov.f32 %f1703, %f166;
|
|
mov.f32 %f1704, %f166;
|
|
mov.f32 %f1705, %f166;
|
|
mov.f32 %f1706, %f166;
|
|
mov.f32 %f1707, %f166;
|
|
mov.f32 %f1708, %f166;
|
|
mov.f32 %f1709, %f166;
|
|
mov.f32 %f1710, %f166;
|
|
mov.f32 %f1711, %f166;
|
|
mov.f32 %f1712, %f166;
|
|
mov.f32 %f1713, %f166;
|
|
mov.f32 %f1714, %f166;
|
|
mov.f32 %f1715, %f166;
|
|
mov.f32 %f1716, %f166;
|
|
mov.f32 %f1717, %f166;
|
|
mov.f32 %f1718, %f166;
|
|
@%p38 bra BB0_31;
|
|
|
|
ld.global.u32 %r71, [ignoreNormal];
|
|
setp.eq.s32 %p40, %r71, 0;
|
|
selp.f32 %f704, %f116, 0f3F800000, %p40;
|
|
cvt.sat.f32.f32 %f705, %f704;
|
|
mul.f32 %f706, %f1688, %f705;
|
|
mul.f32 %f166, %f1685, %f706;
|
|
mul.f32 %f1690, %f1686, %f706;
|
|
mul.f32 %f1691, %f1687, %f706;
|
|
mul.f32 %f707, %f1685, %f1688;
|
|
add.f32 %f1692, %f707, 0f00000000;
|
|
mul.f32 %f708, %f1686, %f1688;
|
|
add.f32 %f1693, %f708, 0f00000000;
|
|
mul.f32 %f709, %f1687, %f1688;
|
|
add.f32 %f1694, %f709, 0f00000000;
|
|
fma.rn.f32 %f1695, %f83, %f707, 0f00000000;
|
|
fma.rn.f32 %f1696, %f83, %f708, 0f00000000;
|
|
fma.rn.f32 %f1697, %f83, %f709, 0f00000000;
|
|
fma.rn.f32 %f1698, %f84, %f707, 0f00000000;
|
|
fma.rn.f32 %f1699, %f84, %f708, 0f00000000;
|
|
fma.rn.f32 %f1700, %f84, %f709, 0f00000000;
|
|
fma.rn.f32 %f1701, %f82, %f707, 0f00000000;
|
|
fma.rn.f32 %f1702, %f82, %f708, 0f00000000;
|
|
fma.rn.f32 %f1703, %f82, %f709, 0f00000000;
|
|
mul.f32 %f710, %f82, %f83;
|
|
fma.rn.f32 %f1704, %f710, %f707, 0f00000000;
|
|
fma.rn.f32 %f1705, %f710, %f708, 0f00000000;
|
|
fma.rn.f32 %f1706, %f710, %f709, 0f00000000;
|
|
mul.f32 %f711, %f83, %f84;
|
|
fma.rn.f32 %f1707, %f711, %f707, 0f00000000;
|
|
fma.rn.f32 %f1708, %f711, %f708, 0f00000000;
|
|
fma.rn.f32 %f1709, %f711, %f709, 0f00000000;
|
|
fma.rn.f32 %f712, %f84, %f84, 0fBEAAAAAB;
|
|
fma.rn.f32 %f1710, %f712, %f707, 0f00000000;
|
|
fma.rn.f32 %f1711, %f712, %f708, 0f00000000;
|
|
fma.rn.f32 %f1712, %f712, %f709, 0f00000000;
|
|
mul.f32 %f713, %f82, %f84;
|
|
fma.rn.f32 %f1713, %f713, %f707, 0f00000000;
|
|
fma.rn.f32 %f1714, %f713, %f708, 0f00000000;
|
|
fma.rn.f32 %f1715, %f713, %f709, 0f00000000;
|
|
mul.f32 %f714, %f83, %f83;
|
|
mul.f32 %f715, %f82, %f82;
|
|
sub.f32 %f716, %f715, %f714;
|
|
fma.rn.f32 %f1716, %f716, %f707, 0f00000000;
|
|
fma.rn.f32 %f1717, %f716, %f708, 0f00000000;
|
|
fma.rn.f32 %f1718, %f716, %f709, 0f00000000;
|
|
mov.pred %p147, 0;
|
|
|
|
BB0_31:
|
|
@%p147 bra BB0_46;
|
|
|
|
setp.eq.s32 %p41, %r6, 0;
|
|
mov.u16 %rs301, 0;
|
|
mov.f32 %f1735, %f1734;
|
|
mov.f32 %f1736, %f1734;
|
|
@%p41 bra BB0_43;
|
|
|
|
abs.s32 %r8, %r6;
|
|
mov.f32 %f1731, 0f00000000;
|
|
setp.lt.s32 %p42, %r8, 1;
|
|
mov.f32 %f1732, %f1731;
|
|
mov.f32 %f1733, %f1731;
|
|
@%p42 bra BB0_42;
|
|
|
|
max.f32 %f197, %f730, %f466;
|
|
and.b32 %r73, %r8, 3;
|
|
setp.eq.s32 %p43, %r73, 0;
|
|
mov.f32 %f1731, 0f00000000;
|
|
mov.u32 %r322, 0;
|
|
mov.f32 %f1732, %f1731;
|
|
mov.f32 %f1733, %f1731;
|
|
@%p43 bra BB0_40;
|
|
|
|
setp.eq.s32 %p44, %r73, 1;
|
|
mov.f32 %f1722, 0f00000000;
|
|
mov.u32 %r320, 0;
|
|
mov.f32 %f1723, %f1722;
|
|
mov.f32 %f1724, %f1722;
|
|
@%p44 bra BB0_39;
|
|
|
|
setp.eq.s32 %p45, %r73, 2;
|
|
mov.f32 %f1719, 0f00000000;
|
|
mov.u32 %r319, 0;
|
|
mov.f32 %f1720, %f1719;
|
|
mov.f32 %f1721, %f1719;
|
|
@%p45 bra BB0_38;
|
|
|
|
cvt.rmi.f32.f32 %f746, %f19;
|
|
sub.f32 %f747, %f19, %f746;
|
|
cvt.rmi.f32.f32 %f748, %f20;
|
|
sub.f32 %f749, %f20, %f748;
|
|
add.f32 %f750, %f749, 0f420551EC;
|
|
add.f32 %f751, %f747, 0f420551EC;
|
|
mul.f32 %f752, %f747, %f750;
|
|
fma.rn.f32 %f753, %f749, %f751, %f752;
|
|
add.f32 %f754, %f753, 0f00000000;
|
|
add.f32 %f755, %f747, %f754;
|
|
add.f32 %f756, %f749, %f754;
|
|
add.f32 %f757, %f755, %f756;
|
|
mul.f32 %f758, %f754, %f757;
|
|
cvt.rmi.f32.f32 %f759, %f758;
|
|
sub.f32 %f760, %f758, %f759;
|
|
add.f32 %f761, %f755, %f755;
|
|
mul.f32 %f762, %f756, %f761;
|
|
cvt.rmi.f32.f32 %f763, %f762;
|
|
sub.f32 %f764, %f762, %f763;
|
|
mul.f32 %f765, %f755, %f757;
|
|
cvt.rmi.f32.f32 %f766, %f765;
|
|
sub.f32 %f767, %f765, %f766;
|
|
fma.rn.f32 %f768, %f760, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f769, %f764, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f770, %f767, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f771, %f524, %f768, %f529;
|
|
fma.rn.f32 %f772, %f524, %f769, %f530;
|
|
fma.rn.f32 %f773, %f524, %f770, %f531;
|
|
sub.f32 %f774, %f771, %f7;
|
|
sub.f32 %f775, %f772, %f8;
|
|
sub.f32 %f776, %f773, %f9;
|
|
mul.f32 %f777, %f775, %f775;
|
|
fma.rn.f32 %f778, %f774, %f774, %f777;
|
|
fma.rn.f32 %f779, %f776, %f776, %f778;
|
|
sqrt.rn.f32 %f745, %f779;
|
|
rcp.rn.f32 %f780, %f745;
|
|
mul.f32 %f741, %f780, %f774;
|
|
mul.f32 %f742, %f780, %f775;
|
|
mul.f32 %f743, %f780, %f776;
|
|
ld.global.u32 %r82, [imageEnabled];
|
|
and.b32 %r83, %r82, 32;
|
|
setp.eq.s32 %p46, %r83, 0;
|
|
selp.f32 %f781, 0f3F800000, 0f41200000, %p46;
|
|
mul.f32 %f744, %f781, %f197;
|
|
add.u64 %rd34, %SP, 0;
|
|
cvta.to.local.u64 %rd35, %rd34;
|
|
mov.u32 %r84, 1065353216;
|
|
st.local.u32 [%rd35+8], %r84;
|
|
st.local.u32 [%rd35+4], %r84;
|
|
st.local.u32 [%rd35], %r84;
|
|
ld.global.u32 %r78, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r78, %f10, %f11, %f12, %f741, %f742, %f743, %r44, %f744, %f745, %rd34, %r43);
|
|
// inline asm
|
|
ld.local.f32 %f782, [%rd35];
|
|
add.f32 %f1721, %f782, 0f00000000;
|
|
ld.local.f32 %f783, [%rd35+4];
|
|
add.f32 %f1720, %f783, 0f00000000;
|
|
ld.local.f32 %f784, [%rd35+8];
|
|
add.f32 %f1719, %f784, 0f00000000;
|
|
mov.u32 %r319, %r44;
|
|
|
|
BB0_38:
|
|
cvt.rn.f32.s32 %f793, %r319;
|
|
add.f32 %f794, %f13, %f793;
|
|
sub.f32 %f795, %f14, %f793;
|
|
mul.f32 %f796, %f794, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f797, %f796;
|
|
sub.f32 %f798, %f796, %f797;
|
|
mul.f32 %f799, %f795, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f800, %f799;
|
|
sub.f32 %f801, %f799, %f800;
|
|
mul.f32 %f802, %f793, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f803, %f802;
|
|
sub.f32 %f804, %f802, %f803;
|
|
add.f32 %f805, %f801, 0f420551EC;
|
|
add.f32 %f806, %f798, 0f420551EC;
|
|
add.f32 %f807, %f804, 0f420551EC;
|
|
mul.f32 %f808, %f798, %f805;
|
|
fma.rn.f32 %f809, %f801, %f806, %f808;
|
|
fma.rn.f32 %f810, %f804, %f807, %f809;
|
|
add.f32 %f811, %f798, %f810;
|
|
add.f32 %f812, %f801, %f810;
|
|
add.f32 %f813, %f804, %f810;
|
|
add.f32 %f814, %f811, %f812;
|
|
mul.f32 %f815, %f813, %f814;
|
|
cvt.rmi.f32.f32 %f816, %f815;
|
|
sub.f32 %f817, %f815, %f816;
|
|
add.f32 %f818, %f811, %f811;
|
|
mul.f32 %f819, %f812, %f818;
|
|
cvt.rmi.f32.f32 %f820, %f819;
|
|
sub.f32 %f821, %f819, %f820;
|
|
mul.f32 %f822, %f811, %f814;
|
|
cvt.rmi.f32.f32 %f823, %f822;
|
|
sub.f32 %f824, %f822, %f823;
|
|
fma.rn.f32 %f825, %f817, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f826, %f821, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f827, %f824, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f828, %f524, %f825, %f529;
|
|
fma.rn.f32 %f829, %f524, %f826, %f530;
|
|
fma.rn.f32 %f830, %f524, %f827, %f531;
|
|
sub.f32 %f831, %f828, %f7;
|
|
sub.f32 %f832, %f829, %f8;
|
|
sub.f32 %f833, %f830, %f9;
|
|
mul.f32 %f834, %f832, %f832;
|
|
fma.rn.f32 %f835, %f831, %f831, %f834;
|
|
fma.rn.f32 %f836, %f833, %f833, %f835;
|
|
sqrt.rn.f32 %f792, %f836;
|
|
rcp.rn.f32 %f837, %f792;
|
|
mul.f32 %f788, %f837, %f831;
|
|
mul.f32 %f789, %f837, %f832;
|
|
mul.f32 %f790, %f837, %f833;
|
|
ld.global.u32 %r88, [imageEnabled];
|
|
and.b32 %r89, %r88, 32;
|
|
setp.eq.s32 %p47, %r89, 0;
|
|
selp.f32 %f838, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f791, %f838, %f197;
|
|
add.u64 %rd36, %SP, 0;
|
|
cvta.to.local.u64 %rd37, %rd36;
|
|
mov.u32 %r90, 1065353216;
|
|
st.local.u32 [%rd37+8], %r90;
|
|
st.local.u32 [%rd37+4], %r90;
|
|
st.local.u32 [%rd37], %r90;
|
|
ld.global.u32 %r85, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r85, %f10, %f11, %f12, %f788, %f789, %f790, %r44, %f791, %f792, %rd36, %r43);
|
|
// inline asm
|
|
ld.local.f32 %f839, [%rd37];
|
|
add.f32 %f1724, %f1721, %f839;
|
|
ld.local.f32 %f840, [%rd37+4];
|
|
add.f32 %f1723, %f1720, %f840;
|
|
ld.local.f32 %f841, [%rd37+8];
|
|
add.f32 %f1722, %f1719, %f841;
|
|
add.s32 %r320, %r319, 1;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f850, %r320;
|
|
add.f32 %f851, %f13, %f850;
|
|
sub.f32 %f852, %f14, %f850;
|
|
mul.f32 %f853, %f851, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f854, %f853;
|
|
sub.f32 %f855, %f853, %f854;
|
|
mul.f32 %f856, %f852, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f857, %f856;
|
|
sub.f32 %f858, %f856, %f857;
|
|
mul.f32 %f859, %f850, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f860, %f859;
|
|
sub.f32 %f861, %f859, %f860;
|
|
add.f32 %f862, %f858, 0f420551EC;
|
|
add.f32 %f863, %f855, 0f420551EC;
|
|
add.f32 %f864, %f861, 0f420551EC;
|
|
mul.f32 %f865, %f855, %f862;
|
|
fma.rn.f32 %f866, %f858, %f863, %f865;
|
|
fma.rn.f32 %f867, %f861, %f864, %f866;
|
|
add.f32 %f868, %f855, %f867;
|
|
add.f32 %f869, %f858, %f867;
|
|
add.f32 %f870, %f861, %f867;
|
|
add.f32 %f871, %f868, %f869;
|
|
mul.f32 %f872, %f870, %f871;
|
|
cvt.rmi.f32.f32 %f873, %f872;
|
|
sub.f32 %f874, %f872, %f873;
|
|
add.f32 %f875, %f868, %f868;
|
|
mul.f32 %f876, %f869, %f875;
|
|
cvt.rmi.f32.f32 %f877, %f876;
|
|
sub.f32 %f878, %f876, %f877;
|
|
mul.f32 %f879, %f868, %f871;
|
|
cvt.rmi.f32.f32 %f880, %f879;
|
|
sub.f32 %f881, %f879, %f880;
|
|
fma.rn.f32 %f882, %f874, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f883, %f878, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f884, %f881, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f885, %f524, %f882, %f529;
|
|
fma.rn.f32 %f886, %f524, %f883, %f530;
|
|
fma.rn.f32 %f887, %f524, %f884, %f531;
|
|
sub.f32 %f888, %f885, %f7;
|
|
sub.f32 %f889, %f886, %f8;
|
|
sub.f32 %f890, %f887, %f9;
|
|
mul.f32 %f891, %f889, %f889;
|
|
fma.rn.f32 %f892, %f888, %f888, %f891;
|
|
fma.rn.f32 %f893, %f890, %f890, %f892;
|
|
sqrt.rn.f32 %f849, %f893;
|
|
rcp.rn.f32 %f894, %f849;
|
|
mul.f32 %f845, %f894, %f888;
|
|
mul.f32 %f846, %f894, %f889;
|
|
mul.f32 %f847, %f894, %f890;
|
|
ld.global.u32 %r94, [imageEnabled];
|
|
and.b32 %r95, %r94, 32;
|
|
setp.eq.s32 %p48, %r95, 0;
|
|
selp.f32 %f895, 0f3F800000, 0f41200000, %p48;
|
|
mul.f32 %f848, %f895, %f197;
|
|
add.u64 %rd38, %SP, 0;
|
|
cvta.to.local.u64 %rd39, %rd38;
|
|
mov.u32 %r96, 1065353216;
|
|
st.local.u32 [%rd39+8], %r96;
|
|
st.local.u32 [%rd39+4], %r96;
|
|
st.local.u32 [%rd39], %r96;
|
|
ld.global.u32 %r91, [root];
|
|
mov.u32 %r92, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r91, %f10, %f11, %f12, %f845, %f846, %f847, %r92, %f848, %f849, %rd38, %r43);
|
|
// inline asm
|
|
ld.local.f32 %f896, [%rd39];
|
|
add.f32 %f1733, %f1724, %f896;
|
|
ld.local.f32 %f897, [%rd39+4];
|
|
add.f32 %f1732, %f1723, %f897;
|
|
ld.local.f32 %f898, [%rd39+8];
|
|
add.f32 %f1731, %f1722, %f898;
|
|
add.s32 %r322, %r320, 1;
|
|
|
|
BB0_40:
|
|
setp.lt.u32 %p49, %r8, 4;
|
|
@%p49 bra BB0_42;
|
|
|
|
BB0_41:
|
|
cvt.rn.f32.s32 %f931, %r322;
|
|
add.f32 %f932, %f13, %f931;
|
|
sub.f32 %f933, %f14, %f931;
|
|
mul.f32 %f934, %f932, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f935, %f934;
|
|
sub.f32 %f936, %f934, %f935;
|
|
mul.f32 %f937, %f933, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f938, %f937;
|
|
sub.f32 %f939, %f937, %f938;
|
|
mul.f32 %f940, %f931, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f941, %f940;
|
|
sub.f32 %f942, %f940, %f941;
|
|
add.f32 %f943, %f939, 0f420551EC;
|
|
add.f32 %f944, %f936, 0f420551EC;
|
|
add.f32 %f945, %f942, 0f420551EC;
|
|
mul.f32 %f946, %f936, %f943;
|
|
fma.rn.f32 %f947, %f939, %f944, %f946;
|
|
fma.rn.f32 %f948, %f942, %f945, %f947;
|
|
add.f32 %f949, %f936, %f948;
|
|
add.f32 %f950, %f939, %f948;
|
|
add.f32 %f951, %f942, %f948;
|
|
add.f32 %f952, %f949, %f950;
|
|
mul.f32 %f953, %f951, %f952;
|
|
cvt.rmi.f32.f32 %f954, %f953;
|
|
sub.f32 %f955, %f953, %f954;
|
|
add.f32 %f956, %f949, %f949;
|
|
mul.f32 %f957, %f950, %f956;
|
|
cvt.rmi.f32.f32 %f958, %f957;
|
|
sub.f32 %f959, %f957, %f958;
|
|
mul.f32 %f960, %f949, %f952;
|
|
cvt.rmi.f32.f32 %f961, %f960;
|
|
sub.f32 %f962, %f960, %f961;
|
|
fma.rn.f32 %f963, %f955, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f964, %f959, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f965, %f962, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f966, %f524, %f963, %f529;
|
|
fma.rn.f32 %f967, %f524, %f964, %f530;
|
|
fma.rn.f32 %f968, %f524, %f965, %f531;
|
|
sub.f32 %f969, %f966, %f7;
|
|
sub.f32 %f970, %f967, %f8;
|
|
sub.f32 %f971, %f968, %f9;
|
|
mul.f32 %f972, %f970, %f970;
|
|
fma.rn.f32 %f973, %f969, %f969, %f972;
|
|
fma.rn.f32 %f974, %f971, %f971, %f973;
|
|
sqrt.rn.f32 %f906, %f974;
|
|
rcp.rn.f32 %f975, %f906;
|
|
mul.f32 %f902, %f975, %f969;
|
|
mul.f32 %f903, %f975, %f970;
|
|
mul.f32 %f904, %f975, %f971;
|
|
ld.global.u32 %r109, [imageEnabled];
|
|
and.b32 %r110, %r109, 32;
|
|
setp.eq.s32 %p50, %r110, 0;
|
|
selp.f32 %f976, 0f3F800000, 0f41200000, %p50;
|
|
mul.f32 %f905, %f976, %f197;
|
|
add.u64 %rd43, %SP, 0;
|
|
cvta.to.local.u64 %rd44, %rd43;
|
|
mov.u32 %r111, 1065353216;
|
|
st.local.u32 [%rd44+8], %r111;
|
|
st.local.u32 [%rd44+4], %r111;
|
|
st.local.u32 [%rd44], %r111;
|
|
ld.global.u32 %r97, [root];
|
|
mov.u32 %r107, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r97, %f10, %f11, %f12, %f902, %f903, %f904, %r107, %f905, %f906, %rd43, %r43);
|
|
// inline asm
|
|
ld.local.f32 %f977, [%rd44];
|
|
add.f32 %f978, %f1733, %f977;
|
|
ld.local.f32 %f979, [%rd44+4];
|
|
add.f32 %f980, %f1732, %f979;
|
|
ld.local.f32 %f981, [%rd44+8];
|
|
add.f32 %f982, %f1731, %f981;
|
|
add.s32 %r112, %r322, 1;
|
|
cvt.rn.f32.s32 %f983, %r112;
|
|
add.f32 %f984, %f13, %f983;
|
|
sub.f32 %f985, %f14, %f983;
|
|
mul.f32 %f986, %f984, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f987, %f986;
|
|
sub.f32 %f988, %f986, %f987;
|
|
mul.f32 %f989, %f985, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f990, %f989;
|
|
sub.f32 %f991, %f989, %f990;
|
|
mul.f32 %f992, %f983, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f993, %f992;
|
|
sub.f32 %f994, %f992, %f993;
|
|
add.f32 %f995, %f991, 0f420551EC;
|
|
add.f32 %f996, %f988, 0f420551EC;
|
|
add.f32 %f997, %f994, 0f420551EC;
|
|
mul.f32 %f998, %f988, %f995;
|
|
fma.rn.f32 %f999, %f991, %f996, %f998;
|
|
fma.rn.f32 %f1000, %f994, %f997, %f999;
|
|
add.f32 %f1001, %f988, %f1000;
|
|
add.f32 %f1002, %f991, %f1000;
|
|
add.f32 %f1003, %f994, %f1000;
|
|
add.f32 %f1004, %f1001, %f1002;
|
|
mul.f32 %f1005, %f1003, %f1004;
|
|
cvt.rmi.f32.f32 %f1006, %f1005;
|
|
sub.f32 %f1007, %f1005, %f1006;
|
|
add.f32 %f1008, %f1001, %f1001;
|
|
mul.f32 %f1009, %f1002, %f1008;
|
|
cvt.rmi.f32.f32 %f1010, %f1009;
|
|
sub.f32 %f1011, %f1009, %f1010;
|
|
mul.f32 %f1012, %f1001, %f1004;
|
|
cvt.rmi.f32.f32 %f1013, %f1012;
|
|
sub.f32 %f1014, %f1012, %f1013;
|
|
fma.rn.f32 %f1015, %f1007, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1016, %f1011, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1017, %f1014, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1018, %f524, %f1015, %f529;
|
|
fma.rn.f32 %f1019, %f524, %f1016, %f530;
|
|
fma.rn.f32 %f1020, %f524, %f1017, %f531;
|
|
sub.f32 %f1021, %f1018, %f7;
|
|
sub.f32 %f1022, %f1019, %f8;
|
|
sub.f32 %f1023, %f1020, %f9;
|
|
mul.f32 %f1024, %f1022, %f1022;
|
|
fma.rn.f32 %f1025, %f1021, %f1021, %f1024;
|
|
fma.rn.f32 %f1026, %f1023, %f1023, %f1025;
|
|
sqrt.rn.f32 %f914, %f1026;
|
|
rcp.rn.f32 %f1027, %f914;
|
|
mul.f32 %f910, %f1027, %f1021;
|
|
mul.f32 %f911, %f1027, %f1022;
|
|
mul.f32 %f912, %f1027, %f1023;
|
|
ld.global.u32 %r113, [imageEnabled];
|
|
and.b32 %r114, %r113, 32;
|
|
setp.eq.s32 %p51, %r114, 0;
|
|
selp.f32 %f1028, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f913, %f1028, %f197;
|
|
st.local.u32 [%rd44+8], %r111;
|
|
st.local.u32 [%rd44+4], %r111;
|
|
st.local.u32 [%rd44], %r111;
|
|
ld.global.u32 %r100, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r100, %f10, %f11, %f12, %f910, %f911, %f912, %r107, %f913, %f914, %rd43, %r43);
|
|
// inline asm
|
|
ld.local.f32 %f1029, [%rd44];
|
|
add.f32 %f1030, %f978, %f1029;
|
|
ld.local.f32 %f1031, [%rd44+4];
|
|
add.f32 %f1032, %f980, %f1031;
|
|
ld.local.f32 %f1033, [%rd44+8];
|
|
add.f32 %f1034, %f982, %f1033;
|
|
add.s32 %r115, %r322, 2;
|
|
cvt.rn.f32.s32 %f1035, %r115;
|
|
add.f32 %f1036, %f13, %f1035;
|
|
sub.f32 %f1037, %f14, %f1035;
|
|
mul.f32 %f1038, %f1036, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f1039, %f1038;
|
|
sub.f32 %f1040, %f1038, %f1039;
|
|
mul.f32 %f1041, %f1037, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f1042, %f1041;
|
|
sub.f32 %f1043, %f1041, %f1042;
|
|
mul.f32 %f1044, %f1035, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f1045, %f1044;
|
|
sub.f32 %f1046, %f1044, %f1045;
|
|
add.f32 %f1047, %f1043, 0f420551EC;
|
|
add.f32 %f1048, %f1040, 0f420551EC;
|
|
add.f32 %f1049, %f1046, 0f420551EC;
|
|
mul.f32 %f1050, %f1040, %f1047;
|
|
fma.rn.f32 %f1051, %f1043, %f1048, %f1050;
|
|
fma.rn.f32 %f1052, %f1046, %f1049, %f1051;
|
|
add.f32 %f1053, %f1040, %f1052;
|
|
add.f32 %f1054, %f1043, %f1052;
|
|
add.f32 %f1055, %f1046, %f1052;
|
|
add.f32 %f1056, %f1053, %f1054;
|
|
mul.f32 %f1057, %f1055, %f1056;
|
|
cvt.rmi.f32.f32 %f1058, %f1057;
|
|
sub.f32 %f1059, %f1057, %f1058;
|
|
add.f32 %f1060, %f1053, %f1053;
|
|
mul.f32 %f1061, %f1054, %f1060;
|
|
cvt.rmi.f32.f32 %f1062, %f1061;
|
|
sub.f32 %f1063, %f1061, %f1062;
|
|
mul.f32 %f1064, %f1053, %f1056;
|
|
cvt.rmi.f32.f32 %f1065, %f1064;
|
|
sub.f32 %f1066, %f1064, %f1065;
|
|
fma.rn.f32 %f1067, %f1059, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1068, %f1063, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1069, %f1066, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1070, %f524, %f1067, %f529;
|
|
fma.rn.f32 %f1071, %f524, %f1068, %f530;
|
|
fma.rn.f32 %f1072, %f524, %f1069, %f531;
|
|
sub.f32 %f1073, %f1070, %f7;
|
|
sub.f32 %f1074, %f1071, %f8;
|
|
sub.f32 %f1075, %f1072, %f9;
|
|
mul.f32 %f1076, %f1074, %f1074;
|
|
fma.rn.f32 %f1077, %f1073, %f1073, %f1076;
|
|
fma.rn.f32 %f1078, %f1075, %f1075, %f1077;
|
|
sqrt.rn.f32 %f922, %f1078;
|
|
rcp.rn.f32 %f1079, %f922;
|
|
mul.f32 %f918, %f1079, %f1073;
|
|
mul.f32 %f919, %f1079, %f1074;
|
|
mul.f32 %f920, %f1079, %f1075;
|
|
ld.global.u32 %r116, [imageEnabled];
|
|
and.b32 %r117, %r116, 32;
|
|
setp.eq.s32 %p52, %r117, 0;
|
|
selp.f32 %f1080, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f921, %f1080, %f197;
|
|
st.local.u32 [%rd44+8], %r111;
|
|
st.local.u32 [%rd44+4], %r111;
|
|
st.local.u32 [%rd44], %r111;
|
|
ld.global.u32 %r103, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r103, %f10, %f11, %f12, %f918, %f919, %f920, %r107, %f921, %f922, %rd43, %r43);
|
|
// inline asm
|
|
ld.local.f32 %f1081, [%rd44];
|
|
add.f32 %f1082, %f1030, %f1081;
|
|
ld.local.f32 %f1083, [%rd44+4];
|
|
add.f32 %f1084, %f1032, %f1083;
|
|
ld.local.f32 %f1085, [%rd44+8];
|
|
add.f32 %f1086, %f1034, %f1085;
|
|
add.s32 %r118, %r322, 3;
|
|
cvt.rn.f32.s32 %f1087, %r118;
|
|
add.f32 %f1088, %f13, %f1087;
|
|
sub.f32 %f1089, %f14, %f1087;
|
|
mul.f32 %f1090, %f1088, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f1091, %f1090;
|
|
sub.f32 %f1092, %f1090, %f1091;
|
|
mul.f32 %f1093, %f1089, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f1094, %f1093;
|
|
sub.f32 %f1095, %f1093, %f1094;
|
|
mul.f32 %f1096, %f1087, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f1097, %f1096;
|
|
sub.f32 %f1098, %f1096, %f1097;
|
|
add.f32 %f1099, %f1095, 0f420551EC;
|
|
add.f32 %f1100, %f1092, 0f420551EC;
|
|
add.f32 %f1101, %f1098, 0f420551EC;
|
|
mul.f32 %f1102, %f1092, %f1099;
|
|
fma.rn.f32 %f1103, %f1095, %f1100, %f1102;
|
|
fma.rn.f32 %f1104, %f1098, %f1101, %f1103;
|
|
add.f32 %f1105, %f1092, %f1104;
|
|
add.f32 %f1106, %f1095, %f1104;
|
|
add.f32 %f1107, %f1098, %f1104;
|
|
add.f32 %f1108, %f1105, %f1106;
|
|
mul.f32 %f1109, %f1107, %f1108;
|
|
cvt.rmi.f32.f32 %f1110, %f1109;
|
|
sub.f32 %f1111, %f1109, %f1110;
|
|
add.f32 %f1112, %f1105, %f1105;
|
|
mul.f32 %f1113, %f1106, %f1112;
|
|
cvt.rmi.f32.f32 %f1114, %f1113;
|
|
sub.f32 %f1115, %f1113, %f1114;
|
|
mul.f32 %f1116, %f1105, %f1108;
|
|
cvt.rmi.f32.f32 %f1117, %f1116;
|
|
sub.f32 %f1118, %f1116, %f1117;
|
|
fma.rn.f32 %f1119, %f1111, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1120, %f1115, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1121, %f1118, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1122, %f524, %f1119, %f529;
|
|
fma.rn.f32 %f1123, %f524, %f1120, %f530;
|
|
fma.rn.f32 %f1124, %f524, %f1121, %f531;
|
|
sub.f32 %f1125, %f1122, %f7;
|
|
sub.f32 %f1126, %f1123, %f8;
|
|
sub.f32 %f1127, %f1124, %f9;
|
|
mul.f32 %f1128, %f1126, %f1126;
|
|
fma.rn.f32 %f1129, %f1125, %f1125, %f1128;
|
|
fma.rn.f32 %f1130, %f1127, %f1127, %f1129;
|
|
sqrt.rn.f32 %f930, %f1130;
|
|
rcp.rn.f32 %f1131, %f930;
|
|
mul.f32 %f926, %f1131, %f1125;
|
|
mul.f32 %f927, %f1131, %f1126;
|
|
mul.f32 %f928, %f1131, %f1127;
|
|
ld.global.u32 %r119, [imageEnabled];
|
|
and.b32 %r120, %r119, 32;
|
|
setp.eq.s32 %p53, %r120, 0;
|
|
selp.f32 %f1132, 0f3F800000, 0f41200000, %p53;
|
|
mul.f32 %f929, %f1132, %f197;
|
|
st.local.u32 [%rd44+8], %r111;
|
|
st.local.u32 [%rd44+4], %r111;
|
|
st.local.u32 [%rd44], %r111;
|
|
ld.global.u32 %r106, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r106, %f10, %f11, %f12, %f926, %f927, %f928, %r107, %f929, %f930, %rd43, %r43);
|
|
// inline asm
|
|
ld.local.f32 %f1133, [%rd44];
|
|
add.f32 %f1733, %f1082, %f1133;
|
|
ld.local.f32 %f1134, [%rd44+4];
|
|
add.f32 %f1732, %f1084, %f1134;
|
|
ld.local.f32 %f1135, [%rd44+8];
|
|
add.f32 %f1731, %f1086, %f1135;
|
|
add.s32 %r322, %r322, 4;
|
|
setp.lt.s32 %p54, %r322, %r8;
|
|
@%p54 bra BB0_41;
|
|
|
|
BB0_42:
|
|
cvt.rn.f32.s32 %f1136, %r8;
|
|
rcp.rn.f32 %f1137, %f1136;
|
|
mul.f32 %f1734, %f1733, %f1137;
|
|
mul.f32 %f1735, %f1732, %f1137;
|
|
mul.f32 %f1736, %f1731, %f1137;
|
|
shr.u32 %r121, %r6, 31;
|
|
cvt.u16.u32 %rs301, %r121;
|
|
|
|
BB0_43:
|
|
fma.rn.f32 %f1677, %f166, %f1734, %f1677;
|
|
fma.rn.f32 %f1676, %f1690, %f1735, %f1676;
|
|
fma.rn.f32 %f1675, %f1691, %f1736, %f1675;
|
|
fma.rn.f32 %f1674, %f1692, %f1734, %f1674;
|
|
fma.rn.f32 %f1673, %f1693, %f1735, %f1673;
|
|
fma.rn.f32 %f1672, %f1694, %f1736, %f1672;
|
|
fma.rn.f32 %f1671, %f1695, %f1734, %f1671;
|
|
fma.rn.f32 %f1670, %f1696, %f1735, %f1670;
|
|
fma.rn.f32 %f1669, %f1697, %f1736, %f1669;
|
|
fma.rn.f32 %f1668, %f1698, %f1734, %f1668;
|
|
fma.rn.f32 %f1667, %f1699, %f1735, %f1667;
|
|
fma.rn.f32 %f1666, %f1700, %f1736, %f1666;
|
|
fma.rn.f32 %f1665, %f1701, %f1734, %f1665;
|
|
fma.rn.f32 %f1664, %f1702, %f1735, %f1664;
|
|
fma.rn.f32 %f1663, %f1703, %f1736, %f1663;
|
|
fma.rn.f32 %f1662, %f1704, %f1734, %f1662;
|
|
fma.rn.f32 %f1661, %f1705, %f1735, %f1661;
|
|
fma.rn.f32 %f1660, %f1706, %f1736, %f1660;
|
|
fma.rn.f32 %f1659, %f1707, %f1734, %f1659;
|
|
fma.rn.f32 %f1658, %f1708, %f1735, %f1658;
|
|
fma.rn.f32 %f1657, %f1709, %f1736, %f1657;
|
|
fma.rn.f32 %f1656, %f1710, %f1734, %f1656;
|
|
fma.rn.f32 %f1655, %f1711, %f1735, %f1655;
|
|
fma.rn.f32 %f1654, %f1712, %f1736, %f1654;
|
|
fma.rn.f32 %f1653, %f1713, %f1734, %f1653;
|
|
fma.rn.f32 %f1652, %f1714, %f1735, %f1652;
|
|
fma.rn.f32 %f1651, %f1715, %f1736, %f1651;
|
|
fma.rn.f32 %f1650, %f1716, %f1734, %f1650;
|
|
fma.rn.f32 %f1649, %f1717, %f1735, %f1649;
|
|
fma.rn.f32 %f1648, %f1718, %f1736, %f1648;
|
|
setp.eq.s16 %p55, %rs301, 0;
|
|
@%p55 bra BB0_45;
|
|
|
|
div.rn.f32 %f1138, %f166, %f520;
|
|
div.rn.f32 %f1139, %f1138, %f115;
|
|
cvt.sat.f32.f32 %f1140, %f1139;
|
|
mul.f32 %f1734, %f1734, %f1140;
|
|
|
|
BB0_45:
|
|
add.f32 %f1647, %f1647, %f1734;
|
|
|
|
BB0_46:
|
|
add.s32 %r318, %r318, 1;
|
|
setp.lt.u32 %p56, %r318, %r4;
|
|
@%p56 bra BB0_5;
|
|
|
|
BB0_47:
|
|
ld.global.u32 %r324, [imageEnabled];
|
|
and.b32 %r122, %r324, 8;
|
|
setp.eq.s32 %p57, %r122, 0;
|
|
@%p57 bra BB0_60;
|
|
|
|
cvt.sat.f32.f32 %f326, %f1647;
|
|
cvt.u64.u32 %rd48, %r3;
|
|
cvt.u64.u32 %rd47, %r2;
|
|
mov.u64 %rd51, image_Mask;
|
|
cvta.global.u64 %rd46, %rd51;
|
|
// inline asm
|
|
call (%rd45), _rt_buffer_get_64, (%rd46, %r27, %r27, %rd47, %rd48, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1143, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1144, %f1143;
|
|
fma.rn.f32 %f1145, %f1144, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f327, %f1145;
|
|
abs.f32 %f328, %f326;
|
|
setp.lt.f32 %p58, %f328, 0f00800000;
|
|
mul.f32 %f1146, %f328, 0f4B800000;
|
|
selp.f32 %f1147, 0fC3170000, 0fC2FE0000, %p58;
|
|
selp.f32 %f1148, %f1146, %f328, %p58;
|
|
mov.b32 %r125, %f1148;
|
|
and.b32 %r126, %r125, 8388607;
|
|
or.b32 %r127, %r126, 1065353216;
|
|
mov.b32 %f1149, %r127;
|
|
shr.u32 %r128, %r125, 23;
|
|
cvt.rn.f32.u32 %f1150, %r128;
|
|
add.f32 %f1151, %f1147, %f1150;
|
|
setp.gt.f32 %p59, %f1149, 0f3FB504F3;
|
|
mul.f32 %f1152, %f1149, 0f3F000000;
|
|
add.f32 %f1153, %f1151, 0f3F800000;
|
|
selp.f32 %f1154, %f1152, %f1149, %p59;
|
|
selp.f32 %f1155, %f1153, %f1151, %p59;
|
|
add.f32 %f1156, %f1154, 0fBF800000;
|
|
add.f32 %f1142, %f1154, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1141,%f1142;
|
|
// inline asm
|
|
add.f32 %f1157, %f1156, %f1156;
|
|
mul.f32 %f1158, %f1141, %f1157;
|
|
mul.f32 %f1159, %f1158, %f1158;
|
|
mov.f32 %f1160, 0f3C4CAF63;
|
|
mov.f32 %f1161, 0f3B18F0FE;
|
|
fma.rn.f32 %f1162, %f1161, %f1159, %f1160;
|
|
mov.f32 %f1163, 0f3DAAAABD;
|
|
fma.rn.f32 %f1164, %f1162, %f1159, %f1163;
|
|
mul.rn.f32 %f1165, %f1164, %f1159;
|
|
mul.rn.f32 %f1166, %f1165, %f1158;
|
|
sub.f32 %f1167, %f1156, %f1158;
|
|
neg.f32 %f1168, %f1158;
|
|
add.f32 %f1169, %f1167, %f1167;
|
|
fma.rn.f32 %f1170, %f1168, %f1156, %f1169;
|
|
mul.rn.f32 %f1171, %f1141, %f1170;
|
|
add.f32 %f1172, %f1166, %f1158;
|
|
sub.f32 %f1173, %f1158, %f1172;
|
|
add.f32 %f1174, %f1166, %f1173;
|
|
add.f32 %f1175, %f1171, %f1174;
|
|
add.f32 %f1176, %f1172, %f1175;
|
|
sub.f32 %f1177, %f1172, %f1176;
|
|
add.f32 %f1178, %f1175, %f1177;
|
|
mov.f32 %f1179, 0f3F317200;
|
|
mul.rn.f32 %f1180, %f1155, %f1179;
|
|
mov.f32 %f1181, 0f35BFBE8E;
|
|
mul.rn.f32 %f1182, %f1155, %f1181;
|
|
add.f32 %f1183, %f1180, %f1176;
|
|
sub.f32 %f1184, %f1180, %f1183;
|
|
add.f32 %f1185, %f1176, %f1184;
|
|
add.f32 %f1186, %f1178, %f1185;
|
|
add.f32 %f1187, %f1182, %f1186;
|
|
add.f32 %f1188, %f1183, %f1187;
|
|
sub.f32 %f1189, %f1183, %f1188;
|
|
add.f32 %f1190, %f1187, %f1189;
|
|
mov.f32 %f1191, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1192, %f1191, %f1188;
|
|
neg.f32 %f1193, %f1192;
|
|
fma.rn.f32 %f1194, %f1191, %f1188, %f1193;
|
|
fma.rn.f32 %f1195, %f1191, %f1190, %f1194;
|
|
mov.f32 %f1196, 0f00000000;
|
|
fma.rn.f32 %f1197, %f1196, %f1188, %f1195;
|
|
add.rn.f32 %f1198, %f1192, %f1197;
|
|
neg.f32 %f1199, %f1198;
|
|
add.rn.f32 %f1200, %f1192, %f1199;
|
|
add.rn.f32 %f1201, %f1200, %f1197;
|
|
mov.b32 %r129, %f1198;
|
|
setp.eq.s32 %p60, %r129, 1118925336;
|
|
add.s32 %r130, %r129, -1;
|
|
mov.b32 %f1202, %r130;
|
|
add.f32 %f1203, %f1201, 0f37000000;
|
|
selp.f32 %f1204, %f1202, %f1198, %p60;
|
|
selp.f32 %f329, %f1203, %f1201, %p60;
|
|
mul.f32 %f1205, %f1204, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1206, %f1205;
|
|
mov.f32 %f1207, 0fBF317200;
|
|
fma.rn.f32 %f1208, %f1206, %f1207, %f1204;
|
|
mov.f32 %f1209, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1210, %f1206, %f1209, %f1208;
|
|
mul.f32 %f1211, %f1210, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1212, %f1211;
|
|
add.f32 %f1213, %f1206, 0f00000000;
|
|
ex2.approx.f32 %f1214, %f1213;
|
|
mul.f32 %f1215, %f1212, %f1214;
|
|
setp.lt.f32 %p61, %f1204, 0fC2D20000;
|
|
selp.f32 %f1216, 0f00000000, %f1215, %p61;
|
|
setp.gt.f32 %p62, %f1204, 0f42D20000;
|
|
selp.f32 %f1800, 0f7F800000, %f1216, %p62;
|
|
setp.eq.f32 %p63, %f1800, 0f7F800000;
|
|
@%p63 bra BB0_50;
|
|
|
|
fma.rn.f32 %f1800, %f1800, %f329, %f1800;
|
|
|
|
BB0_50:
|
|
setp.lt.f32 %p64, %f326, 0f00000000;
|
|
setp.eq.f32 %p65, %f327, 0f3F800000;
|
|
and.pred %p4, %p64, %p65;
|
|
mov.b32 %r131, %f1800;
|
|
xor.b32 %r132, %r131, -2147483648;
|
|
mov.b32 %f1217, %r132;
|
|
selp.f32 %f1802, %f1217, %f1800, %p4;
|
|
setp.eq.f32 %p66, %f326, 0f00000000;
|
|
@%p66 bra BB0_53;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_53:
|
|
add.f32 %f1220, %f326, %f326;
|
|
selp.f32 %f1802, %f1220, 0f00000000, %p65;
|
|
bra.uni BB0_54;
|
|
|
|
BB0_133:
|
|
mov.u64 %rd292, image_HDR;
|
|
cvta.global.u64 %rd287, %rd292;
|
|
mov.u32 %r253, 8;
|
|
// inline asm
|
|
call (%rd286), _rt_buffer_get_64, (%rd287, %r27, %r253, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1577, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs182, %f1577;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs183, 0;
|
|
st.v4.u16 [%rd286], {%rs182, %rs182, %rs182, %rs183};
|
|
|
|
BB0_134:
|
|
ld.global.u32 %r254, [additive];
|
|
setp.eq.s32 %p138, %r254, 0;
|
|
@%p138 bra BB0_136;
|
|
|
|
mov.u64 %rd305, image_RNM0;
|
|
cvta.global.u64 %rd294, %rd305;
|
|
mov.u32 %r258, 8;
|
|
// inline asm
|
|
call (%rd293), _rt_buffer_get_64, (%rd294, %r27, %r258, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs190, %rs191, %rs192, %rs193}, [%rd293];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1578, %rs190;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1579, %rs191;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1580, %rs192;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd299), _rt_buffer_get_64, (%rd294, %r27, %r258, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1581, %f1578, 0f00000000;
|
|
add.f32 %f1582, %f1579, 0f00000000;
|
|
add.f32 %f1583, %f1580, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs189, %f1583;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs188, %f1582;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs187, %f1581;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs194, 0;
|
|
st.v4.u16 [%rd299], {%rs187, %rs188, %rs189, %rs194};
|
|
bra.uni BB0_137;
|
|
|
|
BB0_136:
|
|
mov.u64 %rd312, image_RNM0;
|
|
cvta.global.u64 %rd307, %rd312;
|
|
mov.u32 %r260, 8;
|
|
// inline asm
|
|
call (%rd306), _rt_buffer_get_64, (%rd307, %r27, %r260, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1584, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs195, %f1584;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs196, 0;
|
|
st.v4.u16 [%rd306], {%rs195, %rs195, %rs195, %rs196};
|
|
|
|
BB0_137:
|
|
ld.global.u32 %r261, [additive];
|
|
setp.eq.s32 %p139, %r261, 0;
|
|
@%p139 bra BB0_139;
|
|
|
|
mov.u64 %rd325, image_RNM1;
|
|
cvta.global.u64 %rd314, %rd325;
|
|
mov.u32 %r265, 8;
|
|
// inline asm
|
|
call (%rd313), _rt_buffer_get_64, (%rd314, %r27, %r265, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs203, %rs204, %rs205, %rs206}, [%rd313];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1585, %rs203;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1586, %rs204;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1587, %rs205;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd319), _rt_buffer_get_64, (%rd314, %r27, %r265, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1588, %f1585, 0f00000000;
|
|
add.f32 %f1589, %f1586, 0f00000000;
|
|
add.f32 %f1590, %f1587, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs202, %f1590;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs201, %f1589;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs200, %f1588;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs207, 0;
|
|
st.v4.u16 [%rd319], {%rs200, %rs201, %rs202, %rs207};
|
|
bra.uni BB0_140;
|
|
|
|
BB0_139:
|
|
mov.u64 %rd332, image_RNM1;
|
|
cvta.global.u64 %rd327, %rd332;
|
|
mov.u32 %r267, 8;
|
|
// inline asm
|
|
call (%rd326), _rt_buffer_get_64, (%rd327, %r27, %r267, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1591, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs208, %f1591;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs209, 0;
|
|
st.v4.u16 [%rd326], {%rs208, %rs208, %rs208, %rs209};
|
|
|
|
BB0_140:
|
|
ld.global.u32 %r268, [additive];
|
|
setp.eq.s32 %p140, %r268, 0;
|
|
@%p140 bra BB0_142;
|
|
|
|
mov.u64 %rd345, image_RNM2;
|
|
cvta.global.u64 %rd334, %rd345;
|
|
mov.u32 %r272, 8;
|
|
// inline asm
|
|
call (%rd333), _rt_buffer_get_64, (%rd334, %r27, %r272, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs216, %rs217, %rs218, %rs219}, [%rd333];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1592, %rs216;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1593, %rs217;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1594, %rs218;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd339), _rt_buffer_get_64, (%rd334, %r27, %r272, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1595, %f1592, 0f00000000;
|
|
add.f32 %f1596, %f1593, 0f00000000;
|
|
add.f32 %f1597, %f1594, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs215, %f1597;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs214, %f1596;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs213, %f1595;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs220, 0;
|
|
st.v4.u16 [%rd339], {%rs213, %rs214, %rs215, %rs220};
|
|
bra.uni BB0_143;
|
|
|
|
BB0_142:
|
|
mov.u64 %rd352, image_RNM2;
|
|
cvta.global.u64 %rd347, %rd352;
|
|
mov.u32 %r274, 8;
|
|
// inline asm
|
|
call (%rd346), _rt_buffer_get_64, (%rd347, %r27, %r274, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1598, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs221, %f1598;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs222, 0;
|
|
st.v4.u16 [%rd346], {%rs221, %rs221, %rs221, %rs222};
|
|
|
|
BB0_143:
|
|
ld.global.u32 %r275, [additive];
|
|
setp.eq.s32 %p141, %r275, 0;
|
|
@%p141 bra BB0_145;
|
|
|
|
mov.u64 %rd365, image_RNM3;
|
|
cvta.global.u64 %rd354, %rd365;
|
|
mov.u32 %r279, 8;
|
|
// inline asm
|
|
call (%rd353), _rt_buffer_get_64, (%rd354, %r27, %r279, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs229, %rs230, %rs231, %rs232}, [%rd353];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1599, %rs229;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1600, %rs230;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1601, %rs231;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd359), _rt_buffer_get_64, (%rd354, %r27, %r279, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1602, %f1599, 0f00000000;
|
|
add.f32 %f1603, %f1600, 0f00000000;
|
|
add.f32 %f1604, %f1601, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs228, %f1604;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs227, %f1603;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs226, %f1602;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs233, 0;
|
|
st.v4.u16 [%rd359], {%rs226, %rs227, %rs228, %rs233};
|
|
bra.uni BB0_146;
|
|
|
|
BB0_145:
|
|
mov.u64 %rd372, image_RNM3;
|
|
cvta.global.u64 %rd367, %rd372;
|
|
mov.u32 %r281, 8;
|
|
// inline asm
|
|
call (%rd366), _rt_buffer_get_64, (%rd367, %r27, %r281, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1605, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs234, %f1605;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs235, 0;
|
|
st.v4.u16 [%rd366], {%rs234, %rs234, %rs234, %rs235};
|
|
|
|
BB0_146:
|
|
ld.global.u32 %r282, [additive];
|
|
setp.eq.s32 %p142, %r282, 0;
|
|
@%p142 bra BB0_148;
|
|
|
|
mov.u64 %rd385, image_RNM4;
|
|
cvta.global.u64 %rd374, %rd385;
|
|
mov.u32 %r286, 8;
|
|
// inline asm
|
|
call (%rd373), _rt_buffer_get_64, (%rd374, %r27, %r286, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs242, %rs243, %rs244, %rs245}, [%rd373];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1606, %rs242;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1607, %rs243;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1608, %rs244;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd379), _rt_buffer_get_64, (%rd374, %r27, %r286, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1609, %f1606, 0f00000000;
|
|
add.f32 %f1610, %f1607, 0f00000000;
|
|
add.f32 %f1611, %f1608, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs241, %f1611;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs240, %f1610;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs239, %f1609;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs246, 0;
|
|
st.v4.u16 [%rd379], {%rs239, %rs240, %rs241, %rs246};
|
|
bra.uni BB0_149;
|
|
|
|
BB0_148:
|
|
mov.u64 %rd392, image_RNM4;
|
|
cvta.global.u64 %rd387, %rd392;
|
|
mov.u32 %r288, 8;
|
|
// inline asm
|
|
call (%rd386), _rt_buffer_get_64, (%rd387, %r27, %r288, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1612, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs247, %f1612;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs248, 0;
|
|
st.v4.u16 [%rd386], {%rs247, %rs247, %rs247, %rs248};
|
|
|
|
BB0_149:
|
|
ld.global.u32 %r289, [additive];
|
|
setp.eq.s32 %p143, %r289, 0;
|
|
@%p143 bra BB0_151;
|
|
|
|
mov.u64 %rd405, image_RNM5;
|
|
cvta.global.u64 %rd394, %rd405;
|
|
mov.u32 %r293, 8;
|
|
// inline asm
|
|
call (%rd393), _rt_buffer_get_64, (%rd394, %r27, %r293, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs255, %rs256, %rs257, %rs258}, [%rd393];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1613, %rs255;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1614, %rs256;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1615, %rs257;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd399), _rt_buffer_get_64, (%rd394, %r27, %r293, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1616, %f1613, 0f00000000;
|
|
add.f32 %f1617, %f1614, 0f00000000;
|
|
add.f32 %f1618, %f1615, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs254, %f1618;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs253, %f1617;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs252, %f1616;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs259, 0;
|
|
st.v4.u16 [%rd399], {%rs252, %rs253, %rs254, %rs259};
|
|
bra.uni BB0_152;
|
|
|
|
BB0_151:
|
|
mov.u64 %rd412, image_RNM5;
|
|
cvta.global.u64 %rd407, %rd412;
|
|
mov.u32 %r295, 8;
|
|
// inline asm
|
|
call (%rd406), _rt_buffer_get_64, (%rd407, %r27, %r295, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1619, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs260, %f1619;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs261, 0;
|
|
st.v4.u16 [%rd406], {%rs260, %rs260, %rs260, %rs261};
|
|
|
|
BB0_152:
|
|
ld.global.u32 %r296, [additive];
|
|
setp.eq.s32 %p144, %r296, 0;
|
|
@%p144 bra BB0_154;
|
|
|
|
mov.u64 %rd425, image_RNM6;
|
|
cvta.global.u64 %rd414, %rd425;
|
|
mov.u32 %r300, 8;
|
|
// inline asm
|
|
call (%rd413), _rt_buffer_get_64, (%rd414, %r27, %r300, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs268, %rs269, %rs270, %rs271}, [%rd413];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1620, %rs268;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1621, %rs269;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1622, %rs270;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd419), _rt_buffer_get_64, (%rd414, %r27, %r300, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1623, %f1620, 0f00000000;
|
|
add.f32 %f1624, %f1621, 0f00000000;
|
|
add.f32 %f1625, %f1622, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs267, %f1625;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs266, %f1624;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs265, %f1623;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs272, 0;
|
|
st.v4.u16 [%rd419], {%rs265, %rs266, %rs267, %rs272};
|
|
bra.uni BB0_155;
|
|
|
|
BB0_154:
|
|
mov.u64 %rd432, image_RNM6;
|
|
cvta.global.u64 %rd427, %rd432;
|
|
mov.u32 %r302, 8;
|
|
// inline asm
|
|
call (%rd426), _rt_buffer_get_64, (%rd427, %r27, %r302, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1626, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs273, %f1626;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs274, 0;
|
|
st.v4.u16 [%rd426], {%rs273, %rs273, %rs273, %rs274};
|
|
|
|
BB0_155:
|
|
ld.global.u32 %r303, [additive];
|
|
setp.eq.s32 %p145, %r303, 0;
|
|
@%p145 bra BB0_157;
|
|
|
|
mov.u64 %rd445, image_RNM7;
|
|
cvta.global.u64 %rd434, %rd445;
|
|
mov.u32 %r307, 8;
|
|
// inline asm
|
|
call (%rd433), _rt_buffer_get_64, (%rd434, %r27, %r307, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs281, %rs282, %rs283, %rs284}, [%rd433];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1627, %rs281;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1628, %rs282;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1629, %rs283;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd439), _rt_buffer_get_64, (%rd434, %r27, %r307, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1630, %f1627, 0f00000000;
|
|
add.f32 %f1631, %f1628, 0f00000000;
|
|
add.f32 %f1632, %f1629, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs280, %f1632;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs279, %f1631;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs278, %f1630;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs285, 0;
|
|
st.v4.u16 [%rd439], {%rs278, %rs279, %rs280, %rs285};
|
|
bra.uni BB0_158;
|
|
|
|
BB0_157:
|
|
mov.u64 %rd452, image_RNM7;
|
|
cvta.global.u64 %rd447, %rd452;
|
|
mov.u32 %r309, 8;
|
|
// inline asm
|
|
call (%rd446), _rt_buffer_get_64, (%rd447, %r27, %r309, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1633, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs286, %f1633;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs287, 0;
|
|
st.v4.u16 [%rd446], {%rs286, %rs286, %rs286, %rs287};
|
|
|
|
BB0_158:
|
|
ld.global.u32 %r310, [additive];
|
|
setp.eq.s32 %p146, %r310, 0;
|
|
@%p146 bra BB0_160;
|
|
|
|
mov.u64 %rd465, image_RNM8;
|
|
cvta.global.u64 %rd454, %rd465;
|
|
mov.u32 %r314, 8;
|
|
// inline asm
|
|
call (%rd453), _rt_buffer_get_64, (%rd454, %r27, %r314, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs294, %rs295, %rs296, %rs297}, [%rd453];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1634, %rs294;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1635, %rs295;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1636, %rs296;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd459), _rt_buffer_get_64, (%rd454, %r27, %r314, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1637, %f1634, 0f00000000;
|
|
add.f32 %f1638, %f1635, 0f00000000;
|
|
add.f32 %f1639, %f1636, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs293, %f1639;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs292, %f1638;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs291, %f1637;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs298, 0;
|
|
st.v4.u16 [%rd459], {%rs291, %rs292, %rs293, %rs298};
|
|
bra.uni BB0_161;
|
|
|
|
BB0_160:
|
|
mov.u64 %rd472, image_RNM8;
|
|
cvta.global.u64 %rd467, %rd472;
|
|
mov.u32 %r316, 8;
|
|
// inline asm
|
|
call (%rd466), _rt_buffer_get_64, (%rd467, %r27, %r316, %rd5, %rd6, %rd12, %rd12);
|
|
// inline asm
|
|
mov.f32 %f1640, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs299, %f1640;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs300, 0;
|
|
st.v4.u16 [%rd466], {%rs299, %rs299, %rs299, %rs300};
|
|
bra.uni BB0_161;
|
|
|
|
BB0_51:
|
|
setp.geu.f32 %p67, %f326, 0f00000000;
|
|
@%p67 bra BB0_54;
|
|
|
|
cvt.rzi.f32.f32 %f1219, %f1191;
|
|
setp.neu.f32 %p68, %f1219, 0f3EE8BA2E;
|
|
selp.f32 %f1802, 0f7FFFFFFF, %f1802, %p68;
|
|
|
|
BB0_54:
|
|
add.f32 %f1221, %f328, 0f3EE8BA2E;
|
|
mov.b32 %r133, %f1221;
|
|
setp.lt.s32 %p70, %r133, 2139095040;
|
|
@%p70 bra BB0_59;
|
|
|
|
setp.gtu.f32 %p71, %f328, 0f7F800000;
|
|
@%p71 bra BB0_58;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_58:
|
|
add.f32 %f1802, %f326, 0f3EE8BA2E;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_56:
|
|
setp.neu.f32 %p72, %f328, 0f7F800000;
|
|
@%p72 bra BB0_59;
|
|
|
|
selp.f32 %f1802, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_59:
|
|
mul.f32 %f1222, %f1802, 0f437F0000;
|
|
setp.eq.f32 %p73, %f326, 0f3F800000;
|
|
selp.f32 %f1223, 0f437F0000, %f1222, %p73;
|
|
cvt.rzi.u32.f32 %r134, %f1223;
|
|
cvt.u16.u32 %rs22, %r134;
|
|
mov.u16 %rs23, 255;
|
|
st.v2.u8 [%rd45], {%rs22, %rs23};
|
|
ld.global.u32 %r324, [imageEnabled];
|
|
|
|
BB0_60:
|
|
and.b32 %r135, %r324, 1;
|
|
setp.eq.b32 %p74, %r135, 1;
|
|
@!%p74 bra BB0_95;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_61:
|
|
mov.f32 %f1226, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1227, %f1226;
|
|
fma.rn.f32 %f1228, %f1227, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f340, %f1228;
|
|
abs.f32 %f341, %f1677;
|
|
setp.lt.f32 %p75, %f341, 0f00800000;
|
|
mul.f32 %f1229, %f341, 0f4B800000;
|
|
selp.f32 %f1230, 0fC3170000, 0fC2FE0000, %p75;
|
|
selp.f32 %f1231, %f1229, %f341, %p75;
|
|
mov.b32 %r136, %f1231;
|
|
and.b32 %r137, %r136, 8388607;
|
|
or.b32 %r138, %r137, 1065353216;
|
|
mov.b32 %f1232, %r138;
|
|
shr.u32 %r139, %r136, 23;
|
|
cvt.rn.f32.u32 %f1233, %r139;
|
|
add.f32 %f1234, %f1230, %f1233;
|
|
setp.gt.f32 %p76, %f1232, 0f3FB504F3;
|
|
mul.f32 %f1235, %f1232, 0f3F000000;
|
|
add.f32 %f1236, %f1234, 0f3F800000;
|
|
selp.f32 %f1237, %f1235, %f1232, %p76;
|
|
selp.f32 %f1238, %f1236, %f1234, %p76;
|
|
add.f32 %f1239, %f1237, 0fBF800000;
|
|
add.f32 %f1225, %f1237, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1224,%f1225;
|
|
// inline asm
|
|
add.f32 %f1240, %f1239, %f1239;
|
|
mul.f32 %f1241, %f1224, %f1240;
|
|
mul.f32 %f1242, %f1241, %f1241;
|
|
mov.f32 %f1243, 0f3C4CAF63;
|
|
mov.f32 %f1244, 0f3B18F0FE;
|
|
fma.rn.f32 %f1245, %f1244, %f1242, %f1243;
|
|
mov.f32 %f1246, 0f3DAAAABD;
|
|
fma.rn.f32 %f1247, %f1245, %f1242, %f1246;
|
|
mul.rn.f32 %f1248, %f1247, %f1242;
|
|
mul.rn.f32 %f1249, %f1248, %f1241;
|
|
sub.f32 %f1250, %f1239, %f1241;
|
|
neg.f32 %f1251, %f1241;
|
|
add.f32 %f1252, %f1250, %f1250;
|
|
fma.rn.f32 %f1253, %f1251, %f1239, %f1252;
|
|
mul.rn.f32 %f1254, %f1224, %f1253;
|
|
add.f32 %f1255, %f1249, %f1241;
|
|
sub.f32 %f1256, %f1241, %f1255;
|
|
add.f32 %f1257, %f1249, %f1256;
|
|
add.f32 %f1258, %f1254, %f1257;
|
|
add.f32 %f1259, %f1255, %f1258;
|
|
sub.f32 %f1260, %f1255, %f1259;
|
|
add.f32 %f1261, %f1258, %f1260;
|
|
mov.f32 %f1262, 0f3F317200;
|
|
mul.rn.f32 %f1263, %f1238, %f1262;
|
|
mov.f32 %f1264, 0f35BFBE8E;
|
|
mul.rn.f32 %f1265, %f1238, %f1264;
|
|
add.f32 %f1266, %f1263, %f1259;
|
|
sub.f32 %f1267, %f1263, %f1266;
|
|
add.f32 %f1268, %f1259, %f1267;
|
|
add.f32 %f1269, %f1261, %f1268;
|
|
add.f32 %f1270, %f1265, %f1269;
|
|
add.f32 %f1271, %f1266, %f1270;
|
|
sub.f32 %f1272, %f1266, %f1271;
|
|
add.f32 %f1273, %f1270, %f1272;
|
|
mov.f32 %f1274, 0f3EE66666;
|
|
mul.rn.f32 %f1275, %f1274, %f1271;
|
|
neg.f32 %f1276, %f1275;
|
|
fma.rn.f32 %f1277, %f1274, %f1271, %f1276;
|
|
fma.rn.f32 %f1278, %f1274, %f1273, %f1277;
|
|
mov.f32 %f1279, 0f00000000;
|
|
fma.rn.f32 %f1280, %f1279, %f1271, %f1278;
|
|
add.rn.f32 %f1281, %f1275, %f1280;
|
|
neg.f32 %f1282, %f1281;
|
|
add.rn.f32 %f1283, %f1275, %f1282;
|
|
add.rn.f32 %f1284, %f1283, %f1280;
|
|
mov.b32 %r140, %f1281;
|
|
setp.eq.s32 %p77, %r140, 1118925336;
|
|
add.s32 %r141, %r140, -1;
|
|
mov.b32 %f1285, %r141;
|
|
add.f32 %f1286, %f1284, 0f37000000;
|
|
selp.f32 %f1287, %f1285, %f1281, %p77;
|
|
selp.f32 %f342, %f1286, %f1284, %p77;
|
|
mul.f32 %f1288, %f1287, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1289, %f1288;
|
|
mov.f32 %f1290, 0fBF317200;
|
|
fma.rn.f32 %f1291, %f1289, %f1290, %f1287;
|
|
mov.f32 %f1292, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1293, %f1289, %f1292, %f1291;
|
|
mul.f32 %f1294, %f1293, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1295, %f1294;
|
|
add.f32 %f1296, %f1289, 0f00000000;
|
|
ex2.approx.f32 %f1297, %f1296;
|
|
mul.f32 %f1298, %f1295, %f1297;
|
|
setp.lt.f32 %p78, %f1287, 0fC2D20000;
|
|
selp.f32 %f1299, 0f00000000, %f1298, %p78;
|
|
setp.gt.f32 %p79, %f1287, 0f42D20000;
|
|
selp.f32 %f1803, 0f7F800000, %f1299, %p79;
|
|
setp.eq.f32 %p80, %f1803, 0f7F800000;
|
|
@%p80 bra BB0_63;
|
|
|
|
fma.rn.f32 %f1803, %f1803, %f342, %f1803;
|
|
|
|
BB0_63:
|
|
setp.lt.f32 %p81, %f1677, 0f00000000;
|
|
setp.eq.f32 %p82, %f340, 0f3F800000;
|
|
and.pred %p5, %p81, %p82;
|
|
mov.b32 %r142, %f1803;
|
|
xor.b32 %r143, %r142, -2147483648;
|
|
mov.b32 %f1300, %r143;
|
|
selp.f32 %f1805, %f1300, %f1803, %p5;
|
|
setp.eq.f32 %p83, %f1677, 0f00000000;
|
|
@%p83 bra BB0_66;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_66:
|
|
add.f32 %f1303, %f1677, %f1677;
|
|
selp.f32 %f1805, %f1303, 0f00000000, %p82;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_64:
|
|
setp.geu.f32 %p84, %f1677, 0f00000000;
|
|
@%p84 bra BB0_67;
|
|
|
|
cvt.rzi.f32.f32 %f1302, %f1274;
|
|
setp.neu.f32 %p85, %f1302, 0f3EE66666;
|
|
selp.f32 %f1805, 0f7FFFFFFF, %f1805, %p85;
|
|
|
|
BB0_67:
|
|
add.f32 %f1304, %f341, 0f3EE66666;
|
|
mov.b32 %r144, %f1304;
|
|
setp.lt.s32 %p87, %r144, 2139095040;
|
|
@%p87 bra BB0_72;
|
|
|
|
setp.gtu.f32 %p88, %f341, 0f7F800000;
|
|
@%p88 bra BB0_71;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_71:
|
|
add.f32 %f1805, %f1677, 0f3EE66666;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_69:
|
|
setp.neu.f32 %p89, %f341, 0f7F800000;
|
|
@%p89 bra BB0_72;
|
|
|
|
selp.f32 %f1805, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_72:
|
|
setp.eq.f32 %p90, %f1677, 0f3F800000;
|
|
selp.f32 %f353, 0f3F800000, %f1805, %p90;
|
|
abs.f32 %f354, %f1676;
|
|
setp.lt.f32 %p91, %f354, 0f00800000;
|
|
mul.f32 %f1307, %f354, 0f4B800000;
|
|
selp.f32 %f1308, 0fC3170000, 0fC2FE0000, %p91;
|
|
selp.f32 %f1309, %f1307, %f354, %p91;
|
|
mov.b32 %r145, %f1309;
|
|
and.b32 %r146, %r145, 8388607;
|
|
or.b32 %r147, %r146, 1065353216;
|
|
mov.b32 %f1310, %r147;
|
|
shr.u32 %r148, %r145, 23;
|
|
cvt.rn.f32.u32 %f1311, %r148;
|
|
add.f32 %f1312, %f1308, %f1311;
|
|
setp.gt.f32 %p92, %f1310, 0f3FB504F3;
|
|
mul.f32 %f1313, %f1310, 0f3F000000;
|
|
add.f32 %f1314, %f1312, 0f3F800000;
|
|
selp.f32 %f1315, %f1313, %f1310, %p92;
|
|
selp.f32 %f1316, %f1314, %f1312, %p92;
|
|
add.f32 %f1317, %f1315, 0fBF800000;
|
|
add.f32 %f1306, %f1315, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1305,%f1306;
|
|
// inline asm
|
|
add.f32 %f1318, %f1317, %f1317;
|
|
mul.f32 %f1319, %f1305, %f1318;
|
|
mul.f32 %f1320, %f1319, %f1319;
|
|
fma.rn.f32 %f1323, %f1244, %f1320, %f1243;
|
|
fma.rn.f32 %f1325, %f1323, %f1320, %f1246;
|
|
mul.rn.f32 %f1326, %f1325, %f1320;
|
|
mul.rn.f32 %f1327, %f1326, %f1319;
|
|
sub.f32 %f1328, %f1317, %f1319;
|
|
neg.f32 %f1329, %f1319;
|
|
add.f32 %f1330, %f1328, %f1328;
|
|
fma.rn.f32 %f1331, %f1329, %f1317, %f1330;
|
|
mul.rn.f32 %f1332, %f1305, %f1331;
|
|
add.f32 %f1333, %f1327, %f1319;
|
|
sub.f32 %f1334, %f1319, %f1333;
|
|
add.f32 %f1335, %f1327, %f1334;
|
|
add.f32 %f1336, %f1332, %f1335;
|
|
add.f32 %f1337, %f1333, %f1336;
|
|
sub.f32 %f1338, %f1333, %f1337;
|
|
add.f32 %f1339, %f1336, %f1338;
|
|
mul.rn.f32 %f1341, %f1316, %f1262;
|
|
mul.rn.f32 %f1343, %f1316, %f1264;
|
|
add.f32 %f1344, %f1341, %f1337;
|
|
sub.f32 %f1345, %f1341, %f1344;
|
|
add.f32 %f1346, %f1337, %f1345;
|
|
add.f32 %f1347, %f1339, %f1346;
|
|
add.f32 %f1348, %f1343, %f1347;
|
|
add.f32 %f1349, %f1344, %f1348;
|
|
sub.f32 %f1350, %f1344, %f1349;
|
|
add.f32 %f1351, %f1348, %f1350;
|
|
mul.rn.f32 %f1353, %f1274, %f1349;
|
|
neg.f32 %f1354, %f1353;
|
|
fma.rn.f32 %f1355, %f1274, %f1349, %f1354;
|
|
fma.rn.f32 %f1356, %f1274, %f1351, %f1355;
|
|
fma.rn.f32 %f1358, %f1279, %f1349, %f1356;
|
|
add.rn.f32 %f1359, %f1353, %f1358;
|
|
neg.f32 %f1360, %f1359;
|
|
add.rn.f32 %f1361, %f1353, %f1360;
|
|
add.rn.f32 %f1362, %f1361, %f1358;
|
|
mov.b32 %r149, %f1359;
|
|
setp.eq.s32 %p93, %r149, 1118925336;
|
|
add.s32 %r150, %r149, -1;
|
|
mov.b32 %f1363, %r150;
|
|
add.f32 %f1364, %f1362, 0f37000000;
|
|
selp.f32 %f1365, %f1363, %f1359, %p93;
|
|
selp.f32 %f355, %f1364, %f1362, %p93;
|
|
mul.f32 %f1366, %f1365, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1367, %f1366;
|
|
fma.rn.f32 %f1369, %f1367, %f1290, %f1365;
|
|
fma.rn.f32 %f1371, %f1367, %f1292, %f1369;
|
|
mul.f32 %f1372, %f1371, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1373, %f1372;
|
|
add.f32 %f1374, %f1367, 0f00000000;
|
|
ex2.approx.f32 %f1375, %f1374;
|
|
mul.f32 %f1376, %f1373, %f1375;
|
|
setp.lt.f32 %p94, %f1365, 0fC2D20000;
|
|
selp.f32 %f1377, 0f00000000, %f1376, %p94;
|
|
setp.gt.f32 %p95, %f1365, 0f42D20000;
|
|
selp.f32 %f1806, 0f7F800000, %f1377, %p95;
|
|
setp.eq.f32 %p96, %f1806, 0f7F800000;
|
|
@%p96 bra BB0_74;
|
|
|
|
fma.rn.f32 %f1806, %f1806, %f355, %f1806;
|
|
|
|
BB0_74:
|
|
setp.lt.f32 %p97, %f1676, 0f00000000;
|
|
and.pred %p6, %p97, %p82;
|
|
mov.b32 %r151, %f1806;
|
|
xor.b32 %r152, %r151, -2147483648;
|
|
mov.b32 %f1378, %r152;
|
|
selp.f32 %f1808, %f1378, %f1806, %p6;
|
|
setp.eq.f32 %p99, %f1676, 0f00000000;
|
|
@%p99 bra BB0_77;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_77:
|
|
add.f32 %f1381, %f1676, %f1676;
|
|
selp.f32 %f1808, %f1381, 0f00000000, %p82;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_75:
|
|
setp.geu.f32 %p100, %f1676, 0f00000000;
|
|
@%p100 bra BB0_78;
|
|
|
|
cvt.rzi.f32.f32 %f1380, %f1274;
|
|
setp.neu.f32 %p101, %f1380, 0f3EE66666;
|
|
selp.f32 %f1808, 0f7FFFFFFF, %f1808, %p101;
|
|
|
|
BB0_78:
|
|
add.f32 %f1382, %f354, 0f3EE66666;
|
|
mov.b32 %r153, %f1382;
|
|
setp.lt.s32 %p103, %r153, 2139095040;
|
|
@%p103 bra BB0_83;
|
|
|
|
setp.gtu.f32 %p104, %f354, 0f7F800000;
|
|
@%p104 bra BB0_82;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_82:
|
|
add.f32 %f1808, %f1676, 0f3EE66666;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_80:
|
|
setp.neu.f32 %p105, %f354, 0f7F800000;
|
|
@%p105 bra BB0_83;
|
|
|
|
selp.f32 %f1808, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_83:
|
|
setp.eq.f32 %p106, %f1676, 0f3F800000;
|
|
selp.f32 %f366, 0f3F800000, %f1808, %p106;
|
|
abs.f32 %f367, %f1675;
|
|
setp.lt.f32 %p107, %f367, 0f00800000;
|
|
mul.f32 %f1385, %f367, 0f4B800000;
|
|
selp.f32 %f1386, 0fC3170000, 0fC2FE0000, %p107;
|
|
selp.f32 %f1387, %f1385, %f367, %p107;
|
|
mov.b32 %r154, %f1387;
|
|
and.b32 %r155, %r154, 8388607;
|
|
or.b32 %r156, %r155, 1065353216;
|
|
mov.b32 %f1388, %r156;
|
|
shr.u32 %r157, %r154, 23;
|
|
cvt.rn.f32.u32 %f1389, %r157;
|
|
add.f32 %f1390, %f1386, %f1389;
|
|
setp.gt.f32 %p108, %f1388, 0f3FB504F3;
|
|
mul.f32 %f1391, %f1388, 0f3F000000;
|
|
add.f32 %f1392, %f1390, 0f3F800000;
|
|
selp.f32 %f1393, %f1391, %f1388, %p108;
|
|
selp.f32 %f1394, %f1392, %f1390, %p108;
|
|
add.f32 %f1395, %f1393, 0fBF800000;
|
|
add.f32 %f1384, %f1393, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1383,%f1384;
|
|
// inline asm
|
|
add.f32 %f1396, %f1395, %f1395;
|
|
mul.f32 %f1397, %f1383, %f1396;
|
|
mul.f32 %f1398, %f1397, %f1397;
|
|
fma.rn.f32 %f1401, %f1244, %f1398, %f1243;
|
|
fma.rn.f32 %f1403, %f1401, %f1398, %f1246;
|
|
mul.rn.f32 %f1404, %f1403, %f1398;
|
|
mul.rn.f32 %f1405, %f1404, %f1397;
|
|
sub.f32 %f1406, %f1395, %f1397;
|
|
neg.f32 %f1407, %f1397;
|
|
add.f32 %f1408, %f1406, %f1406;
|
|
fma.rn.f32 %f1409, %f1407, %f1395, %f1408;
|
|
mul.rn.f32 %f1410, %f1383, %f1409;
|
|
add.f32 %f1411, %f1405, %f1397;
|
|
sub.f32 %f1412, %f1397, %f1411;
|
|
add.f32 %f1413, %f1405, %f1412;
|
|
add.f32 %f1414, %f1410, %f1413;
|
|
add.f32 %f1415, %f1411, %f1414;
|
|
sub.f32 %f1416, %f1411, %f1415;
|
|
add.f32 %f1417, %f1414, %f1416;
|
|
mul.rn.f32 %f1419, %f1394, %f1262;
|
|
mul.rn.f32 %f1421, %f1394, %f1264;
|
|
add.f32 %f1422, %f1419, %f1415;
|
|
sub.f32 %f1423, %f1419, %f1422;
|
|
add.f32 %f1424, %f1415, %f1423;
|
|
add.f32 %f1425, %f1417, %f1424;
|
|
add.f32 %f1426, %f1421, %f1425;
|
|
add.f32 %f1427, %f1422, %f1426;
|
|
sub.f32 %f1428, %f1422, %f1427;
|
|
add.f32 %f1429, %f1426, %f1428;
|
|
mul.rn.f32 %f1431, %f1274, %f1427;
|
|
neg.f32 %f1432, %f1431;
|
|
fma.rn.f32 %f1433, %f1274, %f1427, %f1432;
|
|
fma.rn.f32 %f1434, %f1274, %f1429, %f1433;
|
|
fma.rn.f32 %f1436, %f1279, %f1427, %f1434;
|
|
add.rn.f32 %f1437, %f1431, %f1436;
|
|
neg.f32 %f1438, %f1437;
|
|
add.rn.f32 %f1439, %f1431, %f1438;
|
|
add.rn.f32 %f1440, %f1439, %f1436;
|
|
mov.b32 %r158, %f1437;
|
|
setp.eq.s32 %p109, %r158, 1118925336;
|
|
add.s32 %r159, %r158, -1;
|
|
mov.b32 %f1441, %r159;
|
|
add.f32 %f1442, %f1440, 0f37000000;
|
|
selp.f32 %f1443, %f1441, %f1437, %p109;
|
|
selp.f32 %f368, %f1442, %f1440, %p109;
|
|
mul.f32 %f1444, %f1443, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1445, %f1444;
|
|
fma.rn.f32 %f1447, %f1445, %f1290, %f1443;
|
|
fma.rn.f32 %f1449, %f1445, %f1292, %f1447;
|
|
mul.f32 %f1450, %f1449, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1451, %f1450;
|
|
add.f32 %f1452, %f1445, 0f00000000;
|
|
ex2.approx.f32 %f1453, %f1452;
|
|
mul.f32 %f1454, %f1451, %f1453;
|
|
setp.lt.f32 %p110, %f1443, 0fC2D20000;
|
|
selp.f32 %f1455, 0f00000000, %f1454, %p110;
|
|
setp.gt.f32 %p111, %f1443, 0f42D20000;
|
|
selp.f32 %f1809, 0f7F800000, %f1455, %p111;
|
|
setp.eq.f32 %p112, %f1809, 0f7F800000;
|
|
@%p112 bra BB0_85;
|
|
|
|
fma.rn.f32 %f1809, %f1809, %f368, %f1809;
|
|
|
|
BB0_85:
|
|
setp.lt.f32 %p113, %f1675, 0f00000000;
|
|
and.pred %p7, %p113, %p82;
|
|
mov.b32 %r160, %f1809;
|
|
xor.b32 %r161, %r160, -2147483648;
|
|
mov.b32 %f1456, %r161;
|
|
selp.f32 %f1811, %f1456, %f1809, %p7;
|
|
setp.eq.f32 %p115, %f1675, 0f00000000;
|
|
@%p115 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f1459, %f1675, %f1675;
|
|
selp.f32 %f1811, %f1459, 0f00000000, %p82;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.geu.f32 %p116, %f1675, 0f00000000;
|
|
@%p116 bra BB0_89;
|
|
|
|
cvt.rzi.f32.f32 %f1458, %f1274;
|
|
setp.neu.f32 %p117, %f1458, 0f3EE66666;
|
|
selp.f32 %f1811, 0f7FFFFFFF, %f1811, %p117;
|
|
|
|
BB0_89:
|
|
add.f32 %f1460, %f367, 0f3EE66666;
|
|
mov.b32 %r162, %f1460;
|
|
setp.lt.s32 %p119, %r162, 2139095040;
|
|
@%p119 bra BB0_94;
|
|
|
|
setp.gtu.f32 %p120, %f367, 0f7F800000;
|
|
@%p120 bra BB0_93;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_93:
|
|
add.f32 %f1811, %f1675, 0f3EE66666;
|
|
bra.uni BB0_94;
|
|
|
|
BB0_91:
|
|
setp.neu.f32 %p121, %f367, 0f7F800000;
|
|
@%p121 bra BB0_94;
|
|
|
|
selp.f32 %f1811, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_94:
|
|
mov.u32 %r317, 4;
|
|
setp.eq.f32 %p122, %f1675, 0f3F800000;
|
|
selp.f32 %f1461, 0f3F800000, %f1811, %p122;
|
|
cvt.u64.u32 %rd55, %r3;
|
|
cvt.u64.u32 %rd54, %r2;
|
|
mov.u64 %rd58, image;
|
|
cvta.global.u64 %rd53, %rd58;
|
|
// inline asm
|
|
call (%rd52), _rt_buffer_get_64, (%rd53, %r27, %r317, %rd54, %rd55, %rd12, %rd12);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1462, %f1461;
|
|
mul.f32 %f1463, %f1462, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r165, %f1463;
|
|
cvt.sat.f32.f32 %f1464, %f366;
|
|
mul.f32 %f1465, %f1464, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r166, %f1465;
|
|
cvt.sat.f32.f32 %f1466, %f353;
|
|
mul.f32 %f1467, %f1466, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r167, %f1467;
|
|
cvt.u16.u32 %rs24, %r165;
|
|
cvt.u16.u32 %rs25, %r167;
|
|
cvt.u16.u32 %rs26, %r166;
|
|
mov.u16 %rs27, 255;
|
|
st.v4.u8 [%rd52], {%rs24, %rs26, %rs25, %rs27};
|
|
ld.global.u32 %r324, [imageEnabled];
|
|
|
|
BB0_95:
|
|
cvt.u64.u32 %rd3, %r2;
|
|
cvt.u64.u32 %rd4, %r3;
|
|
and.b32 %r168, %r324, 4;
|
|
setp.eq.s32 %p123, %r168, 0;
|
|
@%p123 bra BB0_99;
|
|
|
|
ld.global.u32 %r169, [additive];
|
|
setp.eq.s32 %p124, %r169, 0;
|
|
mov.f32 %f1468, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1468;}
|
|
|
|
// inline asm
|
|
@%p124 bra BB0_98;
|
|
|
|
mov.u64 %rd71, image_HDR;
|
|
cvta.global.u64 %rd60, %rd71;
|
|
mov.u32 %r173, 8;
|
|
// inline asm
|
|
call (%rd59), _rt_buffer_get_64, (%rd60, %r27, %r173, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs35, %rs36, %rs37, %rs38}, [%rd59];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1469, %rs35;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1470, %rs36;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1471, %rs37;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd65), _rt_buffer_get_64, (%rd60, %r27, %r173, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1472, %f1677, %f1469;
|
|
add.f32 %f1473, %f1676, %f1470;
|
|
add.f32 %f1474, %f1675, %f1471;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f1474;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f1473;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f1472;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd65], {%rs32, %rs33, %rs34, %rs28};
|
|
bra.uni BB0_99;
|
|
|
|
BB0_98:
|
|
mov.u64 %rd78, image_HDR;
|
|
cvta.global.u64 %rd73, %rd78;
|
|
mov.u32 %r175, 8;
|
|
// inline asm
|
|
call (%rd72), _rt_buffer_get_64, (%rd73, %r27, %r175, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f1675;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs40, %f1676;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs39, %f1677;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd72], {%rs39, %rs40, %rs41, %rs28};
|
|
|
|
BB0_99:
|
|
mul.f32 %f379, %f1674, 0f3F558750;
|
|
mul.f32 %f380, %f1673, 0f3F558750;
|
|
mul.f32 %f381, %f1672, 0f3F558750;
|
|
ld.global.u32 %r176, [additive];
|
|
setp.eq.s32 %p125, %r176, 0;
|
|
mov.f32 %f1478, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1478;}
|
|
|
|
// inline asm
|
|
@%p125 bra BB0_101;
|
|
|
|
mov.u64 %rd91, image_RNM0;
|
|
cvta.global.u64 %rd80, %rd91;
|
|
mov.u32 %r180, 8;
|
|
// inline asm
|
|
call (%rd79), _rt_buffer_get_64, (%rd80, %r27, %r180, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs49, %rs50, %rs51, %rs52}, [%rd79];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1479, %rs49;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1480, %rs50;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1481, %rs51;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd85), _rt_buffer_get_64, (%rd80, %r27, %r180, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1482, %f379, %f1479;
|
|
add.f32 %f1483, %f380, %f1480;
|
|
add.f32 %f1484, %f381, %f1481;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f1484;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs47, %f1483;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f1482;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd85], {%rs46, %rs47, %rs48, %rs42};
|
|
bra.uni BB0_102;
|
|
|
|
BB0_101:
|
|
mov.u64 %rd98, image_RNM0;
|
|
cvta.global.u64 %rd93, %rd98;
|
|
mov.u32 %r182, 8;
|
|
// inline asm
|
|
call (%rd92), _rt_buffer_get_64, (%rd93, %r27, %r182, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f381;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f380;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f379;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd92], {%rs53, %rs54, %rs55, %rs42};
|
|
|
|
BB0_102:
|
|
mul.f32 %f382, %f1671, 0f3FB8EBD1;
|
|
mul.f32 %f383, %f1670, 0f3FB8EBD1;
|
|
mul.f32 %f384, %f1669, 0f3FB8EBD1;
|
|
ld.global.u32 %r183, [additive];
|
|
setp.eq.s32 %p126, %r183, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1478;}
|
|
|
|
// inline asm
|
|
@%p126 bra BB0_104;
|
|
|
|
mov.u64 %rd111, image_RNM1;
|
|
cvta.global.u64 %rd100, %rd111;
|
|
mov.u32 %r187, 8;
|
|
// inline asm
|
|
call (%rd99), _rt_buffer_get_64, (%rd100, %r27, %r187, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs63, %rs64, %rs65, %rs66}, [%rd99];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1489, %rs63;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1490, %rs64;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1491, %rs65;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd105), _rt_buffer_get_64, (%rd100, %r27, %r187, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1492, %f382, %f1489;
|
|
add.f32 %f1493, %f383, %f1490;
|
|
add.f32 %f1494, %f384, %f1491;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f1494;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs61, %f1493;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1492;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd105], {%rs60, %rs61, %rs62, %rs56};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd118, image_RNM1;
|
|
cvta.global.u64 %rd113, %rd118;
|
|
mov.u32 %r189, 8;
|
|
// inline asm
|
|
call (%rd112), _rt_buffer_get_64, (%rd113, %r27, %r189, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f384;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs68, %f383;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f382;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd112], {%rs67, %rs68, %rs69, %rs56};
|
|
|
|
BB0_105:
|
|
mul.f32 %f385, %f1668, 0f3FB8EBD1;
|
|
mul.f32 %f386, %f1667, 0f3FB8EBD1;
|
|
mul.f32 %f387, %f1666, 0f3FB8EBD1;
|
|
ld.global.u32 %r190, [additive];
|
|
setp.eq.s32 %p127, %r190, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f1478;}
|
|
|
|
// inline asm
|
|
@%p127 bra BB0_107;
|
|
|
|
mov.u64 %rd131, image_RNM2;
|
|
cvta.global.u64 %rd120, %rd131;
|
|
mov.u32 %r194, 8;
|
|
// inline asm
|
|
call (%rd119), _rt_buffer_get_64, (%rd120, %r27, %r194, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs77, %rs78, %rs79, %rs80}, [%rd119];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1499, %rs77;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1500, %rs78;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1501, %rs79;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd125), _rt_buffer_get_64, (%rd120, %r27, %r194, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1502, %f385, %f1499;
|
|
add.f32 %f1503, %f386, %f1500;
|
|
add.f32 %f1504, %f387, %f1501;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f1504;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs75, %f1503;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1502;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd125], {%rs74, %rs75, %rs76, %rs70};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd138, image_RNM2;
|
|
cvta.global.u64 %rd133, %rd138;
|
|
mov.u32 %r196, 8;
|
|
// inline asm
|
|
call (%rd132), _rt_buffer_get_64, (%rd133, %r27, %r196, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f387;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f386;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f385;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd132], {%rs81, %rs82, %rs83, %rs70};
|
|
|
|
BB0_108:
|
|
mul.f32 %f388, %f1665, 0f3FB8EBD1;
|
|
mul.f32 %f389, %f1664, 0f3FB8EBD1;
|
|
mul.f32 %f390, %f1663, 0f3FB8EBD1;
|
|
ld.global.u32 %r197, [additive];
|
|
setp.eq.s32 %p128, %r197, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f1478;}
|
|
|
|
// inline asm
|
|
@%p128 bra BB0_110;
|
|
|
|
mov.u64 %rd151, image_RNM3;
|
|
cvta.global.u64 %rd140, %rd151;
|
|
mov.u32 %r201, 8;
|
|
// inline asm
|
|
call (%rd139), _rt_buffer_get_64, (%rd140, %r27, %r201, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs91, %rs92, %rs93, %rs94}, [%rd139];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1509, %rs91;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1510, %rs92;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1511, %rs93;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd145), _rt_buffer_get_64, (%rd140, %r27, %r201, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1512, %f388, %f1509;
|
|
add.f32 %f1513, %f389, %f1510;
|
|
add.f32 %f1514, %f390, %f1511;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f1514;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1513;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1512;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd145], {%rs88, %rs89, %rs90, %rs84};
|
|
bra.uni BB0_111;
|
|
|
|
BB0_110:
|
|
mov.u64 %rd158, image_RNM3;
|
|
cvta.global.u64 %rd153, %rd158;
|
|
mov.u32 %r203, 8;
|
|
// inline asm
|
|
call (%rd152), _rt_buffer_get_64, (%rd153, %r27, %r203, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f390;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f389;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f388;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd152], {%rs95, %rs96, %rs97, %rs84};
|
|
|
|
BB0_111:
|
|
mul.f32 %f391, %f1662, 0f404EBF87;
|
|
mul.f32 %f392, %f1661, 0f404EBF87;
|
|
mul.f32 %f393, %f1660, 0f404EBF87;
|
|
ld.global.u32 %r204, [additive];
|
|
setp.eq.s32 %p129, %r204, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs98, %f1478;}
|
|
|
|
// inline asm
|
|
@%p129 bra BB0_113;
|
|
|
|
mov.u64 %rd171, image_RNM4;
|
|
cvta.global.u64 %rd160, %rd171;
|
|
mov.u32 %r208, 8;
|
|
// inline asm
|
|
call (%rd159), _rt_buffer_get_64, (%rd160, %r27, %r208, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs105, %rs106, %rs107, %rs108}, [%rd159];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1519, %rs105;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1520, %rs106;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1521, %rs107;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd165), _rt_buffer_get_64, (%rd160, %r27, %r208, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1522, %f391, %f1519;
|
|
add.f32 %f1523, %f392, %f1520;
|
|
add.f32 %f1524, %f393, %f1521;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1524;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1523;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1522;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd165], {%rs102, %rs103, %rs104, %rs98};
|
|
bra.uni BB0_114;
|
|
|
|
BB0_113:
|
|
mov.u64 %rd178, image_RNM4;
|
|
cvta.global.u64 %rd173, %rd178;
|
|
mov.u32 %r210, 8;
|
|
// inline asm
|
|
call (%rd172), _rt_buffer_get_64, (%rd173, %r27, %r210, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f393;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f392;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f391;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd172], {%rs109, %rs110, %rs111, %rs98};
|
|
|
|
BB0_114:
|
|
mul.f32 %f394, %f1659, 0f404EBF87;
|
|
mul.f32 %f395, %f1658, 0f404EBF87;
|
|
mul.f32 %f396, %f1657, 0f404EBF87;
|
|
ld.global.u32 %r211, [additive];
|
|
setp.eq.s32 %p130, %r211, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1478;}
|
|
|
|
// inline asm
|
|
@%p130 bra BB0_116;
|
|
|
|
mov.u64 %rd191, image_RNM5;
|
|
cvta.global.u64 %rd180, %rd191;
|
|
mov.u32 %r215, 8;
|
|
// inline asm
|
|
call (%rd179), _rt_buffer_get_64, (%rd180, %r27, %r215, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs119, %rs120, %rs121, %rs122}, [%rd179];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1529, %rs119;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1530, %rs120;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1531, %rs121;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd185), _rt_buffer_get_64, (%rd180, %r27, %r215, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1532, %f394, %f1529;
|
|
add.f32 %f1533, %f395, %f1530;
|
|
add.f32 %f1534, %f396, %f1531;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs118, %f1534;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs117, %f1533;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f1532;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd185], {%rs116, %rs117, %rs118, %rs112};
|
|
bra.uni BB0_117;
|
|
|
|
BB0_116:
|
|
mov.u64 %rd198, image_RNM5;
|
|
cvta.global.u64 %rd193, %rd198;
|
|
mov.u32 %r217, 8;
|
|
// inline asm
|
|
call (%rd192), _rt_buffer_get_64, (%rd193, %r27, %r217, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f396;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f395;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f394;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd192], {%rs123, %rs124, %rs125, %rs112};
|
|
|
|
BB0_117:
|
|
mul.f32 %f397, %f1656, 0f40330C94;
|
|
mul.f32 %f398, %f1655, 0f40330C94;
|
|
mul.f32 %f399, %f1654, 0f40330C94;
|
|
ld.global.u32 %r218, [additive];
|
|
setp.eq.s32 %p131, %r218, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1478;}
|
|
|
|
// inline asm
|
|
@%p131 bra BB0_119;
|
|
|
|
mov.u64 %rd211, image_RNM6;
|
|
cvta.global.u64 %rd200, %rd211;
|
|
mov.u32 %r222, 8;
|
|
// inline asm
|
|
call (%rd199), _rt_buffer_get_64, (%rd200, %r27, %r222, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs133, %rs134, %rs135, %rs136}, [%rd199];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1539, %rs133;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1540, %rs134;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1541, %rs135;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd205), _rt_buffer_get_64, (%rd200, %r27, %r222, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1542, %f397, %f1539;
|
|
add.f32 %f1543, %f398, %f1540;
|
|
add.f32 %f1544, %f399, %f1541;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1544;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs131, %f1543;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs130, %f1542;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd205], {%rs130, %rs131, %rs132, %rs126};
|
|
bra.uni BB0_120;
|
|
|
|
BB0_119:
|
|
mov.u64 %rd218, image_RNM6;
|
|
cvta.global.u64 %rd213, %rd218;
|
|
mov.u32 %r224, 8;
|
|
// inline asm
|
|
call (%rd212), _rt_buffer_get_64, (%rd213, %r27, %r224, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f399;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f398;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f397;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd212], {%rs137, %rs138, %rs139, %rs126};
|
|
|
|
BB0_120:
|
|
mul.f32 %f400, %f1653, 0f404EBF87;
|
|
mul.f32 %f401, %f1652, 0f404EBF87;
|
|
mul.f32 %f402, %f1651, 0f404EBF87;
|
|
ld.global.u32 %r225, [additive];
|
|
setp.eq.s32 %p132, %r225, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f1478;}
|
|
|
|
// inline asm
|
|
@%p132 bra BB0_122;
|
|
|
|
mov.u64 %rd231, image_RNM7;
|
|
cvta.global.u64 %rd220, %rd231;
|
|
mov.u32 %r229, 8;
|
|
// inline asm
|
|
call (%rd219), _rt_buffer_get_64, (%rd220, %r27, %r229, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs147, %rs148, %rs149, %rs150}, [%rd219];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1549, %rs147;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1550, %rs148;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1551, %rs149;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd225), _rt_buffer_get_64, (%rd220, %r27, %r229, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1552, %f400, %f1549;
|
|
add.f32 %f1553, %f401, %f1550;
|
|
add.f32 %f1554, %f402, %f1551;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1554;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1553;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs144, %f1552;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd225], {%rs144, %rs145, %rs146, %rs140};
|
|
bra.uni BB0_123;
|
|
|
|
BB0_122:
|
|
mov.u64 %rd238, image_RNM7;
|
|
cvta.global.u64 %rd233, %rd238;
|
|
mov.u32 %r231, 8;
|
|
// inline asm
|
|
call (%rd232), _rt_buffer_get_64, (%rd233, %r27, %r231, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f402;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f401;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f400;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd232], {%rs151, %rs152, %rs153, %rs140};
|
|
|
|
BB0_123:
|
|
mul.f32 %f403, %f1650, 0f3FCEBF87;
|
|
mul.f32 %f404, %f1649, 0f3FCEBF87;
|
|
mul.f32 %f405, %f1648, 0f3FCEBF87;
|
|
ld.global.u32 %r232, [additive];
|
|
setp.eq.s32 %p133, %r232, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs154, %f1478;}
|
|
|
|
// inline asm
|
|
@%p133 bra BB0_125;
|
|
|
|
mov.u64 %rd251, image_RNM8;
|
|
cvta.global.u64 %rd240, %rd251;
|
|
mov.u32 %r236, 8;
|
|
// inline asm
|
|
call (%rd239), _rt_buffer_get_64, (%rd240, %r27, %r236, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
ld.v4.u16 {%rs161, %rs162, %rs163, %rs164}, [%rd239];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1559, %rs161;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1560, %rs162;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1561, %rs163;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd245), _rt_buffer_get_64, (%rd240, %r27, %r236, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
add.f32 %f1562, %f403, %f1559;
|
|
add.f32 %f1563, %f404, %f1560;
|
|
add.f32 %f1564, %f405, %f1561;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs160, %f1564;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1563;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1562;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd245], {%rs158, %rs159, %rs160, %rs154};
|
|
bra.uni BB0_161;
|
|
|
|
BB0_125:
|
|
mov.u64 %rd258, image_RNM8;
|
|
cvta.global.u64 %rd253, %rd258;
|
|
mov.u32 %r238, 8;
|
|
// inline asm
|
|
call (%rd252), _rt_buffer_get_64, (%rd253, %r27, %r238, %rd3, %rd4, %rd12, %rd12);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs167, %f405;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs166, %f404;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs165, %f403;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd252], {%rs165, %rs166, %rs167, %rs154};
|
|
|
|
BB0_161:
|
|
ret;
|
|
}
|
|
|
|
|