1364 lines
39 KiB
Plaintext
1364 lines
39 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 8 .b8 texCoords[8];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 rnd_seeds[1];
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.global .align 1 .b8 lightmapDirect[1];
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.global .texref albedoTex;
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.global .align 4 .u32 samples;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[40];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<101>;
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.reg .b16 %rs<33>;
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.reg .f32 %f<601>;
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.reg .b32 %r<310>;
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.reg .b64 %rd<106>;
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mov.u64 %rd105, __local_depot0;
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cvta.local.u64 %SP, %rd105;
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ld.global.u32 %r1, [samples];
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ld.global.v2.u32 {%r96, %r97}, [pixelID];
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cvt.u64.u32 %rd17, %r96;
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cvt.u64.u32 %rd18, %r97;
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mov.u64 %rd21, uvnormal;
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cvta.global.u64 %rd16, %rd21;
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mov.u32 %r94, 2;
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mov.u32 %r95, 4;
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mov.u64 %rd20, 0;
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// inline asm
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call (%rd15), _rt_buffer_get_64, (%rd16, %r94, %r95, %rd17, %rd18, %rd20, %rd20);
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// inline asm
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ld.u32 %r2, [%rd15];
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shr.u32 %r100, %r2, 16;
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cvt.u16.u32 %rs1, %r100;
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and.b16 %rs2, %rs1, 255;
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cvt.u16.u32 %rs3, %r2;
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or.b16 %rs4, %rs3, %rs2;
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setp.eq.s16 %p6, %rs4, 0;
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mov.f32 %f568, 0f00000000;
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mov.f32 %f569, %f568;
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mov.f32 %f570, %f568;
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@%p6 bra BB0_2;
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ld.u8 %rs5, [%rd15+1];
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and.b16 %rs7, %rs3, 255;
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cvt.rn.f32.u16 %f125, %rs7;
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div.rn.f32 %f126, %f125, 0f437F0000;
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fma.rn.f32 %f127, %f126, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f128, %rs5;
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div.rn.f32 %f129, %f128, 0f437F0000;
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fma.rn.f32 %f130, %f129, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f131, %rs2;
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div.rn.f32 %f132, %f131, 0f437F0000;
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fma.rn.f32 %f133, %f132, 0f40000000, 0fBF800000;
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mul.f32 %f134, %f130, %f130;
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fma.rn.f32 %f135, %f127, %f127, %f134;
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fma.rn.f32 %f136, %f133, %f133, %f135;
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sqrt.rn.f32 %f137, %f136;
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rcp.rn.f32 %f138, %f137;
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mul.f32 %f568, %f127, %f138;
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mul.f32 %f569, %f130, %f138;
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mul.f32 %f570, %f133, %f138;
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BB0_2:
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ld.global.v2.u32 {%r101, %r102}, [pixelID];
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ld.global.v2.u32 {%r104, %r105}, [tileInfo];
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add.s32 %r3, %r101, %r104;
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add.s32 %r4, %r102, %r105;
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setp.eq.f32 %p7, %f569, 0f00000000;
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setp.eq.f32 %p8, %f568, 0f00000000;
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and.pred %p9, %p8, %p7;
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setp.eq.f32 %p10, %f570, 0f00000000;
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and.pred %p11, %p9, %p10;
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@%p11 bra BB0_96;
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bra.uni BB0_3;
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BB0_96:
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ld.global.u32 %r309, [imageEnabled];
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and.b32 %r267, %r309, 1;
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setp.eq.b32 %p97, %r267, 1;
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@!%p97 bra BB0_98;
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bra.uni BB0_97;
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BB0_97:
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cvt.u64.u32 %rd79, %r3;
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cvt.u64.u32 %rd80, %r4;
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mov.u64 %rd83, image;
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cvta.global.u64 %rd78, %rd83;
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// inline asm
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call (%rd77), _rt_buffer_get_64, (%rd78, %r94, %r95, %rd79, %rd80, %rd20, %rd20);
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// inline asm
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mov.u16 %rs28, 0;
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st.v4.u8 [%rd77], {%rs28, %rs28, %rs28, %rs28};
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ld.global.u32 %r309, [imageEnabled];
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BB0_98:
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and.b32 %r270, %r309, 4;
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setp.eq.s32 %p98, %r270, 0;
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@%p98 bra BB0_100;
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cvt.u64.u32 %rd86, %r3;
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cvt.u64.u32 %rd87, %r4;
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mov.u64 %rd90, image_HDR;
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cvta.global.u64 %rd85, %rd90;
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mov.u32 %r272, 8;
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// inline asm
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call (%rd84), _rt_buffer_get_64, (%rd85, %r94, %r272, %rd86, %rd87, %rd20, %rd20);
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// inline asm
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mov.f32 %f536, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs29, %f536;}
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// inline asm
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mov.u16 %rs30, 0;
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st.v4.u16 [%rd84], {%rs29, %rs29, %rs29, %rs30};
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ld.global.u32 %r309, [imageEnabled];
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BB0_100:
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and.b32 %r273, %r309, 16;
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setp.eq.s32 %p99, %r273, 0;
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@%p99 bra BB0_102;
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cvt.u64.u32 %rd93, %r3;
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cvt.u64.u32 %rd94, %r4;
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mov.u64 %rd97, image_HDR2;
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cvta.global.u64 %rd92, %rd97;
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mov.u32 %r275, 8;
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// inline asm
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call (%rd91), _rt_buffer_get_64, (%rd92, %r94, %r275, %rd93, %rd94, %rd20, %rd20);
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// inline asm
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mov.f32 %f537, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs31, %f537;}
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// inline asm
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mov.u16 %rs32, 0;
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st.v4.u16 [%rd91], {%rs31, %rs31, %rs31, %rs32};
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bra.uni BB0_102;
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BB0_3:
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ld.global.v2.u32 {%r115, %r116}, [pixelID];
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cvt.u64.u32 %rd24, %r115;
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cvt.u64.u32 %rd25, %r116;
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mov.u64 %rd40, lightmapDirect;
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cvta.global.u64 %rd23, %rd40;
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mov.u32 %r110, 8;
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// inline asm
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call (%rd22), _rt_buffer_get_64, (%rd23, %r94, %r110, %rd24, %rd25, %rd20, %rd20);
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// inline asm
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ld.v4.u16 {%rs12, %rs13, %rs14, %rs15}, [%rd22];
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// inline asm
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{ cvt.f32.f16 %f139, %rs12;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f140, %rs13;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f141, %rs14;}
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// inline asm
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ld.global.v2.u32 {%r119, %r120}, [pixelID];
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cvt.u64.u32 %rd30, %r119;
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cvt.u64.u32 %rd31, %r120;
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mov.u64 %rd41, uvpos;
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cvta.global.u64 %rd29, %rd41;
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mov.u32 %r112, 12;
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// inline asm
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call (%rd28), _rt_buffer_get_64, (%rd29, %r94, %r112, %rd30, %rd31, %rd20, %rd20);
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// inline asm
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ld.f32 %f145, [%rd28+8];
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ld.f32 %f146, [%rd28+4];
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ld.f32 %f147, [%rd28];
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mul.f32 %f148, %f147, 0f3456BF95;
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mul.f32 %f149, %f146, 0f3456BF95;
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mul.f32 %f150, %f145, 0f3456BF95;
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abs.f32 %f151, %f568;
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div.rn.f32 %f152, %f148, %f151;
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abs.f32 %f153, %f569;
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div.rn.f32 %f154, %f149, %f153;
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abs.f32 %f155, %f570;
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div.rn.f32 %f156, %f150, %f155;
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abs.f32 %f157, %f152;
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abs.f32 %f158, %f154;
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abs.f32 %f159, %f156;
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mov.f32 %f160, 0f38D1B717;
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max.f32 %f161, %f157, %f160;
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max.f32 %f162, %f158, %f160;
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max.f32 %f163, %f159, %f160;
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fma.rn.f32 %f10, %f568, %f161, %f147;
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fma.rn.f32 %f11, %f569, %f162, %f146;
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fma.rn.f32 %f12, %f570, %f163, %f145;
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setp.gt.f32 %p12, %f151, %f155;
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neg.f32 %f164, %f569;
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selp.f32 %f165, %f164, 0f00000000, %p12;
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neg.f32 %f166, %f570;
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selp.f32 %f167, %f568, %f166, %p12;
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selp.f32 %f168, 0f00000000, %f569, %p12;
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mul.f32 %f169, %f167, %f167;
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fma.rn.f32 %f170, %f165, %f165, %f169;
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fma.rn.f32 %f171, %f168, %f168, %f170;
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sqrt.rn.f32 %f172, %f171;
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rcp.rn.f32 %f173, %f172;
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mul.f32 %f13, %f165, %f173;
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mul.f32 %f14, %f167, %f173;
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mul.f32 %f15, %f168, %f173;
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ld.global.v2.u32 {%r123, %r124}, [pixelID];
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cvt.u64.u32 %rd36, %r123;
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cvt.u64.u32 %rd37, %r124;
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mov.u64 %rd42, rnd_seeds;
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cvta.global.u64 %rd35, %rd42;
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// inline asm
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call (%rd34), _rt_buffer_get_64, (%rd35, %r94, %r95, %rd36, %rd37, %rd20, %rd20);
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// inline asm
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|
mov.f32 %f574, 0f00000000;
|
|
setp.lt.s32 %p13, %r1, 1;
|
|
mov.f32 %f575, %f574;
|
|
mov.f32 %f576, %f574;
|
|
@%p13 bra BB0_54;
|
|
|
|
cvt.rn.f32.s32 %f177, %r1;
|
|
rcp.rn.f32 %f16, %f177;
|
|
ld.u32 %r285, [%rd34];
|
|
mul.f32 %f17, %f10, 0f3456BF95;
|
|
mul.f32 %f18, %f11, 0f3456BF95;
|
|
mul.f32 %f19, %f12, 0f3456BF95;
|
|
mul.f32 %f178, %f568, %f14;
|
|
mul.f32 %f179, %f569, %f13;
|
|
sub.f32 %f20, %f179, %f178;
|
|
mul.f32 %f180, %f570, %f13;
|
|
mul.f32 %f181, %f568, %f15;
|
|
sub.f32 %f21, %f181, %f180;
|
|
mul.f32 %f182, %f569, %f15;
|
|
mul.f32 %f183, %f570, %f14;
|
|
sub.f32 %f22, %f183, %f182;
|
|
mov.f32 %f574, 0f00000000;
|
|
mov.u32 %r127, 0;
|
|
abs.f32 %f184, %f18;
|
|
abs.f32 %f185, %f17;
|
|
max.f32 %f186, %f185, %f184;
|
|
abs.f32 %f187, %f19;
|
|
max.f32 %f188, %f186, %f187;
|
|
mov.u32 %r282, %r127;
|
|
mov.f32 %f575, %f574;
|
|
mov.f32 %f576, %f574;
|
|
|
|
BB0_5:
|
|
cvt.rn.f32.s32 %f26, %r282;
|
|
max.f32 %f27, %f188, %f160;
|
|
mov.u32 %r284, %r127;
|
|
|
|
BB0_6:
|
|
mad.lo.s32 %r129, %r285, 1664525, 1013904223;
|
|
and.b32 %r130, %r129, 16777215;
|
|
cvt.rn.f32.u32 %f190, %r130;
|
|
fma.rn.f32 %f191, %f190, 0f33800000, %f26;
|
|
mul.f32 %f192, %f16, %f191;
|
|
mad.lo.s32 %r285, %r129, 1664525, 1013904223;
|
|
and.b32 %r131, %r285, 16777215;
|
|
cvt.rn.f32.u32 %f193, %r131;
|
|
cvt.rn.f32.s32 %f194, %r284;
|
|
fma.rn.f32 %f195, %f193, 0f33800000, %f194;
|
|
mul.f32 %f196, %f16, %f195;
|
|
sqrt.rn.f32 %f31, %f192;
|
|
mul.f32 %f583, %f196, 0f40C90FDB;
|
|
abs.f32 %f33, %f583;
|
|
setp.neu.f32 %p14, %f33, 0f7F800000;
|
|
mov.f32 %f577, %f583;
|
|
@%p14 bra BB0_8;
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|
|
|
mov.f32 %f197, 0f00000000;
|
|
mul.rn.f32 %f577, %f583, %f197;
|
|
|
|
BB0_8:
|
|
mul.f32 %f198, %f577, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r295, %f198;
|
|
cvt.rn.f32.s32 %f199, %r295;
|
|
neg.f32 %f200, %f199;
|
|
mov.f32 %f201, 0f3FC90FDA;
|
|
fma.rn.f32 %f202, %f200, %f201, %f577;
|
|
mov.f32 %f203, 0f33A22168;
|
|
fma.rn.f32 %f204, %f200, %f203, %f202;
|
|
mov.f32 %f205, 0f27C234C5;
|
|
fma.rn.f32 %f578, %f200, %f205, %f204;
|
|
abs.f32 %f206, %f577;
|
|
setp.leu.f32 %p15, %f206, 0f47CE4780;
|
|
@%p15 bra BB0_19;
|
|
|
|
mov.b32 %r12, %f577;
|
|
shr.u32 %r13, %r12, 23;
|
|
shl.b32 %r134, %r12, 8;
|
|
or.b32 %r14, %r134, -2147483648;
|
|
add.u64 %rd44, %SP, 0;
|
|
cvta.to.local.u64 %rd102, %rd44;
|
|
mov.u32 %r287, 0;
|
|
mov.u64 %rd101, __cudart_i2opi_f;
|
|
mov.u32 %r286, -6;
|
|
|
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BB0_10:
|
|
.pragma "nounroll";
|
|
ld.const.u32 %r137, [%rd101];
|
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// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r135, %r137, %r14, %r287;
|
|
madc.hi.u32 %r287, %r137, %r14, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd102], %r135;
|
|
add.s64 %rd102, %rd102, 4;
|
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add.s64 %rd101, %rd101, 4;
|
|
add.s32 %r286, %r286, 1;
|
|
setp.ne.s32 %p16, %r286, 0;
|
|
@%p16 bra BB0_10;
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|
|
|
and.b32 %r140, %r13, 255;
|
|
add.s32 %r141, %r140, -128;
|
|
shr.u32 %r142, %r141, 5;
|
|
and.b32 %r19, %r12, -2147483648;
|
|
cvta.to.local.u64 %rd46, %rd44;
|
|
st.local.u32 [%rd46+24], %r287;
|
|
mov.u32 %r143, 6;
|
|
sub.s32 %r144, %r143, %r142;
|
|
mul.wide.s32 %rd47, %r144, 4;
|
|
add.s64 %rd8, %rd46, %rd47;
|
|
ld.local.u32 %r288, [%rd8];
|
|
ld.local.u32 %r289, [%rd8+-4];
|
|
and.b32 %r22, %r13, 31;
|
|
setp.eq.s32 %p17, %r22, 0;
|
|
@%p17 bra BB0_13;
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|
|
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mov.u32 %r145, 32;
|
|
sub.s32 %r146, %r145, %r22;
|
|
shr.u32 %r147, %r289, %r146;
|
|
shl.b32 %r148, %r288, %r22;
|
|
add.s32 %r288, %r147, %r148;
|
|
ld.local.u32 %r149, [%rd8+-8];
|
|
shr.u32 %r150, %r149, %r146;
|
|
shl.b32 %r151, %r289, %r22;
|
|
add.s32 %r289, %r150, %r151;
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|
|
|
BB0_13:
|
|
shr.u32 %r152, %r289, 30;
|
|
shl.b32 %r153, %r288, 2;
|
|
add.s32 %r290, %r152, %r153;
|
|
shl.b32 %r28, %r289, 2;
|
|
shr.u32 %r154, %r290, 31;
|
|
shr.u32 %r155, %r288, 30;
|
|
add.s32 %r29, %r154, %r155;
|
|
setp.eq.s32 %p18, %r154, 0;
|
|
@%p18 bra BB0_14;
|
|
bra.uni BB0_15;
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|
|
|
BB0_14:
|
|
mov.u32 %r291, %r19;
|
|
mov.u32 %r292, %r28;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_15:
|
|
not.b32 %r156, %r290;
|
|
neg.s32 %r292, %r28;
|
|
setp.eq.s32 %p19, %r28, 0;
|
|
selp.u32 %r157, 1, 0, %p19;
|
|
add.s32 %r290, %r157, %r156;
|
|
xor.b32 %r291, %r19, -2147483648;
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|
|
|
BB0_16:
|
|
clz.b32 %r294, %r290;
|
|
setp.eq.s32 %p20, %r294, 0;
|
|
shl.b32 %r158, %r290, %r294;
|
|
mov.u32 %r159, 32;
|
|
sub.s32 %r160, %r159, %r294;
|
|
shr.u32 %r161, %r292, %r160;
|
|
add.s32 %r162, %r161, %r158;
|
|
selp.b32 %r37, %r290, %r162, %p20;
|
|
mov.u32 %r163, -921707870;
|
|
mul.hi.u32 %r293, %r37, %r163;
|
|
setp.eq.s32 %p21, %r19, 0;
|
|
neg.s32 %r164, %r29;
|
|
selp.b32 %r295, %r29, %r164, %p21;
|
|
setp.lt.s32 %p22, %r293, 1;
|
|
@%p22 bra BB0_18;
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|
|
|
mul.lo.s32 %r165, %r37, -921707870;
|
|
shr.u32 %r166, %r165, 31;
|
|
shl.b32 %r167, %r293, 1;
|
|
add.s32 %r293, %r166, %r167;
|
|
add.s32 %r294, %r294, 1;
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|
|
|
BB0_18:
|
|
mov.u32 %r168, 126;
|
|
sub.s32 %r169, %r168, %r294;
|
|
shl.b32 %r170, %r169, 23;
|
|
add.s32 %r171, %r293, 1;
|
|
shr.u32 %r172, %r171, 7;
|
|
add.s32 %r173, %r172, 1;
|
|
shr.u32 %r174, %r173, 1;
|
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add.s32 %r175, %r174, %r170;
|
|
or.b32 %r176, %r175, %r291;
|
|
mov.b32 %f578, %r176;
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|
|
|
BB0_19:
|
|
mul.rn.f32 %f39, %f578, %f578;
|
|
add.s32 %r45, %r295, 1;
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|
and.b32 %r46, %r45, 1;
|
|
setp.eq.s32 %p23, %r46, 0;
|
|
@%p23 bra BB0_21;
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bra.uni BB0_20;
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|
|
|
BB0_21:
|
|
mov.f32 %f209, 0f3C08839E;
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|
mov.f32 %f210, 0fB94CA1F9;
|
|
fma.rn.f32 %f579, %f210, %f39, %f209;
|
|
bra.uni BB0_22;
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|
|
|
BB0_20:
|
|
mov.f32 %f207, 0fBAB6061A;
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mov.f32 %f208, 0f37CCF5CE;
|
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fma.rn.f32 %f579, %f208, %f39, %f207;
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BB0_22:
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|
@%p23 bra BB0_24;
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|
bra.uni BB0_23;
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|
|
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BB0_24:
|
|
mov.f32 %f214, 0fBE2AAAA3;
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|
fma.rn.f32 %f215, %f579, %f39, %f214;
|
|
mov.f32 %f216, 0f00000000;
|
|
fma.rn.f32 %f580, %f215, %f39, %f216;
|
|
bra.uni BB0_25;
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|
|
|
BB0_23:
|
|
mov.f32 %f211, 0f3D2AAAA5;
|
|
fma.rn.f32 %f212, %f579, %f39, %f211;
|
|
mov.f32 %f213, 0fBF000000;
|
|
fma.rn.f32 %f580, %f212, %f39, %f213;
|
|
|
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BB0_25:
|
|
fma.rn.f32 %f581, %f580, %f578, %f578;
|
|
@%p23 bra BB0_27;
|
|
|
|
mov.f32 %f217, 0f3F800000;
|
|
fma.rn.f32 %f581, %f580, %f39, %f217;
|
|
|
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BB0_27:
|
|
and.b32 %r177, %r45, 2;
|
|
setp.eq.s32 %p26, %r177, 0;
|
|
@%p26 bra BB0_29;
|
|
|
|
mov.f32 %f218, 0f00000000;
|
|
mov.f32 %f219, 0fBF800000;
|
|
fma.rn.f32 %f581, %f581, %f219, %f218;
|
|
|
|
BB0_29:
|
|
@%p14 bra BB0_31;
|
|
|
|
mov.f32 %f220, 0f00000000;
|
|
mul.rn.f32 %f583, %f583, %f220;
|
|
|
|
BB0_31:
|
|
mul.f32 %f221, %f583, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r305, %f221;
|
|
cvt.rn.f32.s32 %f222, %r305;
|
|
neg.f32 %f223, %f222;
|
|
fma.rn.f32 %f225, %f223, %f201, %f583;
|
|
fma.rn.f32 %f227, %f223, %f203, %f225;
|
|
fma.rn.f32 %f584, %f223, %f205, %f227;
|
|
abs.f32 %f229, %f583;
|
|
setp.leu.f32 %p28, %f229, 0f47CE4780;
|
|
@%p28 bra BB0_42;
|
|
|
|
mov.b32 %r48, %f583;
|
|
shr.u32 %r49, %r48, 23;
|
|
shl.b32 %r180, %r48, 8;
|
|
or.b32 %r50, %r180, -2147483648;
|
|
add.u64 %rd49, %SP, 0;
|
|
cvta.to.local.u64 %rd104, %rd49;
|
|
mov.u32 %r297, 0;
|
|
mov.u64 %rd103, __cudart_i2opi_f;
|
|
mov.u32 %r296, -6;
|
|
|
|
BB0_33:
|
|
.pragma "nounroll";
|
|
ld.const.u32 %r183, [%rd103];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r181, %r183, %r50, %r297;
|
|
madc.hi.u32 %r297, %r183, %r50, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd104], %r181;
|
|
add.s64 %rd104, %rd104, 4;
|
|
add.s64 %rd103, %rd103, 4;
|
|
add.s32 %r296, %r296, 1;
|
|
setp.ne.s32 %p29, %r296, 0;
|
|
@%p29 bra BB0_33;
|
|
|
|
and.b32 %r186, %r49, 255;
|
|
add.s32 %r187, %r186, -128;
|
|
shr.u32 %r188, %r187, 5;
|
|
and.b32 %r55, %r48, -2147483648;
|
|
cvta.to.local.u64 %rd51, %rd49;
|
|
st.local.u32 [%rd51+24], %r297;
|
|
mov.u32 %r189, 6;
|
|
sub.s32 %r190, %r189, %r188;
|
|
mul.wide.s32 %rd52, %r190, 4;
|
|
add.s64 %rd14, %rd51, %rd52;
|
|
ld.local.u32 %r298, [%rd14];
|
|
ld.local.u32 %r299, [%rd14+-4];
|
|
and.b32 %r58, %r49, 31;
|
|
setp.eq.s32 %p30, %r58, 0;
|
|
@%p30 bra BB0_36;
|
|
|
|
mov.u32 %r191, 32;
|
|
sub.s32 %r192, %r191, %r58;
|
|
shr.u32 %r193, %r299, %r192;
|
|
shl.b32 %r194, %r298, %r58;
|
|
add.s32 %r298, %r193, %r194;
|
|
ld.local.u32 %r195, [%rd14+-8];
|
|
shr.u32 %r196, %r195, %r192;
|
|
shl.b32 %r197, %r299, %r58;
|
|
add.s32 %r299, %r196, %r197;
|
|
|
|
BB0_36:
|
|
shr.u32 %r198, %r299, 30;
|
|
shl.b32 %r199, %r298, 2;
|
|
add.s32 %r300, %r198, %r199;
|
|
shl.b32 %r64, %r299, 2;
|
|
shr.u32 %r200, %r300, 31;
|
|
shr.u32 %r201, %r298, 30;
|
|
add.s32 %r65, %r200, %r201;
|
|
setp.eq.s32 %p31, %r200, 0;
|
|
@%p31 bra BB0_37;
|
|
bra.uni BB0_38;
|
|
|
|
BB0_37:
|
|
mov.u32 %r301, %r55;
|
|
mov.u32 %r302, %r64;
|
|
bra.uni BB0_39;
|
|
|
|
BB0_38:
|
|
not.b32 %r202, %r300;
|
|
neg.s32 %r302, %r64;
|
|
setp.eq.s32 %p32, %r64, 0;
|
|
selp.u32 %r203, 1, 0, %p32;
|
|
add.s32 %r300, %r203, %r202;
|
|
xor.b32 %r301, %r55, -2147483648;
|
|
|
|
BB0_39:
|
|
clz.b32 %r304, %r300;
|
|
setp.eq.s32 %p33, %r304, 0;
|
|
shl.b32 %r204, %r300, %r304;
|
|
mov.u32 %r205, 32;
|
|
sub.s32 %r206, %r205, %r304;
|
|
shr.u32 %r207, %r302, %r206;
|
|
add.s32 %r208, %r207, %r204;
|
|
selp.b32 %r73, %r300, %r208, %p33;
|
|
mov.u32 %r209, -921707870;
|
|
mul.hi.u32 %r303, %r73, %r209;
|
|
setp.eq.s32 %p34, %r55, 0;
|
|
neg.s32 %r210, %r65;
|
|
selp.b32 %r305, %r65, %r210, %p34;
|
|
setp.lt.s32 %p35, %r303, 1;
|
|
@%p35 bra BB0_41;
|
|
|
|
mul.lo.s32 %r211, %r73, -921707870;
|
|
shr.u32 %r212, %r211, 31;
|
|
shl.b32 %r213, %r303, 1;
|
|
add.s32 %r303, %r212, %r213;
|
|
add.s32 %r304, %r304, 1;
|
|
|
|
BB0_41:
|
|
mov.u32 %r214, 126;
|
|
sub.s32 %r215, %r214, %r304;
|
|
shl.b32 %r216, %r215, 23;
|
|
add.s32 %r217, %r303, 1;
|
|
shr.u32 %r218, %r217, 7;
|
|
add.s32 %r219, %r218, 1;
|
|
shr.u32 %r220, %r219, 1;
|
|
add.s32 %r221, %r220, %r216;
|
|
or.b32 %r222, %r221, %r301;
|
|
mov.b32 %f584, %r222;
|
|
|
|
BB0_42:
|
|
mul.rn.f32 %f56, %f584, %f584;
|
|
and.b32 %r81, %r305, 1;
|
|
setp.eq.s32 %p36, %r81, 0;
|
|
@%p36 bra BB0_44;
|
|
bra.uni BB0_43;
|
|
|
|
BB0_44:
|
|
mov.f32 %f232, 0f3C08839E;
|
|
mov.f32 %f233, 0fB94CA1F9;
|
|
fma.rn.f32 %f585, %f233, %f56, %f232;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_43:
|
|
mov.f32 %f230, 0fBAB6061A;
|
|
mov.f32 %f231, 0f37CCF5CE;
|
|
fma.rn.f32 %f585, %f231, %f56, %f230;
|
|
|
|
BB0_45:
|
|
@%p36 bra BB0_47;
|
|
bra.uni BB0_46;
|
|
|
|
BB0_47:
|
|
mov.f32 %f237, 0fBE2AAAA3;
|
|
fma.rn.f32 %f238, %f585, %f56, %f237;
|
|
mov.f32 %f239, 0f00000000;
|
|
fma.rn.f32 %f586, %f238, %f56, %f239;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_46:
|
|
mov.f32 %f234, 0f3D2AAAA5;
|
|
fma.rn.f32 %f235, %f585, %f56, %f234;
|
|
mov.f32 %f236, 0fBF000000;
|
|
fma.rn.f32 %f586, %f235, %f56, %f236;
|
|
|
|
BB0_48:
|
|
fma.rn.f32 %f587, %f586, %f584, %f584;
|
|
@%p36 bra BB0_50;
|
|
|
|
mov.f32 %f240, 0f3F800000;
|
|
fma.rn.f32 %f587, %f586, %f56, %f240;
|
|
|
|
BB0_50:
|
|
and.b32 %r223, %r305, 2;
|
|
setp.eq.s32 %p39, %r223, 0;
|
|
@%p39 bra BB0_52;
|
|
|
|
mov.f32 %f241, 0f00000000;
|
|
mov.f32 %f242, 0fBF800000;
|
|
fma.rn.f32 %f587, %f587, %f242, %f241;
|
|
|
|
BB0_52:
|
|
mul.f32 %f251, %f31, %f581;
|
|
add.u64 %rd53, %SP, 28;
|
|
cvta.to.local.u64 %rd54, %rd53;
|
|
mul.f32 %f252, %f251, %f251;
|
|
mov.f32 %f253, 0f3F800000;
|
|
sub.f32 %f254, %f253, %f252;
|
|
mul.f32 %f255, %f31, %f587;
|
|
mul.f32 %f256, %f255, %f255;
|
|
sub.f32 %f257, %f254, %f256;
|
|
mov.f32 %f258, 0f00000000;
|
|
max.f32 %f259, %f258, %f257;
|
|
sqrt.rn.f32 %f260, %f259;
|
|
mul.f32 %f261, %f13, %f255;
|
|
mul.f32 %f262, %f14, %f255;
|
|
mul.f32 %f263, %f15, %f255;
|
|
fma.rn.f32 %f264, %f22, %f251, %f261;
|
|
fma.rn.f32 %f265, %f21, %f251, %f262;
|
|
fma.rn.f32 %f266, %f20, %f251, %f263;
|
|
fma.rn.f32 %f246, %f568, %f260, %f264;
|
|
fma.rn.f32 %f247, %f569, %f260, %f265;
|
|
fma.rn.f32 %f248, %f570, %f260, %f266;
|
|
mov.u32 %r225, 0;
|
|
st.local.u32 [%rd54+8], %r225;
|
|
st.local.u32 [%rd54+4], %r225;
|
|
st.local.u32 [%rd54], %r225;
|
|
ld.global.u32 %r224, [root];
|
|
mov.f32 %f250, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r224, %f10, %f11, %f12, %f246, %f247, %f248, %r225, %f27, %f250, %rd53, %r112);
|
|
// inline asm
|
|
ld.local.f32 %f267, [%rd54+8];
|
|
ld.local.f32 %f268, [%rd54+4];
|
|
ld.local.f32 %f269, [%rd54];
|
|
add.f32 %f576, %f576, %f269;
|
|
add.f32 %f575, %f575, %f268;
|
|
add.f32 %f574, %f574, %f267;
|
|
add.s32 %r284, %r284, 1;
|
|
setp.lt.s32 %p40, %r284, %r1;
|
|
@%p40 bra BB0_6;
|
|
|
|
add.s32 %r282, %r282, 1;
|
|
setp.lt.s32 %p41, %r282, %r1;
|
|
@%p41 bra BB0_5;
|
|
|
|
BB0_54:
|
|
cvt.rn.f32.u32 %f270, %r4;
|
|
cvt.rn.f32.u32 %f271, %r3;
|
|
tex.2d.v4.f32.f32 {%f272, %f273, %f274, %f275}, [albedoTex, {%f271, %f270}];
|
|
mul.lo.s32 %r227, %r1, %r1;
|
|
cvt.rn.f32.s32 %f276, %r227;
|
|
rcp.rn.f32 %f277, %f276;
|
|
mul.f32 %f278, %f576, %f277;
|
|
mul.f32 %f279, %f575, %f277;
|
|
mul.f32 %f280, %f574, %f277;
|
|
mul.f32 %f74, %f278, %f272;
|
|
mul.f32 %f75, %f279, %f273;
|
|
mul.f32 %f76, %f280, %f274;
|
|
add.f32 %f77, %f139, %f74;
|
|
add.f32 %f78, %f140, %f75;
|
|
add.f32 %f79, %f141, %f76;
|
|
abs.f32 %f281, %f77;
|
|
setp.gtu.f32 %p43, %f281, 0f7F800000;
|
|
mov.pred %p100, -1;
|
|
@%p43 bra BB0_57;
|
|
|
|
abs.f32 %f282, %f78;
|
|
setp.gtu.f32 %p45, %f282, 0f7F800000;
|
|
@%p45 bra BB0_57;
|
|
|
|
abs.f32 %f283, %f79;
|
|
setp.gtu.f32 %p100, %f283, 0f7F800000;
|
|
|
|
BB0_57:
|
|
selp.f32 %f80, 0f00000000, %f77, %p100;
|
|
selp.f32 %f81, 0f00000000, %f78, %p100;
|
|
selp.f32 %f82, 0f00000000, %f79, %p100;
|
|
ld.global.u32 %r307, [imageEnabled];
|
|
and.b32 %r228, %r307, 1;
|
|
setp.eq.b32 %p46, %r228, 1;
|
|
@!%p46 bra BB0_92;
|
|
bra.uni BB0_58;
|
|
|
|
BB0_58:
|
|
mov.f32 %f286, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f287, %f286;
|
|
fma.rn.f32 %f288, %f287, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f83, %f288;
|
|
abs.f32 %f84, %f80;
|
|
setp.lt.f32 %p47, %f84, 0f00800000;
|
|
mul.f32 %f289, %f84, 0f4B800000;
|
|
selp.f32 %f290, 0fC3170000, 0fC2FE0000, %p47;
|
|
selp.f32 %f291, %f289, %f84, %p47;
|
|
mov.b32 %r229, %f291;
|
|
and.b32 %r230, %r229, 8388607;
|
|
or.b32 %r231, %r230, 1065353216;
|
|
mov.b32 %f292, %r231;
|
|
shr.u32 %r232, %r229, 23;
|
|
cvt.rn.f32.u32 %f293, %r232;
|
|
add.f32 %f294, %f290, %f293;
|
|
setp.gt.f32 %p48, %f292, 0f3FB504F3;
|
|
mul.f32 %f295, %f292, 0f3F000000;
|
|
add.f32 %f296, %f294, 0f3F800000;
|
|
selp.f32 %f297, %f295, %f292, %p48;
|
|
selp.f32 %f298, %f296, %f294, %p48;
|
|
add.f32 %f299, %f297, 0fBF800000;
|
|
add.f32 %f285, %f297, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f284,%f285;
|
|
// inline asm
|
|
add.f32 %f300, %f299, %f299;
|
|
mul.f32 %f301, %f284, %f300;
|
|
mul.f32 %f302, %f301, %f301;
|
|
mov.f32 %f303, 0f3C4CAF63;
|
|
mov.f32 %f304, 0f3B18F0FE;
|
|
fma.rn.f32 %f305, %f304, %f302, %f303;
|
|
mov.f32 %f306, 0f3DAAAABD;
|
|
fma.rn.f32 %f307, %f305, %f302, %f306;
|
|
mul.rn.f32 %f308, %f307, %f302;
|
|
mul.rn.f32 %f309, %f308, %f301;
|
|
sub.f32 %f310, %f299, %f301;
|
|
neg.f32 %f311, %f301;
|
|
add.f32 %f312, %f310, %f310;
|
|
fma.rn.f32 %f313, %f311, %f299, %f312;
|
|
mul.rn.f32 %f314, %f284, %f313;
|
|
add.f32 %f315, %f309, %f301;
|
|
sub.f32 %f316, %f301, %f315;
|
|
add.f32 %f317, %f309, %f316;
|
|
add.f32 %f318, %f314, %f317;
|
|
add.f32 %f319, %f315, %f318;
|
|
sub.f32 %f320, %f315, %f319;
|
|
add.f32 %f321, %f318, %f320;
|
|
mov.f32 %f322, 0f3F317200;
|
|
mul.rn.f32 %f323, %f298, %f322;
|
|
mov.f32 %f324, 0f35BFBE8E;
|
|
mul.rn.f32 %f325, %f298, %f324;
|
|
add.f32 %f326, %f323, %f319;
|
|
sub.f32 %f327, %f323, %f326;
|
|
add.f32 %f328, %f319, %f327;
|
|
add.f32 %f329, %f321, %f328;
|
|
add.f32 %f330, %f325, %f329;
|
|
add.f32 %f331, %f326, %f330;
|
|
sub.f32 %f332, %f326, %f331;
|
|
add.f32 %f333, %f330, %f332;
|
|
mov.f32 %f334, 0f3EE66666;
|
|
mul.rn.f32 %f335, %f334, %f331;
|
|
neg.f32 %f336, %f335;
|
|
fma.rn.f32 %f337, %f334, %f331, %f336;
|
|
fma.rn.f32 %f338, %f334, %f333, %f337;
|
|
mov.f32 %f339, 0f00000000;
|
|
fma.rn.f32 %f340, %f339, %f331, %f338;
|
|
add.rn.f32 %f341, %f335, %f340;
|
|
neg.f32 %f342, %f341;
|
|
add.rn.f32 %f343, %f335, %f342;
|
|
add.rn.f32 %f344, %f343, %f340;
|
|
mov.b32 %r233, %f341;
|
|
setp.eq.s32 %p49, %r233, 1118925336;
|
|
add.s32 %r234, %r233, -1;
|
|
mov.b32 %f345, %r234;
|
|
add.f32 %f346, %f344, 0f37000000;
|
|
selp.f32 %f347, %f345, %f341, %p49;
|
|
selp.f32 %f85, %f346, %f344, %p49;
|
|
mul.f32 %f348, %f347, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f349, %f348;
|
|
mov.f32 %f350, 0fBF317200;
|
|
fma.rn.f32 %f351, %f349, %f350, %f347;
|
|
mov.f32 %f352, 0fB5BFBE8E;
|
|
fma.rn.f32 %f353, %f349, %f352, %f351;
|
|
mul.f32 %f354, %f353, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f355, %f354;
|
|
add.f32 %f356, %f349, 0f00000000;
|
|
ex2.approx.f32 %f357, %f356;
|
|
mul.f32 %f358, %f355, %f357;
|
|
setp.lt.f32 %p50, %f347, 0fC2D20000;
|
|
selp.f32 %f359, 0f00000000, %f358, %p50;
|
|
setp.gt.f32 %p51, %f347, 0f42D20000;
|
|
selp.f32 %f592, 0f7F800000, %f359, %p51;
|
|
setp.eq.f32 %p52, %f592, 0f7F800000;
|
|
@%p52 bra BB0_60;
|
|
|
|
fma.rn.f32 %f592, %f592, %f85, %f592;
|
|
|
|
BB0_60:
|
|
setp.lt.f32 %p53, %f80, 0f00000000;
|
|
setp.eq.f32 %p54, %f83, 0f3F800000;
|
|
and.pred %p3, %p53, %p54;
|
|
mov.b32 %r235, %f592;
|
|
xor.b32 %r236, %r235, -2147483648;
|
|
mov.b32 %f360, %r236;
|
|
selp.f32 %f594, %f360, %f592, %p3;
|
|
setp.eq.f32 %p55, %f80, 0f00000000;
|
|
@%p55 bra BB0_63;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_63:
|
|
add.f32 %f363, %f80, %f80;
|
|
selp.f32 %f594, %f363, 0f00000000, %p54;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_61:
|
|
setp.geu.f32 %p56, %f80, 0f00000000;
|
|
@%p56 bra BB0_64;
|
|
|
|
mov.f32 %f561, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f362, %f561;
|
|
setp.neu.f32 %p57, %f362, 0f3EE66666;
|
|
selp.f32 %f594, 0f7FFFFFFF, %f594, %p57;
|
|
|
|
BB0_64:
|
|
abs.f32 %f538, %f80;
|
|
add.f32 %f364, %f538, 0f3EE66666;
|
|
mov.b32 %r237, %f364;
|
|
setp.lt.s32 %p59, %r237, 2139095040;
|
|
@%p59 bra BB0_69;
|
|
|
|
abs.f32 %f559, %f80;
|
|
setp.gtu.f32 %p60, %f559, 0f7F800000;
|
|
@%p60 bra BB0_68;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_68:
|
|
add.f32 %f594, %f80, 0f3EE66666;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_66:
|
|
abs.f32 %f560, %f80;
|
|
setp.neu.f32 %p61, %f560, 0f7F800000;
|
|
@%p61 bra BB0_69;
|
|
|
|
selp.f32 %f594, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_69:
|
|
mov.f32 %f547, 0fB5BFBE8E;
|
|
mov.f32 %f546, 0fBF317200;
|
|
mov.f32 %f545, 0f00000000;
|
|
mov.f32 %f544, 0f35BFBE8E;
|
|
mov.f32 %f543, 0f3F317200;
|
|
mov.f32 %f542, 0f3DAAAABD;
|
|
mov.f32 %f541, 0f3C4CAF63;
|
|
mov.f32 %f540, 0f3B18F0FE;
|
|
mov.f32 %f539, 0f3EE66666;
|
|
setp.eq.f32 %p62, %f80, 0f3F800000;
|
|
selp.f32 %f96, 0f3F800000, %f594, %p62;
|
|
abs.f32 %f97, %f81;
|
|
setp.lt.f32 %p63, %f97, 0f00800000;
|
|
mul.f32 %f367, %f97, 0f4B800000;
|
|
selp.f32 %f368, 0fC3170000, 0fC2FE0000, %p63;
|
|
selp.f32 %f369, %f367, %f97, %p63;
|
|
mov.b32 %r238, %f369;
|
|
and.b32 %r239, %r238, 8388607;
|
|
or.b32 %r240, %r239, 1065353216;
|
|
mov.b32 %f370, %r240;
|
|
shr.u32 %r241, %r238, 23;
|
|
cvt.rn.f32.u32 %f371, %r241;
|
|
add.f32 %f372, %f368, %f371;
|
|
setp.gt.f32 %p64, %f370, 0f3FB504F3;
|
|
mul.f32 %f373, %f370, 0f3F000000;
|
|
add.f32 %f374, %f372, 0f3F800000;
|
|
selp.f32 %f375, %f373, %f370, %p64;
|
|
selp.f32 %f376, %f374, %f372, %p64;
|
|
add.f32 %f377, %f375, 0fBF800000;
|
|
add.f32 %f366, %f375, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f365,%f366;
|
|
// inline asm
|
|
add.f32 %f378, %f377, %f377;
|
|
mul.f32 %f379, %f365, %f378;
|
|
mul.f32 %f380, %f379, %f379;
|
|
fma.rn.f32 %f383, %f540, %f380, %f541;
|
|
fma.rn.f32 %f385, %f383, %f380, %f542;
|
|
mul.rn.f32 %f386, %f385, %f380;
|
|
mul.rn.f32 %f387, %f386, %f379;
|
|
sub.f32 %f388, %f377, %f379;
|
|
neg.f32 %f389, %f379;
|
|
add.f32 %f390, %f388, %f388;
|
|
fma.rn.f32 %f391, %f389, %f377, %f390;
|
|
mul.rn.f32 %f392, %f365, %f391;
|
|
add.f32 %f393, %f387, %f379;
|
|
sub.f32 %f394, %f379, %f393;
|
|
add.f32 %f395, %f387, %f394;
|
|
add.f32 %f396, %f392, %f395;
|
|
add.f32 %f397, %f393, %f396;
|
|
sub.f32 %f398, %f393, %f397;
|
|
add.f32 %f399, %f396, %f398;
|
|
mul.rn.f32 %f401, %f376, %f543;
|
|
mul.rn.f32 %f403, %f376, %f544;
|
|
add.f32 %f404, %f401, %f397;
|
|
sub.f32 %f405, %f401, %f404;
|
|
add.f32 %f406, %f397, %f405;
|
|
add.f32 %f407, %f399, %f406;
|
|
add.f32 %f408, %f403, %f407;
|
|
add.f32 %f409, %f404, %f408;
|
|
sub.f32 %f410, %f404, %f409;
|
|
add.f32 %f411, %f408, %f410;
|
|
mul.rn.f32 %f413, %f539, %f409;
|
|
neg.f32 %f414, %f413;
|
|
fma.rn.f32 %f415, %f539, %f409, %f414;
|
|
fma.rn.f32 %f416, %f539, %f411, %f415;
|
|
fma.rn.f32 %f418, %f545, %f409, %f416;
|
|
add.rn.f32 %f419, %f413, %f418;
|
|
neg.f32 %f420, %f419;
|
|
add.rn.f32 %f421, %f413, %f420;
|
|
add.rn.f32 %f422, %f421, %f418;
|
|
mov.b32 %r242, %f419;
|
|
setp.eq.s32 %p65, %r242, 1118925336;
|
|
add.s32 %r243, %r242, -1;
|
|
mov.b32 %f423, %r243;
|
|
add.f32 %f424, %f422, 0f37000000;
|
|
selp.f32 %f425, %f423, %f419, %p65;
|
|
selp.f32 %f98, %f424, %f422, %p65;
|
|
mul.f32 %f426, %f425, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f427, %f426;
|
|
fma.rn.f32 %f429, %f427, %f546, %f425;
|
|
fma.rn.f32 %f431, %f427, %f547, %f429;
|
|
mul.f32 %f432, %f431, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f433, %f432;
|
|
add.f32 %f434, %f427, 0f00000000;
|
|
ex2.approx.f32 %f435, %f434;
|
|
mul.f32 %f436, %f433, %f435;
|
|
setp.lt.f32 %p66, %f425, 0fC2D20000;
|
|
selp.f32 %f437, 0f00000000, %f436, %p66;
|
|
setp.gt.f32 %p67, %f425, 0f42D20000;
|
|
selp.f32 %f595, 0f7F800000, %f437, %p67;
|
|
setp.eq.f32 %p68, %f595, 0f7F800000;
|
|
@%p68 bra BB0_71;
|
|
|
|
fma.rn.f32 %f595, %f595, %f98, %f595;
|
|
|
|
BB0_71:
|
|
setp.lt.f32 %p69, %f81, 0f00000000;
|
|
and.pred %p4, %p69, %p54;
|
|
mov.b32 %r244, %f595;
|
|
xor.b32 %r245, %r244, -2147483648;
|
|
mov.b32 %f438, %r245;
|
|
selp.f32 %f597, %f438, %f595, %p4;
|
|
setp.eq.f32 %p71, %f81, 0f00000000;
|
|
@%p71 bra BB0_74;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_74:
|
|
add.f32 %f441, %f81, %f81;
|
|
selp.f32 %f597, %f441, 0f00000000, %p54;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_72:
|
|
setp.geu.f32 %p72, %f81, 0f00000000;
|
|
@%p72 bra BB0_75;
|
|
|
|
mov.f32 %f558, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f440, %f558;
|
|
setp.neu.f32 %p73, %f440, 0f3EE66666;
|
|
selp.f32 %f597, 0f7FFFFFFF, %f597, %p73;
|
|
|
|
BB0_75:
|
|
abs.f32 %f562, %f81;
|
|
add.f32 %f442, %f562, 0f3EE66666;
|
|
mov.b32 %r246, %f442;
|
|
setp.lt.s32 %p75, %r246, 2139095040;
|
|
@%p75 bra BB0_80;
|
|
|
|
abs.f32 %f563, %f81;
|
|
setp.gtu.f32 %p76, %f563, 0f7F800000;
|
|
@%p76 bra BB0_79;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_79:
|
|
add.f32 %f597, %f81, 0f3EE66666;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_77:
|
|
abs.f32 %f564, %f81;
|
|
setp.neu.f32 %p77, %f564, 0f7F800000;
|
|
@%p77 bra BB0_80;
|
|
|
|
selp.f32 %f597, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_80:
|
|
mov.f32 %f556, 0fB5BFBE8E;
|
|
mov.f32 %f555, 0fBF317200;
|
|
mov.f32 %f554, 0f00000000;
|
|
mov.f32 %f553, 0f35BFBE8E;
|
|
mov.f32 %f552, 0f3F317200;
|
|
mov.f32 %f551, 0f3DAAAABD;
|
|
mov.f32 %f550, 0f3C4CAF63;
|
|
mov.f32 %f549, 0f3B18F0FE;
|
|
mov.f32 %f548, 0f3EE66666;
|
|
setp.eq.f32 %p78, %f81, 0f3F800000;
|
|
selp.f32 %f109, 0f3F800000, %f597, %p78;
|
|
abs.f32 %f110, %f82;
|
|
setp.lt.f32 %p79, %f110, 0f00800000;
|
|
mul.f32 %f445, %f110, 0f4B800000;
|
|
selp.f32 %f446, 0fC3170000, 0fC2FE0000, %p79;
|
|
selp.f32 %f447, %f445, %f110, %p79;
|
|
mov.b32 %r247, %f447;
|
|
and.b32 %r248, %r247, 8388607;
|
|
or.b32 %r249, %r248, 1065353216;
|
|
mov.b32 %f448, %r249;
|
|
shr.u32 %r250, %r247, 23;
|
|
cvt.rn.f32.u32 %f449, %r250;
|
|
add.f32 %f450, %f446, %f449;
|
|
setp.gt.f32 %p80, %f448, 0f3FB504F3;
|
|
mul.f32 %f451, %f448, 0f3F000000;
|
|
add.f32 %f452, %f450, 0f3F800000;
|
|
selp.f32 %f453, %f451, %f448, %p80;
|
|
selp.f32 %f454, %f452, %f450, %p80;
|
|
add.f32 %f455, %f453, 0fBF800000;
|
|
add.f32 %f444, %f453, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f443,%f444;
|
|
// inline asm
|
|
add.f32 %f456, %f455, %f455;
|
|
mul.f32 %f457, %f443, %f456;
|
|
mul.f32 %f458, %f457, %f457;
|
|
fma.rn.f32 %f461, %f549, %f458, %f550;
|
|
fma.rn.f32 %f463, %f461, %f458, %f551;
|
|
mul.rn.f32 %f464, %f463, %f458;
|
|
mul.rn.f32 %f465, %f464, %f457;
|
|
sub.f32 %f466, %f455, %f457;
|
|
neg.f32 %f467, %f457;
|
|
add.f32 %f468, %f466, %f466;
|
|
fma.rn.f32 %f469, %f467, %f455, %f468;
|
|
mul.rn.f32 %f470, %f443, %f469;
|
|
add.f32 %f471, %f465, %f457;
|
|
sub.f32 %f472, %f457, %f471;
|
|
add.f32 %f473, %f465, %f472;
|
|
add.f32 %f474, %f470, %f473;
|
|
add.f32 %f475, %f471, %f474;
|
|
sub.f32 %f476, %f471, %f475;
|
|
add.f32 %f477, %f474, %f476;
|
|
mul.rn.f32 %f479, %f454, %f552;
|
|
mul.rn.f32 %f481, %f454, %f553;
|
|
add.f32 %f482, %f479, %f475;
|
|
sub.f32 %f483, %f479, %f482;
|
|
add.f32 %f484, %f475, %f483;
|
|
add.f32 %f485, %f477, %f484;
|
|
add.f32 %f486, %f481, %f485;
|
|
add.f32 %f487, %f482, %f486;
|
|
sub.f32 %f488, %f482, %f487;
|
|
add.f32 %f489, %f486, %f488;
|
|
mul.rn.f32 %f491, %f548, %f487;
|
|
neg.f32 %f492, %f491;
|
|
fma.rn.f32 %f493, %f548, %f487, %f492;
|
|
fma.rn.f32 %f494, %f548, %f489, %f493;
|
|
fma.rn.f32 %f496, %f554, %f487, %f494;
|
|
add.rn.f32 %f497, %f491, %f496;
|
|
neg.f32 %f498, %f497;
|
|
add.rn.f32 %f499, %f491, %f498;
|
|
add.rn.f32 %f500, %f499, %f496;
|
|
mov.b32 %r251, %f497;
|
|
setp.eq.s32 %p81, %r251, 1118925336;
|
|
add.s32 %r252, %r251, -1;
|
|
mov.b32 %f501, %r252;
|
|
add.f32 %f502, %f500, 0f37000000;
|
|
selp.f32 %f503, %f501, %f497, %p81;
|
|
selp.f32 %f111, %f502, %f500, %p81;
|
|
mul.f32 %f504, %f503, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f505, %f504;
|
|
fma.rn.f32 %f507, %f505, %f555, %f503;
|
|
fma.rn.f32 %f509, %f505, %f556, %f507;
|
|
mul.f32 %f510, %f509, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f511, %f510;
|
|
add.f32 %f512, %f505, 0f00000000;
|
|
ex2.approx.f32 %f513, %f512;
|
|
mul.f32 %f514, %f511, %f513;
|
|
setp.lt.f32 %p82, %f503, 0fC2D20000;
|
|
selp.f32 %f515, 0f00000000, %f514, %p82;
|
|
setp.gt.f32 %p83, %f503, 0f42D20000;
|
|
selp.f32 %f598, 0f7F800000, %f515, %p83;
|
|
setp.eq.f32 %p84, %f598, 0f7F800000;
|
|
@%p84 bra BB0_82;
|
|
|
|
fma.rn.f32 %f598, %f598, %f111, %f598;
|
|
|
|
BB0_82:
|
|
setp.lt.f32 %p85, %f82, 0f00000000;
|
|
and.pred %p5, %p85, %p54;
|
|
mov.b32 %r253, %f598;
|
|
xor.b32 %r254, %r253, -2147483648;
|
|
mov.b32 %f516, %r254;
|
|
selp.f32 %f600, %f516, %f598, %p5;
|
|
setp.eq.f32 %p87, %f82, 0f00000000;
|
|
@%p87 bra BB0_85;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_85:
|
|
add.f32 %f519, %f82, %f82;
|
|
selp.f32 %f600, %f519, 0f00000000, %p54;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_83:
|
|
setp.geu.f32 %p88, %f82, 0f00000000;
|
|
@%p88 bra BB0_86;
|
|
|
|
mov.f32 %f557, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f518, %f557;
|
|
setp.neu.f32 %p89, %f518, 0f3EE66666;
|
|
selp.f32 %f600, 0f7FFFFFFF, %f600, %p89;
|
|
|
|
BB0_86:
|
|
abs.f32 %f565, %f82;
|
|
add.f32 %f520, %f565, 0f3EE66666;
|
|
mov.b32 %r255, %f520;
|
|
setp.lt.s32 %p91, %r255, 2139095040;
|
|
@%p91 bra BB0_91;
|
|
|
|
abs.f32 %f566, %f82;
|
|
setp.gtu.f32 %p92, %f566, 0f7F800000;
|
|
@%p92 bra BB0_90;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_90:
|
|
add.f32 %f600, %f82, 0f3EE66666;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_88:
|
|
abs.f32 %f567, %f82;
|
|
setp.neu.f32 %p93, %f567, 0f7F800000;
|
|
@%p93 bra BB0_91;
|
|
|
|
selp.f32 %f600, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_91:
|
|
mov.u32 %r277, 4;
|
|
mov.u64 %rd98, 0;
|
|
mov.u32 %r276, 2;
|
|
setp.eq.f32 %p94, %f82, 0f3F800000;
|
|
selp.f32 %f521, 0f3F800000, %f600, %p94;
|
|
cvt.u64.u32 %rd59, %r4;
|
|
cvt.u64.u32 %rd58, %r3;
|
|
mov.u64 %rd62, image;
|
|
cvta.global.u64 %rd57, %rd62;
|
|
// inline asm
|
|
call (%rd56), _rt_buffer_get_64, (%rd57, %r276, %r277, %rd58, %rd59, %rd98, %rd98);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f522, %f521;
|
|
mul.f32 %f523, %f522, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r258, %f523;
|
|
cvt.sat.f32.f32 %f524, %f109;
|
|
mul.f32 %f525, %f524, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r259, %f525;
|
|
cvt.sat.f32.f32 %f526, %f96;
|
|
mul.f32 %f527, %f526, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r260, %f527;
|
|
cvt.u16.u32 %rs16, %r258;
|
|
cvt.u16.u32 %rs17, %r260;
|
|
cvt.u16.u32 %rs18, %r259;
|
|
mov.u16 %rs19, 255;
|
|
st.v4.u8 [%rd56], {%rs16, %rs18, %rs17, %rs19};
|
|
ld.global.u32 %r307, [imageEnabled];
|
|
|
|
BB0_92:
|
|
and.b32 %r261, %r307, 4;
|
|
setp.eq.s32 %p95, %r261, 0;
|
|
@%p95 bra BB0_94;
|
|
|
|
mov.u32 %r279, 8;
|
|
mov.u64 %rd99, 0;
|
|
mov.u32 %r278, 2;
|
|
cvt.u64.u32 %rd65, %r3;
|
|
cvt.u64.u32 %rd66, %r4;
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd64, %rd69;
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd64, %r278, %r279, %rd65, %rd66, %rd99, %rd99);
|
|
// inline asm
|
|
mov.f32 %f531, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f531;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs22, %f82;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs21, %f81;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs20, %f80;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs20, %rs21, %rs22, %rs23};
|
|
ld.global.u32 %r307, [imageEnabled];
|
|
|
|
BB0_94:
|
|
and.b32 %r264, %r307, 16;
|
|
setp.eq.s32 %p96, %r264, 0;
|
|
@%p96 bra BB0_102;
|
|
|
|
mov.u32 %r281, 8;
|
|
mov.u64 %rd100, 0;
|
|
mov.u32 %r280, 2;
|
|
cvt.u64.u32 %rd72, %r3;
|
|
cvt.u64.u32 %rd73, %r4;
|
|
mov.u64 %rd76, image_HDR2;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r280, %r281, %rd72, %rd73, %rd100, %rd100);
|
|
// inline asm
|
|
mov.f32 %f535, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f535;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f76;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f75;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f74;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs24, %rs25, %rs26, %rs27};
|
|
|
|
BB0_102:
|
|
ret;
|
|
}
|
|
|
|
|