2766 lines
73 KiB
Plaintext
2766 lines
73 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 image_RNM3[1];
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.global .align 1 .b8 image_RNM4[1];
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.global .align 1 .b8 image_RNM5[1];
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.global .align 1 .b8 image_RNM6[1];
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.global .align 1 .b8 image_RNM7[1];
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.global .align 1 .b8 image_RNM8[1];
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.global .align 8 .b8 texCoords[8];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 rnd_seeds[1];
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.global .align 1 .b8 lightmapDirect[1];
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.global .texref albedoTex;
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.global .align 4 .u32 samples;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[40];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<120>;
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.reg .b16 %rs<285>;
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.reg .f32 %f<1114>;
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.reg .b32 %r<458>;
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.reg .b64 %rd<484>;
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mov.u64 %rd483, __local_depot0;
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cvta.local.u64 %SP, %rd483;
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ld.global.u32 %r1, [samples];
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shl.b32 %r2, %r1, 1;
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ld.global.v2.u32 {%r97, %r98}, [pixelID];
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cvt.u64.u32 %rd22, %r97;
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cvt.u64.u32 %rd23, %r98;
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mov.u64 %rd26, uvnormal;
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cvta.global.u64 %rd21, %rd26;
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mov.u32 %r95, 2;
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mov.u32 %r96, 4;
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mov.u64 %rd25, 0;
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// inline asm
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call (%rd20), _rt_buffer_get_64, (%rd21, %r95, %r96, %rd22, %rd23, %rd25, %rd25);
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// inline asm
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ld.u32 %r3, [%rd20];
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shr.u32 %r101, %r3, 16;
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cvt.u16.u32 %rs1, %r101;
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and.b16 %rs11, %rs1, 255;
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cvt.u16.u32 %rs12, %r3;
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or.b16 %rs13, %rs12, %rs11;
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setp.eq.s16 %p6, %rs13, 0;
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mov.f32 %f1000, 0f00000000;
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mov.f32 %f1001, %f1000;
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mov.f32 %f1002, %f1000;
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@%p6 bra BB0_2;
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ld.u8 %rs14, [%rd20+1];
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and.b16 %rs16, %rs12, 255;
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cvt.rn.f32.u16 %f288, %rs16;
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div.rn.f32 %f289, %f288, 0f437F0000;
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fma.rn.f32 %f290, %f289, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f291, %rs14;
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div.rn.f32 %f292, %f291, 0f437F0000;
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fma.rn.f32 %f293, %f292, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f294, %rs11;
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div.rn.f32 %f295, %f294, 0f437F0000;
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fma.rn.f32 %f296, %f295, 0f40000000, 0fBF800000;
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mul.f32 %f297, %f293, %f293;
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fma.rn.f32 %f298, %f290, %f290, %f297;
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fma.rn.f32 %f299, %f296, %f296, %f298;
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sqrt.rn.f32 %f300, %f299;
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rcp.rn.f32 %f301, %f300;
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mul.f32 %f1000, %f290, %f301;
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mul.f32 %f1001, %f293, %f301;
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mul.f32 %f1002, %f296, %f301;
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BB0_2:
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ld.global.v2.u32 {%r102, %r103}, [pixelID];
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ld.global.v2.u32 {%r105, %r106}, [tileInfo];
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add.s32 %r4, %r102, %r105;
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add.s32 %r5, %r103, %r106;
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setp.eq.f32 %p7, %f1001, 0f00000000;
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setp.eq.f32 %p8, %f1000, 0f00000000;
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and.pred %p9, %p8, %p7;
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setp.eq.f32 %p10, %f1002, 0f00000000;
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and.pred %p11, %p9, %p10;
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@%p11 bra BB0_123;
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bra.uni BB0_3;
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BB0_123:
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ld.global.u32 %r457, [imageEnabled];
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and.b32 %r331, %r457, 1;
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setp.eq.b32 %p106, %r331, 1;
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@!%p106 bra BB0_125;
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bra.uni BB0_124;
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BB0_124:
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cvt.u64.u32 %rd274, %r4;
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cvt.u64.u32 %rd275, %r5;
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mov.u64 %rd278, image;
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cvta.global.u64 %rd273, %rd278;
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mov.u64 %rd277, 0;
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// inline asm
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call (%rd272), _rt_buffer_get_64, (%rd273, %r95, %r96, %rd274, %rd275, %rd277, %rd277);
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// inline asm
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mov.u16 %rs163, 0;
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st.v4.u8 [%rd272], {%rs163, %rs163, %rs163, %rs163};
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ld.global.u32 %r457, [imageEnabled];
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BB0_125:
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and.b32 %r334, %r457, 4;
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setp.eq.s32 %p107, %r334, 0;
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@%p107 bra BB0_127;
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cvt.u64.u32 %rd281, %r4;
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cvt.u64.u32 %rd282, %r5;
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mov.u64 %rd285, image_HDR;
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cvta.global.u64 %rd280, %rd285;
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mov.u32 %r336, 8;
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mov.u64 %rd284, 0;
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// inline asm
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call (%rd279), _rt_buffer_get_64, (%rd280, %r95, %r336, %rd281, %rd282, %rd284, %rd284);
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// inline asm
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mov.f32 %f881, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs164, %f881;}
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// inline asm
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mov.u16 %rs165, 0;
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st.v4.u16 [%rd279], {%rs164, %rs164, %rs164, %rs165};
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ld.global.u32 %r457, [imageEnabled];
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BB0_127:
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and.b32 %r337, %r457, 16;
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setp.eq.s32 %p108, %r337, 0;
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@%p108 bra BB0_129;
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cvt.u64.u32 %rd289, %r5;
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cvt.u64.u32 %rd288, %r4;
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mov.u64 %rd292, image_HDR2;
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cvta.global.u64 %rd287, %rd292;
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mov.u32 %r339, 8;
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mov.u64 %rd291, 0;
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// inline asm
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call (%rd286), _rt_buffer_get_64, (%rd287, %r95, %r339, %rd288, %rd289, %rd291, %rd291);
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// inline asm
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mov.f32 %f882, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs166, %f882;}
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// inline asm
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mov.u16 %rs167, 0;
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st.v4.u16 [%rd286], {%rs166, %rs166, %rs166, %rs167};
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BB0_129:
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cvt.u64.u32 %rd18, %r4;
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cvt.u64.u32 %rd19, %r5;
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ld.global.u32 %r340, [additive];
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setp.eq.s32 %p109, %r340, 0;
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@%p109 bra BB0_131;
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mov.u64 %rd305, image_RNM0;
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cvta.global.u64 %rd294, %rd305;
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mov.u32 %r344, 8;
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mov.u64 %rd304, 0;
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// inline asm
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call (%rd293), _rt_buffer_get_64, (%rd294, %r95, %r344, %rd18, %rd19, %rd304, %rd304);
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// inline asm
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ld.v4.u16 {%rs174, %rs175, %rs176, %rs177}, [%rd293];
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// inline asm
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{ cvt.f32.f16 %f883, %rs174;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f884, %rs175;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f885, %rs176;}
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// inline asm
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// inline asm
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call (%rd299), _rt_buffer_get_64, (%rd294, %r95, %r344, %rd18, %rd19, %rd304, %rd304);
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// inline asm
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add.f32 %f886, %f883, 0f00000000;
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add.f32 %f887, %f884, 0f00000000;
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add.f32 %f888, %f885, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs173, %f888;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs172, %f887;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs171, %f886;}
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// inline asm
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mov.u16 %rs178, 0;
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st.v4.u16 [%rd299], {%rs171, %rs172, %rs173, %rs178};
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bra.uni BB0_132;
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BB0_3:
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ld.global.v2.u32 {%r116, %r117}, [pixelID];
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cvt.u64.u32 %rd29, %r116;
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cvt.u64.u32 %rd30, %r117;
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mov.u64 %rd45, lightmapDirect;
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cvta.global.u64 %rd28, %rd45;
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mov.u32 %r111, 8;
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// inline asm
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call (%rd27), _rt_buffer_get_64, (%rd28, %r95, %r111, %rd29, %rd30, %rd25, %rd25);
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// inline asm
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ld.v4.u16 {%rs21, %rs22, %rs23, %rs24}, [%rd27];
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// inline asm
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{ cvt.f32.f16 %f302, %rs21;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f303, %rs22;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f304, %rs23;}
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// inline asm
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ld.global.v2.u32 {%r120, %r121}, [pixelID];
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cvt.u64.u32 %rd35, %r120;
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cvt.u64.u32 %rd36, %r121;
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mov.u64 %rd46, uvpos;
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cvta.global.u64 %rd34, %rd46;
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mov.u32 %r113, 12;
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// inline asm
|
|
call (%rd33), _rt_buffer_get_64, (%rd34, %r95, %r113, %rd35, %rd36, %rd25, %rd25);
|
|
// inline asm
|
|
ld.f32 %f335, [%rd33+8];
|
|
ld.f32 %f336, [%rd33+4];
|
|
ld.f32 %f337, [%rd33];
|
|
mul.f32 %f338, %f337, 0f3456BF95;
|
|
mul.f32 %f339, %f336, 0f3456BF95;
|
|
mul.f32 %f340, %f335, 0f3456BF95;
|
|
abs.f32 %f341, %f1000;
|
|
div.rn.f32 %f342, %f338, %f341;
|
|
abs.f32 %f343, %f1001;
|
|
div.rn.f32 %f344, %f339, %f343;
|
|
abs.f32 %f345, %f1002;
|
|
div.rn.f32 %f346, %f340, %f345;
|
|
abs.f32 %f347, %f342;
|
|
abs.f32 %f348, %f344;
|
|
abs.f32 %f349, %f346;
|
|
mov.f32 %f350, 0f38D1B717;
|
|
max.f32 %f351, %f347, %f350;
|
|
max.f32 %f352, %f348, %f350;
|
|
max.f32 %f353, %f349, %f350;
|
|
fma.rn.f32 %f10, %f1000, %f351, %f337;
|
|
fma.rn.f32 %f11, %f1001, %f352, %f336;
|
|
fma.rn.f32 %f12, %f1002, %f353, %f335;
|
|
setp.gt.f32 %p12, %f341, %f345;
|
|
neg.f32 %f354, %f1001;
|
|
selp.f32 %f355, %f354, 0f00000000, %p12;
|
|
neg.f32 %f356, %f1002;
|
|
selp.f32 %f357, %f1000, %f356, %p12;
|
|
selp.f32 %f358, 0f00000000, %f1001, %p12;
|
|
mul.f32 %f359, %f357, %f357;
|
|
fma.rn.f32 %f360, %f355, %f355, %f359;
|
|
fma.rn.f32 %f361, %f358, %f358, %f360;
|
|
sqrt.rn.f32 %f362, %f361;
|
|
rcp.rn.f32 %f363, %f362;
|
|
mul.f32 %f13, %f355, %f363;
|
|
mul.f32 %f14, %f357, %f363;
|
|
mul.f32 %f15, %f358, %f363;
|
|
ld.global.v2.u32 {%r124, %r125}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r124;
|
|
cvt.u64.u32 %rd42, %r125;
|
|
mov.u64 %rd47, rnd_seeds;
|
|
cvta.global.u64 %rd40, %rd47;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd40, %r95, %r96, %rd41, %rd42, %rd25, %rd25);
|
|
// inline asm
|
|
mov.f32 %f1033, 0f00000000;
|
|
setp.lt.s32 %p13, %r1, 1;
|
|
mov.f32 %f1034, %f1033;
|
|
mov.f32 %f1035, %f1033;
|
|
mov.f32 %f1036, %f1033;
|
|
mov.f32 %f1037, %f1033;
|
|
mov.f32 %f1038, %f1033;
|
|
mov.f32 %f1039, %f1033;
|
|
mov.f32 %f1040, %f1033;
|
|
mov.f32 %f1041, %f1033;
|
|
mov.f32 %f1042, %f1033;
|
|
mov.f32 %f1043, %f1033;
|
|
mov.f32 %f1044, %f1033;
|
|
mov.f32 %f1045, %f1033;
|
|
mov.f32 %f1046, %f1033;
|
|
mov.f32 %f1047, %f1033;
|
|
mov.f32 %f1048, %f1033;
|
|
mov.f32 %f1049, %f1033;
|
|
mov.f32 %f1050, %f1033;
|
|
mov.f32 %f1051, %f1033;
|
|
mov.f32 %f1052, %f1033;
|
|
mov.f32 %f1053, %f1033;
|
|
mov.f32 %f1054, %f1033;
|
|
mov.f32 %f1055, %f1033;
|
|
mov.f32 %f1056, %f1033;
|
|
mov.f32 %f1057, %f1033;
|
|
mov.f32 %f1058, %f1033;
|
|
mov.f32 %f1059, %f1033;
|
|
mov.f32 %f1060, %f1033;
|
|
mov.f32 %f1061, %f1033;
|
|
mov.f32 %f1062, %f1033;
|
|
@%p13 bra BB0_54;
|
|
|
|
cvt.rn.f32.s32 %f394, %r2;
|
|
rcp.rn.f32 %f16, %f394;
|
|
ld.u32 %r433, [%rd39];
|
|
mul.f32 %f17, %f10, 0f3456BF95;
|
|
mul.f32 %f18, %f11, 0f3456BF95;
|
|
mul.f32 %f19, %f12, 0f3456BF95;
|
|
mul.f32 %f395, %f1000, %f14;
|
|
mul.f32 %f396, %f1001, %f13;
|
|
sub.f32 %f20, %f396, %f395;
|
|
mul.f32 %f397, %f1002, %f13;
|
|
mul.f32 %f398, %f1000, %f15;
|
|
sub.f32 %f21, %f398, %f397;
|
|
mul.f32 %f399, %f1001, %f15;
|
|
mul.f32 %f400, %f1002, %f14;
|
|
sub.f32 %f22, %f400, %f399;
|
|
mov.f32 %f1033, 0f00000000;
|
|
mov.u32 %r128, 0;
|
|
abs.f32 %f401, %f18;
|
|
abs.f32 %f402, %f17;
|
|
max.f32 %f403, %f402, %f401;
|
|
abs.f32 %f404, %f19;
|
|
max.f32 %f405, %f403, %f404;
|
|
mov.u32 %r430, %r128;
|
|
mov.f32 %f1034, %f1033;
|
|
mov.f32 %f1035, %f1033;
|
|
mov.f32 %f1036, %f1033;
|
|
mov.f32 %f1037, %f1033;
|
|
mov.f32 %f1038, %f1033;
|
|
mov.f32 %f1039, %f1033;
|
|
mov.f32 %f1040, %f1033;
|
|
mov.f32 %f1041, %f1033;
|
|
mov.f32 %f1042, %f1033;
|
|
mov.f32 %f1043, %f1033;
|
|
mov.f32 %f1044, %f1033;
|
|
mov.f32 %f1045, %f1033;
|
|
mov.f32 %f1046, %f1033;
|
|
mov.f32 %f1047, %f1033;
|
|
mov.f32 %f1048, %f1033;
|
|
mov.f32 %f1049, %f1033;
|
|
mov.f32 %f1050, %f1033;
|
|
mov.f32 %f1051, %f1033;
|
|
mov.f32 %f1052, %f1033;
|
|
mov.f32 %f1053, %f1033;
|
|
mov.f32 %f1054, %f1033;
|
|
mov.f32 %f1055, %f1033;
|
|
mov.f32 %f1056, %f1033;
|
|
mov.f32 %f1057, %f1033;
|
|
mov.f32 %f1058, %f1033;
|
|
mov.f32 %f1059, %f1033;
|
|
mov.f32 %f1060, %f1033;
|
|
mov.f32 %f1061, %f1033;
|
|
mov.f32 %f1062, %f1033;
|
|
|
|
BB0_5:
|
|
mov.u32 %r432, %r128;
|
|
|
|
BB0_6:
|
|
mov.u32 %r10, %r433;
|
|
cvt.rn.f32.s32 %f953, %r430;
|
|
mad.lo.s32 %r130, %r10, 1664525, 1013904223;
|
|
and.b32 %r131, %r130, 16777215;
|
|
cvt.rn.f32.u32 %f407, %r131;
|
|
fma.rn.f32 %f408, %f407, 0f33800000, %f953;
|
|
mul.f32 %f409, %f16, %f408;
|
|
mad.lo.s32 %r11, %r130, 1664525, 1013904223;
|
|
and.b32 %r132, %r11, 16777215;
|
|
cvt.rn.f32.u32 %f410, %r132;
|
|
cvt.rn.f32.s32 %f411, %r432;
|
|
fma.rn.f32 %f412, %f410, 0f33800000, %f411;
|
|
mul.f32 %f413, %f16, %f412;
|
|
fma.rn.f32 %f85, %f409, 0fC0000000, 0f3F800000;
|
|
mul.f32 %f414, %f85, %f85;
|
|
mov.f32 %f415, 0f3F800000;
|
|
sub.f32 %f416, %f415, %f414;
|
|
mov.f32 %f417, 0f00000000;
|
|
max.f32 %f418, %f417, %f416;
|
|
sqrt.rn.f32 %f86, %f418;
|
|
mul.f32 %f1069, %f413, 0f40C90FDB;
|
|
abs.f32 %f88, %f1069;
|
|
setp.neu.f32 %p14, %f88, 0f7F800000;
|
|
mov.f32 %f1063, %f1069;
|
|
@%p14 bra BB0_8;
|
|
|
|
mul.rn.f32 %f1063, %f1069, %f417;
|
|
|
|
BB0_8:
|
|
mul.f32 %f420, %f1063, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r443, %f420;
|
|
cvt.rn.f32.s32 %f421, %r443;
|
|
neg.f32 %f422, %f421;
|
|
mov.f32 %f423, 0f3FC90FDA;
|
|
fma.rn.f32 %f424, %f422, %f423, %f1063;
|
|
mov.f32 %f425, 0f33A22168;
|
|
fma.rn.f32 %f426, %f422, %f425, %f424;
|
|
mov.f32 %f427, 0f27C234C5;
|
|
fma.rn.f32 %f1064, %f422, %f427, %f426;
|
|
abs.f32 %f428, %f1063;
|
|
setp.leu.f32 %p15, %f428, 0f47CE4780;
|
|
@%p15 bra BB0_19;
|
|
|
|
add.u64 %rd49, %SP, 12;
|
|
cvta.to.local.u64 %rd479, %rd49;
|
|
mov.u32 %r434, 0;
|
|
mov.u64 %rd480, 0;
|
|
mov.u32 %r435, %r434;
|
|
|
|
BB0_10:
|
|
.pragma "nounroll";
|
|
mov.b32 %r405, %f1063;
|
|
shl.b32 %r404, %r405, 8;
|
|
or.b32 %r403, %r404, -2147483648;
|
|
add.u64 %rd474, %SP, 12;
|
|
cvta.to.local.u64 %rd473, %rd474;
|
|
shl.b64 %rd50, %rd480, 2;
|
|
mov.u64 %rd51, __cudart_i2opi_f;
|
|
add.s64 %rd52, %rd51, %rd50;
|
|
ld.const.u32 %r138, [%rd52];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r136, %r138, %r403, %r435;
|
|
madc.hi.u32 %r435, %r138, %r403, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd479], %r136;
|
|
add.s32 %r434, %r434, 1;
|
|
cvt.s64.s32 %rd480, %r434;
|
|
mul.wide.s32 %rd55, %r434, 4;
|
|
add.s64 %rd479, %rd473, %rd55;
|
|
setp.ne.s32 %p16, %r434, 6;
|
|
@%p16 bra BB0_10;
|
|
|
|
mov.b32 %r407, %f1063;
|
|
shr.u32 %r406, %r407, 23;
|
|
add.u64 %rd475, %SP, 12;
|
|
and.b32 %r141, %r406, 255;
|
|
add.s32 %r142, %r141, -128;
|
|
shr.u32 %r143, %r142, 5;
|
|
cvta.to.local.u64 %rd57, %rd475;
|
|
st.local.u32 [%rd57+24], %r435;
|
|
mov.u32 %r144, 6;
|
|
sub.s32 %r145, %r144, %r143;
|
|
mul.wide.s32 %rd58, %r145, 4;
|
|
add.s64 %rd8, %rd57, %rd58;
|
|
ld.local.u32 %r436, [%rd8];
|
|
ld.local.u32 %r437, [%rd8+-4];
|
|
and.b32 %r23, %r406, 31;
|
|
setp.eq.s32 %p17, %r23, 0;
|
|
@%p17 bra BB0_13;
|
|
|
|
mov.u32 %r146, 32;
|
|
sub.s32 %r147, %r146, %r23;
|
|
shr.u32 %r148, %r437, %r147;
|
|
shl.b32 %r149, %r436, %r23;
|
|
add.s32 %r436, %r148, %r149;
|
|
ld.local.u32 %r150, [%rd8+-8];
|
|
shr.u32 %r151, %r150, %r147;
|
|
shl.b32 %r152, %r437, %r23;
|
|
add.s32 %r437, %r151, %r152;
|
|
|
|
BB0_13:
|
|
mov.b32 %r415, %f1063;
|
|
and.b32 %r439, %r415, -2147483648;
|
|
shr.u32 %r153, %r437, 30;
|
|
shl.b32 %r154, %r436, 2;
|
|
add.s32 %r438, %r153, %r154;
|
|
shl.b32 %r29, %r437, 2;
|
|
shr.u32 %r155, %r438, 31;
|
|
shr.u32 %r156, %r436, 30;
|
|
add.s32 %r30, %r155, %r156;
|
|
setp.eq.s32 %p18, %r155, 0;
|
|
@%p18 bra BB0_14;
|
|
bra.uni BB0_15;
|
|
|
|
BB0_14:
|
|
mov.u32 %r440, %r29;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_15:
|
|
mov.b32 %r417, %f1063;
|
|
and.b32 %r416, %r417, -2147483648;
|
|
not.b32 %r157, %r438;
|
|
neg.s32 %r440, %r29;
|
|
setp.eq.s32 %p19, %r29, 0;
|
|
selp.u32 %r158, 1, 0, %p19;
|
|
add.s32 %r438, %r158, %r157;
|
|
xor.b32 %r439, %r416, -2147483648;
|
|
|
|
BB0_16:
|
|
mov.b32 %r419, %f1063;
|
|
and.b32 %r418, %r419, -2147483648;
|
|
clz.b32 %r442, %r438;
|
|
setp.eq.s32 %p20, %r442, 0;
|
|
shl.b32 %r159, %r438, %r442;
|
|
mov.u32 %r160, 32;
|
|
sub.s32 %r161, %r160, %r442;
|
|
shr.u32 %r162, %r440, %r161;
|
|
add.s32 %r163, %r162, %r159;
|
|
selp.b32 %r38, %r438, %r163, %p20;
|
|
mov.u32 %r164, -921707870;
|
|
mul.hi.u32 %r441, %r38, %r164;
|
|
setp.eq.s32 %p21, %r418, 0;
|
|
neg.s32 %r165, %r30;
|
|
selp.b32 %r443, %r30, %r165, %p21;
|
|
setp.lt.s32 %p22, %r441, 1;
|
|
@%p22 bra BB0_18;
|
|
|
|
mul.lo.s32 %r166, %r38, -921707870;
|
|
shr.u32 %r167, %r166, 31;
|
|
shl.b32 %r168, %r441, 1;
|
|
add.s32 %r441, %r167, %r168;
|
|
add.s32 %r442, %r442, 1;
|
|
|
|
BB0_18:
|
|
mov.u32 %r169, 126;
|
|
sub.s32 %r170, %r169, %r442;
|
|
shl.b32 %r171, %r170, 23;
|
|
add.s32 %r172, %r441, 1;
|
|
shr.u32 %r173, %r172, 7;
|
|
add.s32 %r174, %r173, 1;
|
|
shr.u32 %r175, %r174, 1;
|
|
add.s32 %r176, %r175, %r171;
|
|
or.b32 %r177, %r176, %r439;
|
|
mov.b32 %f1064, %r177;
|
|
|
|
BB0_19:
|
|
add.s32 %r46, %r443, 1;
|
|
and.b32 %r47, %r46, 1;
|
|
setp.eq.s32 %p23, %r47, 0;
|
|
@%p23 bra BB0_21;
|
|
bra.uni BB0_20;
|
|
|
|
BB0_21:
|
|
mul.rn.f32 %f963, %f1064, %f1064;
|
|
mov.f32 %f431, 0f3C08839E;
|
|
mov.f32 %f432, 0fB94CA1F9;
|
|
fma.rn.f32 %f1065, %f432, %f963, %f431;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_20:
|
|
mul.rn.f32 %f959, %f1064, %f1064;
|
|
mov.f32 %f429, 0fBAB6061A;
|
|
mov.f32 %f430, 0f37CCF5CE;
|
|
fma.rn.f32 %f1065, %f430, %f959, %f429;
|
|
|
|
BB0_22:
|
|
@%p23 bra BB0_24;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_24:
|
|
mul.rn.f32 %f962, %f1064, %f1064;
|
|
mov.f32 %f958, 0f00000000;
|
|
mov.f32 %f436, 0fBE2AAAA3;
|
|
fma.rn.f32 %f437, %f1065, %f962, %f436;
|
|
fma.rn.f32 %f1066, %f437, %f962, %f958;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_23:
|
|
mul.rn.f32 %f960, %f1064, %f1064;
|
|
mov.f32 %f433, 0f3D2AAAA5;
|
|
fma.rn.f32 %f434, %f1065, %f960, %f433;
|
|
mov.f32 %f435, 0fBF000000;
|
|
fma.rn.f32 %f1066, %f434, %f960, %f435;
|
|
|
|
BB0_25:
|
|
fma.rn.f32 %f1067, %f1066, %f1064, %f1064;
|
|
@%p23 bra BB0_27;
|
|
|
|
mul.rn.f32 %f961, %f1064, %f1064;
|
|
mov.f32 %f946, 0f3F800000;
|
|
fma.rn.f32 %f1067, %f1066, %f961, %f946;
|
|
|
|
BB0_27:
|
|
add.s32 %r420, %r443, 1;
|
|
and.b32 %r178, %r420, 2;
|
|
setp.eq.s32 %p26, %r178, 0;
|
|
@%p26 bra BB0_29;
|
|
|
|
mov.f32 %f954, 0f00000000;
|
|
mov.f32 %f441, 0fBF800000;
|
|
fma.rn.f32 %f1067, %f1067, %f441, %f954;
|
|
|
|
BB0_29:
|
|
abs.f32 %f947, %f1069;
|
|
setp.neu.f32 %p118, %f947, 0f7F800000;
|
|
@%p118 bra BB0_31;
|
|
|
|
mov.f32 %f957, 0f00000000;
|
|
mul.rn.f32 %f1069, %f1069, %f957;
|
|
|
|
BB0_31:
|
|
mov.f32 %f950, 0f27C234C5;
|
|
mov.f32 %f949, 0f33A22168;
|
|
mov.f32 %f948, 0f3FC90FDA;
|
|
mul.f32 %f443, %f1069, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r453, %f443;
|
|
cvt.rn.f32.s32 %f444, %r453;
|
|
neg.f32 %f445, %f444;
|
|
fma.rn.f32 %f447, %f445, %f948, %f1069;
|
|
fma.rn.f32 %f449, %f445, %f949, %f447;
|
|
fma.rn.f32 %f1070, %f445, %f950, %f449;
|
|
abs.f32 %f451, %f1069;
|
|
setp.leu.f32 %p28, %f451, 0f47CE4780;
|
|
@%p28 bra BB0_42;
|
|
|
|
add.u64 %rd60, %SP, 12;
|
|
cvta.to.local.u64 %rd481, %rd60;
|
|
mov.b32 %r49, %f1069;
|
|
shl.b32 %r181, %r49, 8;
|
|
or.b32 %r51, %r181, -2147483648;
|
|
mov.u32 %r444, 0;
|
|
mov.u64 %rd482, %rd25;
|
|
mov.u32 %r445, %r444;
|
|
|
|
BB0_33:
|
|
.pragma "nounroll";
|
|
add.u64 %rd477, %SP, 12;
|
|
cvta.to.local.u64 %rd476, %rd477;
|
|
shl.b64 %rd61, %rd482, 2;
|
|
mov.u64 %rd62, __cudart_i2opi_f;
|
|
add.s64 %rd63, %rd62, %rd61;
|
|
ld.const.u32 %r184, [%rd63];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r182, %r184, %r51, %r445;
|
|
madc.hi.u32 %r445, %r184, %r51, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd481], %r182;
|
|
add.s32 %r444, %r444, 1;
|
|
cvt.s64.s32 %rd482, %r444;
|
|
mul.wide.s32 %rd64, %r444, 4;
|
|
add.s64 %rd481, %rd476, %rd64;
|
|
setp.ne.s32 %p29, %r444, 6;
|
|
@%p29 bra BB0_33;
|
|
|
|
mov.b32 %r422, %f1069;
|
|
shr.u32 %r421, %r422, 23;
|
|
add.u64 %rd478, %SP, 12;
|
|
and.b32 %r187, %r421, 255;
|
|
add.s32 %r188, %r187, -128;
|
|
shr.u32 %r189, %r188, 5;
|
|
cvta.to.local.u64 %rd66, %rd478;
|
|
st.local.u32 [%rd66+24], %r445;
|
|
mov.u32 %r190, 6;
|
|
sub.s32 %r191, %r190, %r189;
|
|
mul.wide.s32 %rd67, %r191, 4;
|
|
add.s64 %rd15, %rd66, %rd67;
|
|
ld.local.u32 %r446, [%rd15];
|
|
ld.local.u32 %r447, [%rd15+-4];
|
|
and.b32 %r59, %r421, 31;
|
|
setp.eq.s32 %p30, %r59, 0;
|
|
@%p30 bra BB0_36;
|
|
|
|
mov.u32 %r192, 32;
|
|
sub.s32 %r193, %r192, %r59;
|
|
shr.u32 %r194, %r447, %r193;
|
|
shl.b32 %r195, %r446, %r59;
|
|
add.s32 %r446, %r194, %r195;
|
|
ld.local.u32 %r196, [%rd15+-8];
|
|
shr.u32 %r197, %r196, %r193;
|
|
shl.b32 %r198, %r447, %r59;
|
|
add.s32 %r447, %r197, %r198;
|
|
|
|
BB0_36:
|
|
mov.b32 %r425, %f1069;
|
|
and.b32 %r449, %r425, -2147483648;
|
|
shr.u32 %r199, %r447, 30;
|
|
shl.b32 %r200, %r446, 2;
|
|
add.s32 %r448, %r199, %r200;
|
|
shl.b32 %r65, %r447, 2;
|
|
shr.u32 %r201, %r448, 31;
|
|
shr.u32 %r202, %r446, 30;
|
|
add.s32 %r66, %r201, %r202;
|
|
setp.eq.s32 %p31, %r201, 0;
|
|
@%p31 bra BB0_37;
|
|
bra.uni BB0_38;
|
|
|
|
BB0_37:
|
|
mov.u32 %r450, %r65;
|
|
bra.uni BB0_39;
|
|
|
|
BB0_38:
|
|
mov.b32 %r427, %f1069;
|
|
and.b32 %r426, %r427, -2147483648;
|
|
not.b32 %r203, %r448;
|
|
neg.s32 %r450, %r65;
|
|
setp.eq.s32 %p32, %r65, 0;
|
|
selp.u32 %r204, 1, 0, %p32;
|
|
add.s32 %r448, %r204, %r203;
|
|
xor.b32 %r449, %r426, -2147483648;
|
|
|
|
BB0_39:
|
|
mov.b32 %r429, %f1069;
|
|
and.b32 %r428, %r429, -2147483648;
|
|
clz.b32 %r452, %r448;
|
|
setp.eq.s32 %p33, %r452, 0;
|
|
shl.b32 %r205, %r448, %r452;
|
|
mov.u32 %r206, 32;
|
|
sub.s32 %r207, %r206, %r452;
|
|
shr.u32 %r208, %r450, %r207;
|
|
add.s32 %r209, %r208, %r205;
|
|
selp.b32 %r74, %r448, %r209, %p33;
|
|
mov.u32 %r210, -921707870;
|
|
mul.hi.u32 %r451, %r74, %r210;
|
|
setp.eq.s32 %p34, %r428, 0;
|
|
neg.s32 %r211, %r66;
|
|
selp.b32 %r453, %r66, %r211, %p34;
|
|
setp.lt.s32 %p35, %r451, 1;
|
|
@%p35 bra BB0_41;
|
|
|
|
mul.lo.s32 %r212, %r74, -921707870;
|
|
shr.u32 %r213, %r212, 31;
|
|
shl.b32 %r214, %r451, 1;
|
|
add.s32 %r451, %r213, %r214;
|
|
add.s32 %r452, %r452, 1;
|
|
|
|
BB0_41:
|
|
mov.u32 %r215, 126;
|
|
sub.s32 %r216, %r215, %r452;
|
|
shl.b32 %r217, %r216, 23;
|
|
add.s32 %r218, %r451, 1;
|
|
shr.u32 %r219, %r218, 7;
|
|
add.s32 %r220, %r219, 1;
|
|
shr.u32 %r221, %r220, 1;
|
|
add.s32 %r222, %r221, %r217;
|
|
or.b32 %r223, %r222, %r449;
|
|
mov.b32 %f1070, %r223;
|
|
|
|
BB0_42:
|
|
and.b32 %r82, %r453, 1;
|
|
setp.eq.s32 %p36, %r82, 0;
|
|
@%p36 bra BB0_44;
|
|
bra.uni BB0_43;
|
|
|
|
BB0_44:
|
|
mul.rn.f32 %f968, %f1070, %f1070;
|
|
mov.f32 %f454, 0f3C08839E;
|
|
mov.f32 %f455, 0fB94CA1F9;
|
|
fma.rn.f32 %f1071, %f455, %f968, %f454;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_43:
|
|
mul.rn.f32 %f964, %f1070, %f1070;
|
|
mov.f32 %f452, 0fBAB6061A;
|
|
mov.f32 %f453, 0f37CCF5CE;
|
|
fma.rn.f32 %f1071, %f453, %f964, %f452;
|
|
|
|
BB0_45:
|
|
@%p36 bra BB0_47;
|
|
bra.uni BB0_46;
|
|
|
|
BB0_47:
|
|
mul.rn.f32 %f967, %f1070, %f1070;
|
|
mov.f32 %f956, 0f00000000;
|
|
mov.f32 %f459, 0fBE2AAAA3;
|
|
fma.rn.f32 %f460, %f1071, %f967, %f459;
|
|
fma.rn.f32 %f1072, %f460, %f967, %f956;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_46:
|
|
mul.rn.f32 %f965, %f1070, %f1070;
|
|
mov.f32 %f456, 0f3D2AAAA5;
|
|
fma.rn.f32 %f457, %f1071, %f965, %f456;
|
|
mov.f32 %f458, 0fBF000000;
|
|
fma.rn.f32 %f1072, %f457, %f965, %f458;
|
|
|
|
BB0_48:
|
|
fma.rn.f32 %f1073, %f1072, %f1070, %f1070;
|
|
@%p36 bra BB0_50;
|
|
|
|
mul.rn.f32 %f966, %f1070, %f1070;
|
|
mov.f32 %f951, 0f3F800000;
|
|
fma.rn.f32 %f1073, %f1072, %f966, %f951;
|
|
|
|
BB0_50:
|
|
and.b32 %r224, %r453, 2;
|
|
setp.eq.s32 %p39, %r224, 0;
|
|
@%p39 bra BB0_52;
|
|
|
|
mov.f32 %f955, 0f00000000;
|
|
mov.f32 %f464, 0fBF800000;
|
|
fma.rn.f32 %f1073, %f1073, %f464, %f955;
|
|
|
|
BB0_52:
|
|
mad.lo.s32 %r410, %r10, 1664525, 1013904223;
|
|
mad.lo.s32 %r433, %r410, 1664525, 1013904223;
|
|
max.f32 %f952, %f405, %f350;
|
|
mul.f32 %f473, %f86, %f1067;
|
|
add.u64 %rd68, %SP, 0;
|
|
cvta.to.local.u64 %rd69, %rd68;
|
|
mul.f32 %f474, %f86, %f1073;
|
|
mul.f32 %f475, %f13, %f474;
|
|
mul.f32 %f476, %f14, %f474;
|
|
mul.f32 %f477, %f15, %f474;
|
|
fma.rn.f32 %f478, %f22, %f473, %f475;
|
|
fma.rn.f32 %f479, %f21, %f473, %f476;
|
|
fma.rn.f32 %f480, %f20, %f473, %f477;
|
|
fma.rn.f32 %f468, %f1000, %f85, %f478;
|
|
fma.rn.f32 %f469, %f1001, %f85, %f479;
|
|
fma.rn.f32 %f470, %f1002, %f85, %f480;
|
|
mov.u32 %r226, 0;
|
|
st.local.u32 [%rd69+8], %r226;
|
|
st.local.u32 [%rd69+4], %r226;
|
|
st.local.u32 [%rd69], %r226;
|
|
ld.global.u32 %r225, [root];
|
|
mov.f32 %f472, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r225, %f10, %f11, %f12, %f468, %f469, %f470, %r226, %f952, %f472, %rd68, %r113);
|
|
// inline asm
|
|
mul.f32 %f481, %f1001, %f469;
|
|
fma.rn.f32 %f482, %f1000, %f468, %f481;
|
|
fma.rn.f32 %f483, %f1002, %f470, %f482;
|
|
ld.local.f32 %f484, [%rd69+8];
|
|
ld.local.f32 %f485, [%rd69+4];
|
|
ld.local.f32 %f486, [%rd69];
|
|
add.f32 %f1038, %f1038, %f486;
|
|
add.f32 %f1037, %f1037, %f485;
|
|
add.f32 %f1036, %f1036, %f484;
|
|
fma.rn.f32 %f1041, %f469, %f486, %f1041;
|
|
fma.rn.f32 %f1040, %f469, %f485, %f1040;
|
|
fma.rn.f32 %f1039, %f469, %f484, %f1039;
|
|
fma.rn.f32 %f1044, %f470, %f486, %f1044;
|
|
fma.rn.f32 %f1043, %f470, %f485, %f1043;
|
|
fma.rn.f32 %f1042, %f470, %f484, %f1042;
|
|
fma.rn.f32 %f1047, %f468, %f486, %f1047;
|
|
fma.rn.f32 %f1046, %f468, %f485, %f1046;
|
|
fma.rn.f32 %f1045, %f468, %f484, %f1045;
|
|
mul.f32 %f487, %f468, %f469;
|
|
fma.rn.f32 %f1050, %f487, %f486, %f1050;
|
|
fma.rn.f32 %f1049, %f487, %f485, %f1049;
|
|
fma.rn.f32 %f1048, %f487, %f484, %f1048;
|
|
mul.f32 %f488, %f469, %f470;
|
|
fma.rn.f32 %f1053, %f488, %f486, %f1053;
|
|
fma.rn.f32 %f1052, %f488, %f485, %f1052;
|
|
fma.rn.f32 %f1051, %f488, %f484, %f1051;
|
|
fma.rn.f32 %f489, %f470, %f470, 0fBEAAAAAB;
|
|
fma.rn.f32 %f1056, %f489, %f486, %f1056;
|
|
fma.rn.f32 %f1055, %f489, %f485, %f1055;
|
|
fma.rn.f32 %f1054, %f489, %f484, %f1054;
|
|
mul.f32 %f490, %f468, %f470;
|
|
fma.rn.f32 %f1059, %f490, %f486, %f1059;
|
|
fma.rn.f32 %f1058, %f490, %f485, %f1058;
|
|
fma.rn.f32 %f1057, %f490, %f484, %f1057;
|
|
mul.f32 %f491, %f468, %f468;
|
|
mul.f32 %f492, %f469, %f469;
|
|
sub.f32 %f493, %f491, %f492;
|
|
fma.rn.f32 %f1062, %f493, %f486, %f1062;
|
|
fma.rn.f32 %f1061, %f493, %f485, %f1061;
|
|
fma.rn.f32 %f1060, %f493, %f484, %f1060;
|
|
cvt.sat.f32.f32 %f494, %f483;
|
|
fma.rn.f32 %f1035, %f494, %f486, %f1035;
|
|
fma.rn.f32 %f1034, %f494, %f485, %f1034;
|
|
fma.rn.f32 %f1033, %f494, %f484, %f1033;
|
|
add.s32 %r432, %r432, 1;
|
|
setp.lt.s32 %p40, %r432, %r2;
|
|
@%p40 bra BB0_6;
|
|
|
|
mad.lo.s32 %r412, %r10, 1664525, 1013904223;
|
|
mad.lo.s32 %r433, %r412, 1664525, 1013904223;
|
|
add.s32 %r430, %r430, 1;
|
|
setp.lt.s32 %p41, %r430, %r2;
|
|
@%p41 bra BB0_5;
|
|
|
|
BB0_54:
|
|
mul.lo.s32 %r228, %r2, %r2;
|
|
cvt.rn.f32.s32 %f495, %r228;
|
|
rcp.rn.f32 %f496, %f495;
|
|
cvt.rn.f32.u32 %f497, %r5;
|
|
cvt.rn.f32.u32 %f498, %r4;
|
|
tex.2d.v4.f32.f32 {%f499, %f500, %f501, %f502}, [albedoTex, {%f498, %f497}];
|
|
mul.f32 %f183, %f1038, %f496;
|
|
mul.f32 %f184, %f1037, %f496;
|
|
mul.f32 %f185, %f1036, %f496;
|
|
mul.f32 %f186, %f1041, %f496;
|
|
mul.f32 %f187, %f1040, %f496;
|
|
mul.f32 %f188, %f1039, %f496;
|
|
mul.f32 %f189, %f1044, %f496;
|
|
mul.f32 %f190, %f1043, %f496;
|
|
mul.f32 %f191, %f1042, %f496;
|
|
mul.f32 %f192, %f1047, %f496;
|
|
mul.f32 %f193, %f1046, %f496;
|
|
mul.f32 %f194, %f1045, %f496;
|
|
mul.f32 %f195, %f1050, %f496;
|
|
mul.f32 %f196, %f1049, %f496;
|
|
mul.f32 %f197, %f1048, %f496;
|
|
mul.f32 %f198, %f1053, %f496;
|
|
mul.f32 %f199, %f1052, %f496;
|
|
mul.f32 %f200, %f1051, %f496;
|
|
mul.f32 %f201, %f1056, %f496;
|
|
mul.f32 %f202, %f1055, %f496;
|
|
mul.f32 %f203, %f1054, %f496;
|
|
mul.f32 %f204, %f1059, %f496;
|
|
mul.f32 %f205, %f1058, %f496;
|
|
mul.f32 %f206, %f1057, %f496;
|
|
mul.f32 %f207, %f1062, %f496;
|
|
mul.f32 %f208, %f1061, %f496;
|
|
mul.f32 %f209, %f1060, %f496;
|
|
mul.f32 %f503, %f1035, %f496;
|
|
mul.f32 %f504, %f1034, %f496;
|
|
mul.f32 %f505, %f1033, %f496;
|
|
fma.rn.f32 %f506, %f1035, %f496, %f503;
|
|
fma.rn.f32 %f507, %f1034, %f496, %f504;
|
|
fma.rn.f32 %f508, %f1033, %f496, %f505;
|
|
mul.f32 %f210, %f506, %f499;
|
|
mul.f32 %f211, %f507, %f500;
|
|
mul.f32 %f212, %f508, %f501;
|
|
add.f32 %f213, %f302, %f210;
|
|
add.f32 %f214, %f303, %f211;
|
|
add.f32 %f215, %f304, %f212;
|
|
abs.f32 %f509, %f213;
|
|
setp.gtu.f32 %p43, %f509, 0f7F800000;
|
|
mov.pred %p119, -1;
|
|
@%p43 bra BB0_57;
|
|
|
|
abs.f32 %f510, %f214;
|
|
setp.gtu.f32 %p45, %f510, 0f7F800000;
|
|
@%p45 bra BB0_57;
|
|
|
|
abs.f32 %f511, %f215;
|
|
setp.gtu.f32 %p119, %f511, 0f7F800000;
|
|
|
|
BB0_57:
|
|
selp.f32 %f216, 0f00000000, %f213, %p119;
|
|
selp.f32 %f217, 0f00000000, %f214, %p119;
|
|
selp.f32 %f218, 0f00000000, %f215, %p119;
|
|
ld.global.u32 %r455, [imageEnabled];
|
|
and.b32 %r229, %r455, 1;
|
|
setp.eq.b32 %p46, %r229, 1;
|
|
@!%p46 bra BB0_92;
|
|
bra.uni BB0_58;
|
|
|
|
BB0_58:
|
|
abs.f32 %f220, %f216;
|
|
setp.lt.f32 %p47, %f220, 0f00800000;
|
|
mul.f32 %f517, %f220, 0f4B800000;
|
|
selp.f32 %f518, 0fC3170000, 0fC2FE0000, %p47;
|
|
selp.f32 %f519, %f517, %f220, %p47;
|
|
mov.b32 %r230, %f519;
|
|
and.b32 %r231, %r230, 8388607;
|
|
or.b32 %r232, %r231, 1065353216;
|
|
mov.b32 %f520, %r232;
|
|
shr.u32 %r233, %r230, 23;
|
|
cvt.rn.f32.u32 %f521, %r233;
|
|
add.f32 %f522, %f518, %f521;
|
|
setp.gt.f32 %p48, %f520, 0f3FB504F3;
|
|
mul.f32 %f523, %f520, 0f3F000000;
|
|
add.f32 %f524, %f522, 0f3F800000;
|
|
selp.f32 %f525, %f523, %f520, %p48;
|
|
selp.f32 %f526, %f524, %f522, %p48;
|
|
add.f32 %f527, %f525, 0fBF800000;
|
|
add.f32 %f513, %f525, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f512,%f513;
|
|
// inline asm
|
|
add.f32 %f528, %f527, %f527;
|
|
mul.f32 %f529, %f512, %f528;
|
|
mul.f32 %f530, %f529, %f529;
|
|
mov.f32 %f531, 0f3C4CAF63;
|
|
mov.f32 %f532, 0f3B18F0FE;
|
|
fma.rn.f32 %f533, %f532, %f530, %f531;
|
|
mov.f32 %f534, 0f3DAAAABD;
|
|
fma.rn.f32 %f535, %f533, %f530, %f534;
|
|
mul.rn.f32 %f536, %f535, %f530;
|
|
mul.rn.f32 %f537, %f536, %f529;
|
|
sub.f32 %f538, %f527, %f529;
|
|
neg.f32 %f539, %f529;
|
|
add.f32 %f540, %f538, %f538;
|
|
fma.rn.f32 %f541, %f539, %f527, %f540;
|
|
mul.rn.f32 %f542, %f512, %f541;
|
|
add.f32 %f543, %f537, %f529;
|
|
sub.f32 %f544, %f529, %f543;
|
|
add.f32 %f545, %f537, %f544;
|
|
add.f32 %f546, %f542, %f545;
|
|
add.f32 %f547, %f543, %f546;
|
|
sub.f32 %f548, %f543, %f547;
|
|
add.f32 %f549, %f546, %f548;
|
|
mov.f32 %f550, 0f3F317200;
|
|
mul.rn.f32 %f551, %f526, %f550;
|
|
mov.f32 %f552, 0f35BFBE8E;
|
|
mul.rn.f32 %f553, %f526, %f552;
|
|
add.f32 %f554, %f551, %f547;
|
|
sub.f32 %f555, %f551, %f554;
|
|
add.f32 %f556, %f547, %f555;
|
|
add.f32 %f557, %f549, %f556;
|
|
add.f32 %f558, %f553, %f557;
|
|
add.f32 %f559, %f554, %f558;
|
|
sub.f32 %f560, %f554, %f559;
|
|
add.f32 %f561, %f558, %f560;
|
|
mov.f32 %f562, 0f3EE66666;
|
|
mul.rn.f32 %f563, %f562, %f559;
|
|
neg.f32 %f564, %f563;
|
|
fma.rn.f32 %f565, %f562, %f559, %f564;
|
|
fma.rn.f32 %f566, %f562, %f561, %f565;
|
|
mov.f32 %f567, 0f00000000;
|
|
fma.rn.f32 %f568, %f567, %f559, %f566;
|
|
add.rn.f32 %f569, %f563, %f568;
|
|
neg.f32 %f570, %f569;
|
|
add.rn.f32 %f571, %f563, %f570;
|
|
add.rn.f32 %f572, %f571, %f568;
|
|
mov.b32 %r234, %f569;
|
|
setp.eq.s32 %p49, %r234, 1118925336;
|
|
add.s32 %r235, %r234, -1;
|
|
mov.b32 %f573, %r235;
|
|
add.f32 %f574, %f572, 0f37000000;
|
|
selp.f32 %f575, %f573, %f569, %p49;
|
|
selp.f32 %f221, %f574, %f572, %p49;
|
|
mul.f32 %f576, %f575, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f577, %f576;
|
|
mov.f32 %f578, 0fBF317200;
|
|
fma.rn.f32 %f579, %f577, %f578, %f575;
|
|
mov.f32 %f580, 0fB5BFBE8E;
|
|
fma.rn.f32 %f581, %f577, %f580, %f579;
|
|
mul.f32 %f582, %f581, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f583, %f582;
|
|
add.f32 %f584, %f577, 0f00000000;
|
|
ex2.approx.f32 %f585, %f584;
|
|
mul.f32 %f586, %f583, %f585;
|
|
setp.lt.f32 %p50, %f575, 0fC2D20000;
|
|
selp.f32 %f587, 0f00000000, %f586, %p50;
|
|
setp.gt.f32 %p51, %f575, 0f42D20000;
|
|
selp.f32 %f1105, 0f7F800000, %f587, %p51;
|
|
setp.eq.f32 %p52, %f1105, 0f7F800000;
|
|
@%p52 bra BB0_60;
|
|
|
|
fma.rn.f32 %f1105, %f1105, %f221, %f1105;
|
|
|
|
BB0_60:
|
|
mov.f32 %f972, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f971, %f972;
|
|
fma.rn.f32 %f970, %f971, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f969, %f970;
|
|
setp.lt.f32 %p53, %f216, 0f00000000;
|
|
setp.eq.f32 %p54, %f969, 0f3F800000;
|
|
and.pred %p3, %p53, %p54;
|
|
mov.b32 %r236, %f1105;
|
|
xor.b32 %r237, %r236, -2147483648;
|
|
mov.b32 %f588, %r237;
|
|
selp.f32 %f1107, %f588, %f1105, %p3;
|
|
setp.eq.f32 %p55, %f216, 0f00000000;
|
|
@%p55 bra BB0_63;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_63:
|
|
add.f32 %f591, %f216, %f216;
|
|
selp.f32 %f1107, %f591, 0f00000000, %p54;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_131:
|
|
mov.u64 %rd312, image_RNM0;
|
|
cvta.global.u64 %rd307, %rd312;
|
|
mov.u32 %r346, 8;
|
|
mov.u64 %rd311, 0;
|
|
// inline asm
|
|
call (%rd306), _rt_buffer_get_64, (%rd307, %r95, %r346, %rd18, %rd19, %rd311, %rd311);
|
|
// inline asm
|
|
mov.f32 %f889, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs179, %f889;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs180, 0;
|
|
st.v4.u16 [%rd306], {%rs179, %rs179, %rs179, %rs180};
|
|
|
|
BB0_132:
|
|
ld.global.u32 %r347, [additive];
|
|
setp.eq.s32 %p110, %r347, 0;
|
|
@%p110 bra BB0_134;
|
|
|
|
mov.u64 %rd325, image_RNM1;
|
|
cvta.global.u64 %rd314, %rd325;
|
|
mov.u32 %r351, 8;
|
|
mov.u64 %rd324, 0;
|
|
// inline asm
|
|
call (%rd313), _rt_buffer_get_64, (%rd314, %r95, %r351, %rd18, %rd19, %rd324, %rd324);
|
|
// inline asm
|
|
ld.v4.u16 {%rs187, %rs188, %rs189, %rs190}, [%rd313];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f890, %rs187;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f891, %rs188;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f892, %rs189;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd319), _rt_buffer_get_64, (%rd314, %r95, %r351, %rd18, %rd19, %rd324, %rd324);
|
|
// inline asm
|
|
add.f32 %f893, %f890, 0f00000000;
|
|
add.f32 %f894, %f891, 0f00000000;
|
|
add.f32 %f895, %f892, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs186, %f895;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs185, %f894;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs184, %f893;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs191, 0;
|
|
st.v4.u16 [%rd319], {%rs184, %rs185, %rs186, %rs191};
|
|
bra.uni BB0_135;
|
|
|
|
BB0_134:
|
|
mov.u64 %rd332, image_RNM1;
|
|
cvta.global.u64 %rd327, %rd332;
|
|
mov.u32 %r353, 8;
|
|
mov.u64 %rd331, 0;
|
|
// inline asm
|
|
call (%rd326), _rt_buffer_get_64, (%rd327, %r95, %r353, %rd18, %rd19, %rd331, %rd331);
|
|
// inline asm
|
|
mov.f32 %f896, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs192, %f896;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs193, 0;
|
|
st.v4.u16 [%rd326], {%rs192, %rs192, %rs192, %rs193};
|
|
|
|
BB0_135:
|
|
ld.global.u32 %r354, [additive];
|
|
setp.eq.s32 %p111, %r354, 0;
|
|
@%p111 bra BB0_137;
|
|
|
|
mov.u64 %rd345, image_RNM2;
|
|
cvta.global.u64 %rd334, %rd345;
|
|
mov.u32 %r358, 8;
|
|
mov.u64 %rd344, 0;
|
|
// inline asm
|
|
call (%rd333), _rt_buffer_get_64, (%rd334, %r95, %r358, %rd18, %rd19, %rd344, %rd344);
|
|
// inline asm
|
|
ld.v4.u16 {%rs200, %rs201, %rs202, %rs203}, [%rd333];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f897, %rs200;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f898, %rs201;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f899, %rs202;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd339), _rt_buffer_get_64, (%rd334, %r95, %r358, %rd18, %rd19, %rd344, %rd344);
|
|
// inline asm
|
|
add.f32 %f900, %f897, 0f00000000;
|
|
add.f32 %f901, %f898, 0f00000000;
|
|
add.f32 %f902, %f899, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs199, %f902;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs198, %f901;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs197, %f900;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs204, 0;
|
|
st.v4.u16 [%rd339], {%rs197, %rs198, %rs199, %rs204};
|
|
bra.uni BB0_138;
|
|
|
|
BB0_137:
|
|
mov.u64 %rd352, image_RNM2;
|
|
cvta.global.u64 %rd347, %rd352;
|
|
mov.u32 %r360, 8;
|
|
mov.u64 %rd351, 0;
|
|
// inline asm
|
|
call (%rd346), _rt_buffer_get_64, (%rd347, %r95, %r360, %rd18, %rd19, %rd351, %rd351);
|
|
// inline asm
|
|
mov.f32 %f903, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs205, %f903;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs206, 0;
|
|
st.v4.u16 [%rd346], {%rs205, %rs205, %rs205, %rs206};
|
|
|
|
BB0_138:
|
|
ld.global.u32 %r361, [additive];
|
|
setp.eq.s32 %p112, %r361, 0;
|
|
@%p112 bra BB0_140;
|
|
|
|
mov.u64 %rd365, image_RNM3;
|
|
cvta.global.u64 %rd354, %rd365;
|
|
mov.u32 %r365, 8;
|
|
mov.u64 %rd364, 0;
|
|
// inline asm
|
|
call (%rd353), _rt_buffer_get_64, (%rd354, %r95, %r365, %rd18, %rd19, %rd364, %rd364);
|
|
// inline asm
|
|
ld.v4.u16 {%rs213, %rs214, %rs215, %rs216}, [%rd353];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f904, %rs213;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f905, %rs214;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f906, %rs215;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd359), _rt_buffer_get_64, (%rd354, %r95, %r365, %rd18, %rd19, %rd364, %rd364);
|
|
// inline asm
|
|
add.f32 %f907, %f904, 0f00000000;
|
|
add.f32 %f908, %f905, 0f00000000;
|
|
add.f32 %f909, %f906, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs212, %f909;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs211, %f908;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs210, %f907;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs217, 0;
|
|
st.v4.u16 [%rd359], {%rs210, %rs211, %rs212, %rs217};
|
|
bra.uni BB0_141;
|
|
|
|
BB0_140:
|
|
mov.u64 %rd372, image_RNM3;
|
|
cvta.global.u64 %rd367, %rd372;
|
|
mov.u32 %r367, 8;
|
|
mov.u64 %rd371, 0;
|
|
// inline asm
|
|
call (%rd366), _rt_buffer_get_64, (%rd367, %r95, %r367, %rd18, %rd19, %rd371, %rd371);
|
|
// inline asm
|
|
mov.f32 %f910, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs218, %f910;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs219, 0;
|
|
st.v4.u16 [%rd366], {%rs218, %rs218, %rs218, %rs219};
|
|
|
|
BB0_141:
|
|
ld.global.u32 %r368, [additive];
|
|
setp.eq.s32 %p113, %r368, 0;
|
|
@%p113 bra BB0_143;
|
|
|
|
mov.u64 %rd385, image_RNM4;
|
|
cvta.global.u64 %rd374, %rd385;
|
|
mov.u32 %r372, 8;
|
|
mov.u64 %rd384, 0;
|
|
// inline asm
|
|
call (%rd373), _rt_buffer_get_64, (%rd374, %r95, %r372, %rd18, %rd19, %rd384, %rd384);
|
|
// inline asm
|
|
ld.v4.u16 {%rs226, %rs227, %rs228, %rs229}, [%rd373];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f911, %rs226;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f912, %rs227;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f913, %rs228;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd379), _rt_buffer_get_64, (%rd374, %r95, %r372, %rd18, %rd19, %rd384, %rd384);
|
|
// inline asm
|
|
add.f32 %f914, %f911, 0f00000000;
|
|
add.f32 %f915, %f912, 0f00000000;
|
|
add.f32 %f916, %f913, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs225, %f916;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs224, %f915;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs223, %f914;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs230, 0;
|
|
st.v4.u16 [%rd379], {%rs223, %rs224, %rs225, %rs230};
|
|
bra.uni BB0_144;
|
|
|
|
BB0_143:
|
|
mov.u64 %rd392, image_RNM4;
|
|
cvta.global.u64 %rd387, %rd392;
|
|
mov.u32 %r374, 8;
|
|
mov.u64 %rd391, 0;
|
|
// inline asm
|
|
call (%rd386), _rt_buffer_get_64, (%rd387, %r95, %r374, %rd18, %rd19, %rd391, %rd391);
|
|
// inline asm
|
|
mov.f32 %f917, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs231, %f917;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs232, 0;
|
|
st.v4.u16 [%rd386], {%rs231, %rs231, %rs231, %rs232};
|
|
|
|
BB0_144:
|
|
ld.global.u32 %r375, [additive];
|
|
setp.eq.s32 %p114, %r375, 0;
|
|
@%p114 bra BB0_146;
|
|
|
|
mov.u64 %rd405, image_RNM5;
|
|
cvta.global.u64 %rd394, %rd405;
|
|
mov.u32 %r379, 8;
|
|
mov.u64 %rd404, 0;
|
|
// inline asm
|
|
call (%rd393), _rt_buffer_get_64, (%rd394, %r95, %r379, %rd18, %rd19, %rd404, %rd404);
|
|
// inline asm
|
|
ld.v4.u16 {%rs239, %rs240, %rs241, %rs242}, [%rd393];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f918, %rs239;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f919, %rs240;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f920, %rs241;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd399), _rt_buffer_get_64, (%rd394, %r95, %r379, %rd18, %rd19, %rd404, %rd404);
|
|
// inline asm
|
|
add.f32 %f921, %f918, 0f00000000;
|
|
add.f32 %f922, %f919, 0f00000000;
|
|
add.f32 %f923, %f920, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs238, %f923;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs237, %f922;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs236, %f921;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs243, 0;
|
|
st.v4.u16 [%rd399], {%rs236, %rs237, %rs238, %rs243};
|
|
bra.uni BB0_147;
|
|
|
|
BB0_146:
|
|
mov.u64 %rd412, image_RNM5;
|
|
cvta.global.u64 %rd407, %rd412;
|
|
mov.u32 %r381, 8;
|
|
mov.u64 %rd411, 0;
|
|
// inline asm
|
|
call (%rd406), _rt_buffer_get_64, (%rd407, %r95, %r381, %rd18, %rd19, %rd411, %rd411);
|
|
// inline asm
|
|
mov.f32 %f924, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs244, %f924;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs245, 0;
|
|
st.v4.u16 [%rd406], {%rs244, %rs244, %rs244, %rs245};
|
|
|
|
BB0_147:
|
|
ld.global.u32 %r382, [additive];
|
|
setp.eq.s32 %p115, %r382, 0;
|
|
@%p115 bra BB0_149;
|
|
|
|
mov.u64 %rd425, image_RNM6;
|
|
cvta.global.u64 %rd414, %rd425;
|
|
mov.u32 %r386, 8;
|
|
mov.u64 %rd424, 0;
|
|
// inline asm
|
|
call (%rd413), _rt_buffer_get_64, (%rd414, %r95, %r386, %rd18, %rd19, %rd424, %rd424);
|
|
// inline asm
|
|
ld.v4.u16 {%rs252, %rs253, %rs254, %rs255}, [%rd413];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f925, %rs252;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f926, %rs253;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f927, %rs254;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd419), _rt_buffer_get_64, (%rd414, %r95, %r386, %rd18, %rd19, %rd424, %rd424);
|
|
// inline asm
|
|
add.f32 %f928, %f925, 0f00000000;
|
|
add.f32 %f929, %f926, 0f00000000;
|
|
add.f32 %f930, %f927, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs251, %f930;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs250, %f929;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs249, %f928;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs256, 0;
|
|
st.v4.u16 [%rd419], {%rs249, %rs250, %rs251, %rs256};
|
|
bra.uni BB0_150;
|
|
|
|
BB0_149:
|
|
mov.u64 %rd432, image_RNM6;
|
|
cvta.global.u64 %rd427, %rd432;
|
|
mov.u32 %r388, 8;
|
|
mov.u64 %rd431, 0;
|
|
// inline asm
|
|
call (%rd426), _rt_buffer_get_64, (%rd427, %r95, %r388, %rd18, %rd19, %rd431, %rd431);
|
|
// inline asm
|
|
mov.f32 %f931, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs257, %f931;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs258, 0;
|
|
st.v4.u16 [%rd426], {%rs257, %rs257, %rs257, %rs258};
|
|
|
|
BB0_150:
|
|
ld.global.u32 %r389, [additive];
|
|
setp.eq.s32 %p116, %r389, 0;
|
|
@%p116 bra BB0_152;
|
|
|
|
mov.u64 %rd445, image_RNM7;
|
|
cvta.global.u64 %rd434, %rd445;
|
|
mov.u32 %r393, 8;
|
|
mov.u64 %rd444, 0;
|
|
// inline asm
|
|
call (%rd433), _rt_buffer_get_64, (%rd434, %r95, %r393, %rd18, %rd19, %rd444, %rd444);
|
|
// inline asm
|
|
ld.v4.u16 {%rs265, %rs266, %rs267, %rs268}, [%rd433];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f932, %rs265;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f933, %rs266;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f934, %rs267;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd439), _rt_buffer_get_64, (%rd434, %r95, %r393, %rd18, %rd19, %rd444, %rd444);
|
|
// inline asm
|
|
add.f32 %f935, %f932, 0f00000000;
|
|
add.f32 %f936, %f933, 0f00000000;
|
|
add.f32 %f937, %f934, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs264, %f937;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs263, %f936;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs262, %f935;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs269, 0;
|
|
st.v4.u16 [%rd439], {%rs262, %rs263, %rs264, %rs269};
|
|
bra.uni BB0_153;
|
|
|
|
BB0_152:
|
|
mov.u64 %rd452, image_RNM7;
|
|
cvta.global.u64 %rd447, %rd452;
|
|
mov.u32 %r395, 8;
|
|
mov.u64 %rd451, 0;
|
|
// inline asm
|
|
call (%rd446), _rt_buffer_get_64, (%rd447, %r95, %r395, %rd18, %rd19, %rd451, %rd451);
|
|
// inline asm
|
|
mov.f32 %f938, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs270, %f938;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs271, 0;
|
|
st.v4.u16 [%rd446], {%rs270, %rs270, %rs270, %rs271};
|
|
|
|
BB0_153:
|
|
ld.global.u32 %r396, [additive];
|
|
setp.eq.s32 %p117, %r396, 0;
|
|
@%p117 bra BB0_155;
|
|
|
|
mov.u64 %rd465, image_RNM8;
|
|
cvta.global.u64 %rd454, %rd465;
|
|
mov.u32 %r400, 8;
|
|
mov.u64 %rd464, 0;
|
|
// inline asm
|
|
call (%rd453), _rt_buffer_get_64, (%rd454, %r95, %r400, %rd18, %rd19, %rd464, %rd464);
|
|
// inline asm
|
|
ld.v4.u16 {%rs278, %rs279, %rs280, %rs281}, [%rd453];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f939, %rs278;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f940, %rs279;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f941, %rs280;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd459), _rt_buffer_get_64, (%rd454, %r95, %r400, %rd18, %rd19, %rd464, %rd464);
|
|
// inline asm
|
|
add.f32 %f942, %f939, 0f00000000;
|
|
add.f32 %f943, %f940, 0f00000000;
|
|
add.f32 %f944, %f941, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs277, %f944;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs276, %f943;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs275, %f942;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs282, 0;
|
|
st.v4.u16 [%rd459], {%rs275, %rs276, %rs277, %rs282};
|
|
bra.uni BB0_156;
|
|
|
|
BB0_155:
|
|
mov.u64 %rd472, image_RNM8;
|
|
cvta.global.u64 %rd467, %rd472;
|
|
mov.u32 %r402, 8;
|
|
mov.u64 %rd471, 0;
|
|
// inline asm
|
|
call (%rd466), _rt_buffer_get_64, (%rd467, %r95, %r402, %rd18, %rd19, %rd471, %rd471);
|
|
// inline asm
|
|
mov.f32 %f945, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs283, %f945;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs284, 0;
|
|
st.v4.u16 [%rd466], {%rs283, %rs283, %rs283, %rs284};
|
|
bra.uni BB0_156;
|
|
|
|
BB0_61:
|
|
setp.geu.f32 %p56, %f216, 0f00000000;
|
|
@%p56 bra BB0_64;
|
|
|
|
mov.f32 %f996, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f590, %f996;
|
|
setp.neu.f32 %p57, %f590, 0f3EE66666;
|
|
selp.f32 %f1107, 0f7FFFFFFF, %f1107, %p57;
|
|
|
|
BB0_64:
|
|
abs.f32 %f973, %f216;
|
|
add.f32 %f592, %f973, 0f3EE66666;
|
|
mov.b32 %r238, %f592;
|
|
setp.lt.s32 %p59, %r238, 2139095040;
|
|
@%p59 bra BB0_69;
|
|
|
|
abs.f32 %f994, %f216;
|
|
setp.gtu.f32 %p60, %f994, 0f7F800000;
|
|
@%p60 bra BB0_68;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_68:
|
|
add.f32 %f1107, %f216, 0f3EE66666;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_66:
|
|
abs.f32 %f995, %f216;
|
|
setp.neu.f32 %p61, %f995, 0f7F800000;
|
|
@%p61 bra BB0_69;
|
|
|
|
selp.f32 %f1107, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_69:
|
|
mov.f32 %f982, 0fB5BFBE8E;
|
|
mov.f32 %f981, 0fBF317200;
|
|
mov.f32 %f980, 0f00000000;
|
|
mov.f32 %f979, 0f35BFBE8E;
|
|
mov.f32 %f978, 0f3F317200;
|
|
mov.f32 %f977, 0f3DAAAABD;
|
|
mov.f32 %f976, 0f3C4CAF63;
|
|
mov.f32 %f975, 0f3B18F0FE;
|
|
mov.f32 %f974, 0f3EE66666;
|
|
setp.eq.f32 %p62, %f216, 0f3F800000;
|
|
selp.f32 %f232, 0f3F800000, %f1107, %p62;
|
|
abs.f32 %f233, %f217;
|
|
setp.lt.f32 %p63, %f233, 0f00800000;
|
|
mul.f32 %f595, %f233, 0f4B800000;
|
|
selp.f32 %f596, 0fC3170000, 0fC2FE0000, %p63;
|
|
selp.f32 %f597, %f595, %f233, %p63;
|
|
mov.b32 %r239, %f597;
|
|
and.b32 %r240, %r239, 8388607;
|
|
or.b32 %r241, %r240, 1065353216;
|
|
mov.b32 %f598, %r241;
|
|
shr.u32 %r242, %r239, 23;
|
|
cvt.rn.f32.u32 %f599, %r242;
|
|
add.f32 %f600, %f596, %f599;
|
|
setp.gt.f32 %p64, %f598, 0f3FB504F3;
|
|
mul.f32 %f601, %f598, 0f3F000000;
|
|
add.f32 %f602, %f600, 0f3F800000;
|
|
selp.f32 %f603, %f601, %f598, %p64;
|
|
selp.f32 %f604, %f602, %f600, %p64;
|
|
add.f32 %f605, %f603, 0fBF800000;
|
|
add.f32 %f594, %f603, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f593,%f594;
|
|
// inline asm
|
|
add.f32 %f606, %f605, %f605;
|
|
mul.f32 %f607, %f593, %f606;
|
|
mul.f32 %f608, %f607, %f607;
|
|
fma.rn.f32 %f611, %f975, %f608, %f976;
|
|
fma.rn.f32 %f613, %f611, %f608, %f977;
|
|
mul.rn.f32 %f614, %f613, %f608;
|
|
mul.rn.f32 %f615, %f614, %f607;
|
|
sub.f32 %f616, %f605, %f607;
|
|
neg.f32 %f617, %f607;
|
|
add.f32 %f618, %f616, %f616;
|
|
fma.rn.f32 %f619, %f617, %f605, %f618;
|
|
mul.rn.f32 %f620, %f593, %f619;
|
|
add.f32 %f621, %f615, %f607;
|
|
sub.f32 %f622, %f607, %f621;
|
|
add.f32 %f623, %f615, %f622;
|
|
add.f32 %f624, %f620, %f623;
|
|
add.f32 %f625, %f621, %f624;
|
|
sub.f32 %f626, %f621, %f625;
|
|
add.f32 %f627, %f624, %f626;
|
|
mul.rn.f32 %f629, %f604, %f978;
|
|
mul.rn.f32 %f631, %f604, %f979;
|
|
add.f32 %f632, %f629, %f625;
|
|
sub.f32 %f633, %f629, %f632;
|
|
add.f32 %f634, %f625, %f633;
|
|
add.f32 %f635, %f627, %f634;
|
|
add.f32 %f636, %f631, %f635;
|
|
add.f32 %f637, %f632, %f636;
|
|
sub.f32 %f638, %f632, %f637;
|
|
add.f32 %f639, %f636, %f638;
|
|
mul.rn.f32 %f641, %f974, %f637;
|
|
neg.f32 %f642, %f641;
|
|
fma.rn.f32 %f643, %f974, %f637, %f642;
|
|
fma.rn.f32 %f644, %f974, %f639, %f643;
|
|
fma.rn.f32 %f646, %f980, %f637, %f644;
|
|
add.rn.f32 %f647, %f641, %f646;
|
|
neg.f32 %f648, %f647;
|
|
add.rn.f32 %f649, %f641, %f648;
|
|
add.rn.f32 %f650, %f649, %f646;
|
|
mov.b32 %r243, %f647;
|
|
setp.eq.s32 %p65, %r243, 1118925336;
|
|
add.s32 %r244, %r243, -1;
|
|
mov.b32 %f651, %r244;
|
|
add.f32 %f652, %f650, 0f37000000;
|
|
selp.f32 %f653, %f651, %f647, %p65;
|
|
selp.f32 %f234, %f652, %f650, %p65;
|
|
mul.f32 %f654, %f653, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f655, %f654;
|
|
fma.rn.f32 %f657, %f655, %f981, %f653;
|
|
fma.rn.f32 %f659, %f655, %f982, %f657;
|
|
mul.f32 %f660, %f659, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f661, %f660;
|
|
add.f32 %f662, %f655, 0f00000000;
|
|
ex2.approx.f32 %f663, %f662;
|
|
mul.f32 %f664, %f661, %f663;
|
|
setp.lt.f32 %p66, %f653, 0fC2D20000;
|
|
selp.f32 %f665, 0f00000000, %f664, %p66;
|
|
setp.gt.f32 %p67, %f653, 0f42D20000;
|
|
selp.f32 %f1108, 0f7F800000, %f665, %p67;
|
|
setp.eq.f32 %p68, %f1108, 0f7F800000;
|
|
@%p68 bra BB0_71;
|
|
|
|
fma.rn.f32 %f1108, %f1108, %f234, %f1108;
|
|
|
|
BB0_71:
|
|
setp.lt.f32 %p69, %f217, 0f00000000;
|
|
and.pred %p4, %p69, %p54;
|
|
mov.b32 %r245, %f1108;
|
|
xor.b32 %r246, %r245, -2147483648;
|
|
mov.b32 %f666, %r246;
|
|
selp.f32 %f1110, %f666, %f1108, %p4;
|
|
setp.eq.f32 %p71, %f217, 0f00000000;
|
|
@%p71 bra BB0_74;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_74:
|
|
add.f32 %f669, %f217, %f217;
|
|
selp.f32 %f1110, %f669, 0f00000000, %p54;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_72:
|
|
setp.geu.f32 %p72, %f217, 0f00000000;
|
|
@%p72 bra BB0_75;
|
|
|
|
mov.f32 %f993, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f668, %f993;
|
|
setp.neu.f32 %p73, %f668, 0f3EE66666;
|
|
selp.f32 %f1110, 0f7FFFFFFF, %f1110, %p73;
|
|
|
|
BB0_75:
|
|
abs.f32 %f997, %f217;
|
|
add.f32 %f670, %f997, 0f3EE66666;
|
|
mov.b32 %r247, %f670;
|
|
setp.lt.s32 %p75, %r247, 2139095040;
|
|
@%p75 bra BB0_80;
|
|
|
|
abs.f32 %f998, %f217;
|
|
setp.gtu.f32 %p76, %f998, 0f7F800000;
|
|
@%p76 bra BB0_79;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_79:
|
|
add.f32 %f1110, %f217, 0f3EE66666;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_77:
|
|
abs.f32 %f999, %f217;
|
|
setp.neu.f32 %p77, %f999, 0f7F800000;
|
|
@%p77 bra BB0_80;
|
|
|
|
selp.f32 %f1110, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_80:
|
|
mov.f32 %f991, 0fB5BFBE8E;
|
|
mov.f32 %f990, 0fBF317200;
|
|
mov.f32 %f989, 0f00000000;
|
|
mov.f32 %f988, 0f35BFBE8E;
|
|
mov.f32 %f987, 0f3F317200;
|
|
mov.f32 %f986, 0f3DAAAABD;
|
|
mov.f32 %f985, 0f3C4CAF63;
|
|
mov.f32 %f984, 0f3B18F0FE;
|
|
mov.f32 %f983, 0f3EE66666;
|
|
setp.eq.f32 %p78, %f217, 0f3F800000;
|
|
selp.f32 %f245, 0f3F800000, %f1110, %p78;
|
|
abs.f32 %f246, %f218;
|
|
setp.lt.f32 %p79, %f246, 0f00800000;
|
|
mul.f32 %f673, %f246, 0f4B800000;
|
|
selp.f32 %f674, 0fC3170000, 0fC2FE0000, %p79;
|
|
selp.f32 %f675, %f673, %f246, %p79;
|
|
mov.b32 %r248, %f675;
|
|
and.b32 %r249, %r248, 8388607;
|
|
or.b32 %r250, %r249, 1065353216;
|
|
mov.b32 %f676, %r250;
|
|
shr.u32 %r251, %r248, 23;
|
|
cvt.rn.f32.u32 %f677, %r251;
|
|
add.f32 %f678, %f674, %f677;
|
|
setp.gt.f32 %p80, %f676, 0f3FB504F3;
|
|
mul.f32 %f679, %f676, 0f3F000000;
|
|
add.f32 %f680, %f678, 0f3F800000;
|
|
selp.f32 %f681, %f679, %f676, %p80;
|
|
selp.f32 %f682, %f680, %f678, %p80;
|
|
add.f32 %f683, %f681, 0fBF800000;
|
|
add.f32 %f672, %f681, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f671,%f672;
|
|
// inline asm
|
|
add.f32 %f684, %f683, %f683;
|
|
mul.f32 %f685, %f671, %f684;
|
|
mul.f32 %f686, %f685, %f685;
|
|
fma.rn.f32 %f689, %f984, %f686, %f985;
|
|
fma.rn.f32 %f691, %f689, %f686, %f986;
|
|
mul.rn.f32 %f692, %f691, %f686;
|
|
mul.rn.f32 %f693, %f692, %f685;
|
|
sub.f32 %f694, %f683, %f685;
|
|
neg.f32 %f695, %f685;
|
|
add.f32 %f696, %f694, %f694;
|
|
fma.rn.f32 %f697, %f695, %f683, %f696;
|
|
mul.rn.f32 %f698, %f671, %f697;
|
|
add.f32 %f699, %f693, %f685;
|
|
sub.f32 %f700, %f685, %f699;
|
|
add.f32 %f701, %f693, %f700;
|
|
add.f32 %f702, %f698, %f701;
|
|
add.f32 %f703, %f699, %f702;
|
|
sub.f32 %f704, %f699, %f703;
|
|
add.f32 %f705, %f702, %f704;
|
|
mul.rn.f32 %f707, %f682, %f987;
|
|
mul.rn.f32 %f709, %f682, %f988;
|
|
add.f32 %f710, %f707, %f703;
|
|
sub.f32 %f711, %f707, %f710;
|
|
add.f32 %f712, %f703, %f711;
|
|
add.f32 %f713, %f705, %f712;
|
|
add.f32 %f714, %f709, %f713;
|
|
add.f32 %f715, %f710, %f714;
|
|
sub.f32 %f716, %f710, %f715;
|
|
add.f32 %f717, %f714, %f716;
|
|
mul.rn.f32 %f719, %f983, %f715;
|
|
neg.f32 %f720, %f719;
|
|
fma.rn.f32 %f721, %f983, %f715, %f720;
|
|
fma.rn.f32 %f722, %f983, %f717, %f721;
|
|
fma.rn.f32 %f724, %f989, %f715, %f722;
|
|
add.rn.f32 %f725, %f719, %f724;
|
|
neg.f32 %f726, %f725;
|
|
add.rn.f32 %f727, %f719, %f726;
|
|
add.rn.f32 %f728, %f727, %f724;
|
|
mov.b32 %r252, %f725;
|
|
setp.eq.s32 %p81, %r252, 1118925336;
|
|
add.s32 %r253, %r252, -1;
|
|
mov.b32 %f729, %r253;
|
|
add.f32 %f730, %f728, 0f37000000;
|
|
selp.f32 %f731, %f729, %f725, %p81;
|
|
selp.f32 %f247, %f730, %f728, %p81;
|
|
mul.f32 %f732, %f731, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f733, %f732;
|
|
fma.rn.f32 %f735, %f733, %f990, %f731;
|
|
fma.rn.f32 %f737, %f733, %f991, %f735;
|
|
mul.f32 %f738, %f737, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f739, %f738;
|
|
add.f32 %f740, %f733, 0f00000000;
|
|
ex2.approx.f32 %f741, %f740;
|
|
mul.f32 %f742, %f739, %f741;
|
|
setp.lt.f32 %p82, %f731, 0fC2D20000;
|
|
selp.f32 %f743, 0f00000000, %f742, %p82;
|
|
setp.gt.f32 %p83, %f731, 0f42D20000;
|
|
selp.f32 %f1111, 0f7F800000, %f743, %p83;
|
|
setp.eq.f32 %p84, %f1111, 0f7F800000;
|
|
@%p84 bra BB0_82;
|
|
|
|
fma.rn.f32 %f1111, %f1111, %f247, %f1111;
|
|
|
|
BB0_82:
|
|
setp.lt.f32 %p85, %f218, 0f00000000;
|
|
and.pred %p5, %p85, %p54;
|
|
mov.b32 %r254, %f1111;
|
|
xor.b32 %r255, %r254, -2147483648;
|
|
mov.b32 %f744, %r255;
|
|
selp.f32 %f1113, %f744, %f1111, %p5;
|
|
setp.eq.f32 %p87, %f218, 0f00000000;
|
|
@%p87 bra BB0_85;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_85:
|
|
add.f32 %f747, %f218, %f218;
|
|
selp.f32 %f1113, %f747, 0f00000000, %p54;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_83:
|
|
setp.geu.f32 %p88, %f218, 0f00000000;
|
|
@%p88 bra BB0_86;
|
|
|
|
mov.f32 %f992, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f746, %f992;
|
|
setp.neu.f32 %p89, %f746, 0f3EE66666;
|
|
selp.f32 %f1113, 0f7FFFFFFF, %f1113, %p89;
|
|
|
|
BB0_86:
|
|
add.f32 %f748, %f246, 0f3EE66666;
|
|
mov.b32 %r256, %f748;
|
|
setp.lt.s32 %p91, %r256, 2139095040;
|
|
@%p91 bra BB0_91;
|
|
|
|
setp.gtu.f32 %p92, %f246, 0f7F800000;
|
|
@%p92 bra BB0_90;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_90:
|
|
add.f32 %f1113, %f218, 0f3EE66666;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_88:
|
|
setp.neu.f32 %p93, %f246, 0f7F800000;
|
|
@%p93 bra BB0_91;
|
|
|
|
selp.f32 %f1113, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_91:
|
|
mov.u32 %r413, 4;
|
|
setp.eq.f32 %p94, %f218, 0f3F800000;
|
|
selp.f32 %f749, 0f3F800000, %f1113, %p94;
|
|
cvt.u64.u32 %rd74, %r5;
|
|
cvt.u64.u32 %rd73, %r4;
|
|
mov.u64 %rd77, image;
|
|
cvta.global.u64 %rd72, %rd77;
|
|
// inline asm
|
|
call (%rd71), _rt_buffer_get_64, (%rd72, %r95, %r413, %rd73, %rd74, %rd25, %rd25);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f750, %f749;
|
|
mul.f32 %f751, %f750, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r259, %f751;
|
|
cvt.sat.f32.f32 %f752, %f245;
|
|
mul.f32 %f753, %f752, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r260, %f753;
|
|
cvt.sat.f32.f32 %f754, %f232;
|
|
mul.f32 %f755, %f754, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r261, %f755;
|
|
cvt.u16.u32 %rs25, %r259;
|
|
cvt.u16.u32 %rs26, %r261;
|
|
cvt.u16.u32 %rs27, %r260;
|
|
mov.u16 %rs28, 255;
|
|
st.v4.u8 [%rd71], {%rs25, %rs27, %rs26, %rs28};
|
|
ld.global.u32 %r455, [imageEnabled];
|
|
|
|
BB0_92:
|
|
and.b32 %r262, %r455, 4;
|
|
setp.eq.s32 %p95, %r262, 0;
|
|
@%p95 bra BB0_94;
|
|
|
|
cvt.u64.u32 %rd80, %r4;
|
|
cvt.u64.u32 %rd81, %r5;
|
|
mov.u64 %rd84, image_HDR;
|
|
cvta.global.u64 %rd79, %rd84;
|
|
// inline asm
|
|
call (%rd78), _rt_buffer_get_64, (%rd79, %r95, %r111, %rd80, %rd81, %rd25, %rd25);
|
|
// inline asm
|
|
mov.f32 %f759, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f759;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f218;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f217;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f216;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd78], {%rs29, %rs30, %rs31, %rs32};
|
|
ld.global.u32 %r455, [imageEnabled];
|
|
|
|
BB0_94:
|
|
and.b32 %r265, %r455, 16;
|
|
setp.eq.s32 %p96, %r265, 0;
|
|
@%p96 bra BB0_96;
|
|
|
|
cvt.u64.u32 %rd88, %r5;
|
|
cvt.u64.u32 %rd87, %r4;
|
|
mov.u64 %rd91, image_HDR2;
|
|
cvta.global.u64 %rd86, %rd91;
|
|
// inline asm
|
|
call (%rd85), _rt_buffer_get_64, (%rd86, %r95, %r111, %rd87, %rd88, %rd25, %rd25);
|
|
// inline asm
|
|
mov.f32 %f763, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f763;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f212;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f211;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f210;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd85], {%rs33, %rs34, %rs35, %rs36};
|
|
|
|
BB0_96:
|
|
cvt.u64.u32 %rd16, %r4;
|
|
cvt.u64.u32 %rd17, %r5;
|
|
mul.f32 %f765, %f183, 0f40800000;
|
|
mul.f32 %f258, %f765, 0f3F558750;
|
|
mul.f32 %f766, %f184, 0f40800000;
|
|
mul.f32 %f259, %f766, 0f3F558750;
|
|
mul.f32 %f767, %f185, 0f40800000;
|
|
mul.f32 %f260, %f767, 0f3F558750;
|
|
ld.global.u32 %r268, [additive];
|
|
setp.eq.s32 %p97, %r268, 0;
|
|
mov.f32 %f764, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f764;}
|
|
|
|
// inline asm
|
|
@%p97 bra BB0_98;
|
|
|
|
mov.u64 %rd104, image_RNM0;
|
|
cvta.global.u64 %rd93, %rd104;
|
|
// inline asm
|
|
call (%rd92), _rt_buffer_get_64, (%rd93, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd92];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f768, %rs44;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f769, %rs45;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f770, %rs46;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd98), _rt_buffer_get_64, (%rd93, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f771, %f258, %f768;
|
|
add.f32 %f772, %f259, %f769;
|
|
add.f32 %f773, %f260, %f770;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f773;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f772;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f771;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd98], {%rs41, %rs42, %rs43, %rs37};
|
|
bra.uni BB0_99;
|
|
|
|
BB0_98:
|
|
mov.u64 %rd111, image_RNM0;
|
|
cvta.global.u64 %rd106, %rd111;
|
|
// inline asm
|
|
call (%rd105), _rt_buffer_get_64, (%rd106, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f260;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f259;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f258;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd105], {%rs48, %rs49, %rs50, %rs37};
|
|
|
|
BB0_99:
|
|
mul.f32 %f778, %f186, 0f40800000;
|
|
mul.f32 %f261, %f778, 0f3FB8EBD1;
|
|
mul.f32 %f779, %f187, 0f40800000;
|
|
mul.f32 %f262, %f779, 0f3FB8EBD1;
|
|
mul.f32 %f780, %f188, 0f40800000;
|
|
mul.f32 %f263, %f780, 0f3FB8EBD1;
|
|
ld.global.u32 %r275, [additive];
|
|
setp.eq.s32 %p98, %r275, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f764;}
|
|
|
|
// inline asm
|
|
@%p98 bra BB0_101;
|
|
|
|
mov.u64 %rd124, image_RNM1;
|
|
cvta.global.u64 %rd113, %rd124;
|
|
// inline asm
|
|
call (%rd112), _rt_buffer_get_64, (%rd113, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd112];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f781, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f782, %rs59;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f783, %rs60;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd118), _rt_buffer_get_64, (%rd113, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f784, %f261, %f781;
|
|
add.f32 %f785, %f262, %f782;
|
|
add.f32 %f786, %f263, %f783;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f786;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f785;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f784;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd118], {%rs55, %rs56, %rs57, %rs51};
|
|
bra.uni BB0_102;
|
|
|
|
BB0_101:
|
|
mov.u64 %rd131, image_RNM1;
|
|
cvta.global.u64 %rd126, %rd131;
|
|
// inline asm
|
|
call (%rd125), _rt_buffer_get_64, (%rd126, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f263;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f262;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f261;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd125], {%rs62, %rs63, %rs64, %rs51};
|
|
|
|
BB0_102:
|
|
mul.f32 %f791, %f189, 0f40800000;
|
|
mul.f32 %f264, %f791, 0f3FB8EBD1;
|
|
mul.f32 %f792, %f190, 0f40800000;
|
|
mul.f32 %f265, %f792, 0f3FB8EBD1;
|
|
mul.f32 %f793, %f191, 0f40800000;
|
|
mul.f32 %f266, %f793, 0f3FB8EBD1;
|
|
ld.global.u32 %r282, [additive];
|
|
setp.eq.s32 %p99, %r282, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f764;}
|
|
|
|
// inline asm
|
|
@%p99 bra BB0_104;
|
|
|
|
mov.u64 %rd144, image_RNM2;
|
|
cvta.global.u64 %rd133, %rd144;
|
|
// inline asm
|
|
call (%rd132), _rt_buffer_get_64, (%rd133, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd132];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f794, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f795, %rs73;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f796, %rs74;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd138), _rt_buffer_get_64, (%rd133, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f797, %f264, %f794;
|
|
add.f32 %f798, %f265, %f795;
|
|
add.f32 %f799, %f266, %f796;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f799;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f798;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f797;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd138], {%rs69, %rs70, %rs71, %rs65};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd151, image_RNM2;
|
|
cvta.global.u64 %rd146, %rd151;
|
|
// inline asm
|
|
call (%rd145), _rt_buffer_get_64, (%rd146, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f266;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f265;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f264;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd145], {%rs76, %rs77, %rs78, %rs65};
|
|
|
|
BB0_105:
|
|
mul.f32 %f804, %f192, 0f40800000;
|
|
mul.f32 %f267, %f804, 0f3FB8EBD1;
|
|
mul.f32 %f805, %f193, 0f40800000;
|
|
mul.f32 %f268, %f805, 0f3FB8EBD1;
|
|
mul.f32 %f806, %f194, 0f40800000;
|
|
mul.f32 %f269, %f806, 0f3FB8EBD1;
|
|
ld.global.u32 %r289, [additive];
|
|
setp.eq.s32 %p100, %r289, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f764;}
|
|
|
|
// inline asm
|
|
@%p100 bra BB0_107;
|
|
|
|
mov.u64 %rd164, image_RNM3;
|
|
cvta.global.u64 %rd153, %rd164;
|
|
// inline asm
|
|
call (%rd152), _rt_buffer_get_64, (%rd153, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd152];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f807, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f808, %rs87;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f809, %rs88;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd158), _rt_buffer_get_64, (%rd153, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f810, %f267, %f807;
|
|
add.f32 %f811, %f268, %f808;
|
|
add.f32 %f812, %f269, %f809;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f812;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f811;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f810;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd158], {%rs83, %rs84, %rs85, %rs79};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd171, image_RNM3;
|
|
cvta.global.u64 %rd166, %rd171;
|
|
// inline asm
|
|
call (%rd165), _rt_buffer_get_64, (%rd166, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f269;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f268;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f267;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd165], {%rs90, %rs91, %rs92, %rs79};
|
|
|
|
BB0_108:
|
|
mul.f32 %f817, %f195, 0f40800000;
|
|
mul.f32 %f270, %f817, 0f404EBF87;
|
|
mul.f32 %f818, %f196, 0f40800000;
|
|
mul.f32 %f271, %f818, 0f404EBF87;
|
|
mul.f32 %f819, %f197, 0f40800000;
|
|
mul.f32 %f272, %f819, 0f404EBF87;
|
|
ld.global.u32 %r296, [additive];
|
|
setp.eq.s32 %p101, %r296, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs93, %f764;}
|
|
|
|
// inline asm
|
|
@%p101 bra BB0_110;
|
|
|
|
mov.u64 %rd184, image_RNM4;
|
|
cvta.global.u64 %rd173, %rd184;
|
|
// inline asm
|
|
call (%rd172), _rt_buffer_get_64, (%rd173, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs100, %rs101, %rs102, %rs103}, [%rd172];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f820, %rs100;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f821, %rs101;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f822, %rs102;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd178), _rt_buffer_get_64, (%rd173, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f823, %f270, %f820;
|
|
add.f32 %f824, %f271, %f821;
|
|
add.f32 %f825, %f272, %f822;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f825;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs98, %f824;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f823;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd178], {%rs97, %rs98, %rs99, %rs93};
|
|
bra.uni BB0_111;
|
|
|
|
BB0_110:
|
|
mov.u64 %rd191, image_RNM4;
|
|
cvta.global.u64 %rd186, %rd191;
|
|
// inline asm
|
|
call (%rd185), _rt_buffer_get_64, (%rd186, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs106, %f272;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs105, %f271;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f270;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd185], {%rs104, %rs105, %rs106, %rs93};
|
|
|
|
BB0_111:
|
|
mul.f32 %f830, %f198, 0f40800000;
|
|
mul.f32 %f273, %f830, 0f404EBF87;
|
|
mul.f32 %f831, %f199, 0f40800000;
|
|
mul.f32 %f274, %f831, 0f404EBF87;
|
|
mul.f32 %f832, %f200, 0f40800000;
|
|
mul.f32 %f275, %f832, 0f404EBF87;
|
|
ld.global.u32 %r303, [additive];
|
|
setp.eq.s32 %p102, %r303, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs107, %f764;}
|
|
|
|
// inline asm
|
|
@%p102 bra BB0_113;
|
|
|
|
mov.u64 %rd204, image_RNM5;
|
|
cvta.global.u64 %rd193, %rd204;
|
|
// inline asm
|
|
call (%rd192), _rt_buffer_get_64, (%rd193, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs114, %rs115, %rs116, %rs117}, [%rd192];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f833, %rs114;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f834, %rs115;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f835, %rs116;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd198), _rt_buffer_get_64, (%rd193, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f836, %f273, %f833;
|
|
add.f32 %f837, %f274, %f834;
|
|
add.f32 %f838, %f275, %f835;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs113, %f838;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f837;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f836;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd198], {%rs111, %rs112, %rs113, %rs107};
|
|
bra.uni BB0_114;
|
|
|
|
BB0_113:
|
|
mov.u64 %rd211, image_RNM5;
|
|
cvta.global.u64 %rd206, %rd211;
|
|
// inline asm
|
|
call (%rd205), _rt_buffer_get_64, (%rd206, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs120, %f275;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs119, %f274;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs118, %f273;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd205], {%rs118, %rs119, %rs120, %rs107};
|
|
|
|
BB0_114:
|
|
mul.f32 %f843, %f201, 0f40800000;
|
|
mul.f32 %f276, %f843, 0f40330C94;
|
|
mul.f32 %f844, %f202, 0f40800000;
|
|
mul.f32 %f277, %f844, 0f40330C94;
|
|
mul.f32 %f845, %f203, 0f40800000;
|
|
mul.f32 %f278, %f845, 0f40330C94;
|
|
ld.global.u32 %r310, [additive];
|
|
setp.eq.s32 %p103, %r310, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs121, %f764;}
|
|
|
|
// inline asm
|
|
@%p103 bra BB0_116;
|
|
|
|
mov.u64 %rd224, image_RNM6;
|
|
cvta.global.u64 %rd213, %rd224;
|
|
// inline asm
|
|
call (%rd212), _rt_buffer_get_64, (%rd213, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs128, %rs129, %rs130, %rs131}, [%rd212];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f846, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f847, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f848, %rs130;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd218), _rt_buffer_get_64, (%rd213, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f849, %f276, %f846;
|
|
add.f32 %f850, %f277, %f847;
|
|
add.f32 %f851, %f278, %f848;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f851;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f850;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f849;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd218], {%rs125, %rs126, %rs127, %rs121};
|
|
bra.uni BB0_117;
|
|
|
|
BB0_116:
|
|
mov.u64 %rd231, image_RNM6;
|
|
cvta.global.u64 %rd226, %rd231;
|
|
// inline asm
|
|
call (%rd225), _rt_buffer_get_64, (%rd226, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f278;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f277;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f276;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd225], {%rs132, %rs133, %rs134, %rs121};
|
|
|
|
BB0_117:
|
|
mul.f32 %f856, %f204, 0f40800000;
|
|
mul.f32 %f279, %f856, 0f404EBF87;
|
|
mul.f32 %f857, %f205, 0f40800000;
|
|
mul.f32 %f280, %f857, 0f404EBF87;
|
|
mul.f32 %f858, %f206, 0f40800000;
|
|
mul.f32 %f281, %f858, 0f404EBF87;
|
|
ld.global.u32 %r317, [additive];
|
|
setp.eq.s32 %p104, %r317, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f764;}
|
|
|
|
// inline asm
|
|
@%p104 bra BB0_119;
|
|
|
|
mov.u64 %rd244, image_RNM7;
|
|
cvta.global.u64 %rd233, %rd244;
|
|
// inline asm
|
|
call (%rd232), _rt_buffer_get_64, (%rd233, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs142, %rs143, %rs144, %rs145}, [%rd232];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f859, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f860, %rs143;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f861, %rs144;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd238), _rt_buffer_get_64, (%rd233, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f862, %f279, %f859;
|
|
add.f32 %f863, %f280, %f860;
|
|
add.f32 %f864, %f281, %f861;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs141, %f864;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f863;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f862;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd238], {%rs139, %rs140, %rs141, %rs135};
|
|
bra.uni BB0_120;
|
|
|
|
BB0_119:
|
|
mov.u64 %rd251, image_RNM7;
|
|
cvta.global.u64 %rd246, %rd251;
|
|
// inline asm
|
|
call (%rd245), _rt_buffer_get_64, (%rd246, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs148, %f281;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f280;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f279;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd245], {%rs146, %rs147, %rs148, %rs135};
|
|
|
|
BB0_120:
|
|
mul.f32 %f869, %f207, 0f40800000;
|
|
mul.f32 %f282, %f869, 0f3FCEBF87;
|
|
mul.f32 %f870, %f208, 0f40800000;
|
|
mul.f32 %f283, %f870, 0f3FCEBF87;
|
|
mul.f32 %f871, %f209, 0f40800000;
|
|
mul.f32 %f284, %f871, 0f3FCEBF87;
|
|
ld.global.u32 %r324, [additive];
|
|
setp.eq.s32 %p105, %r324, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f764;}
|
|
|
|
// inline asm
|
|
@%p105 bra BB0_122;
|
|
|
|
mov.u64 %rd264, image_RNM8;
|
|
cvta.global.u64 %rd253, %rd264;
|
|
// inline asm
|
|
call (%rd252), _rt_buffer_get_64, (%rd253, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs156, %rs157, %rs158, %rs159}, [%rd252];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f872, %rs156;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f873, %rs157;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f874, %rs158;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd258), _rt_buffer_get_64, (%rd253, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f875, %f282, %f872;
|
|
add.f32 %f876, %f283, %f873;
|
|
add.f32 %f877, %f284, %f874;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs155, %f877;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs154, %f876;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f875;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd258], {%rs153, %rs154, %rs155, %rs149};
|
|
bra.uni BB0_156;
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BB0_122:
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mov.u64 %rd271, image_RNM8;
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cvta.global.u64 %rd266, %rd271;
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// inline asm
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call (%rd265), _rt_buffer_get_64, (%rd266, %r95, %r111, %rd16, %rd17, %rd25, %rd25);
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs162, %f284;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs161, %f283;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs160, %f282;}
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// inline asm
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st.v4.u16 [%rd265], {%rs160, %rs161, %rs162, %rs149};
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|
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BB0_156:
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ret;
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}
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