262 lines
6.7 KiB
Plaintext
262 lines
6.7 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __closesthit__oxMain
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.const .align 16 .b8 params[1184];
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.visible .entry __closesthit__oxMain()
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{
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.reg .pred %p<19>;
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.reg .b16 %rs<9>;
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.reg .f32 %f<128>;
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.reg .b32 %r<26>;
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.reg .b64 %rd<2>;
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// begin inline asm
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call (%r1), _optix_read_primitive_idx, ();
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// end inline asm
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// begin inline asm
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call (%f21, %f22), _optix_get_triangle_barycentrics, ();
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// end inline asm
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mov.u32 %r3, 0;
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// begin inline asm
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call (%rd1), _optix_call_direct_callable,(%r3);
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// end inline asm
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{ // callseq 0, 0
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.reg .b32 temp_param_reg;
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.param .b32 param0;
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st.param.b32 [param0+0], %r1;
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.param .align 8 .b8 param1[8];
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st.param.v2.f32 [param1+0], {%f21, %f22};
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.param .align 8 .b8 retval0[32];
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prototype_0 : .callprototype (.param .align 8 .b8 _[32]) _ (.param .b32 _, .param .align 8 .b8 _[8]);
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call (retval0),
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%rd1,
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(
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param0,
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param1
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)
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, prototype_0;
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ld.param.v2.f32 {%f1, %f2}, [retval0+0];
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ld.param.f32 %f3, [retval0+8];
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ld.param.v4.b8 {%rs1, %rs2, %rs3, %rs4}, [retval0+12];
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ld.param.v2.f32 {%f4, %f5}, [retval0+16];
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ld.param.f32 %f6, [retval0+24];
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ld.param.v4.b8 {%rs5, %rs6, %rs7, %rs8}, [retval0+28];
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} // callseq 0
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// begin inline asm
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call (%f23), _optix_get_world_ray_direction_x, ();
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// end inline asm
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// begin inline asm
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call (%f24), _optix_get_world_ray_direction_y, ();
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// end inline asm
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// begin inline asm
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call (%f25), _optix_get_world_ray_direction_z, ();
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// end inline asm
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mul.f32 %f27, %f2, %f24;
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fma.rn.f32 %f28, %f1, %f23, %f27;
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fma.rn.f32 %f29, %f3, %f25, %f28;
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setp.gt.f32 %p2, %f29, 0f00000000;
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// begin inline asm
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call (%f26), _optix_get_ray_tmax, ();
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// end inline asm
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mov.u32 %r4, -1082130432;
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// begin inline asm
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call _optix_set_payload, (%r3, %r4);
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// end inline asm
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@%p2 bra $L__BB0_15;
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div.rn.f32 %f30, %f4, 0f41200000;
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mov.b32 %r5, %f30;
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and.b32 %r6, %r5, -2147483648;
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or.b32 %r7, %r6, 1056964608;
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mov.b32 %f31, %r7;
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add.rz.f32 %f32, %f30, %f31;
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cvt.rzi.f32.f32 %f33, %f32;
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cvt.rzi.s32.f32 %r8, %f33;
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ld.const.u32 %r9, [params+664];
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setp.ne.s32 %p3, %r8, %r9;
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@%p3 bra $L__BB0_15;
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ld.const.f32 %f35, [params+660];
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mul.f32 %f8, %f26, %f35;
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mov.f32 %f36, 0f40000000;
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cvt.rzi.f32.f32 %f37, %f36;
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add.f32 %f38, %f37, %f37;
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mov.f32 %f39, 0f40800000;
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sub.f32 %f40, %f39, %f38;
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abs.f32 %f9, %f40;
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abs.f32 %f10, %f8;
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setp.lt.f32 %p4, %f10, 0f00800000;
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mul.f32 %f41, %f10, 0f4B800000;
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selp.f32 %f42, %f41, %f10, %p4;
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selp.f32 %f43, 0fC3170000, 0fC2FE0000, %p4;
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mov.b32 %r10, %f42;
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and.b32 %r11, %r10, 8388607;
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or.b32 %r12, %r11, 1065353216;
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mov.b32 %f44, %r12;
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shr.u32 %r13, %r10, 23;
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cvt.rn.f32.u32 %f45, %r13;
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add.f32 %f46, %f43, %f45;
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setp.gt.f32 %p5, %f44, 0f3FB504F3;
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mul.f32 %f47, %f44, 0f3F000000;
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add.f32 %f48, %f46, 0f3F800000;
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selp.f32 %f49, %f48, %f46, %p5;
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selp.f32 %f50, %f47, %f44, %p5;
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add.f32 %f51, %f50, 0fBF800000;
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add.f32 %f52, %f50, 0f3F800000;
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rcp.approx.ftz.f32 %f53, %f52;
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add.f32 %f54, %f51, %f51;
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mul.f32 %f55, %f54, %f53;
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mul.f32 %f56, %f55, %f55;
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mov.f32 %f57, 0f3C4CAF63;
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mov.f32 %f58, 0f3B18F0FE;
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fma.rn.f32 %f59, %f58, %f56, %f57;
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mov.f32 %f60, 0f3DAAAABD;
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fma.rn.f32 %f61, %f59, %f56, %f60;
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mul.rn.f32 %f62, %f61, %f56;
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mul.rn.f32 %f63, %f62, %f55;
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sub.f32 %f64, %f51, %f55;
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add.f32 %f65, %f64, %f64;
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neg.f32 %f66, %f55;
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fma.rn.f32 %f67, %f66, %f51, %f65;
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mul.rn.f32 %f68, %f53, %f67;
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add.f32 %f69, %f63, %f55;
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sub.f32 %f70, %f55, %f69;
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add.f32 %f71, %f63, %f70;
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add.f32 %f72, %f68, %f71;
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add.f32 %f73, %f69, %f72;
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sub.f32 %f74, %f69, %f73;
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add.f32 %f75, %f72, %f74;
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mov.f32 %f76, 0f3F317200;
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mul.rn.f32 %f77, %f49, %f76;
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mov.f32 %f78, 0f35BFBE8E;
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mul.rn.f32 %f79, %f49, %f78;
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add.f32 %f80, %f77, %f73;
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sub.f32 %f81, %f77, %f80;
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add.f32 %f82, %f73, %f81;
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add.f32 %f83, %f75, %f82;
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add.f32 %f84, %f79, %f83;
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add.f32 %f85, %f80, %f84;
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sub.f32 %f86, %f80, %f85;
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add.f32 %f87, %f84, %f86;
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mul.rn.f32 %f88, %f39, %f85;
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neg.f32 %f89, %f88;
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fma.rn.f32 %f90, %f39, %f85, %f89;
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fma.rn.f32 %f91, %f39, %f87, %f90;
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mov.f32 %f92, 0f00000000;
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fma.rn.f32 %f93, %f92, %f85, %f91;
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add.rn.f32 %f94, %f88, %f93;
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neg.f32 %f95, %f94;
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add.rn.f32 %f96, %f88, %f95;
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add.rn.f32 %f97, %f96, %f93;
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mov.b32 %r14, %f94;
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setp.eq.s32 %p6, %r14, 1118925336;
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add.s32 %r15, %r14, -1;
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mov.b32 %f98, %r15;
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add.f32 %f99, %f97, 0f37000000;
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selp.f32 %f11, %f99, %f97, %p6;
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selp.f32 %f100, %f98, %f94, %p6;
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mov.f32 %f101, 0f3FB8AA3B;
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mul.rn.f32 %f102, %f100, %f101;
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cvt.rzi.f32.f32 %f103, %f102;
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abs.f32 %f104, %f103;
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setp.gt.f32 %p7, %f104, 0f42FC0000;
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mov.b32 %r16, %f103;
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and.b32 %r17, %r16, -2147483648;
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or.b32 %r18, %r17, 1123811328;
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mov.b32 %f105, %r18;
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selp.f32 %f106, %f105, %f103, %p7;
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mov.f32 %f107, 0fBF317218;
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fma.rn.f32 %f108, %f106, %f107, %f100;
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mov.f32 %f109, 0f3102E308;
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fma.rn.f32 %f110, %f106, %f109, %f108;
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mul.f32 %f111, %f110, 0f3FB8AA3B;
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add.f32 %f112, %f106, 0f4B40007F;
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mov.b32 %r19, %f112;
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shl.b32 %r20, %r19, 23;
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mov.b32 %f113, %r20;
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ex2.approx.ftz.f32 %f114, %f111;
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mul.f32 %f12, %f114, %f113;
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setp.eq.f32 %p8, %f12, 0f7F800000;
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mov.f32 %f125, 0f7F800000;
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@%p8 bra $L__BB0_4;
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fma.rn.f32 %f125, %f12, %f11, %f12;
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$L__BB0_4:
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setp.lt.f32 %p9, %f8, 0f00000000;
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setp.eq.f32 %p10, %f9, 0f3F800000;
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and.pred %p1, %p9, %p10;
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setp.eq.f32 %p11, %f8, 0f00000000;
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@%p11 bra $L__BB0_8;
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bra.uni $L__BB0_5;
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$L__BB0_8:
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add.f32 %f119, %f8, %f8;
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selp.f32 %f127, %f119, 0f00000000, %p10;
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bra.uni $L__BB0_9;
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$L__BB0_5:
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mov.b32 %r21, %f125;
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xor.b32 %r22, %r21, -2147483648;
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mov.b32 %f115, %r22;
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selp.f32 %f127, %f115, %f125, %p1;
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setp.geu.f32 %p12, %f8, 0f00000000;
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@%p12 bra $L__BB0_9;
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mov.f32 %f116, 0f40800000;
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cvt.rzi.f32.f32 %f117, %f116;
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setp.eq.f32 %p13, %f117, 0f40800000;
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@%p13 bra $L__BB0_9;
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mov.f32 %f127, 0f7FFFFFFF;
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$L__BB0_9:
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add.f32 %f120, %f10, 0f40800000;
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mov.b32 %r23, %f120;
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setp.lt.s32 %p15, %r23, 2139095040;
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@%p15 bra $L__BB0_14;
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setp.gtu.f32 %p16, %f10, 0f7F800000;
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@%p16 bra $L__BB0_13;
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bra.uni $L__BB0_11;
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$L__BB0_13:
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add.f32 %f127, %f8, 0f40800000;
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bra.uni $L__BB0_14;
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$L__BB0_11:
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setp.neu.f32 %p17, %f10, 0f7F800000;
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@%p17 bra $L__BB0_14;
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selp.f32 %f127, 0fFF800000, 0f7F800000, %p1;
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$L__BB0_14:
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mov.f32 %f121, 0f3F800000;
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sub.f32 %f122, %f121, %f127;
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setp.eq.f32 %p18, %f8, 0f3F800000;
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selp.f32 %f123, 0f00000000, %f122, %p18;
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cvt.sat.f32.f32 %f124, %f123;
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mov.b32 %r25, %f124;
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mov.u32 %r24, 0;
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// begin inline asm
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call _optix_set_payload, (%r24, %r25);
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// end inline asm
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$L__BB0_15:
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ret;
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}
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