3468 lines
94 KiB
Plaintext
3468 lines
94 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<209>;
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.reg .b16 %rs<327>;
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.reg .f32 %f<2065>;
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.reg .b32 %r<519>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<179>;
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mov.u64 %SPL, __local_depot0;
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cvta.local.u64 %SP, %SPL;
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// begin inline asm
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call (%r91), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r92), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+616];
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ld.const.u32 %r4, [params+540];
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shl.b32 %r5, %r4, 1;
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ld.const.u64 %rd43, [params+400];
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cvta.to.global.u64 %rd44, %rd43;
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ld.const.u32 %r97, [params+392];
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mad.lo.s32 %r98, %r97, %r92, %r91;
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mul.wide.u32 %rd45, %r98, 4;
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add.s64 %rd1, %rd44, %rd45;
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ld.global.v2.u8 {%rs7, %rs326}, [%rd1];
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or.b16 %rs9, %rs7, %rs326;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p10, %rs10, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs325, [%rd1+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs325, [%rd1+2];
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setp.eq.s16 %p11, %rs325, 0;
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mov.f32 %f1812, 0f00000000;
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mov.u16 %rs326, 0;
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mov.f32 %f1813, %f1812;
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mov.f32 %f1814, %f1812;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f568, %rs7;
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div.rn.f32 %f569, %f568, 0f437F0000;
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fma.rn.f32 %f570, %f569, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs326, 255;
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cvt.rn.f32.u16 %f571, %rs13;
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div.rn.f32 %f572, %f571, 0f437F0000;
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fma.rn.f32 %f573, %f572, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f574, %rs325;
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div.rn.f32 %f575, %f574, 0f437F0000;
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fma.rn.f32 %f576, %f575, 0f40000000, 0fBF800000;
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mul.f32 %f577, %f573, %f573;
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fma.rn.f32 %f578, %f570, %f570, %f577;
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fma.rn.f32 %f579, %f576, %f576, %f578;
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sqrt.rn.f32 %f580, %f579;
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rcp.rn.f32 %f581, %f580;
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mul.f32 %f1814, %f581, %f576;
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mul.f32 %f1813, %f581, %f573;
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mul.f32 %f1812, %f570, %f581;
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$L__BB0_4:
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ld.const.v2.u32 {%r99, %r100}, [params];
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add.s32 %r6, %r99, %r91;
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add.s32 %r7, %r100, %r92;
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setp.eq.f32 %p12, %f1812, 0f00000000;
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setp.eq.f32 %p13, %f1813, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1814, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_175;
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bra.uni $L__BB0_5;
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$L__BB0_175:
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ld.const.u32 %r88, [params+104];
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and.b32 %r473, %r88, 1;
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setp.eq.b32 %p192, %r473, 1;
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mov.pred %p193, 0;
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xor.pred %p194, %p192, %p193;
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not.pred %p195, %p194;
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@%p195 bra $L__BB0_177;
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ld.const.u64 %rd134, [params+144];
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cvta.to.global.u64 %rd135, %rd134;
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ld.const.u32 %r474, [params+136];
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mad.lo.s32 %r475, %r474, %r7, %r6;
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mul.wide.u32 %rd136, %r475, 4;
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add.s64 %rd137, %rd135, %rd136;
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mov.u16 %rs172, 0;
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st.global.v4.u8 [%rd137], {%rs172, %rs172, %rs172, %rs172};
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$L__BB0_177:
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and.b32 %r476, %r88, 8;
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setp.eq.s32 %p196, %r476, 0;
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@%p196 bra $L__BB0_179;
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ld.const.u64 %rd138, [params+192];
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cvta.to.global.u64 %rd139, %rd138;
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ld.const.u32 %r477, [params+184];
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mad.lo.s32 %r478, %r477, %r7, %r6;
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mov.f32 %f1715, 0f00000000;
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cvt.rzi.u32.f32 %r479, %f1715;
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mul.wide.u32 %rd140, %r478, 2;
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add.s64 %rd141, %rd139, %rd140;
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mov.u16 %rs173, 0;
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cvt.u16.u32 %rs174, %r479;
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st.global.v2.u8 [%rd141], {%rs174, %rs173};
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$L__BB0_179:
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and.b32 %r480, %r88, 4;
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setp.eq.s32 %p197, %r480, 0;
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ld.const.u32 %r518, [params+108];
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@%p197 bra $L__BB0_183;
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setp.eq.s32 %p198, %r518, 0;
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ld.const.u64 %rd142, [params+224];
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cvta.to.global.u64 %rd143, %rd142;
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ld.const.u32 %r481, [params+216];
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mad.lo.s32 %r482, %r481, %r7, %r6;
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mul.wide.u32 %rd144, %r482, 8;
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add.s64 %rd33, %rd143, %rd144;
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@%p198 bra $L__BB0_182;
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ld.global.v4.u16 {%rs181, %rs182, %rs183, %rs184}, [%rd33];
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// begin inline asm
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{ cvt.f32.f16 %f1716, %rs181;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1717, %rs182;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1718, %rs183;}
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// end inline asm
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add.f32 %f1719, %f1716, 0f00000000;
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add.f32 %f1720, %f1717, 0f00000000;
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add.f32 %f1721, %f1718, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs180, %f1721;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs179, %f1720;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs178, %f1719;}
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// end inline asm
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mov.u16 %rs185, 0;
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st.global.v4.u16 [%rd33], {%rs178, %rs179, %rs180, %rs185};
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bra.uni $L__BB0_183;
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$L__BB0_5:
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ld.const.u64 %rd46, [params+432];
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cvta.to.global.u64 %rd47, %rd46;
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ld.const.u32 %r104, [params+424];
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mad.lo.s32 %r105, %r104, %r92, %r91;
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mul.wide.u32 %rd48, %r105, 12;
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add.s64 %rd49, %rd47, %rd48;
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ld.global.f32 %f10, [%rd49];
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mul.f32 %f613, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd49+4];
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mul.f32 %f614, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd49+8];
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mul.f32 %f615, %f12, 0f3456BF95;
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abs.f32 %f616, %f1812;
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div.rn.f32 %f617, %f613, %f616;
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abs.f32 %f618, %f1813;
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div.rn.f32 %f619, %f614, %f618;
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abs.f32 %f620, %f1814;
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div.rn.f32 %f621, %f615, %f620;
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abs.f32 %f622, %f617;
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abs.f32 %f623, %f619;
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abs.f32 %f624, %f621;
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mov.f32 %f625, 0f38D1B717;
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max.f32 %f626, %f622, %f625;
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max.f32 %f627, %f623, %f625;
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max.f32 %f628, %f624, %f625;
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fma.rn.f32 %f13, %f1812, %f626, %f10;
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fma.rn.f32 %f14, %f1813, %f627, %f11;
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fma.rn.f32 %f15, %f1814, %f628, %f12;
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ld.const.u64 %rd50, [params+128];
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cvta.to.global.u64 %rd51, %rd50;
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ld.const.u32 %r106, [params+120];
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mad.lo.s32 %r107, %r106, %r92, %r91;
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mul.wide.u32 %rd52, %r107, 4;
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add.s64 %rd53, %rd51, %rd52;
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ld.global.u32 %r509, [%rd53];
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mov.u32 %r505, 0;
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abs.s32 %r108, %r3;
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setp.lt.s32 %p18, %r108, 1;
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mov.pred %p17, 0;
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mov.f32 %f1849, 0f00000000;
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mov.f32 %f1850, %f1849;
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mov.f32 %f1851, %f1849;
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mov.f32 %f1852, %f1849;
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mov.f32 %f1853, %f1849;
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mov.f32 %f1854, %f1849;
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mov.f32 %f1855, %f1849;
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mov.f32 %f1856, %f1849;
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mov.f32 %f1857, %f1849;
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mov.f32 %f1858, %f1849;
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mov.f32 %f1859, %f1849;
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mov.f32 %f1860, %f1849;
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mov.f32 %f1861, %f1849;
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mov.f32 %f1862, %f1849;
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mov.f32 %f1863, %f1849;
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mov.f32 %f1864, %f1849;
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mov.f32 %f1865, %f1849;
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mov.f32 %f1866, %f1849;
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mov.f32 %f1867, %f1849;
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mov.f32 %f1868, %f1849;
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mov.f32 %f1869, %f1849;
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mov.f32 %f1870, %f1849;
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mov.f32 %f1871, %f1849;
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mov.f32 %f1872, %f1849;
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mov.f32 %f1873, %f1849;
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mov.f32 %f1874, %f1849;
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mov.f32 %f1875, %f1849;
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mov.f32 %f1876, %f1849;
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mov.f32 %f1877, %f1849;
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mov.f32 %f1878, %f1849;
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mov.f32 %f1879, %f1849;
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mov.pred %p208, %p17;
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@%p18 bra $L__BB0_23;
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ld.const.f32 %f16, [params+620];
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ld.const.u64 %rd54, [params+624];
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cvta.to.global.u64 %rd2, %rd54;
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ld.const.u64 %rd55, [params+640];
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cvta.to.global.u64 %rd56, %rd55;
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ld.const.u32 %r110, [params+632];
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and.b32 %r111, %r92, 255;
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and.b32 %r112, %r91, 255;
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mad.lo.s32 %r113, %r110, %r111, %r112;
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mul.wide.u32 %rd57, %r113, 3;
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add.s64 %rd3, %rd56, %rd57;
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ld.const.f32 %f17, [params+660];
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mul.f32 %f18, %f13, 0f3456BF95;
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mul.f32 %f19, %f14, 0f3456BF95;
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mul.f32 %f20, %f15, 0f3456BF95;
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ld.const.u64 %rd4, [params+96];
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abs.f32 %f787, %f19;
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abs.f32 %f788, %f18;
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max.f32 %f789, %f788, %f787;
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abs.f32 %f790, %f20;
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max.f32 %f791, %f789, %f790;
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$L__BB0_7:
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shl.b32 %r114, %r505, 1;
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mul.wide.s32 %rd58, %r114, 12;
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add.s64 %rd59, %rd2, %rd58;
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ld.global.f32 %f660, [%rd59];
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sub.f32 %f661, %f660, %f10;
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ld.global.f32 %f662, [%rd59+4];
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sub.f32 %f663, %f662, %f11;
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ld.global.f32 %f664, [%rd59+8];
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sub.f32 %f665, %f664, %f12;
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mul.f32 %f666, %f663, %f663;
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fma.rn.f32 %f667, %f661, %f661, %f666;
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fma.rn.f32 %f668, %f665, %f665, %f667;
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sqrt.rn.f32 %f52, %f668;
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rcp.rn.f32 %f669, %f52;
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mul.f32 %f53, %f661, %f669;
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mul.f32 %f54, %f663, %f669;
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mul.f32 %f55, %f665, %f669;
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mul.f32 %f670, %f52, %f52;
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div.rn.f32 %f56, %f16, %f670;
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ld.global.u8 %rs15, [%rd3];
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cvt.rn.f32.u16 %f671, %rs15;
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div.rn.f32 %f672, %f671, 0fC37F0000;
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fma.rn.f32 %f673, %f672, 0f3F333333, 0f3F800000;
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setp.gt.f32 %p20, %f56, %f673;
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setp.ne.s32 %p21, %r4, 0;
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and.pred %p22, %p21, %p20;
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mov.pred %p208, -1;
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@%p22 bra $L__BB0_23;
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mul.f32 %f57, %f52, %f17;
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mov.f32 %f678, 0f40800000;
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abs.f32 %f59, %f57;
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setp.lt.f32 %p23, %f59, 0f00800000;
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mul.f32 %f680, %f59, 0f4B800000;
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selp.f32 %f681, %f680, %f59, %p23;
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selp.f32 %f682, 0fC3170000, 0fC2FE0000, %p23;
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mov.b32 %r115, %f681;
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and.b32 %r116, %r115, 8388607;
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or.b32 %r117, %r116, 1065353216;
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mov.b32 %f683, %r117;
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shr.u32 %r118, %r115, 23;
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cvt.rn.f32.u32 %f684, %r118;
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add.f32 %f685, %f682, %f684;
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setp.gt.f32 %p24, %f683, 0f3FB504F3;
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mul.f32 %f686, %f683, 0f3F000000;
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add.f32 %f687, %f685, 0f3F800000;
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selp.f32 %f688, %f687, %f685, %p24;
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selp.f32 %f689, %f686, %f683, %p24;
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add.f32 %f690, %f689, 0fBF800000;
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add.f32 %f691, %f689, 0f3F800000;
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rcp.approx.ftz.f32 %f692, %f691;
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add.f32 %f693, %f690, %f690;
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mul.f32 %f694, %f693, %f692;
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mul.f32 %f695, %f694, %f694;
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mov.f32 %f696, 0f3C4CAF63;
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mov.f32 %f697, 0f3B18F0FE;
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fma.rn.f32 %f698, %f697, %f695, %f696;
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mov.f32 %f699, 0f3DAAAABD;
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fma.rn.f32 %f700, %f698, %f695, %f699;
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mul.rn.f32 %f701, %f700, %f695;
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mul.rn.f32 %f702, %f701, %f694;
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sub.f32 %f703, %f690, %f694;
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add.f32 %f704, %f703, %f703;
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neg.f32 %f705, %f694;
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fma.rn.f32 %f706, %f705, %f690, %f704;
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mul.rn.f32 %f707, %f692, %f706;
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add.f32 %f708, %f702, %f694;
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sub.f32 %f709, %f694, %f708;
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add.f32 %f710, %f702, %f709;
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add.f32 %f711, %f707, %f710;
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add.f32 %f712, %f708, %f711;
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sub.f32 %f713, %f708, %f712;
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add.f32 %f714, %f711, %f713;
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mov.f32 %f715, 0f3F317200;
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mul.rn.f32 %f716, %f688, %f715;
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mov.f32 %f717, 0f35BFBE8E;
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mul.rn.f32 %f718, %f688, %f717;
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add.f32 %f719, %f716, %f712;
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sub.f32 %f720, %f716, %f719;
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add.f32 %f721, %f712, %f720;
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add.f32 %f722, %f714, %f721;
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add.f32 %f723, %f718, %f722;
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add.f32 %f724, %f719, %f723;
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sub.f32 %f725, %f719, %f724;
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add.f32 %f726, %f723, %f725;
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mul.rn.f32 %f727, %f678, %f724;
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neg.f32 %f728, %f727;
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fma.rn.f32 %f729, %f678, %f724, %f728;
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fma.rn.f32 %f730, %f678, %f726, %f729;
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mov.f32 %f731, 0f00000000;
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fma.rn.f32 %f732, %f731, %f724, %f730;
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add.rn.f32 %f733, %f727, %f732;
|
|
neg.f32 %f734, %f733;
|
|
add.rn.f32 %f735, %f727, %f734;
|
|
add.rn.f32 %f736, %f735, %f732;
|
|
mov.b32 %r119, %f733;
|
|
setp.eq.s32 %p25, %r119, 1118925336;
|
|
add.s32 %r120, %r119, -1;
|
|
mov.b32 %f737, %r120;
|
|
add.f32 %f738, %f736, 0f37000000;
|
|
selp.f32 %f60, %f738, %f736, %p25;
|
|
selp.f32 %f739, %f737, %f733, %p25;
|
|
mov.f32 %f740, 0f3FB8AA3B;
|
|
mul.rn.f32 %f741, %f739, %f740;
|
|
cvt.rzi.f32.f32 %f742, %f741;
|
|
abs.f32 %f743, %f742;
|
|
setp.gt.f32 %p26, %f743, 0f42FC0000;
|
|
mov.b32 %r121, %f742;
|
|
and.b32 %r122, %r121, -2147483648;
|
|
or.b32 %r123, %r122, 1123811328;
|
|
mov.b32 %f744, %r123;
|
|
selp.f32 %f745, %f744, %f742, %p26;
|
|
mov.f32 %f746, 0fBF317218;
|
|
fma.rn.f32 %f747, %f745, %f746, %f739;
|
|
mov.f32 %f748, 0f3102E308;
|
|
fma.rn.f32 %f749, %f745, %f748, %f747;
|
|
mul.f32 %f750, %f749, 0f3FB8AA3B;
|
|
add.f32 %f751, %f745, 0f4B40007F;
|
|
mov.b32 %r124, %f751;
|
|
shl.b32 %r125, %r124, 23;
|
|
mov.b32 %f752, %r125;
|
|
ex2.approx.ftz.f32 %f753, %f750;
|
|
mul.f32 %f61, %f753, %f752;
|
|
setp.eq.f32 %p27, %f61, 0f7F800000;
|
|
mov.f32 %f1846, 0f7F800000;
|
|
@%p27 bra $L__BB0_10;
|
|
|
|
fma.rn.f32 %f1846, %f61, %f60, %f61;
|
|
|
|
$L__BB0_10:
|
|
mov.f32 %f1811, 0f40000000;
|
|
cvt.rzi.f32.f32 %f1810, %f1811;
|
|
add.f32 %f1809, %f1810, %f1810;
|
|
mov.f32 %f1808, 0f40800000;
|
|
sub.f32 %f1807, %f1808, %f1809;
|
|
abs.f32 %f1806, %f1807;
|
|
setp.lt.f32 %p28, %f57, 0f00000000;
|
|
setp.eq.f32 %p29, %f1806, 0f3F800000;
|
|
and.pred %p1, %p28, %p29;
|
|
setp.eq.f32 %p30, %f57, 0f00000000;
|
|
@%p30 bra $L__BB0_14;
|
|
bra.uni $L__BB0_11;
|
|
|
|
$L__BB0_14:
|
|
add.f32 %f758, %f57, %f57;
|
|
selp.f32 %f1848, %f758, 0f00000000, %p29;
|
|
bra.uni $L__BB0_15;
|
|
|
|
$L__BB0_11:
|
|
mov.b32 %r126, %f1846;
|
|
xor.b32 %r127, %r126, -2147483648;
|
|
mov.b32 %f754, %r127;
|
|
selp.f32 %f1848, %f754, %f1846, %p1;
|
|
setp.geu.f32 %p31, %f57, 0f00000000;
|
|
@%p31 bra $L__BB0_15;
|
|
|
|
mov.f32 %f755, 0f40800000;
|
|
cvt.rzi.f32.f32 %f756, %f755;
|
|
setp.eq.f32 %p32, %f756, 0f40800000;
|
|
@%p32 bra $L__BB0_15;
|
|
|
|
mov.f32 %f1848, 0f7FFFFFFF;
|
|
|
|
$L__BB0_15:
|
|
add.f32 %f759, %f59, 0f40800000;
|
|
mov.b32 %r128, %f759;
|
|
setp.lt.s32 %p34, %r128, 2139095040;
|
|
@%p34 bra $L__BB0_20;
|
|
|
|
setp.gtu.f32 %p35, %f59, 0f7F800000;
|
|
@%p35 bra $L__BB0_19;
|
|
bra.uni $L__BB0_17;
|
|
|
|
$L__BB0_19:
|
|
add.f32 %f1848, %f57, 0f40800000;
|
|
bra.uni $L__BB0_20;
|
|
|
|
$L__BB0_17:
|
|
setp.neu.f32 %p36, %f59, 0f7F800000;
|
|
@%p36 bra $L__BB0_20;
|
|
|
|
selp.f32 %f1848, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_20:
|
|
shl.b32 %r502, %r505, 1;
|
|
mul.wide.s32 %rd173, %r502, 12;
|
|
add.s64 %rd172, %rd2, %rd173;
|
|
mov.f32 %f760, 0f3F800000;
|
|
sub.f32 %f761, %f760, %f1848;
|
|
setp.eq.f32 %p37, %f57, 0f3F800000;
|
|
selp.f32 %f762, 0f00000000, %f761, %p37;
|
|
cvt.sat.f32.f32 %f763, %f762;
|
|
mul.f32 %f764, %f56, %f763;
|
|
ld.global.f32 %f765, [%rd172+12];
|
|
mul.f32 %f766, %f53, %f765;
|
|
ld.global.f32 %f767, [%rd172+16];
|
|
mul.f32 %f768, %f54, %f767;
|
|
neg.f32 %f769, %f768;
|
|
sub.f32 %f770, %f769, %f766;
|
|
ld.global.f32 %f771, [%rd172+20];
|
|
mul.f32 %f772, %f55, %f771;
|
|
sub.f32 %f773, %f770, %f772;
|
|
cvt.sat.f32.f32 %f774, %f773;
|
|
mul.f32 %f70, %f764, %f774;
|
|
mul.f32 %f775, %f1813, %f54;
|
|
fma.rn.f32 %f776, %f1812, %f53, %f775;
|
|
fma.rn.f32 %f71, %f1814, %f55, %f776;
|
|
setp.leu.f32 %p38, %f70, 0f3727C5AC;
|
|
@%p38 bra $L__BB0_22;
|
|
|
|
cvt.sat.f32.f32 %f786, %f71;
|
|
mov.f32 %f792, 0f38D1B717;
|
|
max.f32 %f783, %f791, %f792;
|
|
sub.f32 %f784, %f52, %f783;
|
|
mov.f32 %f785, 0f00000000;
|
|
mov.u32 %r166, 2;
|
|
mov.u32 %r167, 1;
|
|
mov.u32 %r168, 3;
|
|
mov.u32 %r171, 1065353216;
|
|
mov.u32 %r200, 0;
|
|
// begin inline asm
|
|
call(%r130,%r131,%r132,%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161),_optix_trace_typed_32,(%r200,%rd4,%f13,%f14,%f15,%f53,%f54,%f55,%f783,%f784,%f785,%r167,%r200,%r167,%r166,%r167,%r168,%r171,%r171,%r171,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200,%r200);
|
|
// end inline asm
|
|
mov.b32 %f793, %r130;
|
|
mov.b32 %f794, %r131;
|
|
mov.b32 %f795, %r132;
|
|
mul.f32 %f796, %f70, 0f3EA2F983;
|
|
mul.f32 %f797, %f796, %f793;
|
|
mul.f32 %f798, %f796, %f794;
|
|
mul.f32 %f799, %f796, %f795;
|
|
fma.rn.f32 %f1876, %f786, %f797, %f1876;
|
|
fma.rn.f32 %f1877, %f786, %f798, %f1877;
|
|
fma.rn.f32 %f1878, %f786, %f799, %f1878;
|
|
add.f32 %f1873, %f1873, %f797;
|
|
add.f32 %f1874, %f1874, %f798;
|
|
add.f32 %f1875, %f1875, %f799;
|
|
fma.rn.f32 %f1870, %f54, %f797, %f1870;
|
|
fma.rn.f32 %f1871, %f54, %f798, %f1871;
|
|
fma.rn.f32 %f1872, %f54, %f799, %f1872;
|
|
fma.rn.f32 %f1867, %f55, %f797, %f1867;
|
|
fma.rn.f32 %f1868, %f55, %f798, %f1868;
|
|
fma.rn.f32 %f1869, %f55, %f799, %f1869;
|
|
fma.rn.f32 %f1864, %f53, %f797, %f1864;
|
|
fma.rn.f32 %f1865, %f53, %f798, %f1865;
|
|
fma.rn.f32 %f1866, %f53, %f799, %f1866;
|
|
mul.f32 %f800, %f53, %f54;
|
|
fma.rn.f32 %f1861, %f800, %f797, %f1861;
|
|
fma.rn.f32 %f1862, %f800, %f798, %f1862;
|
|
fma.rn.f32 %f1863, %f800, %f799, %f1863;
|
|
mul.f32 %f801, %f54, %f55;
|
|
fma.rn.f32 %f1858, %f801, %f797, %f1858;
|
|
fma.rn.f32 %f1859, %f801, %f798, %f1859;
|
|
fma.rn.f32 %f1860, %f801, %f799, %f1860;
|
|
fma.rn.f32 %f802, %f55, %f55, 0fBEAAAAAB;
|
|
fma.rn.f32 %f1855, %f802, %f797, %f1855;
|
|
fma.rn.f32 %f1856, %f802, %f798, %f1856;
|
|
fma.rn.f32 %f1857, %f802, %f799, %f1857;
|
|
mul.f32 %f803, %f53, %f55;
|
|
fma.rn.f32 %f1852, %f803, %f797, %f1852;
|
|
fma.rn.f32 %f1853, %f803, %f798, %f1853;
|
|
fma.rn.f32 %f1854, %f803, %f799, %f1854;
|
|
mul.f32 %f804, %f54, %f54;
|
|
mul.f32 %f805, %f53, %f53;
|
|
sub.f32 %f806, %f805, %f804;
|
|
fma.rn.f32 %f1849, %f806, %f797, %f1849;
|
|
fma.rn.f32 %f1850, %f806, %f798, %f1850;
|
|
fma.rn.f32 %f1851, %f806, %f799, %f1851;
|
|
add.f32 %f1879, %f1879, %f793;
|
|
|
|
$L__BB0_22:
|
|
add.s32 %r505, %r505, 1;
|
|
setp.lt.s32 %p40, %r505, %r108;
|
|
mov.pred %p208, %p17;
|
|
@%p40 bra $L__BB0_7;
|
|
|
|
$L__BB0_23:
|
|
cvt.rn.f32.s32 %f807, %r505;
|
|
mov.f32 %f808, 0f3F800000;
|
|
max.f32 %f809, %f807, %f808;
|
|
rcp.rn.f32 %f810, %f809;
|
|
mul.f32 %f2040, %f1876, %f810;
|
|
mul.f32 %f2041, %f1877, %f810;
|
|
mul.f32 %f2042, %f1878, %f810;
|
|
div.rn.f32 %f2043, %f1879, %f809;
|
|
mul.f32 %f2037, %f1873, %f810;
|
|
mul.f32 %f2038, %f1874, %f810;
|
|
mul.f32 %f2039, %f1875, %f810;
|
|
mul.f32 %f2034, %f1870, %f810;
|
|
mul.f32 %f2035, %f1871, %f810;
|
|
mul.f32 %f2036, %f1872, %f810;
|
|
mul.f32 %f2031, %f1867, %f810;
|
|
mul.f32 %f2032, %f1868, %f810;
|
|
mul.f32 %f2033, %f1869, %f810;
|
|
mul.f32 %f2028, %f1864, %f810;
|
|
mul.f32 %f2029, %f1865, %f810;
|
|
mul.f32 %f2030, %f1866, %f810;
|
|
mul.f32 %f2025, %f1861, %f810;
|
|
mul.f32 %f2026, %f1862, %f810;
|
|
mul.f32 %f2027, %f1863, %f810;
|
|
mul.f32 %f2022, %f1858, %f810;
|
|
mul.f32 %f2023, %f1859, %f810;
|
|
mul.f32 %f2024, %f1860, %f810;
|
|
mul.f32 %f2019, %f1855, %f810;
|
|
mul.f32 %f2020, %f1856, %f810;
|
|
mul.f32 %f2021, %f1857, %f810;
|
|
mul.f32 %f2016, %f1852, %f810;
|
|
mul.f32 %f2017, %f1853, %f810;
|
|
mul.f32 %f2018, %f1854, %f810;
|
|
mul.f32 %f2013, %f1849, %f810;
|
|
mul.f32 %f2014, %f1850, %f810;
|
|
mul.f32 %f2015, %f1851, %f810;
|
|
not.pred %p41, %p208;
|
|
@%p41 bra $L__BB0_56;
|
|
|
|
setp.lt.s32 %p42, %r4, 1;
|
|
mov.f32 %f1972, 0f00000000;
|
|
mov.f32 %f1971, %f1972;
|
|
mov.f32 %f1970, %f1972;
|
|
mov.f32 %f1969, %f1972;
|
|
mov.f32 %f1968, %f1972;
|
|
mov.f32 %f1967, %f1972;
|
|
mov.f32 %f1966, %f1972;
|
|
mov.f32 %f1965, %f1972;
|
|
mov.f32 %f1964, %f1972;
|
|
mov.f32 %f1963, %f1972;
|
|
mov.f32 %f1962, %f1972;
|
|
mov.f32 %f1961, %f1972;
|
|
mov.f32 %f1960, %f1972;
|
|
mov.f32 %f1959, %f1972;
|
|
mov.f32 %f1958, %f1972;
|
|
mov.f32 %f1957, %f1972;
|
|
mov.f32 %f1956, %f1972;
|
|
mov.f32 %f1955, %f1972;
|
|
mov.f32 %f1954, %f1972;
|
|
mov.f32 %f1953, %f1972;
|
|
mov.f32 %f1952, %f1972;
|
|
mov.f32 %f1951, %f1972;
|
|
mov.f32 %f1950, %f1972;
|
|
mov.f32 %f1949, %f1972;
|
|
mov.f32 %f1948, %f1972;
|
|
mov.f32 %f1947, %f1972;
|
|
mov.f32 %f1946, %f1972;
|
|
mov.f32 %f1945, %f1972;
|
|
mov.f32 %f1944, %f1972;
|
|
mov.f32 %f1943, %f1972;
|
|
mov.f32 %f1942, %f1972;
|
|
@%p42 bra $L__BB0_55;
|
|
|
|
cvt.rn.f32.s32 %f873, %r5;
|
|
rcp.rn.f32 %f196, %f873;
|
|
mul.f32 %f197, %f13, 0f3456BF95;
|
|
mul.f32 %f198, %f14, 0f3456BF95;
|
|
mul.f32 %f199, %f15, 0f3456BF95;
|
|
ld.const.u64 %rd5, [params+96];
|
|
add.u64 %rd63, %SP, 0;
|
|
add.u64 %rd6, %SPL, 0;
|
|
mov.u32 %r202, 0;
|
|
add.s64 %rd7, %rd6, 24;
|
|
mov.u64 %rd64, __cudart_i2opi_f;
|
|
abs.f32 %f933, %f198;
|
|
abs.f32 %f934, %f197;
|
|
max.f32 %f935, %f934, %f933;
|
|
abs.f32 %f936, %f199;
|
|
max.f32 %f937, %f935, %f936;
|
|
mov.u32 %r506, %r202;
|
|
|
|
$L__BB0_26:
|
|
cvt.rn.f32.s32 %f231, %r506;
|
|
mov.u32 %r508, %r202;
|
|
|
|
$L__BB0_27:
|
|
mad.lo.s32 %r204, %r509, 1664525, 1013904223;
|
|
and.b32 %r205, %r204, 16777215;
|
|
cvt.rn.f32.u32 %f874, %r205;
|
|
fma.rn.f32 %f875, %f874, 0f33800000, %f231;
|
|
mul.f32 %f876, %f196, %f875;
|
|
mad.lo.s32 %r509, %r204, 1664525, 1013904223;
|
|
and.b32 %r206, %r509, 16777215;
|
|
cvt.rn.f32.u32 %f877, %r206;
|
|
cvt.rn.f32.s32 %f878, %r508;
|
|
fma.rn.f32 %f879, %f877, 0f33800000, %f878;
|
|
mul.f32 %f880, %f196, %f879;
|
|
fma.rn.f32 %f881, %f196, %f875, %f876;
|
|
mov.f32 %f882, 0f3F800000;
|
|
sub.f32 %f263, %f882, %f881;
|
|
mul.f32 %f264, %f263, %f263;
|
|
sub.f32 %f883, %f882, %f264;
|
|
mov.f32 %f884, 0f00000000;
|
|
max.f32 %f885, %f884, %f883;
|
|
sqrt.rn.f32 %f265, %f885;
|
|
mul.f32 %f266, %f880, 0f40C90FDB;
|
|
mul.f32 %f886, %f266, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r516, %f886;
|
|
cvt.rn.f32.s32 %f887, %r516;
|
|
mov.f32 %f888, 0fBFC90FDA;
|
|
fma.rn.f32 %f889, %f887, %f888, %f266;
|
|
mov.f32 %f890, 0fB3A22168;
|
|
fma.rn.f32 %f891, %f887, %f890, %f889;
|
|
mov.f32 %f892, 0fA7C234C5;
|
|
fma.rn.f32 %f1976, %f887, %f892, %f891;
|
|
abs.f32 %f268, %f266;
|
|
setp.ltu.f32 %p43, %f268, 0f47CE4780;
|
|
mov.u32 %r513, %r516;
|
|
mov.f32 %f1973, %f1976;
|
|
@%p43 bra $L__BB0_35;
|
|
|
|
setp.eq.f32 %p44, %f268, 0f7F800000;
|
|
@%p44 bra $L__BB0_34;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_34:
|
|
mov.f32 %f895, 0f00000000;
|
|
mul.rn.f32 %f1973, %f266, %f895;
|
|
mov.u32 %r513, 0;
|
|
bra.uni $L__BB0_35;
|
|
|
|
$L__BB0_29:
|
|
mov.b32 %r18, %f266;
|
|
bfe.u32 %r208, %r18, 23, 8;
|
|
add.s32 %r19, %r208, -128;
|
|
shl.b32 %r209, %r18, 8;
|
|
or.b32 %r20, %r209, -2147483648;
|
|
shr.u32 %r21, %r19, 5;
|
|
mov.u64 %rd176, 0;
|
|
mov.u32 %r510, 0;
|
|
mov.u64 %rd174, %rd6;
|
|
mov.u64 %rd175, %rd64;
|
|
|
|
$L__BB0_30:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r210, [%rd175];
|
|
mad.wide.u32 %rd67, %r210, %r20, %rd176;
|
|
shr.u64 %rd176, %rd67, 32;
|
|
st.local.u32 [%rd174], %rd67;
|
|
add.s64 %rd175, %rd175, 4;
|
|
add.s64 %rd174, %rd174, 4;
|
|
add.s32 %r510, %r510, 1;
|
|
setp.ne.s32 %p45, %r510, 6;
|
|
@%p45 bra $L__BB0_30;
|
|
|
|
st.local.u32 [%rd7], %rd176;
|
|
mov.u32 %r211, 4;
|
|
sub.s32 %r24, %r211, %r21;
|
|
mov.u32 %r212, 6;
|
|
sub.s32 %r213, %r212, %r21;
|
|
cvta.to.local.u64 %rd69, %rd63;
|
|
mul.wide.s32 %rd70, %r213, 4;
|
|
add.s64 %rd71, %rd69, %rd70;
|
|
ld.local.u32 %r511, [%rd71];
|
|
ld.local.u32 %r512, [%rd71+-4];
|
|
and.b32 %r27, %r19, 31;
|
|
setp.eq.s32 %p46, %r27, 0;
|
|
@%p46 bra $L__BB0_33;
|
|
|
|
mov.u32 %r214, 32;
|
|
sub.s32 %r215, %r214, %r27;
|
|
shr.u32 %r216, %r512, %r215;
|
|
shl.b32 %r217, %r511, %r27;
|
|
add.s32 %r511, %r216, %r217;
|
|
mul.wide.s32 %rd74, %r24, 4;
|
|
add.s64 %rd75, %rd69, %rd74;
|
|
ld.local.u32 %r218, [%rd75];
|
|
shr.u32 %r219, %r218, %r215;
|
|
shl.b32 %r220, %r512, %r27;
|
|
add.s32 %r512, %r219, %r220;
|
|
|
|
$L__BB0_33:
|
|
and.b32 %r221, %r18, -2147483648;
|
|
shr.u32 %r222, %r512, 30;
|
|
shl.b32 %r223, %r511, 2;
|
|
or.b32 %r224, %r222, %r223;
|
|
shr.u32 %r225, %r224, 31;
|
|
shr.u32 %r226, %r511, 30;
|
|
add.s32 %r227, %r225, %r226;
|
|
neg.s32 %r228, %r227;
|
|
setp.eq.s32 %p47, %r221, 0;
|
|
selp.b32 %r513, %r227, %r228, %p47;
|
|
setp.ne.s32 %p48, %r225, 0;
|
|
xor.b32 %r229, %r221, -2147483648;
|
|
selp.b32 %r230, %r229, %r221, %p48;
|
|
selp.b32 %r231, -1, 0, %p48;
|
|
xor.b32 %r232, %r224, %r231;
|
|
shl.b32 %r233, %r512, 2;
|
|
xor.b32 %r234, %r233, %r231;
|
|
cvt.u64.u32 %rd76, %r232;
|
|
cvt.u64.u32 %rd77, %r234;
|
|
bfi.b64 %rd78, %rd76, %rd77, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd78;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f893, %fd2;
|
|
setp.eq.s32 %p49, %r230, 0;
|
|
neg.f32 %f894, %f893;
|
|
selp.f32 %f1973, %f893, %f894, %p49;
|
|
|
|
$L__BB0_35:
|
|
add.s32 %r34, %r513, 1;
|
|
and.b32 %r35, %r34, 1;
|
|
setp.eq.s32 %p50, %r35, 0;
|
|
selp.f32 %f272, %f1973, 0f3F800000, %p50;
|
|
mul.rn.f32 %f273, %f1973, %f1973;
|
|
mov.f32 %f1974, 0fB94D4153;
|
|
@%p50 bra $L__BB0_37;
|
|
|
|
mov.f32 %f897, 0fBAB607ED;
|
|
mov.f32 %f898, 0f37CBAC00;
|
|
fma.rn.f32 %f1974, %f898, %f273, %f897;
|
|
|
|
$L__BB0_37:
|
|
selp.f32 %f899, 0f3C0885E4, 0f3D2AAABB, %p50;
|
|
fma.rn.f32 %f900, %f1974, %f273, %f899;
|
|
selp.f32 %f901, 0fBE2AAAA8, 0fBEFFFFFF, %p50;
|
|
fma.rn.f32 %f902, %f900, %f273, %f901;
|
|
mov.f32 %f903, 0f00000000;
|
|
fma.rn.f32 %f904, %f273, %f272, %f903;
|
|
fma.rn.f32 %f1975, %f902, %f904, %f272;
|
|
and.b32 %r236, %r34, 2;
|
|
setp.eq.s32 %p52, %r236, 0;
|
|
@%p52 bra $L__BB0_39;
|
|
|
|
mov.f32 %f906, 0fBF800000;
|
|
fma.rn.f32 %f1975, %f1975, %f906, %f903;
|
|
|
|
$L__BB0_39:
|
|
mul.f32 %f279, %f265, %f1975;
|
|
@%p43 bra $L__BB0_47;
|
|
|
|
setp.eq.f32 %p54, %f268, 0f7F800000;
|
|
@%p54 bra $L__BB0_46;
|
|
bra.uni $L__BB0_41;
|
|
|
|
$L__BB0_46:
|
|
mov.f32 %f909, 0f00000000;
|
|
mul.rn.f32 %f1976, %f266, %f909;
|
|
mov.u32 %r516, 0;
|
|
bra.uni $L__BB0_47;
|
|
|
|
$L__BB0_41:
|
|
mov.b32 %r36, %f266;
|
|
bfe.u32 %r237, %r36, 23, 8;
|
|
add.s32 %r37, %r237, -128;
|
|
shl.b32 %r238, %r36, 8;
|
|
or.b32 %r38, %r238, -2147483648;
|
|
shr.u32 %r39, %r37, 5;
|
|
mov.u64 %rd177, 0;
|
|
mov.u64 %rd178, %rd177;
|
|
|
|
$L__BB0_42:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd81, %rd177, 2;
|
|
mov.u64 %rd82, __cudart_i2opi_f;
|
|
add.s64 %rd83, %rd82, %rd81;
|
|
ld.global.nc.u32 %r239, [%rd83];
|
|
mad.wide.u32 %rd84, %r239, %r38, %rd178;
|
|
shr.u64 %rd178, %rd84, 32;
|
|
add.s64 %rd85, %rd6, %rd81;
|
|
st.local.u32 [%rd85], %rd84;
|
|
cvt.u32.u64 %r240, %rd177;
|
|
add.s32 %r241, %r240, 1;
|
|
cvt.s64.s32 %rd177, %r241;
|
|
setp.ne.s32 %p55, %r241, 6;
|
|
@%p55 bra $L__BB0_42;
|
|
|
|
st.local.u32 [%rd7], %rd178;
|
|
mov.u32 %r242, 4;
|
|
sub.s32 %r40, %r242, %r39;
|
|
mov.u32 %r243, 6;
|
|
sub.s32 %r244, %r243, %r39;
|
|
cvta.to.local.u64 %rd87, %rd63;
|
|
mul.wide.s32 %rd88, %r244, 4;
|
|
add.s64 %rd89, %rd87, %rd88;
|
|
ld.local.u32 %r514, [%rd89];
|
|
ld.local.u32 %r515, [%rd89+-4];
|
|
and.b32 %r43, %r37, 31;
|
|
setp.eq.s32 %p56, %r43, 0;
|
|
@%p56 bra $L__BB0_45;
|
|
|
|
mov.u32 %r245, 32;
|
|
sub.s32 %r246, %r245, %r43;
|
|
shr.u32 %r247, %r515, %r246;
|
|
shl.b32 %r248, %r514, %r43;
|
|
add.s32 %r514, %r247, %r248;
|
|
mul.wide.s32 %rd92, %r40, 4;
|
|
add.s64 %rd93, %rd87, %rd92;
|
|
ld.local.u32 %r249, [%rd93];
|
|
shr.u32 %r250, %r249, %r246;
|
|
shl.b32 %r251, %r515, %r43;
|
|
add.s32 %r515, %r250, %r251;
|
|
|
|
$L__BB0_45:
|
|
and.b32 %r252, %r36, -2147483648;
|
|
shr.u32 %r253, %r515, 30;
|
|
shl.b32 %r254, %r514, 2;
|
|
or.b32 %r255, %r253, %r254;
|
|
shr.u32 %r256, %r255, 31;
|
|
shr.u32 %r257, %r514, 30;
|
|
add.s32 %r258, %r256, %r257;
|
|
neg.s32 %r259, %r258;
|
|
setp.eq.s32 %p57, %r252, 0;
|
|
selp.b32 %r516, %r258, %r259, %p57;
|
|
setp.ne.s32 %p58, %r256, 0;
|
|
xor.b32 %r260, %r252, -2147483648;
|
|
selp.b32 %r261, %r260, %r252, %p58;
|
|
selp.b32 %r262, -1, 0, %p58;
|
|
xor.b32 %r263, %r255, %r262;
|
|
shl.b32 %r264, %r515, 2;
|
|
xor.b32 %r265, %r264, %r262;
|
|
cvt.u64.u32 %rd94, %r263;
|
|
cvt.u64.u32 %rd95, %r265;
|
|
bfi.b64 %rd96, %rd94, %rd95, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd96;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f907, %fd4;
|
|
setp.eq.s32 %p59, %r261, 0;
|
|
neg.f32 %f908, %f907;
|
|
selp.f32 %f1976, %f907, %f908, %p59;
|
|
|
|
$L__BB0_47:
|
|
and.b32 %r50, %r516, 1;
|
|
setp.eq.s32 %p60, %r50, 0;
|
|
selp.f32 %f283, %f1976, 0f3F800000, %p60;
|
|
mul.rn.f32 %f284, %f1976, %f1976;
|
|
mov.f32 %f1977, 0fB94D4153;
|
|
@%p60 bra $L__BB0_49;
|
|
|
|
mov.f32 %f911, 0fBAB607ED;
|
|
mov.f32 %f912, 0f37CBAC00;
|
|
fma.rn.f32 %f1977, %f912, %f284, %f911;
|
|
|
|
$L__BB0_49:
|
|
selp.f32 %f913, 0f3C0885E4, 0f3D2AAABB, %p60;
|
|
fma.rn.f32 %f914, %f1977, %f284, %f913;
|
|
selp.f32 %f915, 0fBE2AAAA8, 0fBEFFFFFF, %p60;
|
|
fma.rn.f32 %f916, %f914, %f284, %f915;
|
|
mov.f32 %f1979, 0f00000000;
|
|
fma.rn.f32 %f918, %f284, %f283, %f1979;
|
|
fma.rn.f32 %f1978, %f916, %f918, %f283;
|
|
and.b32 %r267, %r516, 2;
|
|
setp.eq.s32 %p62, %r267, 0;
|
|
@%p62 bra $L__BB0_51;
|
|
|
|
mov.f32 %f919, 0f00000000;
|
|
mov.f32 %f920, 0fBF800000;
|
|
fma.rn.f32 %f1978, %f1978, %f920, %f919;
|
|
|
|
$L__BB0_51:
|
|
mov.f32 %f938, 0f38D1B717;
|
|
max.f32 %f927, %f937, %f938;
|
|
mul.f32 %f925, %f265, %f1978;
|
|
mov.f32 %f928, 0f6C4ECB8F;
|
|
mov.u32 %r301, 1;
|
|
mov.u32 %r304, 2;
|
|
mov.u32 %r306, 4;
|
|
mov.u32 %r309, 1065353216;
|
|
mov.u32 %r310, 2139095039;
|
|
mov.u32 %r338, 0;
|
|
// begin inline asm
|
|
call(%r268,%r269,%r270,%r271,%r272,%r273,%r274,%r275,%r276,%r277,%r278,%r279,%r280,%r281,%r282,%r283,%r284,%r285,%r286,%r287,%r288,%r289,%r290,%r291,%r292,%r293,%r294,%r295,%r296,%r297,%r298,%r299),_optix_trace_typed_32,(%r338,%rd5,%f13,%f14,%f15,%f279,%f925,%f263,%f927,%f928,%f1979,%r301,%r338,%r338,%r304,%r338,%r306,%r309,%r309,%r309,%r310,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338,%r338);
|
|
// end inline asm
|
|
mov.b32 %f291, %r271;
|
|
setp.ge.f32 %p63, %f291, 0f00000000;
|
|
mov.f32 %f1980, %f1979;
|
|
mov.f32 %f1981, %f1979;
|
|
@%p63 bra $L__BB0_53;
|
|
|
|
mov.b32 %f1981, %r268;
|
|
mov.b32 %f1980, %r269;
|
|
mov.b32 %f1979, %r270;
|
|
|
|
$L__BB0_53:
|
|
setp.ltu.f32 %p64, %f291, 0f00000000;
|
|
selp.f32 %f939, 0f3F800000, 0f00000000, %p64;
|
|
add.f32 %f1942, %f1942, %f939;
|
|
add.f32 %f1948, %f1948, %f1981;
|
|
add.f32 %f1947, %f1947, %f1980;
|
|
add.f32 %f1946, %f1946, %f1979;
|
|
fma.rn.f32 %f1951, %f925, %f1981, %f1951;
|
|
fma.rn.f32 %f1950, %f925, %f1980, %f1950;
|
|
fma.rn.f32 %f1949, %f925, %f1979, %f1949;
|
|
fma.rn.f32 %f1954, %f263, %f1981, %f1954;
|
|
fma.rn.f32 %f1953, %f263, %f1980, %f1953;
|
|
fma.rn.f32 %f1952, %f263, %f1979, %f1952;
|
|
fma.rn.f32 %f1957, %f279, %f1981, %f1957;
|
|
fma.rn.f32 %f1956, %f279, %f1980, %f1956;
|
|
fma.rn.f32 %f1955, %f279, %f1979, %f1955;
|
|
mul.f32 %f940, %f279, %f925;
|
|
fma.rn.f32 %f1960, %f940, %f1981, %f1960;
|
|
fma.rn.f32 %f1959, %f940, %f1980, %f1959;
|
|
fma.rn.f32 %f1958, %f940, %f1979, %f1958;
|
|
mul.f32 %f941, %f263, %f925;
|
|
fma.rn.f32 %f1963, %f941, %f1981, %f1963;
|
|
fma.rn.f32 %f1962, %f941, %f1980, %f1962;
|
|
fma.rn.f32 %f1961, %f941, %f1979, %f1961;
|
|
add.f32 %f942, %f264, 0fBEAAAAAB;
|
|
fma.rn.f32 %f1966, %f942, %f1981, %f1966;
|
|
fma.rn.f32 %f1965, %f942, %f1980, %f1965;
|
|
fma.rn.f32 %f1964, %f942, %f1979, %f1964;
|
|
mul.f32 %f943, %f263, %f279;
|
|
fma.rn.f32 %f1969, %f943, %f1981, %f1969;
|
|
fma.rn.f32 %f1968, %f943, %f1980, %f1968;
|
|
fma.rn.f32 %f1967, %f943, %f1979, %f1967;
|
|
mul.f32 %f944, %f925, %f925;
|
|
mul.f32 %f945, %f279, %f279;
|
|
sub.f32 %f946, %f945, %f944;
|
|
fma.rn.f32 %f1972, %f946, %f1981, %f1972;
|
|
fma.rn.f32 %f1971, %f946, %f1980, %f1971;
|
|
fma.rn.f32 %f1970, %f946, %f1979, %f1970;
|
|
mul.f32 %f947, %f1813, %f925;
|
|
fma.rn.f32 %f948, %f1812, %f279, %f947;
|
|
fma.rn.f32 %f949, %f1814, %f263, %f948;
|
|
cvt.sat.f32.f32 %f950, %f949;
|
|
fma.rn.f32 %f1945, %f1981, %f950, %f1945;
|
|
fma.rn.f32 %f1944, %f1980, %f950, %f1944;
|
|
fma.rn.f32 %f1943, %f1979, %f950, %f1943;
|
|
add.s32 %r508, %r508, 1;
|
|
setp.lt.s32 %p65, %r508, %r5;
|
|
@%p65 bra $L__BB0_27;
|
|
|
|
add.s32 %r506, %r506, 1;
|
|
setp.lt.s32 %p66, %r506, %r5;
|
|
@%p66 bra $L__BB0_26;
|
|
|
|
$L__BB0_55:
|
|
mul.lo.s32 %r339, %r5, %r5;
|
|
cvt.rn.f32.s32 %f951, %r339;
|
|
rcp.rn.f32 %f952, %f951;
|
|
mul.f32 %f953, %f952, %f1945;
|
|
mul.f32 %f954, %f952, %f1944;
|
|
mul.f32 %f955, %f952, %f1943;
|
|
div.rn.f32 %f2043, %f1942, %f951;
|
|
mul.f32 %f2037, %f952, %f1948;
|
|
mul.f32 %f2038, %f952, %f1947;
|
|
mul.f32 %f2039, %f952, %f1946;
|
|
mul.f32 %f2034, %f952, %f1951;
|
|
mul.f32 %f2035, %f952, %f1950;
|
|
mul.f32 %f2036, %f952, %f1949;
|
|
mul.f32 %f2031, %f952, %f1954;
|
|
mul.f32 %f2032, %f952, %f1953;
|
|
mul.f32 %f2033, %f952, %f1952;
|
|
mul.f32 %f2028, %f952, %f1957;
|
|
mul.f32 %f2029, %f952, %f1956;
|
|
mul.f32 %f2030, %f952, %f1955;
|
|
mul.f32 %f2025, %f952, %f1960;
|
|
mul.f32 %f2026, %f952, %f1959;
|
|
mul.f32 %f2027, %f952, %f1958;
|
|
mul.f32 %f2022, %f952, %f1963;
|
|
mul.f32 %f2023, %f952, %f1962;
|
|
mul.f32 %f2024, %f952, %f1961;
|
|
mul.f32 %f2019, %f952, %f1966;
|
|
mul.f32 %f2020, %f952, %f1965;
|
|
mul.f32 %f2021, %f952, %f1964;
|
|
mul.f32 %f2016, %f952, %f1969;
|
|
mul.f32 %f2017, %f952, %f1968;
|
|
mul.f32 %f2018, %f952, %f1967;
|
|
mul.f32 %f2013, %f952, %f1972;
|
|
mul.f32 %f2014, %f952, %f1971;
|
|
mul.f32 %f2015, %f952, %f1970;
|
|
fma.rn.f32 %f2040, %f952, %f1945, %f953;
|
|
fma.rn.f32 %f2041, %f952, %f1944, %f954;
|
|
fma.rn.f32 %f2042, %f952, %f1943, %f955;
|
|
|
|
$L__BB0_56:
|
|
ld.const.u32 %r503, [params+616];
|
|
setp.lt.s32 %p67, %r503, 0;
|
|
selp.f32 %f422, %f2040, %f2043, %p67;
|
|
ld.const.u32 %r85, [params+104];
|
|
and.b32 %r340, %r85, 8;
|
|
setp.eq.s32 %p68, %r340, 0;
|
|
@%p68 bra $L__BB0_70;
|
|
|
|
ld.const.u64 %rd98, [params+192];
|
|
cvta.to.global.u64 %rd19, %rd98;
|
|
ld.const.u32 %r341, [params+184];
|
|
mad.lo.s32 %r342, %r341, %r7, %r6;
|
|
cvt.u64.u32 %rd20, %r342;
|
|
mov.f32 %f957, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f958, %f957;
|
|
add.f32 %f959, %f958, %f958;
|
|
mov.f32 %f960, 0f3EE8BA2E;
|
|
sub.f32 %f961, %f960, %f959;
|
|
abs.f32 %f423, %f961;
|
|
abs.f32 %f424, %f422;
|
|
setp.lt.f32 %p69, %f424, 0f00800000;
|
|
mul.f32 %f962, %f424, 0f4B800000;
|
|
selp.f32 %f963, %f962, %f424, %p69;
|
|
selp.f32 %f964, 0fC3170000, 0fC2FE0000, %p69;
|
|
mov.b32 %r343, %f963;
|
|
and.b32 %r344, %r343, 8388607;
|
|
or.b32 %r345, %r344, 1065353216;
|
|
mov.b32 %f965, %r345;
|
|
shr.u32 %r346, %r343, 23;
|
|
cvt.rn.f32.u32 %f966, %r346;
|
|
add.f32 %f967, %f964, %f966;
|
|
setp.gt.f32 %p70, %f965, 0f3FB504F3;
|
|
mul.f32 %f968, %f965, 0f3F000000;
|
|
add.f32 %f969, %f967, 0f3F800000;
|
|
selp.f32 %f970, %f969, %f967, %p70;
|
|
selp.f32 %f971, %f968, %f965, %p70;
|
|
add.f32 %f972, %f971, 0fBF800000;
|
|
add.f32 %f973, %f971, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f974, %f973;
|
|
add.f32 %f975, %f972, %f972;
|
|
mul.f32 %f976, %f975, %f974;
|
|
mul.f32 %f977, %f976, %f976;
|
|
mov.f32 %f978, 0f3C4CAF63;
|
|
mov.f32 %f979, 0f3B18F0FE;
|
|
fma.rn.f32 %f980, %f979, %f977, %f978;
|
|
mov.f32 %f981, 0f3DAAAABD;
|
|
fma.rn.f32 %f982, %f980, %f977, %f981;
|
|
mul.rn.f32 %f983, %f982, %f977;
|
|
mul.rn.f32 %f984, %f983, %f976;
|
|
sub.f32 %f985, %f972, %f976;
|
|
add.f32 %f986, %f985, %f985;
|
|
neg.f32 %f987, %f976;
|
|
fma.rn.f32 %f988, %f987, %f972, %f986;
|
|
mul.rn.f32 %f989, %f974, %f988;
|
|
add.f32 %f990, %f984, %f976;
|
|
sub.f32 %f991, %f976, %f990;
|
|
add.f32 %f992, %f984, %f991;
|
|
add.f32 %f993, %f989, %f992;
|
|
add.f32 %f994, %f990, %f993;
|
|
sub.f32 %f995, %f990, %f994;
|
|
add.f32 %f996, %f993, %f995;
|
|
mov.f32 %f997, 0f3F317200;
|
|
mul.rn.f32 %f998, %f970, %f997;
|
|
mov.f32 %f999, 0f35BFBE8E;
|
|
mul.rn.f32 %f1000, %f970, %f999;
|
|
add.f32 %f1001, %f998, %f994;
|
|
sub.f32 %f1002, %f998, %f1001;
|
|
add.f32 %f1003, %f994, %f1002;
|
|
add.f32 %f1004, %f996, %f1003;
|
|
add.f32 %f1005, %f1000, %f1004;
|
|
add.f32 %f1006, %f1001, %f1005;
|
|
sub.f32 %f1007, %f1001, %f1006;
|
|
add.f32 %f1008, %f1005, %f1007;
|
|
mul.rn.f32 %f1009, %f960, %f1006;
|
|
neg.f32 %f1010, %f1009;
|
|
fma.rn.f32 %f1011, %f960, %f1006, %f1010;
|
|
fma.rn.f32 %f1012, %f960, %f1008, %f1011;
|
|
mov.f32 %f1013, 0f00000000;
|
|
fma.rn.f32 %f1014, %f1013, %f1006, %f1012;
|
|
add.rn.f32 %f1015, %f1009, %f1014;
|
|
neg.f32 %f1016, %f1015;
|
|
add.rn.f32 %f1017, %f1009, %f1016;
|
|
add.rn.f32 %f1018, %f1017, %f1014;
|
|
mov.b32 %r347, %f1015;
|
|
setp.eq.s32 %p71, %r347, 1118925336;
|
|
add.s32 %r348, %r347, -1;
|
|
mov.b32 %f1019, %r348;
|
|
add.f32 %f1020, %f1018, 0f37000000;
|
|
selp.f32 %f425, %f1020, %f1018, %p71;
|
|
selp.f32 %f1021, %f1019, %f1015, %p71;
|
|
mov.f32 %f1022, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1023, %f1021, %f1022;
|
|
cvt.rzi.f32.f32 %f1024, %f1023;
|
|
abs.f32 %f1025, %f1024;
|
|
setp.gt.f32 %p72, %f1025, 0f42FC0000;
|
|
mov.b32 %r349, %f1024;
|
|
and.b32 %r350, %r349, -2147483648;
|
|
or.b32 %r351, %r350, 1123811328;
|
|
mov.b32 %f1026, %r351;
|
|
selp.f32 %f1027, %f1026, %f1024, %p72;
|
|
mov.f32 %f1028, 0fBF317218;
|
|
fma.rn.f32 %f1029, %f1027, %f1028, %f1021;
|
|
mov.f32 %f1030, 0f3102E308;
|
|
fma.rn.f32 %f1031, %f1027, %f1030, %f1029;
|
|
mul.f32 %f1032, %f1031, 0f3FB8AA3B;
|
|
add.f32 %f1033, %f1027, 0f4B40007F;
|
|
mov.b32 %r352, %f1033;
|
|
shl.b32 %r353, %r352, 23;
|
|
mov.b32 %f1034, %r353;
|
|
ex2.approx.ftz.f32 %f1035, %f1032;
|
|
mul.f32 %f426, %f1035, %f1034;
|
|
setp.eq.f32 %p73, %f426, 0f7F800000;
|
|
mov.f32 %f2044, 0f7F800000;
|
|
@%p73 bra $L__BB0_59;
|
|
|
|
fma.rn.f32 %f2044, %f426, %f425, %f426;
|
|
|
|
$L__BB0_59:
|
|
setp.lt.f32 %p74, %f422, 0f00000000;
|
|
setp.eq.f32 %p75, %f423, 0f3F800000;
|
|
and.pred %p3, %p74, %p75;
|
|
setp.eq.f32 %p76, %f422, 0f00000000;
|
|
@%p76 bra $L__BB0_63;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_63:
|
|
add.f32 %f1040, %f422, %f422;
|
|
selp.f32 %f2046, %f1040, 0f00000000, %p75;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_182:
|
|
mov.f32 %f1724, 0f00000000;
|
|
mov.u32 %r518, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs188, %f1724;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs187, %f1724;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs186, %f1724;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs189, 0;
|
|
st.global.v4.u16 [%rd33], {%rs186, %rs187, %rs188, %rs189};
|
|
|
|
$L__BB0_183:
|
|
ld.const.u64 %rd145, [params+256];
|
|
cvta.to.global.u64 %rd146, %rd145;
|
|
ld.const.u32 %r484, [params+248];
|
|
mad.lo.s32 %r485, %r484, %r7, %r6;
|
|
mul.wide.u32 %rd147, %r485, 8;
|
|
add.s64 %rd34, %rd146, %rd147;
|
|
setp.eq.s32 %p199, %r518, 0;
|
|
@%p199 bra $L__BB0_185;
|
|
|
|
ld.global.v4.u16 {%rs196, %rs197, %rs198, %rs199}, [%rd34];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1725, %rs196;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1726, %rs197;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1727, %rs198;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1728, %f1725, 0f00000000;
|
|
add.f32 %f1729, %f1726, 0f00000000;
|
|
add.f32 %f1730, %f1727, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs195, %f1730;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs194, %f1729;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs193, %f1728;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs200, 0;
|
|
st.global.v4.u16 [%rd34], {%rs193, %rs194, %rs195, %rs200};
|
|
bra.uni $L__BB0_186;
|
|
|
|
$L__BB0_185:
|
|
mov.f32 %f1733, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs203, %f1733;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs202, %f1733;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs201, %f1733;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs204, 0;
|
|
st.global.v4.u16 [%rd34], {%rs201, %rs202, %rs203, %rs204};
|
|
|
|
$L__BB0_186:
|
|
ld.const.u64 %rd148, [params+272];
|
|
cvta.to.global.u64 %rd149, %rd148;
|
|
ld.const.u32 %r486, [params+264];
|
|
mad.lo.s32 %r487, %r486, %r7, %r6;
|
|
mul.wide.u32 %rd150, %r487, 8;
|
|
add.s64 %rd35, %rd149, %rd150;
|
|
@%p199 bra $L__BB0_188;
|
|
|
|
ld.global.v4.u16 {%rs211, %rs212, %rs213, %rs214}, [%rd35];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1734, %rs211;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1735, %rs212;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1736, %rs213;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1737, %f1734, 0f00000000;
|
|
add.f32 %f1738, %f1735, 0f00000000;
|
|
add.f32 %f1739, %f1736, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs210, %f1739;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs209, %f1738;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs208, %f1737;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs215, 0;
|
|
st.global.v4.u16 [%rd35], {%rs208, %rs209, %rs210, %rs215};
|
|
bra.uni $L__BB0_189;
|
|
|
|
$L__BB0_188:
|
|
mov.f32 %f1742, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs218, %f1742;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs217, %f1742;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs216, %f1742;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs219, 0;
|
|
st.global.v4.u16 [%rd35], {%rs216, %rs217, %rs218, %rs219};
|
|
|
|
$L__BB0_189:
|
|
ld.const.u64 %rd151, [params+288];
|
|
cvta.to.global.u64 %rd152, %rd151;
|
|
ld.const.u32 %r488, [params+280];
|
|
mad.lo.s32 %r489, %r488, %r7, %r6;
|
|
mul.wide.u32 %rd153, %r489, 8;
|
|
add.s64 %rd36, %rd152, %rd153;
|
|
@%p199 bra $L__BB0_191;
|
|
|
|
ld.global.v4.u16 {%rs226, %rs227, %rs228, %rs229}, [%rd36];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1743, %rs226;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1744, %rs227;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1745, %rs228;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1746, %f1743, 0f00000000;
|
|
add.f32 %f1747, %f1744, 0f00000000;
|
|
add.f32 %f1748, %f1745, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs225, %f1748;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs224, %f1747;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs223, %f1746;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs230, 0;
|
|
st.global.v4.u16 [%rd36], {%rs223, %rs224, %rs225, %rs230};
|
|
bra.uni $L__BB0_192;
|
|
|
|
$L__BB0_191:
|
|
mov.f32 %f1751, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs233, %f1751;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs232, %f1751;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs231, %f1751;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs234, 0;
|
|
st.global.v4.u16 [%rd36], {%rs231, %rs232, %rs233, %rs234};
|
|
|
|
$L__BB0_192:
|
|
ld.const.u64 %rd154, [params+304];
|
|
cvta.to.global.u64 %rd155, %rd154;
|
|
ld.const.u32 %r490, [params+296];
|
|
mad.lo.s32 %r491, %r490, %r7, %r6;
|
|
mul.wide.u32 %rd156, %r491, 8;
|
|
add.s64 %rd37, %rd155, %rd156;
|
|
@%p199 bra $L__BB0_194;
|
|
|
|
ld.global.v4.u16 {%rs241, %rs242, %rs243, %rs244}, [%rd37];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1752, %rs241;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1753, %rs242;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1754, %rs243;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1755, %f1752, 0f00000000;
|
|
add.f32 %f1756, %f1753, 0f00000000;
|
|
add.f32 %f1757, %f1754, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs240, %f1757;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs239, %f1756;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs238, %f1755;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs245, 0;
|
|
st.global.v4.u16 [%rd37], {%rs238, %rs239, %rs240, %rs245};
|
|
bra.uni $L__BB0_195;
|
|
|
|
$L__BB0_194:
|
|
mov.f32 %f1760, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs248, %f1760;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs247, %f1760;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs246, %f1760;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs249, 0;
|
|
st.global.v4.u16 [%rd37], {%rs246, %rs247, %rs248, %rs249};
|
|
|
|
$L__BB0_195:
|
|
ld.const.u64 %rd157, [params+320];
|
|
cvta.to.global.u64 %rd158, %rd157;
|
|
ld.const.u32 %r492, [params+312];
|
|
mad.lo.s32 %r493, %r492, %r7, %r6;
|
|
mul.wide.u32 %rd159, %r493, 8;
|
|
add.s64 %rd38, %rd158, %rd159;
|
|
@%p199 bra $L__BB0_197;
|
|
|
|
ld.global.v4.u16 {%rs256, %rs257, %rs258, %rs259}, [%rd38];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1761, %rs256;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1762, %rs257;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1763, %rs258;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1764, %f1761, 0f00000000;
|
|
add.f32 %f1765, %f1762, 0f00000000;
|
|
add.f32 %f1766, %f1763, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs255, %f1766;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs254, %f1765;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs253, %f1764;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs260, 0;
|
|
st.global.v4.u16 [%rd38], {%rs253, %rs254, %rs255, %rs260};
|
|
bra.uni $L__BB0_198;
|
|
|
|
$L__BB0_197:
|
|
mov.f32 %f1769, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs263, %f1769;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs262, %f1769;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs261, %f1769;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs264, 0;
|
|
st.global.v4.u16 [%rd38], {%rs261, %rs262, %rs263, %rs264};
|
|
|
|
$L__BB0_198:
|
|
ld.const.u64 %rd160, [params+336];
|
|
cvta.to.global.u64 %rd161, %rd160;
|
|
ld.const.u32 %r494, [params+328];
|
|
mad.lo.s32 %r495, %r494, %r7, %r6;
|
|
mul.wide.u32 %rd162, %r495, 8;
|
|
add.s64 %rd39, %rd161, %rd162;
|
|
@%p199 bra $L__BB0_200;
|
|
|
|
ld.global.v4.u16 {%rs271, %rs272, %rs273, %rs274}, [%rd39];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1770, %rs271;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1771, %rs272;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1772, %rs273;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1773, %f1770, 0f00000000;
|
|
add.f32 %f1774, %f1771, 0f00000000;
|
|
add.f32 %f1775, %f1772, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs270, %f1775;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs269, %f1774;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs268, %f1773;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs275, 0;
|
|
st.global.v4.u16 [%rd39], {%rs268, %rs269, %rs270, %rs275};
|
|
bra.uni $L__BB0_201;
|
|
|
|
$L__BB0_200:
|
|
mov.f32 %f1778, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs278, %f1778;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs277, %f1778;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs276, %f1778;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs279, 0;
|
|
st.global.v4.u16 [%rd39], {%rs276, %rs277, %rs278, %rs279};
|
|
|
|
$L__BB0_201:
|
|
ld.const.u64 %rd163, [params+352];
|
|
cvta.to.global.u64 %rd164, %rd163;
|
|
ld.const.u32 %r496, [params+344];
|
|
mad.lo.s32 %r497, %r496, %r7, %r6;
|
|
mul.wide.u32 %rd165, %r497, 8;
|
|
add.s64 %rd40, %rd164, %rd165;
|
|
@%p199 bra $L__BB0_203;
|
|
|
|
ld.global.v4.u16 {%rs286, %rs287, %rs288, %rs289}, [%rd40];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1779, %rs286;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1780, %rs287;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1781, %rs288;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1782, %f1779, 0f00000000;
|
|
add.f32 %f1783, %f1780, 0f00000000;
|
|
add.f32 %f1784, %f1781, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs285, %f1784;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs284, %f1783;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs283, %f1782;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs290, 0;
|
|
st.global.v4.u16 [%rd40], {%rs283, %rs284, %rs285, %rs290};
|
|
bra.uni $L__BB0_204;
|
|
|
|
$L__BB0_203:
|
|
mov.f32 %f1787, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs293, %f1787;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs292, %f1787;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs291, %f1787;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs294, 0;
|
|
st.global.v4.u16 [%rd40], {%rs291, %rs292, %rs293, %rs294};
|
|
|
|
$L__BB0_204:
|
|
ld.const.u64 %rd166, [params+368];
|
|
cvta.to.global.u64 %rd167, %rd166;
|
|
ld.const.u32 %r498, [params+360];
|
|
mad.lo.s32 %r499, %r498, %r7, %r6;
|
|
mul.wide.u32 %rd168, %r499, 8;
|
|
add.s64 %rd41, %rd167, %rd168;
|
|
@%p199 bra $L__BB0_206;
|
|
|
|
ld.global.v4.u16 {%rs301, %rs302, %rs303, %rs304}, [%rd41];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1788, %rs301;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1789, %rs302;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1790, %rs303;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1791, %f1788, 0f00000000;
|
|
add.f32 %f1792, %f1789, 0f00000000;
|
|
add.f32 %f1793, %f1790, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs300, %f1793;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs299, %f1792;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs298, %f1791;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs305, 0;
|
|
st.global.v4.u16 [%rd41], {%rs298, %rs299, %rs300, %rs305};
|
|
bra.uni $L__BB0_207;
|
|
|
|
$L__BB0_206:
|
|
mov.f32 %f1796, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs308, %f1796;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs307, %f1796;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs306, %f1796;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs309, 0;
|
|
st.global.v4.u16 [%rd41], {%rs306, %rs307, %rs308, %rs309};
|
|
|
|
$L__BB0_207:
|
|
ld.const.u64 %rd169, [params+384];
|
|
cvta.to.global.u64 %rd170, %rd169;
|
|
ld.const.u32 %r500, [params+376];
|
|
mad.lo.s32 %r501, %r500, %r7, %r6;
|
|
mul.wide.u32 %rd171, %r501, 8;
|
|
add.s64 %rd42, %rd170, %rd171;
|
|
@%p199 bra $L__BB0_209;
|
|
|
|
ld.global.v4.u16 {%rs316, %rs317, %rs318, %rs319}, [%rd42];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1797, %rs316;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1798, %rs317;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1799, %rs318;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1800, %f1797, 0f00000000;
|
|
add.f32 %f1801, %f1798, 0f00000000;
|
|
add.f32 %f1802, %f1799, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs315, %f1802;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs314, %f1801;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs313, %f1800;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs320, 0;
|
|
st.global.v4.u16 [%rd42], {%rs313, %rs314, %rs315, %rs320};
|
|
bra.uni $L__BB0_210;
|
|
|
|
$L__BB0_209:
|
|
mov.f32 %f1805, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs323, %f1805;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs322, %f1805;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs321, %f1805;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs324, 0;
|
|
st.global.v4.u16 [%rd42], {%rs321, %rs322, %rs323, %rs324};
|
|
bra.uni $L__BB0_210;
|
|
|
|
$L__BB0_60:
|
|
mov.b32 %r354, %f2044;
|
|
xor.b32 %r355, %r354, -2147483648;
|
|
mov.b32 %f1036, %r355;
|
|
selp.f32 %f2046, %f1036, %f2044, %p3;
|
|
setp.geu.f32 %p77, %f422, 0f00000000;
|
|
@%p77 bra $L__BB0_64;
|
|
|
|
mov.f32 %f1037, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f1038, %f1037;
|
|
setp.eq.f32 %p78, %f1038, 0f3EE8BA2E;
|
|
@%p78 bra $L__BB0_64;
|
|
|
|
mov.f32 %f2046, 0f7FFFFFFF;
|
|
|
|
$L__BB0_64:
|
|
add.f32 %f1041, %f424, 0f3EE8BA2E;
|
|
mov.b32 %r356, %f1041;
|
|
setp.lt.s32 %p80, %r356, 2139095040;
|
|
@%p80 bra $L__BB0_69;
|
|
|
|
setp.gtu.f32 %p81, %f424, 0f7F800000;
|
|
@%p81 bra $L__BB0_68;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_68:
|
|
add.f32 %f2046, %f422, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_69;
|
|
|
|
$L__BB0_66:
|
|
setp.neu.f32 %p82, %f424, 0f7F800000;
|
|
@%p82 bra $L__BB0_69;
|
|
|
|
selp.f32 %f2046, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_69:
|
|
mul.f32 %f1042, %f2046, 0f437F0000;
|
|
setp.eq.f32 %p83, %f422, 0f3F800000;
|
|
selp.f32 %f1043, 0f437F0000, %f1042, %p83;
|
|
cvt.rzi.u32.f32 %r357, %f1043;
|
|
shl.b64 %rd99, %rd20, 1;
|
|
add.s64 %rd100, %rd19, %rd99;
|
|
cvt.u16.u32 %rs16, %r357;
|
|
mov.u16 %rs17, 255;
|
|
st.global.v2.u8 [%rd100], {%rs16, %rs17};
|
|
|
|
$L__BB0_70:
|
|
ld.const.v2.f32 {%f1044, %f1045}, [params+648];
|
|
mul.f32 %f437, %f2040, %f1044;
|
|
mul.f32 %f438, %f2041, %f1045;
|
|
ld.const.f32 %f439, [params+656];
|
|
mul.f32 %f440, %f2042, %f439;
|
|
and.b32 %r358, %r85, 1;
|
|
setp.eq.b32 %p84, %r358, 1;
|
|
mov.pred %p85, 0;
|
|
xor.pred %p86, %p84, %p85;
|
|
not.pred %p87, %p86;
|
|
@%p87 bra $L__BB0_144;
|
|
|
|
mov.f32 %f1047, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1048, %f1047;
|
|
add.f32 %f1049, %f1048, %f1048;
|
|
mov.f32 %f1050, 0f3EE66666;
|
|
sub.f32 %f1051, %f1050, %f1049;
|
|
abs.f32 %f441, %f1051;
|
|
abs.f32 %f442, %f437;
|
|
setp.lt.f32 %p88, %f442, 0f00800000;
|
|
mul.f32 %f1052, %f442, 0f4B800000;
|
|
selp.f32 %f1053, %f1052, %f442, %p88;
|
|
selp.f32 %f1054, 0fC3170000, 0fC2FE0000, %p88;
|
|
mov.b32 %r359, %f1053;
|
|
and.b32 %r360, %r359, 8388607;
|
|
or.b32 %r361, %r360, 1065353216;
|
|
mov.b32 %f1055, %r361;
|
|
shr.u32 %r362, %r359, 23;
|
|
cvt.rn.f32.u32 %f1056, %r362;
|
|
add.f32 %f1057, %f1054, %f1056;
|
|
setp.gt.f32 %p89, %f1055, 0f3FB504F3;
|
|
mul.f32 %f1058, %f1055, 0f3F000000;
|
|
add.f32 %f1059, %f1057, 0f3F800000;
|
|
selp.f32 %f1060, %f1059, %f1057, %p89;
|
|
selp.f32 %f1061, %f1058, %f1055, %p89;
|
|
add.f32 %f1062, %f1061, 0fBF800000;
|
|
add.f32 %f1063, %f1061, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1064, %f1063;
|
|
add.f32 %f1065, %f1062, %f1062;
|
|
mul.f32 %f1066, %f1065, %f1064;
|
|
mul.f32 %f1067, %f1066, %f1066;
|
|
mov.f32 %f1068, 0f3C4CAF63;
|
|
mov.f32 %f1069, 0f3B18F0FE;
|
|
fma.rn.f32 %f1070, %f1069, %f1067, %f1068;
|
|
mov.f32 %f1071, 0f3DAAAABD;
|
|
fma.rn.f32 %f1072, %f1070, %f1067, %f1071;
|
|
mul.rn.f32 %f1073, %f1072, %f1067;
|
|
mul.rn.f32 %f1074, %f1073, %f1066;
|
|
sub.f32 %f1075, %f1062, %f1066;
|
|
add.f32 %f1076, %f1075, %f1075;
|
|
neg.f32 %f1077, %f1066;
|
|
fma.rn.f32 %f1078, %f1077, %f1062, %f1076;
|
|
mul.rn.f32 %f1079, %f1064, %f1078;
|
|
add.f32 %f1080, %f1074, %f1066;
|
|
sub.f32 %f1081, %f1066, %f1080;
|
|
add.f32 %f1082, %f1074, %f1081;
|
|
add.f32 %f1083, %f1079, %f1082;
|
|
add.f32 %f1084, %f1080, %f1083;
|
|
sub.f32 %f1085, %f1080, %f1084;
|
|
add.f32 %f1086, %f1083, %f1085;
|
|
mov.f32 %f1087, 0f3F317200;
|
|
mul.rn.f32 %f1088, %f1060, %f1087;
|
|
mov.f32 %f1089, 0f35BFBE8E;
|
|
mul.rn.f32 %f1090, %f1060, %f1089;
|
|
add.f32 %f1091, %f1088, %f1084;
|
|
sub.f32 %f1092, %f1088, %f1091;
|
|
add.f32 %f1093, %f1084, %f1092;
|
|
add.f32 %f1094, %f1086, %f1093;
|
|
add.f32 %f1095, %f1090, %f1094;
|
|
add.f32 %f1096, %f1091, %f1095;
|
|
sub.f32 %f1097, %f1091, %f1096;
|
|
add.f32 %f1098, %f1095, %f1097;
|
|
mul.rn.f32 %f1099, %f1050, %f1096;
|
|
neg.f32 %f1100, %f1099;
|
|
fma.rn.f32 %f1101, %f1050, %f1096, %f1100;
|
|
fma.rn.f32 %f1102, %f1050, %f1098, %f1101;
|
|
mov.f32 %f1103, 0f00000000;
|
|
fma.rn.f32 %f1104, %f1103, %f1096, %f1102;
|
|
add.rn.f32 %f1105, %f1099, %f1104;
|
|
neg.f32 %f1106, %f1105;
|
|
add.rn.f32 %f1107, %f1099, %f1106;
|
|
add.rn.f32 %f1108, %f1107, %f1104;
|
|
mov.b32 %r363, %f1105;
|
|
setp.eq.s32 %p90, %r363, 1118925336;
|
|
add.s32 %r364, %r363, -1;
|
|
mov.b32 %f1109, %r364;
|
|
add.f32 %f1110, %f1108, 0f37000000;
|
|
selp.f32 %f443, %f1110, %f1108, %p90;
|
|
selp.f32 %f1111, %f1109, %f1105, %p90;
|
|
mov.f32 %f1112, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1113, %f1111, %f1112;
|
|
cvt.rzi.f32.f32 %f1114, %f1113;
|
|
abs.f32 %f1115, %f1114;
|
|
setp.gt.f32 %p91, %f1115, 0f42FC0000;
|
|
mov.b32 %r365, %f1114;
|
|
and.b32 %r366, %r365, -2147483648;
|
|
or.b32 %r367, %r366, 1123811328;
|
|
mov.b32 %f1116, %r367;
|
|
selp.f32 %f1117, %f1116, %f1114, %p91;
|
|
mov.f32 %f1118, 0fBF317218;
|
|
fma.rn.f32 %f1119, %f1117, %f1118, %f1111;
|
|
mov.f32 %f1120, 0f3102E308;
|
|
fma.rn.f32 %f1121, %f1117, %f1120, %f1119;
|
|
mul.f32 %f1122, %f1121, 0f3FB8AA3B;
|
|
add.f32 %f1123, %f1117, 0f4B40007F;
|
|
mov.b32 %r368, %f1123;
|
|
shl.b32 %r369, %r368, 23;
|
|
mov.b32 %f1124, %r369;
|
|
ex2.approx.ftz.f32 %f1125, %f1122;
|
|
mul.f32 %f444, %f1125, %f1124;
|
|
setp.eq.f32 %p92, %f444, 0f7F800000;
|
|
mov.f32 %f2047, 0f7F800000;
|
|
@%p92 bra $L__BB0_73;
|
|
|
|
fma.rn.f32 %f2047, %f444, %f443, %f444;
|
|
|
|
$L__BB0_73:
|
|
setp.lt.f32 %p93, %f437, 0f00000000;
|
|
setp.eq.f32 %p94, %f441, 0f3F800000;
|
|
and.pred %p4, %p93, %p94;
|
|
setp.eq.f32 %p95, %f437, 0f00000000;
|
|
@%p95 bra $L__BB0_77;
|
|
bra.uni $L__BB0_74;
|
|
|
|
$L__BB0_77:
|
|
add.f32 %f1130, %f437, %f437;
|
|
selp.f32 %f2049, %f1130, 0f00000000, %p94;
|
|
bra.uni $L__BB0_78;
|
|
|
|
$L__BB0_74:
|
|
mov.b32 %r370, %f2047;
|
|
xor.b32 %r371, %r370, -2147483648;
|
|
mov.b32 %f1126, %r371;
|
|
selp.f32 %f2049, %f1126, %f2047, %p4;
|
|
setp.geu.f32 %p96, %f437, 0f00000000;
|
|
@%p96 bra $L__BB0_78;
|
|
|
|
mov.f32 %f1127, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1128, %f1127;
|
|
setp.eq.f32 %p97, %f1128, 0f3EE66666;
|
|
@%p97 bra $L__BB0_78;
|
|
|
|
mov.f32 %f2049, 0f7FFFFFFF;
|
|
|
|
$L__BB0_78:
|
|
add.f32 %f1131, %f442, 0f3EE66666;
|
|
mov.b32 %r372, %f1131;
|
|
setp.lt.s32 %p99, %r372, 2139095040;
|
|
@%p99 bra $L__BB0_83;
|
|
|
|
setp.gtu.f32 %p100, %f442, 0f7F800000;
|
|
@%p100 bra $L__BB0_82;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_82:
|
|
add.f32 %f2049, %f437, 0f3EE66666;
|
|
bra.uni $L__BB0_83;
|
|
|
|
$L__BB0_80:
|
|
setp.neu.f32 %p101, %f442, 0f7F800000;
|
|
@%p101 bra $L__BB0_83;
|
|
|
|
selp.f32 %f2049, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_83:
|
|
setp.eq.f32 %p102, %f437, 0f3F800000;
|
|
selp.f32 %f453, 0f3F800000, %f2049, %p102;
|
|
abs.f32 %f454, %f438;
|
|
setp.lt.f32 %p103, %f454, 0f00800000;
|
|
mul.f32 %f1133, %f454, 0f4B800000;
|
|
selp.f32 %f1134, %f1133, %f454, %p103;
|
|
selp.f32 %f1135, 0fC3170000, 0fC2FE0000, %p103;
|
|
mov.b32 %r373, %f1134;
|
|
and.b32 %r374, %r373, 8388607;
|
|
or.b32 %r375, %r374, 1065353216;
|
|
mov.b32 %f1136, %r375;
|
|
shr.u32 %r376, %r373, 23;
|
|
cvt.rn.f32.u32 %f1137, %r376;
|
|
add.f32 %f1138, %f1135, %f1137;
|
|
setp.gt.f32 %p104, %f1136, 0f3FB504F3;
|
|
mul.f32 %f1139, %f1136, 0f3F000000;
|
|
add.f32 %f1140, %f1138, 0f3F800000;
|
|
selp.f32 %f1141, %f1140, %f1138, %p104;
|
|
selp.f32 %f1142, %f1139, %f1136, %p104;
|
|
add.f32 %f1143, %f1142, 0fBF800000;
|
|
add.f32 %f1144, %f1142, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1145, %f1144;
|
|
add.f32 %f1146, %f1143, %f1143;
|
|
mul.f32 %f1147, %f1146, %f1145;
|
|
mul.f32 %f1148, %f1147, %f1147;
|
|
mov.f32 %f1149, 0f3C4CAF63;
|
|
mov.f32 %f1150, 0f3B18F0FE;
|
|
fma.rn.f32 %f1151, %f1150, %f1148, %f1149;
|
|
mov.f32 %f1152, 0f3DAAAABD;
|
|
fma.rn.f32 %f1153, %f1151, %f1148, %f1152;
|
|
mul.rn.f32 %f1154, %f1153, %f1148;
|
|
mul.rn.f32 %f1155, %f1154, %f1147;
|
|
sub.f32 %f1156, %f1143, %f1147;
|
|
add.f32 %f1157, %f1156, %f1156;
|
|
neg.f32 %f1158, %f1147;
|
|
fma.rn.f32 %f1159, %f1158, %f1143, %f1157;
|
|
mul.rn.f32 %f1160, %f1145, %f1159;
|
|
add.f32 %f1161, %f1155, %f1147;
|
|
sub.f32 %f1162, %f1147, %f1161;
|
|
add.f32 %f1163, %f1155, %f1162;
|
|
add.f32 %f1164, %f1160, %f1163;
|
|
add.f32 %f1165, %f1161, %f1164;
|
|
sub.f32 %f1166, %f1161, %f1165;
|
|
add.f32 %f1167, %f1164, %f1166;
|
|
mov.f32 %f1168, 0f3F317200;
|
|
mul.rn.f32 %f1169, %f1141, %f1168;
|
|
mov.f32 %f1170, 0f35BFBE8E;
|
|
mul.rn.f32 %f1171, %f1141, %f1170;
|
|
add.f32 %f1172, %f1169, %f1165;
|
|
sub.f32 %f1173, %f1169, %f1172;
|
|
add.f32 %f1174, %f1165, %f1173;
|
|
add.f32 %f1175, %f1167, %f1174;
|
|
add.f32 %f1176, %f1171, %f1175;
|
|
add.f32 %f1177, %f1172, %f1176;
|
|
sub.f32 %f1178, %f1172, %f1177;
|
|
add.f32 %f1179, %f1176, %f1178;
|
|
mov.f32 %f1180, 0f3EE66666;
|
|
mul.rn.f32 %f1181, %f1180, %f1177;
|
|
neg.f32 %f1182, %f1181;
|
|
fma.rn.f32 %f1183, %f1180, %f1177, %f1182;
|
|
fma.rn.f32 %f1184, %f1180, %f1179, %f1183;
|
|
mov.f32 %f1185, 0f00000000;
|
|
fma.rn.f32 %f1186, %f1185, %f1177, %f1184;
|
|
add.rn.f32 %f1187, %f1181, %f1186;
|
|
neg.f32 %f1188, %f1187;
|
|
add.rn.f32 %f1189, %f1181, %f1188;
|
|
add.rn.f32 %f1190, %f1189, %f1186;
|
|
mov.b32 %r377, %f1187;
|
|
setp.eq.s32 %p105, %r377, 1118925336;
|
|
add.s32 %r378, %r377, -1;
|
|
mov.b32 %f1191, %r378;
|
|
add.f32 %f1192, %f1190, 0f37000000;
|
|
selp.f32 %f455, %f1192, %f1190, %p105;
|
|
selp.f32 %f1193, %f1191, %f1187, %p105;
|
|
mov.f32 %f1194, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1195, %f1193, %f1194;
|
|
cvt.rzi.f32.f32 %f1196, %f1195;
|
|
abs.f32 %f1197, %f1196;
|
|
setp.gt.f32 %p106, %f1197, 0f42FC0000;
|
|
mov.b32 %r379, %f1196;
|
|
and.b32 %r380, %r379, -2147483648;
|
|
or.b32 %r381, %r380, 1123811328;
|
|
mov.b32 %f1198, %r381;
|
|
selp.f32 %f1199, %f1198, %f1196, %p106;
|
|
mov.f32 %f1200, 0fBF317218;
|
|
fma.rn.f32 %f1201, %f1199, %f1200, %f1193;
|
|
mov.f32 %f1202, 0f3102E308;
|
|
fma.rn.f32 %f1203, %f1199, %f1202, %f1201;
|
|
mul.f32 %f1204, %f1203, 0f3FB8AA3B;
|
|
add.f32 %f1205, %f1199, 0f4B40007F;
|
|
mov.b32 %r382, %f1205;
|
|
shl.b32 %r383, %r382, 23;
|
|
mov.b32 %f1206, %r383;
|
|
ex2.approx.ftz.f32 %f1207, %f1204;
|
|
mul.f32 %f456, %f1207, %f1206;
|
|
setp.eq.f32 %p107, %f456, 0f7F800000;
|
|
mov.f32 %f2050, 0f7F800000;
|
|
@%p107 bra $L__BB0_85;
|
|
|
|
fma.rn.f32 %f2050, %f456, %f455, %f456;
|
|
|
|
$L__BB0_85:
|
|
setp.lt.f32 %p108, %f438, 0f00000000;
|
|
and.pred %p5, %p108, %p94;
|
|
setp.eq.f32 %p110, %f438, 0f00000000;
|
|
@%p110 bra $L__BB0_89;
|
|
bra.uni $L__BB0_86;
|
|
|
|
$L__BB0_89:
|
|
add.f32 %f1212, %f438, %f438;
|
|
selp.f32 %f2052, %f1212, 0f00000000, %p94;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_86:
|
|
mov.b32 %r384, %f2050;
|
|
xor.b32 %r385, %r384, -2147483648;
|
|
mov.b32 %f1208, %r385;
|
|
selp.f32 %f2052, %f1208, %f2050, %p5;
|
|
setp.geu.f32 %p111, %f438, 0f00000000;
|
|
@%p111 bra $L__BB0_90;
|
|
|
|
mov.f32 %f1209, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1210, %f1209;
|
|
setp.eq.f32 %p112, %f1210, 0f3EE66666;
|
|
@%p112 bra $L__BB0_90;
|
|
|
|
mov.f32 %f2052, 0f7FFFFFFF;
|
|
|
|
$L__BB0_90:
|
|
add.f32 %f1213, %f454, 0f3EE66666;
|
|
mov.b32 %r386, %f1213;
|
|
setp.lt.s32 %p114, %r386, 2139095040;
|
|
@%p114 bra $L__BB0_95;
|
|
|
|
setp.gtu.f32 %p115, %f454, 0f7F800000;
|
|
@%p115 bra $L__BB0_94;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_94:
|
|
add.f32 %f2052, %f438, 0f3EE66666;
|
|
bra.uni $L__BB0_95;
|
|
|
|
$L__BB0_92:
|
|
setp.neu.f32 %p116, %f454, 0f7F800000;
|
|
@%p116 bra $L__BB0_95;
|
|
|
|
selp.f32 %f2052, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_95:
|
|
setp.eq.f32 %p117, %f438, 0f3F800000;
|
|
selp.f32 %f465, 0f3F800000, %f2052, %p117;
|
|
abs.f32 %f466, %f440;
|
|
setp.lt.f32 %p118, %f466, 0f00800000;
|
|
mul.f32 %f1215, %f466, 0f4B800000;
|
|
selp.f32 %f1216, %f1215, %f466, %p118;
|
|
selp.f32 %f1217, 0fC3170000, 0fC2FE0000, %p118;
|
|
mov.b32 %r387, %f1216;
|
|
and.b32 %r388, %r387, 8388607;
|
|
or.b32 %r389, %r388, 1065353216;
|
|
mov.b32 %f1218, %r389;
|
|
shr.u32 %r390, %r387, 23;
|
|
cvt.rn.f32.u32 %f1219, %r390;
|
|
add.f32 %f1220, %f1217, %f1219;
|
|
setp.gt.f32 %p119, %f1218, 0f3FB504F3;
|
|
mul.f32 %f1221, %f1218, 0f3F000000;
|
|
add.f32 %f1222, %f1220, 0f3F800000;
|
|
selp.f32 %f1223, %f1222, %f1220, %p119;
|
|
selp.f32 %f1224, %f1221, %f1218, %p119;
|
|
add.f32 %f1225, %f1224, 0fBF800000;
|
|
add.f32 %f1226, %f1224, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1227, %f1226;
|
|
add.f32 %f1228, %f1225, %f1225;
|
|
mul.f32 %f1229, %f1228, %f1227;
|
|
mul.f32 %f1230, %f1229, %f1229;
|
|
mov.f32 %f1231, 0f3C4CAF63;
|
|
mov.f32 %f1232, 0f3B18F0FE;
|
|
fma.rn.f32 %f1233, %f1232, %f1230, %f1231;
|
|
mov.f32 %f1234, 0f3DAAAABD;
|
|
fma.rn.f32 %f1235, %f1233, %f1230, %f1234;
|
|
mul.rn.f32 %f1236, %f1235, %f1230;
|
|
mul.rn.f32 %f1237, %f1236, %f1229;
|
|
sub.f32 %f1238, %f1225, %f1229;
|
|
add.f32 %f1239, %f1238, %f1238;
|
|
neg.f32 %f1240, %f1229;
|
|
fma.rn.f32 %f1241, %f1240, %f1225, %f1239;
|
|
mul.rn.f32 %f1242, %f1227, %f1241;
|
|
add.f32 %f1243, %f1237, %f1229;
|
|
sub.f32 %f1244, %f1229, %f1243;
|
|
add.f32 %f1245, %f1237, %f1244;
|
|
add.f32 %f1246, %f1242, %f1245;
|
|
add.f32 %f1247, %f1243, %f1246;
|
|
sub.f32 %f1248, %f1243, %f1247;
|
|
add.f32 %f1249, %f1246, %f1248;
|
|
mov.f32 %f1250, 0f3F317200;
|
|
mul.rn.f32 %f1251, %f1223, %f1250;
|
|
mov.f32 %f1252, 0f35BFBE8E;
|
|
mul.rn.f32 %f1253, %f1223, %f1252;
|
|
add.f32 %f1254, %f1251, %f1247;
|
|
sub.f32 %f1255, %f1251, %f1254;
|
|
add.f32 %f1256, %f1247, %f1255;
|
|
add.f32 %f1257, %f1249, %f1256;
|
|
add.f32 %f1258, %f1253, %f1257;
|
|
add.f32 %f1259, %f1254, %f1258;
|
|
sub.f32 %f1260, %f1254, %f1259;
|
|
add.f32 %f1261, %f1258, %f1260;
|
|
mov.f32 %f1262, 0f3EE66666;
|
|
mul.rn.f32 %f1263, %f1262, %f1259;
|
|
neg.f32 %f1264, %f1263;
|
|
fma.rn.f32 %f1265, %f1262, %f1259, %f1264;
|
|
fma.rn.f32 %f1266, %f1262, %f1261, %f1265;
|
|
mov.f32 %f1267, 0f00000000;
|
|
fma.rn.f32 %f1268, %f1267, %f1259, %f1266;
|
|
add.rn.f32 %f1269, %f1263, %f1268;
|
|
neg.f32 %f1270, %f1269;
|
|
add.rn.f32 %f1271, %f1263, %f1270;
|
|
add.rn.f32 %f1272, %f1271, %f1268;
|
|
mov.b32 %r391, %f1269;
|
|
setp.eq.s32 %p120, %r391, 1118925336;
|
|
add.s32 %r392, %r391, -1;
|
|
mov.b32 %f1273, %r392;
|
|
add.f32 %f1274, %f1272, 0f37000000;
|
|
selp.f32 %f467, %f1274, %f1272, %p120;
|
|
selp.f32 %f1275, %f1273, %f1269, %p120;
|
|
mov.f32 %f1276, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1277, %f1275, %f1276;
|
|
cvt.rzi.f32.f32 %f1278, %f1277;
|
|
abs.f32 %f1279, %f1278;
|
|
setp.gt.f32 %p121, %f1279, 0f42FC0000;
|
|
mov.b32 %r393, %f1278;
|
|
and.b32 %r394, %r393, -2147483648;
|
|
or.b32 %r395, %r394, 1123811328;
|
|
mov.b32 %f1280, %r395;
|
|
selp.f32 %f1281, %f1280, %f1278, %p121;
|
|
mov.f32 %f1282, 0fBF317218;
|
|
fma.rn.f32 %f1283, %f1281, %f1282, %f1275;
|
|
mov.f32 %f1284, 0f3102E308;
|
|
fma.rn.f32 %f1285, %f1281, %f1284, %f1283;
|
|
mul.f32 %f1286, %f1285, 0f3FB8AA3B;
|
|
add.f32 %f1287, %f1281, 0f4B40007F;
|
|
mov.b32 %r396, %f1287;
|
|
shl.b32 %r397, %r396, 23;
|
|
mov.b32 %f1288, %r397;
|
|
ex2.approx.ftz.f32 %f1289, %f1286;
|
|
mul.f32 %f468, %f1289, %f1288;
|
|
setp.eq.f32 %p122, %f468, 0f7F800000;
|
|
mov.f32 %f2053, 0f7F800000;
|
|
@%p122 bra $L__BB0_97;
|
|
|
|
fma.rn.f32 %f2053, %f468, %f467, %f468;
|
|
|
|
$L__BB0_97:
|
|
setp.lt.f32 %p123, %f440, 0f00000000;
|
|
and.pred %p6, %p123, %p94;
|
|
setp.eq.f32 %p125, %f440, 0f00000000;
|
|
@%p125 bra $L__BB0_101;
|
|
bra.uni $L__BB0_98;
|
|
|
|
$L__BB0_101:
|
|
add.f32 %f1294, %f440, %f440;
|
|
selp.f32 %f2055, %f1294, 0f00000000, %p94;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_98:
|
|
mov.b32 %r398, %f2053;
|
|
xor.b32 %r399, %r398, -2147483648;
|
|
mov.b32 %f1290, %r399;
|
|
selp.f32 %f2055, %f1290, %f2053, %p6;
|
|
setp.geu.f32 %p126, %f440, 0f00000000;
|
|
@%p126 bra $L__BB0_102;
|
|
|
|
mov.f32 %f1291, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1292, %f1291;
|
|
setp.eq.f32 %p127, %f1292, 0f3EE66666;
|
|
@%p127 bra $L__BB0_102;
|
|
|
|
mov.f32 %f2055, 0f7FFFFFFF;
|
|
|
|
$L__BB0_102:
|
|
add.f32 %f1295, %f466, 0f3EE66666;
|
|
mov.b32 %r400, %f1295;
|
|
setp.lt.s32 %p129, %r400, 2139095040;
|
|
@%p129 bra $L__BB0_107;
|
|
|
|
setp.gtu.f32 %p130, %f466, 0f7F800000;
|
|
@%p130 bra $L__BB0_106;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_106:
|
|
add.f32 %f2055, %f440, 0f3EE66666;
|
|
bra.uni $L__BB0_107;
|
|
|
|
$L__BB0_104:
|
|
setp.neu.f32 %p131, %f466, 0f7F800000;
|
|
@%p131 bra $L__BB0_107;
|
|
|
|
selp.f32 %f2055, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_107:
|
|
setp.eq.f32 %p132, %f440, 0f3F800000;
|
|
mov.f32 %f1297, 0f3F800000;
|
|
selp.f32 %f1298, 0f3F800000, %f2055, %p132;
|
|
ld.const.u64 %rd101, [params+144];
|
|
cvta.to.global.u64 %rd21, %rd101;
|
|
ld.const.u32 %r401, [params+136];
|
|
mad.lo.s32 %r402, %r401, %r7, %r6;
|
|
cvt.u64.u32 %rd22, %r402;
|
|
min.f32 %f1299, %f453, %f1297;
|
|
mov.f32 %f1300, 0f00000000;
|
|
max.f32 %f477, %f1300, %f1299;
|
|
min.f32 %f1301, %f465, %f1297;
|
|
max.f32 %f478, %f1300, %f1301;
|
|
min.f32 %f1302, %f1298, %f1297;
|
|
max.f32 %f479, %f1300, %f1302;
|
|
mov.f32 %f1303, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1304, %f1303;
|
|
add.f32 %f1305, %f1304, %f1304;
|
|
mov.f32 %f1306, 0f3ED55555;
|
|
sub.f32 %f1307, %f1306, %f1305;
|
|
abs.f32 %f480, %f1307;
|
|
abs.f32 %f481, %f477;
|
|
setp.lt.f32 %p133, %f481, 0f00800000;
|
|
mul.f32 %f1308, %f481, 0f4B800000;
|
|
selp.f32 %f1309, %f1308, %f481, %p133;
|
|
selp.f32 %f1310, 0fC3170000, 0fC2FE0000, %p133;
|
|
mov.b32 %r403, %f1309;
|
|
and.b32 %r404, %r403, 8388607;
|
|
or.b32 %r405, %r404, 1065353216;
|
|
mov.b32 %f1311, %r405;
|
|
shr.u32 %r406, %r403, 23;
|
|
cvt.rn.f32.u32 %f1312, %r406;
|
|
add.f32 %f1313, %f1310, %f1312;
|
|
setp.gt.f32 %p134, %f1311, 0f3FB504F3;
|
|
mul.f32 %f1314, %f1311, 0f3F000000;
|
|
add.f32 %f1315, %f1313, 0f3F800000;
|
|
selp.f32 %f1316, %f1315, %f1313, %p134;
|
|
selp.f32 %f1317, %f1314, %f1311, %p134;
|
|
add.f32 %f1318, %f1317, 0fBF800000;
|
|
add.f32 %f1319, %f1317, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1320, %f1319;
|
|
add.f32 %f1321, %f1318, %f1318;
|
|
mul.f32 %f1322, %f1321, %f1320;
|
|
mul.f32 %f1323, %f1322, %f1322;
|
|
mov.f32 %f1324, 0f3C4CAF63;
|
|
mov.f32 %f1325, 0f3B18F0FE;
|
|
fma.rn.f32 %f1326, %f1325, %f1323, %f1324;
|
|
mov.f32 %f1327, 0f3DAAAABD;
|
|
fma.rn.f32 %f1328, %f1326, %f1323, %f1327;
|
|
mul.rn.f32 %f1329, %f1328, %f1323;
|
|
mul.rn.f32 %f1330, %f1329, %f1322;
|
|
sub.f32 %f1331, %f1318, %f1322;
|
|
add.f32 %f1332, %f1331, %f1331;
|
|
neg.f32 %f1333, %f1322;
|
|
fma.rn.f32 %f1334, %f1333, %f1318, %f1332;
|
|
mul.rn.f32 %f1335, %f1320, %f1334;
|
|
add.f32 %f1336, %f1330, %f1322;
|
|
sub.f32 %f1337, %f1322, %f1336;
|
|
add.f32 %f1338, %f1330, %f1337;
|
|
add.f32 %f1339, %f1335, %f1338;
|
|
add.f32 %f1340, %f1336, %f1339;
|
|
sub.f32 %f1341, %f1336, %f1340;
|
|
add.f32 %f1342, %f1339, %f1341;
|
|
mov.f32 %f1343, 0f3F317200;
|
|
mul.rn.f32 %f1344, %f1316, %f1343;
|
|
mov.f32 %f1345, 0f35BFBE8E;
|
|
mul.rn.f32 %f1346, %f1316, %f1345;
|
|
add.f32 %f1347, %f1344, %f1340;
|
|
sub.f32 %f1348, %f1344, %f1347;
|
|
add.f32 %f1349, %f1340, %f1348;
|
|
add.f32 %f1350, %f1342, %f1349;
|
|
add.f32 %f1351, %f1346, %f1350;
|
|
add.f32 %f1352, %f1347, %f1351;
|
|
sub.f32 %f1353, %f1347, %f1352;
|
|
add.f32 %f1354, %f1351, %f1353;
|
|
mul.rn.f32 %f1355, %f1306, %f1352;
|
|
neg.f32 %f1356, %f1355;
|
|
fma.rn.f32 %f1357, %f1306, %f1352, %f1356;
|
|
fma.rn.f32 %f1358, %f1306, %f1354, %f1357;
|
|
fma.rn.f32 %f1359, %f1300, %f1352, %f1358;
|
|
add.rn.f32 %f1360, %f1355, %f1359;
|
|
neg.f32 %f1361, %f1360;
|
|
add.rn.f32 %f1362, %f1355, %f1361;
|
|
add.rn.f32 %f1363, %f1362, %f1359;
|
|
mov.b32 %r407, %f1360;
|
|
setp.eq.s32 %p135, %r407, 1118925336;
|
|
add.s32 %r408, %r407, -1;
|
|
mov.b32 %f1364, %r408;
|
|
add.f32 %f1365, %f1363, 0f37000000;
|
|
selp.f32 %f482, %f1365, %f1363, %p135;
|
|
selp.f32 %f1366, %f1364, %f1360, %p135;
|
|
mov.f32 %f1367, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1368, %f1366, %f1367;
|
|
cvt.rzi.f32.f32 %f1369, %f1368;
|
|
abs.f32 %f1370, %f1369;
|
|
setp.gt.f32 %p136, %f1370, 0f42FC0000;
|
|
mov.b32 %r409, %f1369;
|
|
and.b32 %r410, %r409, -2147483648;
|
|
or.b32 %r411, %r410, 1123811328;
|
|
mov.b32 %f1371, %r411;
|
|
selp.f32 %f1372, %f1371, %f1369, %p136;
|
|
mov.f32 %f1373, 0fBF317218;
|
|
fma.rn.f32 %f1374, %f1372, %f1373, %f1366;
|
|
mov.f32 %f1375, 0f3102E308;
|
|
fma.rn.f32 %f1376, %f1372, %f1375, %f1374;
|
|
mul.f32 %f1377, %f1376, 0f3FB8AA3B;
|
|
add.f32 %f1378, %f1372, 0f4B40007F;
|
|
mov.b32 %r412, %f1378;
|
|
shl.b32 %r413, %r412, 23;
|
|
mov.b32 %f1379, %r413;
|
|
ex2.approx.ftz.f32 %f1380, %f1377;
|
|
mul.f32 %f483, %f1380, %f1379;
|
|
setp.eq.f32 %p137, %f483, 0f7F800000;
|
|
mov.f32 %f2056, 0f7F800000;
|
|
@%p137 bra $L__BB0_109;
|
|
|
|
fma.rn.f32 %f2056, %f483, %f482, %f483;
|
|
|
|
$L__BB0_109:
|
|
setp.lt.f32 %p138, %f477, 0f00000000;
|
|
setp.eq.f32 %p139, %f480, 0f3F800000;
|
|
and.pred %p7, %p138, %p139;
|
|
setp.eq.f32 %p140, %f477, 0f00000000;
|
|
@%p140 bra $L__BB0_113;
|
|
bra.uni $L__BB0_110;
|
|
|
|
$L__BB0_113:
|
|
add.f32 %f1385, %f477, %f477;
|
|
selp.f32 %f2058, %f1385, 0f00000000, %p139;
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_110:
|
|
mov.b32 %r414, %f2056;
|
|
xor.b32 %r415, %r414, -2147483648;
|
|
mov.b32 %f1381, %r415;
|
|
selp.f32 %f2058, %f1381, %f2056, %p7;
|
|
setp.geu.f32 %p141, %f477, 0f00000000;
|
|
@%p141 bra $L__BB0_114;
|
|
|
|
mov.f32 %f1382, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1383, %f1382;
|
|
setp.eq.f32 %p142, %f1383, 0f3ED55555;
|
|
@%p142 bra $L__BB0_114;
|
|
|
|
mov.f32 %f2058, 0f7FFFFFFF;
|
|
|
|
$L__BB0_114:
|
|
add.f32 %f1386, %f481, 0f3ED55555;
|
|
mov.b32 %r416, %f1386;
|
|
setp.lt.s32 %p144, %r416, 2139095040;
|
|
@%p144 bra $L__BB0_119;
|
|
|
|
setp.gtu.f32 %p145, %f481, 0f7F800000;
|
|
@%p145 bra $L__BB0_118;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_118:
|
|
add.f32 %f2058, %f477, 0f3ED55555;
|
|
bra.uni $L__BB0_119;
|
|
|
|
$L__BB0_116:
|
|
setp.neu.f32 %p146, %f481, 0f7F800000;
|
|
@%p146 bra $L__BB0_119;
|
|
|
|
selp.f32 %f2058, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_119:
|
|
abs.f32 %f492, %f478;
|
|
setp.lt.f32 %p147, %f492, 0f00800000;
|
|
mul.f32 %f1388, %f492, 0f4B800000;
|
|
selp.f32 %f1389, %f1388, %f492, %p147;
|
|
selp.f32 %f1390, 0fC3170000, 0fC2FE0000, %p147;
|
|
mov.b32 %r417, %f1389;
|
|
and.b32 %r418, %r417, 8388607;
|
|
or.b32 %r419, %r418, 1065353216;
|
|
mov.b32 %f1391, %r419;
|
|
shr.u32 %r420, %r417, 23;
|
|
cvt.rn.f32.u32 %f1392, %r420;
|
|
add.f32 %f1393, %f1390, %f1392;
|
|
setp.gt.f32 %p148, %f1391, 0f3FB504F3;
|
|
mul.f32 %f1394, %f1391, 0f3F000000;
|
|
add.f32 %f1395, %f1393, 0f3F800000;
|
|
selp.f32 %f1396, %f1395, %f1393, %p148;
|
|
selp.f32 %f1397, %f1394, %f1391, %p148;
|
|
add.f32 %f1398, %f1397, 0fBF800000;
|
|
add.f32 %f1399, %f1397, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1400, %f1399;
|
|
add.f32 %f1401, %f1398, %f1398;
|
|
mul.f32 %f1402, %f1401, %f1400;
|
|
mul.f32 %f1403, %f1402, %f1402;
|
|
mov.f32 %f1404, 0f3C4CAF63;
|
|
mov.f32 %f1405, 0f3B18F0FE;
|
|
fma.rn.f32 %f1406, %f1405, %f1403, %f1404;
|
|
mov.f32 %f1407, 0f3DAAAABD;
|
|
fma.rn.f32 %f1408, %f1406, %f1403, %f1407;
|
|
mul.rn.f32 %f1409, %f1408, %f1403;
|
|
mul.rn.f32 %f1410, %f1409, %f1402;
|
|
sub.f32 %f1411, %f1398, %f1402;
|
|
add.f32 %f1412, %f1411, %f1411;
|
|
neg.f32 %f1413, %f1402;
|
|
fma.rn.f32 %f1414, %f1413, %f1398, %f1412;
|
|
mul.rn.f32 %f1415, %f1400, %f1414;
|
|
add.f32 %f1416, %f1410, %f1402;
|
|
sub.f32 %f1417, %f1402, %f1416;
|
|
add.f32 %f1418, %f1410, %f1417;
|
|
add.f32 %f1419, %f1415, %f1418;
|
|
add.f32 %f1420, %f1416, %f1419;
|
|
sub.f32 %f1421, %f1416, %f1420;
|
|
add.f32 %f1422, %f1419, %f1421;
|
|
mov.f32 %f1423, 0f3F317200;
|
|
mul.rn.f32 %f1424, %f1396, %f1423;
|
|
mov.f32 %f1425, 0f35BFBE8E;
|
|
mul.rn.f32 %f1426, %f1396, %f1425;
|
|
add.f32 %f1427, %f1424, %f1420;
|
|
sub.f32 %f1428, %f1424, %f1427;
|
|
add.f32 %f1429, %f1420, %f1428;
|
|
add.f32 %f1430, %f1422, %f1429;
|
|
add.f32 %f1431, %f1426, %f1430;
|
|
add.f32 %f1432, %f1427, %f1431;
|
|
sub.f32 %f1433, %f1427, %f1432;
|
|
add.f32 %f1434, %f1431, %f1433;
|
|
mov.f32 %f1435, 0f3ED55555;
|
|
mul.rn.f32 %f1436, %f1435, %f1432;
|
|
neg.f32 %f1437, %f1436;
|
|
fma.rn.f32 %f1438, %f1435, %f1432, %f1437;
|
|
fma.rn.f32 %f1439, %f1435, %f1434, %f1438;
|
|
mov.f32 %f1440, 0f00000000;
|
|
fma.rn.f32 %f1441, %f1440, %f1432, %f1439;
|
|
add.rn.f32 %f1442, %f1436, %f1441;
|
|
neg.f32 %f1443, %f1442;
|
|
add.rn.f32 %f1444, %f1436, %f1443;
|
|
add.rn.f32 %f1445, %f1444, %f1441;
|
|
mov.b32 %r421, %f1442;
|
|
setp.eq.s32 %p149, %r421, 1118925336;
|
|
add.s32 %r422, %r421, -1;
|
|
mov.b32 %f1446, %r422;
|
|
add.f32 %f1447, %f1445, 0f37000000;
|
|
selp.f32 %f493, %f1447, %f1445, %p149;
|
|
selp.f32 %f1448, %f1446, %f1442, %p149;
|
|
mov.f32 %f1449, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1450, %f1448, %f1449;
|
|
cvt.rzi.f32.f32 %f1451, %f1450;
|
|
abs.f32 %f1452, %f1451;
|
|
setp.gt.f32 %p150, %f1452, 0f42FC0000;
|
|
mov.b32 %r423, %f1451;
|
|
and.b32 %r424, %r423, -2147483648;
|
|
or.b32 %r425, %r424, 1123811328;
|
|
mov.b32 %f1453, %r425;
|
|
selp.f32 %f1454, %f1453, %f1451, %p150;
|
|
mov.f32 %f1455, 0fBF317218;
|
|
fma.rn.f32 %f1456, %f1454, %f1455, %f1448;
|
|
mov.f32 %f1457, 0f3102E308;
|
|
fma.rn.f32 %f1458, %f1454, %f1457, %f1456;
|
|
mul.f32 %f1459, %f1458, 0f3FB8AA3B;
|
|
add.f32 %f1460, %f1454, 0f4B40007F;
|
|
mov.b32 %r426, %f1460;
|
|
shl.b32 %r427, %r426, 23;
|
|
mov.b32 %f1461, %r427;
|
|
ex2.approx.ftz.f32 %f1462, %f1459;
|
|
mul.f32 %f494, %f1462, %f1461;
|
|
setp.eq.f32 %p151, %f494, 0f7F800000;
|
|
mov.f32 %f2059, 0f7F800000;
|
|
@%p151 bra $L__BB0_121;
|
|
|
|
fma.rn.f32 %f2059, %f494, %f493, %f494;
|
|
|
|
$L__BB0_121:
|
|
setp.lt.f32 %p152, %f478, 0f00000000;
|
|
and.pred %p8, %p152, %p139;
|
|
setp.eq.f32 %p154, %f478, 0f00000000;
|
|
@%p154 bra $L__BB0_125;
|
|
bra.uni $L__BB0_122;
|
|
|
|
$L__BB0_125:
|
|
add.f32 %f1467, %f478, %f478;
|
|
selp.f32 %f2061, %f1467, 0f00000000, %p139;
|
|
bra.uni $L__BB0_126;
|
|
|
|
$L__BB0_122:
|
|
mov.b32 %r428, %f2059;
|
|
xor.b32 %r429, %r428, -2147483648;
|
|
mov.b32 %f1463, %r429;
|
|
selp.f32 %f2061, %f1463, %f2059, %p8;
|
|
setp.geu.f32 %p155, %f478, 0f00000000;
|
|
@%p155 bra $L__BB0_126;
|
|
|
|
mov.f32 %f1464, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1465, %f1464;
|
|
setp.eq.f32 %p156, %f1465, 0f3ED55555;
|
|
@%p156 bra $L__BB0_126;
|
|
|
|
mov.f32 %f2061, 0f7FFFFFFF;
|
|
|
|
$L__BB0_126:
|
|
add.f32 %f1468, %f492, 0f3ED55555;
|
|
mov.b32 %r430, %f1468;
|
|
setp.lt.s32 %p158, %r430, 2139095040;
|
|
@%p158 bra $L__BB0_131;
|
|
|
|
setp.gtu.f32 %p159, %f492, 0f7F800000;
|
|
@%p159 bra $L__BB0_130;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_130:
|
|
add.f32 %f2061, %f478, 0f3ED55555;
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_128:
|
|
setp.neu.f32 %p160, %f492, 0f7F800000;
|
|
@%p160 bra $L__BB0_131;
|
|
|
|
selp.f32 %f2061, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_131:
|
|
abs.f32 %f503, %f479;
|
|
setp.lt.f32 %p161, %f503, 0f00800000;
|
|
mul.f32 %f1470, %f503, 0f4B800000;
|
|
selp.f32 %f1471, %f1470, %f503, %p161;
|
|
selp.f32 %f1472, 0fC3170000, 0fC2FE0000, %p161;
|
|
mov.b32 %r431, %f1471;
|
|
and.b32 %r432, %r431, 8388607;
|
|
or.b32 %r433, %r432, 1065353216;
|
|
mov.b32 %f1473, %r433;
|
|
shr.u32 %r434, %r431, 23;
|
|
cvt.rn.f32.u32 %f1474, %r434;
|
|
add.f32 %f1475, %f1472, %f1474;
|
|
setp.gt.f32 %p162, %f1473, 0f3FB504F3;
|
|
mul.f32 %f1476, %f1473, 0f3F000000;
|
|
add.f32 %f1477, %f1475, 0f3F800000;
|
|
selp.f32 %f1478, %f1477, %f1475, %p162;
|
|
selp.f32 %f1479, %f1476, %f1473, %p162;
|
|
add.f32 %f1480, %f1479, 0fBF800000;
|
|
add.f32 %f1481, %f1479, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1482, %f1481;
|
|
add.f32 %f1483, %f1480, %f1480;
|
|
mul.f32 %f1484, %f1483, %f1482;
|
|
mul.f32 %f1485, %f1484, %f1484;
|
|
mov.f32 %f1486, 0f3C4CAF63;
|
|
mov.f32 %f1487, 0f3B18F0FE;
|
|
fma.rn.f32 %f1488, %f1487, %f1485, %f1486;
|
|
mov.f32 %f1489, 0f3DAAAABD;
|
|
fma.rn.f32 %f1490, %f1488, %f1485, %f1489;
|
|
mul.rn.f32 %f1491, %f1490, %f1485;
|
|
mul.rn.f32 %f1492, %f1491, %f1484;
|
|
sub.f32 %f1493, %f1480, %f1484;
|
|
add.f32 %f1494, %f1493, %f1493;
|
|
neg.f32 %f1495, %f1484;
|
|
fma.rn.f32 %f1496, %f1495, %f1480, %f1494;
|
|
mul.rn.f32 %f1497, %f1482, %f1496;
|
|
add.f32 %f1498, %f1492, %f1484;
|
|
sub.f32 %f1499, %f1484, %f1498;
|
|
add.f32 %f1500, %f1492, %f1499;
|
|
add.f32 %f1501, %f1497, %f1500;
|
|
add.f32 %f1502, %f1498, %f1501;
|
|
sub.f32 %f1503, %f1498, %f1502;
|
|
add.f32 %f1504, %f1501, %f1503;
|
|
mov.f32 %f1505, 0f3F317200;
|
|
mul.rn.f32 %f1506, %f1478, %f1505;
|
|
mov.f32 %f1507, 0f35BFBE8E;
|
|
mul.rn.f32 %f1508, %f1478, %f1507;
|
|
add.f32 %f1509, %f1506, %f1502;
|
|
sub.f32 %f1510, %f1506, %f1509;
|
|
add.f32 %f1511, %f1502, %f1510;
|
|
add.f32 %f1512, %f1504, %f1511;
|
|
add.f32 %f1513, %f1508, %f1512;
|
|
add.f32 %f1514, %f1509, %f1513;
|
|
sub.f32 %f1515, %f1509, %f1514;
|
|
add.f32 %f1516, %f1513, %f1515;
|
|
mov.f32 %f1517, 0f3ED55555;
|
|
mul.rn.f32 %f1518, %f1517, %f1514;
|
|
neg.f32 %f1519, %f1518;
|
|
fma.rn.f32 %f1520, %f1517, %f1514, %f1519;
|
|
fma.rn.f32 %f1521, %f1517, %f1516, %f1520;
|
|
mov.f32 %f1522, 0f00000000;
|
|
fma.rn.f32 %f1523, %f1522, %f1514, %f1521;
|
|
add.rn.f32 %f1524, %f1518, %f1523;
|
|
neg.f32 %f1525, %f1524;
|
|
add.rn.f32 %f1526, %f1518, %f1525;
|
|
add.rn.f32 %f1527, %f1526, %f1523;
|
|
mov.b32 %r435, %f1524;
|
|
setp.eq.s32 %p163, %r435, 1118925336;
|
|
add.s32 %r436, %r435, -1;
|
|
mov.b32 %f1528, %r436;
|
|
add.f32 %f1529, %f1527, 0f37000000;
|
|
selp.f32 %f504, %f1529, %f1527, %p163;
|
|
selp.f32 %f1530, %f1528, %f1524, %p163;
|
|
mov.f32 %f1531, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1532, %f1530, %f1531;
|
|
cvt.rzi.f32.f32 %f1533, %f1532;
|
|
abs.f32 %f1534, %f1533;
|
|
setp.gt.f32 %p164, %f1534, 0f42FC0000;
|
|
mov.b32 %r437, %f1533;
|
|
and.b32 %r438, %r437, -2147483648;
|
|
or.b32 %r439, %r438, 1123811328;
|
|
mov.b32 %f1535, %r439;
|
|
selp.f32 %f1536, %f1535, %f1533, %p164;
|
|
mov.f32 %f1537, 0fBF317218;
|
|
fma.rn.f32 %f1538, %f1536, %f1537, %f1530;
|
|
mov.f32 %f1539, 0f3102E308;
|
|
fma.rn.f32 %f1540, %f1536, %f1539, %f1538;
|
|
mul.f32 %f1541, %f1540, 0f3FB8AA3B;
|
|
add.f32 %f1542, %f1536, 0f4B40007F;
|
|
mov.b32 %r440, %f1542;
|
|
shl.b32 %r441, %r440, 23;
|
|
mov.b32 %f1543, %r441;
|
|
ex2.approx.ftz.f32 %f1544, %f1541;
|
|
mul.f32 %f505, %f1544, %f1543;
|
|
setp.eq.f32 %p165, %f505, 0f7F800000;
|
|
mov.f32 %f2062, 0f7F800000;
|
|
@%p165 bra $L__BB0_133;
|
|
|
|
fma.rn.f32 %f2062, %f505, %f504, %f505;
|
|
|
|
$L__BB0_133:
|
|
setp.lt.f32 %p166, %f479, 0f00000000;
|
|
and.pred %p9, %p166, %p139;
|
|
setp.eq.f32 %p168, %f479, 0f00000000;
|
|
@%p168 bra $L__BB0_137;
|
|
bra.uni $L__BB0_134;
|
|
|
|
$L__BB0_137:
|
|
add.f32 %f1549, %f479, %f479;
|
|
selp.f32 %f2064, %f1549, 0f00000000, %p139;
|
|
bra.uni $L__BB0_138;
|
|
|
|
$L__BB0_134:
|
|
mov.b32 %r442, %f2062;
|
|
xor.b32 %r443, %r442, -2147483648;
|
|
mov.b32 %f1545, %r443;
|
|
selp.f32 %f2064, %f1545, %f2062, %p9;
|
|
setp.geu.f32 %p169, %f479, 0f00000000;
|
|
@%p169 bra $L__BB0_138;
|
|
|
|
mov.f32 %f1546, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1547, %f1546;
|
|
setp.eq.f32 %p170, %f1547, 0f3ED55555;
|
|
@%p170 bra $L__BB0_138;
|
|
|
|
mov.f32 %f2064, 0f7FFFFFFF;
|
|
|
|
$L__BB0_138:
|
|
add.f32 %f1550, %f503, 0f3ED55555;
|
|
mov.b32 %r444, %f1550;
|
|
setp.lt.s32 %p172, %r444, 2139095040;
|
|
@%p172 bra $L__BB0_143;
|
|
|
|
setp.gtu.f32 %p173, %f503, 0f7F800000;
|
|
@%p173 bra $L__BB0_142;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_142:
|
|
add.f32 %f2064, %f479, 0f3ED55555;
|
|
bra.uni $L__BB0_143;
|
|
|
|
$L__BB0_140:
|
|
setp.neu.f32 %p174, %f503, 0f7F800000;
|
|
@%p174 bra $L__BB0_143;
|
|
|
|
selp.f32 %f2064, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_143:
|
|
fma.rn.f32 %f1551, %f2058, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p175, %f477, 0f3F800000;
|
|
mov.f32 %f1552, 0f3F800000;
|
|
selp.f32 %f1553, 0f3F7FFFFF, %f1551, %p175;
|
|
mul.f32 %f1554, %f477, 0f414EB852;
|
|
setp.lt.f32 %p176, %f477, 0f3B4D2E1C;
|
|
selp.f32 %f1555, %f1554, %f1553, %p176;
|
|
fma.rn.f32 %f1556, %f2061, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p177, %f478, 0f3F800000;
|
|
selp.f32 %f1557, 0f3F7FFFFF, %f1556, %p177;
|
|
mul.f32 %f1558, %f478, 0f414EB852;
|
|
setp.lt.f32 %p178, %f478, 0f3B4D2E1C;
|
|
selp.f32 %f1559, %f1558, %f1557, %p178;
|
|
fma.rn.f32 %f1560, %f2064, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p179, %f479, 0f3F800000;
|
|
selp.f32 %f1561, 0f3F7FFFFF, %f1560, %p179;
|
|
mul.f32 %f1562, %f479, 0f414EB852;
|
|
setp.lt.f32 %p180, %f479, 0f3B4D2E1C;
|
|
selp.f32 %f1563, %f1562, %f1561, %p180;
|
|
min.f32 %f1564, %f1555, %f1552;
|
|
mov.f32 %f1565, 0f00000000;
|
|
max.f32 %f1566, %f1565, %f1564;
|
|
mul.f32 %f1567, %f1566, 0f43800000;
|
|
cvt.rzi.u32.f32 %r445, %f1567;
|
|
min.u32 %r446, %r445, 255;
|
|
min.f32 %f1568, %f1559, %f1552;
|
|
max.f32 %f1569, %f1565, %f1568;
|
|
mul.f32 %f1570, %f1569, 0f43800000;
|
|
cvt.rzi.u32.f32 %r447, %f1570;
|
|
min.u32 %r448, %r447, 255;
|
|
min.f32 %f1571, %f1563, %f1552;
|
|
max.f32 %f1572, %f1565, %f1571;
|
|
mul.f32 %f1573, %f1572, 0f43800000;
|
|
cvt.rzi.u32.f32 %r449, %f1573;
|
|
min.u32 %r450, %r449, 255;
|
|
shl.b64 %rd102, %rd22, 2;
|
|
add.s64 %rd103, %rd21, %rd102;
|
|
cvt.u16.u32 %rs18, %r450;
|
|
cvt.u16.u32 %rs19, %r448;
|
|
cvt.u16.u32 %rs20, %r446;
|
|
mov.u16 %rs21, 255;
|
|
st.global.v4.u8 [%rd103], {%rs20, %rs19, %rs18, %rs21};
|
|
|
|
$L__BB0_144:
|
|
and.b32 %r451, %r85, 4;
|
|
setp.eq.s32 %p181, %r451, 0;
|
|
ld.const.u32 %r517, [params+108];
|
|
@%p181 bra $L__BB0_148;
|
|
|
|
setp.eq.s32 %p182, %r517, 0;
|
|
ld.const.u64 %rd104, [params+224];
|
|
cvta.to.global.u64 %rd105, %rd104;
|
|
ld.const.u32 %r452, [params+216];
|
|
mad.lo.s32 %r453, %r452, %r7, %r6;
|
|
mul.wide.u32 %rd106, %r453, 8;
|
|
add.s64 %rd23, %rd105, %rd106;
|
|
@%p182 bra $L__BB0_147;
|
|
|
|
ld.global.v4.u16 {%rs29, %rs30, %rs31, %rs32}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1574, %rs29;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1575, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1576, %rs31;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1577, %f437, %f1574;
|
|
add.f32 %f1578, %f438, %f1575;
|
|
add.f32 %f1579, %f440, %f1576;
|
|
mov.f32 %f1580, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1579;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1578;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f1577;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1580;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs25, %rs26, %rs27, %rs28};
|
|
bra.uni $L__BB0_148;
|
|
|
|
$L__BB0_147:
|
|
mov.f32 %f1584, 0f3F800000;
|
|
mov.u32 %r517, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1584;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f440;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f438;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f437;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs33, %rs34, %rs35, %rs36};
|
|
|
|
$L__BB0_148:
|
|
selp.f32 %f1585, 0f40800000, 0f3F800000, %p208;
|
|
mul.f32 %f1586, %f1585, %f2037;
|
|
mul.f32 %f1587, %f1585, %f2038;
|
|
mul.f32 %f1588, %f1585, %f2039;
|
|
mul.f32 %f514, %f1585, %f2034;
|
|
mul.f32 %f515, %f1585, %f2035;
|
|
mul.f32 %f516, %f1585, %f2036;
|
|
mul.f32 %f517, %f1585, %f2031;
|
|
mul.f32 %f518, %f1585, %f2032;
|
|
mul.f32 %f519, %f1585, %f2033;
|
|
mul.f32 %f520, %f1585, %f2028;
|
|
mul.f32 %f521, %f1585, %f2029;
|
|
mul.f32 %f522, %f1585, %f2030;
|
|
mul.f32 %f523, %f1585, %f2025;
|
|
mul.f32 %f524, %f1585, %f2026;
|
|
mul.f32 %f525, %f1585, %f2027;
|
|
mul.f32 %f526, %f1585, %f2022;
|
|
mul.f32 %f527, %f1585, %f2023;
|
|
mul.f32 %f528, %f1585, %f2024;
|
|
mul.f32 %f529, %f1585, %f2019;
|
|
mul.f32 %f530, %f1585, %f2020;
|
|
mul.f32 %f531, %f1585, %f2021;
|
|
mul.f32 %f532, %f1585, %f2016;
|
|
mul.f32 %f533, %f1585, %f2017;
|
|
mul.f32 %f534, %f1585, %f2018;
|
|
mul.f32 %f535, %f1585, %f2013;
|
|
mul.f32 %f536, %f1585, %f2014;
|
|
mul.f32 %f537, %f1585, %f2015;
|
|
mul.f32 %f1589, %f1586, %f1044;
|
|
mul.f32 %f1590, %f1587, %f1045;
|
|
mul.f32 %f1591, %f1588, %f439;
|
|
mul.f32 %f538, %f1589, 0f3F558750;
|
|
mul.f32 %f539, %f1590, 0f3F558750;
|
|
mul.f32 %f540, %f1591, 0f3F558750;
|
|
ld.const.u64 %rd107, [params+256];
|
|
cvta.to.global.u64 %rd108, %rd107;
|
|
ld.const.u32 %r455, [params+248];
|
|
mad.lo.s32 %r456, %r455, %r7, %r6;
|
|
mul.wide.u32 %rd109, %r456, 8;
|
|
add.s64 %rd24, %rd108, %rd109;
|
|
setp.eq.s32 %p183, %r517, 0;
|
|
@%p183 bra $L__BB0_150;
|
|
|
|
ld.global.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd24];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1592, %rs44;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1593, %rs45;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1594, %rs46;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1595, %f538, %f1592;
|
|
add.f32 %f1596, %f539, %f1593;
|
|
add.f32 %f1597, %f540, %f1594;
|
|
mov.f32 %f1598, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1597;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f1596;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs40, %f1595;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1598;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs40, %rs41, %rs42, %rs43};
|
|
bra.uni $L__BB0_151;
|
|
|
|
$L__BB0_150:
|
|
mov.f32 %f1602, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1602;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f540;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f539;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f538;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs48, %rs49, %rs50, %rs51};
|
|
|
|
$L__BB0_151:
|
|
mul.f32 %f1603, %f514, %f1044;
|
|
mul.f32 %f541, %f1603, 0f3FB8EBD1;
|
|
mul.f32 %f1604, %f515, %f1045;
|
|
mul.f32 %f542, %f1604, 0f3FB8EBD1;
|
|
mul.f32 %f1605, %f516, %f439;
|
|
mul.f32 %f543, %f1605, 0f3FB8EBD1;
|
|
ld.const.u64 %rd110, [params+272];
|
|
cvta.to.global.u64 %rd111, %rd110;
|
|
ld.const.u32 %r457, [params+264];
|
|
mad.lo.s32 %r458, %r457, %r7, %r6;
|
|
mul.wide.u32 %rd112, %r458, 8;
|
|
add.s64 %rd25, %rd111, %rd112;
|
|
@%p183 bra $L__BB0_153;
|
|
|
|
ld.global.v4.u16 {%rs59, %rs60, %rs61, %rs62}, [%rd25];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1606, %rs59;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1607, %rs60;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1608, %rs61;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1609, %f541, %f1606;
|
|
add.f32 %f1610, %f542, %f1607;
|
|
add.f32 %f1611, %f543, %f1608;
|
|
mov.f32 %f1612, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1611;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1610;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1609;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1612;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd25], {%rs55, %rs56, %rs57, %rs58};
|
|
bra.uni $L__BB0_154;
|
|
|
|
$L__BB0_153:
|
|
mov.f32 %f1616, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f1616;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f543;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f542;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f541;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd25], {%rs63, %rs64, %rs65, %rs66};
|
|
|
|
$L__BB0_154:
|
|
mul.f32 %f1617, %f517, %f1044;
|
|
mul.f32 %f544, %f1617, 0f3FB8EBD1;
|
|
mul.f32 %f1618, %f518, %f1045;
|
|
mul.f32 %f545, %f1618, 0f3FB8EBD1;
|
|
mul.f32 %f1619, %f519, %f439;
|
|
mul.f32 %f546, %f1619, 0f3FB8EBD1;
|
|
ld.const.u64 %rd113, [params+288];
|
|
cvta.to.global.u64 %rd114, %rd113;
|
|
ld.const.u32 %r459, [params+280];
|
|
mad.lo.s32 %r460, %r459, %r7, %r6;
|
|
mul.wide.u32 %rd115, %r460, 8;
|
|
add.s64 %rd26, %rd114, %rd115;
|
|
@%p183 bra $L__BB0_156;
|
|
|
|
ld.global.v4.u16 {%rs74, %rs75, %rs76, %rs77}, [%rd26];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1620, %rs74;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1621, %rs75;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1622, %rs76;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1623, %f544, %f1620;
|
|
add.f32 %f1624, %f545, %f1621;
|
|
add.f32 %f1625, %f546, %f1622;
|
|
mov.f32 %f1626, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f1625;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1624;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f1623;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f1626;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd26], {%rs70, %rs71, %rs72, %rs73};
|
|
bra.uni $L__BB0_157;
|
|
|
|
$L__BB0_156:
|
|
mov.f32 %f1630, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f1630;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f546;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f545;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f544;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd26], {%rs78, %rs79, %rs80, %rs81};
|
|
|
|
$L__BB0_157:
|
|
mul.f32 %f1631, %f520, %f1044;
|
|
mul.f32 %f547, %f1631, 0f3FB8EBD1;
|
|
mul.f32 %f1632, %f521, %f1045;
|
|
mul.f32 %f548, %f1632, 0f3FB8EBD1;
|
|
mul.f32 %f1633, %f522, %f439;
|
|
mul.f32 %f549, %f1633, 0f3FB8EBD1;
|
|
ld.const.u64 %rd116, [params+304];
|
|
cvta.to.global.u64 %rd117, %rd116;
|
|
ld.const.u32 %r461, [params+296];
|
|
mad.lo.s32 %r462, %r461, %r7, %r6;
|
|
mul.wide.u32 %rd118, %r462, 8;
|
|
add.s64 %rd27, %rd117, %rd118;
|
|
@%p183 bra $L__BB0_159;
|
|
|
|
ld.global.v4.u16 {%rs89, %rs90, %rs91, %rs92}, [%rd27];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1634, %rs89;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1635, %rs90;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1636, %rs91;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1637, %f547, %f1634;
|
|
add.f32 %f1638, %f548, %f1635;
|
|
add.f32 %f1639, %f549, %f1636;
|
|
mov.f32 %f1640, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f1639;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f1638;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f1637;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1640;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd27], {%rs85, %rs86, %rs87, %rs88};
|
|
bra.uni $L__BB0_160;
|
|
|
|
$L__BB0_159:
|
|
mov.f32 %f1644, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f1644;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f549;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f548;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs93, %f547;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd27], {%rs93, %rs94, %rs95, %rs96};
|
|
|
|
$L__BB0_160:
|
|
mul.f32 %f1645, %f523, %f1044;
|
|
mul.f32 %f550, %f1645, 0f404EBF87;
|
|
mul.f32 %f1646, %f524, %f1045;
|
|
mul.f32 %f551, %f1646, 0f404EBF87;
|
|
mul.f32 %f1647, %f525, %f439;
|
|
mul.f32 %f552, %f1647, 0f404EBF87;
|
|
ld.const.u64 %rd119, [params+320];
|
|
cvta.to.global.u64 %rd120, %rd119;
|
|
ld.const.u32 %r463, [params+312];
|
|
mad.lo.s32 %r464, %r463, %r7, %r6;
|
|
mul.wide.u32 %rd121, %r464, 8;
|
|
add.s64 %rd28, %rd120, %rd121;
|
|
@%p183 bra $L__BB0_162;
|
|
|
|
ld.global.v4.u16 {%rs104, %rs105, %rs106, %rs107}, [%rd28];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1648, %rs104;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1649, %rs105;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1650, %rs106;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1651, %f550, %f1648;
|
|
add.f32 %f1652, %f551, %f1649;
|
|
add.f32 %f1653, %f552, %f1650;
|
|
mov.f32 %f1654, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1653;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f1652;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs100, %f1651;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1654;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd28], {%rs100, %rs101, %rs102, %rs103};
|
|
bra.uni $L__BB0_163;
|
|
|
|
$L__BB0_162:
|
|
mov.f32 %f1658, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f1658;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f552;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f551;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs108, %f550;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd28], {%rs108, %rs109, %rs110, %rs111};
|
|
|
|
$L__BB0_163:
|
|
mul.f32 %f1659, %f526, %f1044;
|
|
mul.f32 %f553, %f1659, 0f404EBF87;
|
|
mul.f32 %f1660, %f527, %f1045;
|
|
mul.f32 %f554, %f1660, 0f404EBF87;
|
|
mul.f32 %f1661, %f528, %f439;
|
|
mul.f32 %f555, %f1661, 0f404EBF87;
|
|
ld.const.u64 %rd122, [params+336];
|
|
cvta.to.global.u64 %rd123, %rd122;
|
|
ld.const.u32 %r465, [params+328];
|
|
mad.lo.s32 %r466, %r465, %r7, %r6;
|
|
mul.wide.u32 %rd124, %r466, 8;
|
|
add.s64 %rd29, %rd123, %rd124;
|
|
@%p183 bra $L__BB0_165;
|
|
|
|
ld.global.v4.u16 {%rs119, %rs120, %rs121, %rs122}, [%rd29];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1662, %rs119;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1663, %rs120;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1664, %rs121;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1665, %f553, %f1662;
|
|
add.f32 %f1666, %f554, %f1663;
|
|
add.f32 %f1667, %f555, %f1664;
|
|
mov.f32 %f1668, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs117, %f1667;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f1666;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs115, %f1665;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs118, %f1668;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd29], {%rs115, %rs116, %rs117, %rs118};
|
|
bra.uni $L__BB0_166;
|
|
|
|
$L__BB0_165:
|
|
mov.f32 %f1672, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1672;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f555;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f554;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f553;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd29], {%rs123, %rs124, %rs125, %rs126};
|
|
|
|
$L__BB0_166:
|
|
mul.f32 %f1673, %f529, %f1044;
|
|
mul.f32 %f556, %f1673, 0f40330C94;
|
|
mul.f32 %f1674, %f530, %f1045;
|
|
mul.f32 %f557, %f1674, 0f40330C94;
|
|
mul.f32 %f1675, %f531, %f439;
|
|
mul.f32 %f558, %f1675, 0f40330C94;
|
|
ld.const.u64 %rd125, [params+352];
|
|
cvta.to.global.u64 %rd126, %rd125;
|
|
ld.const.u32 %r467, [params+344];
|
|
mad.lo.s32 %r468, %r467, %r7, %r6;
|
|
mul.wide.u32 %rd127, %r468, 8;
|
|
add.s64 %rd30, %rd126, %rd127;
|
|
@%p183 bra $L__BB0_168;
|
|
|
|
ld.global.v4.u16 {%rs134, %rs135, %rs136, %rs137}, [%rd30];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1676, %rs134;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1677, %rs135;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1678, %rs136;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1679, %f556, %f1676;
|
|
add.f32 %f1680, %f557, %f1677;
|
|
add.f32 %f1681, %f558, %f1678;
|
|
mov.f32 %f1682, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1681;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs131, %f1680;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs130, %f1679;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f1682;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd30], {%rs130, %rs131, %rs132, %rs133};
|
|
bra.uni $L__BB0_169;
|
|
|
|
$L__BB0_168:
|
|
mov.f32 %f1686, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs141, %f1686;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f558;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f557;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f556;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd30], {%rs138, %rs139, %rs140, %rs141};
|
|
|
|
$L__BB0_169:
|
|
mul.f32 %f1687, %f532, %f1044;
|
|
mul.f32 %f559, %f1687, 0f404EBF87;
|
|
mul.f32 %f1688, %f533, %f1045;
|
|
mul.f32 %f560, %f1688, 0f404EBF87;
|
|
mul.f32 %f1689, %f534, %f439;
|
|
mul.f32 %f561, %f1689, 0f404EBF87;
|
|
ld.const.u64 %rd128, [params+368];
|
|
cvta.to.global.u64 %rd129, %rd128;
|
|
ld.const.u32 %r469, [params+360];
|
|
mad.lo.s32 %r470, %r469, %r7, %r6;
|
|
mul.wide.u32 %rd130, %r470, 8;
|
|
add.s64 %rd31, %rd129, %rd130;
|
|
@%p183 bra $L__BB0_171;
|
|
|
|
ld.global.v4.u16 {%rs149, %rs150, %rs151, %rs152}, [%rd31];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1690, %rs149;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1691, %rs150;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1692, %rs151;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1693, %f559, %f1690;
|
|
add.f32 %f1694, %f560, %f1691;
|
|
add.f32 %f1695, %f561, %f1692;
|
|
mov.f32 %f1696, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f1695;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1694;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1693;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs148, %f1696;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd31], {%rs145, %rs146, %rs147, %rs148};
|
|
bra.uni $L__BB0_172;
|
|
|
|
$L__BB0_171:
|
|
mov.f32 %f1700, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs156, %f1700;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs155, %f561;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs154, %f560;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f559;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd31], {%rs153, %rs154, %rs155, %rs156};
|
|
|
|
$L__BB0_172:
|
|
mul.f32 %f1701, %f535, %f1044;
|
|
mul.f32 %f562, %f1701, 0f3FCEBF87;
|
|
mul.f32 %f1702, %f536, %f1045;
|
|
mul.f32 %f563, %f1702, 0f3FCEBF87;
|
|
mul.f32 %f1703, %f537, %f439;
|
|
mul.f32 %f564, %f1703, 0f3FCEBF87;
|
|
ld.const.u64 %rd131, [params+384];
|
|
cvta.to.global.u64 %rd132, %rd131;
|
|
ld.const.u32 %r471, [params+376];
|
|
mad.lo.s32 %r472, %r471, %r7, %r6;
|
|
mul.wide.u32 %rd133, %r472, 8;
|
|
add.s64 %rd32, %rd132, %rd133;
|
|
@%p183 bra $L__BB0_174;
|
|
|
|
ld.global.v4.u16 {%rs164, %rs165, %rs166, %rs167}, [%rd32];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1704, %rs164;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1705, %rs165;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1706, %rs166;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1707, %f562, %f1704;
|
|
add.f32 %f1708, %f563, %f1705;
|
|
add.f32 %f1709, %f564, %f1706;
|
|
mov.f32 %f1710, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs162, %f1709;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs161, %f1708;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs160, %f1707;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs163, %f1710;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd32], {%rs160, %rs161, %rs162, %rs163};
|
|
bra.uni $L__BB0_210;
|
|
|
|
$L__BB0_174:
|
|
mov.f32 %f1714, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs171, %f1714;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs170, %f564;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs169, %f563;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs168, %f562;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd32], {%rs168, %rs169, %rs170, %rs171};
|
|
|
|
$L__BB0_210:
|
|
ret;
|
|
|
|
}
|
|
|