2097 lines
61 KiB
Plaintext
2097 lines
61 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.visible .entry __raygen__oxMain()
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{
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.reg .pred %p<179>;
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.reg .b16 %rs<65>;
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.reg .f32 %f<1374>;
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.reg .b32 %r<418>;
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.reg .b64 %rd<54>;
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// begin inline asm
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call (%r23), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r24), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u64 %rd13, [params+400];
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cvta.to.global.u64 %rd14, %rd13;
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ld.const.u32 %r29, [params+392];
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mad.lo.s32 %r30, %r29, %r24, %r23;
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mul.wide.u32 %rd15, %r30, 4;
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add.s64 %rd1, %rd14, %rd15;
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ld.global.v2.u8 {%rs9, %rs63}, [%rd1];
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or.b16 %rs11, %rs9, %rs63;
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and.b16 %rs12, %rs11, 255;
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setp.eq.s16 %p10, %rs12, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs62, [%rd1+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs62, [%rd1+2];
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setp.eq.s16 %p11, %rs62, 0;
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mov.f32 %f1303, 0f00000000;
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mov.u16 %rs63, 0;
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mov.f32 %f1304, %f1303;
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mov.f32 %f1305, %f1303;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f223, %rs9;
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div.rn.f32 %f224, %f223, 0f437F0000;
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fma.rn.f32 %f225, %f224, 0f40000000, 0fBF800000;
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and.b16 %rs15, %rs63, 255;
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cvt.rn.f32.u16 %f226, %rs15;
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div.rn.f32 %f227, %f226, 0f437F0000;
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fma.rn.f32 %f228, %f227, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f229, %rs62;
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div.rn.f32 %f230, %f229, 0f437F0000;
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fma.rn.f32 %f231, %f230, 0f40000000, 0fBF800000;
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mul.f32 %f232, %f228, %f228;
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fma.rn.f32 %f233, %f225, %f225, %f232;
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fma.rn.f32 %f234, %f231, %f231, %f233;
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sqrt.rn.f32 %f235, %f234;
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rcp.rn.f32 %f236, %f235;
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mul.f32 %f1305, %f236, %f231;
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mul.f32 %f1304, %f236, %f228;
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mul.f32 %f1303, %f225, %f236;
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$L__BB0_4:
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ld.const.v2.u32 {%r31, %r32}, [params];
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add.s32 %r3, %r31, %r23;
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add.s32 %r4, %r32, %r24;
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setp.eq.f32 %p12, %f1303, 0f00000000;
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setp.eq.f32 %p13, %f1304, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1305, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_141;
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bra.uni $L__BB0_5;
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$L__BB0_141:
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ld.const.u32 %r22, [params+104];
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and.b32 %r399, %r22, 1;
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setp.eq.b32 %p170, %r399, 1;
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mov.pred %p171, 0;
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xor.pred %p172, %p170, %p171;
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not.pred %p173, %p172;
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@%p173 bra $L__BB0_143;
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ld.const.u64 %rd38, [params+144];
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cvta.to.global.u64 %rd39, %rd38;
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ld.const.u32 %r400, [params+136];
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mad.lo.s32 %r401, %r400, %r4, %r3;
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mul.wide.u32 %rd40, %r401, 4;
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add.s64 %rd41, %rd39, %rd40;
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mov.u16 %rs43, 0;
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st.global.v4.u8 [%rd41], {%rs43, %rs43, %rs43, %rs43};
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$L__BB0_143:
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and.b32 %r402, %r22, 8;
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setp.eq.s32 %p174, %r402, 0;
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@%p174 bra $L__BB0_145;
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ld.const.u64 %rd42, [params+192];
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cvta.to.global.u64 %rd43, %rd42;
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ld.const.u32 %r403, [params+184];
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mad.lo.s32 %r404, %r403, %r4, %r3;
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mov.f32 %f1290, 0f00000000;
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cvt.rzi.u32.f32 %r405, %f1290;
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mul.wide.u32 %rd44, %r404, 2;
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add.s64 %rd45, %rd43, %rd44;
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mov.u16 %rs44, 0;
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cvt.u16.u32 %rs45, %r405;
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st.global.v2.u8 [%rd45], {%rs45, %rs44};
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$L__BB0_145:
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and.b32 %r406, %r22, 4;
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setp.eq.s32 %p175, %r406, 0;
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@%p175 bra $L__BB0_149;
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ld.const.u32 %r407, [params+108];
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setp.eq.s32 %p176, %r407, 0;
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ld.const.u64 %rd46, [params+224];
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cvta.to.global.u64 %rd47, %rd46;
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ld.const.u32 %r408, [params+216];
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mad.lo.s32 %r409, %r408, %r4, %r3;
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mul.wide.u32 %rd48, %r409, 8;
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add.s64 %rd12, %rd47, %rd48;
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@%p176 bra $L__BB0_148;
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ld.global.v4.u16 {%rs52, %rs53, %rs54, %rs55}, [%rd12];
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// begin inline asm
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{ cvt.f32.f16 %f1291, %rs52;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1292, %rs53;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1293, %rs54;}
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// end inline asm
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add.f32 %f1294, %f1291, 0f00000000;
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add.f32 %f1295, %f1292, 0f00000000;
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add.f32 %f1296, %f1293, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs51, %f1296;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs50, %f1295;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs49, %f1294;}
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// end inline asm
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mov.u16 %rs56, 0;
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st.global.v4.u16 [%rd12], {%rs49, %rs50, %rs51, %rs56};
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bra.uni $L__BB0_149;
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$L__BB0_5:
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ld.const.u64 %rd16, [params+432];
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cvta.to.global.u64 %rd17, %rd16;
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ld.const.u32 %r35, [params+424];
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mad.lo.s32 %r36, %r35, %r24, %r23;
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mul.wide.u32 %rd18, %r36, 12;
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add.s64 %rd19, %rd17, %rd18;
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ld.global.f32 %f10, [%rd19];
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mul.f32 %f237, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd19+4];
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mul.f32 %f238, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd19+8];
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mul.f32 %f239, %f12, 0f3456BF95;
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abs.f32 %f240, %f1303;
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div.rn.f32 %f241, %f237, %f240;
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abs.f32 %f242, %f1304;
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div.rn.f32 %f243, %f238, %f242;
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abs.f32 %f244, %f1305;
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div.rn.f32 %f245, %f239, %f244;
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abs.f32 %f246, %f241;
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abs.f32 %f247, %f243;
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abs.f32 %f248, %f245;
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mov.f32 %f249, 0f38D1B717;
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max.f32 %f250, %f246, %f249;
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max.f32 %f251, %f247, %f249;
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max.f32 %f252, %f248, %f249;
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fma.rn.f32 %f13, %f1303, %f250, %f10;
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fma.rn.f32 %f14, %f1304, %f251, %f11;
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fma.rn.f32 %f15, %f1305, %f252, %f12;
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cvt.rn.f32.u32 %f16, %r23;
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cvt.rn.f32.u32 %f17, %r24;
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ld.const.u32 %r5, [params+600];
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setp.eq.s32 %p17, %r5, 0;
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@%p17 bra $L__BB0_46;
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ld.const.u64 %rd20, [params+608];
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cvta.to.global.u64 %rd2, %rd20;
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mov.f32 %f260, 0f40000000;
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cvt.rzi.f32.f32 %f261, %f260;
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add.f32 %f262, %f261, %f261;
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mov.f32 %f263, 0f40800000;
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sub.f32 %f264, %f263, %f262;
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abs.f32 %f18, %f264;
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ld.const.u32 %r6, [params+544];
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ld.const.u32 %r417, [params+104];
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and.b32 %r8, %r417, 64;
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and.b32 %r38, %r417, 32;
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setp.eq.s32 %p18, %r38, 0;
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mov.u32 %r413, 0;
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selp.f32 %f19, 0f3F800000, 0f41200000, %p18;
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mul.f32 %f20, %f13, 0f3456BF95;
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mul.f32 %f21, %f14, 0f3456BF95;
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mul.f32 %f22, %f15, 0f3456BF95;
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mov.f32 %f259, 0f00000000;
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ld.const.u64 %rd3, [params+96];
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abs.f32 %f449, %f20;
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abs.f32 %f450, %f21;
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max.f32 %f451, %f449, %f450;
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abs.f32 %f452, %f22;
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max.f32 %f453, %f451, %f452;
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mov.f32 %f1345, %f259;
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mov.f32 %f1344, %f259;
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mov.f32 %f1343, %f259;
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mov.f32 %f1342, %f259;
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mov.f32 %f1341, %f259;
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mov.f32 %f1340, %f259;
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mov.f32 %f1339, %f259;
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$L__BB0_7:
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mul.wide.u32 %rd21, %r413, 112;
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add.s64 %rd5, %rd2, %rd21;
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ld.global.v4.f32 {%f266, %f267, %f268, %f269}, [%rd5];
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ld.global.v4.f32 {%f273, %f274, %f275, %f276}, [%rd5+16];
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ld.global.v4.f32 {%f279, %f1321, %f1322, %f282}, [%rd5+32];
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ld.global.v4.f32 {%f283, %f284, %f285, %f1319}, [%rd5+48];
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ld.global.v4.f32 {%f287, %f288, %f289, %f290}, [%rd5+64];
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ld.global.v4.u32 {%r39, %r40, %r41, %r42}, [%rd5+80];
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mov.b32 %f43, %r39;
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mov.b32 %f44, %r40;
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mov.b32 %f45, %r41;
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ld.global.u64 %rd6, [%rd5+96];
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sub.f32 %f46, %f267, %f10;
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sub.f32 %f47, %f268, %f11;
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sub.f32 %f48, %f269, %f12;
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mul.f32 %f291, %f47, %f47;
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fma.rn.f32 %f292, %f46, %f46, %f291;
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fma.rn.f32 %f293, %f48, %f48, %f292;
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sqrt.rn.f32 %f294, %f293;
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rcp.rn.f32 %f295, %f294;
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mul.f32 %f49, %f46, %f295;
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mul.f32 %f50, %f47, %f295;
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mul.f32 %f51, %f48, %f295;
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mul.f32 %f52, %f294, %f274;
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mul.f32 %f53, %f294, %f276;
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abs.f32 %f54, %f53;
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setp.lt.f32 %p19, %f54, 0f00800000;
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mul.f32 %f296, %f54, 0f4B800000;
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selp.f32 %f297, %f296, %f54, %p19;
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selp.f32 %f298, 0fC3170000, 0fC2FE0000, %p19;
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mov.b32 %r46, %f297;
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and.b32 %r47, %r46, 8388607;
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or.b32 %r48, %r47, 1065353216;
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mov.b32 %f299, %r48;
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shr.u32 %r49, %r46, 23;
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cvt.rn.f32.u32 %f300, %r49;
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add.f32 %f301, %f298, %f300;
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setp.gt.f32 %p20, %f299, 0f3FB504F3;
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mul.f32 %f302, %f299, 0f3F000000;
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add.f32 %f303, %f301, 0f3F800000;
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selp.f32 %f304, %f303, %f301, %p20;
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selp.f32 %f305, %f302, %f299, %p20;
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add.f32 %f306, %f305, 0fBF800000;
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add.f32 %f307, %f305, 0f3F800000;
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rcp.approx.ftz.f32 %f308, %f307;
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add.f32 %f309, %f306, %f306;
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mul.f32 %f310, %f309, %f308;
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mul.f32 %f311, %f310, %f310;
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mov.f32 %f312, 0f3C4CAF63;
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mov.f32 %f313, 0f3B18F0FE;
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fma.rn.f32 %f314, %f313, %f311, %f312;
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mov.f32 %f315, 0f3DAAAABD;
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fma.rn.f32 %f316, %f314, %f311, %f315;
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mul.rn.f32 %f317, %f316, %f311;
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mul.rn.f32 %f318, %f317, %f310;
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sub.f32 %f319, %f306, %f310;
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add.f32 %f320, %f319, %f319;
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neg.f32 %f321, %f310;
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fma.rn.f32 %f322, %f321, %f306, %f320;
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mul.rn.f32 %f323, %f308, %f322;
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add.f32 %f324, %f318, %f310;
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sub.f32 %f325, %f310, %f324;
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add.f32 %f326, %f318, %f325;
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add.f32 %f327, %f323, %f326;
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add.f32 %f328, %f324, %f327;
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sub.f32 %f329, %f324, %f328;
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add.f32 %f330, %f327, %f329;
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mov.f32 %f331, 0f3F317200;
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mul.rn.f32 %f332, %f304, %f331;
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mov.f32 %f333, 0f35BFBE8E;
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mul.rn.f32 %f334, %f304, %f333;
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add.f32 %f335, %f332, %f328;
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sub.f32 %f336, %f332, %f335;
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add.f32 %f337, %f328, %f336;
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add.f32 %f338, %f330, %f337;
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add.f32 %f339, %f334, %f338;
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add.f32 %f340, %f335, %f339;
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sub.f32 %f341, %f335, %f340;
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add.f32 %f342, %f339, %f341;
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mul.rn.f32 %f344, %f263, %f340;
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neg.f32 %f345, %f344;
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fma.rn.f32 %f346, %f263, %f340, %f345;
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fma.rn.f32 %f347, %f263, %f342, %f346;
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fma.rn.f32 %f349, %f259, %f340, %f347;
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add.rn.f32 %f350, %f344, %f349;
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neg.f32 %f351, %f350;
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add.rn.f32 %f352, %f344, %f351;
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add.rn.f32 %f353, %f352, %f349;
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mov.b32 %r50, %f350;
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setp.eq.s32 %p21, %r50, 1118925336;
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add.s32 %r51, %r50, -1;
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mov.b32 %f354, %r51;
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add.f32 %f355, %f353, 0f37000000;
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selp.f32 %f55, %f355, %f353, %p21;
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selp.f32 %f356, %f354, %f350, %p21;
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mov.f32 %f357, 0f3FB8AA3B;
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mul.rn.f32 %f358, %f356, %f357;
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cvt.rzi.f32.f32 %f359, %f358;
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abs.f32 %f360, %f359;
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setp.gt.f32 %p22, %f360, 0f42FC0000;
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mov.b32 %r52, %f359;
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and.b32 %r53, %r52, -2147483648;
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or.b32 %r54, %r53, 1123811328;
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mov.b32 %f361, %r54;
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selp.f32 %f362, %f361, %f359, %p22;
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mov.f32 %f363, 0fBF317218;
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fma.rn.f32 %f364, %f362, %f363, %f356;
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mov.f32 %f365, 0f3102E308;
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fma.rn.f32 %f366, %f362, %f365, %f364;
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mul.f32 %f367, %f366, 0f3FB8AA3B;
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add.f32 %f368, %f362, 0f4B40007F;
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mov.b32 %r55, %f368;
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shl.b32 %r56, %r55, 23;
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mov.b32 %f369, %r56;
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ex2.approx.ftz.f32 %f370, %f367;
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mul.f32 %f56, %f370, %f369;
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setp.eq.f32 %p23, %f56, 0f7F800000;
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mov.f32 %f1313, 0f7F800000;
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@%p23 bra $L__BB0_9;
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fma.rn.f32 %f1313, %f56, %f55, %f56;
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$L__BB0_9:
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setp.lt.f32 %p24, %f53, 0f00000000;
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setp.eq.f32 %p25, %f18, 0f3F800000;
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and.pred %p1, %p24, %p25;
|
|
setp.eq.f32 %p26, %f53, 0f00000000;
|
|
@%p26 bra $L__BB0_13;
|
|
bra.uni $L__BB0_10;
|
|
|
|
$L__BB0_13:
|
|
add.f32 %f375, %f53, %f53;
|
|
selp.f32 %f1315, %f375, 0f00000000, %p25;
|
|
bra.uni $L__BB0_14;
|
|
|
|
$L__BB0_10:
|
|
mov.b32 %r57, %f1313;
|
|
xor.b32 %r58, %r57, -2147483648;
|
|
mov.b32 %f371, %r58;
|
|
selp.f32 %f1315, %f371, %f1313, %p1;
|
|
setp.geu.f32 %p27, %f53, 0f00000000;
|
|
@%p27 bra $L__BB0_14;
|
|
|
|
mov.f32 %f372, 0f40800000;
|
|
cvt.rzi.f32.f32 %f373, %f372;
|
|
setp.eq.f32 %p28, %f373, 0f40800000;
|
|
@%p28 bra $L__BB0_14;
|
|
|
|
mov.f32 %f1315, 0f7FFFFFFF;
|
|
|
|
$L__BB0_14:
|
|
abs.f32 %f1300, %f53;
|
|
add.f32 %f376, %f1300, 0f40800000;
|
|
mov.b32 %r59, %f376;
|
|
setp.lt.s32 %p30, %r59, 2139095040;
|
|
@%p30 bra $L__BB0_19;
|
|
|
|
abs.f32 %f1301, %f53;
|
|
setp.gtu.f32 %p31, %f1301, 0f7F800000;
|
|
@%p31 bra $L__BB0_18;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_18:
|
|
add.f32 %f1315, %f53, 0f40800000;
|
|
bra.uni $L__BB0_19;
|
|
|
|
$L__BB0_16:
|
|
abs.f32 %f1302, %f53;
|
|
setp.neu.f32 %p32, %f1302, 0f7F800000;
|
|
@%p32 bra $L__BB0_19;
|
|
|
|
selp.f32 %f1315, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_19:
|
|
mov.f32 %f377, 0f3F800000;
|
|
sub.f32 %f378, %f377, %f1315;
|
|
setp.eq.f32 %p33, %f53, 0f3F800000;
|
|
selp.f32 %f379, 0f00000000, %f378, %p33;
|
|
cvt.sat.f32.f32 %f380, %f379;
|
|
fma.rn.f32 %f381, %f52, %f52, %f275;
|
|
div.rn.f32 %f65, %f380, %f381;
|
|
mul.f32 %f382, %f1304, %f50;
|
|
fma.rn.f32 %f383, %f1303, %f49, %f382;
|
|
fma.rn.f32 %f66, %f1305, %f51, %f383;
|
|
setp.eq.f32 %p34, %f266, 0f3F800000;
|
|
@%p34 bra $L__BB0_25;
|
|
bra.uni $L__BB0_20;
|
|
|
|
$L__BB0_25:
|
|
setp.eq.s64 %p38, %rd6, 0;
|
|
mov.f32 %f1320, %f279;
|
|
mov.f32 %f1323, %f65;
|
|
@%p38 bra $L__BB0_29;
|
|
|
|
setp.geu.f32 %p39, %f1319, 0f00000000;
|
|
mov.f32 %f1316, %f49;
|
|
mov.f32 %f1317, %f50;
|
|
mov.f32 %f1318, %f51;
|
|
@%p39 bra $L__BB0_28;
|
|
|
|
mul.f32 %f406, %f44, %f47;
|
|
fma.rn.f32 %f407, %f43, %f46, %f406;
|
|
fma.rn.f32 %f408, %f45, %f48, %f407;
|
|
rcp.rn.f32 %f409, %f408;
|
|
mul.f32 %f1316, %f46, %f409;
|
|
mul.f32 %f1317, %f47, %f409;
|
|
mul.f32 %f1318, %f48, %f409;
|
|
neg.f32 %f1319, %f1319;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f410, %f45, %f51;
|
|
mul.f32 %f411, %f44, %f50;
|
|
neg.f32 %f412, %f411;
|
|
mul.f32 %f413, %f43, %f49;
|
|
sub.f32 %f414, %f412, %f413;
|
|
sub.f32 %f415, %f414, %f410;
|
|
setp.gt.f32 %p40, %f415, 0f00000000;
|
|
selp.f32 %f416, 0f3F800000, 0f00000000, %p40;
|
|
mov.f32 %f417, 0f3F800000;
|
|
mul.f32 %f418, %f284, %f1317;
|
|
fma.rn.f32 %f419, %f283, %f1316, %f418;
|
|
mul.f32 %f420, %f288, %f1317;
|
|
fma.rn.f32 %f421, %f287, %f1316, %f420;
|
|
fma.rn.f32 %f422, %f285, %f1318, %f419;
|
|
fma.rn.f32 %f423, %f289, %f1318, %f421;
|
|
fma.rn.f32 %f424, %f1319, %f422, 0f3F000000;
|
|
sub.f32 %f425, %f417, %f424;
|
|
fma.rn.f32 %f426, %f1319, %f423, 0f3F000000;
|
|
tex.2d.v4.f32.f32 {%f427, %f428, %f429, %f430}, [%rd6, {%f425, %f426}];
|
|
mul.f32 %f431, %f416, %f427;
|
|
mul.f32 %f432, %f416, %f428;
|
|
mul.f32 %f433, %f416, %f429;
|
|
mul.f32 %f1320, %f279, %f431;
|
|
mul.f32 %f1321, %f1321, %f432;
|
|
mul.f32 %f1322, %f1322, %f433;
|
|
mov.f32 %f1323, %f65;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_20:
|
|
setp.eq.f32 %p35, %f266, 0f40000000;
|
|
@%p35 bra $L__BB0_23;
|
|
bra.uni $L__BB0_21;
|
|
|
|
$L__BB0_23:
|
|
setp.eq.s64 %p37, %rd6, 0;
|
|
mov.f32 %f1320, %f279;
|
|
mov.f32 %f1323, %f65;
|
|
@%p37 bra $L__BB0_29;
|
|
|
|
mul.f32 %f393, %f284, %f50;
|
|
fma.rn.f32 %f394, %f283, %f49, %f393;
|
|
mul.f32 %f395, %f288, %f50;
|
|
fma.rn.f32 %f396, %f287, %f49, %f395;
|
|
mul.f32 %f397, %f44, %f50;
|
|
fma.rn.f32 %f398, %f43, %f49, %f397;
|
|
fma.rn.f32 %f399, %f285, %f51, %f394;
|
|
fma.rn.f32 %f400, %f289, %f51, %f396;
|
|
fma.rn.f32 %f401, %f45, %f51, %f398;
|
|
tex.cube.v4.f32.f32 {%f402, %f403, %f404, %f405}, [%rd6, {%f399, %f400, %f401, %f401}];
|
|
mul.f32 %f1320, %f279, %f402;
|
|
mul.f32 %f1321, %f1321, %f403;
|
|
mul.f32 %f1322, %f1322, %f404;
|
|
mov.f32 %f1323, %f65;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_21:
|
|
setp.neu.f32 %p36, %f266, 0f40800000;
|
|
mov.f32 %f1320, %f279;
|
|
mov.f32 %f1323, %f65;
|
|
@%p36 bra $L__BB0_29;
|
|
|
|
mul.f32 %f384, %f43, %f49;
|
|
mul.f32 %f385, %f44, %f50;
|
|
neg.f32 %f386, %f385;
|
|
sub.f32 %f387, %f386, %f384;
|
|
mul.f32 %f388, %f45, %f51;
|
|
sub.f32 %f389, %f387, %f388;
|
|
fma.rn.f32 %f390, %f282, %f389, %f1319;
|
|
cvt.sat.f32.f32 %f391, %f390;
|
|
mul.f32 %f392, %f391, %f391;
|
|
mul.f32 %f1323, %f65, %f392;
|
|
mov.f32 %f1320, %f279;
|
|
|
|
$L__BB0_29:
|
|
max.f32 %f440, %f1320, %f1321;
|
|
max.f32 %f441, %f440, %f1322;
|
|
setp.eq.s32 %p42, %r6, 0;
|
|
selp.f32 %f442, %f66, 0f3F800000, %p42;
|
|
cvt.sat.f32.f32 %f443, %f442;
|
|
mul.f32 %f86, %f443, %f1323;
|
|
mul.f32 %f444, %f86, %f441;
|
|
setp.lt.f32 %p43, %f444, 0f3727C5AC;
|
|
mov.pred %p178, -1;
|
|
mov.f32 %f1324, 0f00000000;
|
|
mov.f32 %f1325, %f1324;
|
|
mov.f32 %f1326, %f1324;
|
|
mov.f32 %f1327, %f1324;
|
|
mov.f32 %f1328, %f1324;
|
|
mov.f32 %f1329, %f1324;
|
|
@%p43 bra $L__BB0_31;
|
|
|
|
setp.eq.s32 %p45, %r8, 0;
|
|
mul.f32 %f1324, %f1320, %f86;
|
|
mul.f32 %f1325, %f1321, %f86;
|
|
mul.f32 %f1326, %f1322, %f86;
|
|
selp.f32 %f1327, 0f00000000, %f49, %p45;
|
|
selp.f32 %f1328, 0f00000000, %f50, %p45;
|
|
selp.f32 %f1329, 0f00000000, %f51, %p45;
|
|
mov.pred %p178, 0;
|
|
|
|
$L__BB0_31:
|
|
@%p178 bra $L__BB0_45;
|
|
|
|
setp.eq.s32 %p46, %r42, 0;
|
|
mov.u16 %rs64, 0;
|
|
mov.f32 %f1338, 0f3F800000;
|
|
@%p46 bra $L__BB0_40;
|
|
|
|
abs.s32 %r11, %r42;
|
|
setp.lt.s32 %p47, %r11, 1;
|
|
mov.f32 %f1331, 0f00000000;
|
|
@%p47 bra $L__BB0_39;
|
|
|
|
mov.f32 %f454, 0f38D1B717;
|
|
max.f32 %f455, %f453, %f454;
|
|
mul.f32 %f99, %f19, %f455;
|
|
and.b32 %r12, %r11, 1;
|
|
setp.eq.s32 %p48, %r11, 1;
|
|
mov.f32 %f1331, 0f00000000;
|
|
mov.u32 %r416, 0;
|
|
@%p48 bra $L__BB0_37;
|
|
|
|
sub.s32 %r415, %r11, %r12;
|
|
|
|
$L__BB0_36:
|
|
cvt.rn.f32.s32 %f475, %r416;
|
|
add.f32 %f476, %f16, %f475;
|
|
sub.f32 %f477, %f17, %f475;
|
|
mul.f32 %f478, %f476, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f479, %f478;
|
|
sub.f32 %f480, %f478, %f479;
|
|
mul.f32 %f481, %f477, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f482, %f481;
|
|
sub.f32 %f483, %f481, %f482;
|
|
mul.f32 %f484, %f475, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f485, %f484;
|
|
sub.f32 %f486, %f484, %f485;
|
|
add.f32 %f487, %f483, 0f420551EC;
|
|
add.f32 %f488, %f480, 0f420551EC;
|
|
add.f32 %f489, %f486, 0f420551EC;
|
|
mul.f32 %f490, %f480, %f487;
|
|
fma.rn.f32 %f491, %f483, %f488, %f490;
|
|
fma.rn.f32 %f492, %f486, %f489, %f491;
|
|
add.f32 %f493, %f480, %f492;
|
|
add.f32 %f494, %f483, %f492;
|
|
add.f32 %f495, %f486, %f492;
|
|
add.f32 %f496, %f493, %f494;
|
|
mul.f32 %f497, %f495, %f496;
|
|
cvt.rmi.f32.f32 %f498, %f497;
|
|
sub.f32 %f499, %f497, %f498;
|
|
add.f32 %f500, %f493, %f493;
|
|
mul.f32 %f501, %f494, %f500;
|
|
cvt.rmi.f32.f32 %f502, %f501;
|
|
sub.f32 %f503, %f501, %f502;
|
|
mul.f32 %f504, %f493, %f496;
|
|
cvt.rmi.f32.f32 %f505, %f504;
|
|
sub.f32 %f506, %f504, %f505;
|
|
fma.rn.f32 %f507, %f499, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f508, %f503, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f509, %f506, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f510, [%rd5+16];
|
|
ld.global.f32 %f511, [%rd5+4];
|
|
fma.rn.f32 %f512, %f510, %f507, %f511;
|
|
ld.global.f32 %f513, [%rd5+8];
|
|
fma.rn.f32 %f514, %f510, %f508, %f513;
|
|
ld.global.f32 %f515, [%rd5+12];
|
|
fma.rn.f32 %f516, %f510, %f509, %f515;
|
|
sub.f32 %f517, %f512, %f10;
|
|
sub.f32 %f518, %f514, %f11;
|
|
sub.f32 %f519, %f516, %f12;
|
|
mul.f32 %f520, %f518, %f518;
|
|
fma.rn.f32 %f521, %f517, %f517, %f520;
|
|
fma.rn.f32 %f522, %f519, %f519, %f521;
|
|
sqrt.rn.f32 %f464, %f522;
|
|
rcp.rn.f32 %f523, %f464;
|
|
mul.f32 %f460, %f523, %f517;
|
|
mul.f32 %f461, %f523, %f518;
|
|
mul.f32 %f462, %f523, %f519;
|
|
mov.f32 %f474, 0f00000000;
|
|
mov.u32 %r169, 2;
|
|
mov.u32 %r171, 1;
|
|
mov.u32 %r172, 1065353216;
|
|
mov.u32 %r203, 0;
|
|
// begin inline asm
|
|
call(%r62,%r63,%r64,%r65,%r66,%r67,%r68,%r69,%r70,%r71,%r72,%r73,%r74,%r75,%r76,%r77,%r78,%r79,%r80,%r81,%r82,%r83,%r84,%r85,%r86,%r87,%r88,%r89,%r90,%r91,%r92,%r93),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f460,%f461,%f462,%f99,%f464,%f474,%r171,%r203,%r171,%r169,%r171,%r171,%r172,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
|
|
// end inline asm
|
|
mov.b32 %f524, %r62;
|
|
add.f32 %f525, %f1331, %f524;
|
|
add.s32 %r204, %r416, 1;
|
|
cvt.rn.f32.s32 %f526, %r204;
|
|
add.f32 %f527, %f16, %f526;
|
|
sub.f32 %f528, %f17, %f526;
|
|
mul.f32 %f529, %f527, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f530, %f529;
|
|
sub.f32 %f531, %f529, %f530;
|
|
mul.f32 %f532, %f528, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f533, %f532;
|
|
sub.f32 %f534, %f532, %f533;
|
|
mul.f32 %f535, %f526, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f536, %f535;
|
|
sub.f32 %f537, %f535, %f536;
|
|
add.f32 %f538, %f534, 0f420551EC;
|
|
add.f32 %f539, %f531, 0f420551EC;
|
|
add.f32 %f540, %f537, 0f420551EC;
|
|
mul.f32 %f541, %f531, %f538;
|
|
fma.rn.f32 %f542, %f534, %f539, %f541;
|
|
fma.rn.f32 %f543, %f537, %f540, %f542;
|
|
add.f32 %f544, %f531, %f543;
|
|
add.f32 %f545, %f534, %f543;
|
|
add.f32 %f546, %f537, %f543;
|
|
add.f32 %f547, %f544, %f545;
|
|
mul.f32 %f548, %f546, %f547;
|
|
cvt.rmi.f32.f32 %f549, %f548;
|
|
sub.f32 %f550, %f548, %f549;
|
|
add.f32 %f551, %f544, %f544;
|
|
mul.f32 %f552, %f545, %f551;
|
|
cvt.rmi.f32.f32 %f553, %f552;
|
|
sub.f32 %f554, %f552, %f553;
|
|
mul.f32 %f555, %f544, %f547;
|
|
cvt.rmi.f32.f32 %f556, %f555;
|
|
sub.f32 %f557, %f555, %f556;
|
|
fma.rn.f32 %f558, %f550, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f559, %f554, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f560, %f557, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f561, [%rd5+16];
|
|
ld.global.f32 %f562, [%rd5+4];
|
|
fma.rn.f32 %f563, %f561, %f558, %f562;
|
|
ld.global.f32 %f564, [%rd5+8];
|
|
fma.rn.f32 %f565, %f561, %f559, %f564;
|
|
ld.global.f32 %f566, [%rd5+12];
|
|
fma.rn.f32 %f567, %f561, %f560, %f566;
|
|
sub.f32 %f568, %f563, %f10;
|
|
sub.f32 %f569, %f565, %f11;
|
|
sub.f32 %f570, %f567, %f12;
|
|
mul.f32 %f571, %f569, %f569;
|
|
fma.rn.f32 %f572, %f568, %f568, %f571;
|
|
fma.rn.f32 %f573, %f570, %f570, %f572;
|
|
sqrt.rn.f32 %f473, %f573;
|
|
rcp.rn.f32 %f574, %f473;
|
|
mul.f32 %f469, %f574, %f568;
|
|
mul.f32 %f470, %f574, %f569;
|
|
mul.f32 %f471, %f574, %f570;
|
|
// begin inline asm
|
|
call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd3,%f13,%f14,%f15,%f469,%f470,%f471,%f99,%f473,%f474,%r171,%r203,%r171,%r169,%r171,%r171,%r172,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
|
|
// end inline asm
|
|
mov.b32 %f575, %r133;
|
|
add.f32 %f1331, %f525, %f575;
|
|
add.s32 %r416, %r416, 2;
|
|
add.s32 %r415, %r415, -2;
|
|
setp.ne.s32 %p49, %r415, 0;
|
|
@%p49 bra $L__BB0_36;
|
|
|
|
$L__BB0_37:
|
|
setp.eq.s32 %p50, %r12, 0;
|
|
@%p50 bra $L__BB0_39;
|
|
|
|
cvt.rn.f32.s32 %f585, %r416;
|
|
add.f32 %f586, %f16, %f585;
|
|
sub.f32 %f587, %f17, %f585;
|
|
mul.f32 %f588, %f586, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f589, %f588;
|
|
sub.f32 %f590, %f588, %f589;
|
|
mul.f32 %f591, %f587, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f592, %f591;
|
|
sub.f32 %f593, %f591, %f592;
|
|
mul.f32 %f594, %f585, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f595, %f594;
|
|
sub.f32 %f596, %f594, %f595;
|
|
add.f32 %f597, %f593, 0f420551EC;
|
|
add.f32 %f598, %f590, 0f420551EC;
|
|
add.f32 %f599, %f596, 0f420551EC;
|
|
mul.f32 %f600, %f590, %f597;
|
|
fma.rn.f32 %f601, %f593, %f598, %f600;
|
|
fma.rn.f32 %f602, %f596, %f599, %f601;
|
|
add.f32 %f603, %f590, %f602;
|
|
add.f32 %f604, %f593, %f602;
|
|
add.f32 %f605, %f596, %f602;
|
|
add.f32 %f606, %f603, %f604;
|
|
mul.f32 %f607, %f605, %f606;
|
|
cvt.rmi.f32.f32 %f608, %f607;
|
|
sub.f32 %f609, %f607, %f608;
|
|
add.f32 %f610, %f603, %f603;
|
|
mul.f32 %f611, %f604, %f610;
|
|
cvt.rmi.f32.f32 %f612, %f611;
|
|
sub.f32 %f613, %f611, %f612;
|
|
mul.f32 %f614, %f603, %f606;
|
|
cvt.rmi.f32.f32 %f615, %f614;
|
|
sub.f32 %f616, %f614, %f615;
|
|
fma.rn.f32 %f617, %f609, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f618, %f613, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f619, %f616, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f620, [%rd5+16];
|
|
ld.global.f32 %f621, [%rd5+4];
|
|
fma.rn.f32 %f622, %f620, %f617, %f621;
|
|
ld.global.f32 %f623, [%rd5+8];
|
|
fma.rn.f32 %f624, %f620, %f618, %f623;
|
|
ld.global.f32 %f625, [%rd5+12];
|
|
fma.rn.f32 %f626, %f620, %f619, %f625;
|
|
sub.f32 %f627, %f622, %f10;
|
|
sub.f32 %f628, %f624, %f11;
|
|
sub.f32 %f629, %f626, %f12;
|
|
mul.f32 %f630, %f628, %f628;
|
|
fma.rn.f32 %f631, %f627, %f627, %f630;
|
|
fma.rn.f32 %f632, %f629, %f629, %f631;
|
|
sqrt.rn.f32 %f583, %f632;
|
|
rcp.rn.f32 %f633, %f583;
|
|
mul.f32 %f579, %f633, %f627;
|
|
mul.f32 %f580, %f633, %f628;
|
|
mul.f32 %f581, %f633, %f629;
|
|
mov.f32 %f584, 0f00000000;
|
|
mov.u32 %r241, 2;
|
|
mov.u32 %r243, 1;
|
|
mov.u32 %r244, 1065353216;
|
|
mov.u32 %r275, 0;
|
|
// begin inline asm
|
|
call(%r205,%r206,%r207,%r208,%r209,%r210,%r211,%r212,%r213,%r214,%r215,%r216,%r217,%r218,%r219,%r220,%r221,%r222,%r223,%r224,%r225,%r226,%r227,%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236),_optix_trace_typed_32,(%r275,%rd3,%f13,%f14,%f15,%f579,%f580,%f581,%f99,%f583,%f584,%r243,%r275,%r243,%r241,%r243,%r243,%r244,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275,%r275);
|
|
// end inline asm
|
|
mov.b32 %f634, %r205;
|
|
add.f32 %f1331, %f1331, %f634;
|
|
|
|
$L__BB0_39:
|
|
cvt.rn.f32.s32 %f635, %r11;
|
|
div.rn.f32 %f1338, %f1331, %f635;
|
|
shr.u32 %r276, %r42, 31;
|
|
cvt.u16.u32 %rs64, %r276;
|
|
|
|
$L__BB0_40:
|
|
fma.rn.f32 %f1339, %f1324, %f1338, %f1339;
|
|
fma.rn.f32 %f1340, %f1325, %f1338, %f1340;
|
|
fma.rn.f32 %f1341, %f1326, %f1338, %f1341;
|
|
setp.eq.s32 %p51, %r8, 0;
|
|
@%p51 bra $L__BB0_42;
|
|
|
|
mul.f32 %f636, %f1325, 0f3F372474;
|
|
fma.rn.f32 %f637, %f1324, 0f3E59999A, %f636;
|
|
fma.rn.f32 %f638, %f1326, 0f3D93A92A, %f637;
|
|
fma.rn.f32 %f1342, %f1327, %f638, %f1342;
|
|
fma.rn.f32 %f1343, %f1328, %f638, %f1343;
|
|
fma.rn.f32 %f1344, %f638, %f1329, %f1344;
|
|
|
|
$L__BB0_42:
|
|
setp.eq.s16 %p52, %rs64, 0;
|
|
@%p52 bra $L__BB0_44;
|
|
|
|
div.rn.f32 %f639, %f1324, %f279;
|
|
div.rn.f32 %f640, %f639, %f65;
|
|
cvt.sat.f32.f32 %f641, %f640;
|
|
mul.f32 %f1338, %f1338, %f641;
|
|
|
|
$L__BB0_44:
|
|
add.f32 %f1345, %f1345, %f1338;
|
|
|
|
$L__BB0_45:
|
|
cvt.u64.u32 %rd53, %r413;
|
|
cvt.u32.u64 %r277, %rd53;
|
|
add.s32 %r413, %r277, 1;
|
|
setp.lt.u32 %p53, %r413, %r5;
|
|
@%p53 bra $L__BB0_7;
|
|
bra.uni $L__BB0_47;
|
|
|
|
$L__BB0_46:
|
|
mov.f32 %f1339, 0f00000000;
|
|
ld.const.u32 %r417, [params+104];
|
|
mov.f32 %f1340, %f1339;
|
|
mov.f32 %f1341, %f1339;
|
|
mov.f32 %f1342, %f1339;
|
|
mov.f32 %f1343, %f1339;
|
|
mov.f32 %f1344, %f1339;
|
|
mov.f32 %f1345, %f1339;
|
|
|
|
$L__BB0_47:
|
|
and.b32 %r278, %r417, 8;
|
|
setp.eq.s32 %p54, %r278, 0;
|
|
@%p54 bra $L__BB0_61;
|
|
|
|
cvt.sat.f32.f32 %f134, %f1345;
|
|
ld.const.u64 %rd25, [params+192];
|
|
cvta.to.global.u64 %rd7, %rd25;
|
|
ld.const.u32 %r279, [params+184];
|
|
mad.lo.s32 %r280, %r279, %r4, %r3;
|
|
cvt.u64.u32 %rd8, %r280;
|
|
mov.f32 %f650, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f651, %f650;
|
|
add.f32 %f652, %f651, %f651;
|
|
mov.f32 %f653, 0f3EE8BA2E;
|
|
sub.f32 %f654, %f653, %f652;
|
|
abs.f32 %f135, %f654;
|
|
abs.f32 %f136, %f134;
|
|
setp.lt.f32 %p55, %f136, 0f00800000;
|
|
mul.f32 %f655, %f136, 0f4B800000;
|
|
selp.f32 %f656, %f655, %f136, %p55;
|
|
selp.f32 %f657, 0fC3170000, 0fC2FE0000, %p55;
|
|
mov.b32 %r281, %f656;
|
|
and.b32 %r282, %r281, 8388607;
|
|
or.b32 %r283, %r282, 1065353216;
|
|
mov.b32 %f658, %r283;
|
|
shr.u32 %r284, %r281, 23;
|
|
cvt.rn.f32.u32 %f659, %r284;
|
|
add.f32 %f660, %f657, %f659;
|
|
setp.gt.f32 %p56, %f658, 0f3FB504F3;
|
|
mul.f32 %f661, %f658, 0f3F000000;
|
|
add.f32 %f662, %f660, 0f3F800000;
|
|
selp.f32 %f663, %f662, %f660, %p56;
|
|
selp.f32 %f664, %f661, %f658, %p56;
|
|
add.f32 %f665, %f664, 0fBF800000;
|
|
add.f32 %f666, %f664, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f667, %f666;
|
|
add.f32 %f668, %f665, %f665;
|
|
mul.f32 %f669, %f668, %f667;
|
|
mul.f32 %f670, %f669, %f669;
|
|
mov.f32 %f671, 0f3C4CAF63;
|
|
mov.f32 %f672, 0f3B18F0FE;
|
|
fma.rn.f32 %f673, %f672, %f670, %f671;
|
|
mov.f32 %f674, 0f3DAAAABD;
|
|
fma.rn.f32 %f675, %f673, %f670, %f674;
|
|
mul.rn.f32 %f676, %f675, %f670;
|
|
mul.rn.f32 %f677, %f676, %f669;
|
|
sub.f32 %f678, %f665, %f669;
|
|
add.f32 %f679, %f678, %f678;
|
|
neg.f32 %f680, %f669;
|
|
fma.rn.f32 %f681, %f680, %f665, %f679;
|
|
mul.rn.f32 %f682, %f667, %f681;
|
|
add.f32 %f683, %f677, %f669;
|
|
sub.f32 %f684, %f669, %f683;
|
|
add.f32 %f685, %f677, %f684;
|
|
add.f32 %f686, %f682, %f685;
|
|
add.f32 %f687, %f683, %f686;
|
|
sub.f32 %f688, %f683, %f687;
|
|
add.f32 %f689, %f686, %f688;
|
|
mov.f32 %f690, 0f3F317200;
|
|
mul.rn.f32 %f691, %f663, %f690;
|
|
mov.f32 %f692, 0f35BFBE8E;
|
|
mul.rn.f32 %f693, %f663, %f692;
|
|
add.f32 %f694, %f691, %f687;
|
|
sub.f32 %f695, %f691, %f694;
|
|
add.f32 %f696, %f687, %f695;
|
|
add.f32 %f697, %f689, %f696;
|
|
add.f32 %f698, %f693, %f697;
|
|
add.f32 %f699, %f694, %f698;
|
|
sub.f32 %f700, %f694, %f699;
|
|
add.f32 %f701, %f698, %f700;
|
|
mul.rn.f32 %f702, %f653, %f699;
|
|
neg.f32 %f703, %f702;
|
|
fma.rn.f32 %f704, %f653, %f699, %f703;
|
|
fma.rn.f32 %f705, %f653, %f701, %f704;
|
|
mov.f32 %f706, 0f00000000;
|
|
fma.rn.f32 %f707, %f706, %f699, %f705;
|
|
add.rn.f32 %f708, %f702, %f707;
|
|
neg.f32 %f709, %f708;
|
|
add.rn.f32 %f710, %f702, %f709;
|
|
add.rn.f32 %f711, %f710, %f707;
|
|
mov.b32 %r285, %f708;
|
|
setp.eq.s32 %p57, %r285, 1118925336;
|
|
add.s32 %r286, %r285, -1;
|
|
mov.b32 %f712, %r286;
|
|
add.f32 %f713, %f711, 0f37000000;
|
|
selp.f32 %f137, %f713, %f711, %p57;
|
|
selp.f32 %f714, %f712, %f708, %p57;
|
|
mov.f32 %f715, 0f3FB8AA3B;
|
|
mul.rn.f32 %f716, %f714, %f715;
|
|
cvt.rzi.f32.f32 %f717, %f716;
|
|
abs.f32 %f718, %f717;
|
|
setp.gt.f32 %p58, %f718, 0f42FC0000;
|
|
mov.b32 %r287, %f717;
|
|
and.b32 %r288, %r287, -2147483648;
|
|
or.b32 %r289, %r288, 1123811328;
|
|
mov.b32 %f719, %r289;
|
|
selp.f32 %f720, %f719, %f717, %p58;
|
|
mov.f32 %f721, 0fBF317218;
|
|
fma.rn.f32 %f722, %f720, %f721, %f714;
|
|
mov.f32 %f723, 0f3102E308;
|
|
fma.rn.f32 %f724, %f720, %f723, %f722;
|
|
mul.f32 %f725, %f724, 0f3FB8AA3B;
|
|
add.f32 %f726, %f720, 0f4B40007F;
|
|
mov.b32 %r290, %f726;
|
|
shl.b32 %r291, %r290, 23;
|
|
mov.b32 %f727, %r291;
|
|
ex2.approx.ftz.f32 %f728, %f725;
|
|
mul.f32 %f138, %f728, %f727;
|
|
setp.eq.f32 %p59, %f138, 0f7F800000;
|
|
mov.f32 %f1353, 0f7F800000;
|
|
@%p59 bra $L__BB0_50;
|
|
|
|
fma.rn.f32 %f1353, %f138, %f137, %f138;
|
|
|
|
$L__BB0_50:
|
|
setp.lt.f32 %p60, %f134, 0f00000000;
|
|
setp.eq.f32 %p61, %f135, 0f3F800000;
|
|
and.pred %p3, %p60, %p61;
|
|
setp.eq.f32 %p62, %f134, 0f00000000;
|
|
@%p62 bra $L__BB0_54;
|
|
bra.uni $L__BB0_51;
|
|
|
|
$L__BB0_54:
|
|
add.f32 %f733, %f134, %f134;
|
|
selp.f32 %f1355, %f733, 0f00000000, %p61;
|
|
bra.uni $L__BB0_55;
|
|
|
|
$L__BB0_148:
|
|
mov.f32 %f1299, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f1299;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1299;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1299;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs60, 0;
|
|
st.global.v4.u16 [%rd12], {%rs57, %rs58, %rs59, %rs60};
|
|
|
|
$L__BB0_149:
|
|
and.b32 %r410, %r22, 64;
|
|
setp.eq.s32 %p177, %r410, 0;
|
|
@%p177 bra $L__BB0_151;
|
|
|
|
ld.const.u64 %rd49, [params+208];
|
|
cvta.to.global.u64 %rd50, %rd49;
|
|
ld.const.u32 %r411, [params+200];
|
|
mad.lo.s32 %r412, %r411, %r4, %r3;
|
|
mul.wide.u32 %rd51, %r412, 4;
|
|
add.s64 %rd52, %rd50, %rd51;
|
|
mov.u16 %rs61, 0;
|
|
st.global.v4.u8 [%rd52], {%rs61, %rs61, %rs61, %rs61};
|
|
bra.uni $L__BB0_151;
|
|
|
|
$L__BB0_51:
|
|
mov.b32 %r292, %f1353;
|
|
xor.b32 %r293, %r292, -2147483648;
|
|
mov.b32 %f729, %r293;
|
|
selp.f32 %f1355, %f729, %f1353, %p3;
|
|
setp.geu.f32 %p63, %f134, 0f00000000;
|
|
@%p63 bra $L__BB0_55;
|
|
|
|
mov.f32 %f730, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f731, %f730;
|
|
setp.eq.f32 %p64, %f731, 0f3EE8BA2E;
|
|
@%p64 bra $L__BB0_55;
|
|
|
|
mov.f32 %f1355, 0f7FFFFFFF;
|
|
|
|
$L__BB0_55:
|
|
add.f32 %f734, %f136, 0f3EE8BA2E;
|
|
mov.b32 %r294, %f734;
|
|
setp.lt.s32 %p66, %r294, 2139095040;
|
|
@%p66 bra $L__BB0_60;
|
|
|
|
setp.gtu.f32 %p67, %f136, 0f7F800000;
|
|
@%p67 bra $L__BB0_59;
|
|
bra.uni $L__BB0_57;
|
|
|
|
$L__BB0_59:
|
|
add.f32 %f1355, %f134, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_57:
|
|
setp.neu.f32 %p68, %f136, 0f7F800000;
|
|
@%p68 bra $L__BB0_60;
|
|
|
|
selp.f32 %f1355, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_60:
|
|
mul.f32 %f735, %f1355, 0f437F0000;
|
|
setp.eq.f32 %p69, %f134, 0f3F800000;
|
|
selp.f32 %f736, 0f437F0000, %f735, %p69;
|
|
cvt.rzi.u32.f32 %r295, %f736;
|
|
shl.b64 %rd26, %rd8, 1;
|
|
add.s64 %rd27, %rd7, %rd26;
|
|
cvt.u16.u32 %rs18, %r295;
|
|
mov.u16 %rs19, 255;
|
|
st.global.v2.u8 [%rd27], {%rs18, %rs19};
|
|
|
|
$L__BB0_61:
|
|
and.b32 %r296, %r417, 1;
|
|
setp.eq.b32 %p70, %r296, 1;
|
|
mov.pred %p71, 0;
|
|
xor.pred %p72, %p70, %p71;
|
|
not.pred %p73, %p72;
|
|
@%p73 bra $L__BB0_135;
|
|
|
|
mov.f32 %f738, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f739, %f738;
|
|
add.f32 %f740, %f739, %f739;
|
|
mov.f32 %f741, 0f3EE66666;
|
|
sub.f32 %f742, %f741, %f740;
|
|
abs.f32 %f147, %f742;
|
|
abs.f32 %f148, %f1339;
|
|
setp.lt.f32 %p74, %f148, 0f00800000;
|
|
mul.f32 %f743, %f148, 0f4B800000;
|
|
selp.f32 %f744, %f743, %f148, %p74;
|
|
selp.f32 %f745, 0fC3170000, 0fC2FE0000, %p74;
|
|
mov.b32 %r297, %f744;
|
|
and.b32 %r298, %r297, 8388607;
|
|
or.b32 %r299, %r298, 1065353216;
|
|
mov.b32 %f746, %r299;
|
|
shr.u32 %r300, %r297, 23;
|
|
cvt.rn.f32.u32 %f747, %r300;
|
|
add.f32 %f748, %f745, %f747;
|
|
setp.gt.f32 %p75, %f746, 0f3FB504F3;
|
|
mul.f32 %f749, %f746, 0f3F000000;
|
|
add.f32 %f750, %f748, 0f3F800000;
|
|
selp.f32 %f751, %f750, %f748, %p75;
|
|
selp.f32 %f752, %f749, %f746, %p75;
|
|
add.f32 %f753, %f752, 0fBF800000;
|
|
add.f32 %f754, %f752, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f755, %f754;
|
|
add.f32 %f756, %f753, %f753;
|
|
mul.f32 %f757, %f756, %f755;
|
|
mul.f32 %f758, %f757, %f757;
|
|
mov.f32 %f759, 0f3C4CAF63;
|
|
mov.f32 %f760, 0f3B18F0FE;
|
|
fma.rn.f32 %f761, %f760, %f758, %f759;
|
|
mov.f32 %f762, 0f3DAAAABD;
|
|
fma.rn.f32 %f763, %f761, %f758, %f762;
|
|
mul.rn.f32 %f764, %f763, %f758;
|
|
mul.rn.f32 %f765, %f764, %f757;
|
|
sub.f32 %f766, %f753, %f757;
|
|
add.f32 %f767, %f766, %f766;
|
|
neg.f32 %f768, %f757;
|
|
fma.rn.f32 %f769, %f768, %f753, %f767;
|
|
mul.rn.f32 %f770, %f755, %f769;
|
|
add.f32 %f771, %f765, %f757;
|
|
sub.f32 %f772, %f757, %f771;
|
|
add.f32 %f773, %f765, %f772;
|
|
add.f32 %f774, %f770, %f773;
|
|
add.f32 %f775, %f771, %f774;
|
|
sub.f32 %f776, %f771, %f775;
|
|
add.f32 %f777, %f774, %f776;
|
|
mov.f32 %f778, 0f3F317200;
|
|
mul.rn.f32 %f779, %f751, %f778;
|
|
mov.f32 %f780, 0f35BFBE8E;
|
|
mul.rn.f32 %f781, %f751, %f780;
|
|
add.f32 %f782, %f779, %f775;
|
|
sub.f32 %f783, %f779, %f782;
|
|
add.f32 %f784, %f775, %f783;
|
|
add.f32 %f785, %f777, %f784;
|
|
add.f32 %f786, %f781, %f785;
|
|
add.f32 %f787, %f782, %f786;
|
|
sub.f32 %f788, %f782, %f787;
|
|
add.f32 %f789, %f786, %f788;
|
|
mul.rn.f32 %f790, %f741, %f787;
|
|
neg.f32 %f791, %f790;
|
|
fma.rn.f32 %f792, %f741, %f787, %f791;
|
|
fma.rn.f32 %f793, %f741, %f789, %f792;
|
|
mov.f32 %f794, 0f00000000;
|
|
fma.rn.f32 %f795, %f794, %f787, %f793;
|
|
add.rn.f32 %f796, %f790, %f795;
|
|
neg.f32 %f797, %f796;
|
|
add.rn.f32 %f798, %f790, %f797;
|
|
add.rn.f32 %f799, %f798, %f795;
|
|
mov.b32 %r301, %f796;
|
|
setp.eq.s32 %p76, %r301, 1118925336;
|
|
add.s32 %r302, %r301, -1;
|
|
mov.b32 %f800, %r302;
|
|
add.f32 %f801, %f799, 0f37000000;
|
|
selp.f32 %f149, %f801, %f799, %p76;
|
|
selp.f32 %f802, %f800, %f796, %p76;
|
|
mov.f32 %f803, 0f3FB8AA3B;
|
|
mul.rn.f32 %f804, %f802, %f803;
|
|
cvt.rzi.f32.f32 %f805, %f804;
|
|
abs.f32 %f806, %f805;
|
|
setp.gt.f32 %p77, %f806, 0f42FC0000;
|
|
mov.b32 %r303, %f805;
|
|
and.b32 %r304, %r303, -2147483648;
|
|
or.b32 %r305, %r304, 1123811328;
|
|
mov.b32 %f807, %r305;
|
|
selp.f32 %f808, %f807, %f805, %p77;
|
|
mov.f32 %f809, 0fBF317218;
|
|
fma.rn.f32 %f810, %f808, %f809, %f802;
|
|
mov.f32 %f811, 0f3102E308;
|
|
fma.rn.f32 %f812, %f808, %f811, %f810;
|
|
mul.f32 %f813, %f812, 0f3FB8AA3B;
|
|
add.f32 %f814, %f808, 0f4B40007F;
|
|
mov.b32 %r306, %f814;
|
|
shl.b32 %r307, %r306, 23;
|
|
mov.b32 %f815, %r307;
|
|
ex2.approx.ftz.f32 %f816, %f813;
|
|
mul.f32 %f150, %f816, %f815;
|
|
setp.eq.f32 %p78, %f150, 0f7F800000;
|
|
mov.f32 %f1356, 0f7F800000;
|
|
@%p78 bra $L__BB0_64;
|
|
|
|
fma.rn.f32 %f1356, %f150, %f149, %f150;
|
|
|
|
$L__BB0_64:
|
|
setp.lt.f32 %p79, %f1339, 0f00000000;
|
|
setp.eq.f32 %p80, %f147, 0f3F800000;
|
|
and.pred %p4, %p79, %p80;
|
|
setp.eq.f32 %p81, %f1339, 0f00000000;
|
|
@%p81 bra $L__BB0_68;
|
|
bra.uni $L__BB0_65;
|
|
|
|
$L__BB0_68:
|
|
add.f32 %f821, %f1339, %f1339;
|
|
selp.f32 %f1358, %f821, 0f00000000, %p80;
|
|
bra.uni $L__BB0_69;
|
|
|
|
$L__BB0_65:
|
|
mov.b32 %r308, %f1356;
|
|
xor.b32 %r309, %r308, -2147483648;
|
|
mov.b32 %f817, %r309;
|
|
selp.f32 %f1358, %f817, %f1356, %p4;
|
|
setp.geu.f32 %p82, %f1339, 0f00000000;
|
|
@%p82 bra $L__BB0_69;
|
|
|
|
mov.f32 %f818, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f819, %f818;
|
|
setp.eq.f32 %p83, %f819, 0f3EE66666;
|
|
@%p83 bra $L__BB0_69;
|
|
|
|
mov.f32 %f1358, 0f7FFFFFFF;
|
|
|
|
$L__BB0_69:
|
|
add.f32 %f822, %f148, 0f3EE66666;
|
|
mov.b32 %r310, %f822;
|
|
setp.lt.s32 %p85, %r310, 2139095040;
|
|
@%p85 bra $L__BB0_74;
|
|
|
|
setp.gtu.f32 %p86, %f148, 0f7F800000;
|
|
@%p86 bra $L__BB0_73;
|
|
bra.uni $L__BB0_71;
|
|
|
|
$L__BB0_73:
|
|
add.f32 %f1358, %f1339, 0f3EE66666;
|
|
bra.uni $L__BB0_74;
|
|
|
|
$L__BB0_71:
|
|
setp.neu.f32 %p87, %f148, 0f7F800000;
|
|
@%p87 bra $L__BB0_74;
|
|
|
|
selp.f32 %f1358, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_74:
|
|
setp.eq.f32 %p88, %f1339, 0f3F800000;
|
|
selp.f32 %f159, 0f3F800000, %f1358, %p88;
|
|
abs.f32 %f160, %f1340;
|
|
setp.lt.f32 %p89, %f160, 0f00800000;
|
|
mul.f32 %f824, %f160, 0f4B800000;
|
|
selp.f32 %f825, %f824, %f160, %p89;
|
|
selp.f32 %f826, 0fC3170000, 0fC2FE0000, %p89;
|
|
mov.b32 %r311, %f825;
|
|
and.b32 %r312, %r311, 8388607;
|
|
or.b32 %r313, %r312, 1065353216;
|
|
mov.b32 %f827, %r313;
|
|
shr.u32 %r314, %r311, 23;
|
|
cvt.rn.f32.u32 %f828, %r314;
|
|
add.f32 %f829, %f826, %f828;
|
|
setp.gt.f32 %p90, %f827, 0f3FB504F3;
|
|
mul.f32 %f830, %f827, 0f3F000000;
|
|
add.f32 %f831, %f829, 0f3F800000;
|
|
selp.f32 %f832, %f831, %f829, %p90;
|
|
selp.f32 %f833, %f830, %f827, %p90;
|
|
add.f32 %f834, %f833, 0fBF800000;
|
|
add.f32 %f835, %f833, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f836, %f835;
|
|
add.f32 %f837, %f834, %f834;
|
|
mul.f32 %f838, %f837, %f836;
|
|
mul.f32 %f839, %f838, %f838;
|
|
mov.f32 %f840, 0f3C4CAF63;
|
|
mov.f32 %f841, 0f3B18F0FE;
|
|
fma.rn.f32 %f842, %f841, %f839, %f840;
|
|
mov.f32 %f843, 0f3DAAAABD;
|
|
fma.rn.f32 %f844, %f842, %f839, %f843;
|
|
mul.rn.f32 %f845, %f844, %f839;
|
|
mul.rn.f32 %f846, %f845, %f838;
|
|
sub.f32 %f847, %f834, %f838;
|
|
add.f32 %f848, %f847, %f847;
|
|
neg.f32 %f849, %f838;
|
|
fma.rn.f32 %f850, %f849, %f834, %f848;
|
|
mul.rn.f32 %f851, %f836, %f850;
|
|
add.f32 %f852, %f846, %f838;
|
|
sub.f32 %f853, %f838, %f852;
|
|
add.f32 %f854, %f846, %f853;
|
|
add.f32 %f855, %f851, %f854;
|
|
add.f32 %f856, %f852, %f855;
|
|
sub.f32 %f857, %f852, %f856;
|
|
add.f32 %f858, %f855, %f857;
|
|
mov.f32 %f859, 0f3F317200;
|
|
mul.rn.f32 %f860, %f832, %f859;
|
|
mov.f32 %f861, 0f35BFBE8E;
|
|
mul.rn.f32 %f862, %f832, %f861;
|
|
add.f32 %f863, %f860, %f856;
|
|
sub.f32 %f864, %f860, %f863;
|
|
add.f32 %f865, %f856, %f864;
|
|
add.f32 %f866, %f858, %f865;
|
|
add.f32 %f867, %f862, %f866;
|
|
add.f32 %f868, %f863, %f867;
|
|
sub.f32 %f869, %f863, %f868;
|
|
add.f32 %f870, %f867, %f869;
|
|
mov.f32 %f871, 0f3EE66666;
|
|
mul.rn.f32 %f872, %f871, %f868;
|
|
neg.f32 %f873, %f872;
|
|
fma.rn.f32 %f874, %f871, %f868, %f873;
|
|
fma.rn.f32 %f875, %f871, %f870, %f874;
|
|
mov.f32 %f876, 0f00000000;
|
|
fma.rn.f32 %f877, %f876, %f868, %f875;
|
|
add.rn.f32 %f878, %f872, %f877;
|
|
neg.f32 %f879, %f878;
|
|
add.rn.f32 %f880, %f872, %f879;
|
|
add.rn.f32 %f881, %f880, %f877;
|
|
mov.b32 %r315, %f878;
|
|
setp.eq.s32 %p91, %r315, 1118925336;
|
|
add.s32 %r316, %r315, -1;
|
|
mov.b32 %f882, %r316;
|
|
add.f32 %f883, %f881, 0f37000000;
|
|
selp.f32 %f161, %f883, %f881, %p91;
|
|
selp.f32 %f884, %f882, %f878, %p91;
|
|
mov.f32 %f885, 0f3FB8AA3B;
|
|
mul.rn.f32 %f886, %f884, %f885;
|
|
cvt.rzi.f32.f32 %f887, %f886;
|
|
abs.f32 %f888, %f887;
|
|
setp.gt.f32 %p92, %f888, 0f42FC0000;
|
|
mov.b32 %r317, %f887;
|
|
and.b32 %r318, %r317, -2147483648;
|
|
or.b32 %r319, %r318, 1123811328;
|
|
mov.b32 %f889, %r319;
|
|
selp.f32 %f890, %f889, %f887, %p92;
|
|
mov.f32 %f891, 0fBF317218;
|
|
fma.rn.f32 %f892, %f890, %f891, %f884;
|
|
mov.f32 %f893, 0f3102E308;
|
|
fma.rn.f32 %f894, %f890, %f893, %f892;
|
|
mul.f32 %f895, %f894, 0f3FB8AA3B;
|
|
add.f32 %f896, %f890, 0f4B40007F;
|
|
mov.b32 %r320, %f896;
|
|
shl.b32 %r321, %r320, 23;
|
|
mov.b32 %f897, %r321;
|
|
ex2.approx.ftz.f32 %f898, %f895;
|
|
mul.f32 %f162, %f898, %f897;
|
|
setp.eq.f32 %p93, %f162, 0f7F800000;
|
|
mov.f32 %f1359, 0f7F800000;
|
|
@%p93 bra $L__BB0_76;
|
|
|
|
fma.rn.f32 %f1359, %f162, %f161, %f162;
|
|
|
|
$L__BB0_76:
|
|
setp.lt.f32 %p94, %f1340, 0f00000000;
|
|
and.pred %p5, %p94, %p80;
|
|
setp.eq.f32 %p96, %f1340, 0f00000000;
|
|
@%p96 bra $L__BB0_80;
|
|
bra.uni $L__BB0_77;
|
|
|
|
$L__BB0_80:
|
|
add.f32 %f903, %f1340, %f1340;
|
|
selp.f32 %f1361, %f903, 0f00000000, %p80;
|
|
bra.uni $L__BB0_81;
|
|
|
|
$L__BB0_77:
|
|
mov.b32 %r322, %f1359;
|
|
xor.b32 %r323, %r322, -2147483648;
|
|
mov.b32 %f899, %r323;
|
|
selp.f32 %f1361, %f899, %f1359, %p5;
|
|
setp.geu.f32 %p97, %f1340, 0f00000000;
|
|
@%p97 bra $L__BB0_81;
|
|
|
|
mov.f32 %f900, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f901, %f900;
|
|
setp.eq.f32 %p98, %f901, 0f3EE66666;
|
|
@%p98 bra $L__BB0_81;
|
|
|
|
mov.f32 %f1361, 0f7FFFFFFF;
|
|
|
|
$L__BB0_81:
|
|
add.f32 %f904, %f160, 0f3EE66666;
|
|
mov.b32 %r324, %f904;
|
|
setp.lt.s32 %p100, %r324, 2139095040;
|
|
@%p100 bra $L__BB0_86;
|
|
|
|
setp.gtu.f32 %p101, %f160, 0f7F800000;
|
|
@%p101 bra $L__BB0_85;
|
|
bra.uni $L__BB0_83;
|
|
|
|
$L__BB0_85:
|
|
add.f32 %f1361, %f1340, 0f3EE66666;
|
|
bra.uni $L__BB0_86;
|
|
|
|
$L__BB0_83:
|
|
setp.neu.f32 %p102, %f160, 0f7F800000;
|
|
@%p102 bra $L__BB0_86;
|
|
|
|
selp.f32 %f1361, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_86:
|
|
setp.eq.f32 %p103, %f1340, 0f3F800000;
|
|
selp.f32 %f171, 0f3F800000, %f1361, %p103;
|
|
abs.f32 %f172, %f1341;
|
|
setp.lt.f32 %p104, %f172, 0f00800000;
|
|
mul.f32 %f906, %f172, 0f4B800000;
|
|
selp.f32 %f907, %f906, %f172, %p104;
|
|
selp.f32 %f908, 0fC3170000, 0fC2FE0000, %p104;
|
|
mov.b32 %r325, %f907;
|
|
and.b32 %r326, %r325, 8388607;
|
|
or.b32 %r327, %r326, 1065353216;
|
|
mov.b32 %f909, %r327;
|
|
shr.u32 %r328, %r325, 23;
|
|
cvt.rn.f32.u32 %f910, %r328;
|
|
add.f32 %f911, %f908, %f910;
|
|
setp.gt.f32 %p105, %f909, 0f3FB504F3;
|
|
mul.f32 %f912, %f909, 0f3F000000;
|
|
add.f32 %f913, %f911, 0f3F800000;
|
|
selp.f32 %f914, %f913, %f911, %p105;
|
|
selp.f32 %f915, %f912, %f909, %p105;
|
|
add.f32 %f916, %f915, 0fBF800000;
|
|
add.f32 %f917, %f915, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f918, %f917;
|
|
add.f32 %f919, %f916, %f916;
|
|
mul.f32 %f920, %f919, %f918;
|
|
mul.f32 %f921, %f920, %f920;
|
|
mov.f32 %f922, 0f3C4CAF63;
|
|
mov.f32 %f923, 0f3B18F0FE;
|
|
fma.rn.f32 %f924, %f923, %f921, %f922;
|
|
mov.f32 %f925, 0f3DAAAABD;
|
|
fma.rn.f32 %f926, %f924, %f921, %f925;
|
|
mul.rn.f32 %f927, %f926, %f921;
|
|
mul.rn.f32 %f928, %f927, %f920;
|
|
sub.f32 %f929, %f916, %f920;
|
|
add.f32 %f930, %f929, %f929;
|
|
neg.f32 %f931, %f920;
|
|
fma.rn.f32 %f932, %f931, %f916, %f930;
|
|
mul.rn.f32 %f933, %f918, %f932;
|
|
add.f32 %f934, %f928, %f920;
|
|
sub.f32 %f935, %f920, %f934;
|
|
add.f32 %f936, %f928, %f935;
|
|
add.f32 %f937, %f933, %f936;
|
|
add.f32 %f938, %f934, %f937;
|
|
sub.f32 %f939, %f934, %f938;
|
|
add.f32 %f940, %f937, %f939;
|
|
mov.f32 %f941, 0f3F317200;
|
|
mul.rn.f32 %f942, %f914, %f941;
|
|
mov.f32 %f943, 0f35BFBE8E;
|
|
mul.rn.f32 %f944, %f914, %f943;
|
|
add.f32 %f945, %f942, %f938;
|
|
sub.f32 %f946, %f942, %f945;
|
|
add.f32 %f947, %f938, %f946;
|
|
add.f32 %f948, %f940, %f947;
|
|
add.f32 %f949, %f944, %f948;
|
|
add.f32 %f950, %f945, %f949;
|
|
sub.f32 %f951, %f945, %f950;
|
|
add.f32 %f952, %f949, %f951;
|
|
mov.f32 %f953, 0f3EE66666;
|
|
mul.rn.f32 %f954, %f953, %f950;
|
|
neg.f32 %f955, %f954;
|
|
fma.rn.f32 %f956, %f953, %f950, %f955;
|
|
fma.rn.f32 %f957, %f953, %f952, %f956;
|
|
mov.f32 %f958, 0f00000000;
|
|
fma.rn.f32 %f959, %f958, %f950, %f957;
|
|
add.rn.f32 %f960, %f954, %f959;
|
|
neg.f32 %f961, %f960;
|
|
add.rn.f32 %f962, %f954, %f961;
|
|
add.rn.f32 %f963, %f962, %f959;
|
|
mov.b32 %r329, %f960;
|
|
setp.eq.s32 %p106, %r329, 1118925336;
|
|
add.s32 %r330, %r329, -1;
|
|
mov.b32 %f964, %r330;
|
|
add.f32 %f965, %f963, 0f37000000;
|
|
selp.f32 %f173, %f965, %f963, %p106;
|
|
selp.f32 %f966, %f964, %f960, %p106;
|
|
mov.f32 %f967, 0f3FB8AA3B;
|
|
mul.rn.f32 %f968, %f966, %f967;
|
|
cvt.rzi.f32.f32 %f969, %f968;
|
|
abs.f32 %f970, %f969;
|
|
setp.gt.f32 %p107, %f970, 0f42FC0000;
|
|
mov.b32 %r331, %f969;
|
|
and.b32 %r332, %r331, -2147483648;
|
|
or.b32 %r333, %r332, 1123811328;
|
|
mov.b32 %f971, %r333;
|
|
selp.f32 %f972, %f971, %f969, %p107;
|
|
mov.f32 %f973, 0fBF317218;
|
|
fma.rn.f32 %f974, %f972, %f973, %f966;
|
|
mov.f32 %f975, 0f3102E308;
|
|
fma.rn.f32 %f976, %f972, %f975, %f974;
|
|
mul.f32 %f977, %f976, 0f3FB8AA3B;
|
|
add.f32 %f978, %f972, 0f4B40007F;
|
|
mov.b32 %r334, %f978;
|
|
shl.b32 %r335, %r334, 23;
|
|
mov.b32 %f979, %r335;
|
|
ex2.approx.ftz.f32 %f980, %f977;
|
|
mul.f32 %f174, %f980, %f979;
|
|
setp.eq.f32 %p108, %f174, 0f7F800000;
|
|
mov.f32 %f1362, 0f7F800000;
|
|
@%p108 bra $L__BB0_88;
|
|
|
|
fma.rn.f32 %f1362, %f174, %f173, %f174;
|
|
|
|
$L__BB0_88:
|
|
setp.lt.f32 %p109, %f1341, 0f00000000;
|
|
and.pred %p6, %p109, %p80;
|
|
setp.eq.f32 %p111, %f1341, 0f00000000;
|
|
@%p111 bra $L__BB0_92;
|
|
bra.uni $L__BB0_89;
|
|
|
|
$L__BB0_92:
|
|
add.f32 %f985, %f1341, %f1341;
|
|
selp.f32 %f1364, %f985, 0f00000000, %p80;
|
|
bra.uni $L__BB0_93;
|
|
|
|
$L__BB0_89:
|
|
mov.b32 %r336, %f1362;
|
|
xor.b32 %r337, %r336, -2147483648;
|
|
mov.b32 %f981, %r337;
|
|
selp.f32 %f1364, %f981, %f1362, %p6;
|
|
setp.geu.f32 %p112, %f1341, 0f00000000;
|
|
@%p112 bra $L__BB0_93;
|
|
|
|
mov.f32 %f982, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f983, %f982;
|
|
setp.eq.f32 %p113, %f983, 0f3EE66666;
|
|
@%p113 bra $L__BB0_93;
|
|
|
|
mov.f32 %f1364, 0f7FFFFFFF;
|
|
|
|
$L__BB0_93:
|
|
add.f32 %f986, %f172, 0f3EE66666;
|
|
mov.b32 %r338, %f986;
|
|
setp.lt.s32 %p115, %r338, 2139095040;
|
|
@%p115 bra $L__BB0_98;
|
|
|
|
setp.gtu.f32 %p116, %f172, 0f7F800000;
|
|
@%p116 bra $L__BB0_97;
|
|
bra.uni $L__BB0_95;
|
|
|
|
$L__BB0_97:
|
|
add.f32 %f1364, %f1341, 0f3EE66666;
|
|
bra.uni $L__BB0_98;
|
|
|
|
$L__BB0_95:
|
|
setp.neu.f32 %p117, %f172, 0f7F800000;
|
|
@%p117 bra $L__BB0_98;
|
|
|
|
selp.f32 %f1364, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_98:
|
|
setp.eq.f32 %p118, %f1341, 0f3F800000;
|
|
mov.f32 %f988, 0f3F800000;
|
|
selp.f32 %f989, 0f3F800000, %f1364, %p118;
|
|
ld.const.u64 %rd28, [params+144];
|
|
cvta.to.global.u64 %rd9, %rd28;
|
|
ld.const.u32 %r339, [params+136];
|
|
mad.lo.s32 %r340, %r339, %r4, %r3;
|
|
cvt.u64.u32 %rd10, %r340;
|
|
min.f32 %f990, %f159, %f988;
|
|
mov.f32 %f991, 0f00000000;
|
|
max.f32 %f183, %f991, %f990;
|
|
min.f32 %f992, %f171, %f988;
|
|
max.f32 %f184, %f991, %f992;
|
|
min.f32 %f993, %f989, %f988;
|
|
max.f32 %f185, %f991, %f993;
|
|
mov.f32 %f994, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f995, %f994;
|
|
add.f32 %f996, %f995, %f995;
|
|
mov.f32 %f997, 0f3ED55555;
|
|
sub.f32 %f998, %f997, %f996;
|
|
abs.f32 %f186, %f998;
|
|
abs.f32 %f187, %f183;
|
|
setp.lt.f32 %p119, %f187, 0f00800000;
|
|
mul.f32 %f999, %f187, 0f4B800000;
|
|
selp.f32 %f1000, %f999, %f187, %p119;
|
|
selp.f32 %f1001, 0fC3170000, 0fC2FE0000, %p119;
|
|
mov.b32 %r341, %f1000;
|
|
and.b32 %r342, %r341, 8388607;
|
|
or.b32 %r343, %r342, 1065353216;
|
|
mov.b32 %f1002, %r343;
|
|
shr.u32 %r344, %r341, 23;
|
|
cvt.rn.f32.u32 %f1003, %r344;
|
|
add.f32 %f1004, %f1001, %f1003;
|
|
setp.gt.f32 %p120, %f1002, 0f3FB504F3;
|
|
mul.f32 %f1005, %f1002, 0f3F000000;
|
|
add.f32 %f1006, %f1004, 0f3F800000;
|
|
selp.f32 %f1007, %f1006, %f1004, %p120;
|
|
selp.f32 %f1008, %f1005, %f1002, %p120;
|
|
add.f32 %f1009, %f1008, 0fBF800000;
|
|
add.f32 %f1010, %f1008, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1011, %f1010;
|
|
add.f32 %f1012, %f1009, %f1009;
|
|
mul.f32 %f1013, %f1012, %f1011;
|
|
mul.f32 %f1014, %f1013, %f1013;
|
|
mov.f32 %f1015, 0f3C4CAF63;
|
|
mov.f32 %f1016, 0f3B18F0FE;
|
|
fma.rn.f32 %f1017, %f1016, %f1014, %f1015;
|
|
mov.f32 %f1018, 0f3DAAAABD;
|
|
fma.rn.f32 %f1019, %f1017, %f1014, %f1018;
|
|
mul.rn.f32 %f1020, %f1019, %f1014;
|
|
mul.rn.f32 %f1021, %f1020, %f1013;
|
|
sub.f32 %f1022, %f1009, %f1013;
|
|
add.f32 %f1023, %f1022, %f1022;
|
|
neg.f32 %f1024, %f1013;
|
|
fma.rn.f32 %f1025, %f1024, %f1009, %f1023;
|
|
mul.rn.f32 %f1026, %f1011, %f1025;
|
|
add.f32 %f1027, %f1021, %f1013;
|
|
sub.f32 %f1028, %f1013, %f1027;
|
|
add.f32 %f1029, %f1021, %f1028;
|
|
add.f32 %f1030, %f1026, %f1029;
|
|
add.f32 %f1031, %f1027, %f1030;
|
|
sub.f32 %f1032, %f1027, %f1031;
|
|
add.f32 %f1033, %f1030, %f1032;
|
|
mov.f32 %f1034, 0f3F317200;
|
|
mul.rn.f32 %f1035, %f1007, %f1034;
|
|
mov.f32 %f1036, 0f35BFBE8E;
|
|
mul.rn.f32 %f1037, %f1007, %f1036;
|
|
add.f32 %f1038, %f1035, %f1031;
|
|
sub.f32 %f1039, %f1035, %f1038;
|
|
add.f32 %f1040, %f1031, %f1039;
|
|
add.f32 %f1041, %f1033, %f1040;
|
|
add.f32 %f1042, %f1037, %f1041;
|
|
add.f32 %f1043, %f1038, %f1042;
|
|
sub.f32 %f1044, %f1038, %f1043;
|
|
add.f32 %f1045, %f1042, %f1044;
|
|
mul.rn.f32 %f1046, %f997, %f1043;
|
|
neg.f32 %f1047, %f1046;
|
|
fma.rn.f32 %f1048, %f997, %f1043, %f1047;
|
|
fma.rn.f32 %f1049, %f997, %f1045, %f1048;
|
|
fma.rn.f32 %f1050, %f991, %f1043, %f1049;
|
|
add.rn.f32 %f1051, %f1046, %f1050;
|
|
neg.f32 %f1052, %f1051;
|
|
add.rn.f32 %f1053, %f1046, %f1052;
|
|
add.rn.f32 %f1054, %f1053, %f1050;
|
|
mov.b32 %r345, %f1051;
|
|
setp.eq.s32 %p121, %r345, 1118925336;
|
|
add.s32 %r346, %r345, -1;
|
|
mov.b32 %f1055, %r346;
|
|
add.f32 %f1056, %f1054, 0f37000000;
|
|
selp.f32 %f188, %f1056, %f1054, %p121;
|
|
selp.f32 %f1057, %f1055, %f1051, %p121;
|
|
mov.f32 %f1058, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1059, %f1057, %f1058;
|
|
cvt.rzi.f32.f32 %f1060, %f1059;
|
|
abs.f32 %f1061, %f1060;
|
|
setp.gt.f32 %p122, %f1061, 0f42FC0000;
|
|
mov.b32 %r347, %f1060;
|
|
and.b32 %r348, %r347, -2147483648;
|
|
or.b32 %r349, %r348, 1123811328;
|
|
mov.b32 %f1062, %r349;
|
|
selp.f32 %f1063, %f1062, %f1060, %p122;
|
|
mov.f32 %f1064, 0fBF317218;
|
|
fma.rn.f32 %f1065, %f1063, %f1064, %f1057;
|
|
mov.f32 %f1066, 0f3102E308;
|
|
fma.rn.f32 %f1067, %f1063, %f1066, %f1065;
|
|
mul.f32 %f1068, %f1067, 0f3FB8AA3B;
|
|
add.f32 %f1069, %f1063, 0f4B40007F;
|
|
mov.b32 %r350, %f1069;
|
|
shl.b32 %r351, %r350, 23;
|
|
mov.b32 %f1070, %r351;
|
|
ex2.approx.ftz.f32 %f1071, %f1068;
|
|
mul.f32 %f189, %f1071, %f1070;
|
|
setp.eq.f32 %p123, %f189, 0f7F800000;
|
|
mov.f32 %f1365, 0f7F800000;
|
|
@%p123 bra $L__BB0_100;
|
|
|
|
fma.rn.f32 %f1365, %f189, %f188, %f189;
|
|
|
|
$L__BB0_100:
|
|
setp.lt.f32 %p124, %f183, 0f00000000;
|
|
setp.eq.f32 %p125, %f186, 0f3F800000;
|
|
and.pred %p7, %p124, %p125;
|
|
setp.eq.f32 %p126, %f183, 0f00000000;
|
|
@%p126 bra $L__BB0_104;
|
|
bra.uni $L__BB0_101;
|
|
|
|
$L__BB0_104:
|
|
add.f32 %f1076, %f183, %f183;
|
|
selp.f32 %f1367, %f1076, 0f00000000, %p125;
|
|
bra.uni $L__BB0_105;
|
|
|
|
$L__BB0_101:
|
|
mov.b32 %r352, %f1365;
|
|
xor.b32 %r353, %r352, -2147483648;
|
|
mov.b32 %f1072, %r353;
|
|
selp.f32 %f1367, %f1072, %f1365, %p7;
|
|
setp.geu.f32 %p127, %f183, 0f00000000;
|
|
@%p127 bra $L__BB0_105;
|
|
|
|
mov.f32 %f1073, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1074, %f1073;
|
|
setp.eq.f32 %p128, %f1074, 0f3ED55555;
|
|
@%p128 bra $L__BB0_105;
|
|
|
|
mov.f32 %f1367, 0f7FFFFFFF;
|
|
|
|
$L__BB0_105:
|
|
add.f32 %f1077, %f187, 0f3ED55555;
|
|
mov.b32 %r354, %f1077;
|
|
setp.lt.s32 %p130, %r354, 2139095040;
|
|
@%p130 bra $L__BB0_110;
|
|
|
|
setp.gtu.f32 %p131, %f187, 0f7F800000;
|
|
@%p131 bra $L__BB0_109;
|
|
bra.uni $L__BB0_107;
|
|
|
|
$L__BB0_109:
|
|
add.f32 %f1367, %f183, 0f3ED55555;
|
|
bra.uni $L__BB0_110;
|
|
|
|
$L__BB0_107:
|
|
setp.neu.f32 %p132, %f187, 0f7F800000;
|
|
@%p132 bra $L__BB0_110;
|
|
|
|
selp.f32 %f1367, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_110:
|
|
abs.f32 %f198, %f184;
|
|
setp.lt.f32 %p133, %f198, 0f00800000;
|
|
mul.f32 %f1079, %f198, 0f4B800000;
|
|
selp.f32 %f1080, %f1079, %f198, %p133;
|
|
selp.f32 %f1081, 0fC3170000, 0fC2FE0000, %p133;
|
|
mov.b32 %r355, %f1080;
|
|
and.b32 %r356, %r355, 8388607;
|
|
or.b32 %r357, %r356, 1065353216;
|
|
mov.b32 %f1082, %r357;
|
|
shr.u32 %r358, %r355, 23;
|
|
cvt.rn.f32.u32 %f1083, %r358;
|
|
add.f32 %f1084, %f1081, %f1083;
|
|
setp.gt.f32 %p134, %f1082, 0f3FB504F3;
|
|
mul.f32 %f1085, %f1082, 0f3F000000;
|
|
add.f32 %f1086, %f1084, 0f3F800000;
|
|
selp.f32 %f1087, %f1086, %f1084, %p134;
|
|
selp.f32 %f1088, %f1085, %f1082, %p134;
|
|
add.f32 %f1089, %f1088, 0fBF800000;
|
|
add.f32 %f1090, %f1088, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1091, %f1090;
|
|
add.f32 %f1092, %f1089, %f1089;
|
|
mul.f32 %f1093, %f1092, %f1091;
|
|
mul.f32 %f1094, %f1093, %f1093;
|
|
mov.f32 %f1095, 0f3C4CAF63;
|
|
mov.f32 %f1096, 0f3B18F0FE;
|
|
fma.rn.f32 %f1097, %f1096, %f1094, %f1095;
|
|
mov.f32 %f1098, 0f3DAAAABD;
|
|
fma.rn.f32 %f1099, %f1097, %f1094, %f1098;
|
|
mul.rn.f32 %f1100, %f1099, %f1094;
|
|
mul.rn.f32 %f1101, %f1100, %f1093;
|
|
sub.f32 %f1102, %f1089, %f1093;
|
|
add.f32 %f1103, %f1102, %f1102;
|
|
neg.f32 %f1104, %f1093;
|
|
fma.rn.f32 %f1105, %f1104, %f1089, %f1103;
|
|
mul.rn.f32 %f1106, %f1091, %f1105;
|
|
add.f32 %f1107, %f1101, %f1093;
|
|
sub.f32 %f1108, %f1093, %f1107;
|
|
add.f32 %f1109, %f1101, %f1108;
|
|
add.f32 %f1110, %f1106, %f1109;
|
|
add.f32 %f1111, %f1107, %f1110;
|
|
sub.f32 %f1112, %f1107, %f1111;
|
|
add.f32 %f1113, %f1110, %f1112;
|
|
mov.f32 %f1114, 0f3F317200;
|
|
mul.rn.f32 %f1115, %f1087, %f1114;
|
|
mov.f32 %f1116, 0f35BFBE8E;
|
|
mul.rn.f32 %f1117, %f1087, %f1116;
|
|
add.f32 %f1118, %f1115, %f1111;
|
|
sub.f32 %f1119, %f1115, %f1118;
|
|
add.f32 %f1120, %f1111, %f1119;
|
|
add.f32 %f1121, %f1113, %f1120;
|
|
add.f32 %f1122, %f1117, %f1121;
|
|
add.f32 %f1123, %f1118, %f1122;
|
|
sub.f32 %f1124, %f1118, %f1123;
|
|
add.f32 %f1125, %f1122, %f1124;
|
|
mov.f32 %f1126, 0f3ED55555;
|
|
mul.rn.f32 %f1127, %f1126, %f1123;
|
|
neg.f32 %f1128, %f1127;
|
|
fma.rn.f32 %f1129, %f1126, %f1123, %f1128;
|
|
fma.rn.f32 %f1130, %f1126, %f1125, %f1129;
|
|
mov.f32 %f1131, 0f00000000;
|
|
fma.rn.f32 %f1132, %f1131, %f1123, %f1130;
|
|
add.rn.f32 %f1133, %f1127, %f1132;
|
|
neg.f32 %f1134, %f1133;
|
|
add.rn.f32 %f1135, %f1127, %f1134;
|
|
add.rn.f32 %f1136, %f1135, %f1132;
|
|
mov.b32 %r359, %f1133;
|
|
setp.eq.s32 %p135, %r359, 1118925336;
|
|
add.s32 %r360, %r359, -1;
|
|
mov.b32 %f1137, %r360;
|
|
add.f32 %f1138, %f1136, 0f37000000;
|
|
selp.f32 %f199, %f1138, %f1136, %p135;
|
|
selp.f32 %f1139, %f1137, %f1133, %p135;
|
|
mov.f32 %f1140, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1141, %f1139, %f1140;
|
|
cvt.rzi.f32.f32 %f1142, %f1141;
|
|
abs.f32 %f1143, %f1142;
|
|
setp.gt.f32 %p136, %f1143, 0f42FC0000;
|
|
mov.b32 %r361, %f1142;
|
|
and.b32 %r362, %r361, -2147483648;
|
|
or.b32 %r363, %r362, 1123811328;
|
|
mov.b32 %f1144, %r363;
|
|
selp.f32 %f1145, %f1144, %f1142, %p136;
|
|
mov.f32 %f1146, 0fBF317218;
|
|
fma.rn.f32 %f1147, %f1145, %f1146, %f1139;
|
|
mov.f32 %f1148, 0f3102E308;
|
|
fma.rn.f32 %f1149, %f1145, %f1148, %f1147;
|
|
mul.f32 %f1150, %f1149, 0f3FB8AA3B;
|
|
add.f32 %f1151, %f1145, 0f4B40007F;
|
|
mov.b32 %r364, %f1151;
|
|
shl.b32 %r365, %r364, 23;
|
|
mov.b32 %f1152, %r365;
|
|
ex2.approx.ftz.f32 %f1153, %f1150;
|
|
mul.f32 %f200, %f1153, %f1152;
|
|
setp.eq.f32 %p137, %f200, 0f7F800000;
|
|
mov.f32 %f1368, 0f7F800000;
|
|
@%p137 bra $L__BB0_112;
|
|
|
|
fma.rn.f32 %f1368, %f200, %f199, %f200;
|
|
|
|
$L__BB0_112:
|
|
setp.lt.f32 %p138, %f184, 0f00000000;
|
|
and.pred %p8, %p138, %p125;
|
|
setp.eq.f32 %p140, %f184, 0f00000000;
|
|
@%p140 bra $L__BB0_116;
|
|
bra.uni $L__BB0_113;
|
|
|
|
$L__BB0_116:
|
|
add.f32 %f1158, %f184, %f184;
|
|
selp.f32 %f1370, %f1158, 0f00000000, %p125;
|
|
bra.uni $L__BB0_117;
|
|
|
|
$L__BB0_113:
|
|
mov.b32 %r366, %f1368;
|
|
xor.b32 %r367, %r366, -2147483648;
|
|
mov.b32 %f1154, %r367;
|
|
selp.f32 %f1370, %f1154, %f1368, %p8;
|
|
setp.geu.f32 %p141, %f184, 0f00000000;
|
|
@%p141 bra $L__BB0_117;
|
|
|
|
mov.f32 %f1155, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1156, %f1155;
|
|
setp.eq.f32 %p142, %f1156, 0f3ED55555;
|
|
@%p142 bra $L__BB0_117;
|
|
|
|
mov.f32 %f1370, 0f7FFFFFFF;
|
|
|
|
$L__BB0_117:
|
|
add.f32 %f1159, %f198, 0f3ED55555;
|
|
mov.b32 %r368, %f1159;
|
|
setp.lt.s32 %p144, %r368, 2139095040;
|
|
@%p144 bra $L__BB0_122;
|
|
|
|
setp.gtu.f32 %p145, %f198, 0f7F800000;
|
|
@%p145 bra $L__BB0_121;
|
|
bra.uni $L__BB0_119;
|
|
|
|
$L__BB0_121:
|
|
add.f32 %f1370, %f184, 0f3ED55555;
|
|
bra.uni $L__BB0_122;
|
|
|
|
$L__BB0_119:
|
|
setp.neu.f32 %p146, %f198, 0f7F800000;
|
|
@%p146 bra $L__BB0_122;
|
|
|
|
selp.f32 %f1370, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_122:
|
|
abs.f32 %f209, %f185;
|
|
setp.lt.f32 %p147, %f209, 0f00800000;
|
|
mul.f32 %f1161, %f209, 0f4B800000;
|
|
selp.f32 %f1162, %f1161, %f209, %p147;
|
|
selp.f32 %f1163, 0fC3170000, 0fC2FE0000, %p147;
|
|
mov.b32 %r369, %f1162;
|
|
and.b32 %r370, %r369, 8388607;
|
|
or.b32 %r371, %r370, 1065353216;
|
|
mov.b32 %f1164, %r371;
|
|
shr.u32 %r372, %r369, 23;
|
|
cvt.rn.f32.u32 %f1165, %r372;
|
|
add.f32 %f1166, %f1163, %f1165;
|
|
setp.gt.f32 %p148, %f1164, 0f3FB504F3;
|
|
mul.f32 %f1167, %f1164, 0f3F000000;
|
|
add.f32 %f1168, %f1166, 0f3F800000;
|
|
selp.f32 %f1169, %f1168, %f1166, %p148;
|
|
selp.f32 %f1170, %f1167, %f1164, %p148;
|
|
add.f32 %f1171, %f1170, 0fBF800000;
|
|
add.f32 %f1172, %f1170, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1173, %f1172;
|
|
add.f32 %f1174, %f1171, %f1171;
|
|
mul.f32 %f1175, %f1174, %f1173;
|
|
mul.f32 %f1176, %f1175, %f1175;
|
|
mov.f32 %f1177, 0f3C4CAF63;
|
|
mov.f32 %f1178, 0f3B18F0FE;
|
|
fma.rn.f32 %f1179, %f1178, %f1176, %f1177;
|
|
mov.f32 %f1180, 0f3DAAAABD;
|
|
fma.rn.f32 %f1181, %f1179, %f1176, %f1180;
|
|
mul.rn.f32 %f1182, %f1181, %f1176;
|
|
mul.rn.f32 %f1183, %f1182, %f1175;
|
|
sub.f32 %f1184, %f1171, %f1175;
|
|
add.f32 %f1185, %f1184, %f1184;
|
|
neg.f32 %f1186, %f1175;
|
|
fma.rn.f32 %f1187, %f1186, %f1171, %f1185;
|
|
mul.rn.f32 %f1188, %f1173, %f1187;
|
|
add.f32 %f1189, %f1183, %f1175;
|
|
sub.f32 %f1190, %f1175, %f1189;
|
|
add.f32 %f1191, %f1183, %f1190;
|
|
add.f32 %f1192, %f1188, %f1191;
|
|
add.f32 %f1193, %f1189, %f1192;
|
|
sub.f32 %f1194, %f1189, %f1193;
|
|
add.f32 %f1195, %f1192, %f1194;
|
|
mov.f32 %f1196, 0f3F317200;
|
|
mul.rn.f32 %f1197, %f1169, %f1196;
|
|
mov.f32 %f1198, 0f35BFBE8E;
|
|
mul.rn.f32 %f1199, %f1169, %f1198;
|
|
add.f32 %f1200, %f1197, %f1193;
|
|
sub.f32 %f1201, %f1197, %f1200;
|
|
add.f32 %f1202, %f1193, %f1201;
|
|
add.f32 %f1203, %f1195, %f1202;
|
|
add.f32 %f1204, %f1199, %f1203;
|
|
add.f32 %f1205, %f1200, %f1204;
|
|
sub.f32 %f1206, %f1200, %f1205;
|
|
add.f32 %f1207, %f1204, %f1206;
|
|
mov.f32 %f1208, 0f3ED55555;
|
|
mul.rn.f32 %f1209, %f1208, %f1205;
|
|
neg.f32 %f1210, %f1209;
|
|
fma.rn.f32 %f1211, %f1208, %f1205, %f1210;
|
|
fma.rn.f32 %f1212, %f1208, %f1207, %f1211;
|
|
mov.f32 %f1213, 0f00000000;
|
|
fma.rn.f32 %f1214, %f1213, %f1205, %f1212;
|
|
add.rn.f32 %f1215, %f1209, %f1214;
|
|
neg.f32 %f1216, %f1215;
|
|
add.rn.f32 %f1217, %f1209, %f1216;
|
|
add.rn.f32 %f1218, %f1217, %f1214;
|
|
mov.b32 %r373, %f1215;
|
|
setp.eq.s32 %p149, %r373, 1118925336;
|
|
add.s32 %r374, %r373, -1;
|
|
mov.b32 %f1219, %r374;
|
|
add.f32 %f1220, %f1218, 0f37000000;
|
|
selp.f32 %f210, %f1220, %f1218, %p149;
|
|
selp.f32 %f1221, %f1219, %f1215, %p149;
|
|
mov.f32 %f1222, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1223, %f1221, %f1222;
|
|
cvt.rzi.f32.f32 %f1224, %f1223;
|
|
abs.f32 %f1225, %f1224;
|
|
setp.gt.f32 %p150, %f1225, 0f42FC0000;
|
|
mov.b32 %r375, %f1224;
|
|
and.b32 %r376, %r375, -2147483648;
|
|
or.b32 %r377, %r376, 1123811328;
|
|
mov.b32 %f1226, %r377;
|
|
selp.f32 %f1227, %f1226, %f1224, %p150;
|
|
mov.f32 %f1228, 0fBF317218;
|
|
fma.rn.f32 %f1229, %f1227, %f1228, %f1221;
|
|
mov.f32 %f1230, 0f3102E308;
|
|
fma.rn.f32 %f1231, %f1227, %f1230, %f1229;
|
|
mul.f32 %f1232, %f1231, 0f3FB8AA3B;
|
|
add.f32 %f1233, %f1227, 0f4B40007F;
|
|
mov.b32 %r378, %f1233;
|
|
shl.b32 %r379, %r378, 23;
|
|
mov.b32 %f1234, %r379;
|
|
ex2.approx.ftz.f32 %f1235, %f1232;
|
|
mul.f32 %f211, %f1235, %f1234;
|
|
setp.eq.f32 %p151, %f211, 0f7F800000;
|
|
mov.f32 %f1371, 0f7F800000;
|
|
@%p151 bra $L__BB0_124;
|
|
|
|
fma.rn.f32 %f1371, %f211, %f210, %f211;
|
|
|
|
$L__BB0_124:
|
|
setp.lt.f32 %p152, %f185, 0f00000000;
|
|
and.pred %p9, %p152, %p125;
|
|
setp.eq.f32 %p154, %f185, 0f00000000;
|
|
@%p154 bra $L__BB0_128;
|
|
bra.uni $L__BB0_125;
|
|
|
|
$L__BB0_128:
|
|
add.f32 %f1240, %f185, %f185;
|
|
selp.f32 %f1373, %f1240, 0f00000000, %p125;
|
|
bra.uni $L__BB0_129;
|
|
|
|
$L__BB0_125:
|
|
mov.b32 %r380, %f1371;
|
|
xor.b32 %r381, %r380, -2147483648;
|
|
mov.b32 %f1236, %r381;
|
|
selp.f32 %f1373, %f1236, %f1371, %p9;
|
|
setp.geu.f32 %p155, %f185, 0f00000000;
|
|
@%p155 bra $L__BB0_129;
|
|
|
|
mov.f32 %f1237, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1238, %f1237;
|
|
setp.eq.f32 %p156, %f1238, 0f3ED55555;
|
|
@%p156 bra $L__BB0_129;
|
|
|
|
mov.f32 %f1373, 0f7FFFFFFF;
|
|
|
|
$L__BB0_129:
|
|
add.f32 %f1241, %f209, 0f3ED55555;
|
|
mov.b32 %r382, %f1241;
|
|
setp.lt.s32 %p158, %r382, 2139095040;
|
|
@%p158 bra $L__BB0_134;
|
|
|
|
setp.gtu.f32 %p159, %f209, 0f7F800000;
|
|
@%p159 bra $L__BB0_133;
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_133:
|
|
add.f32 %f1373, %f185, 0f3ED55555;
|
|
bra.uni $L__BB0_134;
|
|
|
|
$L__BB0_131:
|
|
setp.neu.f32 %p160, %f209, 0f7F800000;
|
|
@%p160 bra $L__BB0_134;
|
|
|
|
selp.f32 %f1373, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_134:
|
|
fma.rn.f32 %f1242, %f1367, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p161, %f183, 0f3F800000;
|
|
mov.f32 %f1243, 0f3F800000;
|
|
selp.f32 %f1244, 0f3F7FFFFF, %f1242, %p161;
|
|
mul.f32 %f1245, %f183, 0f414EB852;
|
|
setp.lt.f32 %p162, %f183, 0f3B4D2E1C;
|
|
selp.f32 %f1246, %f1245, %f1244, %p162;
|
|
fma.rn.f32 %f1247, %f1370, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p163, %f184, 0f3F800000;
|
|
selp.f32 %f1248, 0f3F7FFFFF, %f1247, %p163;
|
|
mul.f32 %f1249, %f184, 0f414EB852;
|
|
setp.lt.f32 %p164, %f184, 0f3B4D2E1C;
|
|
selp.f32 %f1250, %f1249, %f1248, %p164;
|
|
fma.rn.f32 %f1251, %f1373, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p165, %f185, 0f3F800000;
|
|
selp.f32 %f1252, 0f3F7FFFFF, %f1251, %p165;
|
|
mul.f32 %f1253, %f185, 0f414EB852;
|
|
setp.lt.f32 %p166, %f185, 0f3B4D2E1C;
|
|
selp.f32 %f1254, %f1253, %f1252, %p166;
|
|
min.f32 %f1255, %f1246, %f1243;
|
|
mov.f32 %f1256, 0f00000000;
|
|
max.f32 %f1257, %f1256, %f1255;
|
|
mul.f32 %f1258, %f1257, 0f43800000;
|
|
cvt.rzi.u32.f32 %r383, %f1258;
|
|
min.u32 %r384, %r383, 255;
|
|
min.f32 %f1259, %f1250, %f1243;
|
|
max.f32 %f1260, %f1256, %f1259;
|
|
mul.f32 %f1261, %f1260, 0f43800000;
|
|
cvt.rzi.u32.f32 %r385, %f1261;
|
|
min.u32 %r386, %r385, 255;
|
|
min.f32 %f1262, %f1254, %f1243;
|
|
max.f32 %f1263, %f1256, %f1262;
|
|
mul.f32 %f1264, %f1263, 0f43800000;
|
|
cvt.rzi.u32.f32 %r387, %f1264;
|
|
min.u32 %r388, %r387, 255;
|
|
shl.b64 %rd29, %rd10, 2;
|
|
add.s64 %rd30, %rd9, %rd29;
|
|
cvt.u16.u32 %rs20, %r388;
|
|
cvt.u16.u32 %rs21, %r386;
|
|
cvt.u16.u32 %rs22, %r384;
|
|
mov.u16 %rs23, 255;
|
|
st.global.v4.u8 [%rd30], {%rs22, %rs21, %rs20, %rs23};
|
|
|
|
$L__BB0_135:
|
|
and.b32 %r389, %r417, 4;
|
|
setp.eq.s32 %p167, %r389, 0;
|
|
@%p167 bra $L__BB0_139;
|
|
|
|
ld.const.u32 %r390, [params+108];
|
|
setp.eq.s32 %p168, %r390, 0;
|
|
ld.const.u64 %rd31, [params+224];
|
|
cvta.to.global.u64 %rd32, %rd31;
|
|
ld.const.u32 %r391, [params+216];
|
|
mad.lo.s32 %r392, %r391, %r4, %r3;
|
|
mul.wide.u32 %rd33, %r392, 8;
|
|
add.s64 %rd11, %rd32, %rd33;
|
|
@%p168 bra $L__BB0_138;
|
|
|
|
ld.global.v4.u16 {%rs31, %rs32, %rs33, %rs34}, [%rd11];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1265, %rs31;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1266, %rs32;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1267, %rs33;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1268, %f1339, %f1265;
|
|
add.f32 %f1269, %f1340, %f1266;
|
|
add.f32 %f1270, %f1341, %f1267;
|
|
mov.f32 %f1271, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1270;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1269;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1268;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f1271;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd11], {%rs27, %rs28, %rs29, %rs30};
|
|
bra.uni $L__BB0_139;
|
|
|
|
$L__BB0_138:
|
|
mov.f32 %f1275, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs38, %f1275;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f1341;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1340;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1339;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd11], {%rs35, %rs36, %rs37, %rs38};
|
|
|
|
$L__BB0_139:
|
|
and.b32 %r393, %r417, 64;
|
|
setp.eq.s32 %p169, %r393, 0;
|
|
@%p169 bra $L__BB0_151;
|
|
|
|
mul.f32 %f1276, %f1343, %f1343;
|
|
fma.rn.f32 %f1277, %f1342, %f1342, %f1276;
|
|
fma.rn.f32 %f1278, %f1344, %f1344, %f1277;
|
|
sqrt.rn.f32 %f1279, %f1278;
|
|
rcp.rn.f32 %f1280, %f1279;
|
|
mul.f32 %f1281, %f1342, %f1280;
|
|
mul.f32 %f1282, %f1343, %f1280;
|
|
mul.f32 %f1283, %f1344, %f1280;
|
|
ld.const.u64 %rd34, [params+208];
|
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cvta.to.global.u64 %rd35, %rd34;
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ld.const.u32 %r394, [params+200];
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mad.lo.s32 %r395, %r394, %r4, %r3;
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fma.rn.f32 %f1284, %f1281, 0f3F000000, 0f3F000000;
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mul.f32 %f1285, %f1284, 0f437F0000;
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cvt.rzi.u32.f32 %r396, %f1285;
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|
fma.rn.f32 %f1286, %f1282, 0f3F000000, 0f3F000000;
|
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mul.f32 %f1287, %f1286, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r397, %f1287;
|
|
fma.rn.f32 %f1288, %f1283, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1289, %f1288, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r398, %f1289;
|
|
mul.wide.u32 %rd36, %r395, 4;
|
|
add.s64 %rd37, %rd35, %rd36;
|
|
cvt.u16.u32 %rs39, %r398;
|
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cvt.u16.u32 %rs40, %r397;
|
|
cvt.u16.u32 %rs41, %r396;
|
|
mov.u16 %rs42, 255;
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|
st.global.v4.u8 [%rd37], {%rs41, %rs40, %rs39, %rs42};
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|
|
|
$L__BB0_151:
|
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ret;
|
|
|
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}
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|