1744 lines
48 KiB
Plaintext
1744 lines
48 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<148>;
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.reg .b16 %rs<57>;
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.reg .f32 %f<993>;
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.reg .b32 %r<333>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<86>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r51), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r52), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+540];
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ld.const.u64 %rd22, [params+400];
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cvta.to.global.u64 %rd23, %rd22;
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ld.const.u32 %r57, [params+392];
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mad.lo.s32 %r58, %r57, %r52, %r51;
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mul.wide.u32 %rd24, %r58, 4;
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add.s64 %rd2, %rd23, %rd24;
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ld.global.v2.u8 {%rs7, %rs56}, [%rd2];
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or.b16 %rs9, %rs7, %rs56;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p7, %rs10, 0;
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@%p7 bra $L__BB0_2;
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ld.global.u8 %rs55, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs55, [%rd2+2];
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setp.eq.s16 %p8, %rs55, 0;
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mov.f32 %f942, 0f00000000;
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mov.u16 %rs56, 0;
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mov.f32 %f943, %f942;
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mov.f32 %f944, %f942;
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@%p8 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f162, %rs7;
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div.rn.f32 %f163, %f162, 0f437F0000;
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fma.rn.f32 %f164, %f163, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs56, 255;
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cvt.rn.f32.u16 %f165, %rs13;
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div.rn.f32 %f166, %f165, 0f437F0000;
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fma.rn.f32 %f167, %f166, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f168, %rs55;
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div.rn.f32 %f169, %f168, 0f437F0000;
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fma.rn.f32 %f170, %f169, 0f40000000, 0fBF800000;
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mul.f32 %f171, %f167, %f167;
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fma.rn.f32 %f172, %f164, %f164, %f171;
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fma.rn.f32 %f173, %f170, %f170, %f172;
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sqrt.rn.f32 %f174, %f173;
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rcp.rn.f32 %f175, %f174;
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mul.f32 %f944, %f175, %f170;
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mul.f32 %f943, %f175, %f167;
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mul.f32 %f942, %f164, %f175;
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$L__BB0_4:
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ld.const.v2.u32 {%r59, %r60}, [params];
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add.s32 %r4, %r59, %r51;
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add.s32 %r5, %r60, %r52;
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setp.eq.f32 %p9, %f942, 0f00000000;
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setp.eq.f32 %p10, %f943, 0f00000000;
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and.pred %p11, %p9, %p10;
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setp.eq.f32 %p12, %f944, 0f00000000;
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and.pred %p13, %p12, %p11;
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@%p13 bra $L__BB0_116;
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bra.uni $L__BB0_5;
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$L__BB0_116:
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ld.const.u32 %r50, [params+104];
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and.b32 %r308, %r50, 1;
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setp.eq.b32 %p141, %r308, 1;
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mov.pred %p142, 0;
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xor.pred %p143, %p141, %p142;
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not.pred %p144, %p143;
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@%p144 bra $L__BB0_118;
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ld.const.u64 %rd67, [params+144];
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cvta.to.global.u64 %rd68, %rd67;
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ld.const.u32 %r309, [params+136];
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mad.lo.s32 %r310, %r309, %r5, %r4;
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mul.wide.u32 %rd69, %r310, 4;
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add.s64 %rd70, %rd68, %rd69;
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mov.u16 %rs38, 0;
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st.global.v4.u8 [%rd70], {%rs38, %rs38, %rs38, %rs38};
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$L__BB0_118:
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and.b32 %r311, %r50, 4;
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setp.eq.s32 %p145, %r311, 0;
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@%p145 bra $L__BB0_122;
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ld.const.u32 %r312, [params+108];
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setp.eq.s32 %p146, %r312, 0;
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ld.const.u64 %rd71, [params+224];
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cvta.to.global.u64 %rd72, %rd71;
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ld.const.u32 %r313, [params+216];
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mad.lo.s32 %r314, %r313, %r5, %r4;
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mul.wide.u32 %rd73, %r314, 8;
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add.s64 %rd20, %rd72, %rd73;
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@%p146 bra $L__BB0_121;
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ld.global.v4.u16 {%rs45, %rs46, %rs47, %rs48}, [%rd20];
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// begin inline asm
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{ cvt.f32.f16 %f874, %rs45;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f875, %rs46;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f876, %rs47;}
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// end inline asm
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add.f32 %f877, %f874, 0f00000000;
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add.f32 %f878, %f875, 0f00000000;
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add.f32 %f879, %f876, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs44, %f879;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs43, %f878;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs42, %f877;}
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// end inline asm
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mov.u16 %rs49, 0;
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st.global.v4.u16 [%rd20], {%rs42, %rs43, %rs44, %rs49};
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bra.uni $L__BB0_122;
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$L__BB0_5:
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ld.const.u64 %rd25, [params+432];
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cvta.to.global.u64 %rd26, %rd25;
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ld.const.u32 %r63, [params+424];
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mad.lo.s32 %r64, %r63, %r52, %r51;
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mul.wide.u32 %rd27, %r64, 12;
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add.s64 %rd28, %rd26, %rd27;
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ld.global.f32 %f182, [%rd28];
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mul.f32 %f183, %f182, 0f3456BF95;
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ld.global.f32 %f184, [%rd28+4];
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mul.f32 %f185, %f184, 0f3456BF95;
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ld.global.f32 %f186, [%rd28+8];
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mul.f32 %f187, %f186, 0f3456BF95;
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abs.f32 %f188, %f942;
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div.rn.f32 %f189, %f183, %f188;
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abs.f32 %f190, %f943;
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div.rn.f32 %f191, %f185, %f190;
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abs.f32 %f192, %f944;
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div.rn.f32 %f193, %f187, %f192;
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abs.f32 %f194, %f189;
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abs.f32 %f195, %f191;
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abs.f32 %f196, %f193;
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mov.f32 %f197, 0f38D1B717;
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max.f32 %f198, %f194, %f197;
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max.f32 %f199, %f195, %f197;
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max.f32 %f200, %f196, %f197;
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fma.rn.f32 %f10, %f942, %f198, %f182;
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fma.rn.f32 %f11, %f943, %f199, %f184;
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fma.rn.f32 %f12, %f944, %f200, %f186;
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setp.gt.f32 %p14, %f188, %f192;
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neg.f32 %f201, %f943;
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selp.f32 %f202, %f201, 0f00000000, %p14;
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mov.f32 %f963, 0f00000000;
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neg.f32 %f203, %f944;
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selp.f32 %f204, %f942, %f203, %p14;
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selp.f32 %f205, 0f00000000, %f943, %p14;
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mul.f32 %f206, %f204, %f204;
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fma.rn.f32 %f207, %f202, %f202, %f206;
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fma.rn.f32 %f208, %f205, %f205, %f207;
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sqrt.rn.f32 %f209, %f208;
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rcp.rn.f32 %f210, %f209;
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mul.f32 %f13, %f202, %f210;
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mul.f32 %f14, %f204, %f210;
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mul.f32 %f15, %f205, %f210;
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ld.const.u64 %rd29, [params+128];
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cvta.to.global.u64 %rd30, %rd29;
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ld.const.u32 %r65, [params+120];
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mad.lo.s32 %r66, %r65, %r52, %r51;
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mul.wide.u32 %rd31, %r66, 4;
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add.s64 %rd3, %rd30, %rd31;
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setp.lt.s32 %p15, %r3, 1;
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mov.f32 %f964, %f963;
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mov.f32 %f965, %f963;
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mov.f32 %f966, %f963;
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mov.f32 %f967, %f963;
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mov.f32 %f968, %f963;
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@%p15 bra $L__BB0_36;
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ld.const.u32 %r6, [params+588];
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cvt.rn.f32.s32 %f217, %r3;
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rcp.rn.f32 %f16, %f217;
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ld.global.u32 %r325, [%rd3];
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mul.f32 %f17, %f10, 0f3456BF95;
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mul.f32 %f18, %f11, 0f3456BF95;
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mul.f32 %f19, %f12, 0f3456BF95;
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ld.const.u64 %rd4, [params+592];
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ld.const.u64 %rd5, [params+96];
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mul.f32 %f218, %f942, %f14;
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mul.f32 %f219, %f943, %f13;
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sub.f32 %f20, %f219, %f218;
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mul.f32 %f220, %f944, %f13;
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mul.f32 %f221, %f942, %f15;
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sub.f32 %f21, %f221, %f220;
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mul.f32 %f222, %f943, %f15;
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mul.f32 %f223, %f944, %f14;
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sub.f32 %f22, %f223, %f222;
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mov.u32 %r67, 0;
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add.s64 %rd6, %rd1, 24;
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abs.f32 %f286, %f17;
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abs.f32 %f287, %f18;
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max.f32 %f288, %f286, %f287;
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abs.f32 %f289, %f19;
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max.f32 %f290, %f288, %f289;
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mov.u32 %r322, %r67;
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$L__BB0_7:
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mov.u32 %r324, %r67;
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$L__BB0_8:
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cvt.rn.f32.s32 %f889, %r322;
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mad.lo.s32 %r69, %r325, 1664525, 1013904223;
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and.b32 %r70, %r69, 16777215;
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cvt.rn.f32.u32 %f224, %r70;
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fma.rn.f32 %f225, %f224, 0f33800000, %f889;
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mul.f32 %f36, %f16, %f225;
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mad.lo.s32 %r325, %r69, 1664525, 1013904223;
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and.b32 %r71, %r325, 16777215;
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cvt.rn.f32.u32 %f226, %r71;
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cvt.rn.f32.s32 %f227, %r324;
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fma.rn.f32 %f228, %f226, 0f33800000, %f227;
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mul.f32 %f229, %f16, %f228;
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mul.f32 %f230, %f36, %f36;
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mov.f32 %f231, 0f3F800000;
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sub.f32 %f232, %f231, %f230;
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mov.f32 %f233, 0f00000000;
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max.f32 %f234, %f233, %f232;
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sqrt.rn.f32 %f37, %f234;
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mul.f32 %f38, %f229, 0f40C90FDB;
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mul.f32 %f235, %f38, 0f3F22F983;
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cvt.rni.s32.f32 %r332, %f235;
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cvt.rn.f32.s32 %f236, %r332;
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mov.f32 %f237, 0fBFC90FDA;
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fma.rn.f32 %f238, %f236, %f237, %f38;
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mov.f32 %f239, 0fB3A22168;
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fma.rn.f32 %f240, %f236, %f239, %f238;
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mov.f32 %f241, 0fA7C234C5;
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fma.rn.f32 %f960, %f236, %f241, %f240;
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abs.f32 %f40, %f38;
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setp.ltu.f32 %p16, %f40, 0f47CE4780;
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mov.u32 %r329, %r332;
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mov.f32 %f957, %f960;
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@%p16 bra $L__BB0_16;
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setp.eq.f32 %p17, %f40, 0f7F800000;
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@%p17 bra $L__BB0_15;
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bra.uni $L__BB0_10;
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$L__BB0_15:
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mov.f32 %f244, 0f00000000;
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mul.rn.f32 %f957, %f38, %f244;
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mov.u32 %r329, 0;
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bra.uni $L__BB0_16;
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$L__BB0_10:
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mov.b32 %r14, %f38;
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bfe.u32 %r73, %r14, 23, 8;
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add.s32 %r15, %r73, -128;
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shl.b32 %r74, %r14, 8;
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or.b32 %r16, %r74, -2147483648;
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shr.u32 %r17, %r15, 5;
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mov.u64 %rd83, 0;
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mov.u32 %r326, 0;
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mov.u64 %rd82, __cudart_i2opi_f;
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mov.u64 %rd81, %rd1;
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$L__BB0_11:
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.pragma "nounroll";
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ld.global.nc.u32 %r75, [%rd82];
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mad.wide.u32 %rd34, %r75, %r16, %rd83;
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shr.u64 %rd83, %rd34, 32;
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st.local.u32 [%rd81], %rd34;
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add.s64 %rd82, %rd82, 4;
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add.s64 %rd81, %rd81, 4;
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add.s32 %r326, %r326, 1;
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setp.ne.s32 %p18, %r326, 6;
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@%p18 bra $L__BB0_11;
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st.local.u32 [%rd6], %rd83;
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mov.u32 %r76, 4;
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sub.s32 %r20, %r76, %r17;
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mov.u32 %r77, 6;
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sub.s32 %r78, %r77, %r17;
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mul.wide.s32 %rd35, %r78, 4;
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add.s64 %rd36, %rd1, %rd35;
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ld.local.u32 %r327, [%rd36];
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ld.local.u32 %r328, [%rd36+-4];
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and.b32 %r23, %r15, 31;
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setp.eq.s32 %p19, %r23, 0;
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@%p19 bra $L__BB0_14;
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mov.u32 %r79, 32;
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sub.s32 %r80, %r79, %r23;
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shr.u32 %r81, %r328, %r80;
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shl.b32 %r82, %r327, %r23;
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add.s32 %r327, %r81, %r82;
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mul.wide.s32 %rd37, %r20, 4;
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add.s64 %rd38, %rd1, %rd37;
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ld.local.u32 %r83, [%rd38];
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shr.u32 %r84, %r83, %r80;
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shl.b32 %r85, %r328, %r23;
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add.s32 %r328, %r84, %r85;
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$L__BB0_14:
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and.b32 %r86, %r14, -2147483648;
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shr.u32 %r87, %r328, 30;
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shl.b32 %r88, %r327, 2;
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or.b32 %r89, %r87, %r88;
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shr.u32 %r90, %r89, 31;
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shr.u32 %r91, %r327, 30;
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add.s32 %r92, %r90, %r91;
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neg.s32 %r93, %r92;
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setp.eq.s32 %p20, %r86, 0;
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selp.b32 %r329, %r92, %r93, %p20;
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setp.ne.s32 %p21, %r90, 0;
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xor.b32 %r94, %r86, -2147483648;
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selp.b32 %r95, %r94, %r86, %p21;
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selp.b32 %r96, -1, 0, %p21;
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xor.b32 %r97, %r89, %r96;
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shl.b32 %r98, %r328, 2;
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xor.b32 %r99, %r98, %r96;
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cvt.u64.u32 %rd39, %r97;
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cvt.u64.u32 %rd40, %r99;
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bfi.b64 %rd41, %rd39, %rd40, 32, 32;
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cvt.rn.f64.s64 %fd1, %rd41;
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mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
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cvt.rn.f32.f64 %f242, %fd2;
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setp.eq.s32 %p22, %r95, 0;
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neg.f32 %f243, %f242;
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selp.f32 %f957, %f242, %f243, %p22;
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$L__BB0_16:
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add.s32 %r30, %r329, 1;
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and.b32 %r31, %r30, 1;
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setp.eq.s32 %p23, %r31, 0;
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selp.f32 %f44, %f957, 0f3F800000, %p23;
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mul.rn.f32 %f45, %f957, %f957;
|
|
mov.f32 %f958, 0fB94D4153;
|
|
@%p23 bra $L__BB0_18;
|
|
|
|
mov.f32 %f246, 0fBAB607ED;
|
|
mov.f32 %f247, 0f37CBAC00;
|
|
fma.rn.f32 %f958, %f247, %f45, %f246;
|
|
|
|
$L__BB0_18:
|
|
selp.f32 %f248, 0f3C0885E4, 0f3D2AAABB, %p23;
|
|
fma.rn.f32 %f249, %f958, %f45, %f248;
|
|
selp.f32 %f250, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
|
|
fma.rn.f32 %f251, %f249, %f45, %f250;
|
|
mov.f32 %f252, 0f00000000;
|
|
fma.rn.f32 %f253, %f45, %f44, %f252;
|
|
fma.rn.f32 %f959, %f251, %f253, %f44;
|
|
and.b32 %r101, %r30, 2;
|
|
setp.eq.s32 %p25, %r101, 0;
|
|
@%p25 bra $L__BB0_20;
|
|
|
|
mov.f32 %f255, 0fBF800000;
|
|
fma.rn.f32 %f959, %f959, %f255, %f252;
|
|
|
|
$L__BB0_20:
|
|
@%p16 bra $L__BB0_28;
|
|
|
|
setp.eq.f32 %p27, %f40, 0f7F800000;
|
|
@%p27 bra $L__BB0_27;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f258, 0f00000000;
|
|
mul.rn.f32 %f960, %f38, %f258;
|
|
mov.u32 %r332, 0;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_22:
|
|
mov.b32 %r32, %f38;
|
|
bfe.u32 %r102, %r32, 23, 8;
|
|
add.s32 %r33, %r102, -128;
|
|
shl.b32 %r103, %r32, 8;
|
|
or.b32 %r34, %r103, -2147483648;
|
|
shr.u32 %r35, %r33, 5;
|
|
mov.u64 %rd84, 0;
|
|
mov.u64 %rd85, %rd84;
|
|
|
|
$L__BB0_23:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd44, %rd84, 2;
|
|
mov.u64 %rd45, __cudart_i2opi_f;
|
|
add.s64 %rd46, %rd45, %rd44;
|
|
ld.global.nc.u32 %r104, [%rd46];
|
|
mad.wide.u32 %rd47, %r104, %r34, %rd85;
|
|
shr.u64 %rd85, %rd47, 32;
|
|
add.s64 %rd48, %rd1, %rd44;
|
|
st.local.u32 [%rd48], %rd47;
|
|
cvt.u32.u64 %r105, %rd84;
|
|
add.s32 %r106, %r105, 1;
|
|
cvt.s64.s32 %rd84, %r106;
|
|
setp.ne.s32 %p28, %r106, 6;
|
|
@%p28 bra $L__BB0_23;
|
|
|
|
st.local.u32 [%rd6], %rd85;
|
|
mov.u32 %r107, 4;
|
|
sub.s32 %r36, %r107, %r35;
|
|
mov.u32 %r108, 6;
|
|
sub.s32 %r109, %r108, %r35;
|
|
mul.wide.s32 %rd49, %r109, 4;
|
|
add.s64 %rd50, %rd1, %rd49;
|
|
ld.local.u32 %r330, [%rd50];
|
|
ld.local.u32 %r331, [%rd50+-4];
|
|
and.b32 %r39, %r33, 31;
|
|
setp.eq.s32 %p29, %r39, 0;
|
|
@%p29 bra $L__BB0_26;
|
|
|
|
mov.u32 %r110, 32;
|
|
sub.s32 %r111, %r110, %r39;
|
|
shr.u32 %r112, %r331, %r111;
|
|
shl.b32 %r113, %r330, %r39;
|
|
add.s32 %r330, %r112, %r113;
|
|
mul.wide.s32 %rd51, %r36, 4;
|
|
add.s64 %rd52, %rd1, %rd51;
|
|
ld.local.u32 %r114, [%rd52];
|
|
shr.u32 %r115, %r114, %r111;
|
|
shl.b32 %r116, %r331, %r39;
|
|
add.s32 %r331, %r115, %r116;
|
|
|
|
$L__BB0_26:
|
|
and.b32 %r117, %r32, -2147483648;
|
|
shr.u32 %r118, %r331, 30;
|
|
shl.b32 %r119, %r330, 2;
|
|
or.b32 %r120, %r118, %r119;
|
|
shr.u32 %r121, %r120, 31;
|
|
shr.u32 %r122, %r330, 30;
|
|
add.s32 %r123, %r121, %r122;
|
|
neg.s32 %r124, %r123;
|
|
setp.eq.s32 %p30, %r117, 0;
|
|
selp.b32 %r332, %r123, %r124, %p30;
|
|
setp.ne.s32 %p31, %r121, 0;
|
|
xor.b32 %r125, %r117, -2147483648;
|
|
selp.b32 %r126, %r125, %r117, %p31;
|
|
selp.b32 %r127, -1, 0, %p31;
|
|
xor.b32 %r128, %r120, %r127;
|
|
shl.b32 %r129, %r331, 2;
|
|
xor.b32 %r130, %r129, %r127;
|
|
cvt.u64.u32 %rd53, %r128;
|
|
cvt.u64.u32 %rd54, %r130;
|
|
bfi.b64 %rd55, %rd53, %rd54, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd55;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f256, %fd4;
|
|
setp.eq.s32 %p32, %r126, 0;
|
|
neg.f32 %f257, %f256;
|
|
selp.f32 %f960, %f256, %f257, %p32;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f54, %f37, %f959;
|
|
and.b32 %r46, %r332, 1;
|
|
setp.eq.s32 %p33, %r46, 0;
|
|
selp.f32 %f55, %f960, 0f3F800000, %p33;
|
|
mul.rn.f32 %f56, %f960, %f960;
|
|
mov.f32 %f961, 0fB94D4153;
|
|
@%p33 bra $L__BB0_30;
|
|
|
|
mov.f32 %f260, 0fBAB607ED;
|
|
mov.f32 %f261, 0f37CBAC00;
|
|
fma.rn.f32 %f961, %f261, %f56, %f260;
|
|
|
|
$L__BB0_30:
|
|
selp.f32 %f262, 0f3C0885E4, 0f3D2AAABB, %p33;
|
|
fma.rn.f32 %f263, %f961, %f56, %f262;
|
|
selp.f32 %f264, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
|
|
fma.rn.f32 %f265, %f263, %f56, %f264;
|
|
mov.f32 %f266, 0f00000000;
|
|
fma.rn.f32 %f267, %f56, %f55, %f266;
|
|
fma.rn.f32 %f962, %f265, %f267, %f55;
|
|
and.b32 %r132, %r332, 2;
|
|
setp.eq.s32 %p35, %r132, 0;
|
|
@%p35 bra $L__BB0_32;
|
|
|
|
mov.f32 %f269, 0fBF800000;
|
|
fma.rn.f32 %f962, %f962, %f269, %f266;
|
|
|
|
$L__BB0_32:
|
|
mul.f32 %f270, %f37, %f962;
|
|
mul.f32 %f271, %f13, %f270;
|
|
mul.f32 %f272, %f14, %f270;
|
|
mul.f32 %f273, %f15, %f270;
|
|
fma.rn.f32 %f274, %f22, %f54, %f271;
|
|
fma.rn.f32 %f275, %f21, %f54, %f272;
|
|
fma.rn.f32 %f276, %f20, %f54, %f273;
|
|
fma.rn.f32 %f62, %f942, %f36, %f274;
|
|
fma.rn.f32 %f63, %f943, %f36, %f275;
|
|
fma.rn.f32 %f64, %f944, %f36, %f276;
|
|
setp.leu.f32 %p36, %f63, 0f00000000;
|
|
setp.ne.s32 %p37, %r6, 0;
|
|
and.pred %p38, %p37, %p36;
|
|
@%p38 bra $L__BB0_34;
|
|
|
|
mov.f32 %f291, 0f38D1B717;
|
|
max.f32 %f283, %f290, %f291;
|
|
neg.f32 %f292, %f62;
|
|
neg.f32 %f293, %f63;
|
|
neg.f32 %f294, %f64;
|
|
tex.cube.v4.f32.f32 {%f295, %f296, %f297, %f298}, [%rd4, {%f294, %f293, %f292, %f292}];
|
|
mov.b32 %r172, %f295;
|
|
mov.b32 %r173, %f296;
|
|
mov.b32 %r174, %f297;
|
|
mov.f32 %f284, 0f6C4ECB8F;
|
|
mov.f32 %f285, 0f00000000;
|
|
mov.u32 %r169, 2;
|
|
mov.u32 %r170, 1;
|
|
mov.u32 %r171, 3;
|
|
mov.u32 %r203, 0;
|
|
// begin inline asm
|
|
call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd5,%f10,%f11,%f12,%f62,%f63,%f64,%f283,%f284,%f285,%r170,%r203,%r170,%r169,%r170,%r171,%r172,%r173,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
|
|
// end inline asm
|
|
mov.b32 %f299, %r133;
|
|
mov.b32 %f300, %r134;
|
|
mov.b32 %f301, %r135;
|
|
fma.rn.f32 %f963, %f62, %f299, %f963;
|
|
fma.rn.f32 %f964, %f63, %f300, %f964;
|
|
fma.rn.f32 %f965, %f64, %f301, %f965;
|
|
mul.f32 %f302, %f943, %f63;
|
|
fma.rn.f32 %f303, %f942, %f62, %f302;
|
|
fma.rn.f32 %f304, %f944, %f64, %f303;
|
|
cvt.sat.f32.f32 %f305, %f304;
|
|
fma.rn.f32 %f966, %f305, %f299, %f966;
|
|
fma.rn.f32 %f967, %f305, %f300, %f967;
|
|
fma.rn.f32 %f968, %f305, %f301, %f968;
|
|
|
|
$L__BB0_34:
|
|
add.s32 %r324, %r324, 1;
|
|
setp.lt.s32 %p39, %r324, %r3;
|
|
@%p39 bra $L__BB0_8;
|
|
|
|
add.s32 %r322, %r322, 1;
|
|
setp.lt.s32 %p40, %r322, %r3;
|
|
@%p40 bra $L__BB0_7;
|
|
|
|
$L__BB0_36:
|
|
mul.lo.s32 %r204, %r3, %r3;
|
|
cvt.rn.f32.s32 %f306, %r204;
|
|
rcp.rn.f32 %f307, %f306;
|
|
mul.f32 %f308, %f307, %f966;
|
|
mul.f32 %f309, %f307, %f967;
|
|
mul.f32 %f310, %f307, %f968;
|
|
fma.rn.f32 %f311, %f307, %f966, %f308;
|
|
fma.rn.f32 %f312, %f307, %f967, %f309;
|
|
fma.rn.f32 %f313, %f307, %f968, %f310;
|
|
ld.const.v4.f32 {%f314, %f315, %f316, %f317}, [params+576];
|
|
mul.f32 %f83, %f311, %f314;
|
|
mul.f32 %f84, %f312, %f315;
|
|
mul.f32 %f85, %f313, %f316;
|
|
ld.const.u32 %r49, [params+104];
|
|
and.b32 %r205, %r49, 1;
|
|
setp.eq.b32 %p41, %r205, 1;
|
|
mov.pred %p42, 0;
|
|
xor.pred %p43, %p41, %p42;
|
|
not.pred %p44, %p43;
|
|
@%p44 bra $L__BB0_110;
|
|
|
|
mov.f32 %f325, 0f3EE66666;
|
|
abs.f32 %f87, %f83;
|
|
setp.lt.f32 %p45, %f87, 0f00800000;
|
|
mul.f32 %f327, %f87, 0f4B800000;
|
|
selp.f32 %f328, %f327, %f87, %p45;
|
|
selp.f32 %f329, 0fC3170000, 0fC2FE0000, %p45;
|
|
mov.b32 %r206, %f328;
|
|
and.b32 %r207, %r206, 8388607;
|
|
or.b32 %r208, %r207, 1065353216;
|
|
mov.b32 %f330, %r208;
|
|
shr.u32 %r209, %r206, 23;
|
|
cvt.rn.f32.u32 %f331, %r209;
|
|
add.f32 %f332, %f329, %f331;
|
|
setp.gt.f32 %p46, %f330, 0f3FB504F3;
|
|
mul.f32 %f333, %f330, 0f3F000000;
|
|
add.f32 %f334, %f332, 0f3F800000;
|
|
selp.f32 %f335, %f334, %f332, %p46;
|
|
selp.f32 %f336, %f333, %f330, %p46;
|
|
add.f32 %f337, %f336, 0fBF800000;
|
|
add.f32 %f338, %f336, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f339, %f338;
|
|
add.f32 %f340, %f337, %f337;
|
|
mul.f32 %f341, %f340, %f339;
|
|
mul.f32 %f342, %f341, %f341;
|
|
mov.f32 %f343, 0f3C4CAF63;
|
|
mov.f32 %f344, 0f3B18F0FE;
|
|
fma.rn.f32 %f345, %f344, %f342, %f343;
|
|
mov.f32 %f346, 0f3DAAAABD;
|
|
fma.rn.f32 %f347, %f345, %f342, %f346;
|
|
mul.rn.f32 %f348, %f347, %f342;
|
|
mul.rn.f32 %f349, %f348, %f341;
|
|
sub.f32 %f350, %f337, %f341;
|
|
add.f32 %f351, %f350, %f350;
|
|
neg.f32 %f352, %f341;
|
|
fma.rn.f32 %f353, %f352, %f337, %f351;
|
|
mul.rn.f32 %f354, %f339, %f353;
|
|
add.f32 %f355, %f349, %f341;
|
|
sub.f32 %f356, %f341, %f355;
|
|
add.f32 %f357, %f349, %f356;
|
|
add.f32 %f358, %f354, %f357;
|
|
add.f32 %f359, %f355, %f358;
|
|
sub.f32 %f360, %f355, %f359;
|
|
add.f32 %f361, %f358, %f360;
|
|
mov.f32 %f362, 0f3F317200;
|
|
mul.rn.f32 %f363, %f335, %f362;
|
|
mov.f32 %f364, 0f35BFBE8E;
|
|
mul.rn.f32 %f365, %f335, %f364;
|
|
add.f32 %f366, %f363, %f359;
|
|
sub.f32 %f367, %f363, %f366;
|
|
add.f32 %f368, %f359, %f367;
|
|
add.f32 %f369, %f361, %f368;
|
|
add.f32 %f370, %f365, %f369;
|
|
add.f32 %f371, %f366, %f370;
|
|
sub.f32 %f372, %f366, %f371;
|
|
add.f32 %f373, %f370, %f372;
|
|
mul.rn.f32 %f374, %f325, %f371;
|
|
neg.f32 %f375, %f374;
|
|
fma.rn.f32 %f376, %f325, %f371, %f375;
|
|
fma.rn.f32 %f377, %f325, %f373, %f376;
|
|
mov.f32 %f378, 0f00000000;
|
|
fma.rn.f32 %f379, %f378, %f371, %f377;
|
|
add.rn.f32 %f380, %f374, %f379;
|
|
neg.f32 %f381, %f380;
|
|
add.rn.f32 %f382, %f374, %f381;
|
|
add.rn.f32 %f383, %f382, %f379;
|
|
mov.b32 %r210, %f380;
|
|
setp.eq.s32 %p47, %r210, 1118925336;
|
|
add.s32 %r211, %r210, -1;
|
|
mov.b32 %f384, %r211;
|
|
add.f32 %f385, %f383, 0f37000000;
|
|
selp.f32 %f88, %f385, %f383, %p47;
|
|
selp.f32 %f386, %f384, %f380, %p47;
|
|
mov.f32 %f387, 0f3FB8AA3B;
|
|
mul.rn.f32 %f388, %f386, %f387;
|
|
cvt.rzi.f32.f32 %f389, %f388;
|
|
abs.f32 %f390, %f389;
|
|
setp.gt.f32 %p48, %f390, 0f42FC0000;
|
|
mov.b32 %r212, %f389;
|
|
and.b32 %r213, %r212, -2147483648;
|
|
or.b32 %r214, %r213, 1123811328;
|
|
mov.b32 %f391, %r214;
|
|
selp.f32 %f392, %f391, %f389, %p48;
|
|
mov.f32 %f393, 0fBF317218;
|
|
fma.rn.f32 %f394, %f392, %f393, %f386;
|
|
mov.f32 %f395, 0f3102E308;
|
|
fma.rn.f32 %f396, %f392, %f395, %f394;
|
|
mul.f32 %f397, %f396, 0f3FB8AA3B;
|
|
add.f32 %f398, %f392, 0f4B40007F;
|
|
mov.b32 %r215, %f398;
|
|
shl.b32 %r216, %r215, 23;
|
|
mov.b32 %f399, %r216;
|
|
ex2.approx.ftz.f32 %f400, %f397;
|
|
mul.f32 %f89, %f400, %f399;
|
|
setp.eq.f32 %p49, %f89, 0f7F800000;
|
|
mov.f32 %f975, 0f7F800000;
|
|
@%p49 bra $L__BB0_39;
|
|
|
|
fma.rn.f32 %f975, %f89, %f88, %f89;
|
|
|
|
$L__BB0_39:
|
|
mov.f32 %f895, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f894, %f895;
|
|
add.f32 %f893, %f894, %f894;
|
|
mov.f32 %f892, 0f3EE66666;
|
|
sub.f32 %f891, %f892, %f893;
|
|
abs.f32 %f890, %f891;
|
|
setp.lt.f32 %p50, %f83, 0f00000000;
|
|
setp.eq.f32 %p51, %f890, 0f3F800000;
|
|
and.pred %p1, %p50, %p51;
|
|
setp.eq.f32 %p52, %f83, 0f00000000;
|
|
@%p52 bra $L__BB0_43;
|
|
bra.uni $L__BB0_40;
|
|
|
|
$L__BB0_43:
|
|
add.f32 %f405, %f83, %f83;
|
|
selp.f32 %f977, %f405, 0f00000000, %p51;
|
|
bra.uni $L__BB0_44;
|
|
|
|
$L__BB0_121:
|
|
mov.f32 %f882, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f882;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f882;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f882;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs53, 0;
|
|
st.global.v4.u16 [%rd20], {%rs50, %rs51, %rs52, %rs53};
|
|
|
|
$L__BB0_122:
|
|
and.b32 %r315, %r50, 64;
|
|
setp.eq.s32 %p147, %r315, 0;
|
|
@%p147 bra $L__BB0_124;
|
|
|
|
ld.const.u64 %rd74, [params+208];
|
|
cvta.to.global.u64 %rd75, %rd74;
|
|
ld.const.u32 %r316, [params+200];
|
|
mad.lo.s32 %r317, %r316, %r5, %r4;
|
|
mul.wide.u32 %rd76, %r317, 4;
|
|
add.s64 %rd77, %rd75, %rd76;
|
|
mov.u16 %rs54, 0;
|
|
st.global.v4.u8 [%rd77], {%rs54, %rs54, %rs54, %rs54};
|
|
bra.uni $L__BB0_124;
|
|
|
|
$L__BB0_40:
|
|
mov.b32 %r217, %f975;
|
|
xor.b32 %r218, %r217, -2147483648;
|
|
mov.b32 %f401, %r218;
|
|
selp.f32 %f977, %f401, %f975, %p1;
|
|
setp.geu.f32 %p53, %f83, 0f00000000;
|
|
@%p53 bra $L__BB0_44;
|
|
|
|
mov.f32 %f402, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f403, %f402;
|
|
setp.eq.f32 %p54, %f403, 0f3EE66666;
|
|
@%p54 bra $L__BB0_44;
|
|
|
|
mov.f32 %f977, 0f7FFFFFFF;
|
|
|
|
$L__BB0_44:
|
|
abs.f32 %f896, %f83;
|
|
add.f32 %f406, %f896, 0f3EE66666;
|
|
mov.b32 %r219, %f406;
|
|
setp.lt.s32 %p56, %r219, 2139095040;
|
|
@%p56 bra $L__BB0_49;
|
|
|
|
abs.f32 %f897, %f83;
|
|
setp.gtu.f32 %p57, %f897, 0f7F800000;
|
|
@%p57 bra $L__BB0_48;
|
|
bra.uni $L__BB0_46;
|
|
|
|
$L__BB0_48:
|
|
add.f32 %f977, %f83, 0f3EE66666;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_46:
|
|
abs.f32 %f898, %f83;
|
|
setp.neu.f32 %p58, %f898, 0f7F800000;
|
|
@%p58 bra $L__BB0_49;
|
|
|
|
selp.f32 %f977, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_49:
|
|
setp.eq.f32 %p59, %f83, 0f3F800000;
|
|
selp.f32 %f98, 0f3F800000, %f977, %p59;
|
|
abs.f32 %f99, %f84;
|
|
setp.lt.f32 %p60, %f99, 0f00800000;
|
|
mul.f32 %f408, %f99, 0f4B800000;
|
|
selp.f32 %f409, %f408, %f99, %p60;
|
|
selp.f32 %f410, 0fC3170000, 0fC2FE0000, %p60;
|
|
mov.b32 %r220, %f409;
|
|
and.b32 %r221, %r220, 8388607;
|
|
or.b32 %r222, %r221, 1065353216;
|
|
mov.b32 %f411, %r222;
|
|
shr.u32 %r223, %r220, 23;
|
|
cvt.rn.f32.u32 %f412, %r223;
|
|
add.f32 %f413, %f410, %f412;
|
|
setp.gt.f32 %p61, %f411, 0f3FB504F3;
|
|
mul.f32 %f414, %f411, 0f3F000000;
|
|
add.f32 %f415, %f413, 0f3F800000;
|
|
selp.f32 %f416, %f415, %f413, %p61;
|
|
selp.f32 %f417, %f414, %f411, %p61;
|
|
add.f32 %f418, %f417, 0fBF800000;
|
|
add.f32 %f419, %f417, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f420, %f419;
|
|
add.f32 %f421, %f418, %f418;
|
|
mul.f32 %f422, %f421, %f420;
|
|
mul.f32 %f423, %f422, %f422;
|
|
mov.f32 %f424, 0f3C4CAF63;
|
|
mov.f32 %f425, 0f3B18F0FE;
|
|
fma.rn.f32 %f426, %f425, %f423, %f424;
|
|
mov.f32 %f427, 0f3DAAAABD;
|
|
fma.rn.f32 %f428, %f426, %f423, %f427;
|
|
mul.rn.f32 %f429, %f428, %f423;
|
|
mul.rn.f32 %f430, %f429, %f422;
|
|
sub.f32 %f431, %f418, %f422;
|
|
add.f32 %f432, %f431, %f431;
|
|
neg.f32 %f433, %f422;
|
|
fma.rn.f32 %f434, %f433, %f418, %f432;
|
|
mul.rn.f32 %f435, %f420, %f434;
|
|
add.f32 %f436, %f430, %f422;
|
|
sub.f32 %f437, %f422, %f436;
|
|
add.f32 %f438, %f430, %f437;
|
|
add.f32 %f439, %f435, %f438;
|
|
add.f32 %f440, %f436, %f439;
|
|
sub.f32 %f441, %f436, %f440;
|
|
add.f32 %f442, %f439, %f441;
|
|
mov.f32 %f443, 0f3F317200;
|
|
mul.rn.f32 %f444, %f416, %f443;
|
|
mov.f32 %f445, 0f35BFBE8E;
|
|
mul.rn.f32 %f446, %f416, %f445;
|
|
add.f32 %f447, %f444, %f440;
|
|
sub.f32 %f448, %f444, %f447;
|
|
add.f32 %f449, %f440, %f448;
|
|
add.f32 %f450, %f442, %f449;
|
|
add.f32 %f451, %f446, %f450;
|
|
add.f32 %f452, %f447, %f451;
|
|
sub.f32 %f453, %f447, %f452;
|
|
add.f32 %f454, %f451, %f453;
|
|
mov.f32 %f455, 0f3EE66666;
|
|
mul.rn.f32 %f456, %f455, %f452;
|
|
neg.f32 %f457, %f456;
|
|
fma.rn.f32 %f458, %f455, %f452, %f457;
|
|
fma.rn.f32 %f459, %f455, %f454, %f458;
|
|
mov.f32 %f460, 0f00000000;
|
|
fma.rn.f32 %f461, %f460, %f452, %f459;
|
|
add.rn.f32 %f462, %f456, %f461;
|
|
neg.f32 %f463, %f462;
|
|
add.rn.f32 %f464, %f456, %f463;
|
|
add.rn.f32 %f465, %f464, %f461;
|
|
mov.b32 %r224, %f462;
|
|
setp.eq.s32 %p62, %r224, 1118925336;
|
|
add.s32 %r225, %r224, -1;
|
|
mov.b32 %f466, %r225;
|
|
add.f32 %f467, %f465, 0f37000000;
|
|
selp.f32 %f100, %f467, %f465, %p62;
|
|
selp.f32 %f468, %f466, %f462, %p62;
|
|
mov.f32 %f469, 0f3FB8AA3B;
|
|
mul.rn.f32 %f470, %f468, %f469;
|
|
cvt.rzi.f32.f32 %f471, %f470;
|
|
abs.f32 %f472, %f471;
|
|
setp.gt.f32 %p63, %f472, 0f42FC0000;
|
|
mov.b32 %r226, %f471;
|
|
and.b32 %r227, %r226, -2147483648;
|
|
or.b32 %r228, %r227, 1123811328;
|
|
mov.b32 %f473, %r228;
|
|
selp.f32 %f474, %f473, %f471, %p63;
|
|
mov.f32 %f475, 0fBF317218;
|
|
fma.rn.f32 %f476, %f474, %f475, %f468;
|
|
mov.f32 %f477, 0f3102E308;
|
|
fma.rn.f32 %f478, %f474, %f477, %f476;
|
|
mul.f32 %f479, %f478, 0f3FB8AA3B;
|
|
add.f32 %f480, %f474, 0f4B40007F;
|
|
mov.b32 %r229, %f480;
|
|
shl.b32 %r230, %r229, 23;
|
|
mov.b32 %f481, %r230;
|
|
ex2.approx.ftz.f32 %f482, %f479;
|
|
mul.f32 %f101, %f482, %f481;
|
|
setp.eq.f32 %p64, %f101, 0f7F800000;
|
|
mov.f32 %f978, 0f7F800000;
|
|
@%p64 bra $L__BB0_51;
|
|
|
|
fma.rn.f32 %f978, %f101, %f100, %f101;
|
|
|
|
$L__BB0_51:
|
|
setp.lt.f32 %p65, %f84, 0f00000000;
|
|
and.pred %p2, %p65, %p51;
|
|
setp.eq.f32 %p67, %f84, 0f00000000;
|
|
@%p67 bra $L__BB0_55;
|
|
bra.uni $L__BB0_52;
|
|
|
|
$L__BB0_55:
|
|
add.f32 %f487, %f84, %f84;
|
|
selp.f32 %f980, %f487, 0f00000000, %p51;
|
|
bra.uni $L__BB0_56;
|
|
|
|
$L__BB0_52:
|
|
mov.b32 %r231, %f978;
|
|
xor.b32 %r232, %r231, -2147483648;
|
|
mov.b32 %f483, %r232;
|
|
selp.f32 %f980, %f483, %f978, %p2;
|
|
setp.geu.f32 %p68, %f84, 0f00000000;
|
|
@%p68 bra $L__BB0_56;
|
|
|
|
mov.f32 %f484, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f485, %f484;
|
|
setp.eq.f32 %p69, %f485, 0f3EE66666;
|
|
@%p69 bra $L__BB0_56;
|
|
|
|
mov.f32 %f980, 0f7FFFFFFF;
|
|
|
|
$L__BB0_56:
|
|
abs.f32 %f899, %f84;
|
|
add.f32 %f488, %f899, 0f3EE66666;
|
|
mov.b32 %r233, %f488;
|
|
setp.lt.s32 %p71, %r233, 2139095040;
|
|
@%p71 bra $L__BB0_61;
|
|
|
|
abs.f32 %f900, %f84;
|
|
setp.gtu.f32 %p72, %f900, 0f7F800000;
|
|
@%p72 bra $L__BB0_60;
|
|
bra.uni $L__BB0_58;
|
|
|
|
$L__BB0_60:
|
|
add.f32 %f980, %f84, 0f3EE66666;
|
|
bra.uni $L__BB0_61;
|
|
|
|
$L__BB0_58:
|
|
abs.f32 %f901, %f84;
|
|
setp.neu.f32 %p73, %f901, 0f7F800000;
|
|
@%p73 bra $L__BB0_61;
|
|
|
|
selp.f32 %f980, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
$L__BB0_61:
|
|
setp.eq.f32 %p74, %f84, 0f3F800000;
|
|
selp.f32 %f110, 0f3F800000, %f980, %p74;
|
|
abs.f32 %f111, %f85;
|
|
setp.lt.f32 %p75, %f111, 0f00800000;
|
|
mul.f32 %f490, %f111, 0f4B800000;
|
|
selp.f32 %f491, %f490, %f111, %p75;
|
|
selp.f32 %f492, 0fC3170000, 0fC2FE0000, %p75;
|
|
mov.b32 %r234, %f491;
|
|
and.b32 %r235, %r234, 8388607;
|
|
or.b32 %r236, %r235, 1065353216;
|
|
mov.b32 %f493, %r236;
|
|
shr.u32 %r237, %r234, 23;
|
|
cvt.rn.f32.u32 %f494, %r237;
|
|
add.f32 %f495, %f492, %f494;
|
|
setp.gt.f32 %p76, %f493, 0f3FB504F3;
|
|
mul.f32 %f496, %f493, 0f3F000000;
|
|
add.f32 %f497, %f495, 0f3F800000;
|
|
selp.f32 %f498, %f497, %f495, %p76;
|
|
selp.f32 %f499, %f496, %f493, %p76;
|
|
add.f32 %f500, %f499, 0fBF800000;
|
|
add.f32 %f501, %f499, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f502, %f501;
|
|
add.f32 %f503, %f500, %f500;
|
|
mul.f32 %f504, %f503, %f502;
|
|
mul.f32 %f505, %f504, %f504;
|
|
mov.f32 %f506, 0f3C4CAF63;
|
|
mov.f32 %f507, 0f3B18F0FE;
|
|
fma.rn.f32 %f508, %f507, %f505, %f506;
|
|
mov.f32 %f509, 0f3DAAAABD;
|
|
fma.rn.f32 %f510, %f508, %f505, %f509;
|
|
mul.rn.f32 %f511, %f510, %f505;
|
|
mul.rn.f32 %f512, %f511, %f504;
|
|
sub.f32 %f513, %f500, %f504;
|
|
add.f32 %f514, %f513, %f513;
|
|
neg.f32 %f515, %f504;
|
|
fma.rn.f32 %f516, %f515, %f500, %f514;
|
|
mul.rn.f32 %f517, %f502, %f516;
|
|
add.f32 %f518, %f512, %f504;
|
|
sub.f32 %f519, %f504, %f518;
|
|
add.f32 %f520, %f512, %f519;
|
|
add.f32 %f521, %f517, %f520;
|
|
add.f32 %f522, %f518, %f521;
|
|
sub.f32 %f523, %f518, %f522;
|
|
add.f32 %f524, %f521, %f523;
|
|
mov.f32 %f525, 0f3F317200;
|
|
mul.rn.f32 %f526, %f498, %f525;
|
|
mov.f32 %f527, 0f35BFBE8E;
|
|
mul.rn.f32 %f528, %f498, %f527;
|
|
add.f32 %f529, %f526, %f522;
|
|
sub.f32 %f530, %f526, %f529;
|
|
add.f32 %f531, %f522, %f530;
|
|
add.f32 %f532, %f524, %f531;
|
|
add.f32 %f533, %f528, %f532;
|
|
add.f32 %f534, %f529, %f533;
|
|
sub.f32 %f535, %f529, %f534;
|
|
add.f32 %f536, %f533, %f535;
|
|
mov.f32 %f537, 0f3EE66666;
|
|
mul.rn.f32 %f538, %f537, %f534;
|
|
neg.f32 %f539, %f538;
|
|
fma.rn.f32 %f540, %f537, %f534, %f539;
|
|
fma.rn.f32 %f541, %f537, %f536, %f540;
|
|
mov.f32 %f542, 0f00000000;
|
|
fma.rn.f32 %f543, %f542, %f534, %f541;
|
|
add.rn.f32 %f544, %f538, %f543;
|
|
neg.f32 %f545, %f544;
|
|
add.rn.f32 %f546, %f538, %f545;
|
|
add.rn.f32 %f547, %f546, %f543;
|
|
mov.b32 %r238, %f544;
|
|
setp.eq.s32 %p77, %r238, 1118925336;
|
|
add.s32 %r239, %r238, -1;
|
|
mov.b32 %f548, %r239;
|
|
add.f32 %f549, %f547, 0f37000000;
|
|
selp.f32 %f112, %f549, %f547, %p77;
|
|
selp.f32 %f550, %f548, %f544, %p77;
|
|
mov.f32 %f551, 0f3FB8AA3B;
|
|
mul.rn.f32 %f552, %f550, %f551;
|
|
cvt.rzi.f32.f32 %f553, %f552;
|
|
abs.f32 %f554, %f553;
|
|
setp.gt.f32 %p78, %f554, 0f42FC0000;
|
|
mov.b32 %r240, %f553;
|
|
and.b32 %r241, %r240, -2147483648;
|
|
or.b32 %r242, %r241, 1123811328;
|
|
mov.b32 %f555, %r242;
|
|
selp.f32 %f556, %f555, %f553, %p78;
|
|
mov.f32 %f557, 0fBF317218;
|
|
fma.rn.f32 %f558, %f556, %f557, %f550;
|
|
mov.f32 %f559, 0f3102E308;
|
|
fma.rn.f32 %f560, %f556, %f559, %f558;
|
|
mul.f32 %f561, %f560, 0f3FB8AA3B;
|
|
add.f32 %f562, %f556, 0f4B40007F;
|
|
mov.b32 %r243, %f562;
|
|
shl.b32 %r244, %r243, 23;
|
|
mov.b32 %f563, %r244;
|
|
ex2.approx.ftz.f32 %f564, %f561;
|
|
mul.f32 %f113, %f564, %f563;
|
|
setp.eq.f32 %p79, %f113, 0f7F800000;
|
|
mov.f32 %f981, 0f7F800000;
|
|
@%p79 bra $L__BB0_63;
|
|
|
|
fma.rn.f32 %f981, %f113, %f112, %f113;
|
|
|
|
$L__BB0_63:
|
|
setp.lt.f32 %p80, %f85, 0f00000000;
|
|
and.pred %p3, %p80, %p51;
|
|
setp.eq.f32 %p82, %f85, 0f00000000;
|
|
@%p82 bra $L__BB0_67;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_67:
|
|
add.f32 %f569, %f85, %f85;
|
|
selp.f32 %f983, %f569, 0f00000000, %p51;
|
|
bra.uni $L__BB0_68;
|
|
|
|
$L__BB0_64:
|
|
mov.b32 %r245, %f981;
|
|
xor.b32 %r246, %r245, -2147483648;
|
|
mov.b32 %f565, %r246;
|
|
selp.f32 %f983, %f565, %f981, %p3;
|
|
setp.geu.f32 %p83, %f85, 0f00000000;
|
|
@%p83 bra $L__BB0_68;
|
|
|
|
mov.f32 %f566, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f567, %f566;
|
|
setp.eq.f32 %p84, %f567, 0f3EE66666;
|
|
@%p84 bra $L__BB0_68;
|
|
|
|
mov.f32 %f983, 0f7FFFFFFF;
|
|
|
|
$L__BB0_68:
|
|
abs.f32 %f902, %f85;
|
|
add.f32 %f570, %f902, 0f3EE66666;
|
|
mov.b32 %r247, %f570;
|
|
setp.lt.s32 %p86, %r247, 2139095040;
|
|
@%p86 bra $L__BB0_73;
|
|
|
|
abs.f32 %f903, %f85;
|
|
setp.gtu.f32 %p87, %f903, 0f7F800000;
|
|
@%p87 bra $L__BB0_72;
|
|
bra.uni $L__BB0_70;
|
|
|
|
$L__BB0_72:
|
|
add.f32 %f983, %f85, 0f3EE66666;
|
|
bra.uni $L__BB0_73;
|
|
|
|
$L__BB0_70:
|
|
abs.f32 %f904, %f85;
|
|
setp.neu.f32 %p88, %f904, 0f7F800000;
|
|
@%p88 bra $L__BB0_73;
|
|
|
|
selp.f32 %f983, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_73:
|
|
setp.eq.f32 %p89, %f85, 0f3F800000;
|
|
mov.f32 %f572, 0f3F800000;
|
|
selp.f32 %f573, 0f3F800000, %f983, %p89;
|
|
min.f32 %f574, %f98, %f572;
|
|
mov.f32 %f575, 0f00000000;
|
|
max.f32 %f122, %f575, %f574;
|
|
min.f32 %f576, %f110, %f572;
|
|
max.f32 %f123, %f575, %f576;
|
|
min.f32 %f577, %f573, %f572;
|
|
max.f32 %f124, %f575, %f577;
|
|
mov.f32 %f581, 0f3ED55555;
|
|
abs.f32 %f126, %f122;
|
|
setp.lt.f32 %p90, %f126, 0f00800000;
|
|
mul.f32 %f583, %f126, 0f4B800000;
|
|
selp.f32 %f584, %f583, %f126, %p90;
|
|
selp.f32 %f585, 0fC3170000, 0fC2FE0000, %p90;
|
|
mov.b32 %r250, %f584;
|
|
and.b32 %r251, %r250, 8388607;
|
|
or.b32 %r252, %r251, 1065353216;
|
|
mov.b32 %f586, %r252;
|
|
shr.u32 %r253, %r250, 23;
|
|
cvt.rn.f32.u32 %f587, %r253;
|
|
add.f32 %f588, %f585, %f587;
|
|
setp.gt.f32 %p91, %f586, 0f3FB504F3;
|
|
mul.f32 %f589, %f586, 0f3F000000;
|
|
add.f32 %f590, %f588, 0f3F800000;
|
|
selp.f32 %f591, %f590, %f588, %p91;
|
|
selp.f32 %f592, %f589, %f586, %p91;
|
|
add.f32 %f593, %f592, 0fBF800000;
|
|
add.f32 %f594, %f592, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f595, %f594;
|
|
add.f32 %f596, %f593, %f593;
|
|
mul.f32 %f597, %f596, %f595;
|
|
mul.f32 %f598, %f597, %f597;
|
|
mov.f32 %f599, 0f3C4CAF63;
|
|
mov.f32 %f600, 0f3B18F0FE;
|
|
fma.rn.f32 %f601, %f600, %f598, %f599;
|
|
mov.f32 %f602, 0f3DAAAABD;
|
|
fma.rn.f32 %f603, %f601, %f598, %f602;
|
|
mul.rn.f32 %f604, %f603, %f598;
|
|
mul.rn.f32 %f605, %f604, %f597;
|
|
sub.f32 %f606, %f593, %f597;
|
|
add.f32 %f607, %f606, %f606;
|
|
neg.f32 %f608, %f597;
|
|
fma.rn.f32 %f609, %f608, %f593, %f607;
|
|
mul.rn.f32 %f610, %f595, %f609;
|
|
add.f32 %f611, %f605, %f597;
|
|
sub.f32 %f612, %f597, %f611;
|
|
add.f32 %f613, %f605, %f612;
|
|
add.f32 %f614, %f610, %f613;
|
|
add.f32 %f615, %f611, %f614;
|
|
sub.f32 %f616, %f611, %f615;
|
|
add.f32 %f617, %f614, %f616;
|
|
mov.f32 %f618, 0f3F317200;
|
|
mul.rn.f32 %f619, %f591, %f618;
|
|
mov.f32 %f620, 0f35BFBE8E;
|
|
mul.rn.f32 %f621, %f591, %f620;
|
|
add.f32 %f622, %f619, %f615;
|
|
sub.f32 %f623, %f619, %f622;
|
|
add.f32 %f624, %f615, %f623;
|
|
add.f32 %f625, %f617, %f624;
|
|
add.f32 %f626, %f621, %f625;
|
|
add.f32 %f627, %f622, %f626;
|
|
sub.f32 %f628, %f622, %f627;
|
|
add.f32 %f629, %f626, %f628;
|
|
mul.rn.f32 %f630, %f581, %f627;
|
|
neg.f32 %f631, %f630;
|
|
fma.rn.f32 %f632, %f581, %f627, %f631;
|
|
fma.rn.f32 %f633, %f581, %f629, %f632;
|
|
fma.rn.f32 %f634, %f575, %f627, %f633;
|
|
add.rn.f32 %f635, %f630, %f634;
|
|
neg.f32 %f636, %f635;
|
|
add.rn.f32 %f637, %f630, %f636;
|
|
add.rn.f32 %f638, %f637, %f634;
|
|
mov.b32 %r254, %f635;
|
|
setp.eq.s32 %p92, %r254, 1118925336;
|
|
add.s32 %r255, %r254, -1;
|
|
mov.b32 %f639, %r255;
|
|
add.f32 %f640, %f638, 0f37000000;
|
|
selp.f32 %f127, %f640, %f638, %p92;
|
|
selp.f32 %f641, %f639, %f635, %p92;
|
|
mov.f32 %f642, 0f3FB8AA3B;
|
|
mul.rn.f32 %f643, %f641, %f642;
|
|
cvt.rzi.f32.f32 %f644, %f643;
|
|
abs.f32 %f645, %f644;
|
|
setp.gt.f32 %p93, %f645, 0f42FC0000;
|
|
mov.b32 %r256, %f644;
|
|
and.b32 %r257, %r256, -2147483648;
|
|
or.b32 %r258, %r257, 1123811328;
|
|
mov.b32 %f646, %r258;
|
|
selp.f32 %f647, %f646, %f644, %p93;
|
|
mov.f32 %f648, 0fBF317218;
|
|
fma.rn.f32 %f649, %f647, %f648, %f641;
|
|
mov.f32 %f650, 0f3102E308;
|
|
fma.rn.f32 %f651, %f647, %f650, %f649;
|
|
mul.f32 %f652, %f651, 0f3FB8AA3B;
|
|
add.f32 %f653, %f647, 0f4B40007F;
|
|
mov.b32 %r259, %f653;
|
|
shl.b32 %r260, %r259, 23;
|
|
mov.b32 %f654, %r260;
|
|
ex2.approx.ftz.f32 %f655, %f652;
|
|
mul.f32 %f128, %f655, %f654;
|
|
setp.eq.f32 %p94, %f128, 0f7F800000;
|
|
mov.f32 %f984, 0f7F800000;
|
|
@%p94 bra $L__BB0_75;
|
|
|
|
fma.rn.f32 %f984, %f128, %f127, %f128;
|
|
|
|
$L__BB0_75:
|
|
mov.f32 %f924, 0f00000000;
|
|
max.f32 %f923, %f924, %f574;
|
|
mov.f32 %f888, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f887, %f888;
|
|
add.f32 %f886, %f887, %f887;
|
|
mov.f32 %f885, 0f3ED55555;
|
|
sub.f32 %f884, %f885, %f886;
|
|
abs.f32 %f883, %f884;
|
|
setp.lt.f32 %p95, %f923, 0f00000000;
|
|
setp.eq.f32 %p96, %f883, 0f3F800000;
|
|
and.pred %p4, %p95, %p96;
|
|
setp.eq.f32 %p97, %f923, 0f00000000;
|
|
@%p97 bra $L__BB0_79;
|
|
bra.uni $L__BB0_76;
|
|
|
|
$L__BB0_79:
|
|
mov.f32 %f941, 0f00000000;
|
|
max.f32 %f940, %f941, %f574;
|
|
add.f32 %f660, %f940, %f940;
|
|
selp.f32 %f986, %f660, 0f00000000, %p96;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_76:
|
|
mov.f32 %f926, 0f00000000;
|
|
max.f32 %f925, %f926, %f574;
|
|
mov.b32 %r261, %f984;
|
|
xor.b32 %r262, %r261, -2147483648;
|
|
mov.b32 %f656, %r262;
|
|
selp.f32 %f986, %f656, %f984, %p4;
|
|
setp.geu.f32 %p98, %f925, 0f00000000;
|
|
@%p98 bra $L__BB0_80;
|
|
|
|
mov.f32 %f657, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f658, %f657;
|
|
setp.eq.f32 %p99, %f658, 0f3ED55555;
|
|
@%p99 bra $L__BB0_80;
|
|
|
|
mov.f32 %f986, 0f7FFFFFFF;
|
|
|
|
$L__BB0_80:
|
|
mov.f32 %f929, 0f00000000;
|
|
max.f32 %f928, %f929, %f574;
|
|
abs.f32 %f927, %f928;
|
|
add.f32 %f661, %f927, 0f3ED55555;
|
|
mov.b32 %r263, %f661;
|
|
setp.lt.s32 %p101, %r263, 2139095040;
|
|
@%p101 bra $L__BB0_85;
|
|
|
|
mov.f32 %f934, 0f00000000;
|
|
max.f32 %f933, %f934, %f574;
|
|
abs.f32 %f932, %f933;
|
|
setp.gtu.f32 %p102, %f932, 0f7F800000;
|
|
@%p102 bra $L__BB0_84;
|
|
bra.uni $L__BB0_82;
|
|
|
|
$L__BB0_84:
|
|
mov.f32 %f939, 0f00000000;
|
|
max.f32 %f938, %f939, %f574;
|
|
add.f32 %f986, %f938, 0f3ED55555;
|
|
bra.uni $L__BB0_85;
|
|
|
|
$L__BB0_82:
|
|
mov.f32 %f937, 0f00000000;
|
|
max.f32 %f936, %f937, %f574;
|
|
abs.f32 %f935, %f936;
|
|
setp.neu.f32 %p103, %f935, 0f7F800000;
|
|
@%p103 bra $L__BB0_85;
|
|
|
|
selp.f32 %f986, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_85:
|
|
abs.f32 %f137, %f123;
|
|
setp.lt.f32 %p104, %f137, 0f00800000;
|
|
mul.f32 %f663, %f137, 0f4B800000;
|
|
selp.f32 %f664, %f663, %f137, %p104;
|
|
selp.f32 %f665, 0fC3170000, 0fC2FE0000, %p104;
|
|
mov.b32 %r264, %f664;
|
|
and.b32 %r265, %r264, 8388607;
|
|
or.b32 %r266, %r265, 1065353216;
|
|
mov.b32 %f666, %r266;
|
|
shr.u32 %r267, %r264, 23;
|
|
cvt.rn.f32.u32 %f667, %r267;
|
|
add.f32 %f668, %f665, %f667;
|
|
setp.gt.f32 %p105, %f666, 0f3FB504F3;
|
|
mul.f32 %f669, %f666, 0f3F000000;
|
|
add.f32 %f670, %f668, 0f3F800000;
|
|
selp.f32 %f671, %f670, %f668, %p105;
|
|
selp.f32 %f672, %f669, %f666, %p105;
|
|
add.f32 %f673, %f672, 0fBF800000;
|
|
add.f32 %f674, %f672, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f675, %f674;
|
|
add.f32 %f676, %f673, %f673;
|
|
mul.f32 %f677, %f676, %f675;
|
|
mul.f32 %f678, %f677, %f677;
|
|
mov.f32 %f679, 0f3C4CAF63;
|
|
mov.f32 %f680, 0f3B18F0FE;
|
|
fma.rn.f32 %f681, %f680, %f678, %f679;
|
|
mov.f32 %f682, 0f3DAAAABD;
|
|
fma.rn.f32 %f683, %f681, %f678, %f682;
|
|
mul.rn.f32 %f684, %f683, %f678;
|
|
mul.rn.f32 %f685, %f684, %f677;
|
|
sub.f32 %f686, %f673, %f677;
|
|
add.f32 %f687, %f686, %f686;
|
|
neg.f32 %f688, %f677;
|
|
fma.rn.f32 %f689, %f688, %f673, %f687;
|
|
mul.rn.f32 %f690, %f675, %f689;
|
|
add.f32 %f691, %f685, %f677;
|
|
sub.f32 %f692, %f677, %f691;
|
|
add.f32 %f693, %f685, %f692;
|
|
add.f32 %f694, %f690, %f693;
|
|
add.f32 %f695, %f691, %f694;
|
|
sub.f32 %f696, %f691, %f695;
|
|
add.f32 %f697, %f694, %f696;
|
|
mov.f32 %f698, 0f3F317200;
|
|
mul.rn.f32 %f699, %f671, %f698;
|
|
mov.f32 %f700, 0f35BFBE8E;
|
|
mul.rn.f32 %f701, %f671, %f700;
|
|
add.f32 %f702, %f699, %f695;
|
|
sub.f32 %f703, %f699, %f702;
|
|
add.f32 %f704, %f695, %f703;
|
|
add.f32 %f705, %f697, %f704;
|
|
add.f32 %f706, %f701, %f705;
|
|
add.f32 %f707, %f702, %f706;
|
|
sub.f32 %f708, %f702, %f707;
|
|
add.f32 %f709, %f706, %f708;
|
|
mov.f32 %f710, 0f3ED55555;
|
|
mul.rn.f32 %f711, %f710, %f707;
|
|
neg.f32 %f712, %f711;
|
|
fma.rn.f32 %f713, %f710, %f707, %f712;
|
|
fma.rn.f32 %f714, %f710, %f709, %f713;
|
|
mov.f32 %f715, 0f00000000;
|
|
fma.rn.f32 %f716, %f715, %f707, %f714;
|
|
add.rn.f32 %f717, %f711, %f716;
|
|
neg.f32 %f718, %f717;
|
|
add.rn.f32 %f719, %f711, %f718;
|
|
add.rn.f32 %f720, %f719, %f716;
|
|
mov.b32 %r268, %f717;
|
|
setp.eq.s32 %p106, %r268, 1118925336;
|
|
add.s32 %r269, %r268, -1;
|
|
mov.b32 %f721, %r269;
|
|
add.f32 %f722, %f720, 0f37000000;
|
|
selp.f32 %f138, %f722, %f720, %p106;
|
|
selp.f32 %f723, %f721, %f717, %p106;
|
|
mov.f32 %f724, 0f3FB8AA3B;
|
|
mul.rn.f32 %f725, %f723, %f724;
|
|
cvt.rzi.f32.f32 %f726, %f725;
|
|
abs.f32 %f727, %f726;
|
|
setp.gt.f32 %p107, %f727, 0f42FC0000;
|
|
mov.b32 %r270, %f726;
|
|
and.b32 %r271, %r270, -2147483648;
|
|
or.b32 %r272, %r271, 1123811328;
|
|
mov.b32 %f728, %r272;
|
|
selp.f32 %f729, %f728, %f726, %p107;
|
|
mov.f32 %f730, 0fBF317218;
|
|
fma.rn.f32 %f731, %f729, %f730, %f723;
|
|
mov.f32 %f732, 0f3102E308;
|
|
fma.rn.f32 %f733, %f729, %f732, %f731;
|
|
mul.f32 %f734, %f733, 0f3FB8AA3B;
|
|
add.f32 %f735, %f729, 0f4B40007F;
|
|
mov.b32 %r273, %f735;
|
|
shl.b32 %r274, %r273, 23;
|
|
mov.b32 %f736, %r274;
|
|
ex2.approx.ftz.f32 %f737, %f734;
|
|
mul.f32 %f139, %f737, %f736;
|
|
setp.eq.f32 %p108, %f139, 0f7F800000;
|
|
mov.f32 %f987, 0f7F800000;
|
|
@%p108 bra $L__BB0_87;
|
|
|
|
fma.rn.f32 %f987, %f139, %f138, %f139;
|
|
|
|
$L__BB0_87:
|
|
setp.lt.f32 %p109, %f123, 0f00000000;
|
|
and.pred %p5, %p109, %p96;
|
|
setp.eq.f32 %p111, %f123, 0f00000000;
|
|
@%p111 bra $L__BB0_91;
|
|
bra.uni $L__BB0_88;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f742, %f123, %f123;
|
|
selp.f32 %f989, %f742, 0f00000000, %p96;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_88:
|
|
mov.b32 %r275, %f987;
|
|
xor.b32 %r276, %r275, -2147483648;
|
|
mov.b32 %f738, %r276;
|
|
selp.f32 %f989, %f738, %f987, %p5;
|
|
setp.geu.f32 %p112, %f123, 0f00000000;
|
|
@%p112 bra $L__BB0_92;
|
|
|
|
mov.f32 %f739, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f740, %f739;
|
|
setp.eq.f32 %p113, %f740, 0f3ED55555;
|
|
@%p113 bra $L__BB0_92;
|
|
|
|
mov.f32 %f989, 0f7FFFFFFF;
|
|
|
|
$L__BB0_92:
|
|
mov.f32 %f907, 0f00000000;
|
|
max.f32 %f906, %f907, %f576;
|
|
abs.f32 %f905, %f906;
|
|
add.f32 %f743, %f905, 0f3ED55555;
|
|
mov.b32 %r277, %f743;
|
|
setp.lt.s32 %p115, %r277, 2139095040;
|
|
@%p115 bra $L__BB0_97;
|
|
|
|
mov.f32 %f910, 0f00000000;
|
|
max.f32 %f909, %f910, %f576;
|
|
abs.f32 %f908, %f909;
|
|
setp.gtu.f32 %p116, %f908, 0f7F800000;
|
|
@%p116 bra $L__BB0_96;
|
|
bra.uni $L__BB0_94;
|
|
|
|
$L__BB0_96:
|
|
add.f32 %f989, %f123, 0f3ED55555;
|
|
bra.uni $L__BB0_97;
|
|
|
|
$L__BB0_94:
|
|
mov.f32 %f913, 0f00000000;
|
|
max.f32 %f912, %f913, %f576;
|
|
abs.f32 %f911, %f912;
|
|
setp.neu.f32 %p117, %f911, 0f7F800000;
|
|
@%p117 bra $L__BB0_97;
|
|
|
|
selp.f32 %f989, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_97:
|
|
abs.f32 %f148, %f124;
|
|
setp.lt.f32 %p118, %f148, 0f00800000;
|
|
mul.f32 %f745, %f148, 0f4B800000;
|
|
selp.f32 %f746, %f745, %f148, %p118;
|
|
selp.f32 %f747, 0fC3170000, 0fC2FE0000, %p118;
|
|
mov.b32 %r278, %f746;
|
|
and.b32 %r279, %r278, 8388607;
|
|
or.b32 %r280, %r279, 1065353216;
|
|
mov.b32 %f748, %r280;
|
|
shr.u32 %r281, %r278, 23;
|
|
cvt.rn.f32.u32 %f749, %r281;
|
|
add.f32 %f750, %f747, %f749;
|
|
setp.gt.f32 %p119, %f748, 0f3FB504F3;
|
|
mul.f32 %f751, %f748, 0f3F000000;
|
|
add.f32 %f752, %f750, 0f3F800000;
|
|
selp.f32 %f753, %f752, %f750, %p119;
|
|
selp.f32 %f754, %f751, %f748, %p119;
|
|
add.f32 %f755, %f754, 0fBF800000;
|
|
add.f32 %f756, %f754, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f757, %f756;
|
|
add.f32 %f758, %f755, %f755;
|
|
mul.f32 %f759, %f758, %f757;
|
|
mul.f32 %f760, %f759, %f759;
|
|
mov.f32 %f761, 0f3C4CAF63;
|
|
mov.f32 %f762, 0f3B18F0FE;
|
|
fma.rn.f32 %f763, %f762, %f760, %f761;
|
|
mov.f32 %f764, 0f3DAAAABD;
|
|
fma.rn.f32 %f765, %f763, %f760, %f764;
|
|
mul.rn.f32 %f766, %f765, %f760;
|
|
mul.rn.f32 %f767, %f766, %f759;
|
|
sub.f32 %f768, %f755, %f759;
|
|
add.f32 %f769, %f768, %f768;
|
|
neg.f32 %f770, %f759;
|
|
fma.rn.f32 %f771, %f770, %f755, %f769;
|
|
mul.rn.f32 %f772, %f757, %f771;
|
|
add.f32 %f773, %f767, %f759;
|
|
sub.f32 %f774, %f759, %f773;
|
|
add.f32 %f775, %f767, %f774;
|
|
add.f32 %f776, %f772, %f775;
|
|
add.f32 %f777, %f773, %f776;
|
|
sub.f32 %f778, %f773, %f777;
|
|
add.f32 %f779, %f776, %f778;
|
|
mov.f32 %f780, 0f3F317200;
|
|
mul.rn.f32 %f781, %f753, %f780;
|
|
mov.f32 %f782, 0f35BFBE8E;
|
|
mul.rn.f32 %f783, %f753, %f782;
|
|
add.f32 %f784, %f781, %f777;
|
|
sub.f32 %f785, %f781, %f784;
|
|
add.f32 %f786, %f777, %f785;
|
|
add.f32 %f787, %f779, %f786;
|
|
add.f32 %f788, %f783, %f787;
|
|
add.f32 %f789, %f784, %f788;
|
|
sub.f32 %f790, %f784, %f789;
|
|
add.f32 %f791, %f788, %f790;
|
|
mov.f32 %f792, 0f3ED55555;
|
|
mul.rn.f32 %f793, %f792, %f789;
|
|
neg.f32 %f794, %f793;
|
|
fma.rn.f32 %f795, %f792, %f789, %f794;
|
|
fma.rn.f32 %f796, %f792, %f791, %f795;
|
|
mov.f32 %f797, 0f00000000;
|
|
fma.rn.f32 %f798, %f797, %f789, %f796;
|
|
add.rn.f32 %f799, %f793, %f798;
|
|
neg.f32 %f800, %f799;
|
|
add.rn.f32 %f801, %f793, %f800;
|
|
add.rn.f32 %f802, %f801, %f798;
|
|
mov.b32 %r282, %f799;
|
|
setp.eq.s32 %p120, %r282, 1118925336;
|
|
add.s32 %r283, %r282, -1;
|
|
mov.b32 %f803, %r283;
|
|
add.f32 %f804, %f802, 0f37000000;
|
|
selp.f32 %f149, %f804, %f802, %p120;
|
|
selp.f32 %f805, %f803, %f799, %p120;
|
|
mov.f32 %f806, 0f3FB8AA3B;
|
|
mul.rn.f32 %f807, %f805, %f806;
|
|
cvt.rzi.f32.f32 %f808, %f807;
|
|
abs.f32 %f809, %f808;
|
|
setp.gt.f32 %p121, %f809, 0f42FC0000;
|
|
mov.b32 %r284, %f808;
|
|
and.b32 %r285, %r284, -2147483648;
|
|
or.b32 %r286, %r285, 1123811328;
|
|
mov.b32 %f810, %r286;
|
|
selp.f32 %f811, %f810, %f808, %p121;
|
|
mov.f32 %f812, 0fBF317218;
|
|
fma.rn.f32 %f813, %f811, %f812, %f805;
|
|
mov.f32 %f814, 0f3102E308;
|
|
fma.rn.f32 %f815, %f811, %f814, %f813;
|
|
mul.f32 %f816, %f815, 0f3FB8AA3B;
|
|
add.f32 %f817, %f811, 0f4B40007F;
|
|
mov.b32 %r287, %f817;
|
|
shl.b32 %r288, %r287, 23;
|
|
mov.b32 %f818, %r288;
|
|
ex2.approx.ftz.f32 %f819, %f816;
|
|
mul.f32 %f150, %f819, %f818;
|
|
setp.eq.f32 %p122, %f150, 0f7F800000;
|
|
mov.f32 %f990, 0f7F800000;
|
|
@%p122 bra $L__BB0_99;
|
|
|
|
fma.rn.f32 %f990, %f150, %f149, %f150;
|
|
|
|
$L__BB0_99:
|
|
setp.lt.f32 %p123, %f124, 0f00000000;
|
|
and.pred %p6, %p123, %p96;
|
|
setp.eq.f32 %p125, %f124, 0f00000000;
|
|
@%p125 bra $L__BB0_103;
|
|
bra.uni $L__BB0_100;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f824, %f124, %f124;
|
|
selp.f32 %f992, %f824, 0f00000000, %p96;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_100:
|
|
mov.b32 %r289, %f990;
|
|
xor.b32 %r290, %r289, -2147483648;
|
|
mov.b32 %f820, %r290;
|
|
selp.f32 %f992, %f820, %f990, %p6;
|
|
setp.geu.f32 %p126, %f124, 0f00000000;
|
|
@%p126 bra $L__BB0_104;
|
|
|
|
mov.f32 %f821, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f822, %f821;
|
|
setp.eq.f32 %p127, %f822, 0f3ED55555;
|
|
@%p127 bra $L__BB0_104;
|
|
|
|
mov.f32 %f992, 0f7FFFFFFF;
|
|
|
|
$L__BB0_104:
|
|
mov.f32 %f916, 0f00000000;
|
|
max.f32 %f915, %f916, %f577;
|
|
abs.f32 %f914, %f915;
|
|
add.f32 %f825, %f914, 0f3ED55555;
|
|
mov.b32 %r291, %f825;
|
|
setp.lt.s32 %p129, %r291, 2139095040;
|
|
@%p129 bra $L__BB0_109;
|
|
|
|
mov.f32 %f919, 0f00000000;
|
|
max.f32 %f918, %f919, %f577;
|
|
abs.f32 %f917, %f918;
|
|
setp.gtu.f32 %p130, %f917, 0f7F800000;
|
|
@%p130 bra $L__BB0_108;
|
|
bra.uni $L__BB0_106;
|
|
|
|
$L__BB0_108:
|
|
add.f32 %f992, %f124, 0f3ED55555;
|
|
bra.uni $L__BB0_109;
|
|
|
|
$L__BB0_106:
|
|
mov.f32 %f922, 0f00000000;
|
|
max.f32 %f921, %f922, %f577;
|
|
abs.f32 %f920, %f921;
|
|
setp.neu.f32 %p131, %f920, 0f7F800000;
|
|
@%p131 bra $L__BB0_109;
|
|
|
|
selp.f32 %f992, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_109:
|
|
mov.f32 %f931, 0f00000000;
|
|
max.f32 %f930, %f931, %f574;
|
|
ld.const.u64 %rd80, [params+144];
|
|
cvta.to.global.u64 %rd79, %rd80;
|
|
ld.const.u32 %r319, [params+136];
|
|
mad.lo.s32 %r318, %r319, %r5, %r4;
|
|
cvt.u64.u32 %rd78, %r318;
|
|
fma.rn.f32 %f826, %f986, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p132, %f930, 0f3F800000;
|
|
mov.f32 %f827, 0f3F800000;
|
|
selp.f32 %f828, 0f3F7FFFFF, %f826, %p132;
|
|
mul.f32 %f829, %f930, 0f414EB852;
|
|
setp.lt.f32 %p133, %f930, 0f3B4D2E1C;
|
|
selp.f32 %f830, %f829, %f828, %p133;
|
|
fma.rn.f32 %f831, %f989, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p134, %f123, 0f3F800000;
|
|
selp.f32 %f832, 0f3F7FFFFF, %f831, %p134;
|
|
mul.f32 %f833, %f123, 0f414EB852;
|
|
setp.lt.f32 %p135, %f123, 0f3B4D2E1C;
|
|
selp.f32 %f834, %f833, %f832, %p135;
|
|
fma.rn.f32 %f835, %f992, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p136, %f124, 0f3F800000;
|
|
selp.f32 %f836, 0f3F7FFFFF, %f835, %p136;
|
|
mul.f32 %f837, %f124, 0f414EB852;
|
|
setp.lt.f32 %p137, %f124, 0f3B4D2E1C;
|
|
selp.f32 %f838, %f837, %f836, %p137;
|
|
min.f32 %f839, %f830, %f827;
|
|
mov.f32 %f840, 0f00000000;
|
|
max.f32 %f841, %f840, %f839;
|
|
mul.f32 %f842, %f841, 0f43800000;
|
|
cvt.rzi.u32.f32 %r292, %f842;
|
|
min.u32 %r293, %r292, 255;
|
|
min.f32 %f843, %f834, %f827;
|
|
max.f32 %f844, %f840, %f843;
|
|
mul.f32 %f845, %f844, 0f43800000;
|
|
cvt.rzi.u32.f32 %r294, %f845;
|
|
min.u32 %r295, %r294, 255;
|
|
min.f32 %f846, %f838, %f827;
|
|
max.f32 %f847, %f840, %f846;
|
|
mul.f32 %f848, %f847, 0f43800000;
|
|
cvt.rzi.u32.f32 %r296, %f848;
|
|
min.u32 %r297, %r296, 255;
|
|
shl.b64 %rd58, %rd78, 2;
|
|
add.s64 %rd59, %rd79, %rd58;
|
|
cvt.u16.u32 %rs15, %r297;
|
|
cvt.u16.u32 %rs16, %r295;
|
|
cvt.u16.u32 %rs17, %r293;
|
|
mov.u16 %rs18, 255;
|
|
st.global.v4.u8 [%rd59], {%rs17, %rs16, %rs15, %rs18};
|
|
|
|
$L__BB0_110:
|
|
ld.const.u32 %r320, [params+104];
|
|
and.b32 %r298, %r320, 4;
|
|
setp.eq.s32 %p138, %r298, 0;
|
|
@%p138 bra $L__BB0_114;
|
|
|
|
ld.const.u32 %r299, [params+108];
|
|
setp.eq.s32 %p139, %r299, 0;
|
|
ld.const.u64 %rd60, [params+224];
|
|
cvta.to.global.u64 %rd61, %rd60;
|
|
ld.const.u32 %r300, [params+216];
|
|
mad.lo.s32 %r301, %r300, %r5, %r4;
|
|
mul.wide.u32 %rd62, %r301, 8;
|
|
add.s64 %rd19, %rd61, %rd62;
|
|
@%p139 bra $L__BB0_113;
|
|
|
|
ld.global.v4.u16 {%rs26, %rs27, %rs28, %rs29}, [%rd19];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f849, %rs26;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f850, %rs27;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f851, %rs28;}
|
|
|
|
// end inline asm
|
|
add.f32 %f852, %f83, %f849;
|
|
add.f32 %f853, %f84, %f850;
|
|
add.f32 %f854, %f85, %f851;
|
|
mov.f32 %f855, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f854;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f853;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs22, %f852;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f855;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd19], {%rs22, %rs23, %rs24, %rs25};
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_113:
|
|
mov.f32 %f859, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f859;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f85;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f84;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f83;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd19], {%rs30, %rs31, %rs32, %rs33};
|
|
|
|
$L__BB0_114:
|
|
ld.const.u32 %r321, [params+104];
|
|
and.b32 %r302, %r321, 64;
|
|
setp.eq.s32 %p140, %r302, 0;
|
|
@%p140 bra $L__BB0_124;
|
|
|
|
mul.f32 %f860, %f964, %f964;
|
|
fma.rn.f32 %f861, %f963, %f963, %f860;
|
|
fma.rn.f32 %f862, %f965, %f965, %f861;
|
|
sqrt.rn.f32 %f863, %f862;
|
|
rcp.rn.f32 %f864, %f863;
|
|
mul.f32 %f865, %f963, %f864;
|
|
mul.f32 %f866, %f964, %f864;
|
|
mul.f32 %f867, %f965, %f864;
|
|
ld.const.u64 %rd63, [params+208];
|
|
cvta.to.global.u64 %rd64, %rd63;
|
|
ld.const.u32 %r303, [params+200];
|
|
mad.lo.s32 %r304, %r303, %r5, %r4;
|
|
fma.rn.f32 %f868, %f865, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f869, %f868, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r305, %f869;
|
|
fma.rn.f32 %f870, %f866, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f871, %f870, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r306, %f871;
|
|
fma.rn.f32 %f872, %f867, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f873, %f872, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r307, %f873;
|
|
mul.wide.u32 %rd65, %r304, 4;
|
|
add.s64 %rd66, %rd64, %rd65;
|
|
cvt.u16.u32 %rs34, %r307;
|
|
cvt.u16.u32 %rs35, %r306;
|
|
cvt.u16.u32 %rs36, %r305;
|
|
mov.u16 %rs37, 255;
|
|
st.global.v4.u8 [%rd66], {%rs36, %rs35, %rs34, %rs37};
|
|
|
|
$L__BB0_124:
|
|
ret;
|
|
|
|
}
|
|
|