1668 lines
46 KiB
Plaintext
1668 lines
46 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<146>;
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.reg .b16 %rs<52>;
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.reg .f32 %f<919>;
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.reg .b32 %r<323>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<77>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r51), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r52), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+540];
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ld.const.u64 %rd21, [params+400];
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cvta.to.global.u64 %rd22, %rd21;
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ld.const.u32 %r57, [params+392];
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mad.lo.s32 %r58, %r57, %r52, %r51;
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mul.wide.u32 %rd23, %r58, 4;
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add.s64 %rd2, %rd22, %rd23;
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ld.global.v2.u8 {%rs7, %rs51}, [%rd2];
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or.b16 %rs9, %rs7, %rs51;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p7, %rs10, 0;
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@%p7 bra $L__BB0_2;
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ld.global.u8 %rs50, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs50, [%rd2+2];
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setp.eq.s16 %p8, %rs50, 0;
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mov.f32 %f880, 0f00000000;
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mov.u16 %rs51, 0;
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mov.f32 %f881, %f880;
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mov.f32 %f882, %f880;
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@%p8 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f146, %rs7;
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div.rn.f32 %f147, %f146, 0f437F0000;
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fma.rn.f32 %f148, %f147, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs51, 255;
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cvt.rn.f32.u16 %f149, %rs13;
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div.rn.f32 %f150, %f149, 0f437F0000;
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fma.rn.f32 %f151, %f150, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f152, %rs50;
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div.rn.f32 %f153, %f152, 0f437F0000;
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fma.rn.f32 %f154, %f153, 0f40000000, 0fBF800000;
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mul.f32 %f155, %f151, %f151;
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fma.rn.f32 %f156, %f148, %f148, %f155;
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fma.rn.f32 %f157, %f154, %f154, %f156;
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sqrt.rn.f32 %f158, %f157;
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rcp.rn.f32 %f159, %f158;
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mul.f32 %f882, %f159, %f154;
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mul.f32 %f881, %f159, %f151;
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mul.f32 %f880, %f148, %f159;
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$L__BB0_4:
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ld.const.v2.u32 {%r59, %r60}, [params];
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add.s32 %r4, %r59, %r51;
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add.s32 %r5, %r60, %r52;
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setp.eq.f32 %p9, %f880, 0f00000000;
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setp.eq.f32 %p10, %f881, 0f00000000;
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and.pred %p11, %p9, %p10;
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setp.eq.f32 %p12, %f882, 0f00000000;
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and.pred %p13, %p12, %p11;
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@%p13 bra $L__BB0_114;
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bra.uni $L__BB0_5;
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$L__BB0_114:
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ld.const.u32 %r50, [params+104];
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and.b32 %r302, %r50, 1;
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setp.eq.b32 %p140, %r302, 1;
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mov.pred %p141, 0;
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xor.pred %p142, %p140, %p141;
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not.pred %p143, %p142;
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@%p143 bra $L__BB0_116;
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ld.const.u64 %rd62, [params+144];
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cvta.to.global.u64 %rd63, %rd62;
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ld.const.u32 %r303, [params+136];
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mad.lo.s32 %r304, %r303, %r5, %r4;
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mul.wide.u32 %rd64, %r304, 4;
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add.s64 %rd65, %rd63, %rd64;
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mov.u16 %rs34, 0;
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st.global.v4.u8 [%rd65], {%rs34, %rs34, %rs34, %rs34};
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$L__BB0_116:
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and.b32 %r305, %r50, 4;
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setp.eq.s32 %p144, %r305, 0;
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@%p144 bra $L__BB0_120;
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ld.const.u32 %r306, [params+108];
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setp.eq.s32 %p145, %r306, 0;
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ld.const.u64 %rd66, [params+224];
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cvta.to.global.u64 %rd67, %rd66;
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ld.const.u32 %r307, [params+216];
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mad.lo.s32 %r308, %r307, %r5, %r4;
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mul.wide.u32 %rd68, %r308, 8;
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add.s64 %rd19, %rd67, %rd68;
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@%p145 bra $L__BB0_119;
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ld.global.v4.u16 {%rs41, %rs42, %rs43, %rs44}, [%rd19];
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// begin inline asm
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{ cvt.f32.f16 %f828, %rs41;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f829, %rs42;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f830, %rs43;}
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// end inline asm
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add.f32 %f831, %f828, 0f00000000;
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add.f32 %f832, %f829, 0f00000000;
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add.f32 %f833, %f830, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs40, %f833;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs39, %f832;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs38, %f831;}
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// end inline asm
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mov.u16 %rs45, 0;
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st.global.v4.u16 [%rd19], {%rs38, %rs39, %rs40, %rs45};
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bra.uni $L__BB0_120;
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$L__BB0_5:
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ld.const.u64 %rd24, [params+432];
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cvta.to.global.u64 %rd25, %rd24;
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ld.const.u32 %r63, [params+424];
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mad.lo.s32 %r64, %r63, %r52, %r51;
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mul.wide.u32 %rd26, %r64, 12;
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add.s64 %rd27, %rd25, %rd26;
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ld.global.f32 %f163, [%rd27];
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mul.f32 %f164, %f163, 0f3456BF95;
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ld.global.f32 %f165, [%rd27+4];
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mul.f32 %f166, %f165, 0f3456BF95;
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ld.global.f32 %f167, [%rd27+8];
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mul.f32 %f168, %f167, 0f3456BF95;
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abs.f32 %f169, %f880;
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div.rn.f32 %f170, %f164, %f169;
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abs.f32 %f171, %f881;
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div.rn.f32 %f172, %f166, %f171;
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abs.f32 %f173, %f882;
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div.rn.f32 %f174, %f168, %f173;
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abs.f32 %f175, %f170;
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abs.f32 %f176, %f172;
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abs.f32 %f177, %f174;
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mov.f32 %f178, 0f38D1B717;
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max.f32 %f179, %f175, %f178;
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max.f32 %f180, %f176, %f178;
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max.f32 %f181, %f177, %f178;
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fma.rn.f32 %f10, %f880, %f179, %f163;
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fma.rn.f32 %f11, %f881, %f180, %f165;
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fma.rn.f32 %f12, %f882, %f181, %f167;
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setp.gt.f32 %p14, %f169, %f173;
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neg.f32 %f182, %f881;
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selp.f32 %f183, %f182, 0f00000000, %p14;
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mov.f32 %f895, 0f00000000;
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neg.f32 %f184, %f882;
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selp.f32 %f185, %f880, %f184, %p14;
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selp.f32 %f186, 0f00000000, %f881, %p14;
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mul.f32 %f187, %f185, %f185;
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fma.rn.f32 %f188, %f183, %f183, %f187;
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fma.rn.f32 %f189, %f186, %f186, %f188;
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sqrt.rn.f32 %f190, %f189;
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rcp.rn.f32 %f191, %f190;
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mul.f32 %f13, %f183, %f191;
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mul.f32 %f14, %f185, %f191;
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mul.f32 %f15, %f186, %f191;
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ld.const.u64 %rd28, [params+128];
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cvta.to.global.u64 %rd29, %rd28;
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ld.const.u32 %r65, [params+120];
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mad.lo.s32 %r66, %r65, %r52, %r51;
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mul.wide.u32 %rd30, %r66, 4;
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add.s64 %rd3, %rd29, %rd30;
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setp.lt.s32 %p15, %r3, 1;
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mov.f32 %f896, %f895;
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mov.f32 %f897, %f895;
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@%p15 bra $L__BB0_36;
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ld.const.u32 %r6, [params+588];
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cvt.rn.f32.s32 %f195, %r3;
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rcp.rn.f32 %f16, %f195;
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ld.global.u32 %r315, [%rd3];
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mul.f32 %f17, %f10, 0f3456BF95;
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mul.f32 %f18, %f11, 0f3456BF95;
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mul.f32 %f19, %f12, 0f3456BF95;
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ld.const.u64 %rd4, [params+96];
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mul.f32 %f196, %f880, %f14;
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mul.f32 %f197, %f881, %f13;
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sub.f32 %f20, %f197, %f196;
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mul.f32 %f198, %f882, %f13;
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mul.f32 %f199, %f880, %f15;
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sub.f32 %f21, %f199, %f198;
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mul.f32 %f200, %f881, %f15;
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mul.f32 %f201, %f882, %f14;
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sub.f32 %f22, %f201, %f200;
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mov.u32 %r67, 0;
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add.s64 %rd5, %rd1, 24;
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mov.u64 %rd31, __cudart_i2opi_f;
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abs.f32 %f268, %f17;
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abs.f32 %f269, %f18;
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max.f32 %f270, %f268, %f269;
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abs.f32 %f271, %f19;
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max.f32 %f272, %f270, %f271;
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mov.u32 %r312, %r67;
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$L__BB0_7:
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cvt.rn.f32.s32 %f26, %r312;
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mov.u32 %r314, %r67;
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$L__BB0_8:
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mad.lo.s32 %r69, %r315, 1664525, 1013904223;
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and.b32 %r70, %r69, 16777215;
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cvt.rn.f32.u32 %f202, %r70;
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fma.rn.f32 %f203, %f202, 0f33800000, %f26;
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mul.f32 %f204, %f16, %f203;
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mad.lo.s32 %r315, %r69, 1664525, 1013904223;
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and.b32 %r71, %r315, 16777215;
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cvt.rn.f32.u32 %f205, %r71;
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cvt.rn.f32.s32 %f206, %r314;
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fma.rn.f32 %f207, %f205, 0f33800000, %f206;
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mul.f32 %f208, %f16, %f207;
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sqrt.rn.f32 %f30, %f204;
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mul.f32 %f31, %f208, 0f40C90FDB;
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mul.f32 %f209, %f31, 0f3F22F983;
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cvt.rni.s32.f32 %r322, %f209;
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cvt.rn.f32.s32 %f210, %r322;
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mov.f32 %f211, 0fBFC90FDA;
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fma.rn.f32 %f212, %f210, %f211, %f31;
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mov.f32 %f213, 0fB3A22168;
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fma.rn.f32 %f214, %f210, %f213, %f212;
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mov.f32 %f215, 0fA7C234C5;
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fma.rn.f32 %f892, %f210, %f215, %f214;
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abs.f32 %f33, %f31;
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setp.ltu.f32 %p16, %f33, 0f47CE4780;
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mov.u32 %r319, %r322;
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mov.f32 %f889, %f892;
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@%p16 bra $L__BB0_16;
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setp.eq.f32 %p17, %f33, 0f7F800000;
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@%p17 bra $L__BB0_15;
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bra.uni $L__BB0_10;
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$L__BB0_15:
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mov.f32 %f218, 0f00000000;
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mul.rn.f32 %f889, %f31, %f218;
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mov.u32 %r319, 0;
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bra.uni $L__BB0_16;
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$L__BB0_10:
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mov.b32 %r14, %f31;
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bfe.u32 %r73, %r14, 23, 8;
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add.s32 %r15, %r73, -128;
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shl.b32 %r74, %r14, 8;
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or.b32 %r16, %r74, -2147483648;
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shr.u32 %r17, %r15, 5;
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mov.u64 %rd74, 0;
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mov.u32 %r316, 0;
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mov.u64 %rd72, %rd1;
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mov.u64 %rd73, %rd31;
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$L__BB0_11:
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.pragma "nounroll";
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ld.global.nc.u32 %r75, [%rd73];
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mad.wide.u32 %rd33, %r75, %r16, %rd74;
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shr.u64 %rd74, %rd33, 32;
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st.local.u32 [%rd72], %rd33;
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add.s64 %rd73, %rd73, 4;
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add.s64 %rd72, %rd72, 4;
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add.s32 %r316, %r316, 1;
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setp.ne.s32 %p18, %r316, 6;
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@%p18 bra $L__BB0_11;
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st.local.u32 [%rd5], %rd74;
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mov.u32 %r76, 4;
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sub.s32 %r20, %r76, %r17;
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mov.u32 %r77, 6;
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sub.s32 %r78, %r77, %r17;
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mul.wide.s32 %rd34, %r78, 4;
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add.s64 %rd35, %rd1, %rd34;
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ld.local.u32 %r317, [%rd35];
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ld.local.u32 %r318, [%rd35+-4];
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and.b32 %r23, %r15, 31;
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setp.eq.s32 %p19, %r23, 0;
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@%p19 bra $L__BB0_14;
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mov.u32 %r79, 32;
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sub.s32 %r80, %r79, %r23;
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shr.u32 %r81, %r318, %r80;
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shl.b32 %r82, %r317, %r23;
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add.s32 %r317, %r81, %r82;
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mul.wide.s32 %rd36, %r20, 4;
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add.s64 %rd37, %rd1, %rd36;
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ld.local.u32 %r83, [%rd37];
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shr.u32 %r84, %r83, %r80;
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shl.b32 %r85, %r318, %r23;
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add.s32 %r318, %r84, %r85;
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$L__BB0_14:
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and.b32 %r86, %r14, -2147483648;
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shr.u32 %r87, %r318, 30;
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shl.b32 %r88, %r317, 2;
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or.b32 %r89, %r87, %r88;
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shr.u32 %r90, %r89, 31;
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shr.u32 %r91, %r317, 30;
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add.s32 %r92, %r90, %r91;
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neg.s32 %r93, %r92;
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setp.eq.s32 %p20, %r86, 0;
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selp.b32 %r319, %r92, %r93, %p20;
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setp.ne.s32 %p21, %r90, 0;
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xor.b32 %r94, %r86, -2147483648;
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selp.b32 %r95, %r94, %r86, %p21;
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selp.b32 %r96, -1, 0, %p21;
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xor.b32 %r97, %r89, %r96;
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shl.b32 %r98, %r318, 2;
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xor.b32 %r99, %r98, %r96;
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cvt.u64.u32 %rd38, %r97;
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cvt.u64.u32 %rd39, %r99;
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bfi.b64 %rd40, %rd38, %rd39, 32, 32;
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cvt.rn.f64.s64 %fd1, %rd40;
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mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
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cvt.rn.f32.f64 %f216, %fd2;
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setp.eq.s32 %p22, %r95, 0;
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neg.f32 %f217, %f216;
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selp.f32 %f889, %f216, %f217, %p22;
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$L__BB0_16:
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add.s32 %r30, %r319, 1;
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and.b32 %r31, %r30, 1;
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setp.eq.s32 %p23, %r31, 0;
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selp.f32 %f37, %f889, 0f3F800000, %p23;
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mul.rn.f32 %f38, %f889, %f889;
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mov.f32 %f890, 0fB94D4153;
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@%p23 bra $L__BB0_18;
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mov.f32 %f220, 0fBAB607ED;
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mov.f32 %f221, 0f37CBAC00;
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fma.rn.f32 %f890, %f221, %f38, %f220;
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$L__BB0_18:
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selp.f32 %f222, 0f3C0885E4, 0f3D2AAABB, %p23;
|
|
fma.rn.f32 %f223, %f890, %f38, %f222;
|
|
selp.f32 %f224, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
|
|
fma.rn.f32 %f225, %f223, %f38, %f224;
|
|
mov.f32 %f226, 0f00000000;
|
|
fma.rn.f32 %f227, %f38, %f37, %f226;
|
|
fma.rn.f32 %f891, %f225, %f227, %f37;
|
|
and.b32 %r101, %r30, 2;
|
|
setp.eq.s32 %p25, %r101, 0;
|
|
@%p25 bra $L__BB0_20;
|
|
|
|
mov.f32 %f229, 0fBF800000;
|
|
fma.rn.f32 %f891, %f891, %f229, %f226;
|
|
|
|
$L__BB0_20:
|
|
@%p16 bra $L__BB0_28;
|
|
|
|
setp.eq.f32 %p27, %f33, 0f7F800000;
|
|
@%p27 bra $L__BB0_27;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f232, 0f00000000;
|
|
mul.rn.f32 %f892, %f31, %f232;
|
|
mov.u32 %r322, 0;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_22:
|
|
mov.b32 %r32, %f31;
|
|
bfe.u32 %r102, %r32, 23, 8;
|
|
add.s32 %r33, %r102, -128;
|
|
shl.b32 %r103, %r32, 8;
|
|
or.b32 %r34, %r103, -2147483648;
|
|
shr.u32 %r35, %r33, 5;
|
|
mov.u64 %rd75, 0;
|
|
mov.u64 %rd76, %rd75;
|
|
|
|
$L__BB0_23:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd43, %rd75, 2;
|
|
mov.u64 %rd44, __cudart_i2opi_f;
|
|
add.s64 %rd45, %rd44, %rd43;
|
|
ld.global.nc.u32 %r104, [%rd45];
|
|
mad.wide.u32 %rd46, %r104, %r34, %rd76;
|
|
shr.u64 %rd76, %rd46, 32;
|
|
add.s64 %rd47, %rd1, %rd43;
|
|
st.local.u32 [%rd47], %rd46;
|
|
cvt.u32.u64 %r105, %rd75;
|
|
add.s32 %r106, %r105, 1;
|
|
cvt.s64.s32 %rd75, %r106;
|
|
setp.ne.s32 %p28, %r106, 6;
|
|
@%p28 bra $L__BB0_23;
|
|
|
|
st.local.u32 [%rd5], %rd76;
|
|
mov.u32 %r107, 4;
|
|
sub.s32 %r36, %r107, %r35;
|
|
mov.u32 %r108, 6;
|
|
sub.s32 %r109, %r108, %r35;
|
|
mul.wide.s32 %rd48, %r109, 4;
|
|
add.s64 %rd49, %rd1, %rd48;
|
|
ld.local.u32 %r320, [%rd49];
|
|
ld.local.u32 %r321, [%rd49+-4];
|
|
and.b32 %r39, %r33, 31;
|
|
setp.eq.s32 %p29, %r39, 0;
|
|
@%p29 bra $L__BB0_26;
|
|
|
|
mov.u32 %r110, 32;
|
|
sub.s32 %r111, %r110, %r39;
|
|
shr.u32 %r112, %r321, %r111;
|
|
shl.b32 %r113, %r320, %r39;
|
|
add.s32 %r320, %r112, %r113;
|
|
mul.wide.s32 %rd50, %r36, 4;
|
|
add.s64 %rd51, %rd1, %rd50;
|
|
ld.local.u32 %r114, [%rd51];
|
|
shr.u32 %r115, %r114, %r111;
|
|
shl.b32 %r116, %r321, %r39;
|
|
add.s32 %r321, %r115, %r116;
|
|
|
|
$L__BB0_26:
|
|
and.b32 %r117, %r32, -2147483648;
|
|
shr.u32 %r118, %r321, 30;
|
|
shl.b32 %r119, %r320, 2;
|
|
or.b32 %r120, %r118, %r119;
|
|
shr.u32 %r121, %r120, 31;
|
|
shr.u32 %r122, %r320, 30;
|
|
add.s32 %r123, %r121, %r122;
|
|
neg.s32 %r124, %r123;
|
|
setp.eq.s32 %p30, %r117, 0;
|
|
selp.b32 %r322, %r123, %r124, %p30;
|
|
setp.ne.s32 %p31, %r121, 0;
|
|
xor.b32 %r125, %r117, -2147483648;
|
|
selp.b32 %r126, %r125, %r117, %p31;
|
|
selp.b32 %r127, -1, 0, %p31;
|
|
xor.b32 %r128, %r120, %r127;
|
|
shl.b32 %r129, %r321, 2;
|
|
xor.b32 %r130, %r129, %r127;
|
|
cvt.u64.u32 %rd52, %r128;
|
|
cvt.u64.u32 %rd53, %r130;
|
|
bfi.b64 %rd54, %rd52, %rd53, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd54;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f230, %fd4;
|
|
setp.eq.s32 %p32, %r126, 0;
|
|
neg.f32 %f231, %f230;
|
|
selp.f32 %f892, %f230, %f231, %p32;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f47, %f30, %f891;
|
|
and.b32 %r46, %r322, 1;
|
|
setp.eq.s32 %p33, %r46, 0;
|
|
selp.f32 %f48, %f892, 0f3F800000, %p33;
|
|
mul.rn.f32 %f49, %f892, %f892;
|
|
mov.f32 %f893, 0fB94D4153;
|
|
@%p33 bra $L__BB0_30;
|
|
|
|
mov.f32 %f234, 0fBAB607ED;
|
|
mov.f32 %f235, 0f37CBAC00;
|
|
fma.rn.f32 %f893, %f235, %f49, %f234;
|
|
|
|
$L__BB0_30:
|
|
selp.f32 %f236, 0f3C0885E4, 0f3D2AAABB, %p33;
|
|
fma.rn.f32 %f237, %f893, %f49, %f236;
|
|
selp.f32 %f238, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
|
|
fma.rn.f32 %f239, %f237, %f49, %f238;
|
|
mov.f32 %f240, 0f00000000;
|
|
fma.rn.f32 %f241, %f49, %f48, %f240;
|
|
fma.rn.f32 %f894, %f239, %f241, %f48;
|
|
and.b32 %r132, %r322, 2;
|
|
setp.eq.s32 %p35, %r132, 0;
|
|
@%p35 bra $L__BB0_32;
|
|
|
|
mov.f32 %f243, 0fBF800000;
|
|
fma.rn.f32 %f894, %f894, %f243, %f240;
|
|
|
|
$L__BB0_32:
|
|
mul.f32 %f244, %f47, %f47;
|
|
mov.f32 %f245, 0f3F800000;
|
|
sub.f32 %f246, %f245, %f244;
|
|
mul.f32 %f247, %f30, %f894;
|
|
mul.f32 %f248, %f247, %f247;
|
|
sub.f32 %f249, %f246, %f248;
|
|
max.f32 %f251, %f240, %f249;
|
|
sqrt.rn.f32 %f252, %f251;
|
|
mul.f32 %f253, %f13, %f247;
|
|
mul.f32 %f254, %f14, %f247;
|
|
mul.f32 %f255, %f15, %f247;
|
|
fma.rn.f32 %f256, %f22, %f47, %f253;
|
|
fma.rn.f32 %f257, %f21, %f47, %f254;
|
|
fma.rn.f32 %f258, %f20, %f47, %f255;
|
|
fma.rn.f32 %f55, %f880, %f252, %f256;
|
|
fma.rn.f32 %f56, %f881, %f252, %f257;
|
|
fma.rn.f32 %f57, %f882, %f252, %f258;
|
|
setp.leu.f32 %p36, %f56, 0f00000000;
|
|
setp.ne.s32 %p37, %r6, 0;
|
|
and.pred %p38, %p37, %p36;
|
|
@%p38 bra $L__BB0_34;
|
|
|
|
mov.f32 %f273, 0f38D1B717;
|
|
max.f32 %f265, %f272, %f273;
|
|
mov.f32 %f266, 0f6C4ECB8F;
|
|
mov.f32 %f267, 0f00000000;
|
|
mov.u32 %r169, 2;
|
|
mov.u32 %r170, 1;
|
|
mov.u32 %r171, 3;
|
|
mov.u32 %r174, 1065353216;
|
|
mov.u32 %r203, 0;
|
|
// begin inline asm
|
|
call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd4,%f10,%f11,%f12,%f55,%f56,%f57,%f265,%f266,%f267,%r170,%r203,%r170,%r169,%r170,%r171,%r174,%r174,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
|
|
// end inline asm
|
|
mov.b32 %f274, %r133;
|
|
mov.b32 %f275, %r134;
|
|
mov.b32 %f276, %r135;
|
|
add.f32 %f895, %f895, %f274;
|
|
add.f32 %f896, %f896, %f275;
|
|
add.f32 %f897, %f897, %f276;
|
|
|
|
$L__BB0_34:
|
|
add.s32 %r314, %r314, 1;
|
|
setp.lt.s32 %p39, %r314, %r3;
|
|
@%p39 bra $L__BB0_8;
|
|
|
|
add.s32 %r312, %r312, 1;
|
|
setp.lt.s32 %p40, %r312, %r3;
|
|
@%p40 bra $L__BB0_7;
|
|
|
|
$L__BB0_36:
|
|
mul.lo.s32 %r204, %r3, %r3;
|
|
cvt.rn.f32.s32 %f277, %r204;
|
|
rcp.rn.f32 %f278, %f277;
|
|
mul.f32 %f279, %f278, %f895;
|
|
mul.f32 %f280, %f278, %f896;
|
|
mul.f32 %f281, %f278, %f897;
|
|
ld.const.v4.f32 {%f282, %f283, %f284, %f285}, [params+576];
|
|
mul.f32 %f67, %f279, %f282;
|
|
mul.f32 %f68, %f280, %f283;
|
|
mul.f32 %f69, %f281, %f284;
|
|
ld.const.u32 %r49, [params+104];
|
|
and.b32 %r205, %r49, 1;
|
|
setp.eq.b32 %p41, %r205, 1;
|
|
mov.pred %p42, 0;
|
|
xor.pred %p43, %p41, %p42;
|
|
not.pred %p44, %p43;
|
|
@%p44 bra $L__BB0_110;
|
|
|
|
mov.f32 %f290, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f291, %f290;
|
|
add.f32 %f292, %f291, %f291;
|
|
mov.f32 %f293, 0f3EE66666;
|
|
sub.f32 %f294, %f293, %f292;
|
|
abs.f32 %f70, %f294;
|
|
abs.f32 %f71, %f67;
|
|
setp.lt.f32 %p45, %f71, 0f00800000;
|
|
mul.f32 %f295, %f71, 0f4B800000;
|
|
selp.f32 %f296, %f295, %f71, %p45;
|
|
selp.f32 %f297, 0fC3170000, 0fC2FE0000, %p45;
|
|
mov.b32 %r206, %f296;
|
|
and.b32 %r207, %r206, 8388607;
|
|
or.b32 %r208, %r207, 1065353216;
|
|
mov.b32 %f298, %r208;
|
|
shr.u32 %r209, %r206, 23;
|
|
cvt.rn.f32.u32 %f299, %r209;
|
|
add.f32 %f300, %f297, %f299;
|
|
setp.gt.f32 %p46, %f298, 0f3FB504F3;
|
|
mul.f32 %f301, %f298, 0f3F000000;
|
|
add.f32 %f302, %f300, 0f3F800000;
|
|
selp.f32 %f303, %f302, %f300, %p46;
|
|
selp.f32 %f304, %f301, %f298, %p46;
|
|
add.f32 %f305, %f304, 0fBF800000;
|
|
add.f32 %f306, %f304, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f307, %f306;
|
|
add.f32 %f308, %f305, %f305;
|
|
mul.f32 %f309, %f308, %f307;
|
|
mul.f32 %f310, %f309, %f309;
|
|
mov.f32 %f311, 0f3C4CAF63;
|
|
mov.f32 %f312, 0f3B18F0FE;
|
|
fma.rn.f32 %f313, %f312, %f310, %f311;
|
|
mov.f32 %f314, 0f3DAAAABD;
|
|
fma.rn.f32 %f315, %f313, %f310, %f314;
|
|
mul.rn.f32 %f316, %f315, %f310;
|
|
mul.rn.f32 %f317, %f316, %f309;
|
|
sub.f32 %f318, %f305, %f309;
|
|
add.f32 %f319, %f318, %f318;
|
|
neg.f32 %f320, %f309;
|
|
fma.rn.f32 %f321, %f320, %f305, %f319;
|
|
mul.rn.f32 %f322, %f307, %f321;
|
|
add.f32 %f323, %f317, %f309;
|
|
sub.f32 %f324, %f309, %f323;
|
|
add.f32 %f325, %f317, %f324;
|
|
add.f32 %f326, %f322, %f325;
|
|
add.f32 %f327, %f323, %f326;
|
|
sub.f32 %f328, %f323, %f327;
|
|
add.f32 %f329, %f326, %f328;
|
|
mov.f32 %f330, 0f3F317200;
|
|
mul.rn.f32 %f331, %f303, %f330;
|
|
mov.f32 %f332, 0f35BFBE8E;
|
|
mul.rn.f32 %f333, %f303, %f332;
|
|
add.f32 %f334, %f331, %f327;
|
|
sub.f32 %f335, %f331, %f334;
|
|
add.f32 %f336, %f327, %f335;
|
|
add.f32 %f337, %f329, %f336;
|
|
add.f32 %f338, %f333, %f337;
|
|
add.f32 %f339, %f334, %f338;
|
|
sub.f32 %f340, %f334, %f339;
|
|
add.f32 %f341, %f338, %f340;
|
|
mul.rn.f32 %f342, %f293, %f339;
|
|
neg.f32 %f343, %f342;
|
|
fma.rn.f32 %f344, %f293, %f339, %f343;
|
|
fma.rn.f32 %f345, %f293, %f341, %f344;
|
|
mov.f32 %f346, 0f00000000;
|
|
fma.rn.f32 %f347, %f346, %f339, %f345;
|
|
add.rn.f32 %f348, %f342, %f347;
|
|
neg.f32 %f349, %f348;
|
|
add.rn.f32 %f350, %f342, %f349;
|
|
add.rn.f32 %f351, %f350, %f347;
|
|
mov.b32 %r210, %f348;
|
|
setp.eq.s32 %p47, %r210, 1118925336;
|
|
add.s32 %r211, %r210, -1;
|
|
mov.b32 %f352, %r211;
|
|
add.f32 %f353, %f351, 0f37000000;
|
|
selp.f32 %f72, %f353, %f351, %p47;
|
|
selp.f32 %f354, %f352, %f348, %p47;
|
|
mov.f32 %f355, 0f3FB8AA3B;
|
|
mul.rn.f32 %f356, %f354, %f355;
|
|
cvt.rzi.f32.f32 %f357, %f356;
|
|
abs.f32 %f358, %f357;
|
|
setp.gt.f32 %p48, %f358, 0f42FC0000;
|
|
mov.b32 %r212, %f357;
|
|
and.b32 %r213, %r212, -2147483648;
|
|
or.b32 %r214, %r213, 1123811328;
|
|
mov.b32 %f359, %r214;
|
|
selp.f32 %f360, %f359, %f357, %p48;
|
|
mov.f32 %f361, 0fBF317218;
|
|
fma.rn.f32 %f362, %f360, %f361, %f354;
|
|
mov.f32 %f363, 0f3102E308;
|
|
fma.rn.f32 %f364, %f360, %f363, %f362;
|
|
mul.f32 %f365, %f364, 0f3FB8AA3B;
|
|
add.f32 %f366, %f360, 0f4B40007F;
|
|
mov.b32 %r215, %f366;
|
|
shl.b32 %r216, %r215, 23;
|
|
mov.b32 %f367, %r216;
|
|
ex2.approx.ftz.f32 %f368, %f365;
|
|
mul.f32 %f73, %f368, %f367;
|
|
setp.eq.f32 %p49, %f73, 0f7F800000;
|
|
mov.f32 %f901, 0f7F800000;
|
|
@%p49 bra $L__BB0_39;
|
|
|
|
fma.rn.f32 %f901, %f73, %f72, %f73;
|
|
|
|
$L__BB0_39:
|
|
setp.lt.f32 %p50, %f67, 0f00000000;
|
|
setp.eq.f32 %p51, %f70, 0f3F800000;
|
|
and.pred %p1, %p50, %p51;
|
|
setp.eq.f32 %p52, %f67, 0f00000000;
|
|
@%p52 bra $L__BB0_43;
|
|
bra.uni $L__BB0_40;
|
|
|
|
$L__BB0_43:
|
|
add.f32 %f373, %f67, %f67;
|
|
selp.f32 %f903, %f373, 0f00000000, %p51;
|
|
bra.uni $L__BB0_44;
|
|
|
|
$L__BB0_119:
|
|
mov.f32 %f836, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f836;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs47, %f836;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f836;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs49, 0;
|
|
st.global.v4.u16 [%rd19], {%rs46, %rs47, %rs48, %rs49};
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_40:
|
|
mov.b32 %r217, %f901;
|
|
xor.b32 %r218, %r217, -2147483648;
|
|
mov.b32 %f369, %r218;
|
|
selp.f32 %f903, %f369, %f901, %p1;
|
|
setp.geu.f32 %p53, %f67, 0f00000000;
|
|
@%p53 bra $L__BB0_44;
|
|
|
|
mov.f32 %f370, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f371, %f370;
|
|
setp.eq.f32 %p54, %f371, 0f3EE66666;
|
|
@%p54 bra $L__BB0_44;
|
|
|
|
mov.f32 %f903, 0f7FFFFFFF;
|
|
|
|
$L__BB0_44:
|
|
add.f32 %f374, %f71, 0f3EE66666;
|
|
mov.b32 %r219, %f374;
|
|
setp.lt.s32 %p56, %r219, 2139095040;
|
|
@%p56 bra $L__BB0_49;
|
|
|
|
setp.gtu.f32 %p57, %f71, 0f7F800000;
|
|
@%p57 bra $L__BB0_48;
|
|
bra.uni $L__BB0_46;
|
|
|
|
$L__BB0_48:
|
|
add.f32 %f903, %f67, 0f3EE66666;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_46:
|
|
setp.neu.f32 %p58, %f71, 0f7F800000;
|
|
@%p58 bra $L__BB0_49;
|
|
|
|
selp.f32 %f903, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_49:
|
|
setp.eq.f32 %p59, %f67, 0f3F800000;
|
|
selp.f32 %f82, 0f3F800000, %f903, %p59;
|
|
abs.f32 %f83, %f68;
|
|
setp.lt.f32 %p60, %f83, 0f00800000;
|
|
mul.f32 %f376, %f83, 0f4B800000;
|
|
selp.f32 %f377, %f376, %f83, %p60;
|
|
selp.f32 %f378, 0fC3170000, 0fC2FE0000, %p60;
|
|
mov.b32 %r220, %f377;
|
|
and.b32 %r221, %r220, 8388607;
|
|
or.b32 %r222, %r221, 1065353216;
|
|
mov.b32 %f379, %r222;
|
|
shr.u32 %r223, %r220, 23;
|
|
cvt.rn.f32.u32 %f380, %r223;
|
|
add.f32 %f381, %f378, %f380;
|
|
setp.gt.f32 %p61, %f379, 0f3FB504F3;
|
|
mul.f32 %f382, %f379, 0f3F000000;
|
|
add.f32 %f383, %f381, 0f3F800000;
|
|
selp.f32 %f384, %f383, %f381, %p61;
|
|
selp.f32 %f385, %f382, %f379, %p61;
|
|
add.f32 %f386, %f385, 0fBF800000;
|
|
add.f32 %f387, %f385, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f388, %f387;
|
|
add.f32 %f389, %f386, %f386;
|
|
mul.f32 %f390, %f389, %f388;
|
|
mul.f32 %f391, %f390, %f390;
|
|
mov.f32 %f392, 0f3C4CAF63;
|
|
mov.f32 %f393, 0f3B18F0FE;
|
|
fma.rn.f32 %f394, %f393, %f391, %f392;
|
|
mov.f32 %f395, 0f3DAAAABD;
|
|
fma.rn.f32 %f396, %f394, %f391, %f395;
|
|
mul.rn.f32 %f397, %f396, %f391;
|
|
mul.rn.f32 %f398, %f397, %f390;
|
|
sub.f32 %f399, %f386, %f390;
|
|
add.f32 %f400, %f399, %f399;
|
|
neg.f32 %f401, %f390;
|
|
fma.rn.f32 %f402, %f401, %f386, %f400;
|
|
mul.rn.f32 %f403, %f388, %f402;
|
|
add.f32 %f404, %f398, %f390;
|
|
sub.f32 %f405, %f390, %f404;
|
|
add.f32 %f406, %f398, %f405;
|
|
add.f32 %f407, %f403, %f406;
|
|
add.f32 %f408, %f404, %f407;
|
|
sub.f32 %f409, %f404, %f408;
|
|
add.f32 %f410, %f407, %f409;
|
|
mov.f32 %f411, 0f3F317200;
|
|
mul.rn.f32 %f412, %f384, %f411;
|
|
mov.f32 %f413, 0f35BFBE8E;
|
|
mul.rn.f32 %f414, %f384, %f413;
|
|
add.f32 %f415, %f412, %f408;
|
|
sub.f32 %f416, %f412, %f415;
|
|
add.f32 %f417, %f408, %f416;
|
|
add.f32 %f418, %f410, %f417;
|
|
add.f32 %f419, %f414, %f418;
|
|
add.f32 %f420, %f415, %f419;
|
|
sub.f32 %f421, %f415, %f420;
|
|
add.f32 %f422, %f419, %f421;
|
|
mov.f32 %f423, 0f3EE66666;
|
|
mul.rn.f32 %f424, %f423, %f420;
|
|
neg.f32 %f425, %f424;
|
|
fma.rn.f32 %f426, %f423, %f420, %f425;
|
|
fma.rn.f32 %f427, %f423, %f422, %f426;
|
|
mov.f32 %f428, 0f00000000;
|
|
fma.rn.f32 %f429, %f428, %f420, %f427;
|
|
add.rn.f32 %f430, %f424, %f429;
|
|
neg.f32 %f431, %f430;
|
|
add.rn.f32 %f432, %f424, %f431;
|
|
add.rn.f32 %f433, %f432, %f429;
|
|
mov.b32 %r224, %f430;
|
|
setp.eq.s32 %p62, %r224, 1118925336;
|
|
add.s32 %r225, %r224, -1;
|
|
mov.b32 %f434, %r225;
|
|
add.f32 %f435, %f433, 0f37000000;
|
|
selp.f32 %f84, %f435, %f433, %p62;
|
|
selp.f32 %f436, %f434, %f430, %p62;
|
|
mov.f32 %f437, 0f3FB8AA3B;
|
|
mul.rn.f32 %f438, %f436, %f437;
|
|
cvt.rzi.f32.f32 %f439, %f438;
|
|
abs.f32 %f440, %f439;
|
|
setp.gt.f32 %p63, %f440, 0f42FC0000;
|
|
mov.b32 %r226, %f439;
|
|
and.b32 %r227, %r226, -2147483648;
|
|
or.b32 %r228, %r227, 1123811328;
|
|
mov.b32 %f441, %r228;
|
|
selp.f32 %f442, %f441, %f439, %p63;
|
|
mov.f32 %f443, 0fBF317218;
|
|
fma.rn.f32 %f444, %f442, %f443, %f436;
|
|
mov.f32 %f445, 0f3102E308;
|
|
fma.rn.f32 %f446, %f442, %f445, %f444;
|
|
mul.f32 %f447, %f446, 0f3FB8AA3B;
|
|
add.f32 %f448, %f442, 0f4B40007F;
|
|
mov.b32 %r229, %f448;
|
|
shl.b32 %r230, %r229, 23;
|
|
mov.b32 %f449, %r230;
|
|
ex2.approx.ftz.f32 %f450, %f447;
|
|
mul.f32 %f85, %f450, %f449;
|
|
setp.eq.f32 %p64, %f85, 0f7F800000;
|
|
mov.f32 %f904, 0f7F800000;
|
|
@%p64 bra $L__BB0_51;
|
|
|
|
fma.rn.f32 %f904, %f85, %f84, %f85;
|
|
|
|
$L__BB0_51:
|
|
setp.lt.f32 %p65, %f68, 0f00000000;
|
|
and.pred %p2, %p65, %p51;
|
|
setp.eq.f32 %p67, %f68, 0f00000000;
|
|
@%p67 bra $L__BB0_55;
|
|
bra.uni $L__BB0_52;
|
|
|
|
$L__BB0_55:
|
|
add.f32 %f455, %f68, %f68;
|
|
selp.f32 %f906, %f455, 0f00000000, %p51;
|
|
bra.uni $L__BB0_56;
|
|
|
|
$L__BB0_52:
|
|
mov.b32 %r231, %f904;
|
|
xor.b32 %r232, %r231, -2147483648;
|
|
mov.b32 %f451, %r232;
|
|
selp.f32 %f906, %f451, %f904, %p2;
|
|
setp.geu.f32 %p68, %f68, 0f00000000;
|
|
@%p68 bra $L__BB0_56;
|
|
|
|
mov.f32 %f452, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f453, %f452;
|
|
setp.eq.f32 %p69, %f453, 0f3EE66666;
|
|
@%p69 bra $L__BB0_56;
|
|
|
|
mov.f32 %f906, 0f7FFFFFFF;
|
|
|
|
$L__BB0_56:
|
|
add.f32 %f456, %f83, 0f3EE66666;
|
|
mov.b32 %r233, %f456;
|
|
setp.lt.s32 %p71, %r233, 2139095040;
|
|
@%p71 bra $L__BB0_61;
|
|
|
|
setp.gtu.f32 %p72, %f83, 0f7F800000;
|
|
@%p72 bra $L__BB0_60;
|
|
bra.uni $L__BB0_58;
|
|
|
|
$L__BB0_60:
|
|
add.f32 %f906, %f68, 0f3EE66666;
|
|
bra.uni $L__BB0_61;
|
|
|
|
$L__BB0_58:
|
|
setp.neu.f32 %p73, %f83, 0f7F800000;
|
|
@%p73 bra $L__BB0_61;
|
|
|
|
selp.f32 %f906, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
$L__BB0_61:
|
|
setp.eq.f32 %p74, %f68, 0f3F800000;
|
|
selp.f32 %f94, 0f3F800000, %f906, %p74;
|
|
abs.f32 %f95, %f69;
|
|
setp.lt.f32 %p75, %f95, 0f00800000;
|
|
mul.f32 %f458, %f95, 0f4B800000;
|
|
selp.f32 %f459, %f458, %f95, %p75;
|
|
selp.f32 %f460, 0fC3170000, 0fC2FE0000, %p75;
|
|
mov.b32 %r234, %f459;
|
|
and.b32 %r235, %r234, 8388607;
|
|
or.b32 %r236, %r235, 1065353216;
|
|
mov.b32 %f461, %r236;
|
|
shr.u32 %r237, %r234, 23;
|
|
cvt.rn.f32.u32 %f462, %r237;
|
|
add.f32 %f463, %f460, %f462;
|
|
setp.gt.f32 %p76, %f461, 0f3FB504F3;
|
|
mul.f32 %f464, %f461, 0f3F000000;
|
|
add.f32 %f465, %f463, 0f3F800000;
|
|
selp.f32 %f466, %f465, %f463, %p76;
|
|
selp.f32 %f467, %f464, %f461, %p76;
|
|
add.f32 %f468, %f467, 0fBF800000;
|
|
add.f32 %f469, %f467, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f470, %f469;
|
|
add.f32 %f471, %f468, %f468;
|
|
mul.f32 %f472, %f471, %f470;
|
|
mul.f32 %f473, %f472, %f472;
|
|
mov.f32 %f474, 0f3C4CAF63;
|
|
mov.f32 %f475, 0f3B18F0FE;
|
|
fma.rn.f32 %f476, %f475, %f473, %f474;
|
|
mov.f32 %f477, 0f3DAAAABD;
|
|
fma.rn.f32 %f478, %f476, %f473, %f477;
|
|
mul.rn.f32 %f479, %f478, %f473;
|
|
mul.rn.f32 %f480, %f479, %f472;
|
|
sub.f32 %f481, %f468, %f472;
|
|
add.f32 %f482, %f481, %f481;
|
|
neg.f32 %f483, %f472;
|
|
fma.rn.f32 %f484, %f483, %f468, %f482;
|
|
mul.rn.f32 %f485, %f470, %f484;
|
|
add.f32 %f486, %f480, %f472;
|
|
sub.f32 %f487, %f472, %f486;
|
|
add.f32 %f488, %f480, %f487;
|
|
add.f32 %f489, %f485, %f488;
|
|
add.f32 %f490, %f486, %f489;
|
|
sub.f32 %f491, %f486, %f490;
|
|
add.f32 %f492, %f489, %f491;
|
|
mov.f32 %f493, 0f3F317200;
|
|
mul.rn.f32 %f494, %f466, %f493;
|
|
mov.f32 %f495, 0f35BFBE8E;
|
|
mul.rn.f32 %f496, %f466, %f495;
|
|
add.f32 %f497, %f494, %f490;
|
|
sub.f32 %f498, %f494, %f497;
|
|
add.f32 %f499, %f490, %f498;
|
|
add.f32 %f500, %f492, %f499;
|
|
add.f32 %f501, %f496, %f500;
|
|
add.f32 %f502, %f497, %f501;
|
|
sub.f32 %f503, %f497, %f502;
|
|
add.f32 %f504, %f501, %f503;
|
|
mov.f32 %f505, 0f3EE66666;
|
|
mul.rn.f32 %f506, %f505, %f502;
|
|
neg.f32 %f507, %f506;
|
|
fma.rn.f32 %f508, %f505, %f502, %f507;
|
|
fma.rn.f32 %f509, %f505, %f504, %f508;
|
|
mov.f32 %f510, 0f00000000;
|
|
fma.rn.f32 %f511, %f510, %f502, %f509;
|
|
add.rn.f32 %f512, %f506, %f511;
|
|
neg.f32 %f513, %f512;
|
|
add.rn.f32 %f514, %f506, %f513;
|
|
add.rn.f32 %f515, %f514, %f511;
|
|
mov.b32 %r238, %f512;
|
|
setp.eq.s32 %p77, %r238, 1118925336;
|
|
add.s32 %r239, %r238, -1;
|
|
mov.b32 %f516, %r239;
|
|
add.f32 %f517, %f515, 0f37000000;
|
|
selp.f32 %f96, %f517, %f515, %p77;
|
|
selp.f32 %f518, %f516, %f512, %p77;
|
|
mov.f32 %f519, 0f3FB8AA3B;
|
|
mul.rn.f32 %f520, %f518, %f519;
|
|
cvt.rzi.f32.f32 %f521, %f520;
|
|
abs.f32 %f522, %f521;
|
|
setp.gt.f32 %p78, %f522, 0f42FC0000;
|
|
mov.b32 %r240, %f521;
|
|
and.b32 %r241, %r240, -2147483648;
|
|
or.b32 %r242, %r241, 1123811328;
|
|
mov.b32 %f523, %r242;
|
|
selp.f32 %f524, %f523, %f521, %p78;
|
|
mov.f32 %f525, 0fBF317218;
|
|
fma.rn.f32 %f526, %f524, %f525, %f518;
|
|
mov.f32 %f527, 0f3102E308;
|
|
fma.rn.f32 %f528, %f524, %f527, %f526;
|
|
mul.f32 %f529, %f528, 0f3FB8AA3B;
|
|
add.f32 %f530, %f524, 0f4B40007F;
|
|
mov.b32 %r243, %f530;
|
|
shl.b32 %r244, %r243, 23;
|
|
mov.b32 %f531, %r244;
|
|
ex2.approx.ftz.f32 %f532, %f529;
|
|
mul.f32 %f97, %f532, %f531;
|
|
setp.eq.f32 %p79, %f97, 0f7F800000;
|
|
mov.f32 %f907, 0f7F800000;
|
|
@%p79 bra $L__BB0_63;
|
|
|
|
fma.rn.f32 %f907, %f97, %f96, %f97;
|
|
|
|
$L__BB0_63:
|
|
setp.lt.f32 %p80, %f69, 0f00000000;
|
|
and.pred %p3, %p80, %p51;
|
|
setp.eq.f32 %p82, %f69, 0f00000000;
|
|
@%p82 bra $L__BB0_67;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_67:
|
|
add.f32 %f537, %f69, %f69;
|
|
selp.f32 %f909, %f537, 0f00000000, %p51;
|
|
bra.uni $L__BB0_68;
|
|
|
|
$L__BB0_64:
|
|
mov.b32 %r245, %f907;
|
|
xor.b32 %r246, %r245, -2147483648;
|
|
mov.b32 %f533, %r246;
|
|
selp.f32 %f909, %f533, %f907, %p3;
|
|
setp.geu.f32 %p83, %f69, 0f00000000;
|
|
@%p83 bra $L__BB0_68;
|
|
|
|
mov.f32 %f534, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f535, %f534;
|
|
setp.eq.f32 %p84, %f535, 0f3EE66666;
|
|
@%p84 bra $L__BB0_68;
|
|
|
|
mov.f32 %f909, 0f7FFFFFFF;
|
|
|
|
$L__BB0_68:
|
|
add.f32 %f538, %f95, 0f3EE66666;
|
|
mov.b32 %r247, %f538;
|
|
setp.lt.s32 %p86, %r247, 2139095040;
|
|
@%p86 bra $L__BB0_73;
|
|
|
|
setp.gtu.f32 %p87, %f95, 0f7F800000;
|
|
@%p87 bra $L__BB0_72;
|
|
bra.uni $L__BB0_70;
|
|
|
|
$L__BB0_72:
|
|
add.f32 %f909, %f69, 0f3EE66666;
|
|
bra.uni $L__BB0_73;
|
|
|
|
$L__BB0_70:
|
|
setp.neu.f32 %p88, %f95, 0f7F800000;
|
|
@%p88 bra $L__BB0_73;
|
|
|
|
selp.f32 %f909, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_73:
|
|
setp.eq.f32 %p89, %f69, 0f3F800000;
|
|
mov.f32 %f540, 0f3F800000;
|
|
selp.f32 %f541, 0f3F800000, %f909, %p89;
|
|
min.f32 %f542, %f82, %f540;
|
|
mov.f32 %f543, 0f00000000;
|
|
max.f32 %f106, %f543, %f542;
|
|
min.f32 %f544, %f94, %f540;
|
|
max.f32 %f107, %f543, %f544;
|
|
min.f32 %f545, %f541, %f540;
|
|
max.f32 %f108, %f543, %f545;
|
|
mov.f32 %f549, 0f3ED55555;
|
|
abs.f32 %f110, %f106;
|
|
setp.lt.f32 %p90, %f110, 0f00800000;
|
|
mul.f32 %f551, %f110, 0f4B800000;
|
|
selp.f32 %f552, %f551, %f110, %p90;
|
|
selp.f32 %f553, 0fC3170000, 0fC2FE0000, %p90;
|
|
mov.b32 %r250, %f552;
|
|
and.b32 %r251, %r250, 8388607;
|
|
or.b32 %r252, %r251, 1065353216;
|
|
mov.b32 %f554, %r252;
|
|
shr.u32 %r253, %r250, 23;
|
|
cvt.rn.f32.u32 %f555, %r253;
|
|
add.f32 %f556, %f553, %f555;
|
|
setp.gt.f32 %p91, %f554, 0f3FB504F3;
|
|
mul.f32 %f557, %f554, 0f3F000000;
|
|
add.f32 %f558, %f556, 0f3F800000;
|
|
selp.f32 %f559, %f558, %f556, %p91;
|
|
selp.f32 %f560, %f557, %f554, %p91;
|
|
add.f32 %f561, %f560, 0fBF800000;
|
|
add.f32 %f562, %f560, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f563, %f562;
|
|
add.f32 %f564, %f561, %f561;
|
|
mul.f32 %f565, %f564, %f563;
|
|
mul.f32 %f566, %f565, %f565;
|
|
mov.f32 %f567, 0f3C4CAF63;
|
|
mov.f32 %f568, 0f3B18F0FE;
|
|
fma.rn.f32 %f569, %f568, %f566, %f567;
|
|
mov.f32 %f570, 0f3DAAAABD;
|
|
fma.rn.f32 %f571, %f569, %f566, %f570;
|
|
mul.rn.f32 %f572, %f571, %f566;
|
|
mul.rn.f32 %f573, %f572, %f565;
|
|
sub.f32 %f574, %f561, %f565;
|
|
add.f32 %f575, %f574, %f574;
|
|
neg.f32 %f576, %f565;
|
|
fma.rn.f32 %f577, %f576, %f561, %f575;
|
|
mul.rn.f32 %f578, %f563, %f577;
|
|
add.f32 %f579, %f573, %f565;
|
|
sub.f32 %f580, %f565, %f579;
|
|
add.f32 %f581, %f573, %f580;
|
|
add.f32 %f582, %f578, %f581;
|
|
add.f32 %f583, %f579, %f582;
|
|
sub.f32 %f584, %f579, %f583;
|
|
add.f32 %f585, %f582, %f584;
|
|
mov.f32 %f586, 0f3F317200;
|
|
mul.rn.f32 %f587, %f559, %f586;
|
|
mov.f32 %f588, 0f35BFBE8E;
|
|
mul.rn.f32 %f589, %f559, %f588;
|
|
add.f32 %f590, %f587, %f583;
|
|
sub.f32 %f591, %f587, %f590;
|
|
add.f32 %f592, %f583, %f591;
|
|
add.f32 %f593, %f585, %f592;
|
|
add.f32 %f594, %f589, %f593;
|
|
add.f32 %f595, %f590, %f594;
|
|
sub.f32 %f596, %f590, %f595;
|
|
add.f32 %f597, %f594, %f596;
|
|
mul.rn.f32 %f598, %f549, %f595;
|
|
neg.f32 %f599, %f598;
|
|
fma.rn.f32 %f600, %f549, %f595, %f599;
|
|
fma.rn.f32 %f601, %f549, %f597, %f600;
|
|
fma.rn.f32 %f602, %f543, %f595, %f601;
|
|
add.rn.f32 %f603, %f598, %f602;
|
|
neg.f32 %f604, %f603;
|
|
add.rn.f32 %f605, %f598, %f604;
|
|
add.rn.f32 %f606, %f605, %f602;
|
|
mov.b32 %r254, %f603;
|
|
setp.eq.s32 %p92, %r254, 1118925336;
|
|
add.s32 %r255, %r254, -1;
|
|
mov.b32 %f607, %r255;
|
|
add.f32 %f608, %f606, 0f37000000;
|
|
selp.f32 %f111, %f608, %f606, %p92;
|
|
selp.f32 %f609, %f607, %f603, %p92;
|
|
mov.f32 %f610, 0f3FB8AA3B;
|
|
mul.rn.f32 %f611, %f609, %f610;
|
|
cvt.rzi.f32.f32 %f612, %f611;
|
|
abs.f32 %f613, %f612;
|
|
setp.gt.f32 %p93, %f613, 0f42FC0000;
|
|
mov.b32 %r256, %f612;
|
|
and.b32 %r257, %r256, -2147483648;
|
|
or.b32 %r258, %r257, 1123811328;
|
|
mov.b32 %f614, %r258;
|
|
selp.f32 %f615, %f614, %f612, %p93;
|
|
mov.f32 %f616, 0fBF317218;
|
|
fma.rn.f32 %f617, %f615, %f616, %f609;
|
|
mov.f32 %f618, 0f3102E308;
|
|
fma.rn.f32 %f619, %f615, %f618, %f617;
|
|
mul.f32 %f620, %f619, 0f3FB8AA3B;
|
|
add.f32 %f621, %f615, 0f4B40007F;
|
|
mov.b32 %r259, %f621;
|
|
shl.b32 %r260, %r259, 23;
|
|
mov.b32 %f622, %r260;
|
|
ex2.approx.ftz.f32 %f623, %f620;
|
|
mul.f32 %f112, %f623, %f622;
|
|
setp.eq.f32 %p94, %f112, 0f7F800000;
|
|
mov.f32 %f910, 0f7F800000;
|
|
@%p94 bra $L__BB0_75;
|
|
|
|
fma.rn.f32 %f910, %f112, %f111, %f112;
|
|
|
|
$L__BB0_75:
|
|
mov.f32 %f862, 0f00000000;
|
|
max.f32 %f861, %f862, %f542;
|
|
mov.f32 %f842, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f841, %f842;
|
|
add.f32 %f840, %f841, %f841;
|
|
mov.f32 %f839, 0f3ED55555;
|
|
sub.f32 %f838, %f839, %f840;
|
|
abs.f32 %f837, %f838;
|
|
setp.lt.f32 %p95, %f861, 0f00000000;
|
|
setp.eq.f32 %p96, %f837, 0f3F800000;
|
|
and.pred %p4, %p95, %p96;
|
|
setp.eq.f32 %p97, %f861, 0f00000000;
|
|
@%p97 bra $L__BB0_79;
|
|
bra.uni $L__BB0_76;
|
|
|
|
$L__BB0_79:
|
|
mov.f32 %f879, 0f00000000;
|
|
max.f32 %f878, %f879, %f542;
|
|
add.f32 %f628, %f878, %f878;
|
|
selp.f32 %f912, %f628, 0f00000000, %p96;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_76:
|
|
mov.f32 %f864, 0f00000000;
|
|
max.f32 %f863, %f864, %f542;
|
|
mov.b32 %r261, %f910;
|
|
xor.b32 %r262, %r261, -2147483648;
|
|
mov.b32 %f624, %r262;
|
|
selp.f32 %f912, %f624, %f910, %p4;
|
|
setp.geu.f32 %p98, %f863, 0f00000000;
|
|
@%p98 bra $L__BB0_80;
|
|
|
|
mov.f32 %f625, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f626, %f625;
|
|
setp.eq.f32 %p99, %f626, 0f3ED55555;
|
|
@%p99 bra $L__BB0_80;
|
|
|
|
mov.f32 %f912, 0f7FFFFFFF;
|
|
|
|
$L__BB0_80:
|
|
mov.f32 %f867, 0f00000000;
|
|
max.f32 %f866, %f867, %f542;
|
|
abs.f32 %f865, %f866;
|
|
add.f32 %f629, %f865, 0f3ED55555;
|
|
mov.b32 %r263, %f629;
|
|
setp.lt.s32 %p101, %r263, 2139095040;
|
|
@%p101 bra $L__BB0_85;
|
|
|
|
mov.f32 %f872, 0f00000000;
|
|
max.f32 %f871, %f872, %f542;
|
|
abs.f32 %f870, %f871;
|
|
setp.gtu.f32 %p102, %f870, 0f7F800000;
|
|
@%p102 bra $L__BB0_84;
|
|
bra.uni $L__BB0_82;
|
|
|
|
$L__BB0_84:
|
|
mov.f32 %f877, 0f00000000;
|
|
max.f32 %f876, %f877, %f542;
|
|
add.f32 %f912, %f876, 0f3ED55555;
|
|
bra.uni $L__BB0_85;
|
|
|
|
$L__BB0_82:
|
|
mov.f32 %f875, 0f00000000;
|
|
max.f32 %f874, %f875, %f542;
|
|
abs.f32 %f873, %f874;
|
|
setp.neu.f32 %p103, %f873, 0f7F800000;
|
|
@%p103 bra $L__BB0_85;
|
|
|
|
selp.f32 %f912, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_85:
|
|
abs.f32 %f121, %f107;
|
|
setp.lt.f32 %p104, %f121, 0f00800000;
|
|
mul.f32 %f631, %f121, 0f4B800000;
|
|
selp.f32 %f632, %f631, %f121, %p104;
|
|
selp.f32 %f633, 0fC3170000, 0fC2FE0000, %p104;
|
|
mov.b32 %r264, %f632;
|
|
and.b32 %r265, %r264, 8388607;
|
|
or.b32 %r266, %r265, 1065353216;
|
|
mov.b32 %f634, %r266;
|
|
shr.u32 %r267, %r264, 23;
|
|
cvt.rn.f32.u32 %f635, %r267;
|
|
add.f32 %f636, %f633, %f635;
|
|
setp.gt.f32 %p105, %f634, 0f3FB504F3;
|
|
mul.f32 %f637, %f634, 0f3F000000;
|
|
add.f32 %f638, %f636, 0f3F800000;
|
|
selp.f32 %f639, %f638, %f636, %p105;
|
|
selp.f32 %f640, %f637, %f634, %p105;
|
|
add.f32 %f641, %f640, 0fBF800000;
|
|
add.f32 %f642, %f640, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f643, %f642;
|
|
add.f32 %f644, %f641, %f641;
|
|
mul.f32 %f645, %f644, %f643;
|
|
mul.f32 %f646, %f645, %f645;
|
|
mov.f32 %f647, 0f3C4CAF63;
|
|
mov.f32 %f648, 0f3B18F0FE;
|
|
fma.rn.f32 %f649, %f648, %f646, %f647;
|
|
mov.f32 %f650, 0f3DAAAABD;
|
|
fma.rn.f32 %f651, %f649, %f646, %f650;
|
|
mul.rn.f32 %f652, %f651, %f646;
|
|
mul.rn.f32 %f653, %f652, %f645;
|
|
sub.f32 %f654, %f641, %f645;
|
|
add.f32 %f655, %f654, %f654;
|
|
neg.f32 %f656, %f645;
|
|
fma.rn.f32 %f657, %f656, %f641, %f655;
|
|
mul.rn.f32 %f658, %f643, %f657;
|
|
add.f32 %f659, %f653, %f645;
|
|
sub.f32 %f660, %f645, %f659;
|
|
add.f32 %f661, %f653, %f660;
|
|
add.f32 %f662, %f658, %f661;
|
|
add.f32 %f663, %f659, %f662;
|
|
sub.f32 %f664, %f659, %f663;
|
|
add.f32 %f665, %f662, %f664;
|
|
mov.f32 %f666, 0f3F317200;
|
|
mul.rn.f32 %f667, %f639, %f666;
|
|
mov.f32 %f668, 0f35BFBE8E;
|
|
mul.rn.f32 %f669, %f639, %f668;
|
|
add.f32 %f670, %f667, %f663;
|
|
sub.f32 %f671, %f667, %f670;
|
|
add.f32 %f672, %f663, %f671;
|
|
add.f32 %f673, %f665, %f672;
|
|
add.f32 %f674, %f669, %f673;
|
|
add.f32 %f675, %f670, %f674;
|
|
sub.f32 %f676, %f670, %f675;
|
|
add.f32 %f677, %f674, %f676;
|
|
mov.f32 %f678, 0f3ED55555;
|
|
mul.rn.f32 %f679, %f678, %f675;
|
|
neg.f32 %f680, %f679;
|
|
fma.rn.f32 %f681, %f678, %f675, %f680;
|
|
fma.rn.f32 %f682, %f678, %f677, %f681;
|
|
mov.f32 %f683, 0f00000000;
|
|
fma.rn.f32 %f684, %f683, %f675, %f682;
|
|
add.rn.f32 %f685, %f679, %f684;
|
|
neg.f32 %f686, %f685;
|
|
add.rn.f32 %f687, %f679, %f686;
|
|
add.rn.f32 %f688, %f687, %f684;
|
|
mov.b32 %r268, %f685;
|
|
setp.eq.s32 %p106, %r268, 1118925336;
|
|
add.s32 %r269, %r268, -1;
|
|
mov.b32 %f689, %r269;
|
|
add.f32 %f690, %f688, 0f37000000;
|
|
selp.f32 %f122, %f690, %f688, %p106;
|
|
selp.f32 %f691, %f689, %f685, %p106;
|
|
mov.f32 %f692, 0f3FB8AA3B;
|
|
mul.rn.f32 %f693, %f691, %f692;
|
|
cvt.rzi.f32.f32 %f694, %f693;
|
|
abs.f32 %f695, %f694;
|
|
setp.gt.f32 %p107, %f695, 0f42FC0000;
|
|
mov.b32 %r270, %f694;
|
|
and.b32 %r271, %r270, -2147483648;
|
|
or.b32 %r272, %r271, 1123811328;
|
|
mov.b32 %f696, %r272;
|
|
selp.f32 %f697, %f696, %f694, %p107;
|
|
mov.f32 %f698, 0fBF317218;
|
|
fma.rn.f32 %f699, %f697, %f698, %f691;
|
|
mov.f32 %f700, 0f3102E308;
|
|
fma.rn.f32 %f701, %f697, %f700, %f699;
|
|
mul.f32 %f702, %f701, 0f3FB8AA3B;
|
|
add.f32 %f703, %f697, 0f4B40007F;
|
|
mov.b32 %r273, %f703;
|
|
shl.b32 %r274, %r273, 23;
|
|
mov.b32 %f704, %r274;
|
|
ex2.approx.ftz.f32 %f705, %f702;
|
|
mul.f32 %f123, %f705, %f704;
|
|
setp.eq.f32 %p108, %f123, 0f7F800000;
|
|
mov.f32 %f913, 0f7F800000;
|
|
@%p108 bra $L__BB0_87;
|
|
|
|
fma.rn.f32 %f913, %f123, %f122, %f123;
|
|
|
|
$L__BB0_87:
|
|
setp.lt.f32 %p109, %f107, 0f00000000;
|
|
and.pred %p5, %p109, %p96;
|
|
setp.eq.f32 %p111, %f107, 0f00000000;
|
|
@%p111 bra $L__BB0_91;
|
|
bra.uni $L__BB0_88;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f710, %f107, %f107;
|
|
selp.f32 %f915, %f710, 0f00000000, %p96;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_88:
|
|
mov.b32 %r275, %f913;
|
|
xor.b32 %r276, %r275, -2147483648;
|
|
mov.b32 %f706, %r276;
|
|
selp.f32 %f915, %f706, %f913, %p5;
|
|
setp.geu.f32 %p112, %f107, 0f00000000;
|
|
@%p112 bra $L__BB0_92;
|
|
|
|
mov.f32 %f707, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f708, %f707;
|
|
setp.eq.f32 %p113, %f708, 0f3ED55555;
|
|
@%p113 bra $L__BB0_92;
|
|
|
|
mov.f32 %f915, 0f7FFFFFFF;
|
|
|
|
$L__BB0_92:
|
|
mov.f32 %f845, 0f00000000;
|
|
max.f32 %f844, %f845, %f544;
|
|
abs.f32 %f843, %f844;
|
|
add.f32 %f711, %f843, 0f3ED55555;
|
|
mov.b32 %r277, %f711;
|
|
setp.lt.s32 %p115, %r277, 2139095040;
|
|
@%p115 bra $L__BB0_97;
|
|
|
|
mov.f32 %f848, 0f00000000;
|
|
max.f32 %f847, %f848, %f544;
|
|
abs.f32 %f846, %f847;
|
|
setp.gtu.f32 %p116, %f846, 0f7F800000;
|
|
@%p116 bra $L__BB0_96;
|
|
bra.uni $L__BB0_94;
|
|
|
|
$L__BB0_96:
|
|
add.f32 %f915, %f107, 0f3ED55555;
|
|
bra.uni $L__BB0_97;
|
|
|
|
$L__BB0_94:
|
|
mov.f32 %f851, 0f00000000;
|
|
max.f32 %f850, %f851, %f544;
|
|
abs.f32 %f849, %f850;
|
|
setp.neu.f32 %p117, %f849, 0f7F800000;
|
|
@%p117 bra $L__BB0_97;
|
|
|
|
selp.f32 %f915, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_97:
|
|
abs.f32 %f132, %f108;
|
|
setp.lt.f32 %p118, %f132, 0f00800000;
|
|
mul.f32 %f713, %f132, 0f4B800000;
|
|
selp.f32 %f714, %f713, %f132, %p118;
|
|
selp.f32 %f715, 0fC3170000, 0fC2FE0000, %p118;
|
|
mov.b32 %r278, %f714;
|
|
and.b32 %r279, %r278, 8388607;
|
|
or.b32 %r280, %r279, 1065353216;
|
|
mov.b32 %f716, %r280;
|
|
shr.u32 %r281, %r278, 23;
|
|
cvt.rn.f32.u32 %f717, %r281;
|
|
add.f32 %f718, %f715, %f717;
|
|
setp.gt.f32 %p119, %f716, 0f3FB504F3;
|
|
mul.f32 %f719, %f716, 0f3F000000;
|
|
add.f32 %f720, %f718, 0f3F800000;
|
|
selp.f32 %f721, %f720, %f718, %p119;
|
|
selp.f32 %f722, %f719, %f716, %p119;
|
|
add.f32 %f723, %f722, 0fBF800000;
|
|
add.f32 %f724, %f722, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f725, %f724;
|
|
add.f32 %f726, %f723, %f723;
|
|
mul.f32 %f727, %f726, %f725;
|
|
mul.f32 %f728, %f727, %f727;
|
|
mov.f32 %f729, 0f3C4CAF63;
|
|
mov.f32 %f730, 0f3B18F0FE;
|
|
fma.rn.f32 %f731, %f730, %f728, %f729;
|
|
mov.f32 %f732, 0f3DAAAABD;
|
|
fma.rn.f32 %f733, %f731, %f728, %f732;
|
|
mul.rn.f32 %f734, %f733, %f728;
|
|
mul.rn.f32 %f735, %f734, %f727;
|
|
sub.f32 %f736, %f723, %f727;
|
|
add.f32 %f737, %f736, %f736;
|
|
neg.f32 %f738, %f727;
|
|
fma.rn.f32 %f739, %f738, %f723, %f737;
|
|
mul.rn.f32 %f740, %f725, %f739;
|
|
add.f32 %f741, %f735, %f727;
|
|
sub.f32 %f742, %f727, %f741;
|
|
add.f32 %f743, %f735, %f742;
|
|
add.f32 %f744, %f740, %f743;
|
|
add.f32 %f745, %f741, %f744;
|
|
sub.f32 %f746, %f741, %f745;
|
|
add.f32 %f747, %f744, %f746;
|
|
mov.f32 %f748, 0f3F317200;
|
|
mul.rn.f32 %f749, %f721, %f748;
|
|
mov.f32 %f750, 0f35BFBE8E;
|
|
mul.rn.f32 %f751, %f721, %f750;
|
|
add.f32 %f752, %f749, %f745;
|
|
sub.f32 %f753, %f749, %f752;
|
|
add.f32 %f754, %f745, %f753;
|
|
add.f32 %f755, %f747, %f754;
|
|
add.f32 %f756, %f751, %f755;
|
|
add.f32 %f757, %f752, %f756;
|
|
sub.f32 %f758, %f752, %f757;
|
|
add.f32 %f759, %f756, %f758;
|
|
mov.f32 %f760, 0f3ED55555;
|
|
mul.rn.f32 %f761, %f760, %f757;
|
|
neg.f32 %f762, %f761;
|
|
fma.rn.f32 %f763, %f760, %f757, %f762;
|
|
fma.rn.f32 %f764, %f760, %f759, %f763;
|
|
mov.f32 %f765, 0f00000000;
|
|
fma.rn.f32 %f766, %f765, %f757, %f764;
|
|
add.rn.f32 %f767, %f761, %f766;
|
|
neg.f32 %f768, %f767;
|
|
add.rn.f32 %f769, %f761, %f768;
|
|
add.rn.f32 %f770, %f769, %f766;
|
|
mov.b32 %r282, %f767;
|
|
setp.eq.s32 %p120, %r282, 1118925336;
|
|
add.s32 %r283, %r282, -1;
|
|
mov.b32 %f771, %r283;
|
|
add.f32 %f772, %f770, 0f37000000;
|
|
selp.f32 %f133, %f772, %f770, %p120;
|
|
selp.f32 %f773, %f771, %f767, %p120;
|
|
mov.f32 %f774, 0f3FB8AA3B;
|
|
mul.rn.f32 %f775, %f773, %f774;
|
|
cvt.rzi.f32.f32 %f776, %f775;
|
|
abs.f32 %f777, %f776;
|
|
setp.gt.f32 %p121, %f777, 0f42FC0000;
|
|
mov.b32 %r284, %f776;
|
|
and.b32 %r285, %r284, -2147483648;
|
|
or.b32 %r286, %r285, 1123811328;
|
|
mov.b32 %f778, %r286;
|
|
selp.f32 %f779, %f778, %f776, %p121;
|
|
mov.f32 %f780, 0fBF317218;
|
|
fma.rn.f32 %f781, %f779, %f780, %f773;
|
|
mov.f32 %f782, 0f3102E308;
|
|
fma.rn.f32 %f783, %f779, %f782, %f781;
|
|
mul.f32 %f784, %f783, 0f3FB8AA3B;
|
|
add.f32 %f785, %f779, 0f4B40007F;
|
|
mov.b32 %r287, %f785;
|
|
shl.b32 %r288, %r287, 23;
|
|
mov.b32 %f786, %r288;
|
|
ex2.approx.ftz.f32 %f787, %f784;
|
|
mul.f32 %f134, %f787, %f786;
|
|
setp.eq.f32 %p122, %f134, 0f7F800000;
|
|
mov.f32 %f916, 0f7F800000;
|
|
@%p122 bra $L__BB0_99;
|
|
|
|
fma.rn.f32 %f916, %f134, %f133, %f134;
|
|
|
|
$L__BB0_99:
|
|
setp.lt.f32 %p123, %f108, 0f00000000;
|
|
and.pred %p6, %p123, %p96;
|
|
setp.eq.f32 %p125, %f108, 0f00000000;
|
|
@%p125 bra $L__BB0_103;
|
|
bra.uni $L__BB0_100;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f792, %f108, %f108;
|
|
selp.f32 %f918, %f792, 0f00000000, %p96;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_100:
|
|
mov.b32 %r289, %f916;
|
|
xor.b32 %r290, %r289, -2147483648;
|
|
mov.b32 %f788, %r290;
|
|
selp.f32 %f918, %f788, %f916, %p6;
|
|
setp.geu.f32 %p126, %f108, 0f00000000;
|
|
@%p126 bra $L__BB0_104;
|
|
|
|
mov.f32 %f789, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f790, %f789;
|
|
setp.eq.f32 %p127, %f790, 0f3ED55555;
|
|
@%p127 bra $L__BB0_104;
|
|
|
|
mov.f32 %f918, 0f7FFFFFFF;
|
|
|
|
$L__BB0_104:
|
|
mov.f32 %f854, 0f00000000;
|
|
max.f32 %f853, %f854, %f545;
|
|
abs.f32 %f852, %f853;
|
|
add.f32 %f793, %f852, 0f3ED55555;
|
|
mov.b32 %r291, %f793;
|
|
setp.lt.s32 %p129, %r291, 2139095040;
|
|
@%p129 bra $L__BB0_109;
|
|
|
|
mov.f32 %f857, 0f00000000;
|
|
max.f32 %f856, %f857, %f545;
|
|
abs.f32 %f855, %f856;
|
|
setp.gtu.f32 %p130, %f855, 0f7F800000;
|
|
@%p130 bra $L__BB0_108;
|
|
bra.uni $L__BB0_106;
|
|
|
|
$L__BB0_108:
|
|
add.f32 %f918, %f108, 0f3ED55555;
|
|
bra.uni $L__BB0_109;
|
|
|
|
$L__BB0_106:
|
|
mov.f32 %f860, 0f00000000;
|
|
max.f32 %f859, %f860, %f545;
|
|
abs.f32 %f858, %f859;
|
|
setp.neu.f32 %p131, %f858, 0f7F800000;
|
|
@%p131 bra $L__BB0_109;
|
|
|
|
selp.f32 %f918, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_109:
|
|
mov.f32 %f869, 0f00000000;
|
|
max.f32 %f868, %f869, %f542;
|
|
ld.const.u64 %rd71, [params+144];
|
|
cvta.to.global.u64 %rd70, %rd71;
|
|
ld.const.u32 %r310, [params+136];
|
|
mad.lo.s32 %r309, %r310, %r5, %r4;
|
|
cvt.u64.u32 %rd69, %r309;
|
|
fma.rn.f32 %f794, %f912, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p132, %f868, 0f3F800000;
|
|
mov.f32 %f795, 0f3F800000;
|
|
selp.f32 %f796, 0f3F7FFFFF, %f794, %p132;
|
|
mul.f32 %f797, %f868, 0f414EB852;
|
|
setp.lt.f32 %p133, %f868, 0f3B4D2E1C;
|
|
selp.f32 %f798, %f797, %f796, %p133;
|
|
fma.rn.f32 %f799, %f915, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p134, %f107, 0f3F800000;
|
|
selp.f32 %f800, 0f3F7FFFFF, %f799, %p134;
|
|
mul.f32 %f801, %f107, 0f414EB852;
|
|
setp.lt.f32 %p135, %f107, 0f3B4D2E1C;
|
|
selp.f32 %f802, %f801, %f800, %p135;
|
|
fma.rn.f32 %f803, %f918, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p136, %f108, 0f3F800000;
|
|
selp.f32 %f804, 0f3F7FFFFF, %f803, %p136;
|
|
mul.f32 %f805, %f108, 0f414EB852;
|
|
setp.lt.f32 %p137, %f108, 0f3B4D2E1C;
|
|
selp.f32 %f806, %f805, %f804, %p137;
|
|
min.f32 %f807, %f798, %f795;
|
|
mov.f32 %f808, 0f00000000;
|
|
max.f32 %f809, %f808, %f807;
|
|
mul.f32 %f810, %f809, 0f43800000;
|
|
cvt.rzi.u32.f32 %r292, %f810;
|
|
min.u32 %r293, %r292, 255;
|
|
min.f32 %f811, %f802, %f795;
|
|
max.f32 %f812, %f808, %f811;
|
|
mul.f32 %f813, %f812, 0f43800000;
|
|
cvt.rzi.u32.f32 %r294, %f813;
|
|
min.u32 %r295, %r294, 255;
|
|
min.f32 %f814, %f806, %f795;
|
|
max.f32 %f815, %f808, %f814;
|
|
mul.f32 %f816, %f815, 0f43800000;
|
|
cvt.rzi.u32.f32 %r296, %f816;
|
|
min.u32 %r297, %r296, 255;
|
|
shl.b64 %rd57, %rd69, 2;
|
|
add.s64 %rd58, %rd70, %rd57;
|
|
cvt.u16.u32 %rs15, %r297;
|
|
cvt.u16.u32 %rs16, %r295;
|
|
cvt.u16.u32 %rs17, %r293;
|
|
mov.u16 %rs18, 255;
|
|
st.global.v4.u8 [%rd58], {%rs17, %rs16, %rs15, %rs18};
|
|
|
|
$L__BB0_110:
|
|
ld.const.u32 %r311, [params+104];
|
|
and.b32 %r298, %r311, 4;
|
|
setp.eq.s32 %p138, %r298, 0;
|
|
@%p138 bra $L__BB0_120;
|
|
|
|
ld.const.u32 %r299, [params+108];
|
|
setp.eq.s32 %p139, %r299, 0;
|
|
ld.const.u64 %rd59, [params+224];
|
|
cvta.to.global.u64 %rd60, %rd59;
|
|
ld.const.u32 %r300, [params+216];
|
|
mad.lo.s32 %r301, %r300, %r5, %r4;
|
|
mul.wide.u32 %rd61, %r301, 8;
|
|
add.s64 %rd18, %rd60, %rd61;
|
|
@%p139 bra $L__BB0_113;
|
|
|
|
ld.global.v4.u16 {%rs26, %rs27, %rs28, %rs29}, [%rd18];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f817, %rs26;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f818, %rs27;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f819, %rs28;}
|
|
|
|
// end inline asm
|
|
add.f32 %f820, %f67, %f817;
|
|
add.f32 %f821, %f68, %f818;
|
|
add.f32 %f822, %f69, %f819;
|
|
mov.f32 %f823, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f822;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f821;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs22, %f820;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f823;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd18], {%rs22, %rs23, %rs24, %rs25};
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_113:
|
|
mov.f32 %f827, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f827;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f69;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f68;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f67;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd18], {%rs30, %rs31, %rs32, %rs33};
|
|
|
|
$L__BB0_120:
|
|
ret;
|
|
|
|
}
|
|
|