2153 lines
59 KiB
Plaintext
2153 lines
59 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 image_RNM3[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 rnd_seeds[1];
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.global .align 4 .b8 directDir[12];
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.global .align 4 .b8 directColor[12];
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.global .align 4 .f32 shadowSpread;
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.global .align 4 .u32 samples;
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.global .align 4 .u32 ignoreNormal;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo9directDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11directColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12shadowSpreadE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename9directDirE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename11directColorE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename12shadowSpreadE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum9directDirE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11directColorE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12shadowSpreadE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic9directDirE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11directColorE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12shadowSpreadE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation9directDirE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11directColorE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12shadowSpreadE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[40];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<124>;
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.reg .b16 %rs<152>;
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.reg .f32 %f<829>;
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.reg .b32 %r<388>;
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.reg .b64 %rd<297>;
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mov.u64 %rd296, __local_depot0;
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cvta.local.u64 %SP, %rd296;
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ld.global.v2.u32 {%r101, %r102}, [pixelID];
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cvt.u64.u32 %rd23, %r101;
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cvt.u64.u32 %rd24, %r102;
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mov.u64 %rd27, uvnormal;
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cvta.global.u64 %rd22, %rd27;
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mov.u32 %r99, 2;
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mov.u32 %r100, 4;
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mov.u64 %rd26, 0;
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// inline asm
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call (%rd21), _rt_buffer_get_64, (%rd22, %r99, %r100, %rd23, %rd24, %rd26, %rd26);
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// inline asm
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ld.u32 %r1, [%rd21];
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shr.u32 %r105, %r1, 16;
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cvt.u16.u32 %rs1, %r105;
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and.b16 %rs7, %rs1, 255;
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cvt.u16.u32 %rs8, %r1;
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or.b16 %rs9, %rs8, %rs7;
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setp.eq.s16 %p5, %rs9, 0;
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mov.f32 %f787, 0f00000000;
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mov.f32 %f788, %f787;
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mov.f32 %f789, %f787;
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@%p5 bra BB0_2;
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ld.u8 %rs10, [%rd21+1];
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and.b16 %rs12, %rs8, 255;
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cvt.rn.f32.u16 %f148, %rs12;
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div.rn.f32 %f149, %f148, 0f437F0000;
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fma.rn.f32 %f150, %f149, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f151, %rs10;
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div.rn.f32 %f152, %f151, 0f437F0000;
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fma.rn.f32 %f153, %f152, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f154, %rs7;
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div.rn.f32 %f155, %f154, 0f437F0000;
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fma.rn.f32 %f156, %f155, 0f40000000, 0fBF800000;
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mul.f32 %f157, %f153, %f153;
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fma.rn.f32 %f158, %f150, %f150, %f157;
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fma.rn.f32 %f159, %f156, %f156, %f158;
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sqrt.rn.f32 %f160, %f159;
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rcp.rn.f32 %f161, %f160;
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mul.f32 %f787, %f150, %f161;
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mul.f32 %f788, %f153, %f161;
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mul.f32 %f789, %f156, %f161;
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BB0_2:
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ld.global.v2.u32 {%r106, %r107}, [pixelID];
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ld.global.v2.u32 {%r109, %r110}, [tileInfo];
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add.s32 %r2, %r106, %r109;
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add.s32 %r3, %r107, %r110;
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setp.eq.f32 %p6, %f788, 0f00000000;
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setp.eq.f32 %p7, %f787, 0f00000000;
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and.pred %p8, %p7, %p6;
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setp.eq.f32 %p9, %f789, 0f00000000;
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and.pred %p10, %p8, %p9;
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@%p10 bra BB0_122;
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bra.uni BB0_3;
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BB0_122:
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ld.global.u32 %r387, [imageEnabled];
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and.b32 %r312, %r387, 1;
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setp.eq.b32 %p116, %r312, 1;
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@!%p116 bra BB0_124;
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bra.uni BB0_123;
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BB0_123:
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cvt.u64.u32 %rd180, %r2;
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cvt.u64.u32 %rd181, %r3;
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mov.u64 %rd184, image;
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cvta.global.u64 %rd179, %rd184;
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mov.u64 %rd183, 0;
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// inline asm
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call (%rd178), _rt_buffer_get_64, (%rd179, %r99, %r100, %rd180, %rd181, %rd183, %rd183);
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// inline asm
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mov.u16 %rs84, 0;
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st.v4.u8 [%rd178], {%rs84, %rs84, %rs84, %rs84};
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ld.global.u32 %r387, [imageEnabled];
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BB0_124:
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and.b32 %r315, %r387, 8;
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setp.eq.s32 %p117, %r315, 0;
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@%p117 bra BB0_126;
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cvt.u64.u32 %rd188, %r3;
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cvt.u64.u32 %rd187, %r2;
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mov.u64 %rd191, image_Mask;
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cvta.global.u64 %rd186, %rd191;
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mov.u64 %rd190, 0;
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// inline asm
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call (%rd185), _rt_buffer_get_64, (%rd186, %r99, %r99, %rd187, %rd188, %rd190, %rd190);
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// inline asm
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mov.f32 %f709, 0f00000000;
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cvt.rzi.u32.f32 %r318, %f709;
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cvt.u16.u32 %rs85, %r318;
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mov.u16 %rs86, 0;
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st.v2.u8 [%rd185], {%rs85, %rs86};
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ld.global.u32 %r387, [imageEnabled];
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BB0_126:
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cvt.u64.u32 %rd19, %r2;
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cvt.u64.u32 %rd20, %r3;
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and.b32 %r319, %r387, 4;
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setp.eq.s32 %p118, %r319, 0;
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@%p118 bra BB0_130;
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ld.global.u32 %r320, [additive];
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setp.eq.s32 %p119, %r320, 0;
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@%p119 bra BB0_129;
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mov.u64 %rd204, image_HDR;
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cvta.global.u64 %rd193, %rd204;
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mov.u32 %r324, 8;
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mov.u64 %rd203, 0;
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// inline asm
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call (%rd192), _rt_buffer_get_64, (%rd193, %r99, %r324, %rd19, %rd20, %rd203, %rd203);
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// inline asm
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ld.v4.u16 {%rs93, %rs94, %rs95, %rs96}, [%rd192];
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// inline asm
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{ cvt.f32.f16 %f710, %rs93;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f711, %rs94;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f712, %rs95;}
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// inline asm
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// inline asm
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call (%rd198), _rt_buffer_get_64, (%rd193, %r99, %r324, %rd19, %rd20, %rd203, %rd203);
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// inline asm
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add.f32 %f713, %f710, 0f00000000;
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add.f32 %f714, %f711, 0f00000000;
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add.f32 %f715, %f712, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs92, %f715;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs91, %f714;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs90, %f713;}
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// inline asm
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mov.u16 %rs97, 0;
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st.v4.u16 [%rd198], {%rs90, %rs91, %rs92, %rs97};
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bra.uni BB0_130;
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BB0_3:
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ld.global.f32 %f9, [directDir+8];
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ld.global.f32 %f8, [directDir+4];
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ld.global.f32 %f7, [directDir];
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mul.f32 %f165, %f787, %f7;
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mul.f32 %f166, %f788, %f8;
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neg.f32 %f167, %f166;
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sub.f32 %f168, %f167, %f165;
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mul.f32 %f169, %f789, %f9;
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sub.f32 %f10, %f168, %f169;
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ld.global.v2.u32 {%r118, %r119}, [pixelID];
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cvt.u64.u32 %rd30, %r118;
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cvt.u64.u32 %rd31, %r119;
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mov.u64 %rd40, uvpos;
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cvta.global.u64 %rd29, %rd40;
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mov.u32 %r115, 12;
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// inline asm
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call (%rd28), _rt_buffer_get_64, (%rd29, %r99, %r115, %rd30, %rd31, %rd26, %rd26);
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// inline asm
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ld.f32 %f170, [%rd28+8];
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ld.f32 %f171, [%rd28+4];
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ld.f32 %f172, [%rd28];
|
|
mul.f32 %f173, %f172, 0f3456BF95;
|
|
mul.f32 %f174, %f171, 0f3456BF95;
|
|
mul.f32 %f175, %f170, 0f3456BF95;
|
|
abs.f32 %f176, %f787;
|
|
div.rn.f32 %f177, %f173, %f176;
|
|
abs.f32 %f178, %f788;
|
|
div.rn.f32 %f179, %f174, %f178;
|
|
abs.f32 %f180, %f789;
|
|
div.rn.f32 %f181, %f175, %f180;
|
|
abs.f32 %f182, %f177;
|
|
abs.f32 %f183, %f179;
|
|
abs.f32 %f184, %f181;
|
|
mov.f32 %f185, 0f38D1B717;
|
|
max.f32 %f186, %f182, %f185;
|
|
max.f32 %f187, %f183, %f185;
|
|
max.f32 %f188, %f184, %f185;
|
|
fma.rn.f32 %f11, %f787, %f186, %f172;
|
|
fma.rn.f32 %f12, %f788, %f187, %f171;
|
|
fma.rn.f32 %f13, %f789, %f188, %f170;
|
|
abs.f32 %f189, %f7;
|
|
abs.f32 %f190, %f9;
|
|
setp.gt.f32 %p11, %f189, %f190;
|
|
neg.f32 %f191, %f8;
|
|
neg.f32 %f192, %f9;
|
|
selp.f32 %f193, %f191, 0f00000000, %p11;
|
|
selp.f32 %f194, %f7, %f192, %p11;
|
|
selp.f32 %f195, 0f00000000, %f8, %p11;
|
|
mul.f32 %f196, %f194, %f194;
|
|
fma.rn.f32 %f197, %f193, %f193, %f196;
|
|
fma.rn.f32 %f198, %f195, %f195, %f197;
|
|
sqrt.rn.f32 %f199, %f198;
|
|
rcp.rn.f32 %f200, %f199;
|
|
mul.f32 %f14, %f193, %f200;
|
|
mul.f32 %f15, %f194, %f200;
|
|
mul.f32 %f16, %f195, %f200;
|
|
ld.global.v2.u32 {%r122, %r123}, [pixelID];
|
|
cvt.u64.u32 %rd36, %r122;
|
|
cvt.u64.u32 %rd37, %r123;
|
|
mov.u64 %rd41, rnd_seeds;
|
|
cvta.global.u64 %rd35, %rd41;
|
|
// inline asm
|
|
call (%rd34), _rt_buffer_get_64, (%rd35, %r99, %r100, %rd36, %rd37, %rd26, %rd26);
|
|
// inline asm
|
|
ld.global.u32 %r356, [samples];
|
|
mov.f32 %f808, 0f00000000;
|
|
setp.lt.s32 %p12, %r356, 1;
|
|
@%p12 bra BB0_4;
|
|
|
|
cvt.rn.f32.s32 %f204, %r356;
|
|
rcp.rn.f32 %f17, %f204;
|
|
ld.u32 %r382, [%rd34];
|
|
mul.f32 %f18, %f11, 0f3456BF95;
|
|
mul.f32 %f19, %f12, 0f3456BF95;
|
|
mul.f32 %f20, %f13, 0f3456BF95;
|
|
mul.f32 %f205, %f7, %f15;
|
|
mul.f32 %f206, %f8, %f14;
|
|
sub.f32 %f21, %f206, %f205;
|
|
mul.f32 %f207, %f9, %f14;
|
|
mul.f32 %f208, %f7, %f16;
|
|
sub.f32 %f22, %f208, %f207;
|
|
mul.f32 %f209, %f8, %f16;
|
|
mul.f32 %f210, %f9, %f15;
|
|
sub.f32 %f23, %f210, %f209;
|
|
mov.f32 %f808, 0f00000000;
|
|
mov.u32 %r357, 0;
|
|
abs.f32 %f211, %f19;
|
|
abs.f32 %f212, %f18;
|
|
max.f32 %f213, %f212, %f211;
|
|
abs.f32 %f214, %f20;
|
|
max.f32 %f215, %f213, %f214;
|
|
mov.f32 %f809, %f808;
|
|
mov.f32 %f810, %f808;
|
|
|
|
BB0_6:
|
|
setp.lt.s32 %p13, %r356, 1;
|
|
@%p13 bra BB0_55;
|
|
|
|
cvt.rn.f32.s32 %f27, %r357;
|
|
max.f32 %f28, %f215, %f185;
|
|
mov.u32 %r359, 0;
|
|
|
|
BB0_8:
|
|
mad.lo.s32 %r128, %r382, 1664525, 1013904223;
|
|
and.b32 %r129, %r128, 16777215;
|
|
cvt.rn.f32.u32 %f217, %r129;
|
|
fma.rn.f32 %f218, %f217, 0f33800000, %f27;
|
|
mul.f32 %f219, %f17, %f218;
|
|
mad.lo.s32 %r382, %r128, 1664525, 1013904223;
|
|
and.b32 %r130, %r382, 16777215;
|
|
cvt.rn.f32.u32 %f220, %r130;
|
|
cvt.rn.f32.s32 %f221, %r359;
|
|
fma.rn.f32 %f222, %f220, 0f33800000, %f221;
|
|
mul.f32 %f223, %f17, %f222;
|
|
sqrt.rn.f32 %f32, %f219;
|
|
mul.f32 %f802, %f223, 0f40C90FDB;
|
|
abs.f32 %f34, %f802;
|
|
setp.neu.f32 %p14, %f34, 0f7F800000;
|
|
mov.f32 %f796, %f802;
|
|
@%p14 bra BB0_10;
|
|
|
|
mov.f32 %f224, 0f00000000;
|
|
mul.rn.f32 %f796, %f802, %f224;
|
|
|
|
BB0_10:
|
|
mul.f32 %f225, %f796, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r370, %f225;
|
|
cvt.rn.f32.s32 %f226, %r370;
|
|
neg.f32 %f227, %f226;
|
|
mov.f32 %f228, 0f3FC90FDA;
|
|
fma.rn.f32 %f229, %f227, %f228, %f796;
|
|
mov.f32 %f230, 0f33A22168;
|
|
fma.rn.f32 %f231, %f227, %f230, %f229;
|
|
mov.f32 %f232, 0f27C234C5;
|
|
fma.rn.f32 %f797, %f227, %f232, %f231;
|
|
abs.f32 %f233, %f796;
|
|
setp.leu.f32 %p15, %f233, 0f47CE4780;
|
|
@%p15 bra BB0_21;
|
|
|
|
add.u64 %rd43, %SP, 12;
|
|
cvta.to.local.u64 %rd3, %rd43;
|
|
mov.b32 %r13, %f796;
|
|
shr.u32 %r14, %r13, 23;
|
|
shl.b32 %r133, %r13, 8;
|
|
or.b32 %r15, %r133, -2147483648;
|
|
mov.u32 %r361, 0;
|
|
mov.u64 %rd293, 0;
|
|
mov.u64 %rd292, %rd3;
|
|
mov.u32 %r362, %r361;
|
|
|
|
BB0_12:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd44, %rd293, 2;
|
|
mov.u64 %rd45, __cudart_i2opi_f;
|
|
add.s64 %rd46, %rd45, %rd44;
|
|
ld.const.u32 %r136, [%rd46];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r134, %r136, %r15, %r362;
|
|
madc.hi.u32 %r362, %r136, %r15, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd292], %r134;
|
|
add.s32 %r361, %r361, 1;
|
|
cvt.s64.s32 %rd293, %r361;
|
|
mul.wide.s32 %rd49, %r361, 4;
|
|
add.s64 %rd292, %rd3, %rd49;
|
|
setp.ne.s32 %p16, %r361, 6;
|
|
@%p16 bra BB0_12;
|
|
|
|
and.b32 %r139, %r14, 255;
|
|
add.s32 %r140, %r139, -128;
|
|
shr.u32 %r141, %r140, 5;
|
|
and.b32 %r20, %r13, -2147483648;
|
|
cvta.to.local.u64 %rd51, %rd43;
|
|
st.local.u32 [%rd51+24], %r362;
|
|
mov.u32 %r142, 6;
|
|
sub.s32 %r143, %r142, %r141;
|
|
mul.wide.s32 %rd52, %r143, 4;
|
|
add.s64 %rd8, %rd51, %rd52;
|
|
ld.local.u32 %r363, [%rd8];
|
|
ld.local.u32 %r364, [%rd8+-4];
|
|
and.b32 %r23, %r14, 31;
|
|
setp.eq.s32 %p17, %r23, 0;
|
|
@%p17 bra BB0_15;
|
|
|
|
mov.u32 %r144, 32;
|
|
sub.s32 %r145, %r144, %r23;
|
|
shr.u32 %r146, %r364, %r145;
|
|
shl.b32 %r147, %r363, %r23;
|
|
add.s32 %r363, %r146, %r147;
|
|
ld.local.u32 %r148, [%rd8+-8];
|
|
shr.u32 %r149, %r148, %r145;
|
|
shl.b32 %r150, %r364, %r23;
|
|
add.s32 %r364, %r149, %r150;
|
|
|
|
BB0_15:
|
|
shr.u32 %r151, %r364, 30;
|
|
shl.b32 %r152, %r363, 2;
|
|
add.s32 %r365, %r151, %r152;
|
|
shl.b32 %r29, %r364, 2;
|
|
shr.u32 %r153, %r365, 31;
|
|
shr.u32 %r154, %r363, 30;
|
|
add.s32 %r30, %r153, %r154;
|
|
setp.eq.s32 %p18, %r153, 0;
|
|
@%p18 bra BB0_16;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_16:
|
|
mov.u32 %r366, %r20;
|
|
mov.u32 %r367, %r29;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_17:
|
|
not.b32 %r155, %r365;
|
|
neg.s32 %r367, %r29;
|
|
setp.eq.s32 %p19, %r29, 0;
|
|
selp.u32 %r156, 1, 0, %p19;
|
|
add.s32 %r365, %r156, %r155;
|
|
xor.b32 %r366, %r20, -2147483648;
|
|
|
|
BB0_18:
|
|
clz.b32 %r369, %r365;
|
|
setp.eq.s32 %p20, %r369, 0;
|
|
shl.b32 %r157, %r365, %r369;
|
|
mov.u32 %r158, 32;
|
|
sub.s32 %r159, %r158, %r369;
|
|
shr.u32 %r160, %r367, %r159;
|
|
add.s32 %r161, %r160, %r157;
|
|
selp.b32 %r38, %r365, %r161, %p20;
|
|
mov.u32 %r162, -921707870;
|
|
mul.hi.u32 %r368, %r38, %r162;
|
|
setp.eq.s32 %p21, %r20, 0;
|
|
neg.s32 %r163, %r30;
|
|
selp.b32 %r370, %r30, %r163, %p21;
|
|
setp.lt.s32 %p22, %r368, 1;
|
|
@%p22 bra BB0_20;
|
|
|
|
mul.lo.s32 %r164, %r38, -921707870;
|
|
shr.u32 %r165, %r164, 31;
|
|
shl.b32 %r166, %r368, 1;
|
|
add.s32 %r368, %r165, %r166;
|
|
add.s32 %r369, %r369, 1;
|
|
|
|
BB0_20:
|
|
mov.u32 %r167, 126;
|
|
sub.s32 %r168, %r167, %r369;
|
|
shl.b32 %r169, %r168, 23;
|
|
add.s32 %r170, %r368, 1;
|
|
shr.u32 %r171, %r170, 7;
|
|
add.s32 %r172, %r171, 1;
|
|
shr.u32 %r173, %r172, 1;
|
|
add.s32 %r174, %r173, %r169;
|
|
or.b32 %r175, %r174, %r366;
|
|
mov.b32 %f797, %r175;
|
|
|
|
BB0_21:
|
|
mul.rn.f32 %f40, %f797, %f797;
|
|
add.s32 %r46, %r370, 1;
|
|
and.b32 %r47, %r46, 1;
|
|
setp.eq.s32 %p23, %r47, 0;
|
|
@%p23 bra BB0_23;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_23:
|
|
mov.f32 %f236, 0f3C08839E;
|
|
mov.f32 %f237, 0fB94CA1F9;
|
|
fma.rn.f32 %f798, %f237, %f40, %f236;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_22:
|
|
mov.f32 %f234, 0fBAB6061A;
|
|
mov.f32 %f235, 0f37CCF5CE;
|
|
fma.rn.f32 %f798, %f235, %f40, %f234;
|
|
|
|
BB0_24:
|
|
@%p23 bra BB0_26;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_26:
|
|
mov.f32 %f241, 0fBE2AAAA3;
|
|
fma.rn.f32 %f242, %f798, %f40, %f241;
|
|
mov.f32 %f243, 0f00000000;
|
|
fma.rn.f32 %f799, %f242, %f40, %f243;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_25:
|
|
mov.f32 %f238, 0f3D2AAAA5;
|
|
fma.rn.f32 %f239, %f798, %f40, %f238;
|
|
mov.f32 %f240, 0fBF000000;
|
|
fma.rn.f32 %f799, %f239, %f40, %f240;
|
|
|
|
BB0_27:
|
|
fma.rn.f32 %f800, %f799, %f797, %f797;
|
|
@%p23 bra BB0_29;
|
|
|
|
mov.f32 %f244, 0f3F800000;
|
|
fma.rn.f32 %f800, %f799, %f40, %f244;
|
|
|
|
BB0_29:
|
|
and.b32 %r176, %r46, 2;
|
|
setp.eq.s32 %p26, %r176, 0;
|
|
@%p26 bra BB0_31;
|
|
|
|
mov.f32 %f245, 0f00000000;
|
|
mov.f32 %f246, 0fBF800000;
|
|
fma.rn.f32 %f800, %f800, %f246, %f245;
|
|
|
|
BB0_31:
|
|
@%p14 bra BB0_33;
|
|
|
|
mov.f32 %f247, 0f00000000;
|
|
mul.rn.f32 %f802, %f802, %f247;
|
|
|
|
BB0_33:
|
|
mul.f32 %f248, %f802, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r380, %f248;
|
|
cvt.rn.f32.s32 %f249, %r380;
|
|
neg.f32 %f250, %f249;
|
|
fma.rn.f32 %f252, %f250, %f228, %f802;
|
|
fma.rn.f32 %f254, %f250, %f230, %f252;
|
|
fma.rn.f32 %f803, %f250, %f232, %f254;
|
|
abs.f32 %f256, %f802;
|
|
setp.leu.f32 %p28, %f256, 0f47CE4780;
|
|
@%p28 bra BB0_44;
|
|
|
|
add.u64 %rd54, %SP, 12;
|
|
cvta.to.local.u64 %rd9, %rd54;
|
|
mov.b32 %r49, %f802;
|
|
shr.u32 %r50, %r49, 23;
|
|
shl.b32 %r179, %r49, 8;
|
|
or.b32 %r51, %r179, -2147483648;
|
|
mov.u32 %r371, 0;
|
|
mov.u64 %rd294, %rd9;
|
|
mov.u64 %rd295, %rd26;
|
|
mov.u32 %r372, %r371;
|
|
|
|
BB0_35:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd55, %rd295, 2;
|
|
mov.u64 %rd56, __cudart_i2opi_f;
|
|
add.s64 %rd57, %rd56, %rd55;
|
|
ld.const.u32 %r182, [%rd57];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r180, %r182, %r51, %r372;
|
|
madc.hi.u32 %r372, %r182, %r51, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd294], %r180;
|
|
add.s32 %r371, %r371, 1;
|
|
cvt.s64.s32 %rd295, %r371;
|
|
mul.wide.s32 %rd58, %r371, 4;
|
|
add.s64 %rd294, %rd9, %rd58;
|
|
setp.ne.s32 %p29, %r371, 6;
|
|
@%p29 bra BB0_35;
|
|
|
|
and.b32 %r185, %r50, 255;
|
|
add.s32 %r186, %r185, -128;
|
|
shr.u32 %r187, %r186, 5;
|
|
and.b32 %r56, %r49, -2147483648;
|
|
cvta.to.local.u64 %rd60, %rd54;
|
|
st.local.u32 [%rd60+24], %r372;
|
|
mov.u32 %r188, 6;
|
|
sub.s32 %r189, %r188, %r187;
|
|
mul.wide.s32 %rd61, %r189, 4;
|
|
add.s64 %rd15, %rd60, %rd61;
|
|
ld.local.u32 %r373, [%rd15];
|
|
ld.local.u32 %r374, [%rd15+-4];
|
|
and.b32 %r59, %r50, 31;
|
|
setp.eq.s32 %p30, %r59, 0;
|
|
@%p30 bra BB0_38;
|
|
|
|
mov.u32 %r190, 32;
|
|
sub.s32 %r191, %r190, %r59;
|
|
shr.u32 %r192, %r374, %r191;
|
|
shl.b32 %r193, %r373, %r59;
|
|
add.s32 %r373, %r192, %r193;
|
|
ld.local.u32 %r194, [%rd15+-8];
|
|
shr.u32 %r195, %r194, %r191;
|
|
shl.b32 %r196, %r374, %r59;
|
|
add.s32 %r374, %r195, %r196;
|
|
|
|
BB0_38:
|
|
shr.u32 %r197, %r374, 30;
|
|
shl.b32 %r198, %r373, 2;
|
|
add.s32 %r375, %r197, %r198;
|
|
shl.b32 %r65, %r374, 2;
|
|
shr.u32 %r199, %r375, 31;
|
|
shr.u32 %r200, %r373, 30;
|
|
add.s32 %r66, %r199, %r200;
|
|
setp.eq.s32 %p31, %r199, 0;
|
|
@%p31 bra BB0_39;
|
|
bra.uni BB0_40;
|
|
|
|
BB0_39:
|
|
mov.u32 %r376, %r56;
|
|
mov.u32 %r377, %r65;
|
|
bra.uni BB0_41;
|
|
|
|
BB0_40:
|
|
not.b32 %r201, %r375;
|
|
neg.s32 %r377, %r65;
|
|
setp.eq.s32 %p32, %r65, 0;
|
|
selp.u32 %r202, 1, 0, %p32;
|
|
add.s32 %r375, %r202, %r201;
|
|
xor.b32 %r376, %r56, -2147483648;
|
|
|
|
BB0_41:
|
|
clz.b32 %r379, %r375;
|
|
setp.eq.s32 %p33, %r379, 0;
|
|
shl.b32 %r203, %r375, %r379;
|
|
mov.u32 %r204, 32;
|
|
sub.s32 %r205, %r204, %r379;
|
|
shr.u32 %r206, %r377, %r205;
|
|
add.s32 %r207, %r206, %r203;
|
|
selp.b32 %r74, %r375, %r207, %p33;
|
|
mov.u32 %r208, -921707870;
|
|
mul.hi.u32 %r378, %r74, %r208;
|
|
setp.eq.s32 %p34, %r56, 0;
|
|
neg.s32 %r209, %r66;
|
|
selp.b32 %r380, %r66, %r209, %p34;
|
|
setp.lt.s32 %p35, %r378, 1;
|
|
@%p35 bra BB0_43;
|
|
|
|
mul.lo.s32 %r210, %r74, -921707870;
|
|
shr.u32 %r211, %r210, 31;
|
|
shl.b32 %r212, %r378, 1;
|
|
add.s32 %r378, %r211, %r212;
|
|
add.s32 %r379, %r379, 1;
|
|
|
|
BB0_43:
|
|
mov.u32 %r213, 126;
|
|
sub.s32 %r214, %r213, %r379;
|
|
shl.b32 %r215, %r214, 23;
|
|
add.s32 %r216, %r378, 1;
|
|
shr.u32 %r217, %r216, 7;
|
|
add.s32 %r218, %r217, 1;
|
|
shr.u32 %r219, %r218, 1;
|
|
add.s32 %r220, %r219, %r215;
|
|
or.b32 %r221, %r220, %r376;
|
|
mov.b32 %f803, %r221;
|
|
|
|
BB0_44:
|
|
mul.rn.f32 %f57, %f803, %f803;
|
|
and.b32 %r82, %r380, 1;
|
|
setp.eq.s32 %p36, %r82, 0;
|
|
@%p36 bra BB0_46;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_46:
|
|
mov.f32 %f259, 0f3C08839E;
|
|
mov.f32 %f260, 0fB94CA1F9;
|
|
fma.rn.f32 %f804, %f260, %f57, %f259;
|
|
bra.uni BB0_47;
|
|
|
|
BB0_45:
|
|
mov.f32 %f257, 0fBAB6061A;
|
|
mov.f32 %f258, 0f37CCF5CE;
|
|
fma.rn.f32 %f804, %f258, %f57, %f257;
|
|
|
|
BB0_47:
|
|
@%p36 bra BB0_49;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_49:
|
|
mov.f32 %f264, 0fBE2AAAA3;
|
|
fma.rn.f32 %f265, %f804, %f57, %f264;
|
|
mov.f32 %f266, 0f00000000;
|
|
fma.rn.f32 %f805, %f265, %f57, %f266;
|
|
bra.uni BB0_50;
|
|
|
|
BB0_48:
|
|
mov.f32 %f261, 0f3D2AAAA5;
|
|
fma.rn.f32 %f262, %f804, %f57, %f261;
|
|
mov.f32 %f263, 0fBF000000;
|
|
fma.rn.f32 %f805, %f262, %f57, %f263;
|
|
|
|
BB0_50:
|
|
fma.rn.f32 %f806, %f805, %f803, %f803;
|
|
@%p36 bra BB0_52;
|
|
|
|
mov.f32 %f267, 0f3F800000;
|
|
fma.rn.f32 %f806, %f805, %f57, %f267;
|
|
|
|
BB0_52:
|
|
and.b32 %r222, %r380, 2;
|
|
setp.eq.s32 %p39, %r222, 0;
|
|
@%p39 bra BB0_54;
|
|
|
|
mov.f32 %f268, 0f00000000;
|
|
mov.f32 %f269, 0fBF800000;
|
|
fma.rn.f32 %f806, %f806, %f269, %f268;
|
|
|
|
BB0_54:
|
|
mul.f32 %f278, %f32, %f800;
|
|
add.u64 %rd62, %SP, 0;
|
|
cvta.to.local.u64 %rd63, %rd62;
|
|
mul.f32 %f279, %f278, %f278;
|
|
mov.f32 %f280, 0f3F800000;
|
|
sub.f32 %f281, %f280, %f279;
|
|
mul.f32 %f282, %f32, %f806;
|
|
mul.f32 %f283, %f282, %f282;
|
|
sub.f32 %f284, %f281, %f283;
|
|
mov.f32 %f285, 0f00000000;
|
|
max.f32 %f286, %f285, %f284;
|
|
sqrt.rn.f32 %f287, %f286;
|
|
mul.f32 %f288, %f14, %f282;
|
|
mul.f32 %f289, %f15, %f282;
|
|
mul.f32 %f290, %f16, %f282;
|
|
fma.rn.f32 %f291, %f23, %f278, %f288;
|
|
fma.rn.f32 %f292, %f22, %f278, %f289;
|
|
fma.rn.f32 %f293, %f21, %f278, %f290;
|
|
fma.rn.f32 %f294, %f7, %f287, %f291;
|
|
fma.rn.f32 %f295, %f8, %f287, %f292;
|
|
fma.rn.f32 %f296, %f9, %f287, %f293;
|
|
add.f32 %f297, %f7, %f294;
|
|
add.f32 %f298, %f8, %f295;
|
|
add.f32 %f299, %f9, %f296;
|
|
ld.global.f32 %f300, [shadowSpread];
|
|
mul.f32 %f301, %f300, %f297;
|
|
mul.f32 %f302, %f300, %f298;
|
|
mul.f32 %f303, %f300, %f299;
|
|
sub.f32 %f304, %f301, %f7;
|
|
sub.f32 %f305, %f302, %f8;
|
|
sub.f32 %f306, %f303, %f9;
|
|
mul.f32 %f307, %f305, %f305;
|
|
fma.rn.f32 %f308, %f304, %f304, %f307;
|
|
fma.rn.f32 %f309, %f306, %f306, %f308;
|
|
sqrt.rn.f32 %f310, %f309;
|
|
rcp.rn.f32 %f311, %f310;
|
|
mul.f32 %f273, %f311, %f304;
|
|
mul.f32 %f274, %f311, %f305;
|
|
mul.f32 %f275, %f311, %f306;
|
|
ld.global.u32 %r226, [imageEnabled];
|
|
and.b32 %r227, %r226, 32;
|
|
setp.eq.s32 %p40, %r227, 0;
|
|
selp.f32 %f312, 0f3F800000, 0f41200000, %p40;
|
|
mul.f32 %f276, %f312, %f28;
|
|
mov.u32 %r228, 1065353216;
|
|
st.local.u32 [%rd63+8], %r228;
|
|
st.local.u32 [%rd63+4], %r228;
|
|
st.local.u32 [%rd63], %r228;
|
|
ld.global.u32 %r223, [root];
|
|
mov.u32 %r224, 1;
|
|
mov.f32 %f277, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r223, %f11, %f12, %f13, %f273, %f274, %f275, %r224, %f276, %f277, %rd62, %r115);
|
|
// inline asm
|
|
ld.local.f32 %f313, [%rd63];
|
|
add.f32 %f810, %f810, %f313;
|
|
ld.local.f32 %f314, [%rd63+4];
|
|
add.f32 %f809, %f809, %f314;
|
|
ld.local.f32 %f315, [%rd63+8];
|
|
add.f32 %f808, %f808, %f315;
|
|
ld.global.u32 %r356, [samples];
|
|
add.s32 %r359, %r359, 1;
|
|
setp.lt.s32 %p41, %r359, %r356;
|
|
@%p41 bra BB0_8;
|
|
|
|
BB0_55:
|
|
add.s32 %r357, %r357, 1;
|
|
setp.lt.s32 %p42, %r357, %r356;
|
|
@%p42 bra BB0_6;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_4:
|
|
mov.f32 %f809, %f808;
|
|
mov.f32 %f810, %f808;
|
|
|
|
BB0_56:
|
|
setp.eq.s32 %p43, %r356, 0;
|
|
mov.f32 %f814, 0f3F800000;
|
|
mov.f32 %f815, %f814;
|
|
mov.f32 %f816, %f814;
|
|
@%p43 bra BB0_58;
|
|
|
|
mul.lo.s32 %r229, %r356, %r356;
|
|
cvt.rn.f32.s32 %f319, %r229;
|
|
rcp.rn.f32 %f320, %f319;
|
|
mul.f32 %f814, %f810, %f320;
|
|
mul.f32 %f815, %f809, %f320;
|
|
mul.f32 %f816, %f808, %f320;
|
|
|
|
BB0_58:
|
|
ld.global.f32 %f321, [directColor];
|
|
mul.f32 %f322, %f814, %f321;
|
|
ld.global.f32 %f323, [directColor+4];
|
|
mul.f32 %f324, %f815, %f323;
|
|
ld.global.f32 %f325, [directColor+8];
|
|
mul.f32 %f326, %f816, %f325;
|
|
cvt.sat.f32.f32 %f327, %f10;
|
|
mul.f32 %f84, %f322, %f327;
|
|
mul.f32 %f85, %f324, %f327;
|
|
mul.f32 %f86, %f326, %f327;
|
|
mul.f32 %f328, %f10, 0f40800000;
|
|
cvt.sat.f32.f32 %f329, %f328;
|
|
mul.f32 %f330, %f322, %f329;
|
|
mul.f32 %f331, %f324, %f329;
|
|
mul.f32 %f332, %f326, %f329;
|
|
mul.f32 %f87, %f330, 0f3E800000;
|
|
mul.f32 %f88, %f331, 0f3E800000;
|
|
mul.f32 %f89, %f332, 0f3E800000;
|
|
ld.global.u32 %r385, [imageEnabled];
|
|
and.b32 %r230, %r385, 8;
|
|
setp.eq.s32 %p44, %r230, 0;
|
|
@%p44 bra BB0_71;
|
|
|
|
cvt.u64.u32 %rd66, %r2;
|
|
cvt.u64.u32 %rd67, %r3;
|
|
mov.u64 %rd70, image_Mask;
|
|
cvta.global.u64 %rd65, %rd70;
|
|
// inline asm
|
|
call (%rd64), _rt_buffer_get_64, (%rd65, %r99, %r99, %rd66, %rd67, %rd26, %rd26);
|
|
// inline asm
|
|
abs.f32 %f91, %f814;
|
|
setp.lt.f32 %p45, %f91, 0f00800000;
|
|
mul.f32 %f338, %f91, 0f4B800000;
|
|
selp.f32 %f339, 0fC3170000, 0fC2FE0000, %p45;
|
|
selp.f32 %f340, %f338, %f91, %p45;
|
|
mov.b32 %r233, %f340;
|
|
and.b32 %r234, %r233, 8388607;
|
|
or.b32 %r235, %r234, 1065353216;
|
|
mov.b32 %f341, %r235;
|
|
shr.u32 %r236, %r233, 23;
|
|
cvt.rn.f32.u32 %f342, %r236;
|
|
add.f32 %f343, %f339, %f342;
|
|
setp.gt.f32 %p46, %f341, 0f3FB504F3;
|
|
mul.f32 %f344, %f341, 0f3F000000;
|
|
add.f32 %f345, %f343, 0f3F800000;
|
|
selp.f32 %f346, %f344, %f341, %p46;
|
|
selp.f32 %f347, %f345, %f343, %p46;
|
|
add.f32 %f348, %f346, 0fBF800000;
|
|
add.f32 %f334, %f346, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f333,%f334;
|
|
// inline asm
|
|
add.f32 %f349, %f348, %f348;
|
|
mul.f32 %f350, %f333, %f349;
|
|
mul.f32 %f351, %f350, %f350;
|
|
mov.f32 %f352, 0f3C4CAF63;
|
|
mov.f32 %f353, 0f3B18F0FE;
|
|
fma.rn.f32 %f354, %f353, %f351, %f352;
|
|
mov.f32 %f355, 0f3DAAAABD;
|
|
fma.rn.f32 %f356, %f354, %f351, %f355;
|
|
mul.rn.f32 %f357, %f356, %f351;
|
|
mul.rn.f32 %f358, %f357, %f350;
|
|
sub.f32 %f359, %f348, %f350;
|
|
neg.f32 %f360, %f350;
|
|
add.f32 %f361, %f359, %f359;
|
|
fma.rn.f32 %f362, %f360, %f348, %f361;
|
|
mul.rn.f32 %f363, %f333, %f362;
|
|
add.f32 %f364, %f358, %f350;
|
|
sub.f32 %f365, %f350, %f364;
|
|
add.f32 %f366, %f358, %f365;
|
|
add.f32 %f367, %f363, %f366;
|
|
add.f32 %f368, %f364, %f367;
|
|
sub.f32 %f369, %f364, %f368;
|
|
add.f32 %f370, %f367, %f369;
|
|
mov.f32 %f371, 0f3F317200;
|
|
mul.rn.f32 %f372, %f347, %f371;
|
|
mov.f32 %f373, 0f35BFBE8E;
|
|
mul.rn.f32 %f374, %f347, %f373;
|
|
add.f32 %f375, %f372, %f368;
|
|
sub.f32 %f376, %f372, %f375;
|
|
add.f32 %f377, %f368, %f376;
|
|
add.f32 %f378, %f370, %f377;
|
|
add.f32 %f379, %f374, %f378;
|
|
add.f32 %f380, %f375, %f379;
|
|
sub.f32 %f381, %f375, %f380;
|
|
add.f32 %f382, %f379, %f381;
|
|
mov.f32 %f383, 0f3EE8BA2E;
|
|
mul.rn.f32 %f384, %f383, %f380;
|
|
neg.f32 %f385, %f384;
|
|
fma.rn.f32 %f386, %f383, %f380, %f385;
|
|
fma.rn.f32 %f387, %f383, %f382, %f386;
|
|
mov.f32 %f388, 0f00000000;
|
|
fma.rn.f32 %f389, %f388, %f380, %f387;
|
|
add.rn.f32 %f390, %f384, %f389;
|
|
neg.f32 %f391, %f390;
|
|
add.rn.f32 %f392, %f384, %f391;
|
|
add.rn.f32 %f393, %f392, %f389;
|
|
mov.b32 %r237, %f390;
|
|
setp.eq.s32 %p47, %r237, 1118925336;
|
|
add.s32 %r238, %r237, -1;
|
|
mov.b32 %f394, %r238;
|
|
add.f32 %f395, %f393, 0f37000000;
|
|
selp.f32 %f396, %f394, %f390, %p47;
|
|
selp.f32 %f92, %f395, %f393, %p47;
|
|
mul.f32 %f397, %f396, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f398, %f397;
|
|
mov.f32 %f399, 0fBF317200;
|
|
fma.rn.f32 %f400, %f398, %f399, %f396;
|
|
mov.f32 %f401, 0fB5BFBE8E;
|
|
fma.rn.f32 %f402, %f398, %f401, %f400;
|
|
mul.f32 %f403, %f402, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f404, %f403;
|
|
add.f32 %f405, %f398, 0f00000000;
|
|
ex2.approx.f32 %f406, %f405;
|
|
mul.f32 %f407, %f404, %f406;
|
|
setp.lt.f32 %p48, %f396, 0fC2D20000;
|
|
selp.f32 %f408, 0f00000000, %f407, %p48;
|
|
setp.gt.f32 %p49, %f396, 0f42D20000;
|
|
selp.f32 %f817, 0f7F800000, %f408, %p49;
|
|
setp.eq.f32 %p50, %f817, 0f7F800000;
|
|
@%p50 bra BB0_61;
|
|
|
|
fma.rn.f32 %f817, %f817, %f92, %f817;
|
|
|
|
BB0_61:
|
|
mov.f32 %f779, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f778, %f779;
|
|
fma.rn.f32 %f777, %f778, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f776, %f777;
|
|
setp.lt.f32 %p51, %f814, 0f00000000;
|
|
setp.eq.f32 %p52, %f776, 0f3F800000;
|
|
and.pred %p1, %p51, %p52;
|
|
mov.b32 %r239, %f817;
|
|
xor.b32 %r240, %r239, -2147483648;
|
|
mov.b32 %f409, %r240;
|
|
selp.f32 %f819, %f409, %f817, %p1;
|
|
setp.eq.f32 %p53, %f814, 0f00000000;
|
|
@%p53 bra BB0_64;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_64:
|
|
add.f32 %f412, %f814, %f814;
|
|
selp.f32 %f819, %f412, 0f00000000, %p52;
|
|
bra.uni BB0_65;
|
|
|
|
BB0_129:
|
|
mov.u64 %rd211, image_HDR;
|
|
cvta.global.u64 %rd206, %rd211;
|
|
mov.u32 %r326, 8;
|
|
mov.u64 %rd210, 0;
|
|
// inline asm
|
|
call (%rd205), _rt_buffer_get_64, (%rd206, %r99, %r326, %rd19, %rd20, %rd210, %rd210);
|
|
// inline asm
|
|
mov.f32 %f716, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs98, %f716;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs99, 0;
|
|
st.v4.u16 [%rd205], {%rs98, %rs98, %rs98, %rs99};
|
|
|
|
BB0_130:
|
|
ld.global.u32 %r327, [additive];
|
|
setp.eq.s32 %p120, %r327, 0;
|
|
@%p120 bra BB0_132;
|
|
|
|
mov.u64 %rd224, image_RNM0;
|
|
cvta.global.u64 %rd213, %rd224;
|
|
mov.u32 %r331, 8;
|
|
mov.u64 %rd223, 0;
|
|
// inline asm
|
|
call (%rd212), _rt_buffer_get_64, (%rd213, %r99, %r331, %rd19, %rd20, %rd223, %rd223);
|
|
// inline asm
|
|
ld.v4.u16 {%rs106, %rs107, %rs108, %rs109}, [%rd212];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f717, %rs106;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f718, %rs107;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f719, %rs108;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd218), _rt_buffer_get_64, (%rd213, %r99, %r331, %rd19, %rd20, %rd223, %rd223);
|
|
// inline asm
|
|
add.f32 %f720, %f717, 0f00000000;
|
|
add.f32 %f721, %f718, 0f00000000;
|
|
add.f32 %f722, %f719, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs105, %f722;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f721;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f720;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs110, 0;
|
|
st.v4.u16 [%rd218], {%rs103, %rs104, %rs105, %rs110};
|
|
bra.uni BB0_133;
|
|
|
|
BB0_132:
|
|
mov.u64 %rd231, image_RNM0;
|
|
cvta.global.u64 %rd226, %rd231;
|
|
mov.u32 %r333, 8;
|
|
mov.u64 %rd230, 0;
|
|
// inline asm
|
|
call (%rd225), _rt_buffer_get_64, (%rd226, %r99, %r333, %rd19, %rd20, %rd230, %rd230);
|
|
// inline asm
|
|
mov.f32 %f723, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f723;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs112, 0;
|
|
st.v4.u16 [%rd225], {%rs111, %rs111, %rs111, %rs112};
|
|
|
|
BB0_133:
|
|
ld.global.u32 %r334, [additive];
|
|
setp.eq.s32 %p121, %r334, 0;
|
|
@%p121 bra BB0_135;
|
|
|
|
mov.u64 %rd244, image_RNM1;
|
|
cvta.global.u64 %rd233, %rd244;
|
|
mov.u32 %r338, 8;
|
|
mov.u64 %rd243, 0;
|
|
// inline asm
|
|
call (%rd232), _rt_buffer_get_64, (%rd233, %r99, %r338, %rd19, %rd20, %rd243, %rd243);
|
|
// inline asm
|
|
ld.v4.u16 {%rs119, %rs120, %rs121, %rs122}, [%rd232];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f724, %rs119;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f725, %rs120;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f726, %rs121;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd238), _rt_buffer_get_64, (%rd233, %r99, %r338, %rd19, %rd20, %rd243, %rd243);
|
|
// inline asm
|
|
add.f32 %f727, %f724, 0f00000000;
|
|
add.f32 %f728, %f725, 0f00000000;
|
|
add.f32 %f729, %f726, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs118, %f729;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs117, %f728;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f727;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs123, 0;
|
|
st.v4.u16 [%rd238], {%rs116, %rs117, %rs118, %rs123};
|
|
bra.uni BB0_136;
|
|
|
|
BB0_135:
|
|
mov.u64 %rd251, image_RNM1;
|
|
cvta.global.u64 %rd246, %rd251;
|
|
mov.u32 %r340, 8;
|
|
mov.u64 %rd250, 0;
|
|
// inline asm
|
|
call (%rd245), _rt_buffer_get_64, (%rd246, %r99, %r340, %rd19, %rd20, %rd250, %rd250);
|
|
// inline asm
|
|
mov.f32 %f730, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f730;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs125, 0;
|
|
st.v4.u16 [%rd245], {%rs124, %rs124, %rs124, %rs125};
|
|
|
|
BB0_136:
|
|
ld.global.u32 %r341, [additive];
|
|
setp.eq.s32 %p122, %r341, 0;
|
|
@%p122 bra BB0_138;
|
|
|
|
mov.u64 %rd264, image_RNM2;
|
|
cvta.global.u64 %rd253, %rd264;
|
|
mov.u32 %r345, 8;
|
|
mov.u64 %rd263, 0;
|
|
// inline asm
|
|
call (%rd252), _rt_buffer_get_64, (%rd253, %r99, %r345, %rd19, %rd20, %rd263, %rd263);
|
|
// inline asm
|
|
ld.v4.u16 {%rs132, %rs133, %rs134, %rs135}, [%rd252];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f731, %rs132;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f732, %rs133;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f733, %rs134;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd258), _rt_buffer_get_64, (%rd253, %r99, %r345, %rd19, %rd20, %rd263, %rd263);
|
|
// inline asm
|
|
add.f32 %f734, %f731, 0f00000000;
|
|
add.f32 %f735, %f732, 0f00000000;
|
|
add.f32 %f736, %f733, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs131, %f736;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs130, %f735;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f734;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs136, 0;
|
|
st.v4.u16 [%rd258], {%rs129, %rs130, %rs131, %rs136};
|
|
bra.uni BB0_139;
|
|
|
|
BB0_138:
|
|
mov.u64 %rd271, image_RNM2;
|
|
cvta.global.u64 %rd266, %rd271;
|
|
mov.u32 %r347, 8;
|
|
mov.u64 %rd270, 0;
|
|
// inline asm
|
|
call (%rd265), _rt_buffer_get_64, (%rd266, %r99, %r347, %rd19, %rd20, %rd270, %rd270);
|
|
// inline asm
|
|
mov.f32 %f737, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f737;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs138, 0;
|
|
st.v4.u16 [%rd265], {%rs137, %rs137, %rs137, %rs138};
|
|
|
|
BB0_139:
|
|
ld.global.u32 %r348, [additive];
|
|
setp.eq.s32 %p123, %r348, 0;
|
|
@%p123 bra BB0_141;
|
|
|
|
mov.u64 %rd284, image_RNM3;
|
|
cvta.global.u64 %rd273, %rd284;
|
|
mov.u32 %r352, 8;
|
|
mov.u64 %rd283, 0;
|
|
// inline asm
|
|
call (%rd272), _rt_buffer_get_64, (%rd273, %r99, %r352, %rd19, %rd20, %rd283, %rd283);
|
|
// inline asm
|
|
ld.v4.u16 {%rs145, %rs146, %rs147, %rs148}, [%rd272];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f738, %rs145;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f739, %rs146;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f740, %rs147;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd278), _rt_buffer_get_64, (%rd273, %r99, %r352, %rd19, %rd20, %rd283, %rd283);
|
|
// inline asm
|
|
add.f32 %f741, %f738, 0f00000000;
|
|
add.f32 %f742, %f739, 0f00000000;
|
|
add.f32 %f743, %f740, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs144, %f743;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs143, %f742;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f741;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs149, 0;
|
|
st.v4.u16 [%rd278], {%rs142, %rs143, %rs144, %rs149};
|
|
bra.uni BB0_142;
|
|
|
|
BB0_141:
|
|
mov.u64 %rd291, image_RNM3;
|
|
cvta.global.u64 %rd286, %rd291;
|
|
mov.u32 %r354, 8;
|
|
mov.u64 %rd290, 0;
|
|
// inline asm
|
|
call (%rd285), _rt_buffer_get_64, (%rd286, %r99, %r354, %rd19, %rd20, %rd290, %rd290);
|
|
// inline asm
|
|
mov.f32 %f744, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f744;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs151, 0;
|
|
st.v4.u16 [%rd285], {%rs150, %rs150, %rs150, %rs151};
|
|
bra.uni BB0_142;
|
|
|
|
BB0_62:
|
|
setp.geu.f32 %p54, %f814, 0f00000000;
|
|
@%p54 bra BB0_65;
|
|
|
|
mov.f32 %f783, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f411, %f783;
|
|
setp.neu.f32 %p55, %f411, 0f3EE8BA2E;
|
|
selp.f32 %f819, 0f7FFFFFFF, %f819, %p55;
|
|
|
|
BB0_65:
|
|
abs.f32 %f780, %f814;
|
|
add.f32 %f413, %f780, 0f3EE8BA2E;
|
|
mov.b32 %r241, %f413;
|
|
setp.lt.s32 %p57, %r241, 2139095040;
|
|
@%p57 bra BB0_70;
|
|
|
|
abs.f32 %f781, %f814;
|
|
setp.gtu.f32 %p58, %f781, 0f7F800000;
|
|
@%p58 bra BB0_69;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_69:
|
|
add.f32 %f819, %f814, 0f3EE8BA2E;
|
|
bra.uni BB0_70;
|
|
|
|
BB0_67:
|
|
abs.f32 %f782, %f814;
|
|
setp.neu.f32 %p59, %f782, 0f7F800000;
|
|
@%p59 bra BB0_70;
|
|
|
|
selp.f32 %f819, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_70:
|
|
mul.f32 %f414, %f819, 0f437F0000;
|
|
setp.eq.f32 %p60, %f814, 0f3F800000;
|
|
selp.f32 %f415, 0f437F0000, %f414, %p60;
|
|
cvt.rzi.u32.f32 %r242, %f415;
|
|
cvt.u16.u32 %rs14, %r242;
|
|
mov.u16 %rs15, 255;
|
|
st.v2.u8 [%rd64], {%rs14, %rs15};
|
|
ld.global.u32 %r385, [imageEnabled];
|
|
|
|
BB0_71:
|
|
and.b32 %r243, %r385, 1;
|
|
setp.eq.b32 %p61, %r243, 1;
|
|
@!%p61 bra BB0_106;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_72:
|
|
abs.f32 %f104, %f84;
|
|
setp.lt.f32 %p62, %f104, 0f00800000;
|
|
mul.f32 %f421, %f104, 0f4B800000;
|
|
selp.f32 %f422, 0fC3170000, 0fC2FE0000, %p62;
|
|
selp.f32 %f423, %f421, %f104, %p62;
|
|
mov.b32 %r244, %f423;
|
|
and.b32 %r245, %r244, 8388607;
|
|
or.b32 %r246, %r245, 1065353216;
|
|
mov.b32 %f424, %r246;
|
|
shr.u32 %r247, %r244, 23;
|
|
cvt.rn.f32.u32 %f425, %r247;
|
|
add.f32 %f426, %f422, %f425;
|
|
setp.gt.f32 %p63, %f424, 0f3FB504F3;
|
|
mul.f32 %f427, %f424, 0f3F000000;
|
|
add.f32 %f428, %f426, 0f3F800000;
|
|
selp.f32 %f429, %f427, %f424, %p63;
|
|
selp.f32 %f430, %f428, %f426, %p63;
|
|
add.f32 %f431, %f429, 0fBF800000;
|
|
add.f32 %f417, %f429, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f416,%f417;
|
|
// inline asm
|
|
add.f32 %f432, %f431, %f431;
|
|
mul.f32 %f433, %f416, %f432;
|
|
mul.f32 %f434, %f433, %f433;
|
|
mov.f32 %f435, 0f3C4CAF63;
|
|
mov.f32 %f436, 0f3B18F0FE;
|
|
fma.rn.f32 %f437, %f436, %f434, %f435;
|
|
mov.f32 %f438, 0f3DAAAABD;
|
|
fma.rn.f32 %f439, %f437, %f434, %f438;
|
|
mul.rn.f32 %f440, %f439, %f434;
|
|
mul.rn.f32 %f441, %f440, %f433;
|
|
sub.f32 %f442, %f431, %f433;
|
|
neg.f32 %f443, %f433;
|
|
add.f32 %f444, %f442, %f442;
|
|
fma.rn.f32 %f445, %f443, %f431, %f444;
|
|
mul.rn.f32 %f446, %f416, %f445;
|
|
add.f32 %f447, %f441, %f433;
|
|
sub.f32 %f448, %f433, %f447;
|
|
add.f32 %f449, %f441, %f448;
|
|
add.f32 %f450, %f446, %f449;
|
|
add.f32 %f451, %f447, %f450;
|
|
sub.f32 %f452, %f447, %f451;
|
|
add.f32 %f453, %f450, %f452;
|
|
mov.f32 %f454, 0f3F317200;
|
|
mul.rn.f32 %f455, %f430, %f454;
|
|
mov.f32 %f456, 0f35BFBE8E;
|
|
mul.rn.f32 %f457, %f430, %f456;
|
|
add.f32 %f458, %f455, %f451;
|
|
sub.f32 %f459, %f455, %f458;
|
|
add.f32 %f460, %f451, %f459;
|
|
add.f32 %f461, %f453, %f460;
|
|
add.f32 %f462, %f457, %f461;
|
|
add.f32 %f463, %f458, %f462;
|
|
sub.f32 %f464, %f458, %f463;
|
|
add.f32 %f465, %f462, %f464;
|
|
mov.f32 %f466, 0f3EE66666;
|
|
mul.rn.f32 %f467, %f466, %f463;
|
|
neg.f32 %f468, %f467;
|
|
fma.rn.f32 %f469, %f466, %f463, %f468;
|
|
fma.rn.f32 %f470, %f466, %f465, %f469;
|
|
mov.f32 %f471, 0f00000000;
|
|
fma.rn.f32 %f472, %f471, %f463, %f470;
|
|
add.rn.f32 %f473, %f467, %f472;
|
|
neg.f32 %f474, %f473;
|
|
add.rn.f32 %f475, %f467, %f474;
|
|
add.rn.f32 %f476, %f475, %f472;
|
|
mov.b32 %r248, %f473;
|
|
setp.eq.s32 %p64, %r248, 1118925336;
|
|
add.s32 %r249, %r248, -1;
|
|
mov.b32 %f477, %r249;
|
|
add.f32 %f478, %f476, 0f37000000;
|
|
selp.f32 %f479, %f477, %f473, %p64;
|
|
selp.f32 %f105, %f478, %f476, %p64;
|
|
mul.f32 %f480, %f479, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f481, %f480;
|
|
mov.f32 %f482, 0fBF317200;
|
|
fma.rn.f32 %f483, %f481, %f482, %f479;
|
|
mov.f32 %f484, 0fB5BFBE8E;
|
|
fma.rn.f32 %f485, %f481, %f484, %f483;
|
|
mul.f32 %f486, %f485, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f487, %f486;
|
|
add.f32 %f488, %f481, 0f00000000;
|
|
ex2.approx.f32 %f489, %f488;
|
|
mul.f32 %f490, %f487, %f489;
|
|
setp.lt.f32 %p65, %f479, 0fC2D20000;
|
|
selp.f32 %f491, 0f00000000, %f490, %p65;
|
|
setp.gt.f32 %p66, %f479, 0f42D20000;
|
|
selp.f32 %f820, 0f7F800000, %f491, %p66;
|
|
setp.eq.f32 %p67, %f820, 0f7F800000;
|
|
@%p67 bra BB0_74;
|
|
|
|
fma.rn.f32 %f820, %f820, %f105, %f820;
|
|
|
|
BB0_74:
|
|
mov.f32 %f748, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f747, %f748;
|
|
fma.rn.f32 %f746, %f747, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f745, %f746;
|
|
setp.lt.f32 %p68, %f84, 0f00000000;
|
|
setp.eq.f32 %p69, %f745, 0f3F800000;
|
|
and.pred %p2, %p68, %p69;
|
|
mov.b32 %r250, %f820;
|
|
xor.b32 %r251, %r250, -2147483648;
|
|
mov.b32 %f492, %r251;
|
|
selp.f32 %f822, %f492, %f820, %p2;
|
|
setp.eq.f32 %p70, %f84, 0f00000000;
|
|
@%p70 bra BB0_77;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_77:
|
|
add.f32 %f495, %f84, %f84;
|
|
selp.f32 %f822, %f495, 0f00000000, %p69;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_75:
|
|
setp.geu.f32 %p71, %f84, 0f00000000;
|
|
@%p71 bra BB0_78;
|
|
|
|
mov.f32 %f772, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f494, %f772;
|
|
setp.neu.f32 %p72, %f494, 0f3EE66666;
|
|
selp.f32 %f822, 0f7FFFFFFF, %f822, %p72;
|
|
|
|
BB0_78:
|
|
abs.f32 %f749, %f84;
|
|
add.f32 %f496, %f749, 0f3EE66666;
|
|
mov.b32 %r252, %f496;
|
|
setp.lt.s32 %p74, %r252, 2139095040;
|
|
@%p74 bra BB0_83;
|
|
|
|
abs.f32 %f770, %f84;
|
|
setp.gtu.f32 %p75, %f770, 0f7F800000;
|
|
@%p75 bra BB0_82;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_82:
|
|
add.f32 %f822, %f84, 0f3EE66666;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_80:
|
|
abs.f32 %f771, %f84;
|
|
setp.neu.f32 %p76, %f771, 0f7F800000;
|
|
@%p76 bra BB0_83;
|
|
|
|
selp.f32 %f822, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_83:
|
|
mov.f32 %f758, 0fB5BFBE8E;
|
|
mov.f32 %f757, 0fBF317200;
|
|
mov.f32 %f756, 0f00000000;
|
|
mov.f32 %f755, 0f35BFBE8E;
|
|
mov.f32 %f754, 0f3F317200;
|
|
mov.f32 %f753, 0f3DAAAABD;
|
|
mov.f32 %f752, 0f3C4CAF63;
|
|
mov.f32 %f751, 0f3B18F0FE;
|
|
mov.f32 %f750, 0f3EE66666;
|
|
setp.eq.f32 %p77, %f84, 0f3F800000;
|
|
selp.f32 %f116, 0f3F800000, %f822, %p77;
|
|
abs.f32 %f117, %f85;
|
|
setp.lt.f32 %p78, %f117, 0f00800000;
|
|
mul.f32 %f499, %f117, 0f4B800000;
|
|
selp.f32 %f500, 0fC3170000, 0fC2FE0000, %p78;
|
|
selp.f32 %f501, %f499, %f117, %p78;
|
|
mov.b32 %r253, %f501;
|
|
and.b32 %r254, %r253, 8388607;
|
|
or.b32 %r255, %r254, 1065353216;
|
|
mov.b32 %f502, %r255;
|
|
shr.u32 %r256, %r253, 23;
|
|
cvt.rn.f32.u32 %f503, %r256;
|
|
add.f32 %f504, %f500, %f503;
|
|
setp.gt.f32 %p79, %f502, 0f3FB504F3;
|
|
mul.f32 %f505, %f502, 0f3F000000;
|
|
add.f32 %f506, %f504, 0f3F800000;
|
|
selp.f32 %f507, %f505, %f502, %p79;
|
|
selp.f32 %f508, %f506, %f504, %p79;
|
|
add.f32 %f509, %f507, 0fBF800000;
|
|
add.f32 %f498, %f507, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f497,%f498;
|
|
// inline asm
|
|
add.f32 %f510, %f509, %f509;
|
|
mul.f32 %f511, %f497, %f510;
|
|
mul.f32 %f512, %f511, %f511;
|
|
fma.rn.f32 %f515, %f751, %f512, %f752;
|
|
fma.rn.f32 %f517, %f515, %f512, %f753;
|
|
mul.rn.f32 %f518, %f517, %f512;
|
|
mul.rn.f32 %f519, %f518, %f511;
|
|
sub.f32 %f520, %f509, %f511;
|
|
neg.f32 %f521, %f511;
|
|
add.f32 %f522, %f520, %f520;
|
|
fma.rn.f32 %f523, %f521, %f509, %f522;
|
|
mul.rn.f32 %f524, %f497, %f523;
|
|
add.f32 %f525, %f519, %f511;
|
|
sub.f32 %f526, %f511, %f525;
|
|
add.f32 %f527, %f519, %f526;
|
|
add.f32 %f528, %f524, %f527;
|
|
add.f32 %f529, %f525, %f528;
|
|
sub.f32 %f530, %f525, %f529;
|
|
add.f32 %f531, %f528, %f530;
|
|
mul.rn.f32 %f533, %f508, %f754;
|
|
mul.rn.f32 %f535, %f508, %f755;
|
|
add.f32 %f536, %f533, %f529;
|
|
sub.f32 %f537, %f533, %f536;
|
|
add.f32 %f538, %f529, %f537;
|
|
add.f32 %f539, %f531, %f538;
|
|
add.f32 %f540, %f535, %f539;
|
|
add.f32 %f541, %f536, %f540;
|
|
sub.f32 %f542, %f536, %f541;
|
|
add.f32 %f543, %f540, %f542;
|
|
mul.rn.f32 %f545, %f750, %f541;
|
|
neg.f32 %f546, %f545;
|
|
fma.rn.f32 %f547, %f750, %f541, %f546;
|
|
fma.rn.f32 %f548, %f750, %f543, %f547;
|
|
fma.rn.f32 %f550, %f756, %f541, %f548;
|
|
add.rn.f32 %f551, %f545, %f550;
|
|
neg.f32 %f552, %f551;
|
|
add.rn.f32 %f553, %f545, %f552;
|
|
add.rn.f32 %f554, %f553, %f550;
|
|
mov.b32 %r257, %f551;
|
|
setp.eq.s32 %p80, %r257, 1118925336;
|
|
add.s32 %r258, %r257, -1;
|
|
mov.b32 %f555, %r258;
|
|
add.f32 %f556, %f554, 0f37000000;
|
|
selp.f32 %f557, %f555, %f551, %p80;
|
|
selp.f32 %f118, %f556, %f554, %p80;
|
|
mul.f32 %f558, %f557, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f559, %f558;
|
|
fma.rn.f32 %f561, %f559, %f757, %f557;
|
|
fma.rn.f32 %f563, %f559, %f758, %f561;
|
|
mul.f32 %f564, %f563, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f565, %f564;
|
|
add.f32 %f566, %f559, 0f00000000;
|
|
ex2.approx.f32 %f567, %f566;
|
|
mul.f32 %f568, %f565, %f567;
|
|
setp.lt.f32 %p81, %f557, 0fC2D20000;
|
|
selp.f32 %f569, 0f00000000, %f568, %p81;
|
|
setp.gt.f32 %p82, %f557, 0f42D20000;
|
|
selp.f32 %f823, 0f7F800000, %f569, %p82;
|
|
setp.eq.f32 %p83, %f823, 0f7F800000;
|
|
@%p83 bra BB0_85;
|
|
|
|
fma.rn.f32 %f823, %f823, %f118, %f823;
|
|
|
|
BB0_85:
|
|
setp.lt.f32 %p84, %f85, 0f00000000;
|
|
and.pred %p3, %p84, %p69;
|
|
mov.b32 %r259, %f823;
|
|
xor.b32 %r260, %r259, -2147483648;
|
|
mov.b32 %f570, %r260;
|
|
selp.f32 %f825, %f570, %f823, %p3;
|
|
setp.eq.f32 %p86, %f85, 0f00000000;
|
|
@%p86 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f573, %f85, %f85;
|
|
selp.f32 %f825, %f573, 0f00000000, %p69;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.geu.f32 %p87, %f85, 0f00000000;
|
|
@%p87 bra BB0_89;
|
|
|
|
mov.f32 %f769, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f572, %f769;
|
|
setp.neu.f32 %p88, %f572, 0f3EE66666;
|
|
selp.f32 %f825, 0f7FFFFFFF, %f825, %p88;
|
|
|
|
BB0_89:
|
|
abs.f32 %f773, %f85;
|
|
add.f32 %f574, %f773, 0f3EE66666;
|
|
mov.b32 %r261, %f574;
|
|
setp.lt.s32 %p90, %r261, 2139095040;
|
|
@%p90 bra BB0_94;
|
|
|
|
abs.f32 %f774, %f85;
|
|
setp.gtu.f32 %p91, %f774, 0f7F800000;
|
|
@%p91 bra BB0_93;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_93:
|
|
add.f32 %f825, %f85, 0f3EE66666;
|
|
bra.uni BB0_94;
|
|
|
|
BB0_91:
|
|
abs.f32 %f775, %f85;
|
|
setp.neu.f32 %p92, %f775, 0f7F800000;
|
|
@%p92 bra BB0_94;
|
|
|
|
selp.f32 %f825, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_94:
|
|
mov.f32 %f767, 0fB5BFBE8E;
|
|
mov.f32 %f766, 0fBF317200;
|
|
mov.f32 %f765, 0f00000000;
|
|
mov.f32 %f764, 0f35BFBE8E;
|
|
mov.f32 %f763, 0f3F317200;
|
|
mov.f32 %f762, 0f3DAAAABD;
|
|
mov.f32 %f761, 0f3C4CAF63;
|
|
mov.f32 %f760, 0f3B18F0FE;
|
|
mov.f32 %f759, 0f3EE66666;
|
|
setp.eq.f32 %p93, %f85, 0f3F800000;
|
|
selp.f32 %f129, 0f3F800000, %f825, %p93;
|
|
abs.f32 %f130, %f86;
|
|
setp.lt.f32 %p94, %f130, 0f00800000;
|
|
mul.f32 %f577, %f130, 0f4B800000;
|
|
selp.f32 %f578, 0fC3170000, 0fC2FE0000, %p94;
|
|
selp.f32 %f579, %f577, %f130, %p94;
|
|
mov.b32 %r262, %f579;
|
|
and.b32 %r263, %r262, 8388607;
|
|
or.b32 %r264, %r263, 1065353216;
|
|
mov.b32 %f580, %r264;
|
|
shr.u32 %r265, %r262, 23;
|
|
cvt.rn.f32.u32 %f581, %r265;
|
|
add.f32 %f582, %f578, %f581;
|
|
setp.gt.f32 %p95, %f580, 0f3FB504F3;
|
|
mul.f32 %f583, %f580, 0f3F000000;
|
|
add.f32 %f584, %f582, 0f3F800000;
|
|
selp.f32 %f585, %f583, %f580, %p95;
|
|
selp.f32 %f586, %f584, %f582, %p95;
|
|
add.f32 %f587, %f585, 0fBF800000;
|
|
add.f32 %f576, %f585, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f575,%f576;
|
|
// inline asm
|
|
add.f32 %f588, %f587, %f587;
|
|
mul.f32 %f589, %f575, %f588;
|
|
mul.f32 %f590, %f589, %f589;
|
|
fma.rn.f32 %f593, %f760, %f590, %f761;
|
|
fma.rn.f32 %f595, %f593, %f590, %f762;
|
|
mul.rn.f32 %f596, %f595, %f590;
|
|
mul.rn.f32 %f597, %f596, %f589;
|
|
sub.f32 %f598, %f587, %f589;
|
|
neg.f32 %f599, %f589;
|
|
add.f32 %f600, %f598, %f598;
|
|
fma.rn.f32 %f601, %f599, %f587, %f600;
|
|
mul.rn.f32 %f602, %f575, %f601;
|
|
add.f32 %f603, %f597, %f589;
|
|
sub.f32 %f604, %f589, %f603;
|
|
add.f32 %f605, %f597, %f604;
|
|
add.f32 %f606, %f602, %f605;
|
|
add.f32 %f607, %f603, %f606;
|
|
sub.f32 %f608, %f603, %f607;
|
|
add.f32 %f609, %f606, %f608;
|
|
mul.rn.f32 %f611, %f586, %f763;
|
|
mul.rn.f32 %f613, %f586, %f764;
|
|
add.f32 %f614, %f611, %f607;
|
|
sub.f32 %f615, %f611, %f614;
|
|
add.f32 %f616, %f607, %f615;
|
|
add.f32 %f617, %f609, %f616;
|
|
add.f32 %f618, %f613, %f617;
|
|
add.f32 %f619, %f614, %f618;
|
|
sub.f32 %f620, %f614, %f619;
|
|
add.f32 %f621, %f618, %f620;
|
|
mul.rn.f32 %f623, %f759, %f619;
|
|
neg.f32 %f624, %f623;
|
|
fma.rn.f32 %f625, %f759, %f619, %f624;
|
|
fma.rn.f32 %f626, %f759, %f621, %f625;
|
|
fma.rn.f32 %f628, %f765, %f619, %f626;
|
|
add.rn.f32 %f629, %f623, %f628;
|
|
neg.f32 %f630, %f629;
|
|
add.rn.f32 %f631, %f623, %f630;
|
|
add.rn.f32 %f632, %f631, %f628;
|
|
mov.b32 %r266, %f629;
|
|
setp.eq.s32 %p96, %r266, 1118925336;
|
|
add.s32 %r267, %r266, -1;
|
|
mov.b32 %f633, %r267;
|
|
add.f32 %f634, %f632, 0f37000000;
|
|
selp.f32 %f635, %f633, %f629, %p96;
|
|
selp.f32 %f131, %f634, %f632, %p96;
|
|
mul.f32 %f636, %f635, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f637, %f636;
|
|
fma.rn.f32 %f639, %f637, %f766, %f635;
|
|
fma.rn.f32 %f641, %f637, %f767, %f639;
|
|
mul.f32 %f642, %f641, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f643, %f642;
|
|
add.f32 %f644, %f637, 0f00000000;
|
|
ex2.approx.f32 %f645, %f644;
|
|
mul.f32 %f646, %f643, %f645;
|
|
setp.lt.f32 %p97, %f635, 0fC2D20000;
|
|
selp.f32 %f647, 0f00000000, %f646, %p97;
|
|
setp.gt.f32 %p98, %f635, 0f42D20000;
|
|
selp.f32 %f826, 0f7F800000, %f647, %p98;
|
|
setp.eq.f32 %p99, %f826, 0f7F800000;
|
|
@%p99 bra BB0_96;
|
|
|
|
fma.rn.f32 %f826, %f826, %f131, %f826;
|
|
|
|
BB0_96:
|
|
setp.lt.f32 %p100, %f86, 0f00000000;
|
|
and.pred %p4, %p100, %p69;
|
|
mov.b32 %r268, %f826;
|
|
xor.b32 %r269, %r268, -2147483648;
|
|
mov.b32 %f648, %r269;
|
|
selp.f32 %f828, %f648, %f826, %p4;
|
|
setp.eq.f32 %p102, %f86, 0f00000000;
|
|
@%p102 bra BB0_99;
|
|
bra.uni BB0_97;
|
|
|
|
BB0_99:
|
|
add.f32 %f651, %f86, %f86;
|
|
selp.f32 %f828, %f651, 0f00000000, %p69;
|
|
bra.uni BB0_100;
|
|
|
|
BB0_97:
|
|
setp.geu.f32 %p103, %f86, 0f00000000;
|
|
@%p103 bra BB0_100;
|
|
|
|
mov.f32 %f768, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f650, %f768;
|
|
setp.neu.f32 %p104, %f650, 0f3EE66666;
|
|
selp.f32 %f828, 0f7FFFFFFF, %f828, %p104;
|
|
|
|
BB0_100:
|
|
abs.f32 %f784, %f86;
|
|
add.f32 %f652, %f784, 0f3EE66666;
|
|
mov.b32 %r270, %f652;
|
|
setp.lt.s32 %p106, %r270, 2139095040;
|
|
@%p106 bra BB0_105;
|
|
|
|
abs.f32 %f785, %f86;
|
|
setp.gtu.f32 %p107, %f785, 0f7F800000;
|
|
@%p107 bra BB0_104;
|
|
bra.uni BB0_102;
|
|
|
|
BB0_104:
|
|
add.f32 %f828, %f86, 0f3EE66666;
|
|
bra.uni BB0_105;
|
|
|
|
BB0_102:
|
|
abs.f32 %f786, %f86;
|
|
setp.neu.f32 %p108, %f786, 0f7F800000;
|
|
@%p108 bra BB0_105;
|
|
|
|
selp.f32 %f828, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_105:
|
|
mov.u32 %r355, 4;
|
|
setp.eq.f32 %p109, %f86, 0f3F800000;
|
|
selp.f32 %f653, 0f3F800000, %f828, %p109;
|
|
cvt.u64.u32 %rd74, %r3;
|
|
cvt.u64.u32 %rd73, %r2;
|
|
mov.u64 %rd77, image;
|
|
cvta.global.u64 %rd72, %rd77;
|
|
// inline asm
|
|
call (%rd71), _rt_buffer_get_64, (%rd72, %r99, %r355, %rd73, %rd74, %rd26, %rd26);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f654, %f653;
|
|
mul.f32 %f655, %f654, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r273, %f655;
|
|
cvt.sat.f32.f32 %f656, %f129;
|
|
mul.f32 %f657, %f656, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r274, %f657;
|
|
cvt.sat.f32.f32 %f658, %f116;
|
|
mul.f32 %f659, %f658, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r275, %f659;
|
|
cvt.u16.u32 %rs16, %r273;
|
|
cvt.u16.u32 %rs17, %r275;
|
|
cvt.u16.u32 %rs18, %r274;
|
|
mov.u16 %rs19, 255;
|
|
st.v4.u8 [%rd71], {%rs16, %rs18, %rs17, %rs19};
|
|
ld.global.u32 %r385, [imageEnabled];
|
|
|
|
BB0_106:
|
|
cvt.u64.u32 %rd17, %r2;
|
|
cvt.u64.u32 %rd18, %r3;
|
|
and.b32 %r276, %r385, 4;
|
|
setp.eq.s32 %p110, %r276, 0;
|
|
@%p110 bra BB0_110;
|
|
|
|
ld.global.u32 %r277, [additive];
|
|
setp.eq.s32 %p111, %r277, 0;
|
|
mov.f32 %f660, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs20, %f660;}
|
|
|
|
// inline asm
|
|
@%p111 bra BB0_109;
|
|
|
|
mov.u64 %rd90, image_HDR;
|
|
cvta.global.u64 %rd79, %rd90;
|
|
mov.u32 %r281, 8;
|
|
// inline asm
|
|
call (%rd78), _rt_buffer_get_64, (%rd79, %r99, %r281, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
ld.v4.u16 {%rs27, %rs28, %rs29, %rs30}, [%rd78];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f661, %rs27;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f662, %rs28;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f663, %rs29;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd84), _rt_buffer_get_64, (%rd79, %r99, %r281, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
add.f32 %f664, %f84, %f661;
|
|
add.f32 %f665, %f85, %f662;
|
|
add.f32 %f666, %f86, %f663;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f666;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f665;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f664;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd84], {%rs24, %rs25, %rs26, %rs20};
|
|
bra.uni BB0_110;
|
|
|
|
BB0_109:
|
|
mov.u64 %rd97, image_HDR;
|
|
cvta.global.u64 %rd92, %rd97;
|
|
mov.u32 %r283, 8;
|
|
// inline asm
|
|
call (%rd91), _rt_buffer_get_64, (%rd92, %r99, %r283, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f85;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f84;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd91], {%rs31, %rs32, %rs33, %rs20};
|
|
|
|
BB0_110:
|
|
ld.global.u32 %r284, [additive];
|
|
setp.eq.s32 %p112, %r284, 0;
|
|
mov.f32 %f670, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f670;}
|
|
|
|
// inline asm
|
|
@%p112 bra BB0_112;
|
|
|
|
mov.u64 %rd110, image_RNM0;
|
|
cvta.global.u64 %rd99, %rd110;
|
|
mov.u32 %r288, 8;
|
|
// inline asm
|
|
call (%rd98), _rt_buffer_get_64, (%rd99, %r99, %r288, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
ld.v4.u16 {%rs41, %rs42, %rs43, %rs44}, [%rd98];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f671, %rs41;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f672, %rs42;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f673, %rs43;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd104), _rt_buffer_get_64, (%rd99, %r99, %r288, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
add.f32 %f674, %f87, %f671;
|
|
add.f32 %f675, %f88, %f672;
|
|
add.f32 %f676, %f89, %f673;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs40, %f676;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs39, %f675;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs38, %f674;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd104], {%rs38, %rs39, %rs40, %rs34};
|
|
bra.uni BB0_113;
|
|
|
|
BB0_112:
|
|
mov.u64 %rd117, image_RNM0;
|
|
cvta.global.u64 %rd112, %rd117;
|
|
mov.u32 %r290, 8;
|
|
// inline asm
|
|
call (%rd111), _rt_buffer_get_64, (%rd112, %r99, %r290, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs47, %f89;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f88;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs45, %f87;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd111], {%rs45, %rs46, %rs47, %rs34};
|
|
|
|
BB0_113:
|
|
ld.global.f32 %f681, [directDir];
|
|
fma.rn.f32 %f142, %f681, 0fBF000000, 0f3F000000;
|
|
ld.global.f32 %f682, [directDir+4];
|
|
fma.rn.f32 %f143, %f682, 0fBF000000, 0f3F000000;
|
|
ld.global.f32 %f683, [directDir+8];
|
|
fma.rn.f32 %f144, %f683, 0fBF000000, 0f3F000000;
|
|
ld.global.u32 %r291, [additive];
|
|
setp.eq.s32 %p113, %r291, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f670;}
|
|
|
|
// inline asm
|
|
@%p113 bra BB0_115;
|
|
|
|
mov.u64 %rd130, image_RNM1;
|
|
cvta.global.u64 %rd119, %rd130;
|
|
mov.u32 %r295, 8;
|
|
// inline asm
|
|
call (%rd118), _rt_buffer_get_64, (%rd119, %r99, %r295, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
ld.v4.u16 {%rs55, %rs56, %rs57, %rs58}, [%rd118];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f684, %rs55;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f685, %rs56;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f686, %rs57;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd124), _rt_buffer_get_64, (%rd119, %r99, %r295, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
add.f32 %f687, %f142, %f684;
|
|
add.f32 %f688, %f142, %f685;
|
|
add.f32 %f689, %f142, %f686;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f689;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f688;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f687;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd124], {%rs52, %rs53, %rs54, %rs48};
|
|
bra.uni BB0_116;
|
|
|
|
BB0_115:
|
|
mov.u64 %rd137, image_RNM1;
|
|
cvta.global.u64 %rd132, %rd137;
|
|
mov.u32 %r297, 8;
|
|
// inline asm
|
|
call (%rd131), _rt_buffer_get_64, (%rd132, %r99, %r297, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f142;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd131], {%rs59, %rs59, %rs59, %rs48};
|
|
|
|
BB0_116:
|
|
ld.global.u32 %r298, [additive];
|
|
setp.eq.s32 %p114, %r298, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f670;}
|
|
|
|
// inline asm
|
|
@%p114 bra BB0_118;
|
|
|
|
mov.u64 %rd150, image_RNM2;
|
|
cvta.global.u64 %rd139, %rd150;
|
|
mov.u32 %r302, 8;
|
|
// inline asm
|
|
call (%rd138), _rt_buffer_get_64, (%rd139, %r99, %r302, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
ld.v4.u16 {%rs67, %rs68, %rs69, %rs70}, [%rd138];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f692, %rs67;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f693, %rs68;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f694, %rs69;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd144), _rt_buffer_get_64, (%rd139, %r99, %r302, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
add.f32 %f695, %f143, %f692;
|
|
add.f32 %f696, %f143, %f693;
|
|
add.f32 %f697, %f143, %f694;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f697;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f696;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f695;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd144], {%rs64, %rs65, %rs66, %rs60};
|
|
bra.uni BB0_119;
|
|
|
|
BB0_118:
|
|
mov.u64 %rd157, image_RNM2;
|
|
cvta.global.u64 %rd152, %rd157;
|
|
mov.u32 %r304, 8;
|
|
// inline asm
|
|
call (%rd151), _rt_buffer_get_64, (%rd152, %r99, %r304, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f143;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd151], {%rs71, %rs71, %rs71, %rs60};
|
|
|
|
BB0_119:
|
|
ld.global.u32 %r305, [additive];
|
|
setp.eq.s32 %p115, %r305, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f670;}
|
|
|
|
// inline asm
|
|
@%p115 bra BB0_121;
|
|
|
|
mov.u64 %rd170, image_RNM3;
|
|
cvta.global.u64 %rd159, %rd170;
|
|
mov.u32 %r309, 8;
|
|
// inline asm
|
|
call (%rd158), _rt_buffer_get_64, (%rd159, %r99, %r309, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
ld.v4.u16 {%rs79, %rs80, %rs81, %rs82}, [%rd158];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f700, %rs79;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f701, %rs80;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f702, %rs81;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd164), _rt_buffer_get_64, (%rd159, %r99, %r309, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
add.f32 %f703, %f144, %f700;
|
|
add.f32 %f704, %f144, %f701;
|
|
add.f32 %f705, %f144, %f702;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f705;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f704;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f703;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd164], {%rs76, %rs77, %rs78, %rs72};
|
|
bra.uni BB0_142;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd177, image_RNM3;
|
|
cvta.global.u64 %rd172, %rd177;
|
|
mov.u32 %r311, 8;
|
|
// inline asm
|
|
call (%rd171), _rt_buffer_get_64, (%rd172, %r99, %r311, %rd17, %rd18, %rd26, %rd26);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f144;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd171], {%rs83, %rs83, %rs83, %rs72};
|
|
|
|
BB0_142:
|
|
ret;
|
|
}
|
|
|
|
|