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FORT-BO/Assets/Editor/x64/Bakery/optix9/lmSunSuperSampleTranslucent.ptx
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AsanoRema d9d7ee49d2 Added many other
2026-08-06 18:56:32 +03:00

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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//
.version 8.0
.target sm_52
.address_size 64
// .globl __raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry __raygen__oxMain()
{
.local .align 4 .b8 __local_depot0[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<241>;
.reg .b16 %rs<109>;
.reg .f32 %f<1787>;
.reg .b32 %r<1546>;
.reg .f64 %fd<5>;
.reg .b64 %rd<127>;
mov.u64 %SPL, __local_depot0;
add.u64 %rd1, %SPL, 0;
// begin inline asm
call (%r62), _optix_get_launch_index_x, ();
// end inline asm
// begin inline asm
call (%r63), _optix_get_launch_index_y, ();
// end inline asm
// begin inline asm
call (%r65), _optix_get_launch_dimension_x, ();
// end inline asm
// begin inline asm
call (%r66), _optix_get_launch_dimension_y, ();
// end inline asm
ld.const.u64 %rd24, [params+400];
cvta.to.global.u64 %rd25, %rd24;
ld.const.u32 %r68, [params+392];
mad.lo.s32 %r69, %r68, %r63, %r62;
mul.wide.u32 %rd26, %r69, 4;
add.s64 %rd2, %rd25, %rd26;
ld.global.v2.u8 {%rs15, %rs100}, [%rd2];
or.b16 %rs17, %rs15, %rs100;
and.b16 %rs18, %rs17, 255;
setp.eq.s16 %p8, %rs18, 0;
@%p8 bra $L__BB0_2;
ld.global.u8 %rs99, [%rd2+2];
bra.uni $L__BB0_3;
$L__BB0_2:
ld.global.u8 %rs99, [%rd2+2];
setp.eq.s16 %p9, %rs99, 0;
mov.f32 %f1706, 0f00000000;
mov.u16 %rs100, 0;
mov.f32 %f1707, %f1706;
mov.f32 %f1708, %f1706;
@%p9 bra $L__BB0_4;
$L__BB0_3:
cvt.rn.f32.u16 %f273, %rs15;
div.rn.f32 %f274, %f273, 0f437F0000;
fma.rn.f32 %f275, %f274, 0f40000000, 0fBF800000;
and.b16 %rs21, %rs100, 255;
cvt.rn.f32.u16 %f276, %rs21;
div.rn.f32 %f277, %f276, 0f437F0000;
fma.rn.f32 %f278, %f277, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f279, %rs99;
div.rn.f32 %f280, %f279, 0f437F0000;
fma.rn.f32 %f281, %f280, 0f40000000, 0fBF800000;
mul.f32 %f282, %f278, %f278;
fma.rn.f32 %f283, %f275, %f275, %f282;
fma.rn.f32 %f284, %f281, %f281, %f283;
sqrt.rn.f32 %f285, %f284;
rcp.rn.f32 %f286, %f285;
mul.f32 %f1708, %f286, %f281;
mul.f32 %f1707, %f286, %f278;
mul.f32 %f1706, %f275, %f286;
$L__BB0_4:
ld.const.v2.u32 {%r70, %r71}, [params];
add.s32 %r5, %r70, %r62;
add.s32 %r6, %r71, %r63;
setp.eq.f32 %p10, %f1706, 0f00000000;
setp.eq.f32 %p11, %f1707, 0f00000000;
and.pred %p12, %p10, %p11;
setp.eq.f32 %p13, %f1708, 0f00000000;
and.pred %p14, %p13, %p12;
@%p14 bra $L__BB0_160;
bra.uni $L__BB0_5;
$L__BB0_160:
ld.const.u32 %r61, [params+104];
and.b32 %r1520, %r61, 1;
setp.eq.b32 %p233, %r1520, 1;
mov.pred %p234, 0;
xor.pred %p235, %p233, %p234;
not.pred %p236, %p235;
@%p236 bra $L__BB0_162;
ld.const.u64 %rd107, [params+144];
cvta.to.global.u64 %rd108, %rd107;
ld.const.u32 %r1521, [params+136];
mad.lo.s32 %r1522, %r1521, %r6, %r5;
mul.wide.u32 %rd109, %r1522, 4;
add.s64 %rd110, %rd108, %rd109;
mov.u16 %rs80, 0;
st.global.v4.u8 [%rd110], {%rs80, %rs80, %rs80, %rs80};
$L__BB0_162:
and.b32 %r1523, %r61, 8;
setp.eq.s32 %p237, %r1523, 0;
@%p237 bra $L__BB0_164;
ld.const.u64 %rd111, [params+192];
cvta.to.global.u64 %rd112, %rd111;
ld.const.u32 %r1524, [params+184];
mad.lo.s32 %r1525, %r1524, %r6, %r5;
mov.f32 %f1695, 0f00000000;
cvt.rzi.u32.f32 %r1526, %f1695;
mul.wide.u32 %rd113, %r1525, 2;
add.s64 %rd114, %rd112, %rd113;
mov.u16 %rs81, 0;
cvt.u16.u32 %rs82, %r1526;
st.global.v2.u8 [%rd114], {%rs82, %rs81};
$L__BB0_164:
and.b32 %r1527, %r61, 4;
setp.eq.s32 %p238, %r1527, 0;
@%p238 bra $L__BB0_168;
ld.const.u32 %r1528, [params+108];
setp.eq.s32 %p239, %r1528, 0;
ld.const.u64 %rd115, [params+224];
cvta.to.global.u64 %rd116, %rd115;
ld.const.u32 %r1529, [params+216];
mad.lo.s32 %r1530, %r1529, %r6, %r5;
mul.wide.u32 %rd117, %r1530, 8;
add.s64 %rd22, %rd116, %rd117;
@%p239 bra $L__BB0_167;
ld.global.v4.u16 {%rs89, %rs90, %rs91, %rs92}, [%rd22];
// begin inline asm
{ cvt.f32.f16 %f1696, %rs89;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1697, %rs90;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1698, %rs91;}
// end inline asm
add.f32 %f1699, %f1696, 0f00000000;
add.f32 %f1700, %f1697, 0f00000000;
add.f32 %f1701, %f1698, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs88, %f1701;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs87, %f1700;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs86, %f1699;}
// end inline asm
mov.u16 %rs93, 0;
st.global.v4.u16 [%rd22], {%rs86, %rs87, %rs88, %rs93};
bra.uni $L__BB0_168;
$L__BB0_5:
ld.const.v4.f32 {%f287, %f288, %f289, %f290}, [params+512];
neg.f32 %f13, %f288;
neg.f32 %f14, %f289;
mul.f32 %f291, %f1706, %f287;
mul.f32 %f292, %f1707, %f13;
sub.f32 %f293, %f292, %f291;
mul.f32 %f294, %f1708, %f289;
sub.f32 %f15, %f293, %f294;
setp.gtu.f32 %p15, %f15, 0f00000000;
ld.const.u32 %r7, [params+544];
setp.ne.s32 %p16, %r7, 0;
or.pred %p17, %p16, %p15;
@%p17 bra $L__BB0_7;
ld.const.u32 %r8, [params+104];
and.b32 %r74, %r8, 32;
setp.eq.s32 %p18, %r74, 0;
@%p18 bra $L__BB0_150;
bra.uni $L__BB0_7;
$L__BB0_150:
and.b32 %r1506, %r8, 1;
setp.eq.b32 %p225, %r1506, 1;
mov.pred %p226, 0;
xor.pred %p227, %p225, %p226;
not.pred %p228, %p227;
@%p228 bra $L__BB0_152;
ld.const.u64 %rd92, [params+144];
cvta.to.global.u64 %rd93, %rd92;
ld.const.u32 %r1507, [params+136];
mad.lo.s32 %r1508, %r1507, %r6, %r5;
mul.wide.u32 %rd94, %r1508, 4;
add.s64 %rd95, %rd93, %rd94;
mov.u16 %rs59, 0;
mov.u16 %rs60, 255;
st.global.v4.u8 [%rd95], {%rs59, %rs59, %rs59, %rs60};
$L__BB0_152:
and.b32 %r1509, %r8, 8;
setp.eq.s32 %p229, %r1509, 0;
@%p229 bra $L__BB0_154;
ld.const.u64 %rd96, [params+192];
cvta.to.global.u64 %rd97, %rd96;
ld.const.u32 %r1510, [params+184];
mad.lo.s32 %r1511, %r1510, %r6, %r5;
mov.f32 %f1683, 0f00000000;
cvt.rzi.u32.f32 %r1512, %f1683;
mul.wide.u32 %rd98, %r1511, 2;
add.s64 %rd99, %rd97, %rd98;
cvt.u16.u32 %rs61, %r1512;
mov.u16 %rs62, 255;
st.global.v2.u8 [%rd99], {%rs61, %rs62};
$L__BB0_154:
and.b32 %r1513, %r8, 4;
setp.eq.s32 %p230, %r1513, 0;
@%p230 bra $L__BB0_158;
ld.const.u32 %r1514, [params+108];
setp.eq.s32 %p231, %r1514, 0;
ld.const.u64 %rd100, [params+224];
cvta.to.global.u64 %rd101, %rd100;
ld.const.u32 %r1515, [params+216];
mad.lo.s32 %r1516, %r1515, %r6, %r5;
mul.wide.u32 %rd102, %r1516, 8;
add.s64 %rd21, %rd101, %rd102;
@%p231 bra $L__BB0_157;
ld.global.v4.u16 {%rs70, %rs71, %rs72, %rs73}, [%rd21];
// begin inline asm
{ cvt.f32.f16 %f1684, %rs70;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1685, %rs71;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1686, %rs72;}
// end inline asm
add.f32 %f1687, %f1684, 0f00000000;
add.f32 %f1688, %f1685, 0f00000000;
add.f32 %f1689, %f1686, 0f00000000;
mov.f32 %f1690, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs69, %f1690;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs68, %f1689;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs67, %f1688;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs66, %f1687;}
// end inline asm
st.global.v4.u16 [%rd21], {%rs66, %rs67, %rs68, %rs69};
bra.uni $L__BB0_158;
$L__BB0_7:
ld.const.u64 %rd27, [params+432];
cvta.to.global.u64 %rd28, %rd27;
ld.const.u32 %r75, [params+424];
mul.lo.s32 %r76, %r75, %r63;
add.s32 %r77, %r76, %r62;
mul.wide.u32 %rd29, %r77, 12;
add.s64 %rd30, %rd28, %rd29;
ld.global.f32 %f299, [%rd30];
mul.f32 %f300, %f299, 0f3456BF95;
ld.global.f32 %f301, [%rd30+4];
mul.f32 %f302, %f301, 0f3456BF95;
ld.global.f32 %f303, [%rd30+8];
mul.f32 %f304, %f303, 0f3456BF95;
abs.f32 %f305, %f1706;
div.rn.f32 %f306, %f300, %f305;
abs.f32 %f307, %f1707;
div.rn.f32 %f308, %f302, %f307;
abs.f32 %f309, %f1708;
div.rn.f32 %f310, %f304, %f309;
abs.f32 %f311, %f306;
abs.f32 %f312, %f308;
abs.f32 %f313, %f310;
mov.f32 %f314, 0f38D1B717;
max.f32 %f315, %f311, %f314;
max.f32 %f316, %f312, %f314;
max.f32 %f317, %f313, %f314;
fma.rn.f32 %f16, %f1706, %f315, %f299;
fma.rn.f32 %f17, %f1707, %f316, %f301;
fma.rn.f32 %f18, %f1708, %f317, %f303;
setp.gt.f32 %p19, %f305, %f309;
neg.f32 %f318, %f1707;
selp.f32 %f319, %f318, 0f00000000, %p19;
mov.f32 %f1723, 0f00000000;
neg.f32 %f320, %f1708;
selp.f32 %f321, %f1706, %f320, %p19;
selp.f32 %f322, 0f00000000, %f1707, %p19;
mul.f32 %f323, %f321, %f321;
fma.rn.f32 %f324, %f319, %f319, %f323;
fma.rn.f32 %f325, %f322, %f322, %f324;
sqrt.rn.f32 %f326, %f325;
rcp.rn.f32 %f327, %f326;
mul.f32 %f19, %f319, %f327;
mul.f32 %f20, %f321, %f327;
mul.f32 %f21, %f322, %f327;
mul.f32 %f328, %f1708, %f20;
mul.f32 %f329, %f1707, %f21;
sub.f32 %f22, %f328, %f329;
mul.f32 %f330, %f1706, %f21;
mul.f32 %f331, %f1708, %f19;
sub.f32 %f23, %f330, %f331;
mul.f32 %f332, %f1707, %f19;
mul.f32 %f333, %f1706, %f20;
sub.f32 %f24, %f332, %f333;
add.s32 %r78, %r65, -1;
add.s32 %r79, %r62, 1;
min.u32 %r80, %r79, %r78;
add.s32 %r81, %r76, %r80;
mul.wide.u32 %rd31, %r81, 12;
add.s64 %rd32, %rd28, %rd31;
ld.global.f32 %f334, [%rd32];
setp.eq.f32 %p20, %f334, 0f00000000;
ld.global.f32 %f335, [%rd32+4];
setp.eq.f32 %p21, %f335, 0f00000000;
and.pred %p22, %p20, %p21;
ld.global.f32 %f336, [%rd32+8];
setp.eq.f32 %p23, %f336, 0f00000000;
and.pred %p24, %p22, %p23;
selp.f32 %f337, %f299, %f334, %p24;
selp.f32 %f338, %f301, %f335, %p24;
selp.f32 %f339, %f303, %f336, %p24;
add.s32 %r82, %r66, -1;
add.s32 %r83, %r63, 1;
min.u32 %r84, %r83, %r82;
mad.lo.s32 %r85, %r75, %r84, %r62;
mul.wide.u32 %rd33, %r85, 12;
add.s64 %rd34, %rd28, %rd33;
ld.global.f32 %f340, [%rd34];
setp.eq.f32 %p25, %f340, 0f00000000;
ld.global.f32 %f341, [%rd34+4];
setp.eq.f32 %p26, %f341, 0f00000000;
and.pred %p27, %p25, %p26;
ld.global.f32 %f342, [%rd34+8];
setp.eq.f32 %p28, %f342, 0f00000000;
and.pred %p29, %p27, %p28;
selp.f32 %f343, %f299, %f340, %p29;
selp.f32 %f344, %f301, %f341, %p29;
selp.f32 %f345, %f303, %f342, %p29;
sub.f32 %f346, %f337, %f299;
sub.f32 %f347, %f338, %f301;
sub.f32 %f348, %f339, %f303;
sub.f32 %f349, %f343, %f299;
sub.f32 %f350, %f344, %f301;
sub.f32 %f351, %f345, %f303;
abs.f32 %f352, %f346;
abs.f32 %f353, %f349;
max.f32 %f354, %f352, %f353;
abs.f32 %f355, %f347;
abs.f32 %f356, %f350;
max.f32 %f357, %f355, %f356;
abs.f32 %f358, %f348;
abs.f32 %f359, %f351;
max.f32 %f360, %f358, %f359;
max.f32 %f361, %f354, %f357;
max.f32 %f362, %f361, %f360;
setp.eq.f32 %p30, %f346, 0f00000000;
setp.eq.f32 %p31, %f347, 0f00000000;
and.pred %p32, %p30, %p31;
setp.eq.f32 %p33, %f348, 0f00000000;
and.pred %p34, %p33, %p32;
setp.eq.f32 %p35, %f349, 0f00000000;
setp.eq.f32 %p36, %f350, 0f00000000;
and.pred %p37, %p35, %p36;
setp.eq.f32 %p38, %f351, 0f00000000;
and.pred %p39, %p38, %p37;
or.pred %p40, %p34, %p39;
selp.f32 %f25, 0f00000000, %f362, %p40;
abs.f32 %f363, %f289;
abs.f32 %f364, %f287;
setp.gt.f32 %p41, %f364, %f363;
selp.f32 %f365, %f13, 0f00000000, %p41;
selp.f32 %f366, %f287, %f14, %p41;
selp.f32 %f367, 0f00000000, %f288, %p41;
mul.f32 %f368, %f366, %f366;
fma.rn.f32 %f369, %f365, %f365, %f368;
fma.rn.f32 %f370, %f367, %f367, %f369;
sqrt.rn.f32 %f371, %f370;
rcp.rn.f32 %f372, %f371;
mul.f32 %f26, %f365, %f372;
mul.f32 %f27, %f366, %f372;
mul.f32 %f28, %f367, %f372;
ld.const.u64 %rd35, [params+128];
cvta.to.global.u64 %rd36, %rd35;
ld.const.u32 %r86, [params+120];
mad.lo.s32 %r87, %r86, %r63, %r62;
mul.wide.u32 %rd37, %r87, 4;
add.s64 %rd3, %rd36, %rd37;
ld.const.u32 %r9, [params+540];
setp.lt.s32 %p42, %r9, 1;
mov.f32 %f1724, %f1723;
mov.f32 %f1725, %f1723;
mov.f32 %f1726, %f1723;
@%p42 bra $L__BB0_54;
cvt.rn.f32.s32 %f377, %r9;
rcp.rn.f32 %f29, %f377;
ld.global.u32 %r1538, [%rd3];
ld.const.f32 %f30, [params+536];
ld.const.u8 %rs23, [params+104];
and.b16 %rs24, %rs23, 32;
setp.eq.s16 %p43, %rs24, 0;
mov.u32 %r88, 0;
selp.f32 %f31, 0f3F800000, 0f41200000, %p43;
mul.f32 %f32, %f16, 0f3456BF95;
mul.f32 %f33, %f17, 0f3456BF95;
mul.f32 %f34, %f18, 0f3456BF95;
ld.const.u64 %rd4, [params+96];
mul.f32 %f378, %f287, %f27;
mul.f32 %f379, %f288, %f26;
sub.f32 %f35, %f379, %f378;
mul.f32 %f380, %f289, %f26;
mul.f32 %f381, %f287, %f28;
sub.f32 %f36, %f381, %f380;
mul.f32 %f382, %f288, %f28;
mul.f32 %f383, %f289, %f27;
sub.f32 %f37, %f383, %f382;
abs.f32 %f466, %f33;
abs.f32 %f467, %f32;
max.f32 %f468, %f467, %f466;
abs.f32 %f469, %f34;
max.f32 %f470, %f468, %f469;
mov.u32 %r1535, %r88;
$L__BB0_9:
mov.u32 %r1537, %r88;
$L__BB0_10:
cvt.rn.f32.s32 %f1705, %r1535;
mad.lo.s32 %r90, %r1538, 1664525, 1013904223;
and.b32 %r91, %r90, 16777215;
cvt.rn.f32.u32 %f384, %r91;
fma.rn.f32 %f385, %f384, 0f33800000, %f1705;
mul.f32 %f386, %f29, %f385;
mad.lo.s32 %r15, %r90, 1664525, 1013904223;
and.b32 %r92, %r15, 16777215;
cvt.rn.f32.u32 %f387, %r92;
cvt.rn.f32.s32 %f388, %r1537;
fma.rn.f32 %f389, %f387, 0f33800000, %f388;
mul.f32 %f390, %f29, %f389;
sqrt.rn.f32 %f47, %f386;
mul.f32 %f48, %f390, 0f40C90FDB;
mul.f32 %f391, %f48, 0f3F22F983;
cvt.rni.s32.f32 %r1545, %f391;
cvt.rn.f32.s32 %f392, %r1545;
mov.f32 %f393, 0fBFC90FDA;
fma.rn.f32 %f394, %f392, %f393, %f48;
mov.f32 %f395, 0fB3A22168;
fma.rn.f32 %f396, %f392, %f395, %f394;
mov.f32 %f397, 0fA7C234C5;
fma.rn.f32 %f1720, %f392, %f397, %f396;
abs.f32 %f50, %f48;
setp.ltu.f32 %p44, %f50, 0f47CE4780;
add.s64 %rd5, %rd1, 24;
mov.u32 %r1542, %r1545;
mov.f32 %f1717, %f1720;
@%p44 bra $L__BB0_18;
setp.eq.f32 %p45, %f50, 0f7F800000;
@%p45 bra $L__BB0_17;
bra.uni $L__BB0_12;
$L__BB0_17:
mov.f32 %f400, 0f00000000;
mul.rn.f32 %f1717, %f48, %f400;
mov.u32 %r1542, 0;
bra.uni $L__BB0_18;
$L__BB0_12:
mov.b32 %r17, %f48;
bfe.u32 %r94, %r17, 23, 8;
add.s32 %r18, %r94, -128;
shl.b32 %r95, %r17, 8;
or.b32 %r19, %r95, -2147483648;
shr.u32 %r20, %r18, 5;
mov.u64 %rd124, 0;
mov.u32 %r1539, 0;
mov.u64 %rd123, __cudart_i2opi_f;
mov.u64 %rd122, %rd1;
$L__BB0_13:
.pragma "nounroll";
ld.global.nc.u32 %r96, [%rd123];
mad.wide.u32 %rd40, %r96, %r19, %rd124;
shr.u64 %rd124, %rd40, 32;
st.local.u32 [%rd122], %rd40;
add.s64 %rd123, %rd123, 4;
add.s64 %rd122, %rd122, 4;
add.s32 %r1539, %r1539, 1;
setp.ne.s32 %p46, %r1539, 6;
@%p46 bra $L__BB0_13;
st.local.u32 [%rd5], %rd124;
mov.u32 %r97, 4;
sub.s32 %r23, %r97, %r20;
mov.u32 %r98, 6;
sub.s32 %r99, %r98, %r20;
mul.wide.s32 %rd41, %r99, 4;
add.s64 %rd42, %rd1, %rd41;
ld.local.u32 %r1540, [%rd42];
ld.local.u32 %r1541, [%rd42+-4];
and.b32 %r26, %r18, 31;
setp.eq.s32 %p47, %r26, 0;
@%p47 bra $L__BB0_16;
mov.u32 %r100, 32;
sub.s32 %r101, %r100, %r26;
shr.u32 %r102, %r1541, %r101;
shl.b32 %r103, %r1540, %r26;
add.s32 %r1540, %r102, %r103;
mul.wide.s32 %rd43, %r23, 4;
add.s64 %rd44, %rd1, %rd43;
ld.local.u32 %r104, [%rd44];
shr.u32 %r105, %r104, %r101;
shl.b32 %r106, %r1541, %r26;
add.s32 %r1541, %r105, %r106;
$L__BB0_16:
and.b32 %r107, %r17, -2147483648;
shr.u32 %r108, %r1541, 30;
shl.b32 %r109, %r1540, 2;
or.b32 %r110, %r108, %r109;
shr.u32 %r111, %r110, 31;
shr.u32 %r112, %r1540, 30;
add.s32 %r113, %r111, %r112;
neg.s32 %r114, %r113;
setp.eq.s32 %p48, %r107, 0;
selp.b32 %r1542, %r113, %r114, %p48;
setp.ne.s32 %p49, %r111, 0;
xor.b32 %r115, %r107, -2147483648;
selp.b32 %r116, %r115, %r107, %p49;
selp.b32 %r117, -1, 0, %p49;
xor.b32 %r118, %r110, %r117;
shl.b32 %r119, %r1541, 2;
xor.b32 %r120, %r119, %r117;
cvt.u64.u32 %rd45, %r118;
cvt.u64.u32 %rd46, %r120;
bfi.b64 %rd47, %rd45, %rd46, 32, 32;
cvt.rn.f64.s64 %fd1, %rd47;
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
cvt.rn.f32.f64 %f398, %fd2;
setp.eq.s32 %p50, %r116, 0;
neg.f32 %f399, %f398;
selp.f32 %f1717, %f398, %f399, %p50;
$L__BB0_18:
add.s32 %r33, %r1542, 1;
and.b32 %r34, %r33, 1;
setp.eq.s32 %p51, %r34, 0;
selp.f32 %f54, %f1717, 0f3F800000, %p51;
mul.rn.f32 %f55, %f1717, %f1717;
mov.f32 %f1718, 0fB94D4153;
@%p51 bra $L__BB0_20;
mov.f32 %f402, 0fBAB607ED;
mov.f32 %f403, 0f37CBAC00;
fma.rn.f32 %f1718, %f403, %f55, %f402;
$L__BB0_20:
selp.f32 %f404, 0f3C0885E4, 0f3D2AAABB, %p51;
fma.rn.f32 %f405, %f1718, %f55, %f404;
selp.f32 %f406, 0fBE2AAAA8, 0fBEFFFFFF, %p51;
fma.rn.f32 %f407, %f405, %f55, %f406;
mov.f32 %f408, 0f00000000;
fma.rn.f32 %f409, %f55, %f54, %f408;
fma.rn.f32 %f1719, %f407, %f409, %f54;
and.b32 %r122, %r33, 2;
setp.eq.s32 %p53, %r122, 0;
@%p53 bra $L__BB0_22;
mov.f32 %f411, 0fBF800000;
fma.rn.f32 %f1719, %f1719, %f411, %f408;
$L__BB0_22:
@%p44 bra $L__BB0_30;
setp.eq.f32 %p55, %f50, 0f7F800000;
@%p55 bra $L__BB0_29;
bra.uni $L__BB0_24;
$L__BB0_29:
mov.f32 %f414, 0f00000000;
mul.rn.f32 %f1720, %f48, %f414;
mov.u32 %r1545, 0;
bra.uni $L__BB0_30;
$L__BB0_24:
mov.b32 %r35, %f48;
bfe.u32 %r123, %r35, 23, 8;
add.s32 %r36, %r123, -128;
shl.b32 %r124, %r35, 8;
or.b32 %r37, %r124, -2147483648;
shr.u32 %r38, %r36, 5;
mov.u64 %rd125, 0;
mov.u64 %rd126, %rd125;
$L__BB0_25:
.pragma "nounroll";
shl.b64 %rd50, %rd125, 2;
mov.u64 %rd51, __cudart_i2opi_f;
add.s64 %rd52, %rd51, %rd50;
ld.global.nc.u32 %r125, [%rd52];
mad.wide.u32 %rd53, %r125, %r37, %rd126;
shr.u64 %rd126, %rd53, 32;
add.s64 %rd54, %rd1, %rd50;
st.local.u32 [%rd54], %rd53;
cvt.u32.u64 %r126, %rd125;
add.s32 %r127, %r126, 1;
cvt.s64.s32 %rd125, %r127;
setp.ne.s32 %p56, %r127, 6;
@%p56 bra $L__BB0_25;
st.local.u32 [%rd5], %rd126;
mov.u32 %r128, 4;
sub.s32 %r39, %r128, %r38;
mov.u32 %r129, 6;
sub.s32 %r130, %r129, %r38;
mul.wide.s32 %rd55, %r130, 4;
add.s64 %rd56, %rd1, %rd55;
ld.local.u32 %r1543, [%rd56];
ld.local.u32 %r1544, [%rd56+-4];
and.b32 %r42, %r36, 31;
setp.eq.s32 %p57, %r42, 0;
@%p57 bra $L__BB0_28;
mov.u32 %r131, 32;
sub.s32 %r132, %r131, %r42;
shr.u32 %r133, %r1544, %r132;
shl.b32 %r134, %r1543, %r42;
add.s32 %r1543, %r133, %r134;
mul.wide.s32 %rd57, %r39, 4;
add.s64 %rd58, %rd1, %rd57;
ld.local.u32 %r135, [%rd58];
shr.u32 %r136, %r135, %r132;
shl.b32 %r137, %r1544, %r42;
add.s32 %r1544, %r136, %r137;
$L__BB0_28:
and.b32 %r138, %r35, -2147483648;
shr.u32 %r139, %r1544, 30;
shl.b32 %r140, %r1543, 2;
or.b32 %r141, %r139, %r140;
shr.u32 %r142, %r141, 31;
shr.u32 %r143, %r1543, 30;
add.s32 %r144, %r142, %r143;
neg.s32 %r145, %r144;
setp.eq.s32 %p58, %r138, 0;
selp.b32 %r1545, %r144, %r145, %p58;
setp.ne.s32 %p59, %r142, 0;
xor.b32 %r146, %r138, -2147483648;
selp.b32 %r147, %r146, %r138, %p59;
selp.b32 %r148, -1, 0, %p59;
xor.b32 %r149, %r141, %r148;
shl.b32 %r150, %r1544, 2;
xor.b32 %r151, %r150, %r148;
cvt.u64.u32 %rd59, %r149;
cvt.u64.u32 %rd60, %r151;
bfi.b64 %rd61, %rd59, %rd60, 32, 32;
cvt.rn.f64.s64 %fd3, %rd61;
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
cvt.rn.f32.f64 %f412, %fd4;
setp.eq.s32 %p60, %r147, 0;
neg.f32 %f413, %f412;
selp.f32 %f1720, %f412, %f413, %p60;
$L__BB0_30:
mul.f32 %f64, %f47, %f1719;
and.b32 %r49, %r1545, 1;
setp.eq.s32 %p61, %r49, 0;
selp.f32 %f65, %f1720, 0f3F800000, %p61;
mul.rn.f32 %f66, %f1720, %f1720;
mov.f32 %f1721, 0fB94D4153;
@%p61 bra $L__BB0_32;
mov.f32 %f416, 0fBAB607ED;
mov.f32 %f417, 0f37CBAC00;
fma.rn.f32 %f1721, %f417, %f66, %f416;
$L__BB0_32:
selp.f32 %f418, 0f3C0885E4, 0f3D2AAABB, %p61;
fma.rn.f32 %f419, %f1721, %f66, %f418;
selp.f32 %f420, 0fBE2AAAA8, 0fBEFFFFFF, %p61;
fma.rn.f32 %f421, %f419, %f66, %f420;
mov.f32 %f422, 0f00000000;
fma.rn.f32 %f423, %f66, %f65, %f422;
fma.rn.f32 %f1722, %f421, %f423, %f65;
and.b32 %r153, %r1545, 2;
setp.eq.s32 %p63, %r153, 0;
@%p63 bra $L__BB0_34;
mov.f32 %f425, 0fBF800000;
fma.rn.f32 %f1722, %f1722, %f425, %f422;
$L__BB0_34:
mul.f32 %f435, %f64, %f64;
mov.f32 %f436, 0f3F800000;
sub.f32 %f437, %f436, %f435;
mul.f32 %f438, %f47, %f1722;
mul.f32 %f439, %f438, %f438;
sub.f32 %f440, %f437, %f439;
max.f32 %f441, %f422, %f440;
sqrt.rn.f32 %f442, %f441;
mul.f32 %f443, %f26, %f438;
mul.f32 %f444, %f27, %f438;
mul.f32 %f445, %f28, %f438;
fma.rn.f32 %f446, %f37, %f64, %f443;
fma.rn.f32 %f447, %f36, %f64, %f444;
fma.rn.f32 %f448, %f35, %f64, %f445;
fma.rn.f32 %f449, %f287, %f442, %f446;
fma.rn.f32 %f450, %f288, %f442, %f447;
fma.rn.f32 %f451, %f289, %f442, %f448;
add.f32 %f452, %f287, %f449;
add.f32 %f453, %f288, %f450;
add.f32 %f454, %f289, %f451;
mul.f32 %f455, %f30, %f452;
mul.f32 %f456, %f30, %f453;
mul.f32 %f457, %f30, %f454;
sub.f32 %f458, %f455, %f287;
sub.f32 %f459, %f456, %f288;
sub.f32 %f460, %f457, %f289;
mul.f32 %f461, %f459, %f459;
fma.rn.f32 %f462, %f458, %f458, %f461;
fma.rn.f32 %f463, %f460, %f460, %f462;
sqrt.rn.f32 %f464, %f463;
rcp.rn.f32 %f465, %f464;
mul.f32 %f72, %f465, %f458;
mul.f32 %f73, %f465, %f459;
mul.f32 %f74, %f465, %f460;
mov.f32 %f471, 0f38D1B717;
max.f32 %f472, %f470, %f471;
mul.f32 %f432, %f31, %f472;
mad.lo.s32 %r225, %r15, 1664525, 1013904223;
and.b32 %r226, %r225, 16777215;
cvt.rn.f32.u32 %f473, %r226;
mul.f32 %f474, %f473, 0f33800000;
fma.rn.f32 %f475, %f474, 0f40000000, 0fBF800000;
mad.lo.s32 %r50, %r225, 1664525, 1013904223;
and.b32 %r227, %r50, 16777215;
cvt.rn.f32.u32 %f476, %r227;
mul.f32 %f477, %f476, 0f33800000;
fma.rn.f32 %f478, %f477, 0f40000000, 0fBF800000;
mul.f32 %f479, %f19, %f478;
mul.f32 %f480, %f20, %f478;
mul.f32 %f481, %f21, %f478;
fma.rn.f32 %f482, %f22, %f475, %f479;
fma.rn.f32 %f483, %f23, %f475, %f480;
fma.rn.f32 %f484, %f24, %f475, %f481;
mul.f32 %f485, %f483, %f483;
fma.rn.f32 %f486, %f482, %f482, %f485;
fma.rn.f32 %f487, %f484, %f484, %f486;
sqrt.rn.f32 %f488, %f487;
rcp.rn.f32 %f489, %f488;
mul.f32 %f490, %f482, %f489;
mul.f32 %f491, %f483, %f489;
mul.f32 %f492, %f484, %f489;
mul.f32 %f493, %f1707, %f492;
mul.f32 %f494, %f1708, %f491;
sub.f32 %f495, %f493, %f494;
mul.f32 %f496, %f1708, %f490;
mul.f32 %f497, %f1706, %f492;
sub.f32 %f498, %f496, %f497;
mul.f32 %f499, %f1706, %f491;
mul.f32 %f500, %f1707, %f490;
sub.f32 %f501, %f499, %f500;
mul.f32 %f502, %f490, 0f3E24A490;
mul.f32 %f503, %f491, 0f3E24A490;
mul.f32 %f504, %f492, 0f3E24A490;
fma.rn.f32 %f505, %f25, %f502, %f16;
fma.rn.f32 %f506, %f25, %f503, %f17;
fma.rn.f32 %f507, %f25, %f504, %f18;
mul.f32 %f508, %f495, 0fBECECEDE;
mul.f32 %f509, %f498, 0fBECECEDE;
mul.f32 %f510, %f501, 0fBECECEDE;
fma.rn.f32 %f76, %f25, %f508, %f505;
fma.rn.f32 %f77, %f25, %f509, %f506;
fma.rn.f32 %f78, %f25, %f510, %f507;
sub.f32 %f511, %f76, %f16;
sub.f32 %f512, %f77, %f17;
sub.f32 %f513, %f78, %f18;
mul.f32 %f514, %f512, %f512;
fma.rn.f32 %f515, %f511, %f511, %f514;
fma.rn.f32 %f516, %f513, %f513, %f515;
sqrt.rn.f32 %f433, %f516;
rcp.rn.f32 %f517, %f433;
mul.f32 %f429, %f517, %f511;
mul.f32 %f430, %f517, %f512;
mul.f32 %f431, %f517, %f513;
mov.u32 %r190, 2;
mov.u32 %r191, 1;
mov.u32 %r192, 3;
mov.u32 %r195, 1065353216;
mov.u32 %r224, 0;
// begin inline asm
call(%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166,%r167,%r168,%r169,%r170,%r171,%r172,%r173,%r174,%r175,%r176,%r177,%r178,%r179,%r180,%r181,%r182,%r183,%r184,%r185),_optix_trace_typed_32,(%r224,%rd4,%f16,%f17,%f18,%f429,%f430,%f431,%f432,%f433,%f422,%r191,%r224,%r191,%r190,%r191,%r192,%r195,%r195,%r195,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224);
// end inline asm
mov.b32 %f518, %r154;
mov.b32 %f519, %r155;
mov.b32 %f520, %r156;
setp.neu.f32 %p64, %f518, 0f3F800000;
setp.neu.f32 %p65, %f519, 0f3F800000;
or.pred %p66, %p64, %p65;
setp.neu.f32 %p67, %f520, 0f3F800000;
mov.u16 %rs102, 0;
or.pred %p68, %p67, %p66;
@%p68 bra $L__BB0_36;
mov.f32 %f528, 0f6C4ECB8F;
mov.f32 %f529, 0f00000000;
// begin inline asm
call(%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259),_optix_trace_typed_32,(%r224,%rd4,%f76,%f77,%f78,%f72,%f73,%f74,%f432,%f528,%f529,%r191,%r224,%r191,%r190,%r191,%r192,%r195,%r195,%r195,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224);
// end inline asm
mov.b32 %f530, %r228;
mov.b32 %f531, %r229;
mov.b32 %f532, %r230;
add.f32 %f1723, %f1723, %f530;
add.f32 %f1724, %f1724, %f531;
add.f32 %f1725, %f1725, %f532;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_36:
mad.lo.s32 %r370, %r50, 1664525, 1013904223;
and.b32 %r371, %r370, 16777215;
cvt.rn.f32.u32 %f542, %r371;
mul.f32 %f543, %f542, 0f33800000;
fma.rn.f32 %f544, %f543, 0f40000000, 0fBF800000;
mad.lo.s32 %r51, %r370, 1664525, 1013904223;
and.b32 %r372, %r51, 16777215;
cvt.rn.f32.u32 %f545, %r372;
mul.f32 %f546, %f545, 0f33800000;
fma.rn.f32 %f547, %f546, 0f40000000, 0fBF800000;
mul.f32 %f548, %f19, %f547;
mul.f32 %f549, %f20, %f547;
mul.f32 %f550, %f21, %f547;
fma.rn.f32 %f551, %f22, %f544, %f548;
fma.rn.f32 %f552, %f23, %f544, %f549;
fma.rn.f32 %f553, %f24, %f544, %f550;
mul.f32 %f554, %f552, %f552;
fma.rn.f32 %f555, %f551, %f551, %f554;
fma.rn.f32 %f556, %f553, %f553, %f555;
sqrt.rn.f32 %f557, %f556;
rcp.rn.f32 %f558, %f557;
mul.f32 %f559, %f551, %f558;
mul.f32 %f560, %f552, %f558;
mul.f32 %f561, %f553, %f558;
mul.f32 %f562, %f1707, %f561;
mul.f32 %f563, %f1708, %f560;
sub.f32 %f564, %f562, %f563;
mul.f32 %f565, %f1708, %f559;
mul.f32 %f566, %f1706, %f561;
sub.f32 %f567, %f565, %f566;
mul.f32 %f568, %f1706, %f560;
mul.f32 %f569, %f1707, %f559;
sub.f32 %f570, %f568, %f569;
mul.f32 %f571, %f559, 0fBE24A490;
mul.f32 %f572, %f560, 0fBE24A490;
mul.f32 %f573, %f561, 0fBE24A490;
fma.rn.f32 %f574, %f25, %f571, %f16;
fma.rn.f32 %f575, %f25, %f572, %f17;
fma.rn.f32 %f576, %f25, %f573, %f18;
mul.f32 %f577, %f564, 0f3ECACABC;
mul.f32 %f578, %f567, 0f3ECACABC;
mul.f32 %f579, %f570, 0f3ECACABC;
fma.rn.f32 %f87, %f25, %f577, %f574;
fma.rn.f32 %f88, %f25, %f578, %f575;
fma.rn.f32 %f89, %f25, %f579, %f576;
sub.f32 %f580, %f87, %f16;
sub.f32 %f581, %f88, %f17;
sub.f32 %f582, %f89, %f18;
mul.f32 %f583, %f581, %f581;
fma.rn.f32 %f584, %f580, %f580, %f583;
fma.rn.f32 %f585, %f582, %f582, %f584;
sqrt.rn.f32 %f540, %f585;
rcp.rn.f32 %f586, %f540;
mul.f32 %f536, %f586, %f580;
mul.f32 %f537, %f586, %f581;
mul.f32 %f538, %f586, %f582;
mov.f32 %f541, 0f00000000;
// begin inline asm
call(%r299,%r300,%r301,%r302,%r303,%r304,%r305,%r306,%r307,%r308,%r309,%r310,%r311,%r312,%r313,%r314,%r315,%r316,%r317,%r318,%r319,%r320,%r321,%r322,%r323,%r324,%r325,%r326,%r327,%r328,%r329,%r330),_optix_trace_typed_32,(%r224,%rd4,%f16,%f17,%f18,%f536,%f537,%f538,%f432,%f540,%f541,%r191,%r224,%r191,%r190,%r191,%r192,%r195,%r195,%r195,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224,%r224);
// end inline asm
mov.b32 %f587, %r299;
mov.b32 %f588, %r300;
mov.b32 %f589, %r301;
setp.neu.f32 %p69, %f587, 0f3F800000;
setp.neu.f32 %p70, %f588, 0f3F800000;
or.pred %p71, %p69, %p70;
setp.neu.f32 %p72, %f589, 0f3F800000;
or.pred %p73, %p72, %p71;
@%p73 bra $L__BB0_38;
mov.f32 %f597, 0f6C4ECB8F;
mov.u32 %r409, 2;
mov.u32 %r410, 1;
mov.u32 %r411, 3;
mov.u32 %r414, 1065353216;
mov.u32 %r443, 0;
// begin inline asm
call(%r373,%r374,%r375,%r376,%r377,%r378,%r379,%r380,%r381,%r382,%r383,%r384,%r385,%r386,%r387,%r388,%r389,%r390,%r391,%r392,%r393,%r394,%r395,%r396,%r397,%r398,%r399,%r400,%r401,%r402,%r403,%r404),_optix_trace_typed_32,(%r443,%rd4,%f87,%f88,%f89,%f72,%f73,%f74,%f432,%f597,%f541,%r410,%r443,%r410,%r409,%r410,%r411,%r414,%r414,%r414,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443,%r443);
// end inline asm
mov.b32 %f599, %r373;
mov.b32 %f600, %r374;
mov.b32 %f601, %r375;
add.f32 %f1723, %f1723, %f599;
add.f32 %f1724, %f1724, %f600;
add.f32 %f1725, %f1725, %f601;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_38:
mad.lo.s32 %r515, %r51, 1664525, 1013904223;
and.b32 %r516, %r515, 16777215;
cvt.rn.f32.u32 %f611, %r516;
mul.f32 %f612, %f611, 0f33800000;
fma.rn.f32 %f613, %f612, 0f40000000, 0fBF800000;
mad.lo.s32 %r52, %r515, 1664525, 1013904223;
and.b32 %r517, %r52, 16777215;
cvt.rn.f32.u32 %f614, %r517;
mul.f32 %f615, %f614, 0f33800000;
fma.rn.f32 %f616, %f615, 0f40000000, 0fBF800000;
mul.f32 %f617, %f19, %f616;
mul.f32 %f618, %f20, %f616;
mul.f32 %f619, %f21, %f616;
fma.rn.f32 %f620, %f22, %f613, %f617;
fma.rn.f32 %f621, %f23, %f613, %f618;
fma.rn.f32 %f622, %f24, %f613, %f619;
mul.f32 %f623, %f621, %f621;
fma.rn.f32 %f624, %f620, %f620, %f623;
fma.rn.f32 %f625, %f622, %f622, %f624;
sqrt.rn.f32 %f626, %f625;
rcp.rn.f32 %f627, %f626;
mul.f32 %f628, %f620, %f627;
mul.f32 %f629, %f621, %f627;
mul.f32 %f630, %f622, %f627;
mul.f32 %f631, %f1707, %f630;
mul.f32 %f632, %f1708, %f629;
sub.f32 %f633, %f631, %f632;
mul.f32 %f634, %f1708, %f628;
mul.f32 %f635, %f1706, %f630;
sub.f32 %f636, %f634, %f635;
mul.f32 %f637, %f1706, %f629;
mul.f32 %f638, %f1707, %f628;
sub.f32 %f639, %f637, %f638;
mul.f32 %f640, %f628, 0f3F23A3A8;
mul.f32 %f641, %f629, 0f3F23A3A8;
mul.f32 %f642, %f630, 0f3F23A3A8;
fma.rn.f32 %f643, %f25, %f640, %f16;
fma.rn.f32 %f644, %f25, %f641, %f17;
fma.rn.f32 %f645, %f25, %f642, %f18;
mul.f32 %f646, %f633, 0f3E24A490;
mul.f32 %f647, %f636, 0f3E24A490;
mul.f32 %f648, %f639, 0f3E24A490;
fma.rn.f32 %f98, %f25, %f646, %f643;
fma.rn.f32 %f99, %f25, %f647, %f644;
fma.rn.f32 %f100, %f25, %f648, %f645;
sub.f32 %f649, %f98, %f16;
sub.f32 %f650, %f99, %f17;
sub.f32 %f651, %f100, %f18;
mul.f32 %f652, %f650, %f650;
fma.rn.f32 %f653, %f649, %f649, %f652;
fma.rn.f32 %f654, %f651, %f651, %f653;
sqrt.rn.f32 %f609, %f654;
rcp.rn.f32 %f655, %f609;
mul.f32 %f605, %f655, %f649;
mul.f32 %f606, %f655, %f650;
mul.f32 %f607, %f655, %f651;
mov.u32 %r480, 2;
mov.u32 %r481, 1;
mov.u32 %r482, 3;
mov.u32 %r485, 1065353216;
mov.u32 %r514, 0;
// begin inline asm
call(%r444,%r445,%r446,%r447,%r448,%r449,%r450,%r451,%r452,%r453,%r454,%r455,%r456,%r457,%r458,%r459,%r460,%r461,%r462,%r463,%r464,%r465,%r466,%r467,%r468,%r469,%r470,%r471,%r472,%r473,%r474,%r475),_optix_trace_typed_32,(%r514,%rd4,%f16,%f17,%f18,%f605,%f606,%f607,%f432,%f609,%f541,%r481,%r514,%r481,%r480,%r481,%r482,%r485,%r485,%r485,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514);
// end inline asm
mov.b32 %f656, %r444;
mov.b32 %f657, %r445;
mov.b32 %f658, %r446;
setp.neu.f32 %p74, %f656, 0f3F800000;
setp.neu.f32 %p75, %f657, 0f3F800000;
or.pred %p76, %p74, %p75;
setp.neu.f32 %p77, %f658, 0f3F800000;
or.pred %p78, %p77, %p76;
@%p78 bra $L__BB0_40;
mov.f32 %f666, 0f6C4ECB8F;
mov.f32 %f667, 0f00000000;
// begin inline asm
call(%r518,%r519,%r520,%r521,%r522,%r523,%r524,%r525,%r526,%r527,%r528,%r529,%r530,%r531,%r532,%r533,%r534,%r535,%r536,%r537,%r538,%r539,%r540,%r541,%r542,%r543,%r544,%r545,%r546,%r547,%r548,%r549),_optix_trace_typed_32,(%r514,%rd4,%f98,%f99,%f100,%f72,%f73,%f74,%f432,%f666,%f667,%r481,%r514,%r481,%r480,%r481,%r482,%r485,%r485,%r485,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514);
// end inline asm
mov.b32 %f668, %r518;
mov.b32 %f669, %r519;
mov.b32 %f670, %r520;
add.f32 %f1723, %f1723, %f668;
add.f32 %f1724, %f1724, %f669;
add.f32 %f1725, %f1725, %f670;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_40:
mad.lo.s32 %r660, %r52, 1664525, 1013904223;
and.b32 %r661, %r660, 16777215;
cvt.rn.f32.u32 %f680, %r661;
mul.f32 %f681, %f680, 0f33800000;
fma.rn.f32 %f682, %f681, 0f40000000, 0fBF800000;
mad.lo.s32 %r53, %r660, 1664525, 1013904223;
and.b32 %r662, %r53, 16777215;
cvt.rn.f32.u32 %f683, %r662;
mul.f32 %f684, %f683, 0f33800000;
fma.rn.f32 %f685, %f684, 0f40000000, 0fBF800000;
mul.f32 %f686, %f19, %f685;
mul.f32 %f687, %f20, %f685;
mul.f32 %f688, %f21, %f685;
fma.rn.f32 %f689, %f22, %f682, %f686;
fma.rn.f32 %f690, %f23, %f682, %f687;
fma.rn.f32 %f691, %f24, %f682, %f688;
mul.f32 %f692, %f690, %f690;
fma.rn.f32 %f693, %f689, %f689, %f692;
fma.rn.f32 %f694, %f691, %f691, %f693;
sqrt.rn.f32 %f695, %f694;
rcp.rn.f32 %f696, %f695;
mul.f32 %f697, %f689, %f696;
mul.f32 %f698, %f690, %f696;
mul.f32 %f699, %f691, %f696;
mul.f32 %f700, %f1707, %f699;
mul.f32 %f701, %f1708, %f698;
sub.f32 %f702, %f700, %f701;
mul.f32 %f703, %f1708, %f697;
mul.f32 %f704, %f1706, %f699;
sub.f32 %f705, %f703, %f704;
mul.f32 %f706, %f1706, %f698;
mul.f32 %f707, %f1707, %f697;
sub.f32 %f708, %f706, %f707;
mul.f32 %f709, %f697, 0fBECECEDE;
mul.f32 %f710, %f698, 0fBECECEDE;
mul.f32 %f711, %f699, 0fBECECEDE;
fma.rn.f32 %f712, %f25, %f709, %f16;
fma.rn.f32 %f713, %f25, %f710, %f17;
fma.rn.f32 %f714, %f25, %f711, %f18;
mul.f32 %f715, %f702, 0fBF23A3A9;
mul.f32 %f716, %f705, 0fBF23A3A9;
mul.f32 %f717, %f708, 0fBF23A3A9;
fma.rn.f32 %f109, %f25, %f715, %f712;
fma.rn.f32 %f110, %f25, %f716, %f713;
fma.rn.f32 %f111, %f25, %f717, %f714;
sub.f32 %f718, %f109, %f16;
sub.f32 %f719, %f110, %f17;
sub.f32 %f720, %f111, %f18;
mul.f32 %f721, %f719, %f719;
fma.rn.f32 %f722, %f718, %f718, %f721;
fma.rn.f32 %f723, %f720, %f720, %f722;
sqrt.rn.f32 %f678, %f723;
rcp.rn.f32 %f724, %f678;
mul.f32 %f674, %f724, %f718;
mul.f32 %f675, %f724, %f719;
mul.f32 %f676, %f724, %f720;
mov.f32 %f679, 0f00000000;
// begin inline asm
call(%r589,%r590,%r591,%r592,%r593,%r594,%r595,%r596,%r597,%r598,%r599,%r600,%r601,%r602,%r603,%r604,%r605,%r606,%r607,%r608,%r609,%r610,%r611,%r612,%r613,%r614,%r615,%r616,%r617,%r618,%r619,%r620),_optix_trace_typed_32,(%r514,%rd4,%f16,%f17,%f18,%f674,%f675,%f676,%f432,%f678,%f679,%r481,%r514,%r481,%r480,%r481,%r482,%r485,%r485,%r485,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514,%r514);
// end inline asm
mov.b32 %f725, %r589;
mov.b32 %f726, %r590;
mov.b32 %f727, %r591;
setp.neu.f32 %p79, %f725, 0f3F800000;
setp.neu.f32 %p80, %f726, 0f3F800000;
or.pred %p81, %p79, %p80;
setp.neu.f32 %p82, %f727, 0f3F800000;
or.pred %p83, %p82, %p81;
@%p83 bra $L__BB0_42;
mov.f32 %f735, 0f6C4ECB8F;
mov.u32 %r699, 2;
mov.u32 %r700, 1;
mov.u32 %r701, 3;
mov.u32 %r704, 1065353216;
mov.u32 %r733, 0;
// begin inline asm
call(%r663,%r664,%r665,%r666,%r667,%r668,%r669,%r670,%r671,%r672,%r673,%r674,%r675,%r676,%r677,%r678,%r679,%r680,%r681,%r682,%r683,%r684,%r685,%r686,%r687,%r688,%r689,%r690,%r691,%r692,%r693,%r694),_optix_trace_typed_32,(%r733,%rd4,%f109,%f110,%f111,%f72,%f73,%f74,%f432,%f735,%f679,%r700,%r733,%r700,%r699,%r700,%r701,%r704,%r704,%r704,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733,%r733);
// end inline asm
mov.b32 %f737, %r663;
mov.b32 %f738, %r664;
mov.b32 %f739, %r665;
add.f32 %f1723, %f1723, %f737;
add.f32 %f1724, %f1724, %f738;
add.f32 %f1725, %f1725, %f739;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_42:
mad.lo.s32 %r805, %r53, 1664525, 1013904223;
and.b32 %r806, %r805, 16777215;
cvt.rn.f32.u32 %f749, %r806;
mul.f32 %f750, %f749, 0f33800000;
fma.rn.f32 %f751, %f750, 0f40000000, 0fBF800000;
mad.lo.s32 %r54, %r805, 1664525, 1013904223;
and.b32 %r807, %r54, 16777215;
cvt.rn.f32.u32 %f752, %r807;
mul.f32 %f753, %f752, 0f33800000;
fma.rn.f32 %f754, %f753, 0f40000000, 0fBF800000;
mul.f32 %f755, %f19, %f754;
mul.f32 %f756, %f20, %f754;
mul.f32 %f757, %f21, %f754;
fma.rn.f32 %f758, %f22, %f751, %f755;
fma.rn.f32 %f759, %f23, %f751, %f756;
fma.rn.f32 %f760, %f24, %f751, %f757;
mul.f32 %f761, %f759, %f759;
fma.rn.f32 %f762, %f758, %f758, %f761;
fma.rn.f32 %f763, %f760, %f760, %f762;
sqrt.rn.f32 %f764, %f763;
rcp.rn.f32 %f765, %f764;
mul.f32 %f766, %f758, %f765;
mul.f32 %f767, %f759, %f765;
mul.f32 %f768, %f760, %f765;
mul.f32 %f769, %f1707, %f768;
mul.f32 %f770, %f1708, %f767;
sub.f32 %f771, %f769, %f770;
mul.f32 %f772, %f1708, %f766;
mul.f32 %f773, %f1706, %f768;
sub.f32 %f774, %f772, %f773;
mul.f32 %f775, %f1706, %f767;
mul.f32 %f776, %f1707, %f766;
sub.f32 %f777, %f775, %f776;
mul.f32 %f778, %f766, 0fBF23A3A9;
mul.f32 %f779, %f767, 0fBF23A3A9;
mul.f32 %f780, %f768, 0fBF23A3A9;
fma.rn.f32 %f781, %f25, %f778, %f16;
fma.rn.f32 %f782, %f25, %f779, %f17;
fma.rn.f32 %f783, %f25, %f780, %f18;
mul.f32 %f784, %f771, 0f3F23A3A8;
mul.f32 %f785, %f774, 0f3F23A3A8;
mul.f32 %f786, %f777, 0f3F23A3A8;
fma.rn.f32 %f120, %f25, %f784, %f781;
fma.rn.f32 %f121, %f25, %f785, %f782;
fma.rn.f32 %f122, %f25, %f786, %f783;
sub.f32 %f787, %f120, %f16;
sub.f32 %f788, %f121, %f17;
sub.f32 %f789, %f122, %f18;
mul.f32 %f790, %f788, %f788;
fma.rn.f32 %f791, %f787, %f787, %f790;
fma.rn.f32 %f792, %f789, %f789, %f791;
sqrt.rn.f32 %f747, %f792;
rcp.rn.f32 %f793, %f747;
mul.f32 %f743, %f793, %f787;
mul.f32 %f744, %f793, %f788;
mul.f32 %f745, %f793, %f789;
mov.u32 %r770, 2;
mov.u32 %r771, 1;
mov.u32 %r772, 3;
mov.u32 %r775, 1065353216;
mov.u32 %r804, 0;
// begin inline asm
call(%r734,%r735,%r736,%r737,%r738,%r739,%r740,%r741,%r742,%r743,%r744,%r745,%r746,%r747,%r748,%r749,%r750,%r751,%r752,%r753,%r754,%r755,%r756,%r757,%r758,%r759,%r760,%r761,%r762,%r763,%r764,%r765),_optix_trace_typed_32,(%r804,%rd4,%f16,%f17,%f18,%f743,%f744,%f745,%f432,%f747,%f679,%r771,%r804,%r771,%r770,%r771,%r772,%r775,%r775,%r775,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804);
// end inline asm
mov.b32 %f794, %r734;
mov.b32 %f795, %r735;
mov.b32 %f796, %r736;
setp.neu.f32 %p84, %f794, 0f3F800000;
setp.neu.f32 %p85, %f795, 0f3F800000;
or.pred %p86, %p84, %p85;
setp.neu.f32 %p87, %f796, 0f3F800000;
or.pred %p88, %p87, %p86;
@%p88 bra $L__BB0_44;
mov.f32 %f804, 0f6C4ECB8F;
mov.f32 %f805, 0f00000000;
// begin inline asm
call(%r808,%r809,%r810,%r811,%r812,%r813,%r814,%r815,%r816,%r817,%r818,%r819,%r820,%r821,%r822,%r823,%r824,%r825,%r826,%r827,%r828,%r829,%r830,%r831,%r832,%r833,%r834,%r835,%r836,%r837,%r838,%r839),_optix_trace_typed_32,(%r804,%rd4,%f120,%f121,%f122,%f72,%f73,%f74,%f432,%f804,%f805,%r771,%r804,%r771,%r770,%r771,%r772,%r775,%r775,%r775,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804);
// end inline asm
mov.b32 %f806, %r808;
mov.b32 %f807, %r809;
mov.b32 %f808, %r810;
add.f32 %f1723, %f1723, %f806;
add.f32 %f1724, %f1724, %f807;
add.f32 %f1725, %f1725, %f808;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_44:
mad.lo.s32 %r950, %r54, 1664525, 1013904223;
and.b32 %r951, %r950, 16777215;
cvt.rn.f32.u32 %f818, %r951;
mul.f32 %f819, %f818, 0f33800000;
fma.rn.f32 %f820, %f819, 0f40000000, 0fBF800000;
mad.lo.s32 %r55, %r950, 1664525, 1013904223;
and.b32 %r952, %r55, 16777215;
cvt.rn.f32.u32 %f821, %r952;
mul.f32 %f822, %f821, 0f33800000;
fma.rn.f32 %f823, %f822, 0f40000000, 0fBF800000;
mul.f32 %f824, %f19, %f823;
mul.f32 %f825, %f20, %f823;
mul.f32 %f826, %f21, %f823;
fma.rn.f32 %f827, %f22, %f820, %f824;
fma.rn.f32 %f828, %f23, %f820, %f825;
fma.rn.f32 %f829, %f24, %f820, %f826;
mul.f32 %f830, %f828, %f828;
fma.rn.f32 %f831, %f827, %f827, %f830;
fma.rn.f32 %f832, %f829, %f829, %f831;
sqrt.rn.f32 %f833, %f832;
rcp.rn.f32 %f834, %f833;
mul.f32 %f835, %f827, %f834;
mul.f32 %f836, %f828, %f834;
mul.f32 %f837, %f829, %f834;
mul.f32 %f838, %f1707, %f837;
mul.f32 %f839, %f1708, %f836;
sub.f32 %f840, %f838, %f839;
mul.f32 %f841, %f1708, %f835;
mul.f32 %f842, %f1706, %f837;
sub.f32 %f843, %f841, %f842;
mul.f32 %f844, %f1706, %f836;
mul.f32 %f845, %f1707, %f835;
sub.f32 %f846, %f844, %f845;
mul.f32 %f847, %f835, 0fBF61E1E3;
mul.f32 %f848, %f836, 0fBF61E1E3;
mul.f32 %f849, %f837, 0fBF61E1E3;
fma.rn.f32 %f850, %f25, %f847, %f16;
fma.rn.f32 %f851, %f25, %f848, %f17;
fma.rn.f32 %f852, %f25, %f849, %f18;
mul.f32 %f853, %f840, 0fBE24A490;
mul.f32 %f854, %f843, 0fBE24A490;
mul.f32 %f855, %f846, 0fBE24A490;
fma.rn.f32 %f131, %f25, %f853, %f850;
fma.rn.f32 %f132, %f25, %f854, %f851;
fma.rn.f32 %f133, %f25, %f855, %f852;
sub.f32 %f856, %f131, %f16;
sub.f32 %f857, %f132, %f17;
sub.f32 %f858, %f133, %f18;
mul.f32 %f859, %f857, %f857;
fma.rn.f32 %f860, %f856, %f856, %f859;
fma.rn.f32 %f861, %f858, %f858, %f860;
sqrt.rn.f32 %f816, %f861;
rcp.rn.f32 %f862, %f816;
mul.f32 %f812, %f862, %f856;
mul.f32 %f813, %f862, %f857;
mul.f32 %f814, %f862, %f858;
mov.f32 %f817, 0f00000000;
// begin inline asm
call(%r879,%r880,%r881,%r882,%r883,%r884,%r885,%r886,%r887,%r888,%r889,%r890,%r891,%r892,%r893,%r894,%r895,%r896,%r897,%r898,%r899,%r900,%r901,%r902,%r903,%r904,%r905,%r906,%r907,%r908,%r909,%r910),_optix_trace_typed_32,(%r804,%rd4,%f16,%f17,%f18,%f812,%f813,%f814,%f432,%f816,%f817,%r771,%r804,%r771,%r770,%r771,%r772,%r775,%r775,%r775,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804,%r804);
// end inline asm
mov.b32 %f863, %r879;
mov.b32 %f864, %r880;
mov.b32 %f865, %r881;
setp.neu.f32 %p89, %f863, 0f3F800000;
setp.neu.f32 %p90, %f864, 0f3F800000;
or.pred %p91, %p89, %p90;
setp.neu.f32 %p92, %f865, 0f3F800000;
or.pred %p93, %p92, %p91;
@%p93 bra $L__BB0_46;
mov.f32 %f873, 0f6C4ECB8F;
mov.u32 %r989, 2;
mov.u32 %r990, 1;
mov.u32 %r991, 3;
mov.u32 %r994, 1065353216;
mov.u32 %r1023, 0;
// begin inline asm
call(%r953,%r954,%r955,%r956,%r957,%r958,%r959,%r960,%r961,%r962,%r963,%r964,%r965,%r966,%r967,%r968,%r969,%r970,%r971,%r972,%r973,%r974,%r975,%r976,%r977,%r978,%r979,%r980,%r981,%r982,%r983,%r984),_optix_trace_typed_32,(%r1023,%rd4,%f131,%f132,%f133,%f72,%f73,%f74,%f432,%f873,%f817,%r990,%r1023,%r990,%r989,%r990,%r991,%r994,%r994,%r994,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023,%r1023);
// end inline asm
mov.b32 %f875, %r953;
mov.b32 %f876, %r954;
mov.b32 %f877, %r955;
add.f32 %f1723, %f1723, %f875;
add.f32 %f1724, %f1724, %f876;
add.f32 %f1725, %f1725, %f877;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_46:
mad.lo.s32 %r1095, %r55, 1664525, 1013904223;
and.b32 %r1096, %r1095, 16777215;
cvt.rn.f32.u32 %f887, %r1096;
mul.f32 %f888, %f887, 0f33800000;
fma.rn.f32 %f889, %f888, 0f40000000, 0fBF800000;
mad.lo.s32 %r56, %r1095, 1664525, 1013904223;
and.b32 %r1097, %r56, 16777215;
cvt.rn.f32.u32 %f890, %r1097;
mul.f32 %f891, %f890, 0f33800000;
fma.rn.f32 %f892, %f891, 0f40000000, 0fBF800000;
mul.f32 %f893, %f19, %f892;
mul.f32 %f894, %f20, %f892;
mul.f32 %f895, %f21, %f892;
fma.rn.f32 %f896, %f22, %f889, %f893;
fma.rn.f32 %f897, %f23, %f889, %f894;
fma.rn.f32 %f898, %f24, %f889, %f895;
mul.f32 %f899, %f897, %f897;
fma.rn.f32 %f900, %f896, %f896, %f899;
fma.rn.f32 %f901, %f898, %f898, %f900;
sqrt.rn.f32 %f902, %f901;
rcp.rn.f32 %f903, %f902;
mul.f32 %f904, %f896, %f903;
mul.f32 %f905, %f897, %f903;
mul.f32 %f906, %f898, %f903;
mul.f32 %f907, %f1707, %f906;
mul.f32 %f908, %f1708, %f905;
sub.f32 %f909, %f907, %f908;
mul.f32 %f910, %f1708, %f904;
mul.f32 %f911, %f1706, %f906;
sub.f32 %f912, %f910, %f911;
mul.f32 %f913, %f1706, %f905;
mul.f32 %f914, %f1707, %f904;
sub.f32 %f915, %f913, %f914;
mul.f32 %f916, %f904, 0f3ECACABC;
mul.f32 %f917, %f905, 0f3ECACABC;
mul.f32 %f918, %f906, 0f3ECACABC;
fma.rn.f32 %f919, %f25, %f916, %f16;
fma.rn.f32 %f920, %f25, %f917, %f17;
fma.rn.f32 %f921, %f25, %f918, %f18;
mul.f32 %f922, %f909, 0f3F61E1D2;
mul.f32 %f923, %f912, 0f3F61E1D2;
mul.f32 %f924, %f915, 0f3F61E1D2;
fma.rn.f32 %f142, %f25, %f922, %f919;
fma.rn.f32 %f143, %f25, %f923, %f920;
fma.rn.f32 %f144, %f25, %f924, %f921;
sub.f32 %f925, %f142, %f16;
sub.f32 %f926, %f143, %f17;
sub.f32 %f927, %f144, %f18;
mul.f32 %f928, %f926, %f926;
fma.rn.f32 %f929, %f925, %f925, %f928;
fma.rn.f32 %f930, %f927, %f927, %f929;
sqrt.rn.f32 %f885, %f930;
rcp.rn.f32 %f931, %f885;
mul.f32 %f881, %f931, %f925;
mul.f32 %f882, %f931, %f926;
mul.f32 %f883, %f931, %f927;
mov.u32 %r1060, 2;
mov.u32 %r1061, 1;
mov.u32 %r1062, 3;
mov.u32 %r1065, 1065353216;
mov.u32 %r1094, 0;
// begin inline asm
call(%r1024,%r1025,%r1026,%r1027,%r1028,%r1029,%r1030,%r1031,%r1032,%r1033,%r1034,%r1035,%r1036,%r1037,%r1038,%r1039,%r1040,%r1041,%r1042,%r1043,%r1044,%r1045,%r1046,%r1047,%r1048,%r1049,%r1050,%r1051,%r1052,%r1053,%r1054,%r1055),_optix_trace_typed_32,(%r1094,%rd4,%f16,%f17,%f18,%f881,%f882,%f883,%f432,%f885,%f817,%r1061,%r1094,%r1061,%r1060,%r1061,%r1062,%r1065,%r1065,%r1065,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094);
// end inline asm
mov.b32 %f932, %r1024;
mov.b32 %f933, %r1025;
mov.b32 %f934, %r1026;
setp.neu.f32 %p94, %f932, 0f3F800000;
setp.neu.f32 %p95, %f933, 0f3F800000;
or.pred %p96, %p94, %p95;
setp.neu.f32 %p97, %f934, 0f3F800000;
or.pred %p98, %p97, %p96;
@%p98 bra $L__BB0_48;
mov.f32 %f942, 0f6C4ECB8F;
mov.f32 %f943, 0f00000000;
// begin inline asm
call(%r1098,%r1099,%r1100,%r1101,%r1102,%r1103,%r1104,%r1105,%r1106,%r1107,%r1108,%r1109,%r1110,%r1111,%r1112,%r1113,%r1114,%r1115,%r1116,%r1117,%r1118,%r1119,%r1120,%r1121,%r1122,%r1123,%r1124,%r1125,%r1126,%r1127,%r1128,%r1129),_optix_trace_typed_32,(%r1094,%rd4,%f142,%f143,%f144,%f72,%f73,%f74,%f432,%f942,%f943,%r1061,%r1094,%r1061,%r1060,%r1061,%r1062,%r1065,%r1065,%r1065,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094);
// end inline asm
mov.b32 %f944, %r1098;
mov.b32 %f945, %r1099;
mov.b32 %f946, %r1100;
add.f32 %f1723, %f1723, %f944;
add.f32 %f1724, %f1724, %f945;
add.f32 %f1725, %f1725, %f946;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_48:
mad.lo.s32 %r1240, %r56, 1664525, 1013904223;
and.b32 %r1241, %r1240, 16777215;
cvt.rn.f32.u32 %f956, %r1241;
mul.f32 %f957, %f956, 0f33800000;
fma.rn.f32 %f958, %f957, 0f40000000, 0fBF800000;
mad.lo.s32 %r1538, %r1240, 1664525, 1013904223;
and.b32 %r1242, %r1538, 16777215;
cvt.rn.f32.u32 %f959, %r1242;
mul.f32 %f960, %f959, 0f33800000;
fma.rn.f32 %f961, %f960, 0f40000000, 0fBF800000;
mul.f32 %f962, %f19, %f961;
mul.f32 %f963, %f20, %f961;
mul.f32 %f964, %f21, %f961;
fma.rn.f32 %f965, %f22, %f958, %f962;
fma.rn.f32 %f966, %f23, %f958, %f963;
fma.rn.f32 %f967, %f24, %f958, %f964;
mul.f32 %f968, %f966, %f966;
fma.rn.f32 %f969, %f965, %f965, %f968;
fma.rn.f32 %f970, %f967, %f967, %f969;
sqrt.rn.f32 %f971, %f970;
rcp.rn.f32 %f972, %f971;
mul.f32 %f973, %f965, %f972;
mul.f32 %f974, %f966, %f972;
mul.f32 %f975, %f967, %f972;
mul.f32 %f976, %f1707, %f975;
mul.f32 %f977, %f1708, %f974;
sub.f32 %f978, %f976, %f977;
mul.f32 %f979, %f1708, %f973;
mul.f32 %f980, %f1706, %f975;
sub.f32 %f981, %f979, %f980;
mul.f32 %f982, %f1706, %f974;
mul.f32 %f983, %f1707, %f973;
sub.f32 %f984, %f982, %f983;
mul.f32 %f985, %f973, 0f3F61E1D2;
mul.f32 %f986, %f974, 0f3F61E1D2;
mul.f32 %f987, %f975, 0f3F61E1D2;
fma.rn.f32 %f988, %f25, %f985, %f16;
fma.rn.f32 %f989, %f25, %f986, %f17;
fma.rn.f32 %f990, %f25, %f987, %f18;
mul.f32 %f991, %f978, 0fBF61E1E3;
mul.f32 %f992, %f981, 0fBF61E1E3;
mul.f32 %f993, %f984, 0fBF61E1E3;
fma.rn.f32 %f153, %f25, %f991, %f988;
fma.rn.f32 %f154, %f25, %f992, %f989;
fma.rn.f32 %f155, %f25, %f993, %f990;
sub.f32 %f994, %f153, %f16;
sub.f32 %f995, %f154, %f17;
sub.f32 %f996, %f155, %f18;
mul.f32 %f997, %f995, %f995;
fma.rn.f32 %f998, %f994, %f994, %f997;
fma.rn.f32 %f999, %f996, %f996, %f998;
sqrt.rn.f32 %f954, %f999;
rcp.rn.f32 %f1000, %f954;
mul.f32 %f950, %f1000, %f994;
mul.f32 %f951, %f1000, %f995;
mul.f32 %f952, %f1000, %f996;
mov.f32 %f955, 0f00000000;
// begin inline asm
call(%r1169,%r1170,%r1171,%r1172,%r1173,%r1174,%r1175,%r1176,%r1177,%r1178,%r1179,%r1180,%r1181,%r1182,%r1183,%r1184,%r1185,%r1186,%r1187,%r1188,%r1189,%r1190,%r1191,%r1192,%r1193,%r1194,%r1195,%r1196,%r1197,%r1198,%r1199,%r1200),_optix_trace_typed_32,(%r1094,%rd4,%f16,%f17,%f18,%f950,%f951,%f952,%f432,%f954,%f955,%r1061,%r1094,%r1061,%r1060,%r1061,%r1062,%r1065,%r1065,%r1065,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094,%r1094);
// end inline asm
mov.b32 %f1001, %r1169;
mov.b32 %f1002, %r1170;
mov.b32 %f1003, %r1171;
setp.neu.f32 %p99, %f1001, 0f3F800000;
setp.neu.f32 %p100, %f1002, 0f3F800000;
or.pred %p101, %p99, %p100;
setp.neu.f32 %p102, %f1003, 0f3F800000;
or.pred %p103, %p102, %p101;
@%p103 bra $L__BB0_50;
mov.f32 %f1011, 0f6C4ECB8F;
mov.u32 %r1279, 2;
mov.u32 %r1280, 1;
mov.u32 %r1281, 3;
mov.u32 %r1284, 1065353216;
mov.u32 %r1313, 0;
// begin inline asm
call(%r1243,%r1244,%r1245,%r1246,%r1247,%r1248,%r1249,%r1250,%r1251,%r1252,%r1253,%r1254,%r1255,%r1256,%r1257,%r1258,%r1259,%r1260,%r1261,%r1262,%r1263,%r1264,%r1265,%r1266,%r1267,%r1268,%r1269,%r1270,%r1271,%r1272,%r1273,%r1274),_optix_trace_typed_32,(%r1313,%rd4,%f153,%f154,%f155,%f72,%f73,%f74,%f432,%f1011,%f955,%r1280,%r1313,%r1280,%r1279,%r1280,%r1281,%r1284,%r1284,%r1284,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313,%r1313);
// end inline asm
mov.b32 %f1013, %r1243;
mov.b32 %f1014, %r1244;
mov.b32 %f1015, %r1245;
add.f32 %f1723, %f1723, %f1013;
add.f32 %f1724, %f1724, %f1014;
add.f32 %f1725, %f1725, %f1015;
add.f32 %f1726, %f1726, 0f3F800000;
mov.u16 %rs102, 1;
$L__BB0_50:
setp.ne.s16 %p104, %rs102, 0;
@%p104 bra $L__BB0_52;
mov.f32 %f1023, 0f6C4ECB8F;
mov.f32 %f1024, 0f00000000;
mov.u32 %r1350, 2;
mov.u32 %r1351, 1;
mov.u32 %r1352, 3;
mov.u32 %r1355, 1065353216;
mov.u32 %r1384, 0;
// begin inline asm
call(%r1314,%r1315,%r1316,%r1317,%r1318,%r1319,%r1320,%r1321,%r1322,%r1323,%r1324,%r1325,%r1326,%r1327,%r1328,%r1329,%r1330,%r1331,%r1332,%r1333,%r1334,%r1335,%r1336,%r1337,%r1338,%r1339,%r1340,%r1341,%r1342,%r1343,%r1344,%r1345),_optix_trace_typed_32,(%r1384,%rd4,%f16,%f17,%f18,%f72,%f73,%f74,%f432,%f1023,%f1024,%r1351,%r1384,%r1351,%r1350,%r1351,%r1352,%r1355,%r1355,%r1355,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384,%r1384);
// end inline asm
mov.b32 %f1025, %r1314;
mov.b32 %f1026, %r1315;
mov.b32 %f1027, %r1316;
add.f32 %f1723, %f1723, %f1025;
add.f32 %f1724, %f1724, %f1026;
add.f32 %f1725, %f1725, %f1027;
add.f32 %f1726, %f1726, 0f3F800000;
$L__BB0_52:
add.s32 %r1537, %r1537, 1;
setp.lt.s32 %p105, %r1537, %r9;
@%p105 bra $L__BB0_10;
add.s32 %r1535, %r1535, 1;
setp.lt.s32 %p106, %r1535, %r9;
@%p106 bra $L__BB0_9;
$L__BB0_54:
setp.eq.s32 %p107, %r9, 0;
mov.f32 %f1763, 0f3F800000;
mov.f32 %f1764, %f1763;
mov.f32 %f1765, %f1763;
@%p107 bra $L__BB0_56;
mov.f32 %f1031, 0f3F800000;
max.f32 %f1032, %f1726, %f1031;
rcp.rn.f32 %f1033, %f1032;
mul.f32 %f1763, %f1723, %f1033;
mul.f32 %f1764, %f1724, %f1033;
mul.f32 %f1765, %f1725, %f1033;
$L__BB0_56:
ld.const.u32 %r1534, [params+544];
ld.const.f32 %f1034, [params+524];
mul.f32 %f1035, %f1763, %f1034;
ld.const.v2.f32 {%f1036, %f1037}, [params+528];
mul.f32 %f1040, %f1764, %f1036;
mul.f32 %f1041, %f1765, %f1037;
cvt.sat.f32.f32 %f1042, %f15;
mul.f32 %f1043, %f1035, %f1042;
mul.f32 %f1044, %f1040, %f1042;
mul.f32 %f1045, %f1041, %f1042;
setp.eq.s32 %p108, %r1534, 0;
selp.f32 %f182, %f1043, %f1035, %p108;
selp.f32 %f183, %f1044, %f1040, %p108;
selp.f32 %f184, %f1045, %f1041, %p108;
ld.const.u32 %r60, [params+104];
and.b32 %r1385, %r60, 8;
setp.eq.s32 %p109, %r1385, 0;
@%p109 bra $L__BB0_70;
ld.const.u64 %rd79, [params+192];
cvta.to.global.u64 %rd16, %rd79;
ld.const.u32 %r1386, [params+184];
mad.lo.s32 %r1387, %r1386, %r6, %r5;
cvt.u64.u32 %rd17, %r1387;
mov.f32 %f1047, 0f3E68BA2E;
cvt.rzi.f32.f32 %f1048, %f1047;
add.f32 %f1049, %f1048, %f1048;
mov.f32 %f1050, 0f3EE8BA2E;
sub.f32 %f1051, %f1050, %f1049;
abs.f32 %f185, %f1051;
abs.f32 %f186, %f1763;
setp.lt.f32 %p110, %f186, 0f00800000;
mul.f32 %f1052, %f186, 0f4B800000;
selp.f32 %f1053, %f1052, %f186, %p110;
selp.f32 %f1054, 0fC3170000, 0fC2FE0000, %p110;
mov.b32 %r1388, %f1053;
and.b32 %r1389, %r1388, 8388607;
or.b32 %r1390, %r1389, 1065353216;
mov.b32 %f1055, %r1390;
shr.u32 %r1391, %r1388, 23;
cvt.rn.f32.u32 %f1056, %r1391;
add.f32 %f1057, %f1054, %f1056;
setp.gt.f32 %p111, %f1055, 0f3FB504F3;
mul.f32 %f1058, %f1055, 0f3F000000;
add.f32 %f1059, %f1057, 0f3F800000;
selp.f32 %f1060, %f1059, %f1057, %p111;
selp.f32 %f1061, %f1058, %f1055, %p111;
add.f32 %f1062, %f1061, 0fBF800000;
add.f32 %f1063, %f1061, 0f3F800000;
rcp.approx.ftz.f32 %f1064, %f1063;
add.f32 %f1065, %f1062, %f1062;
mul.f32 %f1066, %f1065, %f1064;
mul.f32 %f1067, %f1066, %f1066;
mov.f32 %f1068, 0f3C4CAF63;
mov.f32 %f1069, 0f3B18F0FE;
fma.rn.f32 %f1070, %f1069, %f1067, %f1068;
mov.f32 %f1071, 0f3DAAAABD;
fma.rn.f32 %f1072, %f1070, %f1067, %f1071;
mul.rn.f32 %f1073, %f1072, %f1067;
mul.rn.f32 %f1074, %f1073, %f1066;
sub.f32 %f1075, %f1062, %f1066;
add.f32 %f1076, %f1075, %f1075;
neg.f32 %f1077, %f1066;
fma.rn.f32 %f1078, %f1077, %f1062, %f1076;
mul.rn.f32 %f1079, %f1064, %f1078;
add.f32 %f1080, %f1074, %f1066;
sub.f32 %f1081, %f1066, %f1080;
add.f32 %f1082, %f1074, %f1081;
add.f32 %f1083, %f1079, %f1082;
add.f32 %f1084, %f1080, %f1083;
sub.f32 %f1085, %f1080, %f1084;
add.f32 %f1086, %f1083, %f1085;
mov.f32 %f1087, 0f3F317200;
mul.rn.f32 %f1088, %f1060, %f1087;
mov.f32 %f1089, 0f35BFBE8E;
mul.rn.f32 %f1090, %f1060, %f1089;
add.f32 %f1091, %f1088, %f1084;
sub.f32 %f1092, %f1088, %f1091;
add.f32 %f1093, %f1084, %f1092;
add.f32 %f1094, %f1086, %f1093;
add.f32 %f1095, %f1090, %f1094;
add.f32 %f1096, %f1091, %f1095;
sub.f32 %f1097, %f1091, %f1096;
add.f32 %f1098, %f1095, %f1097;
mul.rn.f32 %f1099, %f1050, %f1096;
neg.f32 %f1100, %f1099;
fma.rn.f32 %f1101, %f1050, %f1096, %f1100;
fma.rn.f32 %f1102, %f1050, %f1098, %f1101;
mov.f32 %f1103, 0f00000000;
fma.rn.f32 %f1104, %f1103, %f1096, %f1102;
add.rn.f32 %f1105, %f1099, %f1104;
neg.f32 %f1106, %f1105;
add.rn.f32 %f1107, %f1099, %f1106;
add.rn.f32 %f1108, %f1107, %f1104;
mov.b32 %r1392, %f1105;
setp.eq.s32 %p112, %r1392, 1118925336;
add.s32 %r1393, %r1392, -1;
mov.b32 %f1109, %r1393;
add.f32 %f1110, %f1108, 0f37000000;
selp.f32 %f187, %f1110, %f1108, %p112;
selp.f32 %f1111, %f1109, %f1105, %p112;
mov.f32 %f1112, 0f3FB8AA3B;
mul.rn.f32 %f1113, %f1111, %f1112;
cvt.rzi.f32.f32 %f1114, %f1113;
abs.f32 %f1115, %f1114;
setp.gt.f32 %p113, %f1115, 0f42FC0000;
mov.b32 %r1394, %f1114;
and.b32 %r1395, %r1394, -2147483648;
or.b32 %r1396, %r1395, 1123811328;
mov.b32 %f1116, %r1396;
selp.f32 %f1117, %f1116, %f1114, %p113;
mov.f32 %f1118, 0fBF317218;
fma.rn.f32 %f1119, %f1117, %f1118, %f1111;
mov.f32 %f1120, 0f3102E308;
fma.rn.f32 %f1121, %f1117, %f1120, %f1119;
mul.f32 %f1122, %f1121, 0f3FB8AA3B;
add.f32 %f1123, %f1117, 0f4B40007F;
mov.b32 %r1397, %f1123;
shl.b32 %r1398, %r1397, 23;
mov.b32 %f1124, %r1398;
ex2.approx.ftz.f32 %f1125, %f1122;
mul.f32 %f188, %f1125, %f1124;
setp.eq.f32 %p114, %f188, 0f7F800000;
mov.f32 %f1766, 0f7F800000;
@%p114 bra $L__BB0_59;
fma.rn.f32 %f1766, %f188, %f187, %f188;
$L__BB0_59:
setp.lt.f32 %p115, %f1763, 0f00000000;
setp.eq.f32 %p116, %f185, 0f3F800000;
and.pred %p1, %p115, %p116;
setp.eq.f32 %p117, %f1763, 0f00000000;
@%p117 bra $L__BB0_63;
bra.uni $L__BB0_60;
$L__BB0_63:
add.f32 %f1130, %f1763, %f1763;
selp.f32 %f1768, %f1130, 0f00000000, %p116;
bra.uni $L__BB0_64;
$L__BB0_167:
mov.f32 %f1704, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs96, %f1704;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs95, %f1704;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs94, %f1704;}
// end inline asm
mov.u16 %rs97, 0;
st.global.v4.u16 [%rd22], {%rs94, %rs95, %rs96, %rs97};
$L__BB0_168:
and.b32 %r1531, %r61, 64;
setp.eq.s32 %p240, %r1531, 0;
@%p240 bra $L__BB0_170;
ld.const.u64 %rd118, [params+208];
cvta.to.global.u64 %rd119, %rd118;
ld.const.u32 %r1532, [params+200];
mad.lo.s32 %r1533, %r1532, %r6, %r5;
mul.wide.u32 %rd120, %r1533, 4;
add.s64 %rd121, %rd119, %rd120;
mov.u16 %rs98, 0;
st.global.v4.u8 [%rd121], {%rs98, %rs98, %rs98, %rs98};
bra.uni $L__BB0_170;
$L__BB0_60:
mov.b32 %r1399, %f1766;
xor.b32 %r1400, %r1399, -2147483648;
mov.b32 %f1126, %r1400;
selp.f32 %f1768, %f1126, %f1766, %p1;
setp.geu.f32 %p118, %f1763, 0f00000000;
@%p118 bra $L__BB0_64;
mov.f32 %f1127, 0f3EE8BA2E;
cvt.rzi.f32.f32 %f1128, %f1127;
setp.eq.f32 %p119, %f1128, 0f3EE8BA2E;
@%p119 bra $L__BB0_64;
mov.f32 %f1768, 0f7FFFFFFF;
$L__BB0_64:
add.f32 %f1131, %f186, 0f3EE8BA2E;
mov.b32 %r1401, %f1131;
setp.lt.s32 %p121, %r1401, 2139095040;
@%p121 bra $L__BB0_69;
setp.gtu.f32 %p122, %f186, 0f7F800000;
@%p122 bra $L__BB0_68;
bra.uni $L__BB0_66;
$L__BB0_68:
add.f32 %f1768, %f1763, 0f3EE8BA2E;
bra.uni $L__BB0_69;
$L__BB0_66:
setp.neu.f32 %p123, %f186, 0f7F800000;
@%p123 bra $L__BB0_69;
selp.f32 %f1768, 0fFF800000, 0f7F800000, %p1;
$L__BB0_69:
mul.f32 %f1132, %f1768, 0f437F0000;
setp.eq.f32 %p124, %f1763, 0f3F800000;
selp.f32 %f1133, 0f437F0000, %f1132, %p124;
cvt.rzi.u32.f32 %r1402, %f1133;
shl.b64 %rd80, %rd17, 1;
add.s64 %rd81, %rd16, %rd80;
cvt.u16.u32 %rs34, %r1402;
mov.u16 %rs35, 255;
st.global.v2.u8 [%rd81], {%rs34, %rs35};
$L__BB0_70:
and.b32 %r1403, %r60, 1;
setp.eq.b32 %p125, %r1403, 1;
mov.pred %p126, 0;
xor.pred %p127, %p125, %p126;
not.pred %p128, %p127;
@%p128 bra $L__BB0_144;
mov.f32 %f1135, 0f3E666666;
cvt.rzi.f32.f32 %f1136, %f1135;
add.f32 %f1137, %f1136, %f1136;
mov.f32 %f1138, 0f3EE66666;
sub.f32 %f1139, %f1138, %f1137;
abs.f32 %f197, %f1139;
abs.f32 %f198, %f182;
setp.lt.f32 %p129, %f198, 0f00800000;
mul.f32 %f1140, %f198, 0f4B800000;
selp.f32 %f1141, %f1140, %f198, %p129;
selp.f32 %f1142, 0fC3170000, 0fC2FE0000, %p129;
mov.b32 %r1404, %f1141;
and.b32 %r1405, %r1404, 8388607;
or.b32 %r1406, %r1405, 1065353216;
mov.b32 %f1143, %r1406;
shr.u32 %r1407, %r1404, 23;
cvt.rn.f32.u32 %f1144, %r1407;
add.f32 %f1145, %f1142, %f1144;
setp.gt.f32 %p130, %f1143, 0f3FB504F3;
mul.f32 %f1146, %f1143, 0f3F000000;
add.f32 %f1147, %f1145, 0f3F800000;
selp.f32 %f1148, %f1147, %f1145, %p130;
selp.f32 %f1149, %f1146, %f1143, %p130;
add.f32 %f1150, %f1149, 0fBF800000;
add.f32 %f1151, %f1149, 0f3F800000;
rcp.approx.ftz.f32 %f1152, %f1151;
add.f32 %f1153, %f1150, %f1150;
mul.f32 %f1154, %f1153, %f1152;
mul.f32 %f1155, %f1154, %f1154;
mov.f32 %f1156, 0f3C4CAF63;
mov.f32 %f1157, 0f3B18F0FE;
fma.rn.f32 %f1158, %f1157, %f1155, %f1156;
mov.f32 %f1159, 0f3DAAAABD;
fma.rn.f32 %f1160, %f1158, %f1155, %f1159;
mul.rn.f32 %f1161, %f1160, %f1155;
mul.rn.f32 %f1162, %f1161, %f1154;
sub.f32 %f1163, %f1150, %f1154;
add.f32 %f1164, %f1163, %f1163;
neg.f32 %f1165, %f1154;
fma.rn.f32 %f1166, %f1165, %f1150, %f1164;
mul.rn.f32 %f1167, %f1152, %f1166;
add.f32 %f1168, %f1162, %f1154;
sub.f32 %f1169, %f1154, %f1168;
add.f32 %f1170, %f1162, %f1169;
add.f32 %f1171, %f1167, %f1170;
add.f32 %f1172, %f1168, %f1171;
sub.f32 %f1173, %f1168, %f1172;
add.f32 %f1174, %f1171, %f1173;
mov.f32 %f1175, 0f3F317200;
mul.rn.f32 %f1176, %f1148, %f1175;
mov.f32 %f1177, 0f35BFBE8E;
mul.rn.f32 %f1178, %f1148, %f1177;
add.f32 %f1179, %f1176, %f1172;
sub.f32 %f1180, %f1176, %f1179;
add.f32 %f1181, %f1172, %f1180;
add.f32 %f1182, %f1174, %f1181;
add.f32 %f1183, %f1178, %f1182;
add.f32 %f1184, %f1179, %f1183;
sub.f32 %f1185, %f1179, %f1184;
add.f32 %f1186, %f1183, %f1185;
mul.rn.f32 %f1187, %f1138, %f1184;
neg.f32 %f1188, %f1187;
fma.rn.f32 %f1189, %f1138, %f1184, %f1188;
fma.rn.f32 %f1190, %f1138, %f1186, %f1189;
mov.f32 %f1191, 0f00000000;
fma.rn.f32 %f1192, %f1191, %f1184, %f1190;
add.rn.f32 %f1193, %f1187, %f1192;
neg.f32 %f1194, %f1193;
add.rn.f32 %f1195, %f1187, %f1194;
add.rn.f32 %f1196, %f1195, %f1192;
mov.b32 %r1408, %f1193;
setp.eq.s32 %p131, %r1408, 1118925336;
add.s32 %r1409, %r1408, -1;
mov.b32 %f1197, %r1409;
add.f32 %f1198, %f1196, 0f37000000;
selp.f32 %f199, %f1198, %f1196, %p131;
selp.f32 %f1199, %f1197, %f1193, %p131;
mov.f32 %f1200, 0f3FB8AA3B;
mul.rn.f32 %f1201, %f1199, %f1200;
cvt.rzi.f32.f32 %f1202, %f1201;
abs.f32 %f1203, %f1202;
setp.gt.f32 %p132, %f1203, 0f42FC0000;
mov.b32 %r1410, %f1202;
and.b32 %r1411, %r1410, -2147483648;
or.b32 %r1412, %r1411, 1123811328;
mov.b32 %f1204, %r1412;
selp.f32 %f1205, %f1204, %f1202, %p132;
mov.f32 %f1206, 0fBF317218;
fma.rn.f32 %f1207, %f1205, %f1206, %f1199;
mov.f32 %f1208, 0f3102E308;
fma.rn.f32 %f1209, %f1205, %f1208, %f1207;
mul.f32 %f1210, %f1209, 0f3FB8AA3B;
add.f32 %f1211, %f1205, 0f4B40007F;
mov.b32 %r1413, %f1211;
shl.b32 %r1414, %r1413, 23;
mov.b32 %f1212, %r1414;
ex2.approx.ftz.f32 %f1213, %f1210;
mul.f32 %f200, %f1213, %f1212;
setp.eq.f32 %p133, %f200, 0f7F800000;
mov.f32 %f1769, 0f7F800000;
@%p133 bra $L__BB0_73;
fma.rn.f32 %f1769, %f200, %f199, %f200;
$L__BB0_73:
setp.lt.f32 %p134, %f182, 0f00000000;
setp.eq.f32 %p135, %f197, 0f3F800000;
and.pred %p2, %p134, %p135;
setp.eq.f32 %p136, %f182, 0f00000000;
@%p136 bra $L__BB0_77;
bra.uni $L__BB0_74;
$L__BB0_77:
add.f32 %f1218, %f182, %f182;
selp.f32 %f1771, %f1218, 0f00000000, %p135;
bra.uni $L__BB0_78;
$L__BB0_74:
mov.b32 %r1415, %f1769;
xor.b32 %r1416, %r1415, -2147483648;
mov.b32 %f1214, %r1416;
selp.f32 %f1771, %f1214, %f1769, %p2;
setp.geu.f32 %p137, %f182, 0f00000000;
@%p137 bra $L__BB0_78;
mov.f32 %f1215, 0f3EE66666;
cvt.rzi.f32.f32 %f1216, %f1215;
setp.eq.f32 %p138, %f1216, 0f3EE66666;
@%p138 bra $L__BB0_78;
mov.f32 %f1771, 0f7FFFFFFF;
$L__BB0_78:
add.f32 %f1219, %f198, 0f3EE66666;
mov.b32 %r1417, %f1219;
setp.lt.s32 %p140, %r1417, 2139095040;
@%p140 bra $L__BB0_83;
setp.gtu.f32 %p141, %f198, 0f7F800000;
@%p141 bra $L__BB0_82;
bra.uni $L__BB0_80;
$L__BB0_82:
add.f32 %f1771, %f182, 0f3EE66666;
bra.uni $L__BB0_83;
$L__BB0_80:
setp.neu.f32 %p142, %f198, 0f7F800000;
@%p142 bra $L__BB0_83;
selp.f32 %f1771, 0fFF800000, 0f7F800000, %p2;
$L__BB0_83:
setp.eq.f32 %p143, %f182, 0f3F800000;
selp.f32 %f209, 0f3F800000, %f1771, %p143;
abs.f32 %f210, %f183;
setp.lt.f32 %p144, %f210, 0f00800000;
mul.f32 %f1221, %f210, 0f4B800000;
selp.f32 %f1222, %f1221, %f210, %p144;
selp.f32 %f1223, 0fC3170000, 0fC2FE0000, %p144;
mov.b32 %r1418, %f1222;
and.b32 %r1419, %r1418, 8388607;
or.b32 %r1420, %r1419, 1065353216;
mov.b32 %f1224, %r1420;
shr.u32 %r1421, %r1418, 23;
cvt.rn.f32.u32 %f1225, %r1421;
add.f32 %f1226, %f1223, %f1225;
setp.gt.f32 %p145, %f1224, 0f3FB504F3;
mul.f32 %f1227, %f1224, 0f3F000000;
add.f32 %f1228, %f1226, 0f3F800000;
selp.f32 %f1229, %f1228, %f1226, %p145;
selp.f32 %f1230, %f1227, %f1224, %p145;
add.f32 %f1231, %f1230, 0fBF800000;
add.f32 %f1232, %f1230, 0f3F800000;
rcp.approx.ftz.f32 %f1233, %f1232;
add.f32 %f1234, %f1231, %f1231;
mul.f32 %f1235, %f1234, %f1233;
mul.f32 %f1236, %f1235, %f1235;
mov.f32 %f1237, 0f3C4CAF63;
mov.f32 %f1238, 0f3B18F0FE;
fma.rn.f32 %f1239, %f1238, %f1236, %f1237;
mov.f32 %f1240, 0f3DAAAABD;
fma.rn.f32 %f1241, %f1239, %f1236, %f1240;
mul.rn.f32 %f1242, %f1241, %f1236;
mul.rn.f32 %f1243, %f1242, %f1235;
sub.f32 %f1244, %f1231, %f1235;
add.f32 %f1245, %f1244, %f1244;
neg.f32 %f1246, %f1235;
fma.rn.f32 %f1247, %f1246, %f1231, %f1245;
mul.rn.f32 %f1248, %f1233, %f1247;
add.f32 %f1249, %f1243, %f1235;
sub.f32 %f1250, %f1235, %f1249;
add.f32 %f1251, %f1243, %f1250;
add.f32 %f1252, %f1248, %f1251;
add.f32 %f1253, %f1249, %f1252;
sub.f32 %f1254, %f1249, %f1253;
add.f32 %f1255, %f1252, %f1254;
mov.f32 %f1256, 0f3F317200;
mul.rn.f32 %f1257, %f1229, %f1256;
mov.f32 %f1258, 0f35BFBE8E;
mul.rn.f32 %f1259, %f1229, %f1258;
add.f32 %f1260, %f1257, %f1253;
sub.f32 %f1261, %f1257, %f1260;
add.f32 %f1262, %f1253, %f1261;
add.f32 %f1263, %f1255, %f1262;
add.f32 %f1264, %f1259, %f1263;
add.f32 %f1265, %f1260, %f1264;
sub.f32 %f1266, %f1260, %f1265;
add.f32 %f1267, %f1264, %f1266;
mov.f32 %f1268, 0f3EE66666;
mul.rn.f32 %f1269, %f1268, %f1265;
neg.f32 %f1270, %f1269;
fma.rn.f32 %f1271, %f1268, %f1265, %f1270;
fma.rn.f32 %f1272, %f1268, %f1267, %f1271;
mov.f32 %f1273, 0f00000000;
fma.rn.f32 %f1274, %f1273, %f1265, %f1272;
add.rn.f32 %f1275, %f1269, %f1274;
neg.f32 %f1276, %f1275;
add.rn.f32 %f1277, %f1269, %f1276;
add.rn.f32 %f1278, %f1277, %f1274;
mov.b32 %r1422, %f1275;
setp.eq.s32 %p146, %r1422, 1118925336;
add.s32 %r1423, %r1422, -1;
mov.b32 %f1279, %r1423;
add.f32 %f1280, %f1278, 0f37000000;
selp.f32 %f211, %f1280, %f1278, %p146;
selp.f32 %f1281, %f1279, %f1275, %p146;
mov.f32 %f1282, 0f3FB8AA3B;
mul.rn.f32 %f1283, %f1281, %f1282;
cvt.rzi.f32.f32 %f1284, %f1283;
abs.f32 %f1285, %f1284;
setp.gt.f32 %p147, %f1285, 0f42FC0000;
mov.b32 %r1424, %f1284;
and.b32 %r1425, %r1424, -2147483648;
or.b32 %r1426, %r1425, 1123811328;
mov.b32 %f1286, %r1426;
selp.f32 %f1287, %f1286, %f1284, %p147;
mov.f32 %f1288, 0fBF317218;
fma.rn.f32 %f1289, %f1287, %f1288, %f1281;
mov.f32 %f1290, 0f3102E308;
fma.rn.f32 %f1291, %f1287, %f1290, %f1289;
mul.f32 %f1292, %f1291, 0f3FB8AA3B;
add.f32 %f1293, %f1287, 0f4B40007F;
mov.b32 %r1427, %f1293;
shl.b32 %r1428, %r1427, 23;
mov.b32 %f1294, %r1428;
ex2.approx.ftz.f32 %f1295, %f1292;
mul.f32 %f212, %f1295, %f1294;
setp.eq.f32 %p148, %f212, 0f7F800000;
mov.f32 %f1772, 0f7F800000;
@%p148 bra $L__BB0_85;
fma.rn.f32 %f1772, %f212, %f211, %f212;
$L__BB0_85:
setp.lt.f32 %p149, %f183, 0f00000000;
and.pred %p3, %p149, %p135;
setp.eq.f32 %p151, %f183, 0f00000000;
@%p151 bra $L__BB0_89;
bra.uni $L__BB0_86;
$L__BB0_89:
add.f32 %f1300, %f183, %f183;
selp.f32 %f1774, %f1300, 0f00000000, %p135;
bra.uni $L__BB0_90;
$L__BB0_86:
mov.b32 %r1429, %f1772;
xor.b32 %r1430, %r1429, -2147483648;
mov.b32 %f1296, %r1430;
selp.f32 %f1774, %f1296, %f1772, %p3;
setp.geu.f32 %p152, %f183, 0f00000000;
@%p152 bra $L__BB0_90;
mov.f32 %f1297, 0f3EE66666;
cvt.rzi.f32.f32 %f1298, %f1297;
setp.eq.f32 %p153, %f1298, 0f3EE66666;
@%p153 bra $L__BB0_90;
mov.f32 %f1774, 0f7FFFFFFF;
$L__BB0_90:
add.f32 %f1301, %f210, 0f3EE66666;
mov.b32 %r1431, %f1301;
setp.lt.s32 %p155, %r1431, 2139095040;
@%p155 bra $L__BB0_95;
setp.gtu.f32 %p156, %f210, 0f7F800000;
@%p156 bra $L__BB0_94;
bra.uni $L__BB0_92;
$L__BB0_94:
add.f32 %f1774, %f183, 0f3EE66666;
bra.uni $L__BB0_95;
$L__BB0_92:
setp.neu.f32 %p157, %f210, 0f7F800000;
@%p157 bra $L__BB0_95;
selp.f32 %f1774, 0fFF800000, 0f7F800000, %p3;
$L__BB0_95:
setp.eq.f32 %p158, %f183, 0f3F800000;
selp.f32 %f221, 0f3F800000, %f1774, %p158;
abs.f32 %f222, %f184;
setp.lt.f32 %p159, %f222, 0f00800000;
mul.f32 %f1303, %f222, 0f4B800000;
selp.f32 %f1304, %f1303, %f222, %p159;
selp.f32 %f1305, 0fC3170000, 0fC2FE0000, %p159;
mov.b32 %r1432, %f1304;
and.b32 %r1433, %r1432, 8388607;
or.b32 %r1434, %r1433, 1065353216;
mov.b32 %f1306, %r1434;
shr.u32 %r1435, %r1432, 23;
cvt.rn.f32.u32 %f1307, %r1435;
add.f32 %f1308, %f1305, %f1307;
setp.gt.f32 %p160, %f1306, 0f3FB504F3;
mul.f32 %f1309, %f1306, 0f3F000000;
add.f32 %f1310, %f1308, 0f3F800000;
selp.f32 %f1311, %f1310, %f1308, %p160;
selp.f32 %f1312, %f1309, %f1306, %p160;
add.f32 %f1313, %f1312, 0fBF800000;
add.f32 %f1314, %f1312, 0f3F800000;
rcp.approx.ftz.f32 %f1315, %f1314;
add.f32 %f1316, %f1313, %f1313;
mul.f32 %f1317, %f1316, %f1315;
mul.f32 %f1318, %f1317, %f1317;
mov.f32 %f1319, 0f3C4CAF63;
mov.f32 %f1320, 0f3B18F0FE;
fma.rn.f32 %f1321, %f1320, %f1318, %f1319;
mov.f32 %f1322, 0f3DAAAABD;
fma.rn.f32 %f1323, %f1321, %f1318, %f1322;
mul.rn.f32 %f1324, %f1323, %f1318;
mul.rn.f32 %f1325, %f1324, %f1317;
sub.f32 %f1326, %f1313, %f1317;
add.f32 %f1327, %f1326, %f1326;
neg.f32 %f1328, %f1317;
fma.rn.f32 %f1329, %f1328, %f1313, %f1327;
mul.rn.f32 %f1330, %f1315, %f1329;
add.f32 %f1331, %f1325, %f1317;
sub.f32 %f1332, %f1317, %f1331;
add.f32 %f1333, %f1325, %f1332;
add.f32 %f1334, %f1330, %f1333;
add.f32 %f1335, %f1331, %f1334;
sub.f32 %f1336, %f1331, %f1335;
add.f32 %f1337, %f1334, %f1336;
mov.f32 %f1338, 0f3F317200;
mul.rn.f32 %f1339, %f1311, %f1338;
mov.f32 %f1340, 0f35BFBE8E;
mul.rn.f32 %f1341, %f1311, %f1340;
add.f32 %f1342, %f1339, %f1335;
sub.f32 %f1343, %f1339, %f1342;
add.f32 %f1344, %f1335, %f1343;
add.f32 %f1345, %f1337, %f1344;
add.f32 %f1346, %f1341, %f1345;
add.f32 %f1347, %f1342, %f1346;
sub.f32 %f1348, %f1342, %f1347;
add.f32 %f1349, %f1346, %f1348;
mov.f32 %f1350, 0f3EE66666;
mul.rn.f32 %f1351, %f1350, %f1347;
neg.f32 %f1352, %f1351;
fma.rn.f32 %f1353, %f1350, %f1347, %f1352;
fma.rn.f32 %f1354, %f1350, %f1349, %f1353;
mov.f32 %f1355, 0f00000000;
fma.rn.f32 %f1356, %f1355, %f1347, %f1354;
add.rn.f32 %f1357, %f1351, %f1356;
neg.f32 %f1358, %f1357;
add.rn.f32 %f1359, %f1351, %f1358;
add.rn.f32 %f1360, %f1359, %f1356;
mov.b32 %r1436, %f1357;
setp.eq.s32 %p161, %r1436, 1118925336;
add.s32 %r1437, %r1436, -1;
mov.b32 %f1361, %r1437;
add.f32 %f1362, %f1360, 0f37000000;
selp.f32 %f223, %f1362, %f1360, %p161;
selp.f32 %f1363, %f1361, %f1357, %p161;
mov.f32 %f1364, 0f3FB8AA3B;
mul.rn.f32 %f1365, %f1363, %f1364;
cvt.rzi.f32.f32 %f1366, %f1365;
abs.f32 %f1367, %f1366;
setp.gt.f32 %p162, %f1367, 0f42FC0000;
mov.b32 %r1438, %f1366;
and.b32 %r1439, %r1438, -2147483648;
or.b32 %r1440, %r1439, 1123811328;
mov.b32 %f1368, %r1440;
selp.f32 %f1369, %f1368, %f1366, %p162;
mov.f32 %f1370, 0fBF317218;
fma.rn.f32 %f1371, %f1369, %f1370, %f1363;
mov.f32 %f1372, 0f3102E308;
fma.rn.f32 %f1373, %f1369, %f1372, %f1371;
mul.f32 %f1374, %f1373, 0f3FB8AA3B;
add.f32 %f1375, %f1369, 0f4B40007F;
mov.b32 %r1441, %f1375;
shl.b32 %r1442, %r1441, 23;
mov.b32 %f1376, %r1442;
ex2.approx.ftz.f32 %f1377, %f1374;
mul.f32 %f224, %f1377, %f1376;
setp.eq.f32 %p163, %f224, 0f7F800000;
mov.f32 %f1775, 0f7F800000;
@%p163 bra $L__BB0_97;
fma.rn.f32 %f1775, %f224, %f223, %f224;
$L__BB0_97:
setp.lt.f32 %p164, %f184, 0f00000000;
and.pred %p4, %p164, %p135;
setp.eq.f32 %p166, %f184, 0f00000000;
@%p166 bra $L__BB0_101;
bra.uni $L__BB0_98;
$L__BB0_101:
add.f32 %f1382, %f184, %f184;
selp.f32 %f1777, %f1382, 0f00000000, %p135;
bra.uni $L__BB0_102;
$L__BB0_98:
mov.b32 %r1443, %f1775;
xor.b32 %r1444, %r1443, -2147483648;
mov.b32 %f1378, %r1444;
selp.f32 %f1777, %f1378, %f1775, %p4;
setp.geu.f32 %p167, %f184, 0f00000000;
@%p167 bra $L__BB0_102;
mov.f32 %f1379, 0f3EE66666;
cvt.rzi.f32.f32 %f1380, %f1379;
setp.eq.f32 %p168, %f1380, 0f3EE66666;
@%p168 bra $L__BB0_102;
mov.f32 %f1777, 0f7FFFFFFF;
$L__BB0_102:
add.f32 %f1383, %f222, 0f3EE66666;
mov.b32 %r1445, %f1383;
setp.lt.s32 %p170, %r1445, 2139095040;
@%p170 bra $L__BB0_107;
setp.gtu.f32 %p171, %f222, 0f7F800000;
@%p171 bra $L__BB0_106;
bra.uni $L__BB0_104;
$L__BB0_106:
add.f32 %f1777, %f184, 0f3EE66666;
bra.uni $L__BB0_107;
$L__BB0_104:
setp.neu.f32 %p172, %f222, 0f7F800000;
@%p172 bra $L__BB0_107;
selp.f32 %f1777, 0fFF800000, 0f7F800000, %p4;
$L__BB0_107:
setp.eq.f32 %p173, %f184, 0f3F800000;
mov.f32 %f1385, 0f3F800000;
selp.f32 %f1386, 0f3F800000, %f1777, %p173;
ld.const.u64 %rd82, [params+144];
cvta.to.global.u64 %rd18, %rd82;
ld.const.u32 %r1446, [params+136];
mad.lo.s32 %r1447, %r1446, %r6, %r5;
cvt.u64.u32 %rd19, %r1447;
min.f32 %f1387, %f209, %f1385;
mov.f32 %f1388, 0f00000000;
max.f32 %f233, %f1388, %f1387;
min.f32 %f1389, %f221, %f1385;
max.f32 %f234, %f1388, %f1389;
min.f32 %f1390, %f1386, %f1385;
max.f32 %f235, %f1388, %f1390;
mov.f32 %f1391, 0f3E555555;
cvt.rzi.f32.f32 %f1392, %f1391;
add.f32 %f1393, %f1392, %f1392;
mov.f32 %f1394, 0f3ED55555;
sub.f32 %f1395, %f1394, %f1393;
abs.f32 %f236, %f1395;
abs.f32 %f237, %f233;
setp.lt.f32 %p174, %f237, 0f00800000;
mul.f32 %f1396, %f237, 0f4B800000;
selp.f32 %f1397, %f1396, %f237, %p174;
selp.f32 %f1398, 0fC3170000, 0fC2FE0000, %p174;
mov.b32 %r1448, %f1397;
and.b32 %r1449, %r1448, 8388607;
or.b32 %r1450, %r1449, 1065353216;
mov.b32 %f1399, %r1450;
shr.u32 %r1451, %r1448, 23;
cvt.rn.f32.u32 %f1400, %r1451;
add.f32 %f1401, %f1398, %f1400;
setp.gt.f32 %p175, %f1399, 0f3FB504F3;
mul.f32 %f1402, %f1399, 0f3F000000;
add.f32 %f1403, %f1401, 0f3F800000;
selp.f32 %f1404, %f1403, %f1401, %p175;
selp.f32 %f1405, %f1402, %f1399, %p175;
add.f32 %f1406, %f1405, 0fBF800000;
add.f32 %f1407, %f1405, 0f3F800000;
rcp.approx.ftz.f32 %f1408, %f1407;
add.f32 %f1409, %f1406, %f1406;
mul.f32 %f1410, %f1409, %f1408;
mul.f32 %f1411, %f1410, %f1410;
mov.f32 %f1412, 0f3C4CAF63;
mov.f32 %f1413, 0f3B18F0FE;
fma.rn.f32 %f1414, %f1413, %f1411, %f1412;
mov.f32 %f1415, 0f3DAAAABD;
fma.rn.f32 %f1416, %f1414, %f1411, %f1415;
mul.rn.f32 %f1417, %f1416, %f1411;
mul.rn.f32 %f1418, %f1417, %f1410;
sub.f32 %f1419, %f1406, %f1410;
add.f32 %f1420, %f1419, %f1419;
neg.f32 %f1421, %f1410;
fma.rn.f32 %f1422, %f1421, %f1406, %f1420;
mul.rn.f32 %f1423, %f1408, %f1422;
add.f32 %f1424, %f1418, %f1410;
sub.f32 %f1425, %f1410, %f1424;
add.f32 %f1426, %f1418, %f1425;
add.f32 %f1427, %f1423, %f1426;
add.f32 %f1428, %f1424, %f1427;
sub.f32 %f1429, %f1424, %f1428;
add.f32 %f1430, %f1427, %f1429;
mov.f32 %f1431, 0f3F317200;
mul.rn.f32 %f1432, %f1404, %f1431;
mov.f32 %f1433, 0f35BFBE8E;
mul.rn.f32 %f1434, %f1404, %f1433;
add.f32 %f1435, %f1432, %f1428;
sub.f32 %f1436, %f1432, %f1435;
add.f32 %f1437, %f1428, %f1436;
add.f32 %f1438, %f1430, %f1437;
add.f32 %f1439, %f1434, %f1438;
add.f32 %f1440, %f1435, %f1439;
sub.f32 %f1441, %f1435, %f1440;
add.f32 %f1442, %f1439, %f1441;
mul.rn.f32 %f1443, %f1394, %f1440;
neg.f32 %f1444, %f1443;
fma.rn.f32 %f1445, %f1394, %f1440, %f1444;
fma.rn.f32 %f1446, %f1394, %f1442, %f1445;
fma.rn.f32 %f1447, %f1388, %f1440, %f1446;
add.rn.f32 %f1448, %f1443, %f1447;
neg.f32 %f1449, %f1448;
add.rn.f32 %f1450, %f1443, %f1449;
add.rn.f32 %f1451, %f1450, %f1447;
mov.b32 %r1452, %f1448;
setp.eq.s32 %p176, %r1452, 1118925336;
add.s32 %r1453, %r1452, -1;
mov.b32 %f1452, %r1453;
add.f32 %f1453, %f1451, 0f37000000;
selp.f32 %f238, %f1453, %f1451, %p176;
selp.f32 %f1454, %f1452, %f1448, %p176;
mov.f32 %f1455, 0f3FB8AA3B;
mul.rn.f32 %f1456, %f1454, %f1455;
cvt.rzi.f32.f32 %f1457, %f1456;
abs.f32 %f1458, %f1457;
setp.gt.f32 %p177, %f1458, 0f42FC0000;
mov.b32 %r1454, %f1457;
and.b32 %r1455, %r1454, -2147483648;
or.b32 %r1456, %r1455, 1123811328;
mov.b32 %f1459, %r1456;
selp.f32 %f1460, %f1459, %f1457, %p177;
mov.f32 %f1461, 0fBF317218;
fma.rn.f32 %f1462, %f1460, %f1461, %f1454;
mov.f32 %f1463, 0f3102E308;
fma.rn.f32 %f1464, %f1460, %f1463, %f1462;
mul.f32 %f1465, %f1464, 0f3FB8AA3B;
add.f32 %f1466, %f1460, 0f4B40007F;
mov.b32 %r1457, %f1466;
shl.b32 %r1458, %r1457, 23;
mov.b32 %f1467, %r1458;
ex2.approx.ftz.f32 %f1468, %f1465;
mul.f32 %f239, %f1468, %f1467;
setp.eq.f32 %p178, %f239, 0f7F800000;
mov.f32 %f1778, 0f7F800000;
@%p178 bra $L__BB0_109;
fma.rn.f32 %f1778, %f239, %f238, %f239;
$L__BB0_109:
setp.lt.f32 %p179, %f233, 0f00000000;
setp.eq.f32 %p180, %f236, 0f3F800000;
and.pred %p5, %p179, %p180;
setp.eq.f32 %p181, %f233, 0f00000000;
@%p181 bra $L__BB0_113;
bra.uni $L__BB0_110;
$L__BB0_113:
add.f32 %f1473, %f233, %f233;
selp.f32 %f1780, %f1473, 0f00000000, %p180;
bra.uni $L__BB0_114;
$L__BB0_110:
mov.b32 %r1459, %f1778;
xor.b32 %r1460, %r1459, -2147483648;
mov.b32 %f1469, %r1460;
selp.f32 %f1780, %f1469, %f1778, %p5;
setp.geu.f32 %p182, %f233, 0f00000000;
@%p182 bra $L__BB0_114;
mov.f32 %f1470, 0f3ED55555;
cvt.rzi.f32.f32 %f1471, %f1470;
setp.eq.f32 %p183, %f1471, 0f3ED55555;
@%p183 bra $L__BB0_114;
mov.f32 %f1780, 0f7FFFFFFF;
$L__BB0_114:
add.f32 %f1474, %f237, 0f3ED55555;
mov.b32 %r1461, %f1474;
setp.lt.s32 %p185, %r1461, 2139095040;
@%p185 bra $L__BB0_119;
setp.gtu.f32 %p186, %f237, 0f7F800000;
@%p186 bra $L__BB0_118;
bra.uni $L__BB0_116;
$L__BB0_118:
add.f32 %f1780, %f233, 0f3ED55555;
bra.uni $L__BB0_119;
$L__BB0_116:
setp.neu.f32 %p187, %f237, 0f7F800000;
@%p187 bra $L__BB0_119;
selp.f32 %f1780, 0fFF800000, 0f7F800000, %p5;
$L__BB0_119:
abs.f32 %f248, %f234;
setp.lt.f32 %p188, %f248, 0f00800000;
mul.f32 %f1476, %f248, 0f4B800000;
selp.f32 %f1477, %f1476, %f248, %p188;
selp.f32 %f1478, 0fC3170000, 0fC2FE0000, %p188;
mov.b32 %r1462, %f1477;
and.b32 %r1463, %r1462, 8388607;
or.b32 %r1464, %r1463, 1065353216;
mov.b32 %f1479, %r1464;
shr.u32 %r1465, %r1462, 23;
cvt.rn.f32.u32 %f1480, %r1465;
add.f32 %f1481, %f1478, %f1480;
setp.gt.f32 %p189, %f1479, 0f3FB504F3;
mul.f32 %f1482, %f1479, 0f3F000000;
add.f32 %f1483, %f1481, 0f3F800000;
selp.f32 %f1484, %f1483, %f1481, %p189;
selp.f32 %f1485, %f1482, %f1479, %p189;
add.f32 %f1486, %f1485, 0fBF800000;
add.f32 %f1487, %f1485, 0f3F800000;
rcp.approx.ftz.f32 %f1488, %f1487;
add.f32 %f1489, %f1486, %f1486;
mul.f32 %f1490, %f1489, %f1488;
mul.f32 %f1491, %f1490, %f1490;
mov.f32 %f1492, 0f3C4CAF63;
mov.f32 %f1493, 0f3B18F0FE;
fma.rn.f32 %f1494, %f1493, %f1491, %f1492;
mov.f32 %f1495, 0f3DAAAABD;
fma.rn.f32 %f1496, %f1494, %f1491, %f1495;
mul.rn.f32 %f1497, %f1496, %f1491;
mul.rn.f32 %f1498, %f1497, %f1490;
sub.f32 %f1499, %f1486, %f1490;
add.f32 %f1500, %f1499, %f1499;
neg.f32 %f1501, %f1490;
fma.rn.f32 %f1502, %f1501, %f1486, %f1500;
mul.rn.f32 %f1503, %f1488, %f1502;
add.f32 %f1504, %f1498, %f1490;
sub.f32 %f1505, %f1490, %f1504;
add.f32 %f1506, %f1498, %f1505;
add.f32 %f1507, %f1503, %f1506;
add.f32 %f1508, %f1504, %f1507;
sub.f32 %f1509, %f1504, %f1508;
add.f32 %f1510, %f1507, %f1509;
mov.f32 %f1511, 0f3F317200;
mul.rn.f32 %f1512, %f1484, %f1511;
mov.f32 %f1513, 0f35BFBE8E;
mul.rn.f32 %f1514, %f1484, %f1513;
add.f32 %f1515, %f1512, %f1508;
sub.f32 %f1516, %f1512, %f1515;
add.f32 %f1517, %f1508, %f1516;
add.f32 %f1518, %f1510, %f1517;
add.f32 %f1519, %f1514, %f1518;
add.f32 %f1520, %f1515, %f1519;
sub.f32 %f1521, %f1515, %f1520;
add.f32 %f1522, %f1519, %f1521;
mov.f32 %f1523, 0f3ED55555;
mul.rn.f32 %f1524, %f1523, %f1520;
neg.f32 %f1525, %f1524;
fma.rn.f32 %f1526, %f1523, %f1520, %f1525;
fma.rn.f32 %f1527, %f1523, %f1522, %f1526;
mov.f32 %f1528, 0f00000000;
fma.rn.f32 %f1529, %f1528, %f1520, %f1527;
add.rn.f32 %f1530, %f1524, %f1529;
neg.f32 %f1531, %f1530;
add.rn.f32 %f1532, %f1524, %f1531;
add.rn.f32 %f1533, %f1532, %f1529;
mov.b32 %r1466, %f1530;
setp.eq.s32 %p190, %r1466, 1118925336;
add.s32 %r1467, %r1466, -1;
mov.b32 %f1534, %r1467;
add.f32 %f1535, %f1533, 0f37000000;
selp.f32 %f249, %f1535, %f1533, %p190;
selp.f32 %f1536, %f1534, %f1530, %p190;
mov.f32 %f1537, 0f3FB8AA3B;
mul.rn.f32 %f1538, %f1536, %f1537;
cvt.rzi.f32.f32 %f1539, %f1538;
abs.f32 %f1540, %f1539;
setp.gt.f32 %p191, %f1540, 0f42FC0000;
mov.b32 %r1468, %f1539;
and.b32 %r1469, %r1468, -2147483648;
or.b32 %r1470, %r1469, 1123811328;
mov.b32 %f1541, %r1470;
selp.f32 %f1542, %f1541, %f1539, %p191;
mov.f32 %f1543, 0fBF317218;
fma.rn.f32 %f1544, %f1542, %f1543, %f1536;
mov.f32 %f1545, 0f3102E308;
fma.rn.f32 %f1546, %f1542, %f1545, %f1544;
mul.f32 %f1547, %f1546, 0f3FB8AA3B;
add.f32 %f1548, %f1542, 0f4B40007F;
mov.b32 %r1471, %f1548;
shl.b32 %r1472, %r1471, 23;
mov.b32 %f1549, %r1472;
ex2.approx.ftz.f32 %f1550, %f1547;
mul.f32 %f250, %f1550, %f1549;
setp.eq.f32 %p192, %f250, 0f7F800000;
mov.f32 %f1781, 0f7F800000;
@%p192 bra $L__BB0_121;
fma.rn.f32 %f1781, %f250, %f249, %f250;
$L__BB0_121:
setp.lt.f32 %p193, %f234, 0f00000000;
and.pred %p6, %p193, %p180;
setp.eq.f32 %p195, %f234, 0f00000000;
@%p195 bra $L__BB0_125;
bra.uni $L__BB0_122;
$L__BB0_125:
add.f32 %f1555, %f234, %f234;
selp.f32 %f1783, %f1555, 0f00000000, %p180;
bra.uni $L__BB0_126;
$L__BB0_122:
mov.b32 %r1473, %f1781;
xor.b32 %r1474, %r1473, -2147483648;
mov.b32 %f1551, %r1474;
selp.f32 %f1783, %f1551, %f1781, %p6;
setp.geu.f32 %p196, %f234, 0f00000000;
@%p196 bra $L__BB0_126;
mov.f32 %f1552, 0f3ED55555;
cvt.rzi.f32.f32 %f1553, %f1552;
setp.eq.f32 %p197, %f1553, 0f3ED55555;
@%p197 bra $L__BB0_126;
mov.f32 %f1783, 0f7FFFFFFF;
$L__BB0_126:
add.f32 %f1556, %f248, 0f3ED55555;
mov.b32 %r1475, %f1556;
setp.lt.s32 %p199, %r1475, 2139095040;
@%p199 bra $L__BB0_131;
setp.gtu.f32 %p200, %f248, 0f7F800000;
@%p200 bra $L__BB0_130;
bra.uni $L__BB0_128;
$L__BB0_130:
add.f32 %f1783, %f234, 0f3ED55555;
bra.uni $L__BB0_131;
$L__BB0_128:
setp.neu.f32 %p201, %f248, 0f7F800000;
@%p201 bra $L__BB0_131;
selp.f32 %f1783, 0fFF800000, 0f7F800000, %p6;
$L__BB0_131:
abs.f32 %f259, %f235;
setp.lt.f32 %p202, %f259, 0f00800000;
mul.f32 %f1558, %f259, 0f4B800000;
selp.f32 %f1559, %f1558, %f259, %p202;
selp.f32 %f1560, 0fC3170000, 0fC2FE0000, %p202;
mov.b32 %r1476, %f1559;
and.b32 %r1477, %r1476, 8388607;
or.b32 %r1478, %r1477, 1065353216;
mov.b32 %f1561, %r1478;
shr.u32 %r1479, %r1476, 23;
cvt.rn.f32.u32 %f1562, %r1479;
add.f32 %f1563, %f1560, %f1562;
setp.gt.f32 %p203, %f1561, 0f3FB504F3;
mul.f32 %f1564, %f1561, 0f3F000000;
add.f32 %f1565, %f1563, 0f3F800000;
selp.f32 %f1566, %f1565, %f1563, %p203;
selp.f32 %f1567, %f1564, %f1561, %p203;
add.f32 %f1568, %f1567, 0fBF800000;
add.f32 %f1569, %f1567, 0f3F800000;
rcp.approx.ftz.f32 %f1570, %f1569;
add.f32 %f1571, %f1568, %f1568;
mul.f32 %f1572, %f1571, %f1570;
mul.f32 %f1573, %f1572, %f1572;
mov.f32 %f1574, 0f3C4CAF63;
mov.f32 %f1575, 0f3B18F0FE;
fma.rn.f32 %f1576, %f1575, %f1573, %f1574;
mov.f32 %f1577, 0f3DAAAABD;
fma.rn.f32 %f1578, %f1576, %f1573, %f1577;
mul.rn.f32 %f1579, %f1578, %f1573;
mul.rn.f32 %f1580, %f1579, %f1572;
sub.f32 %f1581, %f1568, %f1572;
add.f32 %f1582, %f1581, %f1581;
neg.f32 %f1583, %f1572;
fma.rn.f32 %f1584, %f1583, %f1568, %f1582;
mul.rn.f32 %f1585, %f1570, %f1584;
add.f32 %f1586, %f1580, %f1572;
sub.f32 %f1587, %f1572, %f1586;
add.f32 %f1588, %f1580, %f1587;
add.f32 %f1589, %f1585, %f1588;
add.f32 %f1590, %f1586, %f1589;
sub.f32 %f1591, %f1586, %f1590;
add.f32 %f1592, %f1589, %f1591;
mov.f32 %f1593, 0f3F317200;
mul.rn.f32 %f1594, %f1566, %f1593;
mov.f32 %f1595, 0f35BFBE8E;
mul.rn.f32 %f1596, %f1566, %f1595;
add.f32 %f1597, %f1594, %f1590;
sub.f32 %f1598, %f1594, %f1597;
add.f32 %f1599, %f1590, %f1598;
add.f32 %f1600, %f1592, %f1599;
add.f32 %f1601, %f1596, %f1600;
add.f32 %f1602, %f1597, %f1601;
sub.f32 %f1603, %f1597, %f1602;
add.f32 %f1604, %f1601, %f1603;
mov.f32 %f1605, 0f3ED55555;
mul.rn.f32 %f1606, %f1605, %f1602;
neg.f32 %f1607, %f1606;
fma.rn.f32 %f1608, %f1605, %f1602, %f1607;
fma.rn.f32 %f1609, %f1605, %f1604, %f1608;
mov.f32 %f1610, 0f00000000;
fma.rn.f32 %f1611, %f1610, %f1602, %f1609;
add.rn.f32 %f1612, %f1606, %f1611;
neg.f32 %f1613, %f1612;
add.rn.f32 %f1614, %f1606, %f1613;
add.rn.f32 %f1615, %f1614, %f1611;
mov.b32 %r1480, %f1612;
setp.eq.s32 %p204, %r1480, 1118925336;
add.s32 %r1481, %r1480, -1;
mov.b32 %f1616, %r1481;
add.f32 %f1617, %f1615, 0f37000000;
selp.f32 %f260, %f1617, %f1615, %p204;
selp.f32 %f1618, %f1616, %f1612, %p204;
mov.f32 %f1619, 0f3FB8AA3B;
mul.rn.f32 %f1620, %f1618, %f1619;
cvt.rzi.f32.f32 %f1621, %f1620;
abs.f32 %f1622, %f1621;
setp.gt.f32 %p205, %f1622, 0f42FC0000;
mov.b32 %r1482, %f1621;
and.b32 %r1483, %r1482, -2147483648;
or.b32 %r1484, %r1483, 1123811328;
mov.b32 %f1623, %r1484;
selp.f32 %f1624, %f1623, %f1621, %p205;
mov.f32 %f1625, 0fBF317218;
fma.rn.f32 %f1626, %f1624, %f1625, %f1618;
mov.f32 %f1627, 0f3102E308;
fma.rn.f32 %f1628, %f1624, %f1627, %f1626;
mul.f32 %f1629, %f1628, 0f3FB8AA3B;
add.f32 %f1630, %f1624, 0f4B40007F;
mov.b32 %r1485, %f1630;
shl.b32 %r1486, %r1485, 23;
mov.b32 %f1631, %r1486;
ex2.approx.ftz.f32 %f1632, %f1629;
mul.f32 %f261, %f1632, %f1631;
setp.eq.f32 %p206, %f261, 0f7F800000;
mov.f32 %f1784, 0f7F800000;
@%p206 bra $L__BB0_133;
fma.rn.f32 %f1784, %f261, %f260, %f261;
$L__BB0_133:
setp.lt.f32 %p207, %f235, 0f00000000;
and.pred %p7, %p207, %p180;
setp.eq.f32 %p209, %f235, 0f00000000;
@%p209 bra $L__BB0_137;
bra.uni $L__BB0_134;
$L__BB0_137:
add.f32 %f1637, %f235, %f235;
selp.f32 %f1786, %f1637, 0f00000000, %p180;
bra.uni $L__BB0_138;
$L__BB0_134:
mov.b32 %r1487, %f1784;
xor.b32 %r1488, %r1487, -2147483648;
mov.b32 %f1633, %r1488;
selp.f32 %f1786, %f1633, %f1784, %p7;
setp.geu.f32 %p210, %f235, 0f00000000;
@%p210 bra $L__BB0_138;
mov.f32 %f1634, 0f3ED55555;
cvt.rzi.f32.f32 %f1635, %f1634;
setp.eq.f32 %p211, %f1635, 0f3ED55555;
@%p211 bra $L__BB0_138;
mov.f32 %f1786, 0f7FFFFFFF;
$L__BB0_138:
add.f32 %f1638, %f259, 0f3ED55555;
mov.b32 %r1489, %f1638;
setp.lt.s32 %p213, %r1489, 2139095040;
@%p213 bra $L__BB0_143;
setp.gtu.f32 %p214, %f259, 0f7F800000;
@%p214 bra $L__BB0_142;
bra.uni $L__BB0_140;
$L__BB0_142:
add.f32 %f1786, %f235, 0f3ED55555;
bra.uni $L__BB0_143;
$L__BB0_140:
setp.neu.f32 %p215, %f259, 0f7F800000;
@%p215 bra $L__BB0_143;
selp.f32 %f1786, 0fFF800000, 0f7F800000, %p7;
$L__BB0_143:
fma.rn.f32 %f1639, %f1780, 0f3F870A3D, 0fBD6147AE;
setp.eq.f32 %p216, %f233, 0f3F800000;
mov.f32 %f1640, 0f3F800000;
selp.f32 %f1641, 0f3F7FFFFF, %f1639, %p216;
mul.f32 %f1642, %f233, 0f414EB852;
setp.lt.f32 %p217, %f233, 0f3B4D2E1C;
selp.f32 %f1643, %f1642, %f1641, %p217;
fma.rn.f32 %f1644, %f1783, 0f3F870A3D, 0fBD6147AE;
setp.eq.f32 %p218, %f234, 0f3F800000;
selp.f32 %f1645, 0f3F7FFFFF, %f1644, %p218;
mul.f32 %f1646, %f234, 0f414EB852;
setp.lt.f32 %p219, %f234, 0f3B4D2E1C;
selp.f32 %f1647, %f1646, %f1645, %p219;
fma.rn.f32 %f1648, %f1786, 0f3F870A3D, 0fBD6147AE;
setp.eq.f32 %p220, %f235, 0f3F800000;
selp.f32 %f1649, 0f3F7FFFFF, %f1648, %p220;
mul.f32 %f1650, %f235, 0f414EB852;
setp.lt.f32 %p221, %f235, 0f3B4D2E1C;
selp.f32 %f1651, %f1650, %f1649, %p221;
min.f32 %f1652, %f1643, %f1640;
mov.f32 %f1653, 0f00000000;
max.f32 %f1654, %f1653, %f1652;
mul.f32 %f1655, %f1654, 0f43800000;
cvt.rzi.u32.f32 %r1490, %f1655;
min.u32 %r1491, %r1490, 255;
min.f32 %f1656, %f1647, %f1640;
max.f32 %f1657, %f1653, %f1656;
mul.f32 %f1658, %f1657, 0f43800000;
cvt.rzi.u32.f32 %r1492, %f1658;
min.u32 %r1493, %r1492, 255;
min.f32 %f1659, %f1651, %f1640;
max.f32 %f1660, %f1653, %f1659;
mul.f32 %f1661, %f1660, 0f43800000;
cvt.rzi.u32.f32 %r1494, %f1661;
min.u32 %r1495, %r1494, 255;
shl.b64 %rd83, %rd19, 2;
add.s64 %rd84, %rd18, %rd83;
cvt.u16.u32 %rs36, %r1495;
cvt.u16.u32 %rs37, %r1493;
cvt.u16.u32 %rs38, %r1491;
mov.u16 %rs39, 255;
st.global.v4.u8 [%rd84], {%rs38, %rs37, %rs36, %rs39};
$L__BB0_144:
and.b32 %r1496, %r60, 4;
setp.eq.s32 %p222, %r1496, 0;
@%p222 bra $L__BB0_148;
ld.const.u32 %r1497, [params+108];
setp.eq.s32 %p223, %r1497, 0;
ld.const.u64 %rd85, [params+224];
cvta.to.global.u64 %rd86, %rd85;
ld.const.u32 %r1498, [params+216];
mad.lo.s32 %r1499, %r1498, %r6, %r5;
mul.wide.u32 %rd87, %r1499, 8;
add.s64 %rd20, %rd86, %rd87;
@%p223 bra $L__BB0_147;
ld.global.v4.u16 {%rs47, %rs48, %rs49, %rs50}, [%rd20];
// begin inline asm
{ cvt.f32.f16 %f1662, %rs47;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1663, %rs48;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1664, %rs49;}
// end inline asm
add.f32 %f1665, %f182, %f1662;
add.f32 %f1666, %f183, %f1663;
add.f32 %f1667, %f184, %f1664;
mov.f32 %f1668, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs45, %f1667;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs44, %f1666;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs43, %f1665;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs46, %f1668;}
// end inline asm
st.global.v4.u16 [%rd20], {%rs43, %rs44, %rs45, %rs46};
bra.uni $L__BB0_148;
$L__BB0_147:
mov.f32 %f1672, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs54, %f1672;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs53, %f184;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs52, %f183;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs51, %f182;}
// end inline asm
st.global.v4.u16 [%rd20], {%rs51, %rs52, %rs53, %rs54};
$L__BB0_148:
and.b32 %r1500, %r60, 64;
setp.eq.s32 %p224, %r1500, 0;
@%p224 bra $L__BB0_170;
ld.const.u64 %rd88, [params+208];
cvta.to.global.u64 %rd89, %rd88;
ld.const.u32 %r1501, [params+200];
mad.lo.s32 %r1502, %r1501, %r6, %r5;
mul.f32 %f1673, %f287, 0f3F000000;
mov.f32 %f1674, 0f3F000000;
sub.f32 %f1675, %f1674, %f1673;
mul.f32 %f1676, %f1675, 0f437F0000;
cvt.rzi.u32.f32 %r1503, %f1676;
mul.f32 %f1677, %f288, 0f3F000000;
sub.f32 %f1678, %f1674, %f1677;
mul.f32 %f1679, %f1678, 0f437F0000;
cvt.rzi.u32.f32 %r1504, %f1679;
mul.f32 %f1680, %f289, 0f3F000000;
sub.f32 %f1681, %f1674, %f1680;
mul.f32 %f1682, %f1681, 0f437F0000;
cvt.rzi.u32.f32 %r1505, %f1682;
mul.wide.u32 %rd90, %r1502, 4;
add.s64 %rd91, %rd89, %rd90;
cvt.u16.u32 %rs55, %r1505;
cvt.u16.u32 %rs56, %r1504;
cvt.u16.u32 %rs57, %r1503;
mov.u16 %rs58, 255;
st.global.v4.u8 [%rd91], {%rs57, %rs56, %rs55, %rs58};
bra.uni $L__BB0_170;
$L__BB0_157:
mov.f32 %f1693, 0f00000000;
mov.f32 %f1694, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs77, %f1694;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs76, %f1693;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs75, %f1693;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs74, %f1693;}
// end inline asm
st.global.v4.u16 [%rd21], {%rs74, %rs75, %rs76, %rs77};
$L__BB0_158:
and.b32 %r1517, %r8, 64;
setp.eq.s32 %p232, %r1517, 0;
@%p232 bra $L__BB0_170;
ld.const.u64 %rd103, [params+208];
cvta.to.global.u64 %rd104, %rd103;
ld.const.u32 %r1518, [params+200];
mad.lo.s32 %r1519, %r1518, %r6, %r5;
mul.wide.u32 %rd105, %r1519, 4;
add.s64 %rd106, %rd104, %rd105;
mov.u16 %rs78, 0;
mov.u16 %rs79, 255;
st.global.v4.u8 [%rd106], {%rs78, %rs78, %rs78, %rs79};
$L__BB0_170:
ret;
}
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