80 lines
1.5 KiB
Plaintext
80 lines
1.5 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl oxMain
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.const .align 8 .b8 params[88];
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.visible .entry oxMain(
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)
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{
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.reg .pred %p<4>;
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.reg .b16 %rs<8>;
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.reg .f32 %f<4>;
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.reg .b32 %r<17>;
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.reg .b64 %rd<9>;
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mov.u32 %r3, %ctaid.x;
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mov.u32 %r4, %ntid.x;
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mov.u32 %r5, %tid.x;
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mad.lo.s32 %r1, %r4, %r3, %r5;
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mov.u32 %r6, %ntid.y;
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mov.u32 %r7, %ctaid.y;
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mov.u32 %r8, %tid.y;
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mad.lo.s32 %r2, %r6, %r7, %r8;
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mov.u32 %r9, %nctaid.x;
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mul.lo.s32 %r10, %r9, %r4;
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mov.u32 %r11, %nctaid.y;
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mul.lo.s32 %r12, %r11, %r6;
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setp.lt.u32 %p1, %r1, %r10;
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setp.lt.u32 %p2, %r2, %r12;
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and.pred %p3, %p1, %p2;
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@!%p3 bra BB0_2;
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bra.uni BB0_1;
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BB0_1:
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ld.const.u64 %rd1, [params+8];
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cvta.to.global.u64 %rd2, %rd1;
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ld.const.u32 %r13, [params];
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mad.lo.s32 %r14, %r13, %r2, %r1;
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mul.wide.u32 %rd3, %r14, 8;
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add.s64 %rd4, %rd2, %rd3;
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ld.global.v4.u16 {%rs4, %rs5, %rs6, %rs7}, [%rd4];
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// inline asm
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{ cvt.f32.f16 %f1, %rs4;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f2, %rs5;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f3, %rs6;}
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// inline asm
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ld.const.u64 %rd5, [params+56];
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cvta.to.global.u64 %rd6, %rd5;
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ld.const.u32 %r15, [params+48];
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mad.lo.s32 %r16, %r15, %r2, %r1;
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mul.wide.u32 %rd7, %r16, 12;
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add.s64 %rd8, %rd6, %rd7;
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st.global.f32 [%rd8], %f1;
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st.global.f32 [%rd8+4], %f2;
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st.global.f32 [%rd8+8], %f3;
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BB0_2:
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ret;
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}
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