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FORT-BO/Assets/Editor/x64/Bakery/lmTexGIdirTranslucent.ptx
2026-08-06 18:56:32 +03:00

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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//
.version 6.1
.target sm_30
.address_size 64
// .globl _Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Dir[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .align 1 .b8 lightmapDirectDir[1];
.global .texref albedoTex;
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z6oxMainv(
)
{
.local .align 16 .b8 __local_depot0[48];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<108>;
.reg .b16 %rs<44>;
.reg .f32 %f<719>;
.reg .b32 %r<332>;
.reg .b64 %rd<143>;
mov.u64 %rd142, __local_depot0;
cvta.local.u64 %SP, %rd142;
ld.global.u32 %r1, [samples];
ld.global.v2.u32 {%r100, %r101}, [pixelID];
cvt.u64.u32 %rd20, %r100;
cvt.u64.u32 %rd21, %r101;
mov.u64 %rd24, uvnormal;
cvta.global.u64 %rd19, %rd24;
mov.u32 %r98, 2;
mov.u32 %r99, 4;
mov.u64 %rd23, 0;
// inline asm
call (%rd18), _rt_buffer_get_64, (%rd19, %r98, %r99, %rd20, %rd21, %rd23, %rd23);
// inline asm
ld.u32 %r2, [%rd18];
shr.u32 %r104, %r2, 16;
cvt.u16.u32 %rs1, %r104;
and.b16 %rs2, %rs1, 255;
cvt.u16.u32 %rs3, %r2;
or.b16 %rs4, %rs3, %rs2;
setp.eq.s16 %p6, %rs4, 0;
mov.f32 %f674, 0f00000000;
mov.f32 %f675, %f674;
mov.f32 %f676, %f674;
@%p6 bra BB0_2;
ld.u8 %rs5, [%rd18+1];
and.b16 %rs7, %rs3, 255;
cvt.rn.f32.u16 %f148, %rs7;
div.rn.f32 %f149, %f148, 0f437F0000;
fma.rn.f32 %f150, %f149, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f151, %rs5;
div.rn.f32 %f152, %f151, 0f437F0000;
fma.rn.f32 %f153, %f152, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f154, %rs2;
div.rn.f32 %f155, %f154, 0f437F0000;
fma.rn.f32 %f156, %f155, 0f40000000, 0fBF800000;
mul.f32 %f157, %f153, %f153;
fma.rn.f32 %f158, %f150, %f150, %f157;
fma.rn.f32 %f159, %f156, %f156, %f158;
sqrt.rn.f32 %f160, %f159;
rcp.rn.f32 %f161, %f160;
mul.f32 %f674, %f150, %f161;
mul.f32 %f675, %f153, %f161;
mul.f32 %f676, %f156, %f161;
BB0_2:
ld.global.v2.u32 {%r105, %r106}, [pixelID];
ld.global.v2.u32 {%r108, %r109}, [tileInfo];
add.s32 %r3, %r105, %r108;
add.s32 %r4, %r106, %r109;
setp.eq.f32 %p7, %f675, 0f00000000;
setp.eq.f32 %p8, %f674, 0f00000000;
and.pred %p9, %p8, %p7;
setp.eq.f32 %p10, %f676, 0f00000000;
and.pred %p11, %p9, %p10;
@%p11 bra BB0_104;
bra.uni BB0_3;
BB0_104:
ld.global.u32 %r330, [imageEnabled];
and.b32 %r280, %r330, 1;
setp.eq.b32 %p103, %r280, 1;
@!%p103 bra BB0_106;
bra.uni BB0_105;
BB0_105:
cvt.u64.u32 %rd106, %r3;
cvt.u64.u32 %rd107, %r4;
mov.u64 %rd110, image;
cvta.global.u64 %rd105, %rd110;
mov.u64 %rd109, 0;
// inline asm
call (%rd104), _rt_buffer_get_64, (%rd105, %r98, %r99, %rd106, %rd107, %rd109, %rd109);
// inline asm
mov.u16 %rs38, 0;
st.v4.u8 [%rd104], {%rs38, %rs38, %rs38, %rs38};
ld.global.u32 %r330, [imageEnabled];
BB0_106:
and.b32 %r283, %r330, 4;
setp.eq.s32 %p104, %r283, 0;
@%p104 bra BB0_108;
cvt.u64.u32 %rd113, %r3;
cvt.u64.u32 %rd114, %r4;
mov.u64 %rd117, image_HDR;
cvta.global.u64 %rd112, %rd117;
mov.u32 %r285, 8;
mov.u64 %rd116, 0;
// inline asm
call (%rd111), _rt_buffer_get_64, (%rd112, %r98, %r285, %rd113, %rd114, %rd116, %rd116);
// inline asm
mov.f32 %f635, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs39, %f635;}
// inline asm
mov.u16 %rs40, 0;
st.v4.u16 [%rd111], {%rs39, %rs39, %rs39, %rs40};
ld.global.u32 %r330, [imageEnabled];
BB0_108:
and.b32 %r286, %r330, 16;
setp.eq.s32 %p105, %r286, 0;
@%p105 bra BB0_110;
cvt.u64.u32 %rd120, %r3;
cvt.u64.u32 %rd121, %r4;
mov.u64 %rd124, image_HDR2;
cvta.global.u64 %rd119, %rd124;
mov.u32 %r288, 8;
mov.u64 %rd123, 0;
// inline asm
call (%rd118), _rt_buffer_get_64, (%rd119, %r98, %r288, %rd120, %rd121, %rd123, %rd123);
// inline asm
mov.f32 %f636, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs41, %f636;}
// inline asm
mov.u16 %rs42, 0;
st.v4.u16 [%rd118], {%rs41, %rs41, %rs41, %rs42};
ld.global.u32 %r330, [imageEnabled];
BB0_110:
and.b32 %r289, %r330, 64;
setp.eq.s32 %p106, %r289, 0;
@%p106 bra BB0_112;
cvt.u64.u32 %rd127, %r3;
cvt.u64.u32 %rd128, %r4;
mov.u64 %rd131, image_Dir;
cvta.global.u64 %rd126, %rd131;
mov.u64 %rd130, 0;
// inline asm
call (%rd125), _rt_buffer_get_64, (%rd126, %r98, %r99, %rd127, %rd128, %rd130, %rd130);
// inline asm
mov.u16 %rs43, 0;
st.v4.u8 [%rd125], {%rs43, %rs43, %rs43, %rs43};
bra.uni BB0_112;
BB0_3:
ld.global.v2.u32 {%r119, %r120}, [pixelID];
cvt.u64.u32 %rd27, %r119;
cvt.u64.u32 %rd28, %r120;
mov.u64 %rd43, lightmapDirect;
cvta.global.u64 %rd26, %rd43;
mov.u32 %r114, 8;
// inline asm
call (%rd25), _rt_buffer_get_64, (%rd26, %r98, %r114, %rd27, %rd28, %rd23, %rd23);
// inline asm
ld.v4.u16 {%rs12, %rs13, %rs14, %rs15}, [%rd25];
// inline asm
{ cvt.f32.f16 %f162, %rs12;}
// inline asm
// inline asm
{ cvt.f32.f16 %f163, %rs13;}
// inline asm
// inline asm
{ cvt.f32.f16 %f164, %rs14;}
// inline asm
ld.global.v2.u32 {%r123, %r124}, [pixelID];
cvt.u64.u32 %rd33, %r123;
cvt.u64.u32 %rd34, %r124;
mov.u64 %rd44, uvpos;
cvta.global.u64 %rd32, %rd44;
mov.u32 %r116, 12;
// inline asm
call (%rd31), _rt_buffer_get_64, (%rd32, %r98, %r116, %rd33, %rd34, %rd23, %rd23);
// inline asm
ld.f32 %f171, [%rd31+8];
ld.f32 %f172, [%rd31+4];
ld.f32 %f173, [%rd31];
mul.f32 %f174, %f173, 0f3456BF95;
mul.f32 %f175, %f172, 0f3456BF95;
mul.f32 %f176, %f171, 0f3456BF95;
abs.f32 %f177, %f674;
div.rn.f32 %f178, %f174, %f177;
abs.f32 %f179, %f675;
div.rn.f32 %f180, %f175, %f179;
abs.f32 %f181, %f676;
div.rn.f32 %f182, %f176, %f181;
abs.f32 %f183, %f178;
abs.f32 %f184, %f180;
abs.f32 %f185, %f182;
mov.f32 %f186, 0f38D1B717;
max.f32 %f187, %f183, %f186;
max.f32 %f188, %f184, %f186;
max.f32 %f189, %f185, %f186;
fma.rn.f32 %f10, %f674, %f187, %f173;
fma.rn.f32 %f11, %f675, %f188, %f172;
fma.rn.f32 %f12, %f676, %f189, %f171;
setp.gt.f32 %p12, %f177, %f181;
neg.f32 %f190, %f675;
selp.f32 %f191, %f190, 0f00000000, %p12;
neg.f32 %f192, %f676;
selp.f32 %f193, %f674, %f192, %p12;
selp.f32 %f194, 0f00000000, %f675, %p12;
mul.f32 %f195, %f193, %f193;
fma.rn.f32 %f196, %f191, %f191, %f195;
fma.rn.f32 %f197, %f194, %f194, %f196;
sqrt.rn.f32 %f198, %f197;
rcp.rn.f32 %f199, %f198;
mul.f32 %f13, %f191, %f199;
mul.f32 %f14, %f193, %f199;
mul.f32 %f15, %f194, %f199;
ld.global.v2.u32 {%r127, %r128}, [pixelID];
cvt.u64.u32 %rd39, %r127;
cvt.u64.u32 %rd40, %r128;
mov.u64 %rd45, rnd_seeds;
cvta.global.u64 %rd38, %rd45;
// inline asm
call (%rd37), _rt_buffer_get_64, (%rd38, %r98, %r99, %rd39, %rd40, %rd23, %rd23);
// inline asm
mov.f32 %f683, 0f00000000;
setp.lt.s32 %p13, %r1, 1;
mov.f32 %f684, %f683;
mov.f32 %f685, %f683;
mov.f32 %f686, %f683;
mov.f32 %f687, %f683;
mov.f32 %f688, %f683;
@%p13 bra BB0_54;
cvt.rn.f32.s32 %f206, %r1;
rcp.rn.f32 %f16, %f206;
ld.u32 %r305, [%rd37];
mul.f32 %f17, %f10, 0f3456BF95;
mul.f32 %f18, %f11, 0f3456BF95;
mul.f32 %f19, %f12, 0f3456BF95;
mul.f32 %f207, %f674, %f14;
mul.f32 %f208, %f675, %f13;
sub.f32 %f20, %f208, %f207;
mul.f32 %f209, %f676, %f13;
mul.f32 %f210, %f674, %f15;
sub.f32 %f21, %f210, %f209;
mul.f32 %f211, %f675, %f15;
mul.f32 %f212, %f676, %f14;
sub.f32 %f22, %f212, %f211;
mov.f32 %f683, 0f00000000;
mov.u32 %r131, 0;
abs.f32 %f213, %f18;
abs.f32 %f214, %f17;
max.f32 %f215, %f214, %f213;
abs.f32 %f216, %f19;
max.f32 %f217, %f215, %f216;
mov.u32 %r302, %r131;
mov.f32 %f684, %f683;
mov.f32 %f685, %f683;
mov.f32 %f686, %f683;
mov.f32 %f687, %f683;
mov.f32 %f688, %f683;
BB0_5:
max.f32 %f30, %f217, %f186;
mov.u32 %r304, %r131;
BB0_6:
cvt.rn.f32.s32 %f671, %r302;
mad.lo.s32 %r133, %r305, 1664525, 1013904223;
and.b32 %r134, %r133, 16777215;
cvt.rn.f32.u32 %f219, %r134;
fma.rn.f32 %f220, %f219, 0f33800000, %f671;
mul.f32 %f37, %f16, %f220;
mad.lo.s32 %r305, %r133, 1664525, 1013904223;
and.b32 %r135, %r305, 16777215;
cvt.rn.f32.u32 %f221, %r135;
cvt.rn.f32.s32 %f222, %r304;
fma.rn.f32 %f223, %f221, 0f33800000, %f222;
mul.f32 %f224, %f16, %f223;
mul.f32 %f225, %f37, %f37;
mov.f32 %f226, 0f3F800000;
sub.f32 %f227, %f226, %f225;
mov.f32 %f228, 0f00000000;
max.f32 %f229, %f228, %f227;
sqrt.rn.f32 %f38, %f229;
mul.f32 %f695, %f224, 0f40C90FDB;
abs.f32 %f40, %f695;
setp.neu.f32 %p14, %f40, 0f7F800000;
mov.f32 %f689, %f695;
@%p14 bra BB0_8;
mul.rn.f32 %f689, %f695, %f228;
BB0_8:
mul.f32 %f231, %f689, 0f3F22F983;
cvt.rni.s32.f32 %r315, %f231;
cvt.rn.f32.s32 %f232, %r315;
neg.f32 %f233, %f232;
mov.f32 %f234, 0f3FC90FDA;
fma.rn.f32 %f235, %f233, %f234, %f689;
mov.f32 %f236, 0f33A22168;
fma.rn.f32 %f237, %f233, %f236, %f235;
mov.f32 %f238, 0f27C234C5;
fma.rn.f32 %f690, %f233, %f238, %f237;
abs.f32 %f239, %f689;
setp.leu.f32 %p15, %f239, 0f47CE4780;
@%p15 bra BB0_19;
add.u64 %rd47, %SP, 16;
cvta.to.local.u64 %rd3, %rd47;
mov.b32 %r12, %f689;
shr.u32 %r13, %r12, 23;
shl.b32 %r138, %r12, 8;
or.b32 %r14, %r138, -2147483648;
mov.u32 %r306, 0;
mov.u64 %rd139, 0;
mov.u64 %rd138, %rd3;
mov.u32 %r307, %r306;
BB0_10:
.pragma "nounroll";
shl.b64 %rd48, %rd139, 2;
mov.u64 %rd49, __cudart_i2opi_f;
add.s64 %rd50, %rd49, %rd48;
ld.const.u32 %r141, [%rd50];
// inline asm
{
mad.lo.cc.u32 %r139, %r141, %r14, %r307;
madc.hi.u32 %r307, %r141, %r14, 0;
}
// inline asm
st.local.u32 [%rd138], %r139;
add.s32 %r306, %r306, 1;
cvt.s64.s32 %rd139, %r306;
mul.wide.s32 %rd53, %r306, 4;
add.s64 %rd138, %rd3, %rd53;
setp.ne.s32 %p16, %r306, 6;
@%p16 bra BB0_10;
add.u64 %rd137, %SP, 16;
and.b32 %r144, %r13, 255;
add.s32 %r145, %r144, -128;
shr.u32 %r146, %r145, 5;
and.b32 %r19, %r12, -2147483648;
cvta.to.local.u64 %rd55, %rd137;
st.local.u32 [%rd55+24], %r307;
mov.u32 %r147, 6;
sub.s32 %r148, %r147, %r146;
mul.wide.s32 %rd56, %r148, 4;
add.s64 %rd8, %rd55, %rd56;
ld.local.u32 %r308, [%rd8];
ld.local.u32 %r309, [%rd8+-4];
and.b32 %r22, %r13, 31;
setp.eq.s32 %p17, %r22, 0;
@%p17 bra BB0_13;
mov.u32 %r149, 32;
sub.s32 %r150, %r149, %r22;
shr.u32 %r151, %r309, %r150;
shl.b32 %r152, %r308, %r22;
add.s32 %r308, %r151, %r152;
ld.local.u32 %r153, [%rd8+-8];
shr.u32 %r154, %r153, %r150;
shl.b32 %r155, %r309, %r22;
add.s32 %r309, %r154, %r155;
BB0_13:
shr.u32 %r156, %r309, 30;
shl.b32 %r157, %r308, 2;
add.s32 %r310, %r156, %r157;
shl.b32 %r28, %r309, 2;
shr.u32 %r158, %r310, 31;
shr.u32 %r159, %r308, 30;
add.s32 %r29, %r158, %r159;
setp.eq.s32 %p18, %r158, 0;
@%p18 bra BB0_14;
bra.uni BB0_15;
BB0_14:
mov.u32 %r311, %r19;
mov.u32 %r312, %r28;
bra.uni BB0_16;
BB0_15:
not.b32 %r160, %r310;
neg.s32 %r312, %r28;
setp.eq.s32 %p19, %r28, 0;
selp.u32 %r161, 1, 0, %p19;
add.s32 %r310, %r161, %r160;
xor.b32 %r311, %r19, -2147483648;
BB0_16:
clz.b32 %r314, %r310;
setp.eq.s32 %p20, %r314, 0;
shl.b32 %r162, %r310, %r314;
mov.u32 %r163, 32;
sub.s32 %r164, %r163, %r314;
shr.u32 %r165, %r312, %r164;
add.s32 %r166, %r165, %r162;
selp.b32 %r37, %r310, %r166, %p20;
mov.u32 %r167, -921707870;
mul.hi.u32 %r313, %r37, %r167;
setp.eq.s32 %p21, %r19, 0;
neg.s32 %r168, %r29;
selp.b32 %r315, %r29, %r168, %p21;
setp.lt.s32 %p22, %r313, 1;
@%p22 bra BB0_18;
mul.lo.s32 %r169, %r37, -921707870;
shr.u32 %r170, %r169, 31;
shl.b32 %r171, %r313, 1;
add.s32 %r313, %r170, %r171;
add.s32 %r314, %r314, 1;
BB0_18:
mov.u32 %r172, 126;
sub.s32 %r173, %r172, %r314;
shl.b32 %r174, %r173, 23;
add.s32 %r175, %r313, 1;
shr.u32 %r176, %r175, 7;
add.s32 %r177, %r176, 1;
shr.u32 %r178, %r177, 1;
add.s32 %r179, %r178, %r174;
or.b32 %r180, %r179, %r311;
mov.b32 %f690, %r180;
BB0_19:
mul.rn.f32 %f46, %f690, %f690;
add.s32 %r45, %r315, 1;
and.b32 %r46, %r45, 1;
setp.eq.s32 %p23, %r46, 0;
@%p23 bra BB0_21;
bra.uni BB0_20;
BB0_21:
mov.f32 %f242, 0f3C08839E;
mov.f32 %f243, 0fB94CA1F9;
fma.rn.f32 %f691, %f243, %f46, %f242;
bra.uni BB0_22;
BB0_20:
mov.f32 %f240, 0fBAB6061A;
mov.f32 %f241, 0f37CCF5CE;
fma.rn.f32 %f691, %f241, %f46, %f240;
BB0_22:
@%p23 bra BB0_24;
bra.uni BB0_23;
BB0_24:
mov.f32 %f247, 0fBE2AAAA3;
fma.rn.f32 %f248, %f691, %f46, %f247;
fma.rn.f32 %f692, %f248, %f46, %f228;
bra.uni BB0_25;
BB0_23:
mov.f32 %f244, 0f3D2AAAA5;
fma.rn.f32 %f245, %f691, %f46, %f244;
mov.f32 %f246, 0fBF000000;
fma.rn.f32 %f692, %f245, %f46, %f246;
BB0_25:
fma.rn.f32 %f693, %f692, %f690, %f690;
@%p23 bra BB0_27;
fma.rn.f32 %f693, %f692, %f46, %f226;
BB0_27:
and.b32 %r181, %r45, 2;
setp.eq.s32 %p26, %r181, 0;
@%p26 bra BB0_29;
mov.f32 %f252, 0fBF800000;
fma.rn.f32 %f693, %f693, %f252, %f228;
BB0_29:
@%p14 bra BB0_31;
mul.rn.f32 %f695, %f695, %f228;
BB0_31:
mov.f32 %f673, 0f33A22168;
mov.f32 %f672, 0f3FC90FDA;
mul.f32 %f254, %f695, 0f3F22F983;
cvt.rni.s32.f32 %r325, %f254;
cvt.rn.f32.s32 %f255, %r325;
neg.f32 %f256, %f255;
fma.rn.f32 %f258, %f256, %f672, %f695;
fma.rn.f32 %f260, %f256, %f673, %f258;
fma.rn.f32 %f696, %f256, %f238, %f260;
abs.f32 %f262, %f695;
setp.leu.f32 %p28, %f262, 0f47CE4780;
@%p28 bra BB0_42;
add.u64 %rd58, %SP, 16;
cvta.to.local.u64 %rd9, %rd58;
mov.b32 %r48, %f695;
shr.u32 %r49, %r48, 23;
shl.b32 %r184, %r48, 8;
or.b32 %r50, %r184, -2147483648;
mov.u32 %r316, 0;
mov.u64 %rd140, %rd9;
mov.u64 %rd141, %rd23;
mov.u32 %r317, %r316;
BB0_33:
.pragma "nounroll";
shl.b64 %rd59, %rd141, 2;
mov.u64 %rd60, __cudart_i2opi_f;
add.s64 %rd61, %rd60, %rd59;
ld.const.u32 %r187, [%rd61];
// inline asm
{
mad.lo.cc.u32 %r185, %r187, %r50, %r317;
madc.hi.u32 %r317, %r187, %r50, 0;
}
// inline asm
st.local.u32 [%rd140], %r185;
add.s32 %r316, %r316, 1;
cvt.s64.s32 %rd141, %r316;
mul.wide.s32 %rd62, %r316, 4;
add.s64 %rd140, %rd9, %rd62;
setp.ne.s32 %p29, %r316, 6;
@%p29 bra BB0_33;
and.b32 %r190, %r49, 255;
add.s32 %r191, %r190, -128;
shr.u32 %r192, %r191, 5;
and.b32 %r55, %r48, -2147483648;
cvta.to.local.u64 %rd64, %rd58;
st.local.u32 [%rd64+24], %r317;
mov.u32 %r193, 6;
sub.s32 %r194, %r193, %r192;
mul.wide.s32 %rd65, %r194, 4;
add.s64 %rd15, %rd64, %rd65;
ld.local.u32 %r318, [%rd15];
ld.local.u32 %r319, [%rd15+-4];
and.b32 %r58, %r49, 31;
setp.eq.s32 %p30, %r58, 0;
@%p30 bra BB0_36;
mov.u32 %r195, 32;
sub.s32 %r196, %r195, %r58;
shr.u32 %r197, %r319, %r196;
shl.b32 %r198, %r318, %r58;
add.s32 %r318, %r197, %r198;
ld.local.u32 %r199, [%rd15+-8];
shr.u32 %r200, %r199, %r196;
shl.b32 %r201, %r319, %r58;
add.s32 %r319, %r200, %r201;
BB0_36:
shr.u32 %r202, %r319, 30;
shl.b32 %r203, %r318, 2;
add.s32 %r320, %r202, %r203;
shl.b32 %r64, %r319, 2;
shr.u32 %r204, %r320, 31;
shr.u32 %r205, %r318, 30;
add.s32 %r65, %r204, %r205;
setp.eq.s32 %p31, %r204, 0;
@%p31 bra BB0_37;
bra.uni BB0_38;
BB0_37:
mov.u32 %r321, %r55;
mov.u32 %r322, %r64;
bra.uni BB0_39;
BB0_38:
not.b32 %r206, %r320;
neg.s32 %r322, %r64;
setp.eq.s32 %p32, %r64, 0;
selp.u32 %r207, 1, 0, %p32;
add.s32 %r320, %r207, %r206;
xor.b32 %r321, %r55, -2147483648;
BB0_39:
clz.b32 %r324, %r320;
setp.eq.s32 %p33, %r324, 0;
shl.b32 %r208, %r320, %r324;
mov.u32 %r209, 32;
sub.s32 %r210, %r209, %r324;
shr.u32 %r211, %r322, %r210;
add.s32 %r212, %r211, %r208;
selp.b32 %r73, %r320, %r212, %p33;
mov.u32 %r213, -921707870;
mul.hi.u32 %r323, %r73, %r213;
setp.eq.s32 %p34, %r55, 0;
neg.s32 %r214, %r65;
selp.b32 %r325, %r65, %r214, %p34;
setp.lt.s32 %p35, %r323, 1;
@%p35 bra BB0_41;
mul.lo.s32 %r215, %r73, -921707870;
shr.u32 %r216, %r215, 31;
shl.b32 %r217, %r323, 1;
add.s32 %r323, %r216, %r217;
add.s32 %r324, %r324, 1;
BB0_41:
mov.u32 %r218, 126;
sub.s32 %r219, %r218, %r324;
shl.b32 %r220, %r219, 23;
add.s32 %r221, %r323, 1;
shr.u32 %r222, %r221, 7;
add.s32 %r223, %r222, 1;
shr.u32 %r224, %r223, 1;
add.s32 %r225, %r224, %r220;
or.b32 %r226, %r225, %r321;
mov.b32 %f696, %r226;
BB0_42:
mul.rn.f32 %f63, %f696, %f696;
and.b32 %r81, %r325, 1;
setp.eq.s32 %p36, %r81, 0;
@%p36 bra BB0_44;
bra.uni BB0_43;
BB0_44:
mov.f32 %f265, 0f3C08839E;
mov.f32 %f266, 0fB94CA1F9;
fma.rn.f32 %f697, %f266, %f63, %f265;
bra.uni BB0_45;
BB0_43:
mov.f32 %f263, 0fBAB6061A;
mov.f32 %f264, 0f37CCF5CE;
fma.rn.f32 %f697, %f264, %f63, %f263;
BB0_45:
@%p36 bra BB0_47;
bra.uni BB0_46;
BB0_47:
mov.f32 %f270, 0fBE2AAAA3;
fma.rn.f32 %f271, %f697, %f63, %f270;
fma.rn.f32 %f698, %f271, %f63, %f228;
bra.uni BB0_48;
BB0_46:
mov.f32 %f267, 0f3D2AAAA5;
fma.rn.f32 %f268, %f697, %f63, %f267;
mov.f32 %f269, 0fBF000000;
fma.rn.f32 %f698, %f268, %f63, %f269;
BB0_48:
fma.rn.f32 %f699, %f698, %f696, %f696;
@%p36 bra BB0_50;
fma.rn.f32 %f699, %f698, %f63, %f226;
BB0_50:
and.b32 %r227, %r325, 2;
setp.eq.s32 %p39, %r227, 0;
@%p39 bra BB0_52;
mov.f32 %f275, 0fBF800000;
fma.rn.f32 %f699, %f699, %f275, %f228;
BB0_52:
mul.f32 %f284, %f38, %f693;
add.u64 %rd66, %SP, 0;
cvta.to.local.u64 %rd67, %rd66;
mul.f32 %f285, %f38, %f699;
mul.f32 %f286, %f13, %f285;
mul.f32 %f287, %f14, %f285;
mul.f32 %f288, %f15, %f285;
fma.rn.f32 %f289, %f22, %f284, %f286;
fma.rn.f32 %f290, %f21, %f284, %f287;
fma.rn.f32 %f291, %f20, %f284, %f288;
fma.rn.f32 %f279, %f674, %f37, %f289;
fma.rn.f32 %f280, %f675, %f37, %f290;
fma.rn.f32 %f281, %f676, %f37, %f291;
mov.f32 %f292, 0f7F7FFFFF;
st.local.v4.f32 [%rd67], {%f226, %f226, %f226, %f292};
ld.global.u32 %r228, [root];
mov.u32 %r229, 0;
mov.f32 %f283, 0f6C4ECB8F;
mov.u32 %r230, 16;
// inline asm
call _rt_trace_64, (%r228, %f10, %f11, %f12, %f279, %f280, %f281, %r229, %f30, %f283, %rd66, %r230);
// inline asm
ld.local.v4.f32 {%f294, %f295, %f296, %f297}, [%rd67];
setp.ltu.f32 %p40, %f297, 0f00000000;
selp.f32 %f302, %f294, 0f00000000, %p40;
selp.f32 %f303, %f295, 0f00000000, %p40;
selp.f32 %f304, %f296, 0f00000000, %p40;
mul.f32 %f305, %f303, 0f3F372474;
fma.rn.f32 %f306, %f302, 0f3E59999A, %f305;
fma.rn.f32 %f307, %f304, 0f3D93A92A, %f306;
fma.rn.f32 %f688, %f279, %f307, %f688;
fma.rn.f32 %f687, %f280, %f307, %f687;
fma.rn.f32 %f686, %f281, %f307, %f686;
mul.f32 %f308, %f675, %f280;
fma.rn.f32 %f309, %f674, %f279, %f308;
fma.rn.f32 %f310, %f676, %f281, %f309;
cvt.sat.f32.f32 %f311, %f310;
fma.rn.f32 %f685, %f311, %f302, %f685;
fma.rn.f32 %f684, %f311, %f303, %f684;
fma.rn.f32 %f683, %f311, %f304, %f683;
add.s32 %r304, %r304, 1;
setp.lt.s32 %p41, %r304, %r1;
@%p41 bra BB0_6;
add.s32 %r302, %r302, 1;
setp.lt.s32 %p42, %r302, %r1;
@%p42 bra BB0_5;
BB0_54:
cvt.rn.f32.u32 %f312, %r4;
cvt.rn.f32.u32 %f313, %r3;
tex.2d.v4.f32.f32 {%f314, %f315, %f316, %f317}, [albedoTex, {%f313, %f312}];
mul.lo.s32 %r231, %r1, %r1;
cvt.rn.f32.s32 %f318, %r231;
rcp.rn.f32 %f319, %f318;
mul.f32 %f320, %f685, %f319;
mul.f32 %f321, %f684, %f319;
mul.f32 %f322, %f683, %f319;
fma.rn.f32 %f323, %f685, %f319, %f320;
fma.rn.f32 %f324, %f684, %f319, %f321;
fma.rn.f32 %f325, %f683, %f319, %f322;
mul.f32 %f87, %f323, %f314;
mul.f32 %f88, %f324, %f315;
mul.f32 %f89, %f325, %f316;
add.f32 %f90, %f162, %f87;
add.f32 %f91, %f163, %f88;
add.f32 %f92, %f164, %f89;
abs.f32 %f326, %f90;
setp.gtu.f32 %p44, %f326, 0f7F800000;
mov.pred %p107, -1;
@%p44 bra BB0_57;
abs.f32 %f327, %f91;
setp.gtu.f32 %p46, %f327, 0f7F800000;
@%p46 bra BB0_57;
abs.f32 %f328, %f92;
setp.gtu.f32 %p107, %f328, 0f7F800000;
BB0_57:
selp.f32 %f93, 0f00000000, %f90, %p107;
selp.f32 %f94, 0f00000000, %f91, %p107;
selp.f32 %f95, 0f00000000, %f92, %p107;
ld.global.u32 %r327, [imageEnabled];
and.b32 %r232, %r327, 1;
setp.eq.b32 %p47, %r232, 1;
@!%p47 bra BB0_92;
bra.uni BB0_58;
BB0_58:
abs.f32 %f97, %f93;
setp.lt.f32 %p48, %f97, 0f00800000;
mul.f32 %f334, %f97, 0f4B800000;
selp.f32 %f335, 0fC3170000, 0fC2FE0000, %p48;
selp.f32 %f336, %f334, %f97, %p48;
mov.b32 %r233, %f336;
and.b32 %r234, %r233, 8388607;
or.b32 %r235, %r234, 1065353216;
mov.b32 %f337, %r235;
shr.u32 %r236, %r233, 23;
cvt.rn.f32.u32 %f338, %r236;
add.f32 %f339, %f335, %f338;
setp.gt.f32 %p49, %f337, 0f3FB504F3;
mul.f32 %f340, %f337, 0f3F000000;
add.f32 %f341, %f339, 0f3F800000;
selp.f32 %f342, %f340, %f337, %p49;
selp.f32 %f343, %f341, %f339, %p49;
add.f32 %f344, %f342, 0fBF800000;
add.f32 %f330, %f342, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f329,%f330;
// inline asm
add.f32 %f345, %f344, %f344;
mul.f32 %f346, %f329, %f345;
mul.f32 %f347, %f346, %f346;
mov.f32 %f348, 0f3C4CAF63;
mov.f32 %f349, 0f3B18F0FE;
fma.rn.f32 %f350, %f349, %f347, %f348;
mov.f32 %f351, 0f3DAAAABD;
fma.rn.f32 %f352, %f350, %f347, %f351;
mul.rn.f32 %f353, %f352, %f347;
mul.rn.f32 %f354, %f353, %f346;
sub.f32 %f355, %f344, %f346;
neg.f32 %f356, %f346;
add.f32 %f357, %f355, %f355;
fma.rn.f32 %f358, %f356, %f344, %f357;
mul.rn.f32 %f359, %f329, %f358;
add.f32 %f360, %f354, %f346;
sub.f32 %f361, %f346, %f360;
add.f32 %f362, %f354, %f361;
add.f32 %f363, %f359, %f362;
add.f32 %f364, %f360, %f363;
sub.f32 %f365, %f360, %f364;
add.f32 %f366, %f363, %f365;
mov.f32 %f367, 0f3F317200;
mul.rn.f32 %f368, %f343, %f367;
mov.f32 %f369, 0f35BFBE8E;
mul.rn.f32 %f370, %f343, %f369;
add.f32 %f371, %f368, %f364;
sub.f32 %f372, %f368, %f371;
add.f32 %f373, %f364, %f372;
add.f32 %f374, %f366, %f373;
add.f32 %f375, %f370, %f374;
add.f32 %f376, %f371, %f375;
sub.f32 %f377, %f371, %f376;
add.f32 %f378, %f375, %f377;
mov.f32 %f379, 0f3EE66666;
mul.rn.f32 %f380, %f379, %f376;
neg.f32 %f381, %f380;
fma.rn.f32 %f382, %f379, %f376, %f381;
fma.rn.f32 %f383, %f379, %f378, %f382;
mov.f32 %f384, 0f00000000;
fma.rn.f32 %f385, %f384, %f376, %f383;
add.rn.f32 %f386, %f380, %f385;
neg.f32 %f387, %f386;
add.rn.f32 %f388, %f380, %f387;
add.rn.f32 %f389, %f388, %f385;
mov.b32 %r237, %f386;
setp.eq.s32 %p50, %r237, 1118925336;
add.s32 %r238, %r237, -1;
mov.b32 %f390, %r238;
add.f32 %f391, %f389, 0f37000000;
selp.f32 %f392, %f390, %f386, %p50;
selp.f32 %f98, %f391, %f389, %p50;
mul.f32 %f393, %f392, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f394, %f393;
mov.f32 %f395, 0fBF317200;
fma.rn.f32 %f396, %f394, %f395, %f392;
mov.f32 %f397, 0fB5BFBE8E;
fma.rn.f32 %f398, %f394, %f397, %f396;
mul.f32 %f399, %f398, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f400, %f399;
add.f32 %f401, %f394, 0f00000000;
ex2.approx.f32 %f402, %f401;
mul.f32 %f403, %f400, %f402;
setp.lt.f32 %p51, %f392, 0fC2D20000;
selp.f32 %f404, 0f00000000, %f403, %p51;
setp.gt.f32 %p52, %f392, 0f42D20000;
selp.f32 %f707, 0f7F800000, %f404, %p52;
setp.eq.f32 %p53, %f707, 0f7F800000;
@%p53 bra BB0_60;
fma.rn.f32 %f707, %f707, %f98, %f707;
BB0_60:
mov.f32 %f670, 0f3E666666;
cvt.rzi.f32.f32 %f669, %f670;
fma.rn.f32 %f668, %f669, 0fC0000000, 0f3EE66666;
abs.f32 %f667, %f668;
setp.lt.f32 %p54, %f93, 0f00000000;
setp.eq.f32 %p55, %f667, 0f3F800000;
and.pred %p3, %p54, %p55;
mov.b32 %r239, %f707;
xor.b32 %r240, %r239, -2147483648;
mov.b32 %f405, %r240;
selp.f32 %f709, %f405, %f707, %p3;
setp.eq.f32 %p56, %f93, 0f00000000;
@%p56 bra BB0_63;
bra.uni BB0_61;
BB0_63:
add.f32 %f408, %f93, %f93;
selp.f32 %f709, %f408, 0f00000000, %p55;
bra.uni BB0_64;
BB0_61:
setp.geu.f32 %p57, %f93, 0f00000000;
@%p57 bra BB0_64;
mov.f32 %f660, 0f3EE66666;
cvt.rzi.f32.f32 %f407, %f660;
setp.neu.f32 %p58, %f407, 0f3EE66666;
selp.f32 %f709, 0f7FFFFFFF, %f709, %p58;
BB0_64:
abs.f32 %f637, %f93;
add.f32 %f409, %f637, 0f3EE66666;
mov.b32 %r241, %f409;
setp.lt.s32 %p60, %r241, 2139095040;
@%p60 bra BB0_69;
abs.f32 %f658, %f93;
setp.gtu.f32 %p61, %f658, 0f7F800000;
@%p61 bra BB0_68;
bra.uni BB0_66;
BB0_68:
add.f32 %f709, %f93, 0f3EE66666;
bra.uni BB0_69;
BB0_66:
abs.f32 %f659, %f93;
setp.neu.f32 %p62, %f659, 0f7F800000;
@%p62 bra BB0_69;
selp.f32 %f709, 0fFF800000, 0f7F800000, %p3;
BB0_69:
mov.f32 %f646, 0fB5BFBE8E;
mov.f32 %f645, 0fBF317200;
mov.f32 %f644, 0f00000000;
mov.f32 %f643, 0f35BFBE8E;
mov.f32 %f642, 0f3F317200;
mov.f32 %f641, 0f3DAAAABD;
mov.f32 %f640, 0f3C4CAF63;
mov.f32 %f639, 0f3B18F0FE;
mov.f32 %f638, 0f3EE66666;
setp.eq.f32 %p63, %f93, 0f3F800000;
selp.f32 %f109, 0f3F800000, %f709, %p63;
abs.f32 %f110, %f94;
setp.lt.f32 %p64, %f110, 0f00800000;
mul.f32 %f412, %f110, 0f4B800000;
selp.f32 %f413, 0fC3170000, 0fC2FE0000, %p64;
selp.f32 %f414, %f412, %f110, %p64;
mov.b32 %r242, %f414;
and.b32 %r243, %r242, 8388607;
or.b32 %r244, %r243, 1065353216;
mov.b32 %f415, %r244;
shr.u32 %r245, %r242, 23;
cvt.rn.f32.u32 %f416, %r245;
add.f32 %f417, %f413, %f416;
setp.gt.f32 %p65, %f415, 0f3FB504F3;
mul.f32 %f418, %f415, 0f3F000000;
add.f32 %f419, %f417, 0f3F800000;
selp.f32 %f420, %f418, %f415, %p65;
selp.f32 %f421, %f419, %f417, %p65;
add.f32 %f422, %f420, 0fBF800000;
add.f32 %f411, %f420, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f410,%f411;
// inline asm
add.f32 %f423, %f422, %f422;
mul.f32 %f424, %f410, %f423;
mul.f32 %f425, %f424, %f424;
fma.rn.f32 %f428, %f639, %f425, %f640;
fma.rn.f32 %f430, %f428, %f425, %f641;
mul.rn.f32 %f431, %f430, %f425;
mul.rn.f32 %f432, %f431, %f424;
sub.f32 %f433, %f422, %f424;
neg.f32 %f434, %f424;
add.f32 %f435, %f433, %f433;
fma.rn.f32 %f436, %f434, %f422, %f435;
mul.rn.f32 %f437, %f410, %f436;
add.f32 %f438, %f432, %f424;
sub.f32 %f439, %f424, %f438;
add.f32 %f440, %f432, %f439;
add.f32 %f441, %f437, %f440;
add.f32 %f442, %f438, %f441;
sub.f32 %f443, %f438, %f442;
add.f32 %f444, %f441, %f443;
mul.rn.f32 %f446, %f421, %f642;
mul.rn.f32 %f448, %f421, %f643;
add.f32 %f449, %f446, %f442;
sub.f32 %f450, %f446, %f449;
add.f32 %f451, %f442, %f450;
add.f32 %f452, %f444, %f451;
add.f32 %f453, %f448, %f452;
add.f32 %f454, %f449, %f453;
sub.f32 %f455, %f449, %f454;
add.f32 %f456, %f453, %f455;
mul.rn.f32 %f458, %f638, %f454;
neg.f32 %f459, %f458;
fma.rn.f32 %f460, %f638, %f454, %f459;
fma.rn.f32 %f461, %f638, %f456, %f460;
fma.rn.f32 %f463, %f644, %f454, %f461;
add.rn.f32 %f464, %f458, %f463;
neg.f32 %f465, %f464;
add.rn.f32 %f466, %f458, %f465;
add.rn.f32 %f467, %f466, %f463;
mov.b32 %r246, %f464;
setp.eq.s32 %p66, %r246, 1118925336;
add.s32 %r247, %r246, -1;
mov.b32 %f468, %r247;
add.f32 %f469, %f467, 0f37000000;
selp.f32 %f470, %f468, %f464, %p66;
selp.f32 %f111, %f469, %f467, %p66;
mul.f32 %f471, %f470, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f472, %f471;
fma.rn.f32 %f474, %f472, %f645, %f470;
fma.rn.f32 %f476, %f472, %f646, %f474;
mul.f32 %f477, %f476, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f478, %f477;
add.f32 %f479, %f472, 0f00000000;
ex2.approx.f32 %f480, %f479;
mul.f32 %f481, %f478, %f480;
setp.lt.f32 %p67, %f470, 0fC2D20000;
selp.f32 %f482, 0f00000000, %f481, %p67;
setp.gt.f32 %p68, %f470, 0f42D20000;
selp.f32 %f710, 0f7F800000, %f482, %p68;
setp.eq.f32 %p69, %f710, 0f7F800000;
@%p69 bra BB0_71;
fma.rn.f32 %f710, %f710, %f111, %f710;
BB0_71:
setp.lt.f32 %p70, %f94, 0f00000000;
and.pred %p4, %p70, %p55;
mov.b32 %r248, %f710;
xor.b32 %r249, %r248, -2147483648;
mov.b32 %f483, %r249;
selp.f32 %f712, %f483, %f710, %p4;
setp.eq.f32 %p72, %f94, 0f00000000;
@%p72 bra BB0_74;
bra.uni BB0_72;
BB0_74:
add.f32 %f486, %f94, %f94;
selp.f32 %f712, %f486, 0f00000000, %p55;
bra.uni BB0_75;
BB0_72:
setp.geu.f32 %p73, %f94, 0f00000000;
@%p73 bra BB0_75;
mov.f32 %f657, 0f3EE66666;
cvt.rzi.f32.f32 %f485, %f657;
setp.neu.f32 %p74, %f485, 0f3EE66666;
selp.f32 %f712, 0f7FFFFFFF, %f712, %p74;
BB0_75:
abs.f32 %f661, %f94;
add.f32 %f487, %f661, 0f3EE66666;
mov.b32 %r250, %f487;
setp.lt.s32 %p76, %r250, 2139095040;
@%p76 bra BB0_80;
abs.f32 %f662, %f94;
setp.gtu.f32 %p77, %f662, 0f7F800000;
@%p77 bra BB0_79;
bra.uni BB0_77;
BB0_79:
add.f32 %f712, %f94, 0f3EE66666;
bra.uni BB0_80;
BB0_77:
abs.f32 %f663, %f94;
setp.neu.f32 %p78, %f663, 0f7F800000;
@%p78 bra BB0_80;
selp.f32 %f712, 0fFF800000, 0f7F800000, %p4;
BB0_80:
mov.f32 %f655, 0fB5BFBE8E;
mov.f32 %f654, 0fBF317200;
mov.f32 %f653, 0f00000000;
mov.f32 %f652, 0f35BFBE8E;
mov.f32 %f651, 0f3F317200;
mov.f32 %f650, 0f3DAAAABD;
mov.f32 %f649, 0f3C4CAF63;
mov.f32 %f648, 0f3B18F0FE;
mov.f32 %f647, 0f3EE66666;
setp.eq.f32 %p79, %f94, 0f3F800000;
selp.f32 %f122, 0f3F800000, %f712, %p79;
abs.f32 %f123, %f95;
setp.lt.f32 %p80, %f123, 0f00800000;
mul.f32 %f490, %f123, 0f4B800000;
selp.f32 %f491, 0fC3170000, 0fC2FE0000, %p80;
selp.f32 %f492, %f490, %f123, %p80;
mov.b32 %r251, %f492;
and.b32 %r252, %r251, 8388607;
or.b32 %r253, %r252, 1065353216;
mov.b32 %f493, %r253;
shr.u32 %r254, %r251, 23;
cvt.rn.f32.u32 %f494, %r254;
add.f32 %f495, %f491, %f494;
setp.gt.f32 %p81, %f493, 0f3FB504F3;
mul.f32 %f496, %f493, 0f3F000000;
add.f32 %f497, %f495, 0f3F800000;
selp.f32 %f498, %f496, %f493, %p81;
selp.f32 %f499, %f497, %f495, %p81;
add.f32 %f500, %f498, 0fBF800000;
add.f32 %f489, %f498, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f488,%f489;
// inline asm
add.f32 %f501, %f500, %f500;
mul.f32 %f502, %f488, %f501;
mul.f32 %f503, %f502, %f502;
fma.rn.f32 %f506, %f648, %f503, %f649;
fma.rn.f32 %f508, %f506, %f503, %f650;
mul.rn.f32 %f509, %f508, %f503;
mul.rn.f32 %f510, %f509, %f502;
sub.f32 %f511, %f500, %f502;
neg.f32 %f512, %f502;
add.f32 %f513, %f511, %f511;
fma.rn.f32 %f514, %f512, %f500, %f513;
mul.rn.f32 %f515, %f488, %f514;
add.f32 %f516, %f510, %f502;
sub.f32 %f517, %f502, %f516;
add.f32 %f518, %f510, %f517;
add.f32 %f519, %f515, %f518;
add.f32 %f520, %f516, %f519;
sub.f32 %f521, %f516, %f520;
add.f32 %f522, %f519, %f521;
mul.rn.f32 %f524, %f499, %f651;
mul.rn.f32 %f526, %f499, %f652;
add.f32 %f527, %f524, %f520;
sub.f32 %f528, %f524, %f527;
add.f32 %f529, %f520, %f528;
add.f32 %f530, %f522, %f529;
add.f32 %f531, %f526, %f530;
add.f32 %f532, %f527, %f531;
sub.f32 %f533, %f527, %f532;
add.f32 %f534, %f531, %f533;
mul.rn.f32 %f536, %f647, %f532;
neg.f32 %f537, %f536;
fma.rn.f32 %f538, %f647, %f532, %f537;
fma.rn.f32 %f539, %f647, %f534, %f538;
fma.rn.f32 %f541, %f653, %f532, %f539;
add.rn.f32 %f542, %f536, %f541;
neg.f32 %f543, %f542;
add.rn.f32 %f544, %f536, %f543;
add.rn.f32 %f545, %f544, %f541;
mov.b32 %r255, %f542;
setp.eq.s32 %p82, %r255, 1118925336;
add.s32 %r256, %r255, -1;
mov.b32 %f546, %r256;
add.f32 %f547, %f545, 0f37000000;
selp.f32 %f548, %f546, %f542, %p82;
selp.f32 %f124, %f547, %f545, %p82;
mul.f32 %f549, %f548, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f550, %f549;
fma.rn.f32 %f552, %f550, %f654, %f548;
fma.rn.f32 %f554, %f550, %f655, %f552;
mul.f32 %f555, %f554, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f556, %f555;
add.f32 %f557, %f550, 0f00000000;
ex2.approx.f32 %f558, %f557;
mul.f32 %f559, %f556, %f558;
setp.lt.f32 %p83, %f548, 0fC2D20000;
selp.f32 %f560, 0f00000000, %f559, %p83;
setp.gt.f32 %p84, %f548, 0f42D20000;
selp.f32 %f713, 0f7F800000, %f560, %p84;
setp.eq.f32 %p85, %f713, 0f7F800000;
@%p85 bra BB0_82;
fma.rn.f32 %f713, %f713, %f124, %f713;
BB0_82:
setp.lt.f32 %p86, %f95, 0f00000000;
and.pred %p5, %p86, %p55;
mov.b32 %r257, %f713;
xor.b32 %r258, %r257, -2147483648;
mov.b32 %f561, %r258;
selp.f32 %f715, %f561, %f713, %p5;
setp.eq.f32 %p88, %f95, 0f00000000;
@%p88 bra BB0_85;
bra.uni BB0_83;
BB0_85:
add.f32 %f564, %f95, %f95;
selp.f32 %f715, %f564, 0f00000000, %p55;
bra.uni BB0_86;
BB0_83:
setp.geu.f32 %p89, %f95, 0f00000000;
@%p89 bra BB0_86;
mov.f32 %f656, 0f3EE66666;
cvt.rzi.f32.f32 %f563, %f656;
setp.neu.f32 %p90, %f563, 0f3EE66666;
selp.f32 %f715, 0f7FFFFFFF, %f715, %p90;
BB0_86:
abs.f32 %f664, %f95;
add.f32 %f565, %f664, 0f3EE66666;
mov.b32 %r259, %f565;
setp.lt.s32 %p92, %r259, 2139095040;
@%p92 bra BB0_91;
abs.f32 %f665, %f95;
setp.gtu.f32 %p93, %f665, 0f7F800000;
@%p93 bra BB0_90;
bra.uni BB0_88;
BB0_90:
add.f32 %f715, %f95, 0f3EE66666;
bra.uni BB0_91;
BB0_88:
abs.f32 %f666, %f95;
setp.neu.f32 %p94, %f666, 0f7F800000;
@%p94 bra BB0_91;
selp.f32 %f715, 0fFF800000, 0f7F800000, %p5;
BB0_91:
mov.u32 %r293, 4;
mov.u64 %rd132, 0;
mov.u32 %r292, 2;
setp.eq.f32 %p95, %f95, 0f3F800000;
selp.f32 %f566, 0f3F800000, %f715, %p95;
cvt.u64.u32 %rd72, %r4;
cvt.u64.u32 %rd71, %r3;
mov.u64 %rd75, image;
cvta.global.u64 %rd70, %rd75;
// inline asm
call (%rd69), _rt_buffer_get_64, (%rd70, %r292, %r293, %rd71, %rd72, %rd132, %rd132);
// inline asm
cvt.sat.f32.f32 %f567, %f566;
mul.f32 %f568, %f567, 0f437FFD71;
cvt.rzi.u32.f32 %r262, %f568;
cvt.sat.f32.f32 %f569, %f122;
mul.f32 %f570, %f569, 0f437FFD71;
cvt.rzi.u32.f32 %r263, %f570;
cvt.sat.f32.f32 %f571, %f109;
mul.f32 %f572, %f571, 0f437FFD71;
cvt.rzi.u32.f32 %r264, %f572;
cvt.u16.u32 %rs16, %r262;
cvt.u16.u32 %rs17, %r264;
cvt.u16.u32 %rs18, %r263;
mov.u16 %rs19, 255;
st.v4.u8 [%rd69], {%rs16, %rs18, %rs17, %rs19};
ld.global.u32 %r327, [imageEnabled];
BB0_92:
and.b32 %r265, %r327, 4;
setp.eq.s32 %p96, %r265, 0;
@%p96 bra BB0_94;
mov.u32 %r295, 8;
mov.u64 %rd133, 0;
mov.u32 %r294, 2;
cvt.u64.u32 %rd78, %r3;
cvt.u64.u32 %rd79, %r4;
mov.u64 %rd82, image_HDR;
cvta.global.u64 %rd77, %rd82;
// inline asm
call (%rd76), _rt_buffer_get_64, (%rd77, %r294, %r295, %rd78, %rd79, %rd133, %rd133);
// inline asm
mov.f32 %f576, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs23, %f576;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs22, %f95;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs21, %f94;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs20, %f93;}
// inline asm
st.v4.u16 [%rd76], {%rs20, %rs21, %rs22, %rs23};
ld.global.u32 %r327, [imageEnabled];
BB0_94:
and.b32 %r268, %r327, 16;
setp.eq.s32 %p97, %r268, 0;
@%p97 bra BB0_96;
mov.u32 %r297, 8;
mov.u64 %rd134, 0;
mov.u32 %r296, 2;
cvt.u64.u32 %rd85, %r3;
cvt.u64.u32 %rd86, %r4;
mov.u64 %rd89, image_HDR2;
cvta.global.u64 %rd84, %rd89;
// inline asm
call (%rd83), _rt_buffer_get_64, (%rd84, %r296, %r297, %rd85, %rd86, %rd134, %rd134);
// inline asm
mov.f32 %f580, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs27, %f580;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs26, %f89;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs25, %f88;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs24, %f87;}
// inline asm
st.v4.u16 [%rd83], {%rs24, %rs25, %rs26, %rs27};
ld.global.u32 %r327, [imageEnabled];
BB0_96:
and.b32 %r271, %r327, 64;
setp.eq.s32 %p98, %r271, 0;
@%p98 bra BB0_112;
mov.u32 %r299, 4;
mov.u64 %rd135, 0;
mov.u32 %r298, 2;
mul.f32 %f581, %f163, 0f3F372474;
fma.rn.f32 %f582, %f162, 0f3E59999A, %f581;
fma.rn.f32 %f135, %f164, 0f3D93A92A, %f582;
cvt.u64.u32 %rd93, %r4;
cvt.u64.u32 %rd92, %r3;
mov.u64 %rd96, lightmapDirectDir;
cvta.global.u64 %rd91, %rd96;
// inline asm
call (%rd90), _rt_buffer_get_64, (%rd91, %r298, %r299, %rd92, %rd93, %rd135, %rd135);
// inline asm
ld.v4.u8 {%rs28, %rs29, %rs30, %rs31}, [%rd90];
cvt.rn.f32.u16 %f583, %rs28;
div.rn.f32 %f584, %f583, 0f437F0000;
fma.rn.f32 %f585, %f584, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f586, %rs29;
div.rn.f32 %f587, %f586, 0f437F0000;
fma.rn.f32 %f588, %f587, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f589, %rs30;
div.rn.f32 %f590, %f589, 0f437F0000;
fma.rn.f32 %f591, %f590, 0f40000000, 0fBF800000;
mul.f32 %f592, %f588, %f588;
fma.rn.f32 %f593, %f585, %f585, %f592;
fma.rn.f32 %f594, %f591, %f591, %f593;
sqrt.rn.f32 %f595, %f594;
rcp.rn.f32 %f596, %f595;
mul.f32 %f716, %f585, %f596;
mul.f32 %f717, %f588, %f596;
mul.f32 %f718, %f591, %f596;
abs.f32 %f597, %f688;
setp.gt.f32 %p99, %f597, 0f00000000;
@%p99 bra BB0_100;
abs.f32 %f598, %f687;
setp.gt.f32 %p100, %f598, 0f00000000;
@%p100 bra BB0_100;
abs.f32 %f599, %f686;
setp.leu.f32 %p101, %f599, 0f00000000;
@%p101 bra BB0_103;
BB0_100:
ld.global.u8 %rs32, [imageEnabled];
and.b16 %rs33, %rs32, 16;
setp.ne.s16 %p102, %rs33, 0;
@%p102 bra BB0_101;
bra.uni BB0_102;
BB0_101:
mov.f32 %f716, %f688;
mov.f32 %f717, %f687;
mov.f32 %f718, %f686;
bra.uni BB0_103;
BB0_102:
mul.f32 %f600, %f687, %f687;
fma.rn.f32 %f601, %f688, %f688, %f600;
fma.rn.f32 %f602, %f686, %f686, %f601;
sqrt.rn.f32 %f603, %f602;
rcp.rn.f32 %f604, %f603;
mul.f32 %f605, %f688, %f604;
mul.f32 %f606, %f687, %f604;
mul.f32 %f607, %f686, %f604;
mul.f32 %f608, %f88, 0f3F372474;
fma.rn.f32 %f609, %f87, 0f3E59999A, %f608;
fma.rn.f32 %f610, %f89, 0f3D93A92A, %f609;
mul.f32 %f611, %f610, %f605;
mul.f32 %f612, %f610, %f606;
mul.f32 %f613, %f610, %f607;
fma.rn.f32 %f716, %f135, %f716, %f611;
fma.rn.f32 %f717, %f135, %f717, %f612;
fma.rn.f32 %f718, %f135, %f718, %f613;
BB0_103:
mov.u32 %r301, 4;
mov.u64 %rd136, 0;
mov.u32 %r300, 2;
mul.f32 %f614, %f717, %f717;
fma.rn.f32 %f615, %f716, %f716, %f614;
fma.rn.f32 %f616, %f718, %f718, %f615;
sqrt.rn.f32 %f617, %f616;
rcp.rn.f32 %f618, %f617;
mul.f32 %f619, %f716, %f618;
mul.f32 %f620, %f717, %f618;
mul.f32 %f621, %f718, %f618;
mul.f32 %f622, %f675, %f620;
fma.rn.f32 %f623, %f674, %f619, %f622;
fma.rn.f32 %f624, %f676, %f621, %f623;
fma.rn.f32 %f625, %f624, 0f3F000000, 0f3F000000;
mov.f32 %f626, 0f3B808081;
max.f32 %f627, %f625, %f626;
mul.f32 %f628, %f627, 0f437F0000;
cvt.rzi.s32.f32 %r276, %f628;
mov.u64 %rd103, image_Dir;
cvta.global.u64 %rd98, %rd103;
// inline asm
call (%rd97), _rt_buffer_get_64, (%rd98, %r300, %r301, %rd92, %rd93, %rd136, %rd136);
// inline asm
fma.rn.f32 %f629, %f619, 0f3F000000, 0f3F000000;
mul.f32 %f630, %f629, 0f437F0000;
cvt.rzi.u32.f32 %r277, %f630;
fma.rn.f32 %f631, %f620, 0f3F000000, 0f3F000000;
mul.f32 %f632, %f631, 0f437F0000;
cvt.rzi.u32.f32 %r278, %f632;
fma.rn.f32 %f633, %f621, 0f3F000000, 0f3F000000;
mul.f32 %f634, %f633, 0f437F0000;
cvt.rzi.u32.f32 %r279, %f634;
cvt.u16.u32 %rs34, %r276;
cvt.u16.u32 %rs35, %r279;
cvt.u16.u32 %rs36, %r278;
cvt.u16.u32 %rs37, %r277;
st.v4.u8 [%rd97], {%rs37, %rs36, %rs35, %rs34};
BB0_112:
ret;
}