2098 lines
59 KiB
Plaintext
2098 lines
59 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<193>;
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.reg .b16 %rs<57>;
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.reg .f32 %f<1162>;
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.reg .b32 %r<448>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<95>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r58), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r59), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+616];
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abs.s32 %r4, %r3;
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ld.const.u32 %r5, [params+540];
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ld.const.u64 %rd26, [params+400];
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cvta.to.global.u64 %rd27, %rd26;
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ld.const.u32 %r64, [params+392];
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mad.lo.s32 %r65, %r64, %r59, %r58;
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mul.wide.u32 %rd28, %r65, 4;
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add.s64 %rd2, %rd27, %rd28;
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ld.global.v2.u8 {%rs7, %rs56}, [%rd2];
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or.b16 %rs9, %rs7, %rs56;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p10, %rs10, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs55, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs55, [%rd2+2];
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setp.eq.s16 %p11, %rs55, 0;
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mov.f32 %f1113, 0f00000000;
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mov.u16 %rs56, 0;
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mov.f32 %f1114, %f1113;
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mov.f32 %f1115, %f1113;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f196, %rs7;
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div.rn.f32 %f197, %f196, 0f437F0000;
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fma.rn.f32 %f198, %f197, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs56, 255;
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cvt.rn.f32.u16 %f199, %rs13;
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div.rn.f32 %f200, %f199, 0f437F0000;
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fma.rn.f32 %f201, %f200, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f202, %rs55;
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div.rn.f32 %f203, %f202, 0f437F0000;
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fma.rn.f32 %f204, %f203, 0f40000000, 0fBF800000;
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mul.f32 %f205, %f201, %f201;
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fma.rn.f32 %f206, %f198, %f198, %f205;
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fma.rn.f32 %f207, %f204, %f204, %f206;
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sqrt.rn.f32 %f208, %f207;
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rcp.rn.f32 %f209, %f208;
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mul.f32 %f1115, %f209, %f204;
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mul.f32 %f1114, %f209, %f201;
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mul.f32 %f1113, %f198, %f209;
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$L__BB0_4:
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ld.const.v2.u32 {%r66, %r67}, [params];
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add.s32 %r6, %r66, %r58;
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add.s32 %r7, %r67, %r59;
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setp.eq.f32 %p12, %f1113, 0f00000000;
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setp.eq.f32 %p13, %f1114, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1115, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_148;
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bra.uni $L__BB0_5;
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$L__BB0_148:
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ld.const.u32 %r57, [params+104];
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and.b32 %r420, %r57, 1;
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setp.eq.b32 %p185, %r420, 1;
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mov.pred %p186, 0;
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xor.pred %p187, %p185, %p186;
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not.pred %p188, %p187;
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@%p188 bra $L__BB0_150;
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ld.const.u64 %rd77, [params+144];
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cvta.to.global.u64 %rd78, %rd77;
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ld.const.u32 %r421, [params+136];
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mad.lo.s32 %r422, %r421, %r7, %r6;
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mul.wide.u32 %rd79, %r422, 4;
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add.s64 %rd80, %rd78, %rd79;
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mov.u16 %rs37, 0;
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st.global.v4.u8 [%rd80], {%rs37, %rs37, %rs37, %rs37};
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$L__BB0_150:
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and.b32 %r423, %r57, 8;
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setp.eq.s32 %p189, %r423, 0;
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@%p189 bra $L__BB0_152;
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ld.const.u64 %rd81, [params+192];
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cvta.to.global.u64 %rd82, %rd81;
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ld.const.u32 %r424, [params+184];
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mad.lo.s32 %r425, %r424, %r7, %r6;
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mov.f32 %f1095, 0f00000000;
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cvt.rzi.u32.f32 %r426, %f1095;
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mul.wide.u32 %rd83, %r425, 2;
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add.s64 %rd84, %rd82, %rd83;
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mov.u16 %rs38, 0;
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cvt.u16.u32 %rs39, %r426;
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st.global.v2.u8 [%rd84], {%rs39, %rs38};
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$L__BB0_152:
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and.b32 %r427, %r57, 4;
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setp.eq.s32 %p190, %r427, 0;
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@%p190 bra $L__BB0_156;
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ld.const.u32 %r428, [params+108];
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setp.eq.s32 %p191, %r428, 0;
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ld.const.u64 %rd85, [params+224];
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cvta.to.global.u64 %rd86, %rd85;
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ld.const.u32 %r429, [params+216];
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mad.lo.s32 %r430, %r429, %r7, %r6;
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mul.wide.u32 %rd87, %r430, 8;
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add.s64 %rd24, %rd86, %rd87;
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@%p191 bra $L__BB0_155;
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ld.global.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd24];
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// begin inline asm
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{ cvt.f32.f16 %f1096, %rs46;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1097, %rs47;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1098, %rs48;}
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// end inline asm
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add.f32 %f1099, %f1096, 0f00000000;
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add.f32 %f1100, %f1097, 0f00000000;
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add.f32 %f1101, %f1098, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs45, %f1101;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs44, %f1100;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs43, %f1099;}
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// end inline asm
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mov.u16 %rs50, 0;
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st.global.v4.u16 [%rd24], {%rs43, %rs44, %rs45, %rs50};
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bra.uni $L__BB0_156;
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$L__BB0_5:
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ld.const.u64 %rd29, [params+432];
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cvta.to.global.u64 %rd30, %rd29;
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ld.const.u32 %r71, [params+424];
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mad.lo.s32 %r72, %r71, %r59, %r58;
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mul.wide.u32 %rd31, %r72, 12;
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add.s64 %rd32, %rd30, %rd31;
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ld.global.f32 %f10, [%rd32];
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mul.f32 %f212, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd32+4];
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mul.f32 %f213, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd32+8];
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mul.f32 %f214, %f12, 0f3456BF95;
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abs.f32 %f13, %f1113;
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div.rn.f32 %f215, %f212, %f13;
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abs.f32 %f216, %f1114;
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div.rn.f32 %f217, %f213, %f216;
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abs.f32 %f14, %f1115;
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div.rn.f32 %f218, %f214, %f14;
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abs.f32 %f219, %f215;
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abs.f32 %f220, %f217;
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abs.f32 %f221, %f218;
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mov.f32 %f222, 0f38D1B717;
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max.f32 %f223, %f219, %f222;
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max.f32 %f224, %f220, %f222;
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max.f32 %f225, %f221, %f222;
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fma.rn.f32 %f15, %f1113, %f223, %f10;
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fma.rn.f32 %f16, %f1114, %f224, %f11;
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fma.rn.f32 %f17, %f1115, %f225, %f12;
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ld.const.u64 %rd33, [params+128];
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cvta.to.global.u64 %rd34, %rd33;
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ld.const.u32 %r73, [params+120];
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mad.lo.s32 %r74, %r73, %r59, %r58;
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mul.wide.u32 %rd35, %r74, 4;
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add.s64 %rd36, %rd34, %rd35;
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ld.global.u32 %r440, [%rd36];
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setp.lt.s32 %p18, %r4, 1;
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mov.pred %p17, 0;
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mov.u32 %r436, 0;
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mov.f32 %f1121, 0f00000000;
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mov.f32 %f1122, %f1121;
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mov.pred %p192, %p17;
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@%p18 bra $L__BB0_25;
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ld.const.f32 %f18, [params+620];
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ld.const.u64 %rd37, [params+624];
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cvta.to.global.u64 %rd3, %rd37;
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ld.const.u64 %rd38, [params+640];
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cvta.to.global.u64 %rd39, %rd38;
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ld.const.u32 %r77, [params+632];
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and.b32 %r78, %r59, 255;
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and.b32 %r79, %r58, 255;
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mad.lo.s32 %r80, %r77, %r78, %r79;
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mul.wide.u32 %rd40, %r80, 3;
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add.s64 %rd4, %rd39, %rd40;
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ld.const.f32 %f19, [params+660];
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mul.f32 %f20, %f15, 0f3456BF95;
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mul.f32 %f21, %f16, 0f3456BF95;
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mul.f32 %f22, %f17, 0f3456BF95;
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ld.const.u64 %rd5, [params+96];
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abs.f32 %f356, %f21;
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abs.f32 %f357, %f20;
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max.f32 %f358, %f357, %f356;
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abs.f32 %f359, %f22;
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max.f32 %f360, %f358, %f359;
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mov.u32 %r433, %r436;
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$L__BB0_7:
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shl.b32 %r81, %r433, 1;
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mul.wide.s32 %rd41, %r81, 12;
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add.s64 %rd6, %rd3, %rd41;
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ld.global.f32 %f228, [%rd6];
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sub.f32 %f229, %f228, %f10;
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ld.global.f32 %f230, [%rd6+4];
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sub.f32 %f231, %f230, %f11;
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ld.global.f32 %f232, [%rd6+8];
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sub.f32 %f233, %f232, %f12;
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mul.f32 %f234, %f231, %f231;
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fma.rn.f32 %f235, %f229, %f229, %f234;
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fma.rn.f32 %f236, %f233, %f233, %f235;
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sqrt.rn.f32 %f25, %f236;
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rcp.rn.f32 %f237, %f25;
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mul.f32 %f26, %f229, %f237;
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mul.f32 %f27, %f231, %f237;
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mul.f32 %f28, %f233, %f237;
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mul.f32 %f238, %f1114, %f27;
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fma.rn.f32 %f239, %f1113, %f26, %f238;
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fma.rn.f32 %f29, %f1115, %f28, %f239;
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setp.leu.f32 %p19, %f29, 0f00000000;
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@%p19 bra $L__BB0_24;
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setp.ne.s32 %p21, %r5, 0;
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mul.f32 %f240, %f25, %f25;
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div.rn.f32 %f30, %f18, %f240;
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ld.global.u8 %rs15, [%rd4];
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cvt.rn.f32.u16 %f241, %rs15;
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div.rn.f32 %f242, %f241, 0fC37F0000;
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fma.rn.f32 %f243, %f242, 0f3F333333, 0f3F800000;
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setp.gt.f32 %p22, %f30, %f243;
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and.pred %p23, %p21, %p22;
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mov.pred %p192, -1;
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@%p23 bra $L__BB0_25;
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mul.f32 %f31, %f25, %f19;
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mov.f32 %f248, 0f40800000;
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abs.f32 %f33, %f31;
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setp.lt.f32 %p24, %f33, 0f00800000;
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mul.f32 %f250, %f33, 0f4B800000;
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selp.f32 %f251, %f250, %f33, %p24;
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selp.f32 %f252, 0fC3170000, 0fC2FE0000, %p24;
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mov.b32 %r82, %f251;
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and.b32 %r83, %r82, 8388607;
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or.b32 %r84, %r83, 1065353216;
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mov.b32 %f253, %r84;
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shr.u32 %r85, %r82, 23;
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cvt.rn.f32.u32 %f254, %r85;
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add.f32 %f255, %f252, %f254;
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setp.gt.f32 %p25, %f253, 0f3FB504F3;
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mul.f32 %f256, %f253, 0f3F000000;
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add.f32 %f257, %f255, 0f3F800000;
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selp.f32 %f258, %f257, %f255, %p25;
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selp.f32 %f259, %f256, %f253, %p25;
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add.f32 %f260, %f259, 0fBF800000;
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add.f32 %f261, %f259, 0f3F800000;
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rcp.approx.ftz.f32 %f262, %f261;
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add.f32 %f263, %f260, %f260;
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mul.f32 %f264, %f263, %f262;
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mul.f32 %f265, %f264, %f264;
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mov.f32 %f266, 0f3C4CAF63;
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mov.f32 %f267, 0f3B18F0FE;
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fma.rn.f32 %f268, %f267, %f265, %f266;
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mov.f32 %f269, 0f3DAAAABD;
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fma.rn.f32 %f270, %f268, %f265, %f269;
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mul.rn.f32 %f271, %f270, %f265;
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mul.rn.f32 %f272, %f271, %f264;
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sub.f32 %f273, %f260, %f264;
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add.f32 %f274, %f273, %f273;
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neg.f32 %f275, %f264;
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fma.rn.f32 %f276, %f275, %f260, %f274;
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mul.rn.f32 %f277, %f262, %f276;
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add.f32 %f278, %f272, %f264;
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sub.f32 %f279, %f264, %f278;
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add.f32 %f280, %f272, %f279;
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add.f32 %f281, %f277, %f280;
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add.f32 %f282, %f278, %f281;
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sub.f32 %f283, %f278, %f282;
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add.f32 %f284, %f281, %f283;
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mov.f32 %f285, 0f3F317200;
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mul.rn.f32 %f286, %f258, %f285;
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mov.f32 %f287, 0f35BFBE8E;
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mul.rn.f32 %f288, %f258, %f287;
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add.f32 %f289, %f286, %f282;
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sub.f32 %f290, %f286, %f289;
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add.f32 %f291, %f282, %f290;
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add.f32 %f292, %f284, %f291;
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add.f32 %f293, %f288, %f292;
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add.f32 %f294, %f289, %f293;
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sub.f32 %f295, %f289, %f294;
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add.f32 %f296, %f293, %f295;
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mul.rn.f32 %f297, %f248, %f294;
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neg.f32 %f298, %f297;
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fma.rn.f32 %f299, %f248, %f294, %f298;
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fma.rn.f32 %f300, %f248, %f296, %f299;
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mov.f32 %f301, 0f00000000;
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fma.rn.f32 %f302, %f301, %f294, %f300;
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add.rn.f32 %f303, %f297, %f302;
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neg.f32 %f304, %f303;
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add.rn.f32 %f305, %f297, %f304;
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add.rn.f32 %f306, %f305, %f302;
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mov.b32 %r86, %f303;
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setp.eq.s32 %p26, %r86, 1118925336;
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add.s32 %r87, %r86, -1;
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mov.b32 %f307, %r87;
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add.f32 %f308, %f306, 0f37000000;
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selp.f32 %f34, %f308, %f306, %p26;
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selp.f32 %f309, %f307, %f303, %p26;
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mov.f32 %f310, 0f3FB8AA3B;
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mul.rn.f32 %f311, %f309, %f310;
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cvt.rzi.f32.f32 %f312, %f311;
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abs.f32 %f313, %f312;
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setp.gt.f32 %p27, %f313, 0f42FC0000;
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mov.b32 %r88, %f312;
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and.b32 %r89, %r88, -2147483648;
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or.b32 %r90, %r89, 1123811328;
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mov.b32 %f314, %r90;
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selp.f32 %f315, %f314, %f312, %p27;
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mov.f32 %f316, 0fBF317218;
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|
fma.rn.f32 %f317, %f315, %f316, %f309;
|
|
mov.f32 %f318, 0f3102E308;
|
|
fma.rn.f32 %f319, %f315, %f318, %f317;
|
|
mul.f32 %f320, %f319, 0f3FB8AA3B;
|
|
add.f32 %f321, %f315, 0f4B40007F;
|
|
mov.b32 %r91, %f321;
|
|
shl.b32 %r92, %r91, 23;
|
|
mov.b32 %f322, %r92;
|
|
ex2.approx.ftz.f32 %f323, %f320;
|
|
mul.f32 %f35, %f323, %f322;
|
|
setp.eq.f32 %p28, %f35, 0f7F800000;
|
|
mov.f32 %f1118, 0f7F800000;
|
|
@%p28 bra $L__BB0_11;
|
|
|
|
fma.rn.f32 %f1118, %f35, %f34, %f35;
|
|
|
|
$L__BB0_11:
|
|
mov.f32 %f1110, 0f40000000;
|
|
cvt.rzi.f32.f32 %f1109, %f1110;
|
|
add.f32 %f1108, %f1109, %f1109;
|
|
mov.f32 %f1107, 0f40800000;
|
|
sub.f32 %f1106, %f1107, %f1108;
|
|
abs.f32 %f1105, %f1106;
|
|
setp.lt.f32 %p29, %f31, 0f00000000;
|
|
setp.eq.f32 %p30, %f1105, 0f3F800000;
|
|
and.pred %p1, %p29, %p30;
|
|
setp.eq.f32 %p31, %f31, 0f00000000;
|
|
@%p31 bra $L__BB0_15;
|
|
bra.uni $L__BB0_12;
|
|
|
|
$L__BB0_15:
|
|
add.f32 %f328, %f31, %f31;
|
|
selp.f32 %f1120, %f328, 0f00000000, %p30;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_12:
|
|
mov.b32 %r93, %f1118;
|
|
xor.b32 %r94, %r93, -2147483648;
|
|
mov.b32 %f324, %r94;
|
|
selp.f32 %f1120, %f324, %f1118, %p1;
|
|
setp.geu.f32 %p32, %f31, 0f00000000;
|
|
@%p32 bra $L__BB0_16;
|
|
|
|
mov.f32 %f325, 0f40800000;
|
|
cvt.rzi.f32.f32 %f326, %f325;
|
|
setp.eq.f32 %p33, %f326, 0f40800000;
|
|
@%p33 bra $L__BB0_16;
|
|
|
|
mov.f32 %f1120, 0f7FFFFFFF;
|
|
|
|
$L__BB0_16:
|
|
add.f32 %f329, %f33, 0f40800000;
|
|
mov.b32 %r95, %f329;
|
|
setp.lt.s32 %p35, %r95, 2139095040;
|
|
@%p35 bra $L__BB0_21;
|
|
|
|
setp.gtu.f32 %p36, %f33, 0f7F800000;
|
|
@%p36 bra $L__BB0_20;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_20:
|
|
add.f32 %f1120, %f31, 0f40800000;
|
|
bra.uni $L__BB0_21;
|
|
|
|
$L__BB0_18:
|
|
setp.neu.f32 %p37, %f33, 0f7F800000;
|
|
@%p37 bra $L__BB0_21;
|
|
|
|
selp.f32 %f1120, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_21:
|
|
shl.b32 %r431, %r433, 1;
|
|
mul.wide.s32 %rd89, %r431, 12;
|
|
add.s64 %rd88, %rd3, %rd89;
|
|
mov.f32 %f330, 0f3F800000;
|
|
sub.f32 %f331, %f330, %f1120;
|
|
setp.eq.f32 %p38, %f31, 0f3F800000;
|
|
selp.f32 %f332, 0f00000000, %f331, %p38;
|
|
cvt.sat.f32.f32 %f333, %f332;
|
|
mul.f32 %f334, %f30, %f333;
|
|
ld.global.f32 %f335, [%rd88+12];
|
|
mul.f32 %f336, %f26, %f335;
|
|
ld.global.f32 %f337, [%rd88+16];
|
|
mul.f32 %f338, %f27, %f337;
|
|
neg.f32 %f339, %f338;
|
|
sub.f32 %f340, %f339, %f336;
|
|
ld.global.f32 %f341, [%rd88+20];
|
|
mul.f32 %f342, %f28, %f341;
|
|
sub.f32 %f343, %f340, %f342;
|
|
cvt.sat.f32.f32 %f344, %f343;
|
|
mul.f32 %f44, %f334, %f344;
|
|
cvt.sat.f32.f32 %f45, %f29;
|
|
mul.f32 %f345, %f44, %f45;
|
|
setp.leu.f32 %p39, %f345, 0f3727C5AC;
|
|
@%p39 bra $L__BB0_23;
|
|
|
|
mul.f32 %f355, %f44, 0f3EA2F983;
|
|
mov.f32 %f361, 0f38D1B717;
|
|
max.f32 %f352, %f360, %f361;
|
|
sub.f32 %f353, %f25, %f352;
|
|
mov.f32 %f354, 0f00000000;
|
|
mov.u32 %r132, 2;
|
|
mov.u32 %r134, 1;
|
|
mov.u32 %r135, 1065353216;
|
|
mov.u32 %r166, 0;
|
|
// begin inline asm
|
|
call(%r96,%r97,%r98,%r99,%r100,%r101,%r102,%r103,%r104,%r105,%r106,%r107,%r108,%r109,%r110,%r111,%r112,%r113,%r114,%r115,%r116,%r117,%r118,%r119,%r120,%r121,%r122,%r123,%r124,%r125,%r126,%r127),_optix_trace_typed_32,(%r166,%rd5,%f15,%f16,%f17,%f26,%f27,%f28,%f352,%f353,%f354,%r134,%r166,%r134,%r132,%r134,%r134,%r135,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166);
|
|
// end inline asm
|
|
mov.b32 %f362, %r96;
|
|
mul.f32 %f363, %f355, %f362;
|
|
fma.rn.f32 %f1122, %f45, %f363, %f1122;
|
|
add.f32 %f1121, %f1121, %f362;
|
|
|
|
$L__BB0_23:
|
|
add.s32 %r436, %r436, 1;
|
|
|
|
$L__BB0_24:
|
|
add.s32 %r433, %r433, 1;
|
|
setp.lt.s32 %p41, %r433, %r4;
|
|
mov.pred %p192, %p17;
|
|
@%p41 bra $L__BB0_7;
|
|
|
|
$L__BB0_25:
|
|
cvt.rn.f32.s32 %f364, %r436;
|
|
mov.f32 %f365, 0f3F800000;
|
|
max.f32 %f366, %f364, %f365;
|
|
div.rn.f32 %f1140, %f1122, %f366;
|
|
div.rn.f32 %f1139, %f1121, %f366;
|
|
not.pred %p42, %p192;
|
|
@%p42 bra $L__BB0_56;
|
|
|
|
abs.f32 %f1112, %f1115;
|
|
abs.f32 %f1111, %f1113;
|
|
setp.gt.f32 %p43, %f1111, %f1112;
|
|
selp.f32 %f369, 0f00000000, %f1114, %p43;
|
|
mov.f32 %f1130, 0f00000000;
|
|
neg.f32 %f370, %f1115;
|
|
selp.f32 %f371, %f1113, %f370, %p43;
|
|
neg.f32 %f372, %f1114;
|
|
selp.f32 %f373, %f372, 0f00000000, %p43;
|
|
mul.f32 %f374, %f371, %f371;
|
|
fma.rn.f32 %f375, %f373, %f373, %f374;
|
|
fma.rn.f32 %f376, %f369, %f369, %f375;
|
|
sqrt.rn.f32 %f377, %f376;
|
|
rcp.rn.f32 %f378, %f377;
|
|
mul.f32 %f56, %f373, %f378;
|
|
mul.f32 %f57, %f371, %f378;
|
|
mul.f32 %f58, %f369, %f378;
|
|
setp.lt.s32 %p44, %r5, 1;
|
|
mov.f32 %f1129, %f1130;
|
|
@%p44 bra $L__BB0_55;
|
|
|
|
cvt.rn.f32.s32 %f381, %r5;
|
|
rcp.rn.f32 %f59, %f381;
|
|
mul.f32 %f60, %f15, 0f3456BF95;
|
|
mul.f32 %f61, %f16, 0f3456BF95;
|
|
mul.f32 %f62, %f17, 0f3456BF95;
|
|
ld.const.u64 %rd7, [params+96];
|
|
mul.f32 %f382, %f1113, %f57;
|
|
mul.f32 %f383, %f1114, %f56;
|
|
sub.f32 %f63, %f383, %f382;
|
|
mul.f32 %f384, %f1115, %f56;
|
|
mul.f32 %f385, %f1113, %f58;
|
|
sub.f32 %f64, %f385, %f384;
|
|
mul.f32 %f386, %f1114, %f58;
|
|
mul.f32 %f387, %f1115, %f57;
|
|
sub.f32 %f65, %f387, %f386;
|
|
mov.u32 %r167, 0;
|
|
add.s64 %rd8, %rd1, 24;
|
|
mov.u64 %rd43, __cudart_i2opi_f;
|
|
abs.f32 %f453, %f61;
|
|
abs.f32 %f454, %f60;
|
|
max.f32 %f455, %f454, %f453;
|
|
abs.f32 %f456, %f62;
|
|
max.f32 %f457, %f455, %f456;
|
|
mov.u32 %r437, %r167;
|
|
|
|
$L__BB0_28:
|
|
cvt.rn.f32.s32 %f68, %r437;
|
|
mov.u32 %r439, %r167;
|
|
|
|
$L__BB0_29:
|
|
mad.lo.s32 %r169, %r440, 1664525, 1013904223;
|
|
and.b32 %r170, %r169, 16777215;
|
|
cvt.rn.f32.u32 %f388, %r170;
|
|
fma.rn.f32 %f389, %f388, 0f33800000, %f68;
|
|
mul.f32 %f390, %f59, %f389;
|
|
mad.lo.s32 %r440, %r169, 1664525, 1013904223;
|
|
and.b32 %r171, %r440, 16777215;
|
|
cvt.rn.f32.u32 %f391, %r171;
|
|
cvt.rn.f32.s32 %f392, %r439;
|
|
fma.rn.f32 %f393, %f391, 0f33800000, %f392;
|
|
mul.f32 %f394, %f59, %f393;
|
|
sqrt.rn.f32 %f71, %f390;
|
|
mul.f32 %f72, %f394, 0f40C90FDB;
|
|
mul.f32 %f395, %f72, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r447, %f395;
|
|
cvt.rn.f32.s32 %f396, %r447;
|
|
mov.f32 %f397, 0fBFC90FDA;
|
|
fma.rn.f32 %f398, %f396, %f397, %f72;
|
|
mov.f32 %f399, 0fB3A22168;
|
|
fma.rn.f32 %f400, %f396, %f399, %f398;
|
|
mov.f32 %f401, 0fA7C234C5;
|
|
fma.rn.f32 %f1134, %f396, %f401, %f400;
|
|
abs.f32 %f74, %f72;
|
|
setp.ltu.f32 %p45, %f74, 0f47CE4780;
|
|
mov.u32 %r444, %r447;
|
|
mov.f32 %f1131, %f1134;
|
|
@%p45 bra $L__BB0_37;
|
|
|
|
setp.eq.f32 %p46, %f74, 0f7F800000;
|
|
@%p46 bra $L__BB0_36;
|
|
bra.uni $L__BB0_31;
|
|
|
|
$L__BB0_36:
|
|
mov.f32 %f404, 0f00000000;
|
|
mul.rn.f32 %f1131, %f72, %f404;
|
|
mov.u32 %r444, 0;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_31:
|
|
mov.b32 %r21, %f72;
|
|
bfe.u32 %r173, %r21, 23, 8;
|
|
add.s32 %r22, %r173, -128;
|
|
shl.b32 %r174, %r21, 8;
|
|
or.b32 %r23, %r174, -2147483648;
|
|
shr.u32 %r24, %r22, 5;
|
|
mov.u64 %rd92, 0;
|
|
mov.u32 %r441, 0;
|
|
mov.u64 %rd90, %rd1;
|
|
mov.u64 %rd91, %rd43;
|
|
|
|
$L__BB0_32:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r175, [%rd91];
|
|
mad.wide.u32 %rd45, %r175, %r23, %rd92;
|
|
shr.u64 %rd92, %rd45, 32;
|
|
st.local.u32 [%rd90], %rd45;
|
|
add.s64 %rd91, %rd91, 4;
|
|
add.s64 %rd90, %rd90, 4;
|
|
add.s32 %r441, %r441, 1;
|
|
setp.ne.s32 %p47, %r441, 6;
|
|
@%p47 bra $L__BB0_32;
|
|
|
|
st.local.u32 [%rd8], %rd92;
|
|
mov.u32 %r176, 4;
|
|
sub.s32 %r27, %r176, %r24;
|
|
mov.u32 %r177, 6;
|
|
sub.s32 %r178, %r177, %r24;
|
|
mul.wide.s32 %rd46, %r178, 4;
|
|
add.s64 %rd47, %rd1, %rd46;
|
|
ld.local.u32 %r442, [%rd47];
|
|
ld.local.u32 %r443, [%rd47+-4];
|
|
and.b32 %r30, %r22, 31;
|
|
setp.eq.s32 %p48, %r30, 0;
|
|
@%p48 bra $L__BB0_35;
|
|
|
|
mov.u32 %r179, 32;
|
|
sub.s32 %r180, %r179, %r30;
|
|
shr.u32 %r181, %r443, %r180;
|
|
shl.b32 %r182, %r442, %r30;
|
|
add.s32 %r442, %r181, %r182;
|
|
mul.wide.s32 %rd48, %r27, 4;
|
|
add.s64 %rd49, %rd1, %rd48;
|
|
ld.local.u32 %r183, [%rd49];
|
|
shr.u32 %r184, %r183, %r180;
|
|
shl.b32 %r185, %r443, %r30;
|
|
add.s32 %r443, %r184, %r185;
|
|
|
|
$L__BB0_35:
|
|
and.b32 %r186, %r21, -2147483648;
|
|
shr.u32 %r187, %r443, 30;
|
|
shl.b32 %r188, %r442, 2;
|
|
or.b32 %r189, %r187, %r188;
|
|
shr.u32 %r190, %r189, 31;
|
|
shr.u32 %r191, %r442, 30;
|
|
add.s32 %r192, %r190, %r191;
|
|
neg.s32 %r193, %r192;
|
|
setp.eq.s32 %p49, %r186, 0;
|
|
selp.b32 %r444, %r192, %r193, %p49;
|
|
setp.ne.s32 %p50, %r190, 0;
|
|
xor.b32 %r194, %r186, -2147483648;
|
|
selp.b32 %r195, %r194, %r186, %p50;
|
|
selp.b32 %r196, -1, 0, %p50;
|
|
xor.b32 %r197, %r189, %r196;
|
|
shl.b32 %r198, %r443, 2;
|
|
xor.b32 %r199, %r198, %r196;
|
|
cvt.u64.u32 %rd50, %r197;
|
|
cvt.u64.u32 %rd51, %r199;
|
|
bfi.b64 %rd52, %rd50, %rd51, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd52;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f402, %fd2;
|
|
setp.eq.s32 %p51, %r195, 0;
|
|
neg.f32 %f403, %f402;
|
|
selp.f32 %f1131, %f402, %f403, %p51;
|
|
|
|
$L__BB0_37:
|
|
add.s32 %r37, %r444, 1;
|
|
and.b32 %r38, %r37, 1;
|
|
setp.eq.s32 %p52, %r38, 0;
|
|
selp.f32 %f78, %f1131, 0f3F800000, %p52;
|
|
mul.rn.f32 %f79, %f1131, %f1131;
|
|
mov.f32 %f1132, 0fB94D4153;
|
|
@%p52 bra $L__BB0_39;
|
|
|
|
mov.f32 %f406, 0fBAB607ED;
|
|
mov.f32 %f407, 0f37CBAC00;
|
|
fma.rn.f32 %f1132, %f407, %f79, %f406;
|
|
|
|
$L__BB0_39:
|
|
selp.f32 %f408, 0f3C0885E4, 0f3D2AAABB, %p52;
|
|
fma.rn.f32 %f409, %f1132, %f79, %f408;
|
|
selp.f32 %f410, 0fBE2AAAA8, 0fBEFFFFFF, %p52;
|
|
fma.rn.f32 %f411, %f409, %f79, %f410;
|
|
mov.f32 %f412, 0f00000000;
|
|
fma.rn.f32 %f413, %f79, %f78, %f412;
|
|
fma.rn.f32 %f1133, %f411, %f413, %f78;
|
|
and.b32 %r201, %r37, 2;
|
|
setp.eq.s32 %p54, %r201, 0;
|
|
@%p54 bra $L__BB0_41;
|
|
|
|
mov.f32 %f415, 0fBF800000;
|
|
fma.rn.f32 %f1133, %f1133, %f415, %f412;
|
|
|
|
$L__BB0_41:
|
|
@%p45 bra $L__BB0_49;
|
|
|
|
setp.eq.f32 %p56, %f74, 0f7F800000;
|
|
@%p56 bra $L__BB0_48;
|
|
bra.uni $L__BB0_43;
|
|
|
|
$L__BB0_48:
|
|
mov.f32 %f418, 0f00000000;
|
|
mul.rn.f32 %f1134, %f72, %f418;
|
|
mov.u32 %r447, 0;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_43:
|
|
mov.b32 %r39, %f72;
|
|
bfe.u32 %r202, %r39, 23, 8;
|
|
add.s32 %r40, %r202, -128;
|
|
shl.b32 %r203, %r39, 8;
|
|
or.b32 %r41, %r203, -2147483648;
|
|
shr.u32 %r42, %r40, 5;
|
|
mov.u64 %rd93, 0;
|
|
mov.u64 %rd94, %rd93;
|
|
|
|
$L__BB0_44:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd55, %rd93, 2;
|
|
mov.u64 %rd56, __cudart_i2opi_f;
|
|
add.s64 %rd57, %rd56, %rd55;
|
|
ld.global.nc.u32 %r204, [%rd57];
|
|
mad.wide.u32 %rd58, %r204, %r41, %rd94;
|
|
shr.u64 %rd94, %rd58, 32;
|
|
add.s64 %rd59, %rd1, %rd55;
|
|
st.local.u32 [%rd59], %rd58;
|
|
cvt.u32.u64 %r205, %rd93;
|
|
add.s32 %r206, %r205, 1;
|
|
cvt.s64.s32 %rd93, %r206;
|
|
setp.ne.s32 %p57, %r206, 6;
|
|
@%p57 bra $L__BB0_44;
|
|
|
|
st.local.u32 [%rd8], %rd94;
|
|
mov.u32 %r207, 4;
|
|
sub.s32 %r43, %r207, %r42;
|
|
mov.u32 %r208, 6;
|
|
sub.s32 %r209, %r208, %r42;
|
|
mul.wide.s32 %rd60, %r209, 4;
|
|
add.s64 %rd61, %rd1, %rd60;
|
|
ld.local.u32 %r445, [%rd61];
|
|
ld.local.u32 %r446, [%rd61+-4];
|
|
and.b32 %r46, %r40, 31;
|
|
setp.eq.s32 %p58, %r46, 0;
|
|
@%p58 bra $L__BB0_47;
|
|
|
|
mov.u32 %r210, 32;
|
|
sub.s32 %r211, %r210, %r46;
|
|
shr.u32 %r212, %r446, %r211;
|
|
shl.b32 %r213, %r445, %r46;
|
|
add.s32 %r445, %r212, %r213;
|
|
mul.wide.s32 %rd62, %r43, 4;
|
|
add.s64 %rd63, %rd1, %rd62;
|
|
ld.local.u32 %r214, [%rd63];
|
|
shr.u32 %r215, %r214, %r211;
|
|
shl.b32 %r216, %r446, %r46;
|
|
add.s32 %r446, %r215, %r216;
|
|
|
|
$L__BB0_47:
|
|
and.b32 %r217, %r39, -2147483648;
|
|
shr.u32 %r218, %r446, 30;
|
|
shl.b32 %r219, %r445, 2;
|
|
or.b32 %r220, %r218, %r219;
|
|
shr.u32 %r221, %r220, 31;
|
|
shr.u32 %r222, %r445, 30;
|
|
add.s32 %r223, %r221, %r222;
|
|
neg.s32 %r224, %r223;
|
|
setp.eq.s32 %p59, %r217, 0;
|
|
selp.b32 %r447, %r223, %r224, %p59;
|
|
setp.ne.s32 %p60, %r221, 0;
|
|
xor.b32 %r225, %r217, -2147483648;
|
|
selp.b32 %r226, %r225, %r217, %p60;
|
|
selp.b32 %r227, -1, 0, %p60;
|
|
xor.b32 %r228, %r220, %r227;
|
|
shl.b32 %r229, %r446, 2;
|
|
xor.b32 %r230, %r229, %r227;
|
|
cvt.u64.u32 %rd64, %r228;
|
|
cvt.u64.u32 %rd65, %r230;
|
|
bfi.b64 %rd66, %rd64, %rd65, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd66;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f416, %fd4;
|
|
setp.eq.s32 %p61, %r226, 0;
|
|
neg.f32 %f417, %f416;
|
|
selp.f32 %f1134, %f416, %f417, %p61;
|
|
|
|
$L__BB0_49:
|
|
mul.f32 %f88, %f71, %f1133;
|
|
and.b32 %r53, %r447, 1;
|
|
setp.eq.s32 %p62, %r53, 0;
|
|
selp.f32 %f89, %f1134, 0f3F800000, %p62;
|
|
mul.rn.f32 %f90, %f1134, %f1134;
|
|
mov.f32 %f1135, 0fB94D4153;
|
|
@%p62 bra $L__BB0_51;
|
|
|
|
mov.f32 %f420, 0fBAB607ED;
|
|
mov.f32 %f421, 0f37CBAC00;
|
|
fma.rn.f32 %f1135, %f421, %f90, %f420;
|
|
|
|
$L__BB0_51:
|
|
selp.f32 %f422, 0f3C0885E4, 0f3D2AAABB, %p62;
|
|
fma.rn.f32 %f423, %f1135, %f90, %f422;
|
|
selp.f32 %f424, 0fBE2AAAA8, 0fBEFFFFFF, %p62;
|
|
fma.rn.f32 %f425, %f423, %f90, %f424;
|
|
mov.f32 %f426, 0f00000000;
|
|
fma.rn.f32 %f427, %f90, %f89, %f426;
|
|
fma.rn.f32 %f1136, %f425, %f427, %f89;
|
|
and.b32 %r232, %r447, 2;
|
|
setp.eq.s32 %p64, %r232, 0;
|
|
@%p64 bra $L__BB0_53;
|
|
|
|
mov.f32 %f429, 0fBF800000;
|
|
fma.rn.f32 %f1136, %f1136, %f429, %f426;
|
|
|
|
$L__BB0_53:
|
|
mul.f32 %f439, %f88, %f88;
|
|
mov.f32 %f440, 0f3F800000;
|
|
sub.f32 %f441, %f440, %f439;
|
|
mul.f32 %f442, %f71, %f1136;
|
|
mul.f32 %f443, %f442, %f442;
|
|
sub.f32 %f444, %f441, %f443;
|
|
max.f32 %f445, %f426, %f444;
|
|
sqrt.rn.f32 %f446, %f445;
|
|
mul.f32 %f447, %f56, %f442;
|
|
mul.f32 %f448, %f57, %f442;
|
|
mul.f32 %f449, %f58, %f442;
|
|
fma.rn.f32 %f450, %f65, %f88, %f447;
|
|
fma.rn.f32 %f451, %f64, %f88, %f448;
|
|
fma.rn.f32 %f452, %f63, %f88, %f449;
|
|
fma.rn.f32 %f433, %f1113, %f446, %f450;
|
|
fma.rn.f32 %f434, %f1114, %f446, %f451;
|
|
fma.rn.f32 %f435, %f1115, %f446, %f452;
|
|
mov.f32 %f458, 0f38D1B717;
|
|
max.f32 %f436, %f457, %f458;
|
|
mov.f32 %f437, 0f6C4ECB8F;
|
|
mov.u32 %r269, 2;
|
|
mov.u32 %r271, 1;
|
|
mov.u32 %r303, 0;
|
|
// begin inline asm
|
|
call(%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260,%r261,%r262,%r263,%r264),_optix_trace_typed_32,(%r303,%rd7,%f15,%f16,%f17,%f433,%f434,%f435,%f436,%f437,%f426,%r271,%r303,%r303,%r269,%r303,%r271,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303);
|
|
// end inline asm
|
|
mov.b32 %f459, %r233;
|
|
setp.lt.f32 %p65, %f459, 0f00000000;
|
|
selp.f32 %f460, 0f00000000, %f459, %p65;
|
|
setp.geu.f32 %p66, %f459, 0f00000000;
|
|
selp.f32 %f461, 0f3F800000, 0f00000000, %p66;
|
|
add.f32 %f1130, %f1130, %f461;
|
|
add.f32 %f1129, %f1129, %f460;
|
|
add.s32 %r439, %r439, 1;
|
|
setp.lt.s32 %p67, %r439, %r5;
|
|
@%p67 bra $L__BB0_29;
|
|
|
|
add.s32 %r437, %r437, 1;
|
|
setp.lt.s32 %p68, %r437, %r5;
|
|
@%p68 bra $L__BB0_28;
|
|
|
|
$L__BB0_55:
|
|
mul.lo.s32 %r304, %r5, %r5;
|
|
cvt.rn.f32.s32 %f462, %r304;
|
|
div.rn.f32 %f1140, %f1129, %f462;
|
|
div.rn.f32 %f1139, %f1130, %f462;
|
|
|
|
$L__BB0_56:
|
|
ld.const.u32 %r432, [params+616];
|
|
setp.lt.s32 %p69, %r432, 0;
|
|
selp.f32 %f104, %f1140, %f1139, %p69;
|
|
ld.const.u32 %r56, [params+104];
|
|
and.b32 %r305, %r56, 8;
|
|
setp.eq.s32 %p70, %r305, 0;
|
|
@%p70 bra $L__BB0_70;
|
|
|
|
ld.const.u64 %rd68, [params+192];
|
|
cvta.to.global.u64 %rd19, %rd68;
|
|
ld.const.u32 %r306, [params+184];
|
|
mad.lo.s32 %r307, %r306, %r7, %r6;
|
|
cvt.u64.u32 %rd20, %r307;
|
|
mov.f32 %f464, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f465, %f464;
|
|
add.f32 %f466, %f465, %f465;
|
|
mov.f32 %f467, 0f3EE8BA2E;
|
|
sub.f32 %f468, %f467, %f466;
|
|
abs.f32 %f105, %f468;
|
|
abs.f32 %f106, %f104;
|
|
setp.lt.f32 %p71, %f106, 0f00800000;
|
|
mul.f32 %f469, %f106, 0f4B800000;
|
|
selp.f32 %f470, %f469, %f106, %p71;
|
|
selp.f32 %f471, 0fC3170000, 0fC2FE0000, %p71;
|
|
mov.b32 %r308, %f470;
|
|
and.b32 %r309, %r308, 8388607;
|
|
or.b32 %r310, %r309, 1065353216;
|
|
mov.b32 %f472, %r310;
|
|
shr.u32 %r311, %r308, 23;
|
|
cvt.rn.f32.u32 %f473, %r311;
|
|
add.f32 %f474, %f471, %f473;
|
|
setp.gt.f32 %p72, %f472, 0f3FB504F3;
|
|
mul.f32 %f475, %f472, 0f3F000000;
|
|
add.f32 %f476, %f474, 0f3F800000;
|
|
selp.f32 %f477, %f476, %f474, %p72;
|
|
selp.f32 %f478, %f475, %f472, %p72;
|
|
add.f32 %f479, %f478, 0fBF800000;
|
|
add.f32 %f480, %f478, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f481, %f480;
|
|
add.f32 %f482, %f479, %f479;
|
|
mul.f32 %f483, %f482, %f481;
|
|
mul.f32 %f484, %f483, %f483;
|
|
mov.f32 %f485, 0f3C4CAF63;
|
|
mov.f32 %f486, 0f3B18F0FE;
|
|
fma.rn.f32 %f487, %f486, %f484, %f485;
|
|
mov.f32 %f488, 0f3DAAAABD;
|
|
fma.rn.f32 %f489, %f487, %f484, %f488;
|
|
mul.rn.f32 %f490, %f489, %f484;
|
|
mul.rn.f32 %f491, %f490, %f483;
|
|
sub.f32 %f492, %f479, %f483;
|
|
add.f32 %f493, %f492, %f492;
|
|
neg.f32 %f494, %f483;
|
|
fma.rn.f32 %f495, %f494, %f479, %f493;
|
|
mul.rn.f32 %f496, %f481, %f495;
|
|
add.f32 %f497, %f491, %f483;
|
|
sub.f32 %f498, %f483, %f497;
|
|
add.f32 %f499, %f491, %f498;
|
|
add.f32 %f500, %f496, %f499;
|
|
add.f32 %f501, %f497, %f500;
|
|
sub.f32 %f502, %f497, %f501;
|
|
add.f32 %f503, %f500, %f502;
|
|
mov.f32 %f504, 0f3F317200;
|
|
mul.rn.f32 %f505, %f477, %f504;
|
|
mov.f32 %f506, 0f35BFBE8E;
|
|
mul.rn.f32 %f507, %f477, %f506;
|
|
add.f32 %f508, %f505, %f501;
|
|
sub.f32 %f509, %f505, %f508;
|
|
add.f32 %f510, %f501, %f509;
|
|
add.f32 %f511, %f503, %f510;
|
|
add.f32 %f512, %f507, %f511;
|
|
add.f32 %f513, %f508, %f512;
|
|
sub.f32 %f514, %f508, %f513;
|
|
add.f32 %f515, %f512, %f514;
|
|
mul.rn.f32 %f516, %f467, %f513;
|
|
neg.f32 %f517, %f516;
|
|
fma.rn.f32 %f518, %f467, %f513, %f517;
|
|
fma.rn.f32 %f519, %f467, %f515, %f518;
|
|
mov.f32 %f520, 0f00000000;
|
|
fma.rn.f32 %f521, %f520, %f513, %f519;
|
|
add.rn.f32 %f522, %f516, %f521;
|
|
neg.f32 %f523, %f522;
|
|
add.rn.f32 %f524, %f516, %f523;
|
|
add.rn.f32 %f525, %f524, %f521;
|
|
mov.b32 %r312, %f522;
|
|
setp.eq.s32 %p73, %r312, 1118925336;
|
|
add.s32 %r313, %r312, -1;
|
|
mov.b32 %f526, %r313;
|
|
add.f32 %f527, %f525, 0f37000000;
|
|
selp.f32 %f107, %f527, %f525, %p73;
|
|
selp.f32 %f528, %f526, %f522, %p73;
|
|
mov.f32 %f529, 0f3FB8AA3B;
|
|
mul.rn.f32 %f530, %f528, %f529;
|
|
cvt.rzi.f32.f32 %f531, %f530;
|
|
abs.f32 %f532, %f531;
|
|
setp.gt.f32 %p74, %f532, 0f42FC0000;
|
|
mov.b32 %r314, %f531;
|
|
and.b32 %r315, %r314, -2147483648;
|
|
or.b32 %r316, %r315, 1123811328;
|
|
mov.b32 %f533, %r316;
|
|
selp.f32 %f534, %f533, %f531, %p74;
|
|
mov.f32 %f535, 0fBF317218;
|
|
fma.rn.f32 %f536, %f534, %f535, %f528;
|
|
mov.f32 %f537, 0f3102E308;
|
|
fma.rn.f32 %f538, %f534, %f537, %f536;
|
|
mul.f32 %f539, %f538, 0f3FB8AA3B;
|
|
add.f32 %f540, %f534, 0f4B40007F;
|
|
mov.b32 %r317, %f540;
|
|
shl.b32 %r318, %r317, 23;
|
|
mov.b32 %f541, %r318;
|
|
ex2.approx.ftz.f32 %f542, %f539;
|
|
mul.f32 %f108, %f542, %f541;
|
|
setp.eq.f32 %p75, %f108, 0f7F800000;
|
|
mov.f32 %f1141, 0f7F800000;
|
|
@%p75 bra $L__BB0_59;
|
|
|
|
fma.rn.f32 %f1141, %f108, %f107, %f108;
|
|
|
|
$L__BB0_59:
|
|
setp.lt.f32 %p76, %f104, 0f00000000;
|
|
setp.eq.f32 %p77, %f105, 0f3F800000;
|
|
and.pred %p3, %p76, %p77;
|
|
setp.eq.f32 %p78, %f104, 0f00000000;
|
|
@%p78 bra $L__BB0_63;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_63:
|
|
add.f32 %f547, %f104, %f104;
|
|
selp.f32 %f1143, %f547, 0f00000000, %p77;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_155:
|
|
mov.f32 %f1104, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1104;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f1104;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1104;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs54, 0;
|
|
st.global.v4.u16 [%rd24], {%rs51, %rs52, %rs53, %rs54};
|
|
bra.uni $L__BB0_156;
|
|
|
|
$L__BB0_60:
|
|
mov.b32 %r319, %f1141;
|
|
xor.b32 %r320, %r319, -2147483648;
|
|
mov.b32 %f543, %r320;
|
|
selp.f32 %f1143, %f543, %f1141, %p3;
|
|
setp.geu.f32 %p79, %f104, 0f00000000;
|
|
@%p79 bra $L__BB0_64;
|
|
|
|
mov.f32 %f544, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f545, %f544;
|
|
setp.eq.f32 %p80, %f545, 0f3EE8BA2E;
|
|
@%p80 bra $L__BB0_64;
|
|
|
|
mov.f32 %f1143, 0f7FFFFFFF;
|
|
|
|
$L__BB0_64:
|
|
add.f32 %f548, %f106, 0f3EE8BA2E;
|
|
mov.b32 %r321, %f548;
|
|
setp.lt.s32 %p82, %r321, 2139095040;
|
|
@%p82 bra $L__BB0_69;
|
|
|
|
setp.gtu.f32 %p83, %f106, 0f7F800000;
|
|
@%p83 bra $L__BB0_68;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_68:
|
|
add.f32 %f1143, %f104, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_69;
|
|
|
|
$L__BB0_66:
|
|
setp.neu.f32 %p84, %f106, 0f7F800000;
|
|
@%p84 bra $L__BB0_69;
|
|
|
|
selp.f32 %f1143, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_69:
|
|
mul.f32 %f549, %f1143, 0f437F0000;
|
|
setp.eq.f32 %p85, %f104, 0f3F800000;
|
|
selp.f32 %f550, 0f437F0000, %f549, %p85;
|
|
cvt.rzi.u32.f32 %r322, %f550;
|
|
shl.b64 %rd69, %rd20, 1;
|
|
add.s64 %rd70, %rd19, %rd69;
|
|
cvt.u16.u32 %rs16, %r322;
|
|
mov.u16 %rs17, 255;
|
|
st.global.v2.u8 [%rd70], {%rs16, %rs17};
|
|
|
|
$L__BB0_70:
|
|
ld.const.v2.f32 {%f551, %f552}, [params+648];
|
|
mul.f32 %f117, %f1140, %f551;
|
|
mul.f32 %f118, %f1140, %f552;
|
|
ld.const.f32 %f555, [params+656];
|
|
mul.f32 %f119, %f1140, %f555;
|
|
and.b32 %r323, %r56, 1;
|
|
setp.eq.b32 %p86, %r323, 1;
|
|
mov.pred %p87, 0;
|
|
xor.pred %p88, %p86, %p87;
|
|
not.pred %p89, %p88;
|
|
@%p89 bra $L__BB0_144;
|
|
|
|
mov.f32 %f557, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f558, %f557;
|
|
add.f32 %f559, %f558, %f558;
|
|
mov.f32 %f560, 0f3EE66666;
|
|
sub.f32 %f561, %f560, %f559;
|
|
abs.f32 %f120, %f561;
|
|
abs.f32 %f121, %f117;
|
|
setp.lt.f32 %p90, %f121, 0f00800000;
|
|
mul.f32 %f562, %f121, 0f4B800000;
|
|
selp.f32 %f563, %f562, %f121, %p90;
|
|
selp.f32 %f564, 0fC3170000, 0fC2FE0000, %p90;
|
|
mov.b32 %r324, %f563;
|
|
and.b32 %r325, %r324, 8388607;
|
|
or.b32 %r326, %r325, 1065353216;
|
|
mov.b32 %f565, %r326;
|
|
shr.u32 %r327, %r324, 23;
|
|
cvt.rn.f32.u32 %f566, %r327;
|
|
add.f32 %f567, %f564, %f566;
|
|
setp.gt.f32 %p91, %f565, 0f3FB504F3;
|
|
mul.f32 %f568, %f565, 0f3F000000;
|
|
add.f32 %f569, %f567, 0f3F800000;
|
|
selp.f32 %f570, %f569, %f567, %p91;
|
|
selp.f32 %f571, %f568, %f565, %p91;
|
|
add.f32 %f572, %f571, 0fBF800000;
|
|
add.f32 %f573, %f571, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f574, %f573;
|
|
add.f32 %f575, %f572, %f572;
|
|
mul.f32 %f576, %f575, %f574;
|
|
mul.f32 %f577, %f576, %f576;
|
|
mov.f32 %f578, 0f3C4CAF63;
|
|
mov.f32 %f579, 0f3B18F0FE;
|
|
fma.rn.f32 %f580, %f579, %f577, %f578;
|
|
mov.f32 %f581, 0f3DAAAABD;
|
|
fma.rn.f32 %f582, %f580, %f577, %f581;
|
|
mul.rn.f32 %f583, %f582, %f577;
|
|
mul.rn.f32 %f584, %f583, %f576;
|
|
sub.f32 %f585, %f572, %f576;
|
|
add.f32 %f586, %f585, %f585;
|
|
neg.f32 %f587, %f576;
|
|
fma.rn.f32 %f588, %f587, %f572, %f586;
|
|
mul.rn.f32 %f589, %f574, %f588;
|
|
add.f32 %f590, %f584, %f576;
|
|
sub.f32 %f591, %f576, %f590;
|
|
add.f32 %f592, %f584, %f591;
|
|
add.f32 %f593, %f589, %f592;
|
|
add.f32 %f594, %f590, %f593;
|
|
sub.f32 %f595, %f590, %f594;
|
|
add.f32 %f596, %f593, %f595;
|
|
mov.f32 %f597, 0f3F317200;
|
|
mul.rn.f32 %f598, %f570, %f597;
|
|
mov.f32 %f599, 0f35BFBE8E;
|
|
mul.rn.f32 %f600, %f570, %f599;
|
|
add.f32 %f601, %f598, %f594;
|
|
sub.f32 %f602, %f598, %f601;
|
|
add.f32 %f603, %f594, %f602;
|
|
add.f32 %f604, %f596, %f603;
|
|
add.f32 %f605, %f600, %f604;
|
|
add.f32 %f606, %f601, %f605;
|
|
sub.f32 %f607, %f601, %f606;
|
|
add.f32 %f608, %f605, %f607;
|
|
mul.rn.f32 %f609, %f560, %f606;
|
|
neg.f32 %f610, %f609;
|
|
fma.rn.f32 %f611, %f560, %f606, %f610;
|
|
fma.rn.f32 %f612, %f560, %f608, %f611;
|
|
mov.f32 %f613, 0f00000000;
|
|
fma.rn.f32 %f614, %f613, %f606, %f612;
|
|
add.rn.f32 %f615, %f609, %f614;
|
|
neg.f32 %f616, %f615;
|
|
add.rn.f32 %f617, %f609, %f616;
|
|
add.rn.f32 %f618, %f617, %f614;
|
|
mov.b32 %r328, %f615;
|
|
setp.eq.s32 %p92, %r328, 1118925336;
|
|
add.s32 %r329, %r328, -1;
|
|
mov.b32 %f619, %r329;
|
|
add.f32 %f620, %f618, 0f37000000;
|
|
selp.f32 %f122, %f620, %f618, %p92;
|
|
selp.f32 %f621, %f619, %f615, %p92;
|
|
mov.f32 %f622, 0f3FB8AA3B;
|
|
mul.rn.f32 %f623, %f621, %f622;
|
|
cvt.rzi.f32.f32 %f624, %f623;
|
|
abs.f32 %f625, %f624;
|
|
setp.gt.f32 %p93, %f625, 0f42FC0000;
|
|
mov.b32 %r330, %f624;
|
|
and.b32 %r331, %r330, -2147483648;
|
|
or.b32 %r332, %r331, 1123811328;
|
|
mov.b32 %f626, %r332;
|
|
selp.f32 %f627, %f626, %f624, %p93;
|
|
mov.f32 %f628, 0fBF317218;
|
|
fma.rn.f32 %f629, %f627, %f628, %f621;
|
|
mov.f32 %f630, 0f3102E308;
|
|
fma.rn.f32 %f631, %f627, %f630, %f629;
|
|
mul.f32 %f632, %f631, 0f3FB8AA3B;
|
|
add.f32 %f633, %f627, 0f4B40007F;
|
|
mov.b32 %r333, %f633;
|
|
shl.b32 %r334, %r333, 23;
|
|
mov.b32 %f634, %r334;
|
|
ex2.approx.ftz.f32 %f635, %f632;
|
|
mul.f32 %f123, %f635, %f634;
|
|
setp.eq.f32 %p94, %f123, 0f7F800000;
|
|
mov.f32 %f1144, 0f7F800000;
|
|
@%p94 bra $L__BB0_73;
|
|
|
|
fma.rn.f32 %f1144, %f123, %f122, %f123;
|
|
|
|
$L__BB0_73:
|
|
setp.lt.f32 %p95, %f117, 0f00000000;
|
|
setp.eq.f32 %p96, %f120, 0f3F800000;
|
|
and.pred %p4, %p95, %p96;
|
|
setp.eq.f32 %p97, %f117, 0f00000000;
|
|
@%p97 bra $L__BB0_77;
|
|
bra.uni $L__BB0_74;
|
|
|
|
$L__BB0_77:
|
|
add.f32 %f640, %f117, %f117;
|
|
selp.f32 %f1146, %f640, 0f00000000, %p96;
|
|
bra.uni $L__BB0_78;
|
|
|
|
$L__BB0_74:
|
|
mov.b32 %r335, %f1144;
|
|
xor.b32 %r336, %r335, -2147483648;
|
|
mov.b32 %f636, %r336;
|
|
selp.f32 %f1146, %f636, %f1144, %p4;
|
|
setp.geu.f32 %p98, %f117, 0f00000000;
|
|
@%p98 bra $L__BB0_78;
|
|
|
|
mov.f32 %f637, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f638, %f637;
|
|
setp.eq.f32 %p99, %f638, 0f3EE66666;
|
|
@%p99 bra $L__BB0_78;
|
|
|
|
mov.f32 %f1146, 0f7FFFFFFF;
|
|
|
|
$L__BB0_78:
|
|
add.f32 %f641, %f121, 0f3EE66666;
|
|
mov.b32 %r337, %f641;
|
|
setp.lt.s32 %p101, %r337, 2139095040;
|
|
@%p101 bra $L__BB0_83;
|
|
|
|
setp.gtu.f32 %p102, %f121, 0f7F800000;
|
|
@%p102 bra $L__BB0_82;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_82:
|
|
add.f32 %f1146, %f117, 0f3EE66666;
|
|
bra.uni $L__BB0_83;
|
|
|
|
$L__BB0_80:
|
|
setp.neu.f32 %p103, %f121, 0f7F800000;
|
|
@%p103 bra $L__BB0_83;
|
|
|
|
selp.f32 %f1146, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_83:
|
|
setp.eq.f32 %p104, %f117, 0f3F800000;
|
|
selp.f32 %f132, 0f3F800000, %f1146, %p104;
|
|
abs.f32 %f133, %f118;
|
|
setp.lt.f32 %p105, %f133, 0f00800000;
|
|
mul.f32 %f643, %f133, 0f4B800000;
|
|
selp.f32 %f644, %f643, %f133, %p105;
|
|
selp.f32 %f645, 0fC3170000, 0fC2FE0000, %p105;
|
|
mov.b32 %r338, %f644;
|
|
and.b32 %r339, %r338, 8388607;
|
|
or.b32 %r340, %r339, 1065353216;
|
|
mov.b32 %f646, %r340;
|
|
shr.u32 %r341, %r338, 23;
|
|
cvt.rn.f32.u32 %f647, %r341;
|
|
add.f32 %f648, %f645, %f647;
|
|
setp.gt.f32 %p106, %f646, 0f3FB504F3;
|
|
mul.f32 %f649, %f646, 0f3F000000;
|
|
add.f32 %f650, %f648, 0f3F800000;
|
|
selp.f32 %f651, %f650, %f648, %p106;
|
|
selp.f32 %f652, %f649, %f646, %p106;
|
|
add.f32 %f653, %f652, 0fBF800000;
|
|
add.f32 %f654, %f652, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f655, %f654;
|
|
add.f32 %f656, %f653, %f653;
|
|
mul.f32 %f657, %f656, %f655;
|
|
mul.f32 %f658, %f657, %f657;
|
|
mov.f32 %f659, 0f3C4CAF63;
|
|
mov.f32 %f660, 0f3B18F0FE;
|
|
fma.rn.f32 %f661, %f660, %f658, %f659;
|
|
mov.f32 %f662, 0f3DAAAABD;
|
|
fma.rn.f32 %f663, %f661, %f658, %f662;
|
|
mul.rn.f32 %f664, %f663, %f658;
|
|
mul.rn.f32 %f665, %f664, %f657;
|
|
sub.f32 %f666, %f653, %f657;
|
|
add.f32 %f667, %f666, %f666;
|
|
neg.f32 %f668, %f657;
|
|
fma.rn.f32 %f669, %f668, %f653, %f667;
|
|
mul.rn.f32 %f670, %f655, %f669;
|
|
add.f32 %f671, %f665, %f657;
|
|
sub.f32 %f672, %f657, %f671;
|
|
add.f32 %f673, %f665, %f672;
|
|
add.f32 %f674, %f670, %f673;
|
|
add.f32 %f675, %f671, %f674;
|
|
sub.f32 %f676, %f671, %f675;
|
|
add.f32 %f677, %f674, %f676;
|
|
mov.f32 %f678, 0f3F317200;
|
|
mul.rn.f32 %f679, %f651, %f678;
|
|
mov.f32 %f680, 0f35BFBE8E;
|
|
mul.rn.f32 %f681, %f651, %f680;
|
|
add.f32 %f682, %f679, %f675;
|
|
sub.f32 %f683, %f679, %f682;
|
|
add.f32 %f684, %f675, %f683;
|
|
add.f32 %f685, %f677, %f684;
|
|
add.f32 %f686, %f681, %f685;
|
|
add.f32 %f687, %f682, %f686;
|
|
sub.f32 %f688, %f682, %f687;
|
|
add.f32 %f689, %f686, %f688;
|
|
mov.f32 %f690, 0f3EE66666;
|
|
mul.rn.f32 %f691, %f690, %f687;
|
|
neg.f32 %f692, %f691;
|
|
fma.rn.f32 %f693, %f690, %f687, %f692;
|
|
fma.rn.f32 %f694, %f690, %f689, %f693;
|
|
mov.f32 %f695, 0f00000000;
|
|
fma.rn.f32 %f696, %f695, %f687, %f694;
|
|
add.rn.f32 %f697, %f691, %f696;
|
|
neg.f32 %f698, %f697;
|
|
add.rn.f32 %f699, %f691, %f698;
|
|
add.rn.f32 %f700, %f699, %f696;
|
|
mov.b32 %r342, %f697;
|
|
setp.eq.s32 %p107, %r342, 1118925336;
|
|
add.s32 %r343, %r342, -1;
|
|
mov.b32 %f701, %r343;
|
|
add.f32 %f702, %f700, 0f37000000;
|
|
selp.f32 %f134, %f702, %f700, %p107;
|
|
selp.f32 %f703, %f701, %f697, %p107;
|
|
mov.f32 %f704, 0f3FB8AA3B;
|
|
mul.rn.f32 %f705, %f703, %f704;
|
|
cvt.rzi.f32.f32 %f706, %f705;
|
|
abs.f32 %f707, %f706;
|
|
setp.gt.f32 %p108, %f707, 0f42FC0000;
|
|
mov.b32 %r344, %f706;
|
|
and.b32 %r345, %r344, -2147483648;
|
|
or.b32 %r346, %r345, 1123811328;
|
|
mov.b32 %f708, %r346;
|
|
selp.f32 %f709, %f708, %f706, %p108;
|
|
mov.f32 %f710, 0fBF317218;
|
|
fma.rn.f32 %f711, %f709, %f710, %f703;
|
|
mov.f32 %f712, 0f3102E308;
|
|
fma.rn.f32 %f713, %f709, %f712, %f711;
|
|
mul.f32 %f714, %f713, 0f3FB8AA3B;
|
|
add.f32 %f715, %f709, 0f4B40007F;
|
|
mov.b32 %r347, %f715;
|
|
shl.b32 %r348, %r347, 23;
|
|
mov.b32 %f716, %r348;
|
|
ex2.approx.ftz.f32 %f717, %f714;
|
|
mul.f32 %f135, %f717, %f716;
|
|
setp.eq.f32 %p109, %f135, 0f7F800000;
|
|
mov.f32 %f1147, 0f7F800000;
|
|
@%p109 bra $L__BB0_85;
|
|
|
|
fma.rn.f32 %f1147, %f135, %f134, %f135;
|
|
|
|
$L__BB0_85:
|
|
setp.lt.f32 %p110, %f118, 0f00000000;
|
|
and.pred %p5, %p110, %p96;
|
|
setp.eq.f32 %p112, %f118, 0f00000000;
|
|
@%p112 bra $L__BB0_89;
|
|
bra.uni $L__BB0_86;
|
|
|
|
$L__BB0_89:
|
|
add.f32 %f722, %f118, %f118;
|
|
selp.f32 %f1149, %f722, 0f00000000, %p96;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_86:
|
|
mov.b32 %r349, %f1147;
|
|
xor.b32 %r350, %r349, -2147483648;
|
|
mov.b32 %f718, %r350;
|
|
selp.f32 %f1149, %f718, %f1147, %p5;
|
|
setp.geu.f32 %p113, %f118, 0f00000000;
|
|
@%p113 bra $L__BB0_90;
|
|
|
|
mov.f32 %f719, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f720, %f719;
|
|
setp.eq.f32 %p114, %f720, 0f3EE66666;
|
|
@%p114 bra $L__BB0_90;
|
|
|
|
mov.f32 %f1149, 0f7FFFFFFF;
|
|
|
|
$L__BB0_90:
|
|
add.f32 %f723, %f133, 0f3EE66666;
|
|
mov.b32 %r351, %f723;
|
|
setp.lt.s32 %p116, %r351, 2139095040;
|
|
@%p116 bra $L__BB0_95;
|
|
|
|
setp.gtu.f32 %p117, %f133, 0f7F800000;
|
|
@%p117 bra $L__BB0_94;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_94:
|
|
add.f32 %f1149, %f118, 0f3EE66666;
|
|
bra.uni $L__BB0_95;
|
|
|
|
$L__BB0_92:
|
|
setp.neu.f32 %p118, %f133, 0f7F800000;
|
|
@%p118 bra $L__BB0_95;
|
|
|
|
selp.f32 %f1149, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_95:
|
|
setp.eq.f32 %p119, %f118, 0f3F800000;
|
|
selp.f32 %f144, 0f3F800000, %f1149, %p119;
|
|
abs.f32 %f145, %f119;
|
|
setp.lt.f32 %p120, %f145, 0f00800000;
|
|
mul.f32 %f725, %f145, 0f4B800000;
|
|
selp.f32 %f726, %f725, %f145, %p120;
|
|
selp.f32 %f727, 0fC3170000, 0fC2FE0000, %p120;
|
|
mov.b32 %r352, %f726;
|
|
and.b32 %r353, %r352, 8388607;
|
|
or.b32 %r354, %r353, 1065353216;
|
|
mov.b32 %f728, %r354;
|
|
shr.u32 %r355, %r352, 23;
|
|
cvt.rn.f32.u32 %f729, %r355;
|
|
add.f32 %f730, %f727, %f729;
|
|
setp.gt.f32 %p121, %f728, 0f3FB504F3;
|
|
mul.f32 %f731, %f728, 0f3F000000;
|
|
add.f32 %f732, %f730, 0f3F800000;
|
|
selp.f32 %f733, %f732, %f730, %p121;
|
|
selp.f32 %f734, %f731, %f728, %p121;
|
|
add.f32 %f735, %f734, 0fBF800000;
|
|
add.f32 %f736, %f734, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f737, %f736;
|
|
add.f32 %f738, %f735, %f735;
|
|
mul.f32 %f739, %f738, %f737;
|
|
mul.f32 %f740, %f739, %f739;
|
|
mov.f32 %f741, 0f3C4CAF63;
|
|
mov.f32 %f742, 0f3B18F0FE;
|
|
fma.rn.f32 %f743, %f742, %f740, %f741;
|
|
mov.f32 %f744, 0f3DAAAABD;
|
|
fma.rn.f32 %f745, %f743, %f740, %f744;
|
|
mul.rn.f32 %f746, %f745, %f740;
|
|
mul.rn.f32 %f747, %f746, %f739;
|
|
sub.f32 %f748, %f735, %f739;
|
|
add.f32 %f749, %f748, %f748;
|
|
neg.f32 %f750, %f739;
|
|
fma.rn.f32 %f751, %f750, %f735, %f749;
|
|
mul.rn.f32 %f752, %f737, %f751;
|
|
add.f32 %f753, %f747, %f739;
|
|
sub.f32 %f754, %f739, %f753;
|
|
add.f32 %f755, %f747, %f754;
|
|
add.f32 %f756, %f752, %f755;
|
|
add.f32 %f757, %f753, %f756;
|
|
sub.f32 %f758, %f753, %f757;
|
|
add.f32 %f759, %f756, %f758;
|
|
mov.f32 %f760, 0f3F317200;
|
|
mul.rn.f32 %f761, %f733, %f760;
|
|
mov.f32 %f762, 0f35BFBE8E;
|
|
mul.rn.f32 %f763, %f733, %f762;
|
|
add.f32 %f764, %f761, %f757;
|
|
sub.f32 %f765, %f761, %f764;
|
|
add.f32 %f766, %f757, %f765;
|
|
add.f32 %f767, %f759, %f766;
|
|
add.f32 %f768, %f763, %f767;
|
|
add.f32 %f769, %f764, %f768;
|
|
sub.f32 %f770, %f764, %f769;
|
|
add.f32 %f771, %f768, %f770;
|
|
mov.f32 %f772, 0f3EE66666;
|
|
mul.rn.f32 %f773, %f772, %f769;
|
|
neg.f32 %f774, %f773;
|
|
fma.rn.f32 %f775, %f772, %f769, %f774;
|
|
fma.rn.f32 %f776, %f772, %f771, %f775;
|
|
mov.f32 %f777, 0f00000000;
|
|
fma.rn.f32 %f778, %f777, %f769, %f776;
|
|
add.rn.f32 %f779, %f773, %f778;
|
|
neg.f32 %f780, %f779;
|
|
add.rn.f32 %f781, %f773, %f780;
|
|
add.rn.f32 %f782, %f781, %f778;
|
|
mov.b32 %r356, %f779;
|
|
setp.eq.s32 %p122, %r356, 1118925336;
|
|
add.s32 %r357, %r356, -1;
|
|
mov.b32 %f783, %r357;
|
|
add.f32 %f784, %f782, 0f37000000;
|
|
selp.f32 %f146, %f784, %f782, %p122;
|
|
selp.f32 %f785, %f783, %f779, %p122;
|
|
mov.f32 %f786, 0f3FB8AA3B;
|
|
mul.rn.f32 %f787, %f785, %f786;
|
|
cvt.rzi.f32.f32 %f788, %f787;
|
|
abs.f32 %f789, %f788;
|
|
setp.gt.f32 %p123, %f789, 0f42FC0000;
|
|
mov.b32 %r358, %f788;
|
|
and.b32 %r359, %r358, -2147483648;
|
|
or.b32 %r360, %r359, 1123811328;
|
|
mov.b32 %f790, %r360;
|
|
selp.f32 %f791, %f790, %f788, %p123;
|
|
mov.f32 %f792, 0fBF317218;
|
|
fma.rn.f32 %f793, %f791, %f792, %f785;
|
|
mov.f32 %f794, 0f3102E308;
|
|
fma.rn.f32 %f795, %f791, %f794, %f793;
|
|
mul.f32 %f796, %f795, 0f3FB8AA3B;
|
|
add.f32 %f797, %f791, 0f4B40007F;
|
|
mov.b32 %r361, %f797;
|
|
shl.b32 %r362, %r361, 23;
|
|
mov.b32 %f798, %r362;
|
|
ex2.approx.ftz.f32 %f799, %f796;
|
|
mul.f32 %f147, %f799, %f798;
|
|
setp.eq.f32 %p124, %f147, 0f7F800000;
|
|
mov.f32 %f1150, 0f7F800000;
|
|
@%p124 bra $L__BB0_97;
|
|
|
|
fma.rn.f32 %f1150, %f147, %f146, %f147;
|
|
|
|
$L__BB0_97:
|
|
setp.lt.f32 %p125, %f119, 0f00000000;
|
|
and.pred %p6, %p125, %p96;
|
|
setp.eq.f32 %p127, %f119, 0f00000000;
|
|
@%p127 bra $L__BB0_101;
|
|
bra.uni $L__BB0_98;
|
|
|
|
$L__BB0_101:
|
|
add.f32 %f804, %f119, %f119;
|
|
selp.f32 %f1152, %f804, 0f00000000, %p96;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_98:
|
|
mov.b32 %r363, %f1150;
|
|
xor.b32 %r364, %r363, -2147483648;
|
|
mov.b32 %f800, %r364;
|
|
selp.f32 %f1152, %f800, %f1150, %p6;
|
|
setp.geu.f32 %p128, %f119, 0f00000000;
|
|
@%p128 bra $L__BB0_102;
|
|
|
|
mov.f32 %f801, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f802, %f801;
|
|
setp.eq.f32 %p129, %f802, 0f3EE66666;
|
|
@%p129 bra $L__BB0_102;
|
|
|
|
mov.f32 %f1152, 0f7FFFFFFF;
|
|
|
|
$L__BB0_102:
|
|
add.f32 %f805, %f145, 0f3EE66666;
|
|
mov.b32 %r365, %f805;
|
|
setp.lt.s32 %p131, %r365, 2139095040;
|
|
@%p131 bra $L__BB0_107;
|
|
|
|
setp.gtu.f32 %p132, %f145, 0f7F800000;
|
|
@%p132 bra $L__BB0_106;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_106:
|
|
add.f32 %f1152, %f119, 0f3EE66666;
|
|
bra.uni $L__BB0_107;
|
|
|
|
$L__BB0_104:
|
|
setp.neu.f32 %p133, %f145, 0f7F800000;
|
|
@%p133 bra $L__BB0_107;
|
|
|
|
selp.f32 %f1152, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_107:
|
|
setp.eq.f32 %p134, %f119, 0f3F800000;
|
|
mov.f32 %f807, 0f3F800000;
|
|
selp.f32 %f808, 0f3F800000, %f1152, %p134;
|
|
ld.const.u64 %rd71, [params+144];
|
|
cvta.to.global.u64 %rd21, %rd71;
|
|
ld.const.u32 %r366, [params+136];
|
|
mad.lo.s32 %r367, %r366, %r7, %r6;
|
|
cvt.u64.u32 %rd22, %r367;
|
|
min.f32 %f809, %f132, %f807;
|
|
mov.f32 %f810, 0f00000000;
|
|
max.f32 %f156, %f810, %f809;
|
|
min.f32 %f811, %f144, %f807;
|
|
max.f32 %f157, %f810, %f811;
|
|
min.f32 %f812, %f808, %f807;
|
|
max.f32 %f158, %f810, %f812;
|
|
mov.f32 %f813, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f814, %f813;
|
|
add.f32 %f815, %f814, %f814;
|
|
mov.f32 %f816, 0f3ED55555;
|
|
sub.f32 %f817, %f816, %f815;
|
|
abs.f32 %f159, %f817;
|
|
abs.f32 %f160, %f156;
|
|
setp.lt.f32 %p135, %f160, 0f00800000;
|
|
mul.f32 %f818, %f160, 0f4B800000;
|
|
selp.f32 %f819, %f818, %f160, %p135;
|
|
selp.f32 %f820, 0fC3170000, 0fC2FE0000, %p135;
|
|
mov.b32 %r368, %f819;
|
|
and.b32 %r369, %r368, 8388607;
|
|
or.b32 %r370, %r369, 1065353216;
|
|
mov.b32 %f821, %r370;
|
|
shr.u32 %r371, %r368, 23;
|
|
cvt.rn.f32.u32 %f822, %r371;
|
|
add.f32 %f823, %f820, %f822;
|
|
setp.gt.f32 %p136, %f821, 0f3FB504F3;
|
|
mul.f32 %f824, %f821, 0f3F000000;
|
|
add.f32 %f825, %f823, 0f3F800000;
|
|
selp.f32 %f826, %f825, %f823, %p136;
|
|
selp.f32 %f827, %f824, %f821, %p136;
|
|
add.f32 %f828, %f827, 0fBF800000;
|
|
add.f32 %f829, %f827, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f830, %f829;
|
|
add.f32 %f831, %f828, %f828;
|
|
mul.f32 %f832, %f831, %f830;
|
|
mul.f32 %f833, %f832, %f832;
|
|
mov.f32 %f834, 0f3C4CAF63;
|
|
mov.f32 %f835, 0f3B18F0FE;
|
|
fma.rn.f32 %f836, %f835, %f833, %f834;
|
|
mov.f32 %f837, 0f3DAAAABD;
|
|
fma.rn.f32 %f838, %f836, %f833, %f837;
|
|
mul.rn.f32 %f839, %f838, %f833;
|
|
mul.rn.f32 %f840, %f839, %f832;
|
|
sub.f32 %f841, %f828, %f832;
|
|
add.f32 %f842, %f841, %f841;
|
|
neg.f32 %f843, %f832;
|
|
fma.rn.f32 %f844, %f843, %f828, %f842;
|
|
mul.rn.f32 %f845, %f830, %f844;
|
|
add.f32 %f846, %f840, %f832;
|
|
sub.f32 %f847, %f832, %f846;
|
|
add.f32 %f848, %f840, %f847;
|
|
add.f32 %f849, %f845, %f848;
|
|
add.f32 %f850, %f846, %f849;
|
|
sub.f32 %f851, %f846, %f850;
|
|
add.f32 %f852, %f849, %f851;
|
|
mov.f32 %f853, 0f3F317200;
|
|
mul.rn.f32 %f854, %f826, %f853;
|
|
mov.f32 %f855, 0f35BFBE8E;
|
|
mul.rn.f32 %f856, %f826, %f855;
|
|
add.f32 %f857, %f854, %f850;
|
|
sub.f32 %f858, %f854, %f857;
|
|
add.f32 %f859, %f850, %f858;
|
|
add.f32 %f860, %f852, %f859;
|
|
add.f32 %f861, %f856, %f860;
|
|
add.f32 %f862, %f857, %f861;
|
|
sub.f32 %f863, %f857, %f862;
|
|
add.f32 %f864, %f861, %f863;
|
|
mul.rn.f32 %f865, %f816, %f862;
|
|
neg.f32 %f866, %f865;
|
|
fma.rn.f32 %f867, %f816, %f862, %f866;
|
|
fma.rn.f32 %f868, %f816, %f864, %f867;
|
|
fma.rn.f32 %f869, %f810, %f862, %f868;
|
|
add.rn.f32 %f870, %f865, %f869;
|
|
neg.f32 %f871, %f870;
|
|
add.rn.f32 %f872, %f865, %f871;
|
|
add.rn.f32 %f873, %f872, %f869;
|
|
mov.b32 %r372, %f870;
|
|
setp.eq.s32 %p137, %r372, 1118925336;
|
|
add.s32 %r373, %r372, -1;
|
|
mov.b32 %f874, %r373;
|
|
add.f32 %f875, %f873, 0f37000000;
|
|
selp.f32 %f161, %f875, %f873, %p137;
|
|
selp.f32 %f876, %f874, %f870, %p137;
|
|
mov.f32 %f877, 0f3FB8AA3B;
|
|
mul.rn.f32 %f878, %f876, %f877;
|
|
cvt.rzi.f32.f32 %f879, %f878;
|
|
abs.f32 %f880, %f879;
|
|
setp.gt.f32 %p138, %f880, 0f42FC0000;
|
|
mov.b32 %r374, %f879;
|
|
and.b32 %r375, %r374, -2147483648;
|
|
or.b32 %r376, %r375, 1123811328;
|
|
mov.b32 %f881, %r376;
|
|
selp.f32 %f882, %f881, %f879, %p138;
|
|
mov.f32 %f883, 0fBF317218;
|
|
fma.rn.f32 %f884, %f882, %f883, %f876;
|
|
mov.f32 %f885, 0f3102E308;
|
|
fma.rn.f32 %f886, %f882, %f885, %f884;
|
|
mul.f32 %f887, %f886, 0f3FB8AA3B;
|
|
add.f32 %f888, %f882, 0f4B40007F;
|
|
mov.b32 %r377, %f888;
|
|
shl.b32 %r378, %r377, 23;
|
|
mov.b32 %f889, %r378;
|
|
ex2.approx.ftz.f32 %f890, %f887;
|
|
mul.f32 %f162, %f890, %f889;
|
|
setp.eq.f32 %p139, %f162, 0f7F800000;
|
|
mov.f32 %f1153, 0f7F800000;
|
|
@%p139 bra $L__BB0_109;
|
|
|
|
fma.rn.f32 %f1153, %f162, %f161, %f162;
|
|
|
|
$L__BB0_109:
|
|
setp.lt.f32 %p140, %f156, 0f00000000;
|
|
setp.eq.f32 %p141, %f159, 0f3F800000;
|
|
and.pred %p7, %p140, %p141;
|
|
setp.eq.f32 %p142, %f156, 0f00000000;
|
|
@%p142 bra $L__BB0_113;
|
|
bra.uni $L__BB0_110;
|
|
|
|
$L__BB0_113:
|
|
add.f32 %f895, %f156, %f156;
|
|
selp.f32 %f1155, %f895, 0f00000000, %p141;
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_110:
|
|
mov.b32 %r379, %f1153;
|
|
xor.b32 %r380, %r379, -2147483648;
|
|
mov.b32 %f891, %r380;
|
|
selp.f32 %f1155, %f891, %f1153, %p7;
|
|
setp.geu.f32 %p143, %f156, 0f00000000;
|
|
@%p143 bra $L__BB0_114;
|
|
|
|
mov.f32 %f892, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f893, %f892;
|
|
setp.eq.f32 %p144, %f893, 0f3ED55555;
|
|
@%p144 bra $L__BB0_114;
|
|
|
|
mov.f32 %f1155, 0f7FFFFFFF;
|
|
|
|
$L__BB0_114:
|
|
add.f32 %f896, %f160, 0f3ED55555;
|
|
mov.b32 %r381, %f896;
|
|
setp.lt.s32 %p146, %r381, 2139095040;
|
|
@%p146 bra $L__BB0_119;
|
|
|
|
setp.gtu.f32 %p147, %f160, 0f7F800000;
|
|
@%p147 bra $L__BB0_118;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_118:
|
|
add.f32 %f1155, %f156, 0f3ED55555;
|
|
bra.uni $L__BB0_119;
|
|
|
|
$L__BB0_116:
|
|
setp.neu.f32 %p148, %f160, 0f7F800000;
|
|
@%p148 bra $L__BB0_119;
|
|
|
|
selp.f32 %f1155, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_119:
|
|
abs.f32 %f171, %f157;
|
|
setp.lt.f32 %p149, %f171, 0f00800000;
|
|
mul.f32 %f898, %f171, 0f4B800000;
|
|
selp.f32 %f899, %f898, %f171, %p149;
|
|
selp.f32 %f900, 0fC3170000, 0fC2FE0000, %p149;
|
|
mov.b32 %r382, %f899;
|
|
and.b32 %r383, %r382, 8388607;
|
|
or.b32 %r384, %r383, 1065353216;
|
|
mov.b32 %f901, %r384;
|
|
shr.u32 %r385, %r382, 23;
|
|
cvt.rn.f32.u32 %f902, %r385;
|
|
add.f32 %f903, %f900, %f902;
|
|
setp.gt.f32 %p150, %f901, 0f3FB504F3;
|
|
mul.f32 %f904, %f901, 0f3F000000;
|
|
add.f32 %f905, %f903, 0f3F800000;
|
|
selp.f32 %f906, %f905, %f903, %p150;
|
|
selp.f32 %f907, %f904, %f901, %p150;
|
|
add.f32 %f908, %f907, 0fBF800000;
|
|
add.f32 %f909, %f907, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f910, %f909;
|
|
add.f32 %f911, %f908, %f908;
|
|
mul.f32 %f912, %f911, %f910;
|
|
mul.f32 %f913, %f912, %f912;
|
|
mov.f32 %f914, 0f3C4CAF63;
|
|
mov.f32 %f915, 0f3B18F0FE;
|
|
fma.rn.f32 %f916, %f915, %f913, %f914;
|
|
mov.f32 %f917, 0f3DAAAABD;
|
|
fma.rn.f32 %f918, %f916, %f913, %f917;
|
|
mul.rn.f32 %f919, %f918, %f913;
|
|
mul.rn.f32 %f920, %f919, %f912;
|
|
sub.f32 %f921, %f908, %f912;
|
|
add.f32 %f922, %f921, %f921;
|
|
neg.f32 %f923, %f912;
|
|
fma.rn.f32 %f924, %f923, %f908, %f922;
|
|
mul.rn.f32 %f925, %f910, %f924;
|
|
add.f32 %f926, %f920, %f912;
|
|
sub.f32 %f927, %f912, %f926;
|
|
add.f32 %f928, %f920, %f927;
|
|
add.f32 %f929, %f925, %f928;
|
|
add.f32 %f930, %f926, %f929;
|
|
sub.f32 %f931, %f926, %f930;
|
|
add.f32 %f932, %f929, %f931;
|
|
mov.f32 %f933, 0f3F317200;
|
|
mul.rn.f32 %f934, %f906, %f933;
|
|
mov.f32 %f935, 0f35BFBE8E;
|
|
mul.rn.f32 %f936, %f906, %f935;
|
|
add.f32 %f937, %f934, %f930;
|
|
sub.f32 %f938, %f934, %f937;
|
|
add.f32 %f939, %f930, %f938;
|
|
add.f32 %f940, %f932, %f939;
|
|
add.f32 %f941, %f936, %f940;
|
|
add.f32 %f942, %f937, %f941;
|
|
sub.f32 %f943, %f937, %f942;
|
|
add.f32 %f944, %f941, %f943;
|
|
mov.f32 %f945, 0f3ED55555;
|
|
mul.rn.f32 %f946, %f945, %f942;
|
|
neg.f32 %f947, %f946;
|
|
fma.rn.f32 %f948, %f945, %f942, %f947;
|
|
fma.rn.f32 %f949, %f945, %f944, %f948;
|
|
mov.f32 %f950, 0f00000000;
|
|
fma.rn.f32 %f951, %f950, %f942, %f949;
|
|
add.rn.f32 %f952, %f946, %f951;
|
|
neg.f32 %f953, %f952;
|
|
add.rn.f32 %f954, %f946, %f953;
|
|
add.rn.f32 %f955, %f954, %f951;
|
|
mov.b32 %r386, %f952;
|
|
setp.eq.s32 %p151, %r386, 1118925336;
|
|
add.s32 %r387, %r386, -1;
|
|
mov.b32 %f956, %r387;
|
|
add.f32 %f957, %f955, 0f37000000;
|
|
selp.f32 %f172, %f957, %f955, %p151;
|
|
selp.f32 %f958, %f956, %f952, %p151;
|
|
mov.f32 %f959, 0f3FB8AA3B;
|
|
mul.rn.f32 %f960, %f958, %f959;
|
|
cvt.rzi.f32.f32 %f961, %f960;
|
|
abs.f32 %f962, %f961;
|
|
setp.gt.f32 %p152, %f962, 0f42FC0000;
|
|
mov.b32 %r388, %f961;
|
|
and.b32 %r389, %r388, -2147483648;
|
|
or.b32 %r390, %r389, 1123811328;
|
|
mov.b32 %f963, %r390;
|
|
selp.f32 %f964, %f963, %f961, %p152;
|
|
mov.f32 %f965, 0fBF317218;
|
|
fma.rn.f32 %f966, %f964, %f965, %f958;
|
|
mov.f32 %f967, 0f3102E308;
|
|
fma.rn.f32 %f968, %f964, %f967, %f966;
|
|
mul.f32 %f969, %f968, 0f3FB8AA3B;
|
|
add.f32 %f970, %f964, 0f4B40007F;
|
|
mov.b32 %r391, %f970;
|
|
shl.b32 %r392, %r391, 23;
|
|
mov.b32 %f971, %r392;
|
|
ex2.approx.ftz.f32 %f972, %f969;
|
|
mul.f32 %f173, %f972, %f971;
|
|
setp.eq.f32 %p153, %f173, 0f7F800000;
|
|
mov.f32 %f1156, 0f7F800000;
|
|
@%p153 bra $L__BB0_121;
|
|
|
|
fma.rn.f32 %f1156, %f173, %f172, %f173;
|
|
|
|
$L__BB0_121:
|
|
setp.lt.f32 %p154, %f157, 0f00000000;
|
|
and.pred %p8, %p154, %p141;
|
|
setp.eq.f32 %p156, %f157, 0f00000000;
|
|
@%p156 bra $L__BB0_125;
|
|
bra.uni $L__BB0_122;
|
|
|
|
$L__BB0_125:
|
|
add.f32 %f977, %f157, %f157;
|
|
selp.f32 %f1158, %f977, 0f00000000, %p141;
|
|
bra.uni $L__BB0_126;
|
|
|
|
$L__BB0_122:
|
|
mov.b32 %r393, %f1156;
|
|
xor.b32 %r394, %r393, -2147483648;
|
|
mov.b32 %f973, %r394;
|
|
selp.f32 %f1158, %f973, %f1156, %p8;
|
|
setp.geu.f32 %p157, %f157, 0f00000000;
|
|
@%p157 bra $L__BB0_126;
|
|
|
|
mov.f32 %f974, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f975, %f974;
|
|
setp.eq.f32 %p158, %f975, 0f3ED55555;
|
|
@%p158 bra $L__BB0_126;
|
|
|
|
mov.f32 %f1158, 0f7FFFFFFF;
|
|
|
|
$L__BB0_126:
|
|
add.f32 %f978, %f171, 0f3ED55555;
|
|
mov.b32 %r395, %f978;
|
|
setp.lt.s32 %p160, %r395, 2139095040;
|
|
@%p160 bra $L__BB0_131;
|
|
|
|
setp.gtu.f32 %p161, %f171, 0f7F800000;
|
|
@%p161 bra $L__BB0_130;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_130:
|
|
add.f32 %f1158, %f157, 0f3ED55555;
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_128:
|
|
setp.neu.f32 %p162, %f171, 0f7F800000;
|
|
@%p162 bra $L__BB0_131;
|
|
|
|
selp.f32 %f1158, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_131:
|
|
abs.f32 %f182, %f158;
|
|
setp.lt.f32 %p163, %f182, 0f00800000;
|
|
mul.f32 %f980, %f182, 0f4B800000;
|
|
selp.f32 %f981, %f980, %f182, %p163;
|
|
selp.f32 %f982, 0fC3170000, 0fC2FE0000, %p163;
|
|
mov.b32 %r396, %f981;
|
|
and.b32 %r397, %r396, 8388607;
|
|
or.b32 %r398, %r397, 1065353216;
|
|
mov.b32 %f983, %r398;
|
|
shr.u32 %r399, %r396, 23;
|
|
cvt.rn.f32.u32 %f984, %r399;
|
|
add.f32 %f985, %f982, %f984;
|
|
setp.gt.f32 %p164, %f983, 0f3FB504F3;
|
|
mul.f32 %f986, %f983, 0f3F000000;
|
|
add.f32 %f987, %f985, 0f3F800000;
|
|
selp.f32 %f988, %f987, %f985, %p164;
|
|
selp.f32 %f989, %f986, %f983, %p164;
|
|
add.f32 %f990, %f989, 0fBF800000;
|
|
add.f32 %f991, %f989, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f992, %f991;
|
|
add.f32 %f993, %f990, %f990;
|
|
mul.f32 %f994, %f993, %f992;
|
|
mul.f32 %f995, %f994, %f994;
|
|
mov.f32 %f996, 0f3C4CAF63;
|
|
mov.f32 %f997, 0f3B18F0FE;
|
|
fma.rn.f32 %f998, %f997, %f995, %f996;
|
|
mov.f32 %f999, 0f3DAAAABD;
|
|
fma.rn.f32 %f1000, %f998, %f995, %f999;
|
|
mul.rn.f32 %f1001, %f1000, %f995;
|
|
mul.rn.f32 %f1002, %f1001, %f994;
|
|
sub.f32 %f1003, %f990, %f994;
|
|
add.f32 %f1004, %f1003, %f1003;
|
|
neg.f32 %f1005, %f994;
|
|
fma.rn.f32 %f1006, %f1005, %f990, %f1004;
|
|
mul.rn.f32 %f1007, %f992, %f1006;
|
|
add.f32 %f1008, %f1002, %f994;
|
|
sub.f32 %f1009, %f994, %f1008;
|
|
add.f32 %f1010, %f1002, %f1009;
|
|
add.f32 %f1011, %f1007, %f1010;
|
|
add.f32 %f1012, %f1008, %f1011;
|
|
sub.f32 %f1013, %f1008, %f1012;
|
|
add.f32 %f1014, %f1011, %f1013;
|
|
mov.f32 %f1015, 0f3F317200;
|
|
mul.rn.f32 %f1016, %f988, %f1015;
|
|
mov.f32 %f1017, 0f35BFBE8E;
|
|
mul.rn.f32 %f1018, %f988, %f1017;
|
|
add.f32 %f1019, %f1016, %f1012;
|
|
sub.f32 %f1020, %f1016, %f1019;
|
|
add.f32 %f1021, %f1012, %f1020;
|
|
add.f32 %f1022, %f1014, %f1021;
|
|
add.f32 %f1023, %f1018, %f1022;
|
|
add.f32 %f1024, %f1019, %f1023;
|
|
sub.f32 %f1025, %f1019, %f1024;
|
|
add.f32 %f1026, %f1023, %f1025;
|
|
mov.f32 %f1027, 0f3ED55555;
|
|
mul.rn.f32 %f1028, %f1027, %f1024;
|
|
neg.f32 %f1029, %f1028;
|
|
fma.rn.f32 %f1030, %f1027, %f1024, %f1029;
|
|
fma.rn.f32 %f1031, %f1027, %f1026, %f1030;
|
|
mov.f32 %f1032, 0f00000000;
|
|
fma.rn.f32 %f1033, %f1032, %f1024, %f1031;
|
|
add.rn.f32 %f1034, %f1028, %f1033;
|
|
neg.f32 %f1035, %f1034;
|
|
add.rn.f32 %f1036, %f1028, %f1035;
|
|
add.rn.f32 %f1037, %f1036, %f1033;
|
|
mov.b32 %r400, %f1034;
|
|
setp.eq.s32 %p165, %r400, 1118925336;
|
|
add.s32 %r401, %r400, -1;
|
|
mov.b32 %f1038, %r401;
|
|
add.f32 %f1039, %f1037, 0f37000000;
|
|
selp.f32 %f183, %f1039, %f1037, %p165;
|
|
selp.f32 %f1040, %f1038, %f1034, %p165;
|
|
mov.f32 %f1041, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1042, %f1040, %f1041;
|
|
cvt.rzi.f32.f32 %f1043, %f1042;
|
|
abs.f32 %f1044, %f1043;
|
|
setp.gt.f32 %p166, %f1044, 0f42FC0000;
|
|
mov.b32 %r402, %f1043;
|
|
and.b32 %r403, %r402, -2147483648;
|
|
or.b32 %r404, %r403, 1123811328;
|
|
mov.b32 %f1045, %r404;
|
|
selp.f32 %f1046, %f1045, %f1043, %p166;
|
|
mov.f32 %f1047, 0fBF317218;
|
|
fma.rn.f32 %f1048, %f1046, %f1047, %f1040;
|
|
mov.f32 %f1049, 0f3102E308;
|
|
fma.rn.f32 %f1050, %f1046, %f1049, %f1048;
|
|
mul.f32 %f1051, %f1050, 0f3FB8AA3B;
|
|
add.f32 %f1052, %f1046, 0f4B40007F;
|
|
mov.b32 %r405, %f1052;
|
|
shl.b32 %r406, %r405, 23;
|
|
mov.b32 %f1053, %r406;
|
|
ex2.approx.ftz.f32 %f1054, %f1051;
|
|
mul.f32 %f184, %f1054, %f1053;
|
|
setp.eq.f32 %p167, %f184, 0f7F800000;
|
|
mov.f32 %f1159, 0f7F800000;
|
|
@%p167 bra $L__BB0_133;
|
|
|
|
fma.rn.f32 %f1159, %f184, %f183, %f184;
|
|
|
|
$L__BB0_133:
|
|
setp.lt.f32 %p168, %f158, 0f00000000;
|
|
and.pred %p9, %p168, %p141;
|
|
setp.eq.f32 %p170, %f158, 0f00000000;
|
|
@%p170 bra $L__BB0_137;
|
|
bra.uni $L__BB0_134;
|
|
|
|
$L__BB0_137:
|
|
add.f32 %f1059, %f158, %f158;
|
|
selp.f32 %f1161, %f1059, 0f00000000, %p141;
|
|
bra.uni $L__BB0_138;
|
|
|
|
$L__BB0_134:
|
|
mov.b32 %r407, %f1159;
|
|
xor.b32 %r408, %r407, -2147483648;
|
|
mov.b32 %f1055, %r408;
|
|
selp.f32 %f1161, %f1055, %f1159, %p9;
|
|
setp.geu.f32 %p171, %f158, 0f00000000;
|
|
@%p171 bra $L__BB0_138;
|
|
|
|
mov.f32 %f1056, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1057, %f1056;
|
|
setp.eq.f32 %p172, %f1057, 0f3ED55555;
|
|
@%p172 bra $L__BB0_138;
|
|
|
|
mov.f32 %f1161, 0f7FFFFFFF;
|
|
|
|
$L__BB0_138:
|
|
add.f32 %f1060, %f182, 0f3ED55555;
|
|
mov.b32 %r409, %f1060;
|
|
setp.lt.s32 %p174, %r409, 2139095040;
|
|
@%p174 bra $L__BB0_143;
|
|
|
|
setp.gtu.f32 %p175, %f182, 0f7F800000;
|
|
@%p175 bra $L__BB0_142;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_142:
|
|
add.f32 %f1161, %f158, 0f3ED55555;
|
|
bra.uni $L__BB0_143;
|
|
|
|
$L__BB0_140:
|
|
setp.neu.f32 %p176, %f182, 0f7F800000;
|
|
@%p176 bra $L__BB0_143;
|
|
|
|
selp.f32 %f1161, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_143:
|
|
fma.rn.f32 %f1061, %f1155, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p177, %f156, 0f3F800000;
|
|
mov.f32 %f1062, 0f3F800000;
|
|
selp.f32 %f1063, 0f3F7FFFFF, %f1061, %p177;
|
|
mul.f32 %f1064, %f156, 0f414EB852;
|
|
setp.lt.f32 %p178, %f156, 0f3B4D2E1C;
|
|
selp.f32 %f1065, %f1064, %f1063, %p178;
|
|
fma.rn.f32 %f1066, %f1158, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p179, %f157, 0f3F800000;
|
|
selp.f32 %f1067, 0f3F7FFFFF, %f1066, %p179;
|
|
mul.f32 %f1068, %f157, 0f414EB852;
|
|
setp.lt.f32 %p180, %f157, 0f3B4D2E1C;
|
|
selp.f32 %f1069, %f1068, %f1067, %p180;
|
|
fma.rn.f32 %f1070, %f1161, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p181, %f158, 0f3F800000;
|
|
selp.f32 %f1071, 0f3F7FFFFF, %f1070, %p181;
|
|
mul.f32 %f1072, %f158, 0f414EB852;
|
|
setp.lt.f32 %p182, %f158, 0f3B4D2E1C;
|
|
selp.f32 %f1073, %f1072, %f1071, %p182;
|
|
min.f32 %f1074, %f1065, %f1062;
|
|
mov.f32 %f1075, 0f00000000;
|
|
max.f32 %f1076, %f1075, %f1074;
|
|
mul.f32 %f1077, %f1076, 0f43800000;
|
|
cvt.rzi.u32.f32 %r410, %f1077;
|
|
min.u32 %r411, %r410, 255;
|
|
min.f32 %f1078, %f1069, %f1062;
|
|
max.f32 %f1079, %f1075, %f1078;
|
|
mul.f32 %f1080, %f1079, 0f43800000;
|
|
cvt.rzi.u32.f32 %r412, %f1080;
|
|
min.u32 %r413, %r412, 255;
|
|
min.f32 %f1081, %f1073, %f1062;
|
|
max.f32 %f1082, %f1075, %f1081;
|
|
mul.f32 %f1083, %f1082, 0f43800000;
|
|
cvt.rzi.u32.f32 %r414, %f1083;
|
|
min.u32 %r415, %r414, 255;
|
|
shl.b64 %rd72, %rd22, 2;
|
|
add.s64 %rd73, %rd21, %rd72;
|
|
cvt.u16.u32 %rs18, %r415;
|
|
cvt.u16.u32 %rs19, %r413;
|
|
cvt.u16.u32 %rs20, %r411;
|
|
mov.u16 %rs21, 255;
|
|
st.global.v4.u8 [%rd73], {%rs20, %rs19, %rs18, %rs21};
|
|
|
|
$L__BB0_144:
|
|
and.b32 %r416, %r56, 4;
|
|
setp.eq.s32 %p183, %r416, 0;
|
|
@%p183 bra $L__BB0_156;
|
|
|
|
ld.const.u32 %r417, [params+108];
|
|
setp.eq.s32 %p184, %r417, 0;
|
|
ld.const.u64 %rd74, [params+224];
|
|
cvta.to.global.u64 %rd75, %rd74;
|
|
ld.const.u32 %r418, [params+216];
|
|
mad.lo.s32 %r419, %r418, %r7, %r6;
|
|
mul.wide.u32 %rd76, %r419, 8;
|
|
add.s64 %rd23, %rd75, %rd76;
|
|
@%p184 bra $L__BB0_147;
|
|
|
|
ld.global.v4.u16 {%rs29, %rs30, %rs31, %rs32}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1084, %rs29;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1085, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1086, %rs31;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1087, %f117, %f1084;
|
|
add.f32 %f1088, %f118, %f1085;
|
|
add.f32 %f1089, %f119, %f1086;
|
|
mov.f32 %f1090, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1089;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1088;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f1087;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1090;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs25, %rs26, %rs27, %rs28};
|
|
bra.uni $L__BB0_156;
|
|
|
|
$L__BB0_147:
|
|
mov.f32 %f1094, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1094;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f119;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f118;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f117;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs33, %rs34, %rs35, %rs36};
|
|
|
|
$L__BB0_156:
|
|
ret;
|
|
|
|
}
|
|
|