1660 lines
46 KiB
Plaintext
1660 lines
46 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<146>;
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.reg .b16 %rs<46>;
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.reg .f32 %f<917>;
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.reg .b32 %r<329>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<90>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r50), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r51), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+540];
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ld.const.u64 %rd19, [params+400];
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cvta.to.global.u64 %rd20, %rd19;
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ld.const.u32 %r56, [params+392];
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mad.lo.s32 %r57, %r56, %r51, %r50;
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mul.wide.u32 %rd21, %r57, 4;
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add.s64 %rd2, %rd20, %rd21;
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ld.global.v2.u8 {%rs7, %rs45}, [%rd2];
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or.b16 %rs9, %rs7, %rs45;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p7, %rs10, 0;
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@%p7 bra $L__BB0_2;
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ld.global.u8 %rs44, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs44, [%rd2+2];
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setp.eq.s16 %p8, %rs44, 0;
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mov.f32 %f878, 0f00000000;
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mov.u16 %rs45, 0;
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mov.f32 %f879, %f878;
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mov.f32 %f880, %f878;
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@%p8 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f155, %rs7;
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div.rn.f32 %f156, %f155, 0f437F0000;
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fma.rn.f32 %f157, %f156, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs45, 255;
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cvt.rn.f32.u16 %f158, %rs13;
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div.rn.f32 %f159, %f158, 0f437F0000;
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fma.rn.f32 %f160, %f159, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f161, %rs44;
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div.rn.f32 %f162, %f161, 0f437F0000;
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fma.rn.f32 %f163, %f162, 0f40000000, 0fBF800000;
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mul.f32 %f164, %f160, %f160;
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fma.rn.f32 %f165, %f157, %f157, %f164;
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fma.rn.f32 %f166, %f163, %f163, %f165;
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sqrt.rn.f32 %f167, %f166;
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rcp.rn.f32 %f168, %f167;
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mul.f32 %f880, %f168, %f163;
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mul.f32 %f879, %f168, %f160;
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mul.f32 %f878, %f157, %f168;
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$L__BB0_4:
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ld.const.v2.u32 {%r58, %r59}, [params];
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add.s32 %r4, %r58, %r50;
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add.s32 %r5, %r59, %r51;
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setp.eq.f32 %p9, %f878, 0f00000000;
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setp.eq.f32 %p10, %f879, 0f00000000;
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and.pred %p11, %p9, %p10;
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setp.eq.f32 %p12, %f880, 0f00000000;
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and.pred %p13, %p12, %p11;
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@%p13 bra $L__BB0_116;
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bra.uni $L__BB0_5;
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$L__BB0_116:
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ld.const.u32 %r49, [params+104];
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and.b32 %r305, %r49, 1;
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setp.eq.b32 %p140, %r305, 1;
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mov.pred %p141, 0;
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xor.pred %p142, %p140, %p141;
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not.pred %p143, %p142;
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@%p143 bra $L__BB0_118;
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ld.const.u64 %rd70, [params+144];
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cvta.to.global.u64 %rd71, %rd70;
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ld.const.u32 %r306, [params+136];
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mad.lo.s32 %r307, %r306, %r5, %r4;
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mul.wide.u32 %rd72, %r307, 4;
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add.s64 %rd73, %rd71, %rd72;
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mov.u16 %rs35, 0;
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st.global.v4.u8 [%rd73], {%rs35, %rs35, %rs35, %rs35};
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$L__BB0_118:
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and.b32 %r308, %r49, 4;
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setp.eq.s32 %p144, %r308, 0;
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@%p144 bra $L__BB0_120;
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ld.const.u64 %rd74, [params+224];
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cvta.to.global.u64 %rd75, %rd74;
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ld.const.u32 %r309, [params+216];
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mad.lo.s32 %r310, %r309, %r5, %r4;
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mov.f32 %f850, 0f00000000;
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mul.wide.u32 %rd76, %r310, 8;
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add.s64 %rd77, %rd75, %rd76;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs38, %f850;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs37, %f850;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs36, %f850;}
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// end inline asm
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mov.u16 %rs39, 0;
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st.global.v4.u16 [%rd77], {%rs36, %rs37, %rs38, %rs39};
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$L__BB0_120:
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and.b32 %r311, %r49, 16;
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setp.eq.s32 %p145, %r311, 0;
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@%p145 bra $L__BB0_122;
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ld.const.u64 %rd78, [params+240];
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cvta.to.global.u64 %rd79, %rd78;
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ld.const.u32 %r312, [params+232];
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mad.lo.s32 %r313, %r312, %r5, %r4;
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mov.f32 %f853, 0f00000000;
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mul.wide.u32 %rd80, %r313, 8;
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add.s64 %rd81, %rd79, %rd80;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs42, %f853;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs41, %f853;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs40, %f853;}
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// end inline asm
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mov.u16 %rs43, 0;
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st.global.v4.u16 [%rd81], {%rs40, %rs41, %rs42, %rs43};
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bra.uni $L__BB0_122;
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$L__BB0_5:
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ld.const.u64 %rd22, [params+496];
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cvta.to.global.u64 %rd23, %rd22;
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ld.const.u32 %r62, [params+488];
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mad.lo.s32 %r63, %r62, %r51, %r50;
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mul.wide.u32 %rd24, %r63, 8;
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add.s64 %rd25, %rd23, %rd24;
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ld.global.v4.u16 {%rs19, %rs20, %rs21, %rs22}, [%rd25];
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// begin inline asm
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{ cvt.f32.f16 %f169, %rs19;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f170, %rs20;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f171, %rs21;}
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// end inline asm
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ld.const.u64 %rd26, [params+432];
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cvta.to.global.u64 %rd27, %rd26;
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ld.const.u32 %r64, [params+424];
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mad.lo.s32 %r65, %r64, %r51, %r50;
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mul.wide.u32 %rd28, %r65, 12;
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add.s64 %rd29, %rd27, %rd28;
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ld.global.f32 %f176, [%rd29];
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mul.f32 %f177, %f176, 0f3456BF95;
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ld.global.f32 %f178, [%rd29+4];
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mul.f32 %f179, %f178, 0f3456BF95;
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ld.global.f32 %f180, [%rd29+8];
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mul.f32 %f181, %f180, 0f3456BF95;
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abs.f32 %f182, %f878;
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div.rn.f32 %f183, %f177, %f182;
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abs.f32 %f184, %f879;
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div.rn.f32 %f185, %f179, %f184;
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abs.f32 %f186, %f880;
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div.rn.f32 %f187, %f181, %f186;
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abs.f32 %f188, %f183;
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abs.f32 %f189, %f185;
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abs.f32 %f190, %f187;
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mov.f32 %f191, 0f38D1B717;
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max.f32 %f192, %f188, %f191;
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max.f32 %f193, %f189, %f191;
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max.f32 %f194, %f190, %f191;
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fma.rn.f32 %f13, %f878, %f192, %f176;
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fma.rn.f32 %f14, %f879, %f193, %f178;
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fma.rn.f32 %f15, %f880, %f194, %f180;
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setp.gt.f32 %p14, %f182, %f186;
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neg.f32 %f195, %f879;
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selp.f32 %f196, %f195, 0f00000000, %p14;
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mov.f32 %f896, 0f00000000;
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neg.f32 %f197, %f880;
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selp.f32 %f198, %f878, %f197, %p14;
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selp.f32 %f199, 0f00000000, %f879, %p14;
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mul.f32 %f200, %f198, %f198;
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fma.rn.f32 %f201, %f196, %f196, %f200;
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fma.rn.f32 %f202, %f199, %f199, %f201;
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sqrt.rn.f32 %f203, %f202;
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rcp.rn.f32 %f204, %f203;
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mul.f32 %f16, %f196, %f204;
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mul.f32 %f17, %f198, %f204;
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mul.f32 %f18, %f199, %f204;
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ld.const.u64 %rd30, [params+128];
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cvta.to.global.u64 %rd31, %rd30;
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ld.const.u32 %r66, [params+120];
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mad.lo.s32 %r67, %r66, %r51, %r50;
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mul.wide.u32 %rd32, %r67, 4;
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add.s64 %rd3, %rd31, %rd32;
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setp.lt.s32 %p15, %r3, 1;
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mov.f32 %f886, %f896;
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mov.f32 %f885, %f896;
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mov.f32 %f884, %f896;
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@%p15 bra $L__BB0_34;
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cvt.rn.f32.s32 %f208, %r3;
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rcp.rn.f32 %f19, %f208;
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ld.global.u32 %r321, [%rd3];
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mul.f32 %f20, %f13, 0f3456BF95;
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mul.f32 %f21, %f14, 0f3456BF95;
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mul.f32 %f22, %f15, 0f3456BF95;
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ld.const.u64 %rd4, [params+96];
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mul.f32 %f209, %f878, %f17;
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mul.f32 %f210, %f879, %f16;
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sub.f32 %f23, %f210, %f209;
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mul.f32 %f211, %f880, %f16;
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mul.f32 %f212, %f878, %f18;
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sub.f32 %f24, %f212, %f211;
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mul.f32 %f213, %f879, %f18;
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mul.f32 %f214, %f880, %f17;
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sub.f32 %f25, %f214, %f213;
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mov.u32 %r68, 0;
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add.s64 %rd5, %rd1, 24;
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mov.u64 %rd33, __cudart_i2opi_f;
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abs.f32 %f280, %f21;
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abs.f32 %f281, %f20;
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max.f32 %f282, %f281, %f280;
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abs.f32 %f283, %f22;
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max.f32 %f284, %f282, %f283;
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mov.u32 %r318, %r68;
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$L__BB0_7:
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cvt.rn.f32.s32 %f29, %r318;
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mov.u32 %r320, %r68;
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$L__BB0_8:
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mad.lo.s32 %r70, %r321, 1664525, 1013904223;
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and.b32 %r71, %r70, 16777215;
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cvt.rn.f32.u32 %f215, %r71;
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fma.rn.f32 %f216, %f215, 0f33800000, %f29;
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mul.f32 %f217, %f19, %f216;
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mad.lo.s32 %r321, %r70, 1664525, 1013904223;
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and.b32 %r72, %r321, 16777215;
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cvt.rn.f32.u32 %f218, %r72;
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cvt.rn.f32.s32 %f219, %r320;
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fma.rn.f32 %f220, %f218, 0f33800000, %f219;
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mul.f32 %f221, %f19, %f220;
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sqrt.rn.f32 %f33, %f217;
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mul.f32 %f34, %f221, 0f40C90FDB;
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mul.f32 %f222, %f34, 0f3F22F983;
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cvt.rni.s32.f32 %r328, %f222;
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cvt.rn.f32.s32 %f223, %r328;
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mov.f32 %f224, 0fBFC90FDA;
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fma.rn.f32 %f225, %f223, %f224, %f34;
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mov.f32 %f226, 0fB3A22168;
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fma.rn.f32 %f227, %f223, %f226, %f225;
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mov.f32 %f228, 0fA7C234C5;
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fma.rn.f32 %f890, %f223, %f228, %f227;
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abs.f32 %f36, %f34;
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setp.ltu.f32 %p16, %f36, 0f47CE4780;
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mov.u32 %r325, %r328;
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mov.f32 %f887, %f890;
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@%p16 bra $L__BB0_16;
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setp.eq.f32 %p17, %f36, 0f7F800000;
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@%p17 bra $L__BB0_15;
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bra.uni $L__BB0_10;
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$L__BB0_15:
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mov.f32 %f231, 0f00000000;
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mul.rn.f32 %f887, %f34, %f231;
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mov.u32 %r325, 0;
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bra.uni $L__BB0_16;
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$L__BB0_10:
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mov.b32 %r13, %f34;
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bfe.u32 %r74, %r13, 23, 8;
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add.s32 %r14, %r74, -128;
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shl.b32 %r75, %r13, 8;
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or.b32 %r15, %r75, -2147483648;
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shr.u32 %r16, %r14, 5;
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mov.u64 %rd87, 0;
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mov.u32 %r322, 0;
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mov.u64 %rd85, %rd1;
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mov.u64 %rd86, %rd33;
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$L__BB0_11:
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.pragma "nounroll";
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ld.global.nc.u32 %r76, [%rd86];
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mad.wide.u32 %rd35, %r76, %r15, %rd87;
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shr.u64 %rd87, %rd35, 32;
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st.local.u32 [%rd85], %rd35;
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add.s64 %rd86, %rd86, 4;
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add.s64 %rd85, %rd85, 4;
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add.s32 %r322, %r322, 1;
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setp.ne.s32 %p18, %r322, 6;
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@%p18 bra $L__BB0_11;
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st.local.u32 [%rd5], %rd87;
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mov.u32 %r77, 4;
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sub.s32 %r19, %r77, %r16;
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mov.u32 %r78, 6;
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sub.s32 %r79, %r78, %r16;
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mul.wide.s32 %rd36, %r79, 4;
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add.s64 %rd37, %rd1, %rd36;
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ld.local.u32 %r323, [%rd37];
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ld.local.u32 %r324, [%rd37+-4];
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and.b32 %r22, %r14, 31;
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setp.eq.s32 %p19, %r22, 0;
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@%p19 bra $L__BB0_14;
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mov.u32 %r80, 32;
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sub.s32 %r81, %r80, %r22;
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shr.u32 %r82, %r324, %r81;
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shl.b32 %r83, %r323, %r22;
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add.s32 %r323, %r82, %r83;
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mul.wide.s32 %rd38, %r19, 4;
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add.s64 %rd39, %rd1, %rd38;
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ld.local.u32 %r84, [%rd39];
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shr.u32 %r85, %r84, %r81;
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shl.b32 %r86, %r324, %r22;
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add.s32 %r324, %r85, %r86;
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$L__BB0_14:
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and.b32 %r87, %r13, -2147483648;
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shr.u32 %r88, %r324, 30;
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shl.b32 %r89, %r323, 2;
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or.b32 %r90, %r88, %r89;
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shr.u32 %r91, %r90, 31;
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shr.u32 %r92, %r323, 30;
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add.s32 %r93, %r91, %r92;
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neg.s32 %r94, %r93;
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setp.eq.s32 %p20, %r87, 0;
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selp.b32 %r325, %r93, %r94, %p20;
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setp.ne.s32 %p21, %r91, 0;
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xor.b32 %r95, %r87, -2147483648;
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selp.b32 %r96, %r95, %r87, %p21;
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selp.b32 %r97, -1, 0, %p21;
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xor.b32 %r98, %r90, %r97;
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shl.b32 %r99, %r324, 2;
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xor.b32 %r100, %r99, %r97;
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cvt.u64.u32 %rd40, %r98;
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cvt.u64.u32 %rd41, %r100;
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bfi.b64 %rd42, %rd40, %rd41, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd42;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f229, %fd2;
|
|
setp.eq.s32 %p22, %r96, 0;
|
|
neg.f32 %f230, %f229;
|
|
selp.f32 %f887, %f229, %f230, %p22;
|
|
|
|
$L__BB0_16:
|
|
add.s32 %r29, %r325, 1;
|
|
and.b32 %r30, %r29, 1;
|
|
setp.eq.s32 %p23, %r30, 0;
|
|
selp.f32 %f40, %f887, 0f3F800000, %p23;
|
|
mul.rn.f32 %f41, %f887, %f887;
|
|
mov.f32 %f888, 0fB94D4153;
|
|
@%p23 bra $L__BB0_18;
|
|
|
|
mov.f32 %f233, 0fBAB607ED;
|
|
mov.f32 %f234, 0f37CBAC00;
|
|
fma.rn.f32 %f888, %f234, %f41, %f233;
|
|
|
|
$L__BB0_18:
|
|
selp.f32 %f235, 0f3C0885E4, 0f3D2AAABB, %p23;
|
|
fma.rn.f32 %f236, %f888, %f41, %f235;
|
|
selp.f32 %f237, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
|
|
fma.rn.f32 %f238, %f236, %f41, %f237;
|
|
mov.f32 %f239, 0f00000000;
|
|
fma.rn.f32 %f240, %f41, %f40, %f239;
|
|
fma.rn.f32 %f889, %f238, %f240, %f40;
|
|
and.b32 %r102, %r29, 2;
|
|
setp.eq.s32 %p25, %r102, 0;
|
|
@%p25 bra $L__BB0_20;
|
|
|
|
mov.f32 %f242, 0fBF800000;
|
|
fma.rn.f32 %f889, %f889, %f242, %f239;
|
|
|
|
$L__BB0_20:
|
|
@%p16 bra $L__BB0_28;
|
|
|
|
setp.eq.f32 %p27, %f36, 0f7F800000;
|
|
@%p27 bra $L__BB0_27;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f245, 0f00000000;
|
|
mul.rn.f32 %f890, %f34, %f245;
|
|
mov.u32 %r328, 0;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_22:
|
|
mov.b32 %r31, %f34;
|
|
bfe.u32 %r103, %r31, 23, 8;
|
|
add.s32 %r32, %r103, -128;
|
|
shl.b32 %r104, %r31, 8;
|
|
or.b32 %r33, %r104, -2147483648;
|
|
shr.u32 %r34, %r32, 5;
|
|
mov.u64 %rd88, 0;
|
|
mov.u64 %rd89, %rd88;
|
|
|
|
$L__BB0_23:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd45, %rd88, 2;
|
|
mov.u64 %rd46, __cudart_i2opi_f;
|
|
add.s64 %rd47, %rd46, %rd45;
|
|
ld.global.nc.u32 %r105, [%rd47];
|
|
mad.wide.u32 %rd48, %r105, %r33, %rd89;
|
|
shr.u64 %rd89, %rd48, 32;
|
|
add.s64 %rd49, %rd1, %rd45;
|
|
st.local.u32 [%rd49], %rd48;
|
|
cvt.u32.u64 %r106, %rd88;
|
|
add.s32 %r107, %r106, 1;
|
|
cvt.s64.s32 %rd88, %r107;
|
|
setp.ne.s32 %p28, %r107, 6;
|
|
@%p28 bra $L__BB0_23;
|
|
|
|
st.local.u32 [%rd5], %rd89;
|
|
mov.u32 %r108, 4;
|
|
sub.s32 %r35, %r108, %r34;
|
|
mov.u32 %r109, 6;
|
|
sub.s32 %r110, %r109, %r34;
|
|
mul.wide.s32 %rd50, %r110, 4;
|
|
add.s64 %rd51, %rd1, %rd50;
|
|
ld.local.u32 %r326, [%rd51];
|
|
ld.local.u32 %r327, [%rd51+-4];
|
|
and.b32 %r38, %r32, 31;
|
|
setp.eq.s32 %p29, %r38, 0;
|
|
@%p29 bra $L__BB0_26;
|
|
|
|
mov.u32 %r111, 32;
|
|
sub.s32 %r112, %r111, %r38;
|
|
shr.u32 %r113, %r327, %r112;
|
|
shl.b32 %r114, %r326, %r38;
|
|
add.s32 %r326, %r113, %r114;
|
|
mul.wide.s32 %rd52, %r35, 4;
|
|
add.s64 %rd53, %rd1, %rd52;
|
|
ld.local.u32 %r115, [%rd53];
|
|
shr.u32 %r116, %r115, %r112;
|
|
shl.b32 %r117, %r327, %r38;
|
|
add.s32 %r327, %r116, %r117;
|
|
|
|
$L__BB0_26:
|
|
and.b32 %r118, %r31, -2147483648;
|
|
shr.u32 %r119, %r327, 30;
|
|
shl.b32 %r120, %r326, 2;
|
|
or.b32 %r121, %r119, %r120;
|
|
shr.u32 %r122, %r121, 31;
|
|
shr.u32 %r123, %r326, 30;
|
|
add.s32 %r124, %r122, %r123;
|
|
neg.s32 %r125, %r124;
|
|
setp.eq.s32 %p30, %r118, 0;
|
|
selp.b32 %r328, %r124, %r125, %p30;
|
|
setp.ne.s32 %p31, %r122, 0;
|
|
xor.b32 %r126, %r118, -2147483648;
|
|
selp.b32 %r127, %r126, %r118, %p31;
|
|
selp.b32 %r128, -1, 0, %p31;
|
|
xor.b32 %r129, %r121, %r128;
|
|
shl.b32 %r130, %r327, 2;
|
|
xor.b32 %r131, %r130, %r128;
|
|
cvt.u64.u32 %rd54, %r129;
|
|
cvt.u64.u32 %rd55, %r131;
|
|
bfi.b64 %rd56, %rd54, %rd55, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd56;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f243, %fd4;
|
|
setp.eq.s32 %p32, %r127, 0;
|
|
neg.f32 %f244, %f243;
|
|
selp.f32 %f890, %f243, %f244, %p32;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f50, %f33, %f889;
|
|
and.b32 %r45, %r328, 1;
|
|
setp.eq.s32 %p33, %r45, 0;
|
|
selp.f32 %f51, %f890, 0f3F800000, %p33;
|
|
mul.rn.f32 %f52, %f890, %f890;
|
|
mov.f32 %f891, 0fB94D4153;
|
|
@%p33 bra $L__BB0_30;
|
|
|
|
mov.f32 %f247, 0fBAB607ED;
|
|
mov.f32 %f248, 0f37CBAC00;
|
|
fma.rn.f32 %f891, %f248, %f52, %f247;
|
|
|
|
$L__BB0_30:
|
|
selp.f32 %f249, 0f3C0885E4, 0f3D2AAABB, %p33;
|
|
fma.rn.f32 %f250, %f891, %f52, %f249;
|
|
selp.f32 %f251, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
|
|
fma.rn.f32 %f252, %f250, %f52, %f251;
|
|
mov.f32 %f253, 0f00000000;
|
|
fma.rn.f32 %f254, %f52, %f51, %f253;
|
|
fma.rn.f32 %f892, %f252, %f254, %f51;
|
|
and.b32 %r133, %r328, 2;
|
|
setp.eq.s32 %p35, %r133, 0;
|
|
@%p35 bra $L__BB0_32;
|
|
|
|
mov.f32 %f256, 0fBF800000;
|
|
fma.rn.f32 %f892, %f892, %f256, %f253;
|
|
|
|
$L__BB0_32:
|
|
mul.f32 %f266, %f50, %f50;
|
|
mov.f32 %f267, 0f3F800000;
|
|
sub.f32 %f268, %f267, %f266;
|
|
mul.f32 %f269, %f33, %f892;
|
|
mul.f32 %f270, %f269, %f269;
|
|
sub.f32 %f271, %f268, %f270;
|
|
max.f32 %f272, %f253, %f271;
|
|
sqrt.rn.f32 %f273, %f272;
|
|
mul.f32 %f274, %f16, %f269;
|
|
mul.f32 %f275, %f17, %f269;
|
|
mul.f32 %f276, %f18, %f269;
|
|
fma.rn.f32 %f277, %f25, %f50, %f274;
|
|
fma.rn.f32 %f278, %f24, %f50, %f275;
|
|
fma.rn.f32 %f279, %f23, %f50, %f276;
|
|
fma.rn.f32 %f260, %f878, %f273, %f277;
|
|
fma.rn.f32 %f261, %f879, %f273, %f278;
|
|
fma.rn.f32 %f262, %f880, %f273, %f279;
|
|
mov.f32 %f285, 0f38D1B717;
|
|
max.f32 %f263, %f284, %f285;
|
|
mov.f32 %f264, 0f6C4ECB8F;
|
|
mov.u32 %r167, 1;
|
|
mov.u32 %r170, 2;
|
|
mov.u32 %r172, 3;
|
|
mov.u32 %r204, 0;
|
|
// begin inline asm
|
|
call(%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165),_optix_trace_typed_32,(%r204,%rd4,%f13,%f14,%f15,%f260,%f261,%f262,%f263,%f264,%f253,%r167,%r204,%r204,%r170,%r204,%r172,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204);
|
|
// end inline asm
|
|
mov.b32 %f286, %r134;
|
|
mov.b32 %f287, %r135;
|
|
mov.b32 %f288, %r136;
|
|
add.f32 %f886, %f886, %f286;
|
|
add.f32 %f885, %f885, %f287;
|
|
add.f32 %f884, %f884, %f288;
|
|
add.s32 %r320, %r320, 1;
|
|
setp.lt.s32 %p36, %r320, %r3;
|
|
@%p36 bra $L__BB0_8;
|
|
|
|
add.s32 %r318, %r318, 1;
|
|
setp.lt.s32 %p37, %r318, %r3;
|
|
@%p37 bra $L__BB0_7;
|
|
|
|
$L__BB0_34:
|
|
mul.lo.s32 %r205, %r3, %r3;
|
|
cvt.rn.f32.s32 %f292, %r205;
|
|
rcp.rn.f32 %f293, %f292;
|
|
mul.f32 %f294, %f293, %f886;
|
|
mul.f32 %f295, %f293, %f885;
|
|
mul.f32 %f296, %f293, %f884;
|
|
ld.const.u64 %rd58, [params+504];
|
|
cvt.rn.f32.u32 %f297, %r5;
|
|
cvt.rn.f32.u32 %f298, %r4;
|
|
tex.2d.v4.f32.f32 {%f299, %f300, %f301, %f302}, [%rd58, {%f298, %f297}];
|
|
mul.f32 %f64, %f294, %f299;
|
|
mul.f32 %f65, %f295, %f300;
|
|
mul.f32 %f66, %f296, %f301;
|
|
add.f32 %f67, %f169, %f64;
|
|
add.f32 %f68, %f170, %f65;
|
|
add.f32 %f69, %f171, %f66;
|
|
abs.f32 %f303, %f67;
|
|
setp.gtu.f32 %p38, %f303, 0f7F800000;
|
|
mov.f32 %f897, %f896;
|
|
mov.f32 %f898, %f896;
|
|
@%p38 bra $L__BB0_38;
|
|
|
|
abs.f32 %f307, %f68;
|
|
setp.gtu.f32 %p39, %f307, 0f7F800000;
|
|
mov.f32 %f897, %f896;
|
|
mov.f32 %f898, %f896;
|
|
@%p39 bra $L__BB0_38;
|
|
|
|
abs.f32 %f311, %f69;
|
|
setp.gtu.f32 %p40, %f311, 0f7F800000;
|
|
mov.f32 %f897, %f896;
|
|
mov.f32 %f898, %f896;
|
|
@%p40 bra $L__BB0_38;
|
|
|
|
mov.f32 %f896, %f67;
|
|
mov.f32 %f897, %f68;
|
|
mov.f32 %f898, %f69;
|
|
|
|
$L__BB0_38:
|
|
ld.const.u32 %r48, [params+104];
|
|
and.b32 %r206, %r48, 1;
|
|
setp.eq.b32 %p41, %r206, 1;
|
|
mov.pred %p42, 0;
|
|
xor.pred %p43, %p41, %p42;
|
|
not.pred %p44, %p43;
|
|
@%p44 bra $L__BB0_112;
|
|
|
|
mov.f32 %f316, 0f3EE66666;
|
|
abs.f32 %f80, %f896;
|
|
setp.lt.f32 %p45, %f80, 0f00800000;
|
|
mul.f32 %f318, %f80, 0f4B800000;
|
|
selp.f32 %f319, %f318, %f80, %p45;
|
|
selp.f32 %f320, 0fC3170000, 0fC2FE0000, %p45;
|
|
mov.b32 %r207, %f319;
|
|
and.b32 %r208, %r207, 8388607;
|
|
or.b32 %r209, %r208, 1065353216;
|
|
mov.b32 %f321, %r209;
|
|
shr.u32 %r210, %r207, 23;
|
|
cvt.rn.f32.u32 %f322, %r210;
|
|
add.f32 %f323, %f320, %f322;
|
|
setp.gt.f32 %p46, %f321, 0f3FB504F3;
|
|
mul.f32 %f324, %f321, 0f3F000000;
|
|
add.f32 %f325, %f323, 0f3F800000;
|
|
selp.f32 %f326, %f325, %f323, %p46;
|
|
selp.f32 %f327, %f324, %f321, %p46;
|
|
add.f32 %f328, %f327, 0fBF800000;
|
|
add.f32 %f329, %f327, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f330, %f329;
|
|
add.f32 %f331, %f328, %f328;
|
|
mul.f32 %f332, %f331, %f330;
|
|
mul.f32 %f333, %f332, %f332;
|
|
mov.f32 %f334, 0f3C4CAF63;
|
|
mov.f32 %f335, 0f3B18F0FE;
|
|
fma.rn.f32 %f336, %f335, %f333, %f334;
|
|
mov.f32 %f337, 0f3DAAAABD;
|
|
fma.rn.f32 %f338, %f336, %f333, %f337;
|
|
mul.rn.f32 %f339, %f338, %f333;
|
|
mul.rn.f32 %f340, %f339, %f332;
|
|
sub.f32 %f341, %f328, %f332;
|
|
add.f32 %f342, %f341, %f341;
|
|
neg.f32 %f343, %f332;
|
|
fma.rn.f32 %f344, %f343, %f328, %f342;
|
|
mul.rn.f32 %f345, %f330, %f344;
|
|
add.f32 %f346, %f340, %f332;
|
|
sub.f32 %f347, %f332, %f346;
|
|
add.f32 %f348, %f340, %f347;
|
|
add.f32 %f349, %f345, %f348;
|
|
add.f32 %f350, %f346, %f349;
|
|
sub.f32 %f351, %f346, %f350;
|
|
add.f32 %f352, %f349, %f351;
|
|
mov.f32 %f353, 0f3F317200;
|
|
mul.rn.f32 %f354, %f326, %f353;
|
|
mov.f32 %f355, 0f35BFBE8E;
|
|
mul.rn.f32 %f356, %f326, %f355;
|
|
add.f32 %f357, %f354, %f350;
|
|
sub.f32 %f358, %f354, %f357;
|
|
add.f32 %f359, %f350, %f358;
|
|
add.f32 %f360, %f352, %f359;
|
|
add.f32 %f361, %f356, %f360;
|
|
add.f32 %f362, %f357, %f361;
|
|
sub.f32 %f363, %f357, %f362;
|
|
add.f32 %f364, %f361, %f363;
|
|
mul.rn.f32 %f365, %f316, %f362;
|
|
neg.f32 %f366, %f365;
|
|
fma.rn.f32 %f367, %f316, %f362, %f366;
|
|
fma.rn.f32 %f368, %f316, %f364, %f367;
|
|
mov.f32 %f369, 0f00000000;
|
|
fma.rn.f32 %f370, %f369, %f362, %f368;
|
|
add.rn.f32 %f371, %f365, %f370;
|
|
neg.f32 %f372, %f371;
|
|
add.rn.f32 %f373, %f365, %f372;
|
|
add.rn.f32 %f374, %f373, %f370;
|
|
mov.b32 %r211, %f371;
|
|
setp.eq.s32 %p47, %r211, 1118925336;
|
|
add.s32 %r212, %r211, -1;
|
|
mov.b32 %f375, %r212;
|
|
add.f32 %f376, %f374, 0f37000000;
|
|
selp.f32 %f81, %f376, %f374, %p47;
|
|
selp.f32 %f377, %f375, %f371, %p47;
|
|
mov.f32 %f378, 0f3FB8AA3B;
|
|
mul.rn.f32 %f379, %f377, %f378;
|
|
cvt.rzi.f32.f32 %f380, %f379;
|
|
abs.f32 %f381, %f380;
|
|
setp.gt.f32 %p48, %f381, 0f42FC0000;
|
|
mov.b32 %r213, %f380;
|
|
and.b32 %r214, %r213, -2147483648;
|
|
or.b32 %r215, %r214, 1123811328;
|
|
mov.b32 %f382, %r215;
|
|
selp.f32 %f383, %f382, %f380, %p48;
|
|
mov.f32 %f384, 0fBF317218;
|
|
fma.rn.f32 %f385, %f383, %f384, %f377;
|
|
mov.f32 %f386, 0f3102E308;
|
|
fma.rn.f32 %f387, %f383, %f386, %f385;
|
|
mul.f32 %f388, %f387, 0f3FB8AA3B;
|
|
add.f32 %f389, %f383, 0f4B40007F;
|
|
mov.b32 %r216, %f389;
|
|
shl.b32 %r217, %r216, 23;
|
|
mov.b32 %f390, %r217;
|
|
ex2.approx.ftz.f32 %f391, %f388;
|
|
mul.f32 %f82, %f391, %f390;
|
|
setp.eq.f32 %p49, %f82, 0f7F800000;
|
|
mov.f32 %f899, 0f7F800000;
|
|
@%p49 bra $L__BB0_41;
|
|
|
|
fma.rn.f32 %f899, %f82, %f81, %f82;
|
|
|
|
$L__BB0_41:
|
|
mov.f32 %f868, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f867, %f868;
|
|
add.f32 %f866, %f867, %f867;
|
|
mov.f32 %f865, 0f3EE66666;
|
|
sub.f32 %f864, %f865, %f866;
|
|
abs.f32 %f863, %f864;
|
|
setp.lt.f32 %p50, %f896, 0f00000000;
|
|
setp.eq.f32 %p51, %f863, 0f3F800000;
|
|
and.pred %p1, %p50, %p51;
|
|
setp.eq.f32 %p52, %f896, 0f00000000;
|
|
@%p52 bra $L__BB0_45;
|
|
bra.uni $L__BB0_42;
|
|
|
|
$L__BB0_45:
|
|
add.f32 %f396, %f896, %f896;
|
|
selp.f32 %f901, %f396, 0f00000000, %p51;
|
|
bra.uni $L__BB0_46;
|
|
|
|
$L__BB0_42:
|
|
mov.b32 %r218, %f899;
|
|
xor.b32 %r219, %r218, -2147483648;
|
|
mov.b32 %f392, %r219;
|
|
selp.f32 %f901, %f392, %f899, %p1;
|
|
setp.geu.f32 %p53, %f896, 0f00000000;
|
|
@%p53 bra $L__BB0_46;
|
|
|
|
mov.f32 %f393, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f394, %f393;
|
|
setp.eq.f32 %p54, %f394, 0f3EE66666;
|
|
@%p54 bra $L__BB0_46;
|
|
|
|
mov.f32 %f901, 0f7FFFFFFF;
|
|
|
|
$L__BB0_46:
|
|
abs.f32 %f869, %f896;
|
|
add.f32 %f397, %f869, 0f3EE66666;
|
|
mov.b32 %r220, %f397;
|
|
setp.lt.s32 %p56, %r220, 2139095040;
|
|
@%p56 bra $L__BB0_51;
|
|
|
|
abs.f32 %f870, %f896;
|
|
setp.gtu.f32 %p57, %f870, 0f7F800000;
|
|
@%p57 bra $L__BB0_50;
|
|
bra.uni $L__BB0_48;
|
|
|
|
$L__BB0_50:
|
|
add.f32 %f901, %f896, 0f3EE66666;
|
|
bra.uni $L__BB0_51;
|
|
|
|
$L__BB0_48:
|
|
abs.f32 %f871, %f896;
|
|
setp.neu.f32 %p58, %f871, 0f7F800000;
|
|
@%p58 bra $L__BB0_51;
|
|
|
|
selp.f32 %f901, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_51:
|
|
setp.eq.f32 %p59, %f896, 0f3F800000;
|
|
selp.f32 %f91, 0f3F800000, %f901, %p59;
|
|
abs.f32 %f92, %f897;
|
|
setp.lt.f32 %p60, %f92, 0f00800000;
|
|
mul.f32 %f399, %f92, 0f4B800000;
|
|
selp.f32 %f400, %f399, %f92, %p60;
|
|
selp.f32 %f401, 0fC3170000, 0fC2FE0000, %p60;
|
|
mov.b32 %r221, %f400;
|
|
and.b32 %r222, %r221, 8388607;
|
|
or.b32 %r223, %r222, 1065353216;
|
|
mov.b32 %f402, %r223;
|
|
shr.u32 %r224, %r221, 23;
|
|
cvt.rn.f32.u32 %f403, %r224;
|
|
add.f32 %f404, %f401, %f403;
|
|
setp.gt.f32 %p61, %f402, 0f3FB504F3;
|
|
mul.f32 %f405, %f402, 0f3F000000;
|
|
add.f32 %f406, %f404, 0f3F800000;
|
|
selp.f32 %f407, %f406, %f404, %p61;
|
|
selp.f32 %f408, %f405, %f402, %p61;
|
|
add.f32 %f409, %f408, 0fBF800000;
|
|
add.f32 %f410, %f408, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f411, %f410;
|
|
add.f32 %f412, %f409, %f409;
|
|
mul.f32 %f413, %f412, %f411;
|
|
mul.f32 %f414, %f413, %f413;
|
|
mov.f32 %f415, 0f3C4CAF63;
|
|
mov.f32 %f416, 0f3B18F0FE;
|
|
fma.rn.f32 %f417, %f416, %f414, %f415;
|
|
mov.f32 %f418, 0f3DAAAABD;
|
|
fma.rn.f32 %f419, %f417, %f414, %f418;
|
|
mul.rn.f32 %f420, %f419, %f414;
|
|
mul.rn.f32 %f421, %f420, %f413;
|
|
sub.f32 %f422, %f409, %f413;
|
|
add.f32 %f423, %f422, %f422;
|
|
neg.f32 %f424, %f413;
|
|
fma.rn.f32 %f425, %f424, %f409, %f423;
|
|
mul.rn.f32 %f426, %f411, %f425;
|
|
add.f32 %f427, %f421, %f413;
|
|
sub.f32 %f428, %f413, %f427;
|
|
add.f32 %f429, %f421, %f428;
|
|
add.f32 %f430, %f426, %f429;
|
|
add.f32 %f431, %f427, %f430;
|
|
sub.f32 %f432, %f427, %f431;
|
|
add.f32 %f433, %f430, %f432;
|
|
mov.f32 %f434, 0f3F317200;
|
|
mul.rn.f32 %f435, %f407, %f434;
|
|
mov.f32 %f436, 0f35BFBE8E;
|
|
mul.rn.f32 %f437, %f407, %f436;
|
|
add.f32 %f438, %f435, %f431;
|
|
sub.f32 %f439, %f435, %f438;
|
|
add.f32 %f440, %f431, %f439;
|
|
add.f32 %f441, %f433, %f440;
|
|
add.f32 %f442, %f437, %f441;
|
|
add.f32 %f443, %f438, %f442;
|
|
sub.f32 %f444, %f438, %f443;
|
|
add.f32 %f445, %f442, %f444;
|
|
mov.f32 %f446, 0f3EE66666;
|
|
mul.rn.f32 %f447, %f446, %f443;
|
|
neg.f32 %f448, %f447;
|
|
fma.rn.f32 %f449, %f446, %f443, %f448;
|
|
fma.rn.f32 %f450, %f446, %f445, %f449;
|
|
mov.f32 %f451, 0f00000000;
|
|
fma.rn.f32 %f452, %f451, %f443, %f450;
|
|
add.rn.f32 %f453, %f447, %f452;
|
|
neg.f32 %f454, %f453;
|
|
add.rn.f32 %f455, %f447, %f454;
|
|
add.rn.f32 %f456, %f455, %f452;
|
|
mov.b32 %r225, %f453;
|
|
setp.eq.s32 %p62, %r225, 1118925336;
|
|
add.s32 %r226, %r225, -1;
|
|
mov.b32 %f457, %r226;
|
|
add.f32 %f458, %f456, 0f37000000;
|
|
selp.f32 %f93, %f458, %f456, %p62;
|
|
selp.f32 %f459, %f457, %f453, %p62;
|
|
mov.f32 %f460, 0f3FB8AA3B;
|
|
mul.rn.f32 %f461, %f459, %f460;
|
|
cvt.rzi.f32.f32 %f462, %f461;
|
|
abs.f32 %f463, %f462;
|
|
setp.gt.f32 %p63, %f463, 0f42FC0000;
|
|
mov.b32 %r227, %f462;
|
|
and.b32 %r228, %r227, -2147483648;
|
|
or.b32 %r229, %r228, 1123811328;
|
|
mov.b32 %f464, %r229;
|
|
selp.f32 %f465, %f464, %f462, %p63;
|
|
mov.f32 %f466, 0fBF317218;
|
|
fma.rn.f32 %f467, %f465, %f466, %f459;
|
|
mov.f32 %f468, 0f3102E308;
|
|
fma.rn.f32 %f469, %f465, %f468, %f467;
|
|
mul.f32 %f470, %f469, 0f3FB8AA3B;
|
|
add.f32 %f471, %f465, 0f4B40007F;
|
|
mov.b32 %r230, %f471;
|
|
shl.b32 %r231, %r230, 23;
|
|
mov.b32 %f472, %r231;
|
|
ex2.approx.ftz.f32 %f473, %f470;
|
|
mul.f32 %f94, %f473, %f472;
|
|
setp.eq.f32 %p64, %f94, 0f7F800000;
|
|
mov.f32 %f902, 0f7F800000;
|
|
@%p64 bra $L__BB0_53;
|
|
|
|
fma.rn.f32 %f902, %f94, %f93, %f94;
|
|
|
|
$L__BB0_53:
|
|
setp.lt.f32 %p65, %f897, 0f00000000;
|
|
and.pred %p2, %p65, %p51;
|
|
setp.eq.f32 %p67, %f897, 0f00000000;
|
|
@%p67 bra $L__BB0_57;
|
|
bra.uni $L__BB0_54;
|
|
|
|
$L__BB0_57:
|
|
add.f32 %f478, %f897, %f897;
|
|
selp.f32 %f904, %f478, 0f00000000, %p51;
|
|
bra.uni $L__BB0_58;
|
|
|
|
$L__BB0_54:
|
|
mov.b32 %r232, %f902;
|
|
xor.b32 %r233, %r232, -2147483648;
|
|
mov.b32 %f474, %r233;
|
|
selp.f32 %f904, %f474, %f902, %p2;
|
|
setp.geu.f32 %p68, %f897, 0f00000000;
|
|
@%p68 bra $L__BB0_58;
|
|
|
|
mov.f32 %f475, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f476, %f475;
|
|
setp.eq.f32 %p69, %f476, 0f3EE66666;
|
|
@%p69 bra $L__BB0_58;
|
|
|
|
mov.f32 %f904, 0f7FFFFFFF;
|
|
|
|
$L__BB0_58:
|
|
abs.f32 %f872, %f897;
|
|
add.f32 %f479, %f872, 0f3EE66666;
|
|
mov.b32 %r234, %f479;
|
|
setp.lt.s32 %p71, %r234, 2139095040;
|
|
@%p71 bra $L__BB0_63;
|
|
|
|
abs.f32 %f873, %f897;
|
|
setp.gtu.f32 %p72, %f873, 0f7F800000;
|
|
@%p72 bra $L__BB0_62;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_62:
|
|
add.f32 %f904, %f897, 0f3EE66666;
|
|
bra.uni $L__BB0_63;
|
|
|
|
$L__BB0_60:
|
|
abs.f32 %f874, %f897;
|
|
setp.neu.f32 %p73, %f874, 0f7F800000;
|
|
@%p73 bra $L__BB0_63;
|
|
|
|
selp.f32 %f904, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
$L__BB0_63:
|
|
setp.eq.f32 %p74, %f897, 0f3F800000;
|
|
selp.f32 %f103, 0f3F800000, %f904, %p74;
|
|
abs.f32 %f104, %f898;
|
|
setp.lt.f32 %p75, %f104, 0f00800000;
|
|
mul.f32 %f481, %f104, 0f4B800000;
|
|
selp.f32 %f482, %f481, %f104, %p75;
|
|
selp.f32 %f483, 0fC3170000, 0fC2FE0000, %p75;
|
|
mov.b32 %r235, %f482;
|
|
and.b32 %r236, %r235, 8388607;
|
|
or.b32 %r237, %r236, 1065353216;
|
|
mov.b32 %f484, %r237;
|
|
shr.u32 %r238, %r235, 23;
|
|
cvt.rn.f32.u32 %f485, %r238;
|
|
add.f32 %f486, %f483, %f485;
|
|
setp.gt.f32 %p76, %f484, 0f3FB504F3;
|
|
mul.f32 %f487, %f484, 0f3F000000;
|
|
add.f32 %f488, %f486, 0f3F800000;
|
|
selp.f32 %f489, %f488, %f486, %p76;
|
|
selp.f32 %f490, %f487, %f484, %p76;
|
|
add.f32 %f491, %f490, 0fBF800000;
|
|
add.f32 %f492, %f490, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f493, %f492;
|
|
add.f32 %f494, %f491, %f491;
|
|
mul.f32 %f495, %f494, %f493;
|
|
mul.f32 %f496, %f495, %f495;
|
|
mov.f32 %f497, 0f3C4CAF63;
|
|
mov.f32 %f498, 0f3B18F0FE;
|
|
fma.rn.f32 %f499, %f498, %f496, %f497;
|
|
mov.f32 %f500, 0f3DAAAABD;
|
|
fma.rn.f32 %f501, %f499, %f496, %f500;
|
|
mul.rn.f32 %f502, %f501, %f496;
|
|
mul.rn.f32 %f503, %f502, %f495;
|
|
sub.f32 %f504, %f491, %f495;
|
|
add.f32 %f505, %f504, %f504;
|
|
neg.f32 %f506, %f495;
|
|
fma.rn.f32 %f507, %f506, %f491, %f505;
|
|
mul.rn.f32 %f508, %f493, %f507;
|
|
add.f32 %f509, %f503, %f495;
|
|
sub.f32 %f510, %f495, %f509;
|
|
add.f32 %f511, %f503, %f510;
|
|
add.f32 %f512, %f508, %f511;
|
|
add.f32 %f513, %f509, %f512;
|
|
sub.f32 %f514, %f509, %f513;
|
|
add.f32 %f515, %f512, %f514;
|
|
mov.f32 %f516, 0f3F317200;
|
|
mul.rn.f32 %f517, %f489, %f516;
|
|
mov.f32 %f518, 0f35BFBE8E;
|
|
mul.rn.f32 %f519, %f489, %f518;
|
|
add.f32 %f520, %f517, %f513;
|
|
sub.f32 %f521, %f517, %f520;
|
|
add.f32 %f522, %f513, %f521;
|
|
add.f32 %f523, %f515, %f522;
|
|
add.f32 %f524, %f519, %f523;
|
|
add.f32 %f525, %f520, %f524;
|
|
sub.f32 %f526, %f520, %f525;
|
|
add.f32 %f527, %f524, %f526;
|
|
mov.f32 %f528, 0f3EE66666;
|
|
mul.rn.f32 %f529, %f528, %f525;
|
|
neg.f32 %f530, %f529;
|
|
fma.rn.f32 %f531, %f528, %f525, %f530;
|
|
fma.rn.f32 %f532, %f528, %f527, %f531;
|
|
mov.f32 %f533, 0f00000000;
|
|
fma.rn.f32 %f534, %f533, %f525, %f532;
|
|
add.rn.f32 %f535, %f529, %f534;
|
|
neg.f32 %f536, %f535;
|
|
add.rn.f32 %f537, %f529, %f536;
|
|
add.rn.f32 %f538, %f537, %f534;
|
|
mov.b32 %r239, %f535;
|
|
setp.eq.s32 %p77, %r239, 1118925336;
|
|
add.s32 %r240, %r239, -1;
|
|
mov.b32 %f539, %r240;
|
|
add.f32 %f540, %f538, 0f37000000;
|
|
selp.f32 %f105, %f540, %f538, %p77;
|
|
selp.f32 %f541, %f539, %f535, %p77;
|
|
mov.f32 %f542, 0f3FB8AA3B;
|
|
mul.rn.f32 %f543, %f541, %f542;
|
|
cvt.rzi.f32.f32 %f544, %f543;
|
|
abs.f32 %f545, %f544;
|
|
setp.gt.f32 %p78, %f545, 0f42FC0000;
|
|
mov.b32 %r241, %f544;
|
|
and.b32 %r242, %r241, -2147483648;
|
|
or.b32 %r243, %r242, 1123811328;
|
|
mov.b32 %f546, %r243;
|
|
selp.f32 %f547, %f546, %f544, %p78;
|
|
mov.f32 %f548, 0fBF317218;
|
|
fma.rn.f32 %f549, %f547, %f548, %f541;
|
|
mov.f32 %f550, 0f3102E308;
|
|
fma.rn.f32 %f551, %f547, %f550, %f549;
|
|
mul.f32 %f552, %f551, 0f3FB8AA3B;
|
|
add.f32 %f553, %f547, 0f4B40007F;
|
|
mov.b32 %r244, %f553;
|
|
shl.b32 %r245, %r244, 23;
|
|
mov.b32 %f554, %r245;
|
|
ex2.approx.ftz.f32 %f555, %f552;
|
|
mul.f32 %f106, %f555, %f554;
|
|
setp.eq.f32 %p79, %f106, 0f7F800000;
|
|
mov.f32 %f905, 0f7F800000;
|
|
@%p79 bra $L__BB0_65;
|
|
|
|
fma.rn.f32 %f905, %f106, %f105, %f106;
|
|
|
|
$L__BB0_65:
|
|
setp.lt.f32 %p80, %f898, 0f00000000;
|
|
and.pred %p3, %p80, %p51;
|
|
setp.eq.f32 %p82, %f898, 0f00000000;
|
|
@%p82 bra $L__BB0_69;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_69:
|
|
add.f32 %f560, %f898, %f898;
|
|
selp.f32 %f907, %f560, 0f00000000, %p51;
|
|
bra.uni $L__BB0_70;
|
|
|
|
$L__BB0_66:
|
|
mov.b32 %r246, %f905;
|
|
xor.b32 %r247, %r246, -2147483648;
|
|
mov.b32 %f556, %r247;
|
|
selp.f32 %f907, %f556, %f905, %p3;
|
|
setp.geu.f32 %p83, %f898, 0f00000000;
|
|
@%p83 bra $L__BB0_70;
|
|
|
|
mov.f32 %f557, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f558, %f557;
|
|
setp.eq.f32 %p84, %f558, 0f3EE66666;
|
|
@%p84 bra $L__BB0_70;
|
|
|
|
mov.f32 %f907, 0f7FFFFFFF;
|
|
|
|
$L__BB0_70:
|
|
abs.f32 %f875, %f898;
|
|
add.f32 %f561, %f875, 0f3EE66666;
|
|
mov.b32 %r248, %f561;
|
|
setp.lt.s32 %p86, %r248, 2139095040;
|
|
@%p86 bra $L__BB0_75;
|
|
|
|
abs.f32 %f876, %f898;
|
|
setp.gtu.f32 %p87, %f876, 0f7F800000;
|
|
@%p87 bra $L__BB0_74;
|
|
bra.uni $L__BB0_72;
|
|
|
|
$L__BB0_74:
|
|
add.f32 %f907, %f898, 0f3EE66666;
|
|
bra.uni $L__BB0_75;
|
|
|
|
$L__BB0_72:
|
|
abs.f32 %f877, %f898;
|
|
setp.neu.f32 %p88, %f877, 0f7F800000;
|
|
@%p88 bra $L__BB0_75;
|
|
|
|
selp.f32 %f907, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_75:
|
|
setp.eq.f32 %p89, %f898, 0f3F800000;
|
|
mov.f32 %f563, 0f3F800000;
|
|
selp.f32 %f564, 0f3F800000, %f907, %p89;
|
|
min.f32 %f565, %f91, %f563;
|
|
mov.f32 %f566, 0f00000000;
|
|
max.f32 %f115, %f566, %f565;
|
|
min.f32 %f567, %f103, %f563;
|
|
max.f32 %f116, %f566, %f567;
|
|
min.f32 %f568, %f564, %f563;
|
|
max.f32 %f117, %f566, %f568;
|
|
mov.f32 %f572, 0f3ED55555;
|
|
abs.f32 %f119, %f115;
|
|
setp.lt.f32 %p90, %f119, 0f00800000;
|
|
mul.f32 %f574, %f119, 0f4B800000;
|
|
selp.f32 %f575, %f574, %f119, %p90;
|
|
selp.f32 %f576, 0fC3170000, 0fC2FE0000, %p90;
|
|
mov.b32 %r251, %f575;
|
|
and.b32 %r252, %r251, 8388607;
|
|
or.b32 %r253, %r252, 1065353216;
|
|
mov.b32 %f577, %r253;
|
|
shr.u32 %r254, %r251, 23;
|
|
cvt.rn.f32.u32 %f578, %r254;
|
|
add.f32 %f579, %f576, %f578;
|
|
setp.gt.f32 %p91, %f577, 0f3FB504F3;
|
|
mul.f32 %f580, %f577, 0f3F000000;
|
|
add.f32 %f581, %f579, 0f3F800000;
|
|
selp.f32 %f582, %f581, %f579, %p91;
|
|
selp.f32 %f583, %f580, %f577, %p91;
|
|
add.f32 %f584, %f583, 0fBF800000;
|
|
add.f32 %f585, %f583, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f586, %f585;
|
|
add.f32 %f587, %f584, %f584;
|
|
mul.f32 %f588, %f587, %f586;
|
|
mul.f32 %f589, %f588, %f588;
|
|
mov.f32 %f590, 0f3C4CAF63;
|
|
mov.f32 %f591, 0f3B18F0FE;
|
|
fma.rn.f32 %f592, %f591, %f589, %f590;
|
|
mov.f32 %f593, 0f3DAAAABD;
|
|
fma.rn.f32 %f594, %f592, %f589, %f593;
|
|
mul.rn.f32 %f595, %f594, %f589;
|
|
mul.rn.f32 %f596, %f595, %f588;
|
|
sub.f32 %f597, %f584, %f588;
|
|
add.f32 %f598, %f597, %f597;
|
|
neg.f32 %f599, %f588;
|
|
fma.rn.f32 %f600, %f599, %f584, %f598;
|
|
mul.rn.f32 %f601, %f586, %f600;
|
|
add.f32 %f602, %f596, %f588;
|
|
sub.f32 %f603, %f588, %f602;
|
|
add.f32 %f604, %f596, %f603;
|
|
add.f32 %f605, %f601, %f604;
|
|
add.f32 %f606, %f602, %f605;
|
|
sub.f32 %f607, %f602, %f606;
|
|
add.f32 %f608, %f605, %f607;
|
|
mov.f32 %f609, 0f3F317200;
|
|
mul.rn.f32 %f610, %f582, %f609;
|
|
mov.f32 %f611, 0f35BFBE8E;
|
|
mul.rn.f32 %f612, %f582, %f611;
|
|
add.f32 %f613, %f610, %f606;
|
|
sub.f32 %f614, %f610, %f613;
|
|
add.f32 %f615, %f606, %f614;
|
|
add.f32 %f616, %f608, %f615;
|
|
add.f32 %f617, %f612, %f616;
|
|
add.f32 %f618, %f613, %f617;
|
|
sub.f32 %f619, %f613, %f618;
|
|
add.f32 %f620, %f617, %f619;
|
|
mul.rn.f32 %f621, %f572, %f618;
|
|
neg.f32 %f622, %f621;
|
|
fma.rn.f32 %f623, %f572, %f618, %f622;
|
|
fma.rn.f32 %f624, %f572, %f620, %f623;
|
|
fma.rn.f32 %f625, %f566, %f618, %f624;
|
|
add.rn.f32 %f626, %f621, %f625;
|
|
neg.f32 %f627, %f626;
|
|
add.rn.f32 %f628, %f621, %f627;
|
|
add.rn.f32 %f629, %f628, %f625;
|
|
mov.b32 %r255, %f626;
|
|
setp.eq.s32 %p92, %r255, 1118925336;
|
|
add.s32 %r256, %r255, -1;
|
|
mov.b32 %f630, %r256;
|
|
add.f32 %f631, %f629, 0f37000000;
|
|
selp.f32 %f120, %f631, %f629, %p92;
|
|
selp.f32 %f632, %f630, %f626, %p92;
|
|
mov.f32 %f633, 0f3FB8AA3B;
|
|
mul.rn.f32 %f634, %f632, %f633;
|
|
cvt.rzi.f32.f32 %f635, %f634;
|
|
abs.f32 %f636, %f635;
|
|
setp.gt.f32 %p93, %f636, 0f42FC0000;
|
|
mov.b32 %r257, %f635;
|
|
and.b32 %r258, %r257, -2147483648;
|
|
or.b32 %r259, %r258, 1123811328;
|
|
mov.b32 %f637, %r259;
|
|
selp.f32 %f638, %f637, %f635, %p93;
|
|
mov.f32 %f639, 0fBF317218;
|
|
fma.rn.f32 %f640, %f638, %f639, %f632;
|
|
mov.f32 %f641, 0f3102E308;
|
|
fma.rn.f32 %f642, %f638, %f641, %f640;
|
|
mul.f32 %f643, %f642, 0f3FB8AA3B;
|
|
add.f32 %f644, %f638, 0f4B40007F;
|
|
mov.b32 %r260, %f644;
|
|
shl.b32 %r261, %r260, 23;
|
|
mov.b32 %f645, %r261;
|
|
ex2.approx.ftz.f32 %f646, %f643;
|
|
mul.f32 %f121, %f646, %f645;
|
|
setp.eq.f32 %p94, %f121, 0f7F800000;
|
|
mov.f32 %f908, 0f7F800000;
|
|
@%p94 bra $L__BB0_77;
|
|
|
|
fma.rn.f32 %f908, %f121, %f120, %f121;
|
|
|
|
$L__BB0_77:
|
|
mov.f32 %f862, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f861, %f862;
|
|
add.f32 %f860, %f861, %f861;
|
|
mov.f32 %f859, 0f3ED55555;
|
|
sub.f32 %f858, %f859, %f860;
|
|
abs.f32 %f857, %f858;
|
|
setp.lt.f32 %p95, %f115, 0f00000000;
|
|
setp.eq.f32 %p96, %f857, 0f3F800000;
|
|
and.pred %p4, %p95, %p96;
|
|
setp.eq.f32 %p97, %f115, 0f00000000;
|
|
@%p97 bra $L__BB0_81;
|
|
bra.uni $L__BB0_78;
|
|
|
|
$L__BB0_81:
|
|
add.f32 %f651, %f115, %f115;
|
|
selp.f32 %f910, %f651, 0f00000000, %p96;
|
|
bra.uni $L__BB0_82;
|
|
|
|
$L__BB0_78:
|
|
mov.b32 %r262, %f908;
|
|
xor.b32 %r263, %r262, -2147483648;
|
|
mov.b32 %f647, %r263;
|
|
selp.f32 %f910, %f647, %f908, %p4;
|
|
setp.geu.f32 %p98, %f115, 0f00000000;
|
|
@%p98 bra $L__BB0_82;
|
|
|
|
mov.f32 %f648, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f649, %f648;
|
|
setp.eq.f32 %p99, %f649, 0f3ED55555;
|
|
@%p99 bra $L__BB0_82;
|
|
|
|
mov.f32 %f910, 0f7FFFFFFF;
|
|
|
|
$L__BB0_82:
|
|
add.f32 %f652, %f119, 0f3ED55555;
|
|
mov.b32 %r264, %f652;
|
|
setp.lt.s32 %p101, %r264, 2139095040;
|
|
@%p101 bra $L__BB0_87;
|
|
|
|
setp.gtu.f32 %p102, %f119, 0f7F800000;
|
|
@%p102 bra $L__BB0_86;
|
|
bra.uni $L__BB0_84;
|
|
|
|
$L__BB0_86:
|
|
add.f32 %f910, %f115, 0f3ED55555;
|
|
bra.uni $L__BB0_87;
|
|
|
|
$L__BB0_84:
|
|
setp.neu.f32 %p103, %f119, 0f7F800000;
|
|
@%p103 bra $L__BB0_87;
|
|
|
|
selp.f32 %f910, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_87:
|
|
abs.f32 %f130, %f116;
|
|
setp.lt.f32 %p104, %f130, 0f00800000;
|
|
mul.f32 %f654, %f130, 0f4B800000;
|
|
selp.f32 %f655, %f654, %f130, %p104;
|
|
selp.f32 %f656, 0fC3170000, 0fC2FE0000, %p104;
|
|
mov.b32 %r265, %f655;
|
|
and.b32 %r266, %r265, 8388607;
|
|
or.b32 %r267, %r266, 1065353216;
|
|
mov.b32 %f657, %r267;
|
|
shr.u32 %r268, %r265, 23;
|
|
cvt.rn.f32.u32 %f658, %r268;
|
|
add.f32 %f659, %f656, %f658;
|
|
setp.gt.f32 %p105, %f657, 0f3FB504F3;
|
|
mul.f32 %f660, %f657, 0f3F000000;
|
|
add.f32 %f661, %f659, 0f3F800000;
|
|
selp.f32 %f662, %f661, %f659, %p105;
|
|
selp.f32 %f663, %f660, %f657, %p105;
|
|
add.f32 %f664, %f663, 0fBF800000;
|
|
add.f32 %f665, %f663, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f666, %f665;
|
|
add.f32 %f667, %f664, %f664;
|
|
mul.f32 %f668, %f667, %f666;
|
|
mul.f32 %f669, %f668, %f668;
|
|
mov.f32 %f670, 0f3C4CAF63;
|
|
mov.f32 %f671, 0f3B18F0FE;
|
|
fma.rn.f32 %f672, %f671, %f669, %f670;
|
|
mov.f32 %f673, 0f3DAAAABD;
|
|
fma.rn.f32 %f674, %f672, %f669, %f673;
|
|
mul.rn.f32 %f675, %f674, %f669;
|
|
mul.rn.f32 %f676, %f675, %f668;
|
|
sub.f32 %f677, %f664, %f668;
|
|
add.f32 %f678, %f677, %f677;
|
|
neg.f32 %f679, %f668;
|
|
fma.rn.f32 %f680, %f679, %f664, %f678;
|
|
mul.rn.f32 %f681, %f666, %f680;
|
|
add.f32 %f682, %f676, %f668;
|
|
sub.f32 %f683, %f668, %f682;
|
|
add.f32 %f684, %f676, %f683;
|
|
add.f32 %f685, %f681, %f684;
|
|
add.f32 %f686, %f682, %f685;
|
|
sub.f32 %f687, %f682, %f686;
|
|
add.f32 %f688, %f685, %f687;
|
|
mov.f32 %f689, 0f3F317200;
|
|
mul.rn.f32 %f690, %f662, %f689;
|
|
mov.f32 %f691, 0f35BFBE8E;
|
|
mul.rn.f32 %f692, %f662, %f691;
|
|
add.f32 %f693, %f690, %f686;
|
|
sub.f32 %f694, %f690, %f693;
|
|
add.f32 %f695, %f686, %f694;
|
|
add.f32 %f696, %f688, %f695;
|
|
add.f32 %f697, %f692, %f696;
|
|
add.f32 %f698, %f693, %f697;
|
|
sub.f32 %f699, %f693, %f698;
|
|
add.f32 %f700, %f697, %f699;
|
|
mov.f32 %f701, 0f3ED55555;
|
|
mul.rn.f32 %f702, %f701, %f698;
|
|
neg.f32 %f703, %f702;
|
|
fma.rn.f32 %f704, %f701, %f698, %f703;
|
|
fma.rn.f32 %f705, %f701, %f700, %f704;
|
|
mov.f32 %f706, 0f00000000;
|
|
fma.rn.f32 %f707, %f706, %f698, %f705;
|
|
add.rn.f32 %f708, %f702, %f707;
|
|
neg.f32 %f709, %f708;
|
|
add.rn.f32 %f710, %f702, %f709;
|
|
add.rn.f32 %f711, %f710, %f707;
|
|
mov.b32 %r269, %f708;
|
|
setp.eq.s32 %p106, %r269, 1118925336;
|
|
add.s32 %r270, %r269, -1;
|
|
mov.b32 %f712, %r270;
|
|
add.f32 %f713, %f711, 0f37000000;
|
|
selp.f32 %f131, %f713, %f711, %p106;
|
|
selp.f32 %f714, %f712, %f708, %p106;
|
|
mov.f32 %f715, 0f3FB8AA3B;
|
|
mul.rn.f32 %f716, %f714, %f715;
|
|
cvt.rzi.f32.f32 %f717, %f716;
|
|
abs.f32 %f718, %f717;
|
|
setp.gt.f32 %p107, %f718, 0f42FC0000;
|
|
mov.b32 %r271, %f717;
|
|
and.b32 %r272, %r271, -2147483648;
|
|
or.b32 %r273, %r272, 1123811328;
|
|
mov.b32 %f719, %r273;
|
|
selp.f32 %f720, %f719, %f717, %p107;
|
|
mov.f32 %f721, 0fBF317218;
|
|
fma.rn.f32 %f722, %f720, %f721, %f714;
|
|
mov.f32 %f723, 0f3102E308;
|
|
fma.rn.f32 %f724, %f720, %f723, %f722;
|
|
mul.f32 %f725, %f724, 0f3FB8AA3B;
|
|
add.f32 %f726, %f720, 0f4B40007F;
|
|
mov.b32 %r274, %f726;
|
|
shl.b32 %r275, %r274, 23;
|
|
mov.b32 %f727, %r275;
|
|
ex2.approx.ftz.f32 %f728, %f725;
|
|
mul.f32 %f132, %f728, %f727;
|
|
setp.eq.f32 %p108, %f132, 0f7F800000;
|
|
mov.f32 %f911, 0f7F800000;
|
|
@%p108 bra $L__BB0_89;
|
|
|
|
fma.rn.f32 %f911, %f132, %f131, %f132;
|
|
|
|
$L__BB0_89:
|
|
setp.lt.f32 %p109, %f116, 0f00000000;
|
|
and.pred %p5, %p109, %p96;
|
|
setp.eq.f32 %p111, %f116, 0f00000000;
|
|
@%p111 bra $L__BB0_93;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_93:
|
|
add.f32 %f733, %f116, %f116;
|
|
selp.f32 %f913, %f733, 0f00000000, %p96;
|
|
bra.uni $L__BB0_94;
|
|
|
|
$L__BB0_90:
|
|
mov.b32 %r276, %f911;
|
|
xor.b32 %r277, %r276, -2147483648;
|
|
mov.b32 %f729, %r277;
|
|
selp.f32 %f913, %f729, %f911, %p5;
|
|
setp.geu.f32 %p112, %f116, 0f00000000;
|
|
@%p112 bra $L__BB0_94;
|
|
|
|
mov.f32 %f730, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f731, %f730;
|
|
setp.eq.f32 %p113, %f731, 0f3ED55555;
|
|
@%p113 bra $L__BB0_94;
|
|
|
|
mov.f32 %f913, 0f7FFFFFFF;
|
|
|
|
$L__BB0_94:
|
|
add.f32 %f734, %f130, 0f3ED55555;
|
|
mov.b32 %r278, %f734;
|
|
setp.lt.s32 %p115, %r278, 2139095040;
|
|
@%p115 bra $L__BB0_99;
|
|
|
|
setp.gtu.f32 %p116, %f130, 0f7F800000;
|
|
@%p116 bra $L__BB0_98;
|
|
bra.uni $L__BB0_96;
|
|
|
|
$L__BB0_98:
|
|
add.f32 %f913, %f116, 0f3ED55555;
|
|
bra.uni $L__BB0_99;
|
|
|
|
$L__BB0_96:
|
|
setp.neu.f32 %p117, %f130, 0f7F800000;
|
|
@%p117 bra $L__BB0_99;
|
|
|
|
selp.f32 %f913, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_99:
|
|
abs.f32 %f141, %f117;
|
|
setp.lt.f32 %p118, %f141, 0f00800000;
|
|
mul.f32 %f736, %f141, 0f4B800000;
|
|
selp.f32 %f737, %f736, %f141, %p118;
|
|
selp.f32 %f738, 0fC3170000, 0fC2FE0000, %p118;
|
|
mov.b32 %r279, %f737;
|
|
and.b32 %r280, %r279, 8388607;
|
|
or.b32 %r281, %r280, 1065353216;
|
|
mov.b32 %f739, %r281;
|
|
shr.u32 %r282, %r279, 23;
|
|
cvt.rn.f32.u32 %f740, %r282;
|
|
add.f32 %f741, %f738, %f740;
|
|
setp.gt.f32 %p119, %f739, 0f3FB504F3;
|
|
mul.f32 %f742, %f739, 0f3F000000;
|
|
add.f32 %f743, %f741, 0f3F800000;
|
|
selp.f32 %f744, %f743, %f741, %p119;
|
|
selp.f32 %f745, %f742, %f739, %p119;
|
|
add.f32 %f746, %f745, 0fBF800000;
|
|
add.f32 %f747, %f745, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f748, %f747;
|
|
add.f32 %f749, %f746, %f746;
|
|
mul.f32 %f750, %f749, %f748;
|
|
mul.f32 %f751, %f750, %f750;
|
|
mov.f32 %f752, 0f3C4CAF63;
|
|
mov.f32 %f753, 0f3B18F0FE;
|
|
fma.rn.f32 %f754, %f753, %f751, %f752;
|
|
mov.f32 %f755, 0f3DAAAABD;
|
|
fma.rn.f32 %f756, %f754, %f751, %f755;
|
|
mul.rn.f32 %f757, %f756, %f751;
|
|
mul.rn.f32 %f758, %f757, %f750;
|
|
sub.f32 %f759, %f746, %f750;
|
|
add.f32 %f760, %f759, %f759;
|
|
neg.f32 %f761, %f750;
|
|
fma.rn.f32 %f762, %f761, %f746, %f760;
|
|
mul.rn.f32 %f763, %f748, %f762;
|
|
add.f32 %f764, %f758, %f750;
|
|
sub.f32 %f765, %f750, %f764;
|
|
add.f32 %f766, %f758, %f765;
|
|
add.f32 %f767, %f763, %f766;
|
|
add.f32 %f768, %f764, %f767;
|
|
sub.f32 %f769, %f764, %f768;
|
|
add.f32 %f770, %f767, %f769;
|
|
mov.f32 %f771, 0f3F317200;
|
|
mul.rn.f32 %f772, %f744, %f771;
|
|
mov.f32 %f773, 0f35BFBE8E;
|
|
mul.rn.f32 %f774, %f744, %f773;
|
|
add.f32 %f775, %f772, %f768;
|
|
sub.f32 %f776, %f772, %f775;
|
|
add.f32 %f777, %f768, %f776;
|
|
add.f32 %f778, %f770, %f777;
|
|
add.f32 %f779, %f774, %f778;
|
|
add.f32 %f780, %f775, %f779;
|
|
sub.f32 %f781, %f775, %f780;
|
|
add.f32 %f782, %f779, %f781;
|
|
mov.f32 %f783, 0f3ED55555;
|
|
mul.rn.f32 %f784, %f783, %f780;
|
|
neg.f32 %f785, %f784;
|
|
fma.rn.f32 %f786, %f783, %f780, %f785;
|
|
fma.rn.f32 %f787, %f783, %f782, %f786;
|
|
mov.f32 %f788, 0f00000000;
|
|
fma.rn.f32 %f789, %f788, %f780, %f787;
|
|
add.rn.f32 %f790, %f784, %f789;
|
|
neg.f32 %f791, %f790;
|
|
add.rn.f32 %f792, %f784, %f791;
|
|
add.rn.f32 %f793, %f792, %f789;
|
|
mov.b32 %r283, %f790;
|
|
setp.eq.s32 %p120, %r283, 1118925336;
|
|
add.s32 %r284, %r283, -1;
|
|
mov.b32 %f794, %r284;
|
|
add.f32 %f795, %f793, 0f37000000;
|
|
selp.f32 %f142, %f795, %f793, %p120;
|
|
selp.f32 %f796, %f794, %f790, %p120;
|
|
mov.f32 %f797, 0f3FB8AA3B;
|
|
mul.rn.f32 %f798, %f796, %f797;
|
|
cvt.rzi.f32.f32 %f799, %f798;
|
|
abs.f32 %f800, %f799;
|
|
setp.gt.f32 %p121, %f800, 0f42FC0000;
|
|
mov.b32 %r285, %f799;
|
|
and.b32 %r286, %r285, -2147483648;
|
|
or.b32 %r287, %r286, 1123811328;
|
|
mov.b32 %f801, %r287;
|
|
selp.f32 %f802, %f801, %f799, %p121;
|
|
mov.f32 %f803, 0fBF317218;
|
|
fma.rn.f32 %f804, %f802, %f803, %f796;
|
|
mov.f32 %f805, 0f3102E308;
|
|
fma.rn.f32 %f806, %f802, %f805, %f804;
|
|
mul.f32 %f807, %f806, 0f3FB8AA3B;
|
|
add.f32 %f808, %f802, 0f4B40007F;
|
|
mov.b32 %r288, %f808;
|
|
shl.b32 %r289, %r288, 23;
|
|
mov.b32 %f809, %r289;
|
|
ex2.approx.ftz.f32 %f810, %f807;
|
|
mul.f32 %f143, %f810, %f809;
|
|
setp.eq.f32 %p122, %f143, 0f7F800000;
|
|
mov.f32 %f914, 0f7F800000;
|
|
@%p122 bra $L__BB0_101;
|
|
|
|
fma.rn.f32 %f914, %f143, %f142, %f143;
|
|
|
|
$L__BB0_101:
|
|
setp.lt.f32 %p123, %f117, 0f00000000;
|
|
and.pred %p6, %p123, %p96;
|
|
setp.eq.f32 %p125, %f117, 0f00000000;
|
|
@%p125 bra $L__BB0_105;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_105:
|
|
add.f32 %f815, %f117, %f117;
|
|
selp.f32 %f916, %f815, 0f00000000, %p96;
|
|
bra.uni $L__BB0_106;
|
|
|
|
$L__BB0_102:
|
|
mov.b32 %r290, %f914;
|
|
xor.b32 %r291, %r290, -2147483648;
|
|
mov.b32 %f811, %r291;
|
|
selp.f32 %f916, %f811, %f914, %p6;
|
|
setp.geu.f32 %p126, %f117, 0f00000000;
|
|
@%p126 bra $L__BB0_106;
|
|
|
|
mov.f32 %f812, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f813, %f812;
|
|
setp.eq.f32 %p127, %f813, 0f3ED55555;
|
|
@%p127 bra $L__BB0_106;
|
|
|
|
mov.f32 %f916, 0f7FFFFFFF;
|
|
|
|
$L__BB0_106:
|
|
add.f32 %f816, %f141, 0f3ED55555;
|
|
mov.b32 %r292, %f816;
|
|
setp.lt.s32 %p129, %r292, 2139095040;
|
|
@%p129 bra $L__BB0_111;
|
|
|
|
setp.gtu.f32 %p130, %f141, 0f7F800000;
|
|
@%p130 bra $L__BB0_110;
|
|
bra.uni $L__BB0_108;
|
|
|
|
$L__BB0_110:
|
|
add.f32 %f916, %f117, 0f3ED55555;
|
|
bra.uni $L__BB0_111;
|
|
|
|
$L__BB0_108:
|
|
setp.neu.f32 %p131, %f141, 0f7F800000;
|
|
@%p131 bra $L__BB0_111;
|
|
|
|
selp.f32 %f916, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_111:
|
|
ld.const.u64 %rd84, [params+144];
|
|
cvta.to.global.u64 %rd83, %rd84;
|
|
ld.const.u32 %r315, [params+136];
|
|
mad.lo.s32 %r314, %r315, %r5, %r4;
|
|
cvt.u64.u32 %rd82, %r314;
|
|
fma.rn.f32 %f817, %f910, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p132, %f115, 0f3F800000;
|
|
mov.f32 %f818, 0f3F800000;
|
|
selp.f32 %f819, 0f3F7FFFFF, %f817, %p132;
|
|
mul.f32 %f820, %f115, 0f414EB852;
|
|
setp.lt.f32 %p133, %f115, 0f3B4D2E1C;
|
|
selp.f32 %f821, %f820, %f819, %p133;
|
|
fma.rn.f32 %f822, %f913, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p134, %f116, 0f3F800000;
|
|
selp.f32 %f823, 0f3F7FFFFF, %f822, %p134;
|
|
mul.f32 %f824, %f116, 0f414EB852;
|
|
setp.lt.f32 %p135, %f116, 0f3B4D2E1C;
|
|
selp.f32 %f825, %f824, %f823, %p135;
|
|
fma.rn.f32 %f826, %f916, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p136, %f117, 0f3F800000;
|
|
selp.f32 %f827, 0f3F7FFFFF, %f826, %p136;
|
|
mul.f32 %f828, %f117, 0f414EB852;
|
|
setp.lt.f32 %p137, %f117, 0f3B4D2E1C;
|
|
selp.f32 %f829, %f828, %f827, %p137;
|
|
min.f32 %f830, %f821, %f818;
|
|
mov.f32 %f831, 0f00000000;
|
|
max.f32 %f832, %f831, %f830;
|
|
mul.f32 %f833, %f832, 0f43800000;
|
|
cvt.rzi.u32.f32 %r293, %f833;
|
|
min.u32 %r294, %r293, 255;
|
|
min.f32 %f834, %f825, %f818;
|
|
max.f32 %f835, %f831, %f834;
|
|
mul.f32 %f836, %f835, 0f43800000;
|
|
cvt.rzi.u32.f32 %r295, %f836;
|
|
min.u32 %r296, %r295, 255;
|
|
min.f32 %f837, %f829, %f818;
|
|
max.f32 %f838, %f831, %f837;
|
|
mul.f32 %f839, %f838, 0f43800000;
|
|
cvt.rzi.u32.f32 %r297, %f839;
|
|
min.u32 %r298, %r297, 255;
|
|
shl.b64 %rd60, %rd82, 2;
|
|
add.s64 %rd61, %rd83, %rd60;
|
|
cvt.u16.u32 %rs23, %r298;
|
|
cvt.u16.u32 %rs24, %r296;
|
|
cvt.u16.u32 %rs25, %r294;
|
|
mov.u16 %rs26, 255;
|
|
st.global.v4.u8 [%rd61], {%rs25, %rs24, %rs23, %rs26};
|
|
|
|
$L__BB0_112:
|
|
ld.const.u32 %r316, [params+104];
|
|
and.b32 %r299, %r316, 4;
|
|
setp.eq.s32 %p138, %r299, 0;
|
|
@%p138 bra $L__BB0_114;
|
|
|
|
ld.const.u64 %rd62, [params+224];
|
|
cvta.to.global.u64 %rd63, %rd62;
|
|
ld.const.u32 %r300, [params+216];
|
|
mad.lo.s32 %r301, %r300, %r5, %r4;
|
|
mov.f32 %f843, 0f3F800000;
|
|
mul.wide.u32 %rd64, %r301, 8;
|
|
add.s64 %rd65, %rd63, %rd64;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f843;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f898;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f897;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f896;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd65], {%rs27, %rs28, %rs29, %rs30};
|
|
|
|
$L__BB0_114:
|
|
ld.const.u32 %r317, [params+104];
|
|
and.b32 %r302, %r317, 16;
|
|
setp.eq.s32 %p139, %r302, 0;
|
|
@%p139 bra $L__BB0_122;
|
|
|
|
ld.const.u64 %rd66, [params+240];
|
|
cvta.to.global.u64 %rd67, %rd66;
|
|
ld.const.u32 %r303, [params+232];
|
|
mad.lo.s32 %r304, %r303, %r5, %r4;
|
|
mov.f32 %f847, 0f3F800000;
|
|
mul.wide.u32 %rd68, %r304, 8;
|
|
add.s64 %rd69, %rd67, %rd68;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f847;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f66;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f65;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f64;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd69], {%rs31, %rs32, %rs33, %rs34};
|
|
|
|
$L__BB0_122:
|
|
ret;
|
|
|
|
}
|
|
|