3072 lines
80 KiB
Plaintext
3072 lines
80 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<181>;
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.reg .b16 %rs<328>;
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.reg .f32 %f<1325>;
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.reg .b32 %r<389>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<162>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r54), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r55), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u64 %rd41, [params+400];
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cvta.to.global.u64 %rd42, %rd41;
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ld.const.u32 %r60, [params+392];
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mad.lo.s32 %r61, %r60, %r55, %r54;
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mul.wide.u32 %rd43, %r61, 4;
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add.s64 %rd2, %rd42, %rd43;
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ld.global.v2.u8 {%rs7, %rs327}, [%rd2];
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or.b16 %rs9, %rs7, %rs327;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p8, %rs10, 0;
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@%p8 bra $L__BB0_2;
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ld.global.u8 %rs326, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs326, [%rd2+2];
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setp.eq.s16 %p9, %rs326, 0;
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mov.f32 %f1283, 0f00000000;
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mov.u16 %rs327, 0;
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mov.f32 %f1284, %f1283;
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mov.f32 %f1285, %f1283;
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@%p9 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f201, %rs7;
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div.rn.f32 %f202, %f201, 0f437F0000;
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fma.rn.f32 %f203, %f202, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs327, 255;
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cvt.rn.f32.u16 %f204, %rs13;
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div.rn.f32 %f205, %f204, 0f437F0000;
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fma.rn.f32 %f206, %f205, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f207, %rs326;
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div.rn.f32 %f208, %f207, 0f437F0000;
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fma.rn.f32 %f209, %f208, 0f40000000, 0fBF800000;
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mul.f32 %f210, %f206, %f206;
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fma.rn.f32 %f211, %f203, %f203, %f210;
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fma.rn.f32 %f212, %f209, %f209, %f211;
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sqrt.rn.f32 %f213, %f212;
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rcp.rn.f32 %f214, %f213;
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mul.f32 %f1285, %f214, %f209;
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mul.f32 %f1284, %f214, %f206;
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mul.f32 %f1283, %f203, %f214;
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$L__BB0_4:
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ld.const.v2.u32 {%r62, %r63}, [params];
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add.s32 %r3, %r62, %r54;
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add.s32 %r4, %r63, %r55;
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setp.eq.f32 %p10, %f1283, 0f00000000;
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setp.eq.f32 %p11, %f1284, 0f00000000;
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and.pred %p12, %p10, %p11;
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setp.eq.f32 %p13, %f1285, 0f00000000;
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and.pred %p14, %p13, %p12;
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@%p14 bra $L__BB0_155;
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bra.uni $L__BB0_5;
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$L__BB0_155:
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ld.const.u32 %r51, [params+104];
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and.b32 %r341, %r51, 1;
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setp.eq.b32 %p165, %r341, 1;
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mov.pred %p166, 0;
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xor.pred %p167, %p165, %p166;
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not.pred %p168, %p167;
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@%p168 bra $L__BB0_157;
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ld.const.u64 %rd113, [params+144];
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cvta.to.global.u64 %rd114, %rd113;
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ld.const.u32 %r342, [params+136];
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mad.lo.s32 %r343, %r342, %r4, %r3;
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mul.wide.u32 %rd115, %r343, 4;
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add.s64 %rd116, %rd114, %rd115;
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mov.u16 %rs173, 0;
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st.global.v4.u8 [%rd116], {%rs173, %rs173, %rs173, %rs173};
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$L__BB0_157:
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and.b32 %r344, %r51, 8;
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setp.eq.s32 %p169, %r344, 0;
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@%p169 bra $L__BB0_159;
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ld.const.u64 %rd117, [params+192];
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cvta.to.global.u64 %rd118, %rd117;
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ld.const.u32 %r345, [params+184];
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mad.lo.s32 %r346, %r345, %r4, %r3;
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mov.f32 %f1133, 0f00000000;
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cvt.rzi.u32.f32 %r347, %f1133;
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mul.wide.u32 %rd119, %r346, 2;
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add.s64 %rd120, %rd118, %rd119;
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mov.u16 %rs174, 0;
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cvt.u16.u32 %rs175, %r347;
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st.global.v2.u8 [%rd120], {%rs175, %rs174};
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$L__BB0_159:
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and.b32 %r348, %r51, 4;
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setp.eq.s32 %p170, %r348, 0;
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ld.const.u32 %r388, [params+108];
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@%p170 bra $L__BB0_163;
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setp.eq.s32 %p171, %r388, 0;
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ld.const.u64 %rd121, [params+224];
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cvta.to.global.u64 %rd122, %rd121;
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ld.const.u32 %r349, [params+216];
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mad.lo.s32 %r350, %r349, %r4, %r3;
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mul.wide.u32 %rd123, %r350, 8;
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add.s64 %rd30, %rd122, %rd123;
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@%p171 bra $L__BB0_162;
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ld.global.v4.u16 {%rs182, %rs183, %rs184, %rs185}, [%rd30];
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// begin inline asm
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{ cvt.f32.f16 %f1134, %rs182;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1135, %rs183;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1136, %rs184;}
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// end inline asm
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add.f32 %f1137, %f1134, 0f00000000;
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add.f32 %f1138, %f1135, 0f00000000;
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add.f32 %f1139, %f1136, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs181, %f1139;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs180, %f1138;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs179, %f1137;}
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// end inline asm
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mov.u16 %rs186, 0;
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st.global.v4.u16 [%rd30], {%rs179, %rs180, %rs181, %rs186};
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bra.uni $L__BB0_163;
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$L__BB0_5:
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ld.const.v4.f32 {%f218, %f219, %f220, %f221}, [params+512];
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neg.f32 %f222, %f219;
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neg.f32 %f223, %f220;
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mul.f32 %f224, %f1283, %f218;
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mul.f32 %f225, %f1284, %f222;
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sub.f32 %f226, %f225, %f224;
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mul.f32 %f227, %f1285, %f220;
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sub.f32 %f13, %f226, %f227;
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ld.const.u64 %rd44, [params+432];
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cvta.to.global.u64 %rd45, %rd44;
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ld.const.u32 %r66, [params+424];
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mad.lo.s32 %r67, %r66, %r55, %r54;
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mul.wide.u32 %rd46, %r67, 12;
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add.s64 %rd47, %rd45, %rd46;
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ld.global.f32 %f14, [%rd47];
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mul.f32 %f228, %f14, 0f3456BF95;
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ld.global.f32 %f15, [%rd47+4];
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mul.f32 %f229, %f15, 0f3456BF95;
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ld.global.f32 %f16, [%rd47+8];
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mul.f32 %f230, %f16, 0f3456BF95;
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abs.f32 %f231, %f1283;
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div.rn.f32 %f232, %f228, %f231;
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abs.f32 %f233, %f1284;
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div.rn.f32 %f234, %f229, %f233;
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abs.f32 %f235, %f1285;
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div.rn.f32 %f236, %f230, %f235;
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abs.f32 %f237, %f232;
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abs.f32 %f238, %f234;
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abs.f32 %f239, %f236;
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mov.f32 %f240, 0f38D1B717;
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max.f32 %f241, %f237, %f240;
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max.f32 %f242, %f238, %f240;
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max.f32 %f243, %f239, %f240;
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fma.rn.f32 %f17, %f1283, %f241, %f14;
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fma.rn.f32 %f18, %f1284, %f242, %f15;
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fma.rn.f32 %f19, %f1285, %f243, %f16;
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abs.f32 %f244, %f218;
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abs.f32 %f245, %f220;
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setp.gt.f32 %p15, %f244, %f245;
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selp.f32 %f246, %f222, 0f00000000, %p15;
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mov.f32 %f1291, 0f00000000;
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selp.f32 %f247, %f218, %f223, %p15;
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selp.f32 %f248, 0f00000000, %f219, %p15;
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mul.f32 %f249, %f247, %f247;
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fma.rn.f32 %f250, %f246, %f246, %f249;
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fma.rn.f32 %f251, %f248, %f248, %f250;
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sqrt.rn.f32 %f252, %f251;
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rcp.rn.f32 %f253, %f252;
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mul.f32 %f20, %f246, %f253;
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mul.f32 %f21, %f247, %f253;
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mul.f32 %f22, %f248, %f253;
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mul.f32 %f254, %f220, %f21;
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mul.f32 %f255, %f219, %f22;
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sub.f32 %f23, %f254, %f255;
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mul.f32 %f256, %f218, %f22;
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mul.f32 %f257, %f220, %f20;
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sub.f32 %f24, %f256, %f257;
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mul.f32 %f258, %f219, %f20;
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mul.f32 %f259, %f218, %f21;
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sub.f32 %f25, %f258, %f259;
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ld.const.u64 %rd48, [params+128];
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cvta.to.global.u64 %rd49, %rd48;
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ld.const.u32 %r68, [params+120];
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mad.lo.s32 %r69, %r68, %r55, %r54;
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mul.wide.u32 %rd50, %r69, 4;
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add.s64 %rd3, %rd49, %rd50;
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ld.const.u32 %r5, [params+540];
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setp.lt.s32 %p16, %r5, 1;
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mov.f32 %f1290, %f1291;
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mov.f32 %f1289, %f1291;
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@%p16 bra $L__BB0_34;
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cvt.rn.f32.s32 %f263, %r5;
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rcp.rn.f32 %f26, %f263;
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ld.global.u32 %r379, [%rd3];
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ld.const.f32 %f27, [params+536];
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ld.const.u8 %rs15, [params+104];
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and.b16 %rs16, %rs15, 32;
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setp.eq.s16 %p17, %rs16, 0;
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mov.u32 %r70, 0;
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selp.f32 %f28, 0f3F800000, 0f41200000, %p17;
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mul.f32 %f29, %f17, 0f3456BF95;
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mul.f32 %f30, %f18, 0f3456BF95;
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mul.f32 %f31, %f19, 0f3456BF95;
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ld.const.u64 %rd4, [params+96];
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add.s64 %rd5, %rd1, 24;
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mov.u64 %rd51, __cudart_i2opi_f;
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abs.f32 %f346, %f30;
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abs.f32 %f347, %f29;
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max.f32 %f348, %f347, %f346;
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abs.f32 %f349, %f31;
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max.f32 %f350, %f348, %f349;
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mov.u32 %r376, %r70;
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$L__BB0_7:
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mov.u32 %r378, %r70;
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$L__BB0_8:
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cvt.rn.f32.s32 %f1230, %r376;
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mad.lo.s32 %r72, %r379, 1664525, 1013904223;
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and.b32 %r73, %r72, 16777215;
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cvt.rn.f32.u32 %f264, %r73;
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fma.rn.f32 %f265, %f264, 0f33800000, %f1230;
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mul.f32 %f266, %f26, %f265;
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mad.lo.s32 %r379, %r72, 1664525, 1013904223;
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and.b32 %r74, %r379, 16777215;
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cvt.rn.f32.u32 %f267, %r74;
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cvt.rn.f32.s32 %f268, %r378;
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fma.rn.f32 %f269, %f267, 0f33800000, %f268;
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mul.f32 %f270, %f26, %f269;
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sqrt.rn.f32 %f39, %f266;
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mul.f32 %f40, %f270, 0f40C90FDB;
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mul.f32 %f271, %f40, 0f3F22F983;
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cvt.rni.s32.f32 %r386, %f271;
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cvt.rn.f32.s32 %f272, %r386;
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mov.f32 %f273, 0fBFC90FDA;
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fma.rn.f32 %f274, %f272, %f273, %f40;
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mov.f32 %f275, 0fB3A22168;
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fma.rn.f32 %f276, %f272, %f275, %f274;
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mov.f32 %f277, 0fA7C234C5;
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fma.rn.f32 %f1295, %f272, %f277, %f276;
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abs.f32 %f42, %f40;
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setp.ltu.f32 %p18, %f42, 0f47CE4780;
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mov.u32 %r383, %r386;
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mov.f32 %f1292, %f1295;
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@%p18 bra $L__BB0_16;
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setp.eq.f32 %p19, %f42, 0f7F800000;
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@%p19 bra $L__BB0_15;
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bra.uni $L__BB0_10;
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$L__BB0_15:
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mov.f32 %f280, 0f00000000;
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mul.rn.f32 %f1292, %f40, %f280;
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mov.u32 %r383, 0;
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bra.uni $L__BB0_16;
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$L__BB0_10:
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mov.b32 %r13, %f40;
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bfe.u32 %r76, %r13, 23, 8;
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add.s32 %r14, %r76, -128;
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shl.b32 %r77, %r13, 8;
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or.b32 %r15, %r77, -2147483648;
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shr.u32 %r16, %r14, 5;
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mov.u64 %rd159, 0;
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mov.u32 %r380, 0;
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mov.u64 %rd157, %rd1;
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mov.u64 %rd158, %rd51;
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$L__BB0_11:
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.pragma "nounroll";
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ld.global.nc.u32 %r78, [%rd158];
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mad.wide.u32 %rd53, %r78, %r15, %rd159;
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shr.u64 %rd159, %rd53, 32;
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st.local.u32 [%rd157], %rd53;
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add.s64 %rd158, %rd158, 4;
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add.s64 %rd157, %rd157, 4;
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add.s32 %r380, %r380, 1;
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setp.ne.s32 %p20, %r380, 6;
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@%p20 bra $L__BB0_11;
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st.local.u32 [%rd5], %rd159;
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mov.u32 %r79, 4;
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sub.s32 %r19, %r79, %r16;
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mov.u32 %r80, 6;
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sub.s32 %r81, %r80, %r16;
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mul.wide.s32 %rd54, %r81, 4;
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add.s64 %rd55, %rd1, %rd54;
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ld.local.u32 %r381, [%rd55];
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ld.local.u32 %r382, [%rd55+-4];
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and.b32 %r22, %r14, 31;
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setp.eq.s32 %p21, %r22, 0;
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@%p21 bra $L__BB0_14;
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mov.u32 %r82, 32;
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sub.s32 %r83, %r82, %r22;
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shr.u32 %r84, %r382, %r83;
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shl.b32 %r85, %r381, %r22;
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add.s32 %r381, %r84, %r85;
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mul.wide.s32 %rd56, %r19, 4;
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add.s64 %rd57, %rd1, %rd56;
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ld.local.u32 %r86, [%rd57];
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shr.u32 %r87, %r86, %r83;
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shl.b32 %r88, %r382, %r22;
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add.s32 %r382, %r87, %r88;
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$L__BB0_14:
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and.b32 %r89, %r13, -2147483648;
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shr.u32 %r90, %r382, 30;
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shl.b32 %r91, %r381, 2;
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or.b32 %r92, %r90, %r91;
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shr.u32 %r93, %r92, 31;
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shr.u32 %r94, %r381, 30;
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add.s32 %r95, %r93, %r94;
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neg.s32 %r96, %r95;
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setp.eq.s32 %p22, %r89, 0;
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selp.b32 %r383, %r95, %r96, %p22;
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setp.ne.s32 %p23, %r93, 0;
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xor.b32 %r97, %r89, -2147483648;
|
|
selp.b32 %r98, %r97, %r89, %p23;
|
|
selp.b32 %r99, -1, 0, %p23;
|
|
xor.b32 %r100, %r92, %r99;
|
|
shl.b32 %r101, %r382, 2;
|
|
xor.b32 %r102, %r101, %r99;
|
|
cvt.u64.u32 %rd58, %r100;
|
|
cvt.u64.u32 %rd59, %r102;
|
|
bfi.b64 %rd60, %rd58, %rd59, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd60;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f278, %fd2;
|
|
setp.eq.s32 %p24, %r98, 0;
|
|
neg.f32 %f279, %f278;
|
|
selp.f32 %f1292, %f278, %f279, %p24;
|
|
|
|
$L__BB0_16:
|
|
add.s32 %r29, %r383, 1;
|
|
and.b32 %r30, %r29, 1;
|
|
setp.eq.s32 %p25, %r30, 0;
|
|
selp.f32 %f46, %f1292, 0f3F800000, %p25;
|
|
mul.rn.f32 %f47, %f1292, %f1292;
|
|
mov.f32 %f1293, 0fB94D4153;
|
|
@%p25 bra $L__BB0_18;
|
|
|
|
mov.f32 %f282, 0fBAB607ED;
|
|
mov.f32 %f283, 0f37CBAC00;
|
|
fma.rn.f32 %f1293, %f283, %f47, %f282;
|
|
|
|
$L__BB0_18:
|
|
selp.f32 %f284, 0f3C0885E4, 0f3D2AAABB, %p25;
|
|
fma.rn.f32 %f285, %f1293, %f47, %f284;
|
|
selp.f32 %f286, 0fBE2AAAA8, 0fBEFFFFFF, %p25;
|
|
fma.rn.f32 %f287, %f285, %f47, %f286;
|
|
mov.f32 %f288, 0f00000000;
|
|
fma.rn.f32 %f289, %f47, %f46, %f288;
|
|
fma.rn.f32 %f1294, %f287, %f289, %f46;
|
|
and.b32 %r104, %r29, 2;
|
|
setp.eq.s32 %p27, %r104, 0;
|
|
@%p27 bra $L__BB0_20;
|
|
|
|
mov.f32 %f291, 0fBF800000;
|
|
fma.rn.f32 %f1294, %f1294, %f291, %f288;
|
|
|
|
$L__BB0_20:
|
|
@%p18 bra $L__BB0_28;
|
|
|
|
setp.eq.f32 %p29, %f42, 0f7F800000;
|
|
@%p29 bra $L__BB0_27;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f294, 0f00000000;
|
|
mul.rn.f32 %f1295, %f40, %f294;
|
|
mov.u32 %r386, 0;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_22:
|
|
mov.b32 %r31, %f40;
|
|
bfe.u32 %r105, %r31, 23, 8;
|
|
add.s32 %r32, %r105, -128;
|
|
shl.b32 %r106, %r31, 8;
|
|
or.b32 %r33, %r106, -2147483648;
|
|
shr.u32 %r34, %r32, 5;
|
|
mov.u64 %rd160, 0;
|
|
mov.u64 %rd161, %rd160;
|
|
|
|
$L__BB0_23:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd63, %rd160, 2;
|
|
mov.u64 %rd64, __cudart_i2opi_f;
|
|
add.s64 %rd65, %rd64, %rd63;
|
|
ld.global.nc.u32 %r107, [%rd65];
|
|
mad.wide.u32 %rd66, %r107, %r33, %rd161;
|
|
shr.u64 %rd161, %rd66, 32;
|
|
add.s64 %rd67, %rd1, %rd63;
|
|
st.local.u32 [%rd67], %rd66;
|
|
cvt.u32.u64 %r108, %rd160;
|
|
add.s32 %r109, %r108, 1;
|
|
cvt.s64.s32 %rd160, %r109;
|
|
setp.ne.s32 %p30, %r109, 6;
|
|
@%p30 bra $L__BB0_23;
|
|
|
|
st.local.u32 [%rd5], %rd161;
|
|
mov.u32 %r110, 4;
|
|
sub.s32 %r35, %r110, %r34;
|
|
mov.u32 %r111, 6;
|
|
sub.s32 %r112, %r111, %r34;
|
|
mul.wide.s32 %rd68, %r112, 4;
|
|
add.s64 %rd69, %rd1, %rd68;
|
|
ld.local.u32 %r384, [%rd69];
|
|
ld.local.u32 %r385, [%rd69+-4];
|
|
and.b32 %r38, %r32, 31;
|
|
setp.eq.s32 %p31, %r38, 0;
|
|
@%p31 bra $L__BB0_26;
|
|
|
|
mov.u32 %r113, 32;
|
|
sub.s32 %r114, %r113, %r38;
|
|
shr.u32 %r115, %r385, %r114;
|
|
shl.b32 %r116, %r384, %r38;
|
|
add.s32 %r384, %r115, %r116;
|
|
mul.wide.s32 %rd70, %r35, 4;
|
|
add.s64 %rd71, %rd1, %rd70;
|
|
ld.local.u32 %r117, [%rd71];
|
|
shr.u32 %r118, %r117, %r114;
|
|
shl.b32 %r119, %r385, %r38;
|
|
add.s32 %r385, %r118, %r119;
|
|
|
|
$L__BB0_26:
|
|
and.b32 %r120, %r31, -2147483648;
|
|
shr.u32 %r121, %r385, 30;
|
|
shl.b32 %r122, %r384, 2;
|
|
or.b32 %r123, %r121, %r122;
|
|
shr.u32 %r124, %r123, 31;
|
|
shr.u32 %r125, %r384, 30;
|
|
add.s32 %r126, %r124, %r125;
|
|
neg.s32 %r127, %r126;
|
|
setp.eq.s32 %p32, %r120, 0;
|
|
selp.b32 %r386, %r126, %r127, %p32;
|
|
setp.ne.s32 %p33, %r124, 0;
|
|
xor.b32 %r128, %r120, -2147483648;
|
|
selp.b32 %r129, %r128, %r120, %p33;
|
|
selp.b32 %r130, -1, 0, %p33;
|
|
xor.b32 %r131, %r123, %r130;
|
|
shl.b32 %r132, %r385, 2;
|
|
xor.b32 %r133, %r132, %r130;
|
|
cvt.u64.u32 %rd72, %r131;
|
|
cvt.u64.u32 %rd73, %r133;
|
|
bfi.b64 %rd74, %rd72, %rd73, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd74;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f292, %fd4;
|
|
setp.eq.s32 %p34, %r129, 0;
|
|
neg.f32 %f293, %f292;
|
|
selp.f32 %f1295, %f292, %f293, %p34;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f56, %f39, %f1294;
|
|
and.b32 %r45, %r386, 1;
|
|
setp.eq.s32 %p35, %r45, 0;
|
|
selp.f32 %f57, %f1295, 0f3F800000, %p35;
|
|
mul.rn.f32 %f58, %f1295, %f1295;
|
|
mov.f32 %f1296, 0fB94D4153;
|
|
@%p35 bra $L__BB0_30;
|
|
|
|
mov.f32 %f296, 0fBAB607ED;
|
|
mov.f32 %f297, 0f37CBAC00;
|
|
fma.rn.f32 %f1296, %f297, %f58, %f296;
|
|
|
|
$L__BB0_30:
|
|
selp.f32 %f298, 0f3C0885E4, 0f3D2AAABB, %p35;
|
|
fma.rn.f32 %f299, %f1296, %f58, %f298;
|
|
selp.f32 %f300, 0fBE2AAAA8, 0fBEFFFFFF, %p35;
|
|
fma.rn.f32 %f301, %f299, %f58, %f300;
|
|
mov.f32 %f302, 0f00000000;
|
|
fma.rn.f32 %f303, %f58, %f57, %f302;
|
|
fma.rn.f32 %f1297, %f301, %f303, %f57;
|
|
and.b32 %r135, %r386, 2;
|
|
setp.eq.s32 %p37, %r135, 0;
|
|
@%p37 bra $L__BB0_32;
|
|
|
|
mov.f32 %f305, 0fBF800000;
|
|
fma.rn.f32 %f1297, %f1297, %f305, %f302;
|
|
|
|
$L__BB0_32:
|
|
mul.f32 %f315, %f56, %f56;
|
|
mov.f32 %f316, 0f3F800000;
|
|
sub.f32 %f317, %f316, %f315;
|
|
mul.f32 %f318, %f39, %f1297;
|
|
mul.f32 %f319, %f318, %f318;
|
|
sub.f32 %f320, %f317, %f319;
|
|
max.f32 %f321, %f302, %f320;
|
|
sqrt.rn.f32 %f322, %f321;
|
|
mul.f32 %f323, %f20, %f318;
|
|
mul.f32 %f324, %f21, %f318;
|
|
mul.f32 %f325, %f22, %f318;
|
|
fma.rn.f32 %f326, %f23, %f56, %f323;
|
|
fma.rn.f32 %f327, %f24, %f56, %f324;
|
|
fma.rn.f32 %f328, %f25, %f56, %f325;
|
|
fma.rn.f32 %f329, %f218, %f322, %f326;
|
|
fma.rn.f32 %f330, %f219, %f322, %f327;
|
|
fma.rn.f32 %f331, %f220, %f322, %f328;
|
|
add.f32 %f332, %f218, %f329;
|
|
add.f32 %f333, %f219, %f330;
|
|
add.f32 %f334, %f220, %f331;
|
|
mul.f32 %f335, %f27, %f332;
|
|
mul.f32 %f336, %f27, %f333;
|
|
mul.f32 %f337, %f27, %f334;
|
|
sub.f32 %f338, %f335, %f218;
|
|
sub.f32 %f339, %f336, %f219;
|
|
sub.f32 %f340, %f337, %f220;
|
|
mul.f32 %f341, %f339, %f339;
|
|
fma.rn.f32 %f342, %f338, %f338, %f341;
|
|
fma.rn.f32 %f343, %f340, %f340, %f342;
|
|
sqrt.rn.f32 %f344, %f343;
|
|
rcp.rn.f32 %f345, %f344;
|
|
mul.f32 %f309, %f345, %f338;
|
|
mul.f32 %f310, %f345, %f339;
|
|
mul.f32 %f311, %f345, %f340;
|
|
mov.f32 %f351, 0f38D1B717;
|
|
max.f32 %f352, %f350, %f351;
|
|
mul.f32 %f312, %f28, %f352;
|
|
mov.f32 %f313, 0f6C4ECB8F;
|
|
mov.u32 %r172, 2;
|
|
mov.u32 %r173, 1;
|
|
mov.u32 %r174, 3;
|
|
mov.u32 %r177, 1065353216;
|
|
mov.u32 %r206, 0;
|
|
// begin inline asm
|
|
call(%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166,%r167),_optix_trace_typed_32,(%r206,%rd4,%f17,%f18,%f19,%f309,%f310,%f311,%f312,%f313,%f302,%r173,%r206,%r173,%r172,%r173,%r174,%r177,%r177,%r177,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206);
|
|
// end inline asm
|
|
mov.b32 %f353, %r136;
|
|
mov.b32 %f354, %r137;
|
|
mov.b32 %f355, %r138;
|
|
add.f32 %f1291, %f1291, %f353;
|
|
add.f32 %f1290, %f1290, %f354;
|
|
add.f32 %f1289, %f1289, %f355;
|
|
add.s32 %r378, %r378, 1;
|
|
setp.lt.s32 %p38, %r378, %r5;
|
|
@%p38 bra $L__BB0_8;
|
|
|
|
add.s32 %r376, %r376, 1;
|
|
setp.lt.s32 %p39, %r376, %r5;
|
|
@%p39 bra $L__BB0_7;
|
|
|
|
$L__BB0_34:
|
|
setp.eq.s32 %p40, %r5, 0;
|
|
mov.f32 %f1301, 0f3F800000;
|
|
mov.f32 %f1302, %f1301;
|
|
mov.f32 %f1303, %f1301;
|
|
@%p40 bra $L__BB0_36;
|
|
|
|
mul.lo.s32 %r207, %r5, %r5;
|
|
cvt.rn.f32.s32 %f359, %r207;
|
|
rcp.rn.f32 %f360, %f359;
|
|
mul.f32 %f1301, %f1291, %f360;
|
|
mul.f32 %f1302, %f1290, %f360;
|
|
mul.f32 %f1303, %f1289, %f360;
|
|
|
|
$L__BB0_36:
|
|
mul.f32 %f361, %f15, %f24;
|
|
fma.rn.f32 %f362, %f14, %f23, %f361;
|
|
fma.rn.f32 %f363, %f16, %f25, %f362;
|
|
ld.const.v4.f32 {%f364, %f365, %f366, %f367}, [params+560];
|
|
fma.rn.f32 %f372, %f363, %f364, %f366;
|
|
mul.f32 %f373, %f15, %f21;
|
|
fma.rn.f32 %f374, %f14, %f20, %f373;
|
|
fma.rn.f32 %f375, %f16, %f22, %f374;
|
|
fma.rn.f32 %f376, %f375, %f365, %f367;
|
|
ld.const.u64 %rd76, [params+552];
|
|
tex.2d.v4.f32.f32 {%f377, %f378, %f379, %f380}, [%rd76, {%f372, %f376}];
|
|
min.f32 %f381, %f377, %f378;
|
|
min.f32 %f382, %f381, %f379;
|
|
mul.f32 %f76, %f1301, %f382;
|
|
ld.const.f32 %f383, [params+524];
|
|
mul.f32 %f384, %f1301, %f383;
|
|
ld.const.v2.f32 {%f385, %f386}, [params+528];
|
|
mul.f32 %f389, %f1302, %f385;
|
|
mul.f32 %f390, %f1303, %f386;
|
|
mul.f32 %f77, %f377, %f384;
|
|
mul.f32 %f78, %f378, %f389;
|
|
mul.f32 %f79, %f379, %f390;
|
|
cvt.sat.f32.f32 %f391, %f13;
|
|
mul.f32 %f80, %f77, %f391;
|
|
mul.f32 %f81, %f78, %f391;
|
|
mul.f32 %f82, %f391, %f79;
|
|
ld.const.u32 %r48, [params+104];
|
|
and.b32 %r208, %r48, 8;
|
|
setp.eq.s32 %p41, %r208, 0;
|
|
@%p41 bra $L__BB0_50;
|
|
|
|
mov.f32 %f396, 0f3EE8BA2E;
|
|
abs.f32 %f84, %f76;
|
|
setp.lt.f32 %p42, %f84, 0f00800000;
|
|
mul.f32 %f398, %f84, 0f4B800000;
|
|
selp.f32 %f399, %f398, %f84, %p42;
|
|
selp.f32 %f400, 0fC3170000, 0fC2FE0000, %p42;
|
|
mov.b32 %r211, %f399;
|
|
and.b32 %r212, %r211, 8388607;
|
|
or.b32 %r213, %r212, 1065353216;
|
|
mov.b32 %f401, %r213;
|
|
shr.u32 %r214, %r211, 23;
|
|
cvt.rn.f32.u32 %f402, %r214;
|
|
add.f32 %f403, %f400, %f402;
|
|
setp.gt.f32 %p43, %f401, 0f3FB504F3;
|
|
mul.f32 %f404, %f401, 0f3F000000;
|
|
add.f32 %f405, %f403, 0f3F800000;
|
|
selp.f32 %f406, %f405, %f403, %p43;
|
|
selp.f32 %f407, %f404, %f401, %p43;
|
|
add.f32 %f408, %f407, 0fBF800000;
|
|
add.f32 %f409, %f407, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f410, %f409;
|
|
add.f32 %f411, %f408, %f408;
|
|
mul.f32 %f412, %f411, %f410;
|
|
mul.f32 %f413, %f412, %f412;
|
|
mov.f32 %f414, 0f3C4CAF63;
|
|
mov.f32 %f415, 0f3B18F0FE;
|
|
fma.rn.f32 %f416, %f415, %f413, %f414;
|
|
mov.f32 %f417, 0f3DAAAABD;
|
|
fma.rn.f32 %f418, %f416, %f413, %f417;
|
|
mul.rn.f32 %f419, %f418, %f413;
|
|
mul.rn.f32 %f420, %f419, %f412;
|
|
sub.f32 %f421, %f408, %f412;
|
|
add.f32 %f422, %f421, %f421;
|
|
neg.f32 %f423, %f412;
|
|
fma.rn.f32 %f424, %f423, %f408, %f422;
|
|
mul.rn.f32 %f425, %f410, %f424;
|
|
add.f32 %f426, %f420, %f412;
|
|
sub.f32 %f427, %f412, %f426;
|
|
add.f32 %f428, %f420, %f427;
|
|
add.f32 %f429, %f425, %f428;
|
|
add.f32 %f430, %f426, %f429;
|
|
sub.f32 %f431, %f426, %f430;
|
|
add.f32 %f432, %f429, %f431;
|
|
mov.f32 %f433, 0f3F317200;
|
|
mul.rn.f32 %f434, %f406, %f433;
|
|
mov.f32 %f435, 0f35BFBE8E;
|
|
mul.rn.f32 %f436, %f406, %f435;
|
|
add.f32 %f437, %f434, %f430;
|
|
sub.f32 %f438, %f434, %f437;
|
|
add.f32 %f439, %f430, %f438;
|
|
add.f32 %f440, %f432, %f439;
|
|
add.f32 %f441, %f436, %f440;
|
|
add.f32 %f442, %f437, %f441;
|
|
sub.f32 %f443, %f437, %f442;
|
|
add.f32 %f444, %f441, %f443;
|
|
mul.rn.f32 %f445, %f396, %f442;
|
|
neg.f32 %f446, %f445;
|
|
fma.rn.f32 %f447, %f396, %f442, %f446;
|
|
fma.rn.f32 %f448, %f396, %f444, %f447;
|
|
mov.f32 %f449, 0f00000000;
|
|
fma.rn.f32 %f450, %f449, %f442, %f448;
|
|
add.rn.f32 %f451, %f445, %f450;
|
|
neg.f32 %f452, %f451;
|
|
add.rn.f32 %f453, %f445, %f452;
|
|
add.rn.f32 %f454, %f453, %f450;
|
|
mov.b32 %r215, %f451;
|
|
setp.eq.s32 %p44, %r215, 1118925336;
|
|
add.s32 %r216, %r215, -1;
|
|
mov.b32 %f455, %r216;
|
|
add.f32 %f456, %f454, 0f37000000;
|
|
selp.f32 %f85, %f456, %f454, %p44;
|
|
selp.f32 %f457, %f455, %f451, %p44;
|
|
mov.f32 %f458, 0f3FB8AA3B;
|
|
mul.rn.f32 %f459, %f457, %f458;
|
|
cvt.rzi.f32.f32 %f460, %f459;
|
|
abs.f32 %f461, %f460;
|
|
setp.gt.f32 %p45, %f461, 0f42FC0000;
|
|
mov.b32 %r217, %f460;
|
|
and.b32 %r218, %r217, -2147483648;
|
|
or.b32 %r219, %r218, 1123811328;
|
|
mov.b32 %f462, %r219;
|
|
selp.f32 %f463, %f462, %f460, %p45;
|
|
mov.f32 %f464, 0fBF317218;
|
|
fma.rn.f32 %f465, %f463, %f464, %f457;
|
|
mov.f32 %f466, 0f3102E308;
|
|
fma.rn.f32 %f467, %f463, %f466, %f465;
|
|
mul.f32 %f468, %f467, 0f3FB8AA3B;
|
|
add.f32 %f469, %f463, 0f4B40007F;
|
|
mov.b32 %r220, %f469;
|
|
shl.b32 %r221, %r220, 23;
|
|
mov.b32 %f470, %r221;
|
|
ex2.approx.ftz.f32 %f471, %f468;
|
|
mul.f32 %f86, %f471, %f470;
|
|
setp.eq.f32 %p46, %f86, 0f7F800000;
|
|
mov.f32 %f1304, 0f7F800000;
|
|
@%p46 bra $L__BB0_39;
|
|
|
|
fma.rn.f32 %f1304, %f86, %f85, %f86;
|
|
|
|
$L__BB0_39:
|
|
mov.f32 %f1236, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1235, %f1236;
|
|
add.f32 %f1234, %f1235, %f1235;
|
|
mov.f32 %f1233, 0f3EE8BA2E;
|
|
sub.f32 %f1232, %f1233, %f1234;
|
|
abs.f32 %f1231, %f1232;
|
|
setp.lt.f32 %p47, %f76, 0f00000000;
|
|
setp.eq.f32 %p48, %f1231, 0f3F800000;
|
|
and.pred %p1, %p47, %p48;
|
|
setp.eq.f32 %p49, %f76, 0f00000000;
|
|
@%p49 bra $L__BB0_43;
|
|
bra.uni $L__BB0_40;
|
|
|
|
$L__BB0_43:
|
|
add.f32 %f476, %f76, %f76;
|
|
selp.f32 %f1306, %f476, 0f00000000, %p48;
|
|
bra.uni $L__BB0_44;
|
|
|
|
$L__BB0_162:
|
|
mov.f32 %f1142, 0f00000000;
|
|
mov.u32 %r388, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs189, %f1142;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs188, %f1142;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs187, %f1142;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs190, 0;
|
|
st.global.v4.u16 [%rd30], {%rs187, %rs188, %rs189, %rs190};
|
|
|
|
$L__BB0_163:
|
|
ld.const.u64 %rd124, [params+256];
|
|
cvta.to.global.u64 %rd125, %rd124;
|
|
ld.const.u32 %r352, [params+248];
|
|
mad.lo.s32 %r353, %r352, %r4, %r3;
|
|
mul.wide.u32 %rd126, %r353, 8;
|
|
add.s64 %rd31, %rd125, %rd126;
|
|
setp.eq.s32 %p172, %r388, 0;
|
|
@%p172 bra $L__BB0_165;
|
|
|
|
ld.global.v4.u16 {%rs197, %rs198, %rs199, %rs200}, [%rd31];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1143, %rs197;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1144, %rs198;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1145, %rs199;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1146, %f1143, 0f00000000;
|
|
add.f32 %f1147, %f1144, 0f00000000;
|
|
add.f32 %f1148, %f1145, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs196, %f1148;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs195, %f1147;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs194, %f1146;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs201, 0;
|
|
st.global.v4.u16 [%rd31], {%rs194, %rs195, %rs196, %rs201};
|
|
bra.uni $L__BB0_166;
|
|
|
|
$L__BB0_165:
|
|
mov.f32 %f1151, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs204, %f1151;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs203, %f1151;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs202, %f1151;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs205, 0;
|
|
st.global.v4.u16 [%rd31], {%rs202, %rs203, %rs204, %rs205};
|
|
|
|
$L__BB0_166:
|
|
ld.const.u64 %rd127, [params+272];
|
|
cvta.to.global.u64 %rd128, %rd127;
|
|
ld.const.u32 %r354, [params+264];
|
|
mad.lo.s32 %r355, %r354, %r4, %r3;
|
|
mul.wide.u32 %rd129, %r355, 8;
|
|
add.s64 %rd32, %rd128, %rd129;
|
|
@%p172 bra $L__BB0_168;
|
|
|
|
ld.global.v4.u16 {%rs212, %rs213, %rs214, %rs215}, [%rd32];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1152, %rs212;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1153, %rs213;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1154, %rs214;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1155, %f1152, 0f00000000;
|
|
add.f32 %f1156, %f1153, 0f00000000;
|
|
add.f32 %f1157, %f1154, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs211, %f1157;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs210, %f1156;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs209, %f1155;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs216, 0;
|
|
st.global.v4.u16 [%rd32], {%rs209, %rs210, %rs211, %rs216};
|
|
bra.uni $L__BB0_169;
|
|
|
|
$L__BB0_168:
|
|
mov.f32 %f1160, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs219, %f1160;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs218, %f1160;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs217, %f1160;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs220, 0;
|
|
st.global.v4.u16 [%rd32], {%rs217, %rs218, %rs219, %rs220};
|
|
|
|
$L__BB0_169:
|
|
ld.const.u64 %rd130, [params+288];
|
|
cvta.to.global.u64 %rd131, %rd130;
|
|
ld.const.u32 %r356, [params+280];
|
|
mad.lo.s32 %r357, %r356, %r4, %r3;
|
|
mul.wide.u32 %rd132, %r357, 8;
|
|
add.s64 %rd33, %rd131, %rd132;
|
|
@%p172 bra $L__BB0_171;
|
|
|
|
ld.global.v4.u16 {%rs227, %rs228, %rs229, %rs230}, [%rd33];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1161, %rs227;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1162, %rs228;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1163, %rs229;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1164, %f1161, 0f00000000;
|
|
add.f32 %f1165, %f1162, 0f00000000;
|
|
add.f32 %f1166, %f1163, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs226, %f1166;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs225, %f1165;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs224, %f1164;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs231, 0;
|
|
st.global.v4.u16 [%rd33], {%rs224, %rs225, %rs226, %rs231};
|
|
bra.uni $L__BB0_172;
|
|
|
|
$L__BB0_171:
|
|
mov.f32 %f1169, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs234, %f1169;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs233, %f1169;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs232, %f1169;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs235, 0;
|
|
st.global.v4.u16 [%rd33], {%rs232, %rs233, %rs234, %rs235};
|
|
|
|
$L__BB0_172:
|
|
ld.const.u64 %rd133, [params+304];
|
|
cvta.to.global.u64 %rd134, %rd133;
|
|
ld.const.u32 %r358, [params+296];
|
|
mad.lo.s32 %r359, %r358, %r4, %r3;
|
|
mul.wide.u32 %rd135, %r359, 8;
|
|
add.s64 %rd34, %rd134, %rd135;
|
|
@%p172 bra $L__BB0_174;
|
|
|
|
ld.global.v4.u16 {%rs242, %rs243, %rs244, %rs245}, [%rd34];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1170, %rs242;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1171, %rs243;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1172, %rs244;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1173, %f1170, 0f00000000;
|
|
add.f32 %f1174, %f1171, 0f00000000;
|
|
add.f32 %f1175, %f1172, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs241, %f1175;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs240, %f1174;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs239, %f1173;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs246, 0;
|
|
st.global.v4.u16 [%rd34], {%rs239, %rs240, %rs241, %rs246};
|
|
bra.uni $L__BB0_175;
|
|
|
|
$L__BB0_174:
|
|
mov.f32 %f1178, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs249, %f1178;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs248, %f1178;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs247, %f1178;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs250, 0;
|
|
st.global.v4.u16 [%rd34], {%rs247, %rs248, %rs249, %rs250};
|
|
|
|
$L__BB0_175:
|
|
ld.const.u64 %rd136, [params+320];
|
|
cvta.to.global.u64 %rd137, %rd136;
|
|
ld.const.u32 %r360, [params+312];
|
|
mad.lo.s32 %r361, %r360, %r4, %r3;
|
|
mul.wide.u32 %rd138, %r361, 8;
|
|
add.s64 %rd35, %rd137, %rd138;
|
|
@%p172 bra $L__BB0_177;
|
|
|
|
ld.global.v4.u16 {%rs257, %rs258, %rs259, %rs260}, [%rd35];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1179, %rs257;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1180, %rs258;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1181, %rs259;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1182, %f1179, 0f00000000;
|
|
add.f32 %f1183, %f1180, 0f00000000;
|
|
add.f32 %f1184, %f1181, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs256, %f1184;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs255, %f1183;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs254, %f1182;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs261, 0;
|
|
st.global.v4.u16 [%rd35], {%rs254, %rs255, %rs256, %rs261};
|
|
bra.uni $L__BB0_178;
|
|
|
|
$L__BB0_177:
|
|
mov.f32 %f1187, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs264, %f1187;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs263, %f1187;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs262, %f1187;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs265, 0;
|
|
st.global.v4.u16 [%rd35], {%rs262, %rs263, %rs264, %rs265};
|
|
|
|
$L__BB0_178:
|
|
ld.const.u64 %rd139, [params+336];
|
|
cvta.to.global.u64 %rd140, %rd139;
|
|
ld.const.u32 %r362, [params+328];
|
|
mad.lo.s32 %r363, %r362, %r4, %r3;
|
|
mul.wide.u32 %rd141, %r363, 8;
|
|
add.s64 %rd36, %rd140, %rd141;
|
|
@%p172 bra $L__BB0_180;
|
|
|
|
ld.global.v4.u16 {%rs272, %rs273, %rs274, %rs275}, [%rd36];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1188, %rs272;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1189, %rs273;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1190, %rs274;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1191, %f1188, 0f00000000;
|
|
add.f32 %f1192, %f1189, 0f00000000;
|
|
add.f32 %f1193, %f1190, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs271, %f1193;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs270, %f1192;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs269, %f1191;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs276, 0;
|
|
st.global.v4.u16 [%rd36], {%rs269, %rs270, %rs271, %rs276};
|
|
bra.uni $L__BB0_181;
|
|
|
|
$L__BB0_180:
|
|
mov.f32 %f1196, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs279, %f1196;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs278, %f1196;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs277, %f1196;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs280, 0;
|
|
st.global.v4.u16 [%rd36], {%rs277, %rs278, %rs279, %rs280};
|
|
|
|
$L__BB0_181:
|
|
ld.const.u64 %rd142, [params+352];
|
|
cvta.to.global.u64 %rd143, %rd142;
|
|
ld.const.u32 %r364, [params+344];
|
|
mad.lo.s32 %r365, %r364, %r4, %r3;
|
|
mul.wide.u32 %rd144, %r365, 8;
|
|
add.s64 %rd37, %rd143, %rd144;
|
|
@%p172 bra $L__BB0_183;
|
|
|
|
ld.global.v4.u16 {%rs287, %rs288, %rs289, %rs290}, [%rd37];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1197, %rs287;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1198, %rs288;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1199, %rs289;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1200, %f1197, 0f00000000;
|
|
add.f32 %f1201, %f1198, 0f00000000;
|
|
add.f32 %f1202, %f1199, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs286, %f1202;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs285, %f1201;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs284, %f1200;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs291, 0;
|
|
st.global.v4.u16 [%rd37], {%rs284, %rs285, %rs286, %rs291};
|
|
bra.uni $L__BB0_184;
|
|
|
|
$L__BB0_183:
|
|
mov.f32 %f1205, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs294, %f1205;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs293, %f1205;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs292, %f1205;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs295, 0;
|
|
st.global.v4.u16 [%rd37], {%rs292, %rs293, %rs294, %rs295};
|
|
|
|
$L__BB0_184:
|
|
ld.const.u64 %rd145, [params+368];
|
|
cvta.to.global.u64 %rd146, %rd145;
|
|
ld.const.u32 %r366, [params+360];
|
|
mad.lo.s32 %r367, %r366, %r4, %r3;
|
|
mul.wide.u32 %rd147, %r367, 8;
|
|
add.s64 %rd38, %rd146, %rd147;
|
|
@%p172 bra $L__BB0_186;
|
|
|
|
ld.global.v4.u16 {%rs302, %rs303, %rs304, %rs305}, [%rd38];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1206, %rs302;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1207, %rs303;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1208, %rs304;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1209, %f1206, 0f00000000;
|
|
add.f32 %f1210, %f1207, 0f00000000;
|
|
add.f32 %f1211, %f1208, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs301, %f1211;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs300, %f1210;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs299, %f1209;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs306, 0;
|
|
st.global.v4.u16 [%rd38], {%rs299, %rs300, %rs301, %rs306};
|
|
bra.uni $L__BB0_187;
|
|
|
|
$L__BB0_186:
|
|
mov.f32 %f1214, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs309, %f1214;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs308, %f1214;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs307, %f1214;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs310, 0;
|
|
st.global.v4.u16 [%rd38], {%rs307, %rs308, %rs309, %rs310};
|
|
|
|
$L__BB0_187:
|
|
ld.const.u64 %rd148, [params+384];
|
|
cvta.to.global.u64 %rd149, %rd148;
|
|
ld.const.u32 %r368, [params+376];
|
|
mad.lo.s32 %r369, %r368, %r4, %r3;
|
|
mul.wide.u32 %rd150, %r369, 8;
|
|
add.s64 %rd39, %rd149, %rd150;
|
|
@%p172 bra $L__BB0_189;
|
|
|
|
ld.global.v4.u16 {%rs317, %rs318, %rs319, %rs320}, [%rd39];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1215, %rs317;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1216, %rs318;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1217, %rs319;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1218, %f1215, 0f00000000;
|
|
add.f32 %f1219, %f1216, 0f00000000;
|
|
add.f32 %f1220, %f1217, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs316, %f1220;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs315, %f1219;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs314, %f1218;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs321, 0;
|
|
st.global.v4.u16 [%rd39], {%rs314, %rs315, %rs316, %rs321};
|
|
bra.uni $L__BB0_190;
|
|
|
|
$L__BB0_189:
|
|
mov.f32 %f1223, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs324, %f1223;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs323, %f1223;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs322, %f1223;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs325, 0;
|
|
st.global.v4.u16 [%rd39], {%rs322, %rs323, %rs324, %rs325};
|
|
bra.uni $L__BB0_190;
|
|
|
|
$L__BB0_40:
|
|
mov.b32 %r222, %f1304;
|
|
xor.b32 %r223, %r222, -2147483648;
|
|
mov.b32 %f472, %r223;
|
|
selp.f32 %f1306, %f472, %f1304, %p1;
|
|
setp.geu.f32 %p50, %f76, 0f00000000;
|
|
@%p50 bra $L__BB0_44;
|
|
|
|
mov.f32 %f473, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f474, %f473;
|
|
setp.eq.f32 %p51, %f474, 0f3EE8BA2E;
|
|
@%p51 bra $L__BB0_44;
|
|
|
|
mov.f32 %f1306, 0f7FFFFFFF;
|
|
|
|
$L__BB0_44:
|
|
abs.f32 %f1237, %f76;
|
|
add.f32 %f477, %f1237, 0f3EE8BA2E;
|
|
mov.b32 %r224, %f477;
|
|
setp.lt.s32 %p53, %r224, 2139095040;
|
|
@%p53 bra $L__BB0_49;
|
|
|
|
abs.f32 %f1238, %f76;
|
|
setp.gtu.f32 %p54, %f1238, 0f7F800000;
|
|
@%p54 bra $L__BB0_48;
|
|
bra.uni $L__BB0_46;
|
|
|
|
$L__BB0_48:
|
|
add.f32 %f1306, %f76, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_46:
|
|
abs.f32 %f1239, %f76;
|
|
setp.neu.f32 %p55, %f1239, 0f7F800000;
|
|
@%p55 bra $L__BB0_49;
|
|
|
|
selp.f32 %f1306, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_49:
|
|
ld.const.u32 %r375, [params+184];
|
|
mad.lo.s32 %r374, %r375, %r4, %r3;
|
|
cvt.u64.u32 %rd156, %r374;
|
|
ld.const.u64 %rd155, [params+192];
|
|
cvta.to.global.u64 %rd154, %rd155;
|
|
mul.f32 %f478, %f1306, 0f437F0000;
|
|
setp.eq.f32 %p56, %f76, 0f3F800000;
|
|
selp.f32 %f479, 0f437F0000, %f478, %p56;
|
|
cvt.rzi.u32.f32 %r225, %f479;
|
|
shl.b64 %rd78, %rd156, 1;
|
|
add.s64 %rd79, %rd154, %rd78;
|
|
cvt.u16.u32 %rs17, %r225;
|
|
mov.u16 %rs18, 255;
|
|
st.global.v2.u8 [%rd79], {%rs17, %rs18};
|
|
|
|
$L__BB0_50:
|
|
ld.const.u32 %r373, [params+104];
|
|
and.b32 %r226, %r373, 1;
|
|
setp.eq.b32 %p57, %r226, 1;
|
|
mov.pred %p58, 0;
|
|
xor.pred %p59, %p57, %p58;
|
|
not.pred %p60, %p59;
|
|
@%p60 bra $L__BB0_124;
|
|
|
|
mov.f32 %f484, 0f3EE66666;
|
|
abs.f32 %f96, %f80;
|
|
setp.lt.f32 %p61, %f96, 0f00800000;
|
|
mul.f32 %f486, %f96, 0f4B800000;
|
|
selp.f32 %f487, %f486, %f96, %p61;
|
|
selp.f32 %f488, 0fC3170000, 0fC2FE0000, %p61;
|
|
mov.b32 %r227, %f487;
|
|
and.b32 %r228, %r227, 8388607;
|
|
or.b32 %r229, %r228, 1065353216;
|
|
mov.b32 %f489, %r229;
|
|
shr.u32 %r230, %r227, 23;
|
|
cvt.rn.f32.u32 %f490, %r230;
|
|
add.f32 %f491, %f488, %f490;
|
|
setp.gt.f32 %p62, %f489, 0f3FB504F3;
|
|
mul.f32 %f492, %f489, 0f3F000000;
|
|
add.f32 %f493, %f491, 0f3F800000;
|
|
selp.f32 %f494, %f493, %f491, %p62;
|
|
selp.f32 %f495, %f492, %f489, %p62;
|
|
add.f32 %f496, %f495, 0fBF800000;
|
|
add.f32 %f497, %f495, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f498, %f497;
|
|
add.f32 %f499, %f496, %f496;
|
|
mul.f32 %f500, %f499, %f498;
|
|
mul.f32 %f501, %f500, %f500;
|
|
mov.f32 %f502, 0f3C4CAF63;
|
|
mov.f32 %f503, 0f3B18F0FE;
|
|
fma.rn.f32 %f504, %f503, %f501, %f502;
|
|
mov.f32 %f505, 0f3DAAAABD;
|
|
fma.rn.f32 %f506, %f504, %f501, %f505;
|
|
mul.rn.f32 %f507, %f506, %f501;
|
|
mul.rn.f32 %f508, %f507, %f500;
|
|
sub.f32 %f509, %f496, %f500;
|
|
add.f32 %f510, %f509, %f509;
|
|
neg.f32 %f511, %f500;
|
|
fma.rn.f32 %f512, %f511, %f496, %f510;
|
|
mul.rn.f32 %f513, %f498, %f512;
|
|
add.f32 %f514, %f508, %f500;
|
|
sub.f32 %f515, %f500, %f514;
|
|
add.f32 %f516, %f508, %f515;
|
|
add.f32 %f517, %f513, %f516;
|
|
add.f32 %f518, %f514, %f517;
|
|
sub.f32 %f519, %f514, %f518;
|
|
add.f32 %f520, %f517, %f519;
|
|
mov.f32 %f521, 0f3F317200;
|
|
mul.rn.f32 %f522, %f494, %f521;
|
|
mov.f32 %f523, 0f35BFBE8E;
|
|
mul.rn.f32 %f524, %f494, %f523;
|
|
add.f32 %f525, %f522, %f518;
|
|
sub.f32 %f526, %f522, %f525;
|
|
add.f32 %f527, %f518, %f526;
|
|
add.f32 %f528, %f520, %f527;
|
|
add.f32 %f529, %f524, %f528;
|
|
add.f32 %f530, %f525, %f529;
|
|
sub.f32 %f531, %f525, %f530;
|
|
add.f32 %f532, %f529, %f531;
|
|
mul.rn.f32 %f533, %f484, %f530;
|
|
neg.f32 %f534, %f533;
|
|
fma.rn.f32 %f535, %f484, %f530, %f534;
|
|
fma.rn.f32 %f536, %f484, %f532, %f535;
|
|
mov.f32 %f537, 0f00000000;
|
|
fma.rn.f32 %f538, %f537, %f530, %f536;
|
|
add.rn.f32 %f539, %f533, %f538;
|
|
neg.f32 %f540, %f539;
|
|
add.rn.f32 %f541, %f533, %f540;
|
|
add.rn.f32 %f542, %f541, %f538;
|
|
mov.b32 %r231, %f539;
|
|
setp.eq.s32 %p63, %r231, 1118925336;
|
|
add.s32 %r232, %r231, -1;
|
|
mov.b32 %f543, %r232;
|
|
add.f32 %f544, %f542, 0f37000000;
|
|
selp.f32 %f97, %f544, %f542, %p63;
|
|
selp.f32 %f545, %f543, %f539, %p63;
|
|
mov.f32 %f546, 0f3FB8AA3B;
|
|
mul.rn.f32 %f547, %f545, %f546;
|
|
cvt.rzi.f32.f32 %f548, %f547;
|
|
abs.f32 %f549, %f548;
|
|
setp.gt.f32 %p64, %f549, 0f42FC0000;
|
|
mov.b32 %r233, %f548;
|
|
and.b32 %r234, %r233, -2147483648;
|
|
or.b32 %r235, %r234, 1123811328;
|
|
mov.b32 %f550, %r235;
|
|
selp.f32 %f551, %f550, %f548, %p64;
|
|
mov.f32 %f552, 0fBF317218;
|
|
fma.rn.f32 %f553, %f551, %f552, %f545;
|
|
mov.f32 %f554, 0f3102E308;
|
|
fma.rn.f32 %f555, %f551, %f554, %f553;
|
|
mul.f32 %f556, %f555, 0f3FB8AA3B;
|
|
add.f32 %f557, %f551, 0f4B40007F;
|
|
mov.b32 %r236, %f557;
|
|
shl.b32 %r237, %r236, 23;
|
|
mov.b32 %f558, %r237;
|
|
ex2.approx.ftz.f32 %f559, %f556;
|
|
mul.f32 %f98, %f559, %f558;
|
|
setp.eq.f32 %p65, %f98, 0f7F800000;
|
|
mov.f32 %f1307, 0f7F800000;
|
|
@%p65 bra $L__BB0_53;
|
|
|
|
fma.rn.f32 %f1307, %f98, %f97, %f98;
|
|
|
|
$L__BB0_53:
|
|
mov.f32 %f1245, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1244, %f1245;
|
|
add.f32 %f1243, %f1244, %f1244;
|
|
mov.f32 %f1242, 0f3EE66666;
|
|
sub.f32 %f1241, %f1242, %f1243;
|
|
abs.f32 %f1240, %f1241;
|
|
setp.lt.f32 %p66, %f80, 0f00000000;
|
|
setp.eq.f32 %p67, %f1240, 0f3F800000;
|
|
and.pred %p2, %p66, %p67;
|
|
setp.eq.f32 %p68, %f80, 0f00000000;
|
|
@%p68 bra $L__BB0_57;
|
|
bra.uni $L__BB0_54;
|
|
|
|
$L__BB0_57:
|
|
add.f32 %f564, %f80, %f80;
|
|
selp.f32 %f1309, %f564, 0f00000000, %p67;
|
|
bra.uni $L__BB0_58;
|
|
|
|
$L__BB0_54:
|
|
mov.b32 %r238, %f1307;
|
|
xor.b32 %r239, %r238, -2147483648;
|
|
mov.b32 %f560, %r239;
|
|
selp.f32 %f1309, %f560, %f1307, %p2;
|
|
setp.geu.f32 %p69, %f80, 0f00000000;
|
|
@%p69 bra $L__BB0_58;
|
|
|
|
mov.f32 %f561, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f562, %f561;
|
|
setp.eq.f32 %p70, %f562, 0f3EE66666;
|
|
@%p70 bra $L__BB0_58;
|
|
|
|
mov.f32 %f1309, 0f7FFFFFFF;
|
|
|
|
$L__BB0_58:
|
|
abs.f32 %f1246, %f80;
|
|
add.f32 %f565, %f1246, 0f3EE66666;
|
|
mov.b32 %r240, %f565;
|
|
setp.lt.s32 %p72, %r240, 2139095040;
|
|
@%p72 bra $L__BB0_63;
|
|
|
|
abs.f32 %f1247, %f80;
|
|
setp.gtu.f32 %p73, %f1247, 0f7F800000;
|
|
@%p73 bra $L__BB0_62;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_62:
|
|
add.f32 %f1309, %f80, 0f3EE66666;
|
|
bra.uni $L__BB0_63;
|
|
|
|
$L__BB0_60:
|
|
abs.f32 %f1248, %f80;
|
|
setp.neu.f32 %p74, %f1248, 0f7F800000;
|
|
@%p74 bra $L__BB0_63;
|
|
|
|
selp.f32 %f1309, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
$L__BB0_63:
|
|
setp.eq.f32 %p75, %f80, 0f3F800000;
|
|
selp.f32 %f107, 0f3F800000, %f1309, %p75;
|
|
abs.f32 %f108, %f81;
|
|
setp.lt.f32 %p76, %f108, 0f00800000;
|
|
mul.f32 %f567, %f108, 0f4B800000;
|
|
selp.f32 %f568, %f567, %f108, %p76;
|
|
selp.f32 %f569, 0fC3170000, 0fC2FE0000, %p76;
|
|
mov.b32 %r241, %f568;
|
|
and.b32 %r242, %r241, 8388607;
|
|
or.b32 %r243, %r242, 1065353216;
|
|
mov.b32 %f570, %r243;
|
|
shr.u32 %r244, %r241, 23;
|
|
cvt.rn.f32.u32 %f571, %r244;
|
|
add.f32 %f572, %f569, %f571;
|
|
setp.gt.f32 %p77, %f570, 0f3FB504F3;
|
|
mul.f32 %f573, %f570, 0f3F000000;
|
|
add.f32 %f574, %f572, 0f3F800000;
|
|
selp.f32 %f575, %f574, %f572, %p77;
|
|
selp.f32 %f576, %f573, %f570, %p77;
|
|
add.f32 %f577, %f576, 0fBF800000;
|
|
add.f32 %f578, %f576, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f579, %f578;
|
|
add.f32 %f580, %f577, %f577;
|
|
mul.f32 %f581, %f580, %f579;
|
|
mul.f32 %f582, %f581, %f581;
|
|
mov.f32 %f583, 0f3C4CAF63;
|
|
mov.f32 %f584, 0f3B18F0FE;
|
|
fma.rn.f32 %f585, %f584, %f582, %f583;
|
|
mov.f32 %f586, 0f3DAAAABD;
|
|
fma.rn.f32 %f587, %f585, %f582, %f586;
|
|
mul.rn.f32 %f588, %f587, %f582;
|
|
mul.rn.f32 %f589, %f588, %f581;
|
|
sub.f32 %f590, %f577, %f581;
|
|
add.f32 %f591, %f590, %f590;
|
|
neg.f32 %f592, %f581;
|
|
fma.rn.f32 %f593, %f592, %f577, %f591;
|
|
mul.rn.f32 %f594, %f579, %f593;
|
|
add.f32 %f595, %f589, %f581;
|
|
sub.f32 %f596, %f581, %f595;
|
|
add.f32 %f597, %f589, %f596;
|
|
add.f32 %f598, %f594, %f597;
|
|
add.f32 %f599, %f595, %f598;
|
|
sub.f32 %f600, %f595, %f599;
|
|
add.f32 %f601, %f598, %f600;
|
|
mov.f32 %f602, 0f3F317200;
|
|
mul.rn.f32 %f603, %f575, %f602;
|
|
mov.f32 %f604, 0f35BFBE8E;
|
|
mul.rn.f32 %f605, %f575, %f604;
|
|
add.f32 %f606, %f603, %f599;
|
|
sub.f32 %f607, %f603, %f606;
|
|
add.f32 %f608, %f599, %f607;
|
|
add.f32 %f609, %f601, %f608;
|
|
add.f32 %f610, %f605, %f609;
|
|
add.f32 %f611, %f606, %f610;
|
|
sub.f32 %f612, %f606, %f611;
|
|
add.f32 %f613, %f610, %f612;
|
|
mov.f32 %f614, 0f3EE66666;
|
|
mul.rn.f32 %f615, %f614, %f611;
|
|
neg.f32 %f616, %f615;
|
|
fma.rn.f32 %f617, %f614, %f611, %f616;
|
|
fma.rn.f32 %f618, %f614, %f613, %f617;
|
|
mov.f32 %f619, 0f00000000;
|
|
fma.rn.f32 %f620, %f619, %f611, %f618;
|
|
add.rn.f32 %f621, %f615, %f620;
|
|
neg.f32 %f622, %f621;
|
|
add.rn.f32 %f623, %f615, %f622;
|
|
add.rn.f32 %f624, %f623, %f620;
|
|
mov.b32 %r245, %f621;
|
|
setp.eq.s32 %p78, %r245, 1118925336;
|
|
add.s32 %r246, %r245, -1;
|
|
mov.b32 %f625, %r246;
|
|
add.f32 %f626, %f624, 0f37000000;
|
|
selp.f32 %f109, %f626, %f624, %p78;
|
|
selp.f32 %f627, %f625, %f621, %p78;
|
|
mov.f32 %f628, 0f3FB8AA3B;
|
|
mul.rn.f32 %f629, %f627, %f628;
|
|
cvt.rzi.f32.f32 %f630, %f629;
|
|
abs.f32 %f631, %f630;
|
|
setp.gt.f32 %p79, %f631, 0f42FC0000;
|
|
mov.b32 %r247, %f630;
|
|
and.b32 %r248, %r247, -2147483648;
|
|
or.b32 %r249, %r248, 1123811328;
|
|
mov.b32 %f632, %r249;
|
|
selp.f32 %f633, %f632, %f630, %p79;
|
|
mov.f32 %f634, 0fBF317218;
|
|
fma.rn.f32 %f635, %f633, %f634, %f627;
|
|
mov.f32 %f636, 0f3102E308;
|
|
fma.rn.f32 %f637, %f633, %f636, %f635;
|
|
mul.f32 %f638, %f637, 0f3FB8AA3B;
|
|
add.f32 %f639, %f633, 0f4B40007F;
|
|
mov.b32 %r250, %f639;
|
|
shl.b32 %r251, %r250, 23;
|
|
mov.b32 %f640, %r251;
|
|
ex2.approx.ftz.f32 %f641, %f638;
|
|
mul.f32 %f110, %f641, %f640;
|
|
setp.eq.f32 %p80, %f110, 0f7F800000;
|
|
mov.f32 %f1310, 0f7F800000;
|
|
@%p80 bra $L__BB0_65;
|
|
|
|
fma.rn.f32 %f1310, %f110, %f109, %f110;
|
|
|
|
$L__BB0_65:
|
|
setp.lt.f32 %p81, %f81, 0f00000000;
|
|
and.pred %p3, %p81, %p67;
|
|
setp.eq.f32 %p83, %f81, 0f00000000;
|
|
@%p83 bra $L__BB0_69;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_69:
|
|
add.f32 %f646, %f81, %f81;
|
|
selp.f32 %f1312, %f646, 0f00000000, %p67;
|
|
bra.uni $L__BB0_70;
|
|
|
|
$L__BB0_66:
|
|
mov.b32 %r252, %f1310;
|
|
xor.b32 %r253, %r252, -2147483648;
|
|
mov.b32 %f642, %r253;
|
|
selp.f32 %f1312, %f642, %f1310, %p3;
|
|
setp.geu.f32 %p84, %f81, 0f00000000;
|
|
@%p84 bra $L__BB0_70;
|
|
|
|
mov.f32 %f643, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f644, %f643;
|
|
setp.eq.f32 %p85, %f644, 0f3EE66666;
|
|
@%p85 bra $L__BB0_70;
|
|
|
|
mov.f32 %f1312, 0f7FFFFFFF;
|
|
|
|
$L__BB0_70:
|
|
abs.f32 %f1249, %f81;
|
|
add.f32 %f647, %f1249, 0f3EE66666;
|
|
mov.b32 %r254, %f647;
|
|
setp.lt.s32 %p87, %r254, 2139095040;
|
|
@%p87 bra $L__BB0_75;
|
|
|
|
abs.f32 %f1250, %f81;
|
|
setp.gtu.f32 %p88, %f1250, 0f7F800000;
|
|
@%p88 bra $L__BB0_74;
|
|
bra.uni $L__BB0_72;
|
|
|
|
$L__BB0_74:
|
|
add.f32 %f1312, %f81, 0f3EE66666;
|
|
bra.uni $L__BB0_75;
|
|
|
|
$L__BB0_72:
|
|
abs.f32 %f1251, %f81;
|
|
setp.neu.f32 %p89, %f1251, 0f7F800000;
|
|
@%p89 bra $L__BB0_75;
|
|
|
|
selp.f32 %f1312, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_75:
|
|
setp.eq.f32 %p90, %f81, 0f3F800000;
|
|
selp.f32 %f119, 0f3F800000, %f1312, %p90;
|
|
abs.f32 %f120, %f82;
|
|
setp.lt.f32 %p91, %f120, 0f00800000;
|
|
mul.f32 %f649, %f120, 0f4B800000;
|
|
selp.f32 %f650, %f649, %f120, %p91;
|
|
selp.f32 %f651, 0fC3170000, 0fC2FE0000, %p91;
|
|
mov.b32 %r255, %f650;
|
|
and.b32 %r256, %r255, 8388607;
|
|
or.b32 %r257, %r256, 1065353216;
|
|
mov.b32 %f652, %r257;
|
|
shr.u32 %r258, %r255, 23;
|
|
cvt.rn.f32.u32 %f653, %r258;
|
|
add.f32 %f654, %f651, %f653;
|
|
setp.gt.f32 %p92, %f652, 0f3FB504F3;
|
|
mul.f32 %f655, %f652, 0f3F000000;
|
|
add.f32 %f656, %f654, 0f3F800000;
|
|
selp.f32 %f657, %f656, %f654, %p92;
|
|
selp.f32 %f658, %f655, %f652, %p92;
|
|
add.f32 %f659, %f658, 0fBF800000;
|
|
add.f32 %f660, %f658, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f661, %f660;
|
|
add.f32 %f662, %f659, %f659;
|
|
mul.f32 %f663, %f662, %f661;
|
|
mul.f32 %f664, %f663, %f663;
|
|
mov.f32 %f665, 0f3C4CAF63;
|
|
mov.f32 %f666, 0f3B18F0FE;
|
|
fma.rn.f32 %f667, %f666, %f664, %f665;
|
|
mov.f32 %f668, 0f3DAAAABD;
|
|
fma.rn.f32 %f669, %f667, %f664, %f668;
|
|
mul.rn.f32 %f670, %f669, %f664;
|
|
mul.rn.f32 %f671, %f670, %f663;
|
|
sub.f32 %f672, %f659, %f663;
|
|
add.f32 %f673, %f672, %f672;
|
|
neg.f32 %f674, %f663;
|
|
fma.rn.f32 %f675, %f674, %f659, %f673;
|
|
mul.rn.f32 %f676, %f661, %f675;
|
|
add.f32 %f677, %f671, %f663;
|
|
sub.f32 %f678, %f663, %f677;
|
|
add.f32 %f679, %f671, %f678;
|
|
add.f32 %f680, %f676, %f679;
|
|
add.f32 %f681, %f677, %f680;
|
|
sub.f32 %f682, %f677, %f681;
|
|
add.f32 %f683, %f680, %f682;
|
|
mov.f32 %f684, 0f3F317200;
|
|
mul.rn.f32 %f685, %f657, %f684;
|
|
mov.f32 %f686, 0f35BFBE8E;
|
|
mul.rn.f32 %f687, %f657, %f686;
|
|
add.f32 %f688, %f685, %f681;
|
|
sub.f32 %f689, %f685, %f688;
|
|
add.f32 %f690, %f681, %f689;
|
|
add.f32 %f691, %f683, %f690;
|
|
add.f32 %f692, %f687, %f691;
|
|
add.f32 %f693, %f688, %f692;
|
|
sub.f32 %f694, %f688, %f693;
|
|
add.f32 %f695, %f692, %f694;
|
|
mov.f32 %f696, 0f3EE66666;
|
|
mul.rn.f32 %f697, %f696, %f693;
|
|
neg.f32 %f698, %f697;
|
|
fma.rn.f32 %f699, %f696, %f693, %f698;
|
|
fma.rn.f32 %f700, %f696, %f695, %f699;
|
|
mov.f32 %f701, 0f00000000;
|
|
fma.rn.f32 %f702, %f701, %f693, %f700;
|
|
add.rn.f32 %f703, %f697, %f702;
|
|
neg.f32 %f704, %f703;
|
|
add.rn.f32 %f705, %f697, %f704;
|
|
add.rn.f32 %f706, %f705, %f702;
|
|
mov.b32 %r259, %f703;
|
|
setp.eq.s32 %p93, %r259, 1118925336;
|
|
add.s32 %r260, %r259, -1;
|
|
mov.b32 %f707, %r260;
|
|
add.f32 %f708, %f706, 0f37000000;
|
|
selp.f32 %f121, %f708, %f706, %p93;
|
|
selp.f32 %f709, %f707, %f703, %p93;
|
|
mov.f32 %f710, 0f3FB8AA3B;
|
|
mul.rn.f32 %f711, %f709, %f710;
|
|
cvt.rzi.f32.f32 %f712, %f711;
|
|
abs.f32 %f713, %f712;
|
|
setp.gt.f32 %p94, %f713, 0f42FC0000;
|
|
mov.b32 %r261, %f712;
|
|
and.b32 %r262, %r261, -2147483648;
|
|
or.b32 %r263, %r262, 1123811328;
|
|
mov.b32 %f714, %r263;
|
|
selp.f32 %f715, %f714, %f712, %p94;
|
|
mov.f32 %f716, 0fBF317218;
|
|
fma.rn.f32 %f717, %f715, %f716, %f709;
|
|
mov.f32 %f718, 0f3102E308;
|
|
fma.rn.f32 %f719, %f715, %f718, %f717;
|
|
mul.f32 %f720, %f719, 0f3FB8AA3B;
|
|
add.f32 %f721, %f715, 0f4B40007F;
|
|
mov.b32 %r264, %f721;
|
|
shl.b32 %r265, %r264, 23;
|
|
mov.b32 %f722, %r265;
|
|
ex2.approx.ftz.f32 %f723, %f720;
|
|
mul.f32 %f122, %f723, %f722;
|
|
setp.eq.f32 %p95, %f122, 0f7F800000;
|
|
mov.f32 %f1313, 0f7F800000;
|
|
@%p95 bra $L__BB0_77;
|
|
|
|
fma.rn.f32 %f1313, %f122, %f121, %f122;
|
|
|
|
$L__BB0_77:
|
|
setp.lt.f32 %p96, %f82, 0f00000000;
|
|
and.pred %p4, %p96, %p67;
|
|
setp.eq.f32 %p98, %f82, 0f00000000;
|
|
@%p98 bra $L__BB0_81;
|
|
bra.uni $L__BB0_78;
|
|
|
|
$L__BB0_81:
|
|
add.f32 %f728, %f82, %f82;
|
|
selp.f32 %f1315, %f728, 0f00000000, %p67;
|
|
bra.uni $L__BB0_82;
|
|
|
|
$L__BB0_78:
|
|
mov.b32 %r266, %f1313;
|
|
xor.b32 %r267, %r266, -2147483648;
|
|
mov.b32 %f724, %r267;
|
|
selp.f32 %f1315, %f724, %f1313, %p4;
|
|
setp.geu.f32 %p99, %f82, 0f00000000;
|
|
@%p99 bra $L__BB0_82;
|
|
|
|
mov.f32 %f725, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f726, %f725;
|
|
setp.eq.f32 %p100, %f726, 0f3EE66666;
|
|
@%p100 bra $L__BB0_82;
|
|
|
|
mov.f32 %f1315, 0f7FFFFFFF;
|
|
|
|
$L__BB0_82:
|
|
abs.f32 %f1252, %f82;
|
|
add.f32 %f729, %f1252, 0f3EE66666;
|
|
mov.b32 %r268, %f729;
|
|
setp.lt.s32 %p102, %r268, 2139095040;
|
|
@%p102 bra $L__BB0_87;
|
|
|
|
abs.f32 %f1253, %f82;
|
|
setp.gtu.f32 %p103, %f1253, 0f7F800000;
|
|
@%p103 bra $L__BB0_86;
|
|
bra.uni $L__BB0_84;
|
|
|
|
$L__BB0_86:
|
|
add.f32 %f1315, %f82, 0f3EE66666;
|
|
bra.uni $L__BB0_87;
|
|
|
|
$L__BB0_84:
|
|
abs.f32 %f1254, %f82;
|
|
setp.neu.f32 %p104, %f1254, 0f7F800000;
|
|
@%p104 bra $L__BB0_87;
|
|
|
|
selp.f32 %f1315, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_87:
|
|
setp.eq.f32 %p105, %f82, 0f3F800000;
|
|
mov.f32 %f731, 0f3F800000;
|
|
selp.f32 %f732, 0f3F800000, %f1315, %p105;
|
|
min.f32 %f733, %f107, %f731;
|
|
mov.f32 %f734, 0f00000000;
|
|
max.f32 %f131, %f734, %f733;
|
|
min.f32 %f735, %f119, %f731;
|
|
max.f32 %f132, %f734, %f735;
|
|
min.f32 %f736, %f732, %f731;
|
|
max.f32 %f133, %f734, %f736;
|
|
mov.f32 %f740, 0f3ED55555;
|
|
abs.f32 %f135, %f131;
|
|
setp.lt.f32 %p106, %f135, 0f00800000;
|
|
mul.f32 %f742, %f135, 0f4B800000;
|
|
selp.f32 %f743, %f742, %f135, %p106;
|
|
selp.f32 %f744, 0fC3170000, 0fC2FE0000, %p106;
|
|
mov.b32 %r271, %f743;
|
|
and.b32 %r272, %r271, 8388607;
|
|
or.b32 %r273, %r272, 1065353216;
|
|
mov.b32 %f745, %r273;
|
|
shr.u32 %r274, %r271, 23;
|
|
cvt.rn.f32.u32 %f746, %r274;
|
|
add.f32 %f747, %f744, %f746;
|
|
setp.gt.f32 %p107, %f745, 0f3FB504F3;
|
|
mul.f32 %f748, %f745, 0f3F000000;
|
|
add.f32 %f749, %f747, 0f3F800000;
|
|
selp.f32 %f750, %f749, %f747, %p107;
|
|
selp.f32 %f751, %f748, %f745, %p107;
|
|
add.f32 %f752, %f751, 0fBF800000;
|
|
add.f32 %f753, %f751, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f754, %f753;
|
|
add.f32 %f755, %f752, %f752;
|
|
mul.f32 %f756, %f755, %f754;
|
|
mul.f32 %f757, %f756, %f756;
|
|
mov.f32 %f758, 0f3C4CAF63;
|
|
mov.f32 %f759, 0f3B18F0FE;
|
|
fma.rn.f32 %f760, %f759, %f757, %f758;
|
|
mov.f32 %f761, 0f3DAAAABD;
|
|
fma.rn.f32 %f762, %f760, %f757, %f761;
|
|
mul.rn.f32 %f763, %f762, %f757;
|
|
mul.rn.f32 %f764, %f763, %f756;
|
|
sub.f32 %f765, %f752, %f756;
|
|
add.f32 %f766, %f765, %f765;
|
|
neg.f32 %f767, %f756;
|
|
fma.rn.f32 %f768, %f767, %f752, %f766;
|
|
mul.rn.f32 %f769, %f754, %f768;
|
|
add.f32 %f770, %f764, %f756;
|
|
sub.f32 %f771, %f756, %f770;
|
|
add.f32 %f772, %f764, %f771;
|
|
add.f32 %f773, %f769, %f772;
|
|
add.f32 %f774, %f770, %f773;
|
|
sub.f32 %f775, %f770, %f774;
|
|
add.f32 %f776, %f773, %f775;
|
|
mov.f32 %f777, 0f3F317200;
|
|
mul.rn.f32 %f778, %f750, %f777;
|
|
mov.f32 %f779, 0f35BFBE8E;
|
|
mul.rn.f32 %f780, %f750, %f779;
|
|
add.f32 %f781, %f778, %f774;
|
|
sub.f32 %f782, %f778, %f781;
|
|
add.f32 %f783, %f774, %f782;
|
|
add.f32 %f784, %f776, %f783;
|
|
add.f32 %f785, %f780, %f784;
|
|
add.f32 %f786, %f781, %f785;
|
|
sub.f32 %f787, %f781, %f786;
|
|
add.f32 %f788, %f785, %f787;
|
|
mul.rn.f32 %f789, %f740, %f786;
|
|
neg.f32 %f790, %f789;
|
|
fma.rn.f32 %f791, %f740, %f786, %f790;
|
|
fma.rn.f32 %f792, %f740, %f788, %f791;
|
|
fma.rn.f32 %f793, %f734, %f786, %f792;
|
|
add.rn.f32 %f794, %f789, %f793;
|
|
neg.f32 %f795, %f794;
|
|
add.rn.f32 %f796, %f789, %f795;
|
|
add.rn.f32 %f797, %f796, %f793;
|
|
mov.b32 %r275, %f794;
|
|
setp.eq.s32 %p108, %r275, 1118925336;
|
|
add.s32 %r276, %r275, -1;
|
|
mov.b32 %f798, %r276;
|
|
add.f32 %f799, %f797, 0f37000000;
|
|
selp.f32 %f136, %f799, %f797, %p108;
|
|
selp.f32 %f800, %f798, %f794, %p108;
|
|
mov.f32 %f801, 0f3FB8AA3B;
|
|
mul.rn.f32 %f802, %f800, %f801;
|
|
cvt.rzi.f32.f32 %f803, %f802;
|
|
abs.f32 %f804, %f803;
|
|
setp.gt.f32 %p109, %f804, 0f42FC0000;
|
|
mov.b32 %r277, %f803;
|
|
and.b32 %r278, %r277, -2147483648;
|
|
or.b32 %r279, %r278, 1123811328;
|
|
mov.b32 %f805, %r279;
|
|
selp.f32 %f806, %f805, %f803, %p109;
|
|
mov.f32 %f807, 0fBF317218;
|
|
fma.rn.f32 %f808, %f806, %f807, %f800;
|
|
mov.f32 %f809, 0f3102E308;
|
|
fma.rn.f32 %f810, %f806, %f809, %f808;
|
|
mul.f32 %f811, %f810, 0f3FB8AA3B;
|
|
add.f32 %f812, %f806, 0f4B40007F;
|
|
mov.b32 %r280, %f812;
|
|
shl.b32 %r281, %r280, 23;
|
|
mov.b32 %f813, %r281;
|
|
ex2.approx.ftz.f32 %f814, %f811;
|
|
mul.f32 %f137, %f814, %f813;
|
|
setp.eq.f32 %p110, %f137, 0f7F800000;
|
|
mov.f32 %f1316, 0f7F800000;
|
|
@%p110 bra $L__BB0_89;
|
|
|
|
fma.rn.f32 %f1316, %f137, %f136, %f137;
|
|
|
|
$L__BB0_89:
|
|
mov.f32 %f1265, 0f00000000;
|
|
max.f32 %f1264, %f1265, %f733;
|
|
mov.f32 %f1229, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1228, %f1229;
|
|
add.f32 %f1227, %f1228, %f1228;
|
|
mov.f32 %f1226, 0f3ED55555;
|
|
sub.f32 %f1225, %f1226, %f1227;
|
|
abs.f32 %f1224, %f1225;
|
|
setp.lt.f32 %p111, %f1264, 0f00000000;
|
|
setp.eq.f32 %p112, %f1224, 0f3F800000;
|
|
and.pred %p5, %p111, %p112;
|
|
setp.eq.f32 %p113, %f1264, 0f00000000;
|
|
@%p113 bra $L__BB0_93;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_93:
|
|
mov.f32 %f1282, 0f00000000;
|
|
max.f32 %f1281, %f1282, %f733;
|
|
add.f32 %f819, %f1281, %f1281;
|
|
selp.f32 %f1318, %f819, 0f00000000, %p112;
|
|
bra.uni $L__BB0_94;
|
|
|
|
$L__BB0_90:
|
|
mov.f32 %f1267, 0f00000000;
|
|
max.f32 %f1266, %f1267, %f733;
|
|
mov.b32 %r282, %f1316;
|
|
xor.b32 %r283, %r282, -2147483648;
|
|
mov.b32 %f815, %r283;
|
|
selp.f32 %f1318, %f815, %f1316, %p5;
|
|
setp.geu.f32 %p114, %f1266, 0f00000000;
|
|
@%p114 bra $L__BB0_94;
|
|
|
|
mov.f32 %f816, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f817, %f816;
|
|
setp.eq.f32 %p115, %f817, 0f3ED55555;
|
|
@%p115 bra $L__BB0_94;
|
|
|
|
mov.f32 %f1318, 0f7FFFFFFF;
|
|
|
|
$L__BB0_94:
|
|
mov.f32 %f1270, 0f00000000;
|
|
max.f32 %f1269, %f1270, %f733;
|
|
abs.f32 %f1268, %f1269;
|
|
add.f32 %f820, %f1268, 0f3ED55555;
|
|
mov.b32 %r284, %f820;
|
|
setp.lt.s32 %p117, %r284, 2139095040;
|
|
@%p117 bra $L__BB0_99;
|
|
|
|
mov.f32 %f1275, 0f00000000;
|
|
max.f32 %f1274, %f1275, %f733;
|
|
abs.f32 %f1273, %f1274;
|
|
setp.gtu.f32 %p118, %f1273, 0f7F800000;
|
|
@%p118 bra $L__BB0_98;
|
|
bra.uni $L__BB0_96;
|
|
|
|
$L__BB0_98:
|
|
mov.f32 %f1280, 0f00000000;
|
|
max.f32 %f1279, %f1280, %f733;
|
|
add.f32 %f1318, %f1279, 0f3ED55555;
|
|
bra.uni $L__BB0_99;
|
|
|
|
$L__BB0_96:
|
|
mov.f32 %f1278, 0f00000000;
|
|
max.f32 %f1277, %f1278, %f733;
|
|
abs.f32 %f1276, %f1277;
|
|
setp.neu.f32 %p119, %f1276, 0f7F800000;
|
|
@%p119 bra $L__BB0_99;
|
|
|
|
selp.f32 %f1318, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_99:
|
|
abs.f32 %f146, %f132;
|
|
setp.lt.f32 %p120, %f146, 0f00800000;
|
|
mul.f32 %f822, %f146, 0f4B800000;
|
|
selp.f32 %f823, %f822, %f146, %p120;
|
|
selp.f32 %f824, 0fC3170000, 0fC2FE0000, %p120;
|
|
mov.b32 %r285, %f823;
|
|
and.b32 %r286, %r285, 8388607;
|
|
or.b32 %r287, %r286, 1065353216;
|
|
mov.b32 %f825, %r287;
|
|
shr.u32 %r288, %r285, 23;
|
|
cvt.rn.f32.u32 %f826, %r288;
|
|
add.f32 %f827, %f824, %f826;
|
|
setp.gt.f32 %p121, %f825, 0f3FB504F3;
|
|
mul.f32 %f828, %f825, 0f3F000000;
|
|
add.f32 %f829, %f827, 0f3F800000;
|
|
selp.f32 %f830, %f829, %f827, %p121;
|
|
selp.f32 %f831, %f828, %f825, %p121;
|
|
add.f32 %f832, %f831, 0fBF800000;
|
|
add.f32 %f833, %f831, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f834, %f833;
|
|
add.f32 %f835, %f832, %f832;
|
|
mul.f32 %f836, %f835, %f834;
|
|
mul.f32 %f837, %f836, %f836;
|
|
mov.f32 %f838, 0f3C4CAF63;
|
|
mov.f32 %f839, 0f3B18F0FE;
|
|
fma.rn.f32 %f840, %f839, %f837, %f838;
|
|
mov.f32 %f841, 0f3DAAAABD;
|
|
fma.rn.f32 %f842, %f840, %f837, %f841;
|
|
mul.rn.f32 %f843, %f842, %f837;
|
|
mul.rn.f32 %f844, %f843, %f836;
|
|
sub.f32 %f845, %f832, %f836;
|
|
add.f32 %f846, %f845, %f845;
|
|
neg.f32 %f847, %f836;
|
|
fma.rn.f32 %f848, %f847, %f832, %f846;
|
|
mul.rn.f32 %f849, %f834, %f848;
|
|
add.f32 %f850, %f844, %f836;
|
|
sub.f32 %f851, %f836, %f850;
|
|
add.f32 %f852, %f844, %f851;
|
|
add.f32 %f853, %f849, %f852;
|
|
add.f32 %f854, %f850, %f853;
|
|
sub.f32 %f855, %f850, %f854;
|
|
add.f32 %f856, %f853, %f855;
|
|
mov.f32 %f857, 0f3F317200;
|
|
mul.rn.f32 %f858, %f830, %f857;
|
|
mov.f32 %f859, 0f35BFBE8E;
|
|
mul.rn.f32 %f860, %f830, %f859;
|
|
add.f32 %f861, %f858, %f854;
|
|
sub.f32 %f862, %f858, %f861;
|
|
add.f32 %f863, %f854, %f862;
|
|
add.f32 %f864, %f856, %f863;
|
|
add.f32 %f865, %f860, %f864;
|
|
add.f32 %f866, %f861, %f865;
|
|
sub.f32 %f867, %f861, %f866;
|
|
add.f32 %f868, %f865, %f867;
|
|
mov.f32 %f869, 0f3ED55555;
|
|
mul.rn.f32 %f870, %f869, %f866;
|
|
neg.f32 %f871, %f870;
|
|
fma.rn.f32 %f872, %f869, %f866, %f871;
|
|
fma.rn.f32 %f873, %f869, %f868, %f872;
|
|
mov.f32 %f874, 0f00000000;
|
|
fma.rn.f32 %f875, %f874, %f866, %f873;
|
|
add.rn.f32 %f876, %f870, %f875;
|
|
neg.f32 %f877, %f876;
|
|
add.rn.f32 %f878, %f870, %f877;
|
|
add.rn.f32 %f879, %f878, %f875;
|
|
mov.b32 %r289, %f876;
|
|
setp.eq.s32 %p122, %r289, 1118925336;
|
|
add.s32 %r290, %r289, -1;
|
|
mov.b32 %f880, %r290;
|
|
add.f32 %f881, %f879, 0f37000000;
|
|
selp.f32 %f147, %f881, %f879, %p122;
|
|
selp.f32 %f882, %f880, %f876, %p122;
|
|
mov.f32 %f883, 0f3FB8AA3B;
|
|
mul.rn.f32 %f884, %f882, %f883;
|
|
cvt.rzi.f32.f32 %f885, %f884;
|
|
abs.f32 %f886, %f885;
|
|
setp.gt.f32 %p123, %f886, 0f42FC0000;
|
|
mov.b32 %r291, %f885;
|
|
and.b32 %r292, %r291, -2147483648;
|
|
or.b32 %r293, %r292, 1123811328;
|
|
mov.b32 %f887, %r293;
|
|
selp.f32 %f888, %f887, %f885, %p123;
|
|
mov.f32 %f889, 0fBF317218;
|
|
fma.rn.f32 %f890, %f888, %f889, %f882;
|
|
mov.f32 %f891, 0f3102E308;
|
|
fma.rn.f32 %f892, %f888, %f891, %f890;
|
|
mul.f32 %f893, %f892, 0f3FB8AA3B;
|
|
add.f32 %f894, %f888, 0f4B40007F;
|
|
mov.b32 %r294, %f894;
|
|
shl.b32 %r295, %r294, 23;
|
|
mov.b32 %f895, %r295;
|
|
ex2.approx.ftz.f32 %f896, %f893;
|
|
mul.f32 %f148, %f896, %f895;
|
|
setp.eq.f32 %p124, %f148, 0f7F800000;
|
|
mov.f32 %f1319, 0f7F800000;
|
|
@%p124 bra $L__BB0_101;
|
|
|
|
fma.rn.f32 %f1319, %f148, %f147, %f148;
|
|
|
|
$L__BB0_101:
|
|
setp.lt.f32 %p125, %f132, 0f00000000;
|
|
and.pred %p6, %p125, %p112;
|
|
setp.eq.f32 %p127, %f132, 0f00000000;
|
|
@%p127 bra $L__BB0_105;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_105:
|
|
add.f32 %f901, %f132, %f132;
|
|
selp.f32 %f1321, %f901, 0f00000000, %p112;
|
|
bra.uni $L__BB0_106;
|
|
|
|
$L__BB0_102:
|
|
mov.b32 %r296, %f1319;
|
|
xor.b32 %r297, %r296, -2147483648;
|
|
mov.b32 %f897, %r297;
|
|
selp.f32 %f1321, %f897, %f1319, %p6;
|
|
setp.geu.f32 %p128, %f132, 0f00000000;
|
|
@%p128 bra $L__BB0_106;
|
|
|
|
mov.f32 %f898, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f899, %f898;
|
|
setp.eq.f32 %p129, %f899, 0f3ED55555;
|
|
@%p129 bra $L__BB0_106;
|
|
|
|
mov.f32 %f1321, 0f7FFFFFFF;
|
|
|
|
$L__BB0_106:
|
|
mov.f32 %f1257, 0f00000000;
|
|
max.f32 %f1256, %f1257, %f735;
|
|
abs.f32 %f1255, %f1256;
|
|
add.f32 %f902, %f1255, 0f3ED55555;
|
|
mov.b32 %r298, %f902;
|
|
setp.lt.s32 %p131, %r298, 2139095040;
|
|
@%p131 bra $L__BB0_111;
|
|
|
|
mov.f32 %f1260, 0f00000000;
|
|
max.f32 %f1259, %f1260, %f735;
|
|
abs.f32 %f1258, %f1259;
|
|
setp.gtu.f32 %p132, %f1258, 0f7F800000;
|
|
@%p132 bra $L__BB0_110;
|
|
bra.uni $L__BB0_108;
|
|
|
|
$L__BB0_110:
|
|
add.f32 %f1321, %f132, 0f3ED55555;
|
|
bra.uni $L__BB0_111;
|
|
|
|
$L__BB0_108:
|
|
mov.f32 %f1263, 0f00000000;
|
|
max.f32 %f1262, %f1263, %f735;
|
|
abs.f32 %f1261, %f1262;
|
|
setp.neu.f32 %p133, %f1261, 0f7F800000;
|
|
@%p133 bra $L__BB0_111;
|
|
|
|
selp.f32 %f1321, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_111:
|
|
abs.f32 %f157, %f133;
|
|
setp.lt.f32 %p134, %f157, 0f00800000;
|
|
mul.f32 %f904, %f157, 0f4B800000;
|
|
selp.f32 %f905, %f904, %f157, %p134;
|
|
selp.f32 %f906, 0fC3170000, 0fC2FE0000, %p134;
|
|
mov.b32 %r299, %f905;
|
|
and.b32 %r300, %r299, 8388607;
|
|
or.b32 %r301, %r300, 1065353216;
|
|
mov.b32 %f907, %r301;
|
|
shr.u32 %r302, %r299, 23;
|
|
cvt.rn.f32.u32 %f908, %r302;
|
|
add.f32 %f909, %f906, %f908;
|
|
setp.gt.f32 %p135, %f907, 0f3FB504F3;
|
|
mul.f32 %f910, %f907, 0f3F000000;
|
|
add.f32 %f911, %f909, 0f3F800000;
|
|
selp.f32 %f912, %f911, %f909, %p135;
|
|
selp.f32 %f913, %f910, %f907, %p135;
|
|
add.f32 %f914, %f913, 0fBF800000;
|
|
add.f32 %f915, %f913, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f916, %f915;
|
|
add.f32 %f917, %f914, %f914;
|
|
mul.f32 %f918, %f917, %f916;
|
|
mul.f32 %f919, %f918, %f918;
|
|
mov.f32 %f920, 0f3C4CAF63;
|
|
mov.f32 %f921, 0f3B18F0FE;
|
|
fma.rn.f32 %f922, %f921, %f919, %f920;
|
|
mov.f32 %f923, 0f3DAAAABD;
|
|
fma.rn.f32 %f924, %f922, %f919, %f923;
|
|
mul.rn.f32 %f925, %f924, %f919;
|
|
mul.rn.f32 %f926, %f925, %f918;
|
|
sub.f32 %f927, %f914, %f918;
|
|
add.f32 %f928, %f927, %f927;
|
|
neg.f32 %f929, %f918;
|
|
fma.rn.f32 %f930, %f929, %f914, %f928;
|
|
mul.rn.f32 %f931, %f916, %f930;
|
|
add.f32 %f932, %f926, %f918;
|
|
sub.f32 %f933, %f918, %f932;
|
|
add.f32 %f934, %f926, %f933;
|
|
add.f32 %f935, %f931, %f934;
|
|
add.f32 %f936, %f932, %f935;
|
|
sub.f32 %f937, %f932, %f936;
|
|
add.f32 %f938, %f935, %f937;
|
|
mov.f32 %f939, 0f3F317200;
|
|
mul.rn.f32 %f940, %f912, %f939;
|
|
mov.f32 %f941, 0f35BFBE8E;
|
|
mul.rn.f32 %f942, %f912, %f941;
|
|
add.f32 %f943, %f940, %f936;
|
|
sub.f32 %f944, %f940, %f943;
|
|
add.f32 %f945, %f936, %f944;
|
|
add.f32 %f946, %f938, %f945;
|
|
add.f32 %f947, %f942, %f946;
|
|
add.f32 %f948, %f943, %f947;
|
|
sub.f32 %f949, %f943, %f948;
|
|
add.f32 %f950, %f947, %f949;
|
|
mov.f32 %f951, 0f3ED55555;
|
|
mul.rn.f32 %f952, %f951, %f948;
|
|
neg.f32 %f953, %f952;
|
|
fma.rn.f32 %f954, %f951, %f948, %f953;
|
|
fma.rn.f32 %f955, %f951, %f950, %f954;
|
|
mov.f32 %f956, 0f00000000;
|
|
fma.rn.f32 %f957, %f956, %f948, %f955;
|
|
add.rn.f32 %f958, %f952, %f957;
|
|
neg.f32 %f959, %f958;
|
|
add.rn.f32 %f960, %f952, %f959;
|
|
add.rn.f32 %f961, %f960, %f957;
|
|
mov.b32 %r303, %f958;
|
|
setp.eq.s32 %p136, %r303, 1118925336;
|
|
add.s32 %r304, %r303, -1;
|
|
mov.b32 %f962, %r304;
|
|
add.f32 %f963, %f961, 0f37000000;
|
|
selp.f32 %f158, %f963, %f961, %p136;
|
|
selp.f32 %f964, %f962, %f958, %p136;
|
|
mov.f32 %f965, 0f3FB8AA3B;
|
|
mul.rn.f32 %f966, %f964, %f965;
|
|
cvt.rzi.f32.f32 %f967, %f966;
|
|
abs.f32 %f968, %f967;
|
|
setp.gt.f32 %p137, %f968, 0f42FC0000;
|
|
mov.b32 %r305, %f967;
|
|
and.b32 %r306, %r305, -2147483648;
|
|
or.b32 %r307, %r306, 1123811328;
|
|
mov.b32 %f969, %r307;
|
|
selp.f32 %f970, %f969, %f967, %p137;
|
|
mov.f32 %f971, 0fBF317218;
|
|
fma.rn.f32 %f972, %f970, %f971, %f964;
|
|
mov.f32 %f973, 0f3102E308;
|
|
fma.rn.f32 %f974, %f970, %f973, %f972;
|
|
mul.f32 %f975, %f974, 0f3FB8AA3B;
|
|
add.f32 %f976, %f970, 0f4B40007F;
|
|
mov.b32 %r308, %f976;
|
|
shl.b32 %r309, %r308, 23;
|
|
mov.b32 %f977, %r309;
|
|
ex2.approx.ftz.f32 %f978, %f975;
|
|
mul.f32 %f159, %f978, %f977;
|
|
setp.eq.f32 %p138, %f159, 0f7F800000;
|
|
mov.f32 %f1322, 0f7F800000;
|
|
@%p138 bra $L__BB0_113;
|
|
|
|
fma.rn.f32 %f1322, %f159, %f158, %f159;
|
|
|
|
$L__BB0_113:
|
|
setp.lt.f32 %p139, %f133, 0f00000000;
|
|
and.pred %p7, %p139, %p112;
|
|
setp.eq.f32 %p141, %f133, 0f00000000;
|
|
@%p141 bra $L__BB0_117;
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_117:
|
|
add.f32 %f983, %f133, %f133;
|
|
selp.f32 %f1324, %f983, 0f00000000, %p112;
|
|
bra.uni $L__BB0_118;
|
|
|
|
$L__BB0_114:
|
|
mov.b32 %r310, %f1322;
|
|
xor.b32 %r311, %r310, -2147483648;
|
|
mov.b32 %f979, %r311;
|
|
selp.f32 %f1324, %f979, %f1322, %p7;
|
|
setp.geu.f32 %p142, %f133, 0f00000000;
|
|
@%p142 bra $L__BB0_118;
|
|
|
|
mov.f32 %f980, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f981, %f980;
|
|
setp.eq.f32 %p143, %f981, 0f3ED55555;
|
|
@%p143 bra $L__BB0_118;
|
|
|
|
mov.f32 %f1324, 0f7FFFFFFF;
|
|
|
|
$L__BB0_118:
|
|
add.f32 %f984, %f157, 0f3ED55555;
|
|
mov.b32 %r312, %f984;
|
|
setp.lt.s32 %p145, %r312, 2139095040;
|
|
@%p145 bra $L__BB0_123;
|
|
|
|
setp.gtu.f32 %p146, %f157, 0f7F800000;
|
|
@%p146 bra $L__BB0_122;
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_122:
|
|
add.f32 %f1324, %f133, 0f3ED55555;
|
|
bra.uni $L__BB0_123;
|
|
|
|
$L__BB0_120:
|
|
setp.neu.f32 %p147, %f157, 0f7F800000;
|
|
@%p147 bra $L__BB0_123;
|
|
|
|
selp.f32 %f1324, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_123:
|
|
mov.f32 %f1272, 0f00000000;
|
|
max.f32 %f1271, %f1272, %f733;
|
|
ld.const.u64 %rd153, [params+144];
|
|
cvta.to.global.u64 %rd152, %rd153;
|
|
ld.const.u32 %r371, [params+136];
|
|
mad.lo.s32 %r370, %r371, %r4, %r3;
|
|
cvt.u64.u32 %rd151, %r370;
|
|
fma.rn.f32 %f985, %f1318, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p148, %f1271, 0f3F800000;
|
|
mov.f32 %f986, 0f3F800000;
|
|
selp.f32 %f987, 0f3F7FFFFF, %f985, %p148;
|
|
mul.f32 %f988, %f1271, 0f414EB852;
|
|
setp.lt.f32 %p149, %f1271, 0f3B4D2E1C;
|
|
selp.f32 %f989, %f988, %f987, %p149;
|
|
fma.rn.f32 %f990, %f1321, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p150, %f132, 0f3F800000;
|
|
selp.f32 %f991, 0f3F7FFFFF, %f990, %p150;
|
|
mul.f32 %f992, %f132, 0f414EB852;
|
|
setp.lt.f32 %p151, %f132, 0f3B4D2E1C;
|
|
selp.f32 %f993, %f992, %f991, %p151;
|
|
fma.rn.f32 %f994, %f1324, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p152, %f133, 0f3F800000;
|
|
selp.f32 %f995, 0f3F7FFFFF, %f994, %p152;
|
|
mul.f32 %f996, %f133, 0f414EB852;
|
|
setp.lt.f32 %p153, %f133, 0f3B4D2E1C;
|
|
selp.f32 %f997, %f996, %f995, %p153;
|
|
min.f32 %f998, %f989, %f986;
|
|
mov.f32 %f999, 0f00000000;
|
|
max.f32 %f1000, %f999, %f998;
|
|
mul.f32 %f1001, %f1000, 0f43800000;
|
|
cvt.rzi.u32.f32 %r313, %f1001;
|
|
min.u32 %r314, %r313, 255;
|
|
min.f32 %f1002, %f993, %f986;
|
|
max.f32 %f1003, %f999, %f1002;
|
|
mul.f32 %f1004, %f1003, 0f43800000;
|
|
cvt.rzi.u32.f32 %r315, %f1004;
|
|
min.u32 %r316, %r315, 255;
|
|
min.f32 %f1005, %f997, %f986;
|
|
max.f32 %f1006, %f999, %f1005;
|
|
mul.f32 %f1007, %f1006, 0f43800000;
|
|
cvt.rzi.u32.f32 %r317, %f1007;
|
|
min.u32 %r318, %r317, 255;
|
|
shl.b64 %rd81, %rd151, 2;
|
|
add.s64 %rd82, %rd152, %rd81;
|
|
cvt.u16.u32 %rs19, %r318;
|
|
cvt.u16.u32 %rs20, %r316;
|
|
cvt.u16.u32 %rs21, %r314;
|
|
mov.u16 %rs22, 255;
|
|
st.global.v4.u8 [%rd82], {%rs21, %rs20, %rs19, %rs22};
|
|
|
|
$L__BB0_124:
|
|
ld.const.u32 %r372, [params+104];
|
|
and.b32 %r319, %r372, 4;
|
|
setp.eq.s32 %p154, %r319, 0;
|
|
ld.const.u32 %r387, [params+108];
|
|
@%p154 bra $L__BB0_128;
|
|
|
|
setp.eq.s32 %p155, %r387, 0;
|
|
ld.const.u64 %rd83, [params+224];
|
|
cvta.to.global.u64 %rd84, %rd83;
|
|
ld.const.u32 %r320, [params+216];
|
|
mad.lo.s32 %r321, %r320, %r4, %r3;
|
|
mul.wide.u32 %rd85, %r321, 8;
|
|
add.s64 %rd20, %rd84, %rd85;
|
|
@%p155 bra $L__BB0_127;
|
|
|
|
ld.global.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd20];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1008, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1009, %rs31;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1010, %rs32;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1011, %f80, %f1008;
|
|
add.f32 %f1012, %f81, %f1009;
|
|
add.f32 %f1013, %f82, %f1010;
|
|
mov.f32 %f1014, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1013;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1012;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1011;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1014;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd20], {%rs26, %rs27, %rs28, %rs29};
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_127:
|
|
mov.f32 %f1018, 0f3F800000;
|
|
mov.u32 %r387, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f1018;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f82;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f81;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f80;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd20], {%rs34, %rs35, %rs36, %rs37};
|
|
|
|
$L__BB0_128:
|
|
mul.f32 %f168, %f77, 0f403D3C19;
|
|
mul.f32 %f169, %f168, 0f3E906EBB;
|
|
mul.f32 %f170, %f78, 0f403D3C19;
|
|
mul.f32 %f171, %f170, 0f3E906EBB;
|
|
mul.f32 %f172, %f79, 0f403D3C19;
|
|
mul.f32 %f173, %f172, 0f3E906EBB;
|
|
ld.const.u64 %rd86, [params+256];
|
|
cvta.to.global.u64 %rd87, %rd86;
|
|
ld.const.u32 %r323, [params+248];
|
|
mad.lo.s32 %r324, %r323, %r4, %r3;
|
|
mul.wide.u32 %rd88, %r324, 8;
|
|
add.s64 %rd21, %rd87, %rd88;
|
|
setp.eq.s32 %p156, %r387, 0;
|
|
@%p156 bra $L__BB0_130;
|
|
|
|
ld.global.v4.u16 {%rs45, %rs46, %rs47, %rs48}, [%rd21];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1019, %rs45;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1020, %rs46;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1021, %rs47;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1022, %f169, %f1019;
|
|
add.f32 %f1023, %f171, %f1020;
|
|
add.f32 %f1024, %f173, %f1021;
|
|
mov.f32 %f1025, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1024;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1023;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f1022;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs44, %f1025;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd21], {%rs41, %rs42, %rs43, %rs44};
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_130:
|
|
mov.f32 %f1029, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f1029;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f173;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f171;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f169;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd21], {%rs49, %rs50, %rs51, %rs52};
|
|
|
|
$L__BB0_131:
|
|
mul.f32 %f1030, %f219, 0fBEFA2A1C;
|
|
mul.f32 %f174, %f168, %f1030;
|
|
mul.f32 %f175, %f170, %f1030;
|
|
mul.f32 %f176, %f172, %f1030;
|
|
ld.const.u64 %rd89, [params+272];
|
|
cvta.to.global.u64 %rd90, %rd89;
|
|
ld.const.u32 %r325, [params+264];
|
|
mad.lo.s32 %r326, %r325, %r4, %r3;
|
|
mul.wide.u32 %rd91, %r326, 8;
|
|
add.s64 %rd22, %rd90, %rd91;
|
|
@%p156 bra $L__BB0_133;
|
|
|
|
ld.global.v4.u16 {%rs60, %rs61, %rs62, %rs63}, [%rd22];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1031, %rs60;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1032, %rs61;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1033, %rs62;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1034, %f174, %f1031;
|
|
add.f32 %f1035, %f175, %f1032;
|
|
add.f32 %f1036, %f176, %f1033;
|
|
mov.f32 %f1037, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1036;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1035;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1034;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f1037;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd22], {%rs56, %rs57, %rs58, %rs59};
|
|
bra.uni $L__BB0_134;
|
|
|
|
$L__BB0_133:
|
|
mov.f32 %f1041, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f1041;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f176;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f175;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f174;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd22], {%rs64, %rs65, %rs66, %rs67};
|
|
|
|
$L__BB0_134:
|
|
mul.f32 %f1042, %f220, 0fBEFA2A1C;
|
|
mul.f32 %f177, %f168, %f1042;
|
|
mul.f32 %f178, %f170, %f1042;
|
|
mul.f32 %f179, %f172, %f1042;
|
|
ld.const.u64 %rd92, [params+288];
|
|
cvta.to.global.u64 %rd93, %rd92;
|
|
ld.const.u32 %r327, [params+280];
|
|
mad.lo.s32 %r328, %r327, %r4, %r3;
|
|
mul.wide.u32 %rd94, %r328, 8;
|
|
add.s64 %rd23, %rd93, %rd94;
|
|
@%p156 bra $L__BB0_136;
|
|
|
|
ld.global.v4.u16 {%rs75, %rs76, %rs77, %rs78}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1043, %rs75;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1044, %rs76;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1045, %rs77;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1046, %f177, %f1043;
|
|
add.f32 %f1047, %f178, %f1044;
|
|
add.f32 %f1048, %f179, %f1045;
|
|
mov.f32 %f1049, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f1048;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f1047;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1046;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1049;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs71, %rs72, %rs73, %rs74};
|
|
bra.uni $L__BB0_137;
|
|
|
|
$L__BB0_136:
|
|
mov.f32 %f1053, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f1053;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f179;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f178;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f177;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs79, %rs80, %rs81, %rs82};
|
|
|
|
$L__BB0_137:
|
|
mul.f32 %f1054, %f218, 0fBEFA2A1C;
|
|
mul.f32 %f180, %f168, %f1054;
|
|
mul.f32 %f181, %f170, %f1054;
|
|
mul.f32 %f182, %f172, %f1054;
|
|
ld.const.u64 %rd95, [params+304];
|
|
cvta.to.global.u64 %rd96, %rd95;
|
|
ld.const.u32 %r329, [params+296];
|
|
mad.lo.s32 %r330, %r329, %r4, %r3;
|
|
mul.wide.u32 %rd97, %r330, 8;
|
|
add.s64 %rd24, %rd96, %rd97;
|
|
@%p156 bra $L__BB0_139;
|
|
|
|
ld.global.v4.u16 {%rs90, %rs91, %rs92, %rs93}, [%rd24];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1055, %rs90;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1056, %rs91;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1057, %rs92;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1058, %f180, %f1055;
|
|
add.f32 %f1059, %f181, %f1056;
|
|
add.f32 %f1060, %f182, %f1057;
|
|
mov.f32 %f1061, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1060;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f1059;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f1058;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1061;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs86, %rs87, %rs88, %rs89};
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_139:
|
|
mov.f32 %f1065, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f1065;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f182;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f181;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f180;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs94, %rs95, %rs96, %rs97};
|
|
|
|
$L__BB0_140:
|
|
mul.f32 %f1066, %f218, %f219;
|
|
mul.f32 %f1067, %f1066, 0f3F8BD8A1;
|
|
mul.f32 %f183, %f168, %f1067;
|
|
mul.f32 %f184, %f170, %f1067;
|
|
mul.f32 %f185, %f172, %f1067;
|
|
ld.const.u64 %rd98, [params+320];
|
|
cvta.to.global.u64 %rd99, %rd98;
|
|
ld.const.u32 %r331, [params+312];
|
|
mad.lo.s32 %r332, %r331, %r4, %r3;
|
|
mul.wide.u32 %rd100, %r332, 8;
|
|
add.s64 %rd25, %rd99, %rd100;
|
|
@%p156 bra $L__BB0_142;
|
|
|
|
ld.global.v4.u16 {%rs105, %rs106, %rs107, %rs108}, [%rd25];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1068, %rs105;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1069, %rs106;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1070, %rs107;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1071, %f183, %f1068;
|
|
add.f32 %f1072, %f184, %f1069;
|
|
add.f32 %f1073, %f185, %f1070;
|
|
mov.f32 %f1074, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1073;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1072;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f1071;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1074;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd25], {%rs101, %rs102, %rs103, %rs104};
|
|
bra.uni $L__BB0_143;
|
|
|
|
$L__BB0_142:
|
|
mov.f32 %f1078, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1078;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f185;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f184;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f183;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd25], {%rs109, %rs110, %rs111, %rs112};
|
|
|
|
$L__BB0_143:
|
|
mul.f32 %f1079, %f219, %f220;
|
|
mul.f32 %f1080, %f1079, 0f3F8BD8A1;
|
|
mul.f32 %f186, %f168, %f1080;
|
|
mul.f32 %f187, %f170, %f1080;
|
|
mul.f32 %f188, %f172, %f1080;
|
|
ld.const.u64 %rd101, [params+336];
|
|
cvta.to.global.u64 %rd102, %rd101;
|
|
ld.const.u32 %r333, [params+328];
|
|
mad.lo.s32 %r334, %r333, %r4, %r3;
|
|
mul.wide.u32 %rd103, %r334, 8;
|
|
add.s64 %rd26, %rd102, %rd103;
|
|
@%p156 bra $L__BB0_145;
|
|
|
|
ld.global.v4.u16 {%rs120, %rs121, %rs122, %rs123}, [%rd26];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1081, %rs120;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1082, %rs121;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1083, %rs122;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1084, %f186, %f1081;
|
|
add.f32 %f1085, %f187, %f1082;
|
|
add.f32 %f1086, %f188, %f1083;
|
|
mov.f32 %f1087, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs118, %f1086;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs117, %f1085;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f1084;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs119, %f1087;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd26], {%rs116, %rs117, %rs118, %rs119};
|
|
bra.uni $L__BB0_146;
|
|
|
|
$L__BB0_145:
|
|
mov.f32 %f1091, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1091;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f188;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f187;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f186;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd26], {%rs124, %rs125, %rs126, %rs127};
|
|
|
|
$L__BB0_146:
|
|
fma.rn.f32 %f1092, %f220, %f220, 0fBEAAAAAB;
|
|
mul.f32 %f1093, %f1092, 0f3F723881;
|
|
mul.f32 %f189, %f168, %f1093;
|
|
mul.f32 %f190, %f170, %f1093;
|
|
mul.f32 %f191, %f172, %f1093;
|
|
ld.const.u64 %rd104, [params+352];
|
|
cvta.to.global.u64 %rd105, %rd104;
|
|
ld.const.u32 %r335, [params+344];
|
|
mad.lo.s32 %r336, %r335, %r4, %r3;
|
|
mul.wide.u32 %rd106, %r336, 8;
|
|
add.s64 %rd27, %rd105, %rd106;
|
|
@%p156 bra $L__BB0_148;
|
|
|
|
ld.global.v4.u16 {%rs135, %rs136, %rs137, %rs138}, [%rd27];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1094, %rs135;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1095, %rs136;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1096, %rs137;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1097, %f189, %f1094;
|
|
add.f32 %f1098, %f190, %f1095;
|
|
add.f32 %f1099, %f191, %f1096;
|
|
mov.f32 %f1100, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f1099;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1098;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs131, %f1097;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f1100;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd27], {%rs131, %rs132, %rs133, %rs134};
|
|
bra.uni $L__BB0_149;
|
|
|
|
$L__BB0_148:
|
|
mov.f32 %f1104, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f1104;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs141, %f191;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f190;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f189;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd27], {%rs139, %rs140, %rs141, %rs142};
|
|
|
|
$L__BB0_149:
|
|
mul.f32 %f1105, %f218, %f220;
|
|
mul.f32 %f1106, %f1105, 0f3F8BD8A1;
|
|
mul.f32 %f192, %f168, %f1106;
|
|
mul.f32 %f193, %f170, %f1106;
|
|
mul.f32 %f194, %f172, %f1106;
|
|
ld.const.u64 %rd107, [params+368];
|
|
cvta.to.global.u64 %rd108, %rd107;
|
|
ld.const.u32 %r337, [params+360];
|
|
mad.lo.s32 %r338, %r337, %r4, %r3;
|
|
mul.wide.u32 %rd109, %r338, 8;
|
|
add.s64 %rd28, %rd108, %rd109;
|
|
@%p156 bra $L__BB0_151;
|
|
|
|
ld.global.v4.u16 {%rs150, %rs151, %rs152, %rs153}, [%rd28];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1107, %rs150;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1108, %rs151;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1109, %rs152;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1110, %f192, %f1107;
|
|
add.f32 %f1111, %f193, %f1108;
|
|
add.f32 %f1112, %f194, %f1109;
|
|
mov.f32 %f1113, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs148, %f1112;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f1111;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1110;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f1113;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd28], {%rs146, %rs147, %rs148, %rs149};
|
|
bra.uni $L__BB0_152;
|
|
|
|
$L__BB0_151:
|
|
mov.f32 %f1117, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs157, %f1117;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs156, %f194;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs155, %f193;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs154, %f192;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd28], {%rs154, %rs155, %rs156, %rs157};
|
|
|
|
$L__BB0_152:
|
|
mul.f32 %f1118, %f219, %f219;
|
|
mul.f32 %f1119, %f218, %f218;
|
|
sub.f32 %f1120, %f1119, %f1118;
|
|
mul.f32 %f1121, %f1120, 0f3F0BD8A1;
|
|
mul.f32 %f195, %f168, %f1121;
|
|
mul.f32 %f196, %f170, %f1121;
|
|
mul.f32 %f197, %f172, %f1121;
|
|
ld.const.u64 %rd110, [params+384];
|
|
cvta.to.global.u64 %rd111, %rd110;
|
|
ld.const.u32 %r339, [params+376];
|
|
mad.lo.s32 %r340, %r339, %r4, %r3;
|
|
mul.wide.u32 %rd112, %r340, 8;
|
|
add.s64 %rd29, %rd111, %rd112;
|
|
@%p156 bra $L__BB0_154;
|
|
|
|
ld.global.v4.u16 {%rs165, %rs166, %rs167, %rs168}, [%rd29];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1122, %rs165;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1123, %rs166;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1124, %rs167;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1125, %f195, %f1122;
|
|
add.f32 %f1126, %f196, %f1123;
|
|
add.f32 %f1127, %f197, %f1124;
|
|
mov.f32 %f1128, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs163, %f1127;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs162, %f1126;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs161, %f1125;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs164, %f1128;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd29], {%rs161, %rs162, %rs163, %rs164};
|
|
bra.uni $L__BB0_190;
|
|
|
|
$L__BB0_154:
|
|
mov.f32 %f1132, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs172, %f1132;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs171, %f197;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs170, %f196;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs169, %f195;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd29], {%rs169, %rs170, %rs171, %rs172};
|
|
|
|
$L__BB0_190:
|
|
ret;
|
|
|
|
}
|
|
|