3078 lines
95 KiB
Plaintext
3078 lines
95 KiB
Plaintext
//
|
|
// Generated by NVIDIA NVVM Compiler
|
|
//
|
|
// Compiler Build ID: CL-31968024
|
|
// Cuda compilation tools, release 12.0, V12.0.76
|
|
// Based on NVVM 7.0.1
|
|
//
|
|
|
|
.version 8.0
|
|
.target sm_52
|
|
.address_size 64
|
|
|
|
// .globl __raygen__oxMain
|
|
.const .align 16 .b8 params[1184];
|
|
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
|
|
|
|
.visible .entry __raygen__oxMain()
|
|
{
|
|
.local .align 4 .b8 __local_depot0[28];
|
|
.reg .b64 %SP;
|
|
.reg .b64 %SPL;
|
|
.reg .pred %p<202>;
|
|
.reg .b16 %rs<203>;
|
|
.reg .f32 %f<1744>;
|
|
.reg .b32 %r<1541>;
|
|
.reg .f64 %fd<5>;
|
|
.reg .b64 %rd<135>;
|
|
|
|
|
|
mov.u64 %SPL, __local_depot0;
|
|
add.u64 %rd1, %SPL, 0;
|
|
// begin inline asm
|
|
call (%r64), _optix_get_launch_index_x, ();
|
|
// end inline asm
|
|
// begin inline asm
|
|
call (%r65), _optix_get_launch_index_y, ();
|
|
// end inline asm
|
|
// begin inline asm
|
|
call (%r67), _optix_get_launch_dimension_x, ();
|
|
// end inline asm
|
|
// begin inline asm
|
|
call (%r68), _optix_get_launch_dimension_y, ();
|
|
// end inline asm
|
|
ld.const.u64 %rd31, [params+400];
|
|
cvta.to.global.u64 %rd32, %rd31;
|
|
ld.const.u32 %r70, [params+392];
|
|
mad.lo.s32 %r71, %r70, %r65, %r64;
|
|
mul.wide.u32 %rd33, %r71, 4;
|
|
add.s64 %rd2, %rd32, %rd33;
|
|
ld.global.v2.u8 {%rs15, %rs194}, [%rd2];
|
|
or.b16 %rs17, %rs15, %rs194;
|
|
and.b16 %rs18, %rs17, 255;
|
|
setp.eq.s16 %p8, %rs18, 0;
|
|
@%p8 bra $L__BB0_2;
|
|
|
|
ld.global.u8 %rs193, [%rd2+2];
|
|
bra.uni $L__BB0_3;
|
|
|
|
$L__BB0_2:
|
|
ld.global.u8 %rs193, [%rd2+2];
|
|
setp.eq.s16 %p9, %rs193, 0;
|
|
mov.f32 %f1689, 0f00000000;
|
|
mov.u16 %rs194, 0;
|
|
mov.f32 %f1690, %f1689;
|
|
mov.f32 %f1691, %f1689;
|
|
@%p9 bra $L__BB0_4;
|
|
|
|
$L__BB0_3:
|
|
cvt.rn.f32.u16 %f231, %rs15;
|
|
div.rn.f32 %f232, %f231, 0f437F0000;
|
|
fma.rn.f32 %f233, %f232, 0f40000000, 0fBF800000;
|
|
and.b16 %rs21, %rs194, 255;
|
|
cvt.rn.f32.u16 %f234, %rs21;
|
|
div.rn.f32 %f235, %f234, 0f437F0000;
|
|
fma.rn.f32 %f236, %f235, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f237, %rs193;
|
|
div.rn.f32 %f238, %f237, 0f437F0000;
|
|
fma.rn.f32 %f239, %f238, 0f40000000, 0fBF800000;
|
|
mul.f32 %f240, %f236, %f236;
|
|
fma.rn.f32 %f241, %f233, %f233, %f240;
|
|
fma.rn.f32 %f242, %f239, %f239, %f241;
|
|
sqrt.rn.f32 %f243, %f242;
|
|
rcp.rn.f32 %f244, %f243;
|
|
mul.f32 %f1691, %f244, %f239;
|
|
mul.f32 %f1690, %f244, %f236;
|
|
mul.f32 %f1689, %f233, %f244;
|
|
|
|
$L__BB0_4:
|
|
ld.const.v2.u32 {%r72, %r73}, [params];
|
|
add.s32 %r5, %r72, %r64;
|
|
add.s32 %r6, %r73, %r65;
|
|
setp.eq.f32 %p10, %f1689, 0f00000000;
|
|
setp.eq.f32 %p11, %f1690, 0f00000000;
|
|
and.pred %p12, %p10, %p11;
|
|
setp.eq.f32 %p13, %f1691, 0f00000000;
|
|
and.pred %p14, %p13, %p12;
|
|
@%p14 bra $L__BB0_158;
|
|
bra.uni $L__BB0_5;
|
|
|
|
$L__BB0_158:
|
|
ld.const.u32 %r61, [params+104];
|
|
and.b32 %r1509, %r61, 1;
|
|
setp.eq.b32 %p191, %r1509, 1;
|
|
mov.pred %p192, 0;
|
|
xor.pred %p193, %p191, %p192;
|
|
not.pred %p194, %p193;
|
|
@%p194 bra $L__BB0_160;
|
|
|
|
ld.const.u64 %rd107, [params+144];
|
|
cvta.to.global.u64 %rd108, %rd107;
|
|
ld.const.u32 %r1510, [params+136];
|
|
mad.lo.s32 %r1511, %r1510, %r6, %r5;
|
|
mul.wide.u32 %rd109, %r1511, 4;
|
|
add.s64 %rd110, %rd108, %rd109;
|
|
mov.u16 %rs115, 0;
|
|
st.global.v4.u8 [%rd110], {%rs115, %rs115, %rs115, %rs115};
|
|
|
|
$L__BB0_160:
|
|
and.b32 %r1512, %r61, 8;
|
|
setp.eq.s32 %p195, %r1512, 0;
|
|
@%p195 bra $L__BB0_162;
|
|
|
|
ld.const.u64 %rd111, [params+192];
|
|
cvta.to.global.u64 %rd112, %rd111;
|
|
ld.const.u32 %r1513, [params+184];
|
|
mad.lo.s32 %r1514, %r1513, %r6, %r5;
|
|
mov.f32 %f1642, 0f00000000;
|
|
cvt.rzi.u32.f32 %r1515, %f1642;
|
|
mul.wide.u32 %rd113, %r1514, 2;
|
|
add.s64 %rd114, %rd112, %rd113;
|
|
mov.u16 %rs116, 0;
|
|
cvt.u16.u32 %rs117, %r1515;
|
|
st.global.v2.u8 [%rd114], {%rs117, %rs116};
|
|
|
|
$L__BB0_162:
|
|
and.b32 %r1516, %r61, 4;
|
|
setp.eq.s32 %p196, %r1516, 0;
|
|
ld.const.u32 %r1540, [params+108];
|
|
@%p196 bra $L__BB0_166;
|
|
|
|
setp.eq.s32 %p197, %r1540, 0;
|
|
ld.const.u64 %rd115, [params+224];
|
|
cvta.to.global.u64 %rd116, %rd115;
|
|
ld.const.u32 %r1517, [params+216];
|
|
mad.lo.s32 %r1518, %r1517, %r6, %r5;
|
|
mul.wide.u32 %rd117, %r1518, 8;
|
|
add.s64 %rd25, %rd116, %rd117;
|
|
@%p197 bra $L__BB0_165;
|
|
|
|
ld.global.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd25];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1643, %rs124;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1644, %rs125;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1645, %rs126;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1646, %f1643, 0f00000000;
|
|
add.f32 %f1647, %f1644, 0f00000000;
|
|
add.f32 %f1648, %f1645, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f1648;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs122, %f1647;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs121, %f1646;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs128, 0;
|
|
st.global.v4.u16 [%rd25], {%rs121, %rs122, %rs123, %rs128};
|
|
bra.uni $L__BB0_166;
|
|
|
|
$L__BB0_5:
|
|
ld.const.v4.f32 {%f247, %f248, %f249, %f250}, [params+512];
|
|
neg.f32 %f251, %f248;
|
|
neg.f32 %f252, %f249;
|
|
mul.f32 %f253, %f1689, %f247;
|
|
mul.f32 %f254, %f1690, %f251;
|
|
sub.f32 %f255, %f254, %f253;
|
|
mul.f32 %f256, %f1691, %f249;
|
|
sub.f32 %f13, %f255, %f256;
|
|
ld.const.u64 %rd34, [params+432];
|
|
cvta.to.global.u64 %rd35, %rd34;
|
|
ld.const.u32 %r76, [params+424];
|
|
mul.lo.s32 %r77, %r76, %r65;
|
|
add.s32 %r78, %r77, %r64;
|
|
mul.wide.u32 %rd36, %r78, 12;
|
|
add.s64 %rd37, %rd35, %rd36;
|
|
ld.global.f32 %f257, [%rd37];
|
|
mul.f32 %f258, %f257, 0f3456BF95;
|
|
ld.global.f32 %f259, [%rd37+4];
|
|
mul.f32 %f260, %f259, 0f3456BF95;
|
|
ld.global.f32 %f261, [%rd37+8];
|
|
mul.f32 %f262, %f261, 0f3456BF95;
|
|
abs.f32 %f263, %f1689;
|
|
div.rn.f32 %f264, %f258, %f263;
|
|
abs.f32 %f265, %f1690;
|
|
div.rn.f32 %f266, %f260, %f265;
|
|
abs.f32 %f267, %f1691;
|
|
div.rn.f32 %f268, %f262, %f267;
|
|
abs.f32 %f269, %f264;
|
|
abs.f32 %f270, %f266;
|
|
abs.f32 %f271, %f268;
|
|
mov.f32 %f272, 0f38D1B717;
|
|
max.f32 %f273, %f269, %f272;
|
|
max.f32 %f274, %f270, %f272;
|
|
max.f32 %f275, %f271, %f272;
|
|
fma.rn.f32 %f14, %f1689, %f273, %f257;
|
|
fma.rn.f32 %f15, %f1690, %f274, %f259;
|
|
fma.rn.f32 %f16, %f1691, %f275, %f261;
|
|
setp.gt.f32 %p15, %f263, %f267;
|
|
neg.f32 %f276, %f1690;
|
|
selp.f32 %f277, %f276, 0f00000000, %p15;
|
|
mov.f32 %f1702, 0f00000000;
|
|
neg.f32 %f278, %f1691;
|
|
selp.f32 %f279, %f1689, %f278, %p15;
|
|
selp.f32 %f280, 0f00000000, %f1690, %p15;
|
|
mul.f32 %f281, %f279, %f279;
|
|
fma.rn.f32 %f282, %f277, %f277, %f281;
|
|
fma.rn.f32 %f283, %f280, %f280, %f282;
|
|
sqrt.rn.f32 %f284, %f283;
|
|
rcp.rn.f32 %f285, %f284;
|
|
mul.f32 %f17, %f277, %f285;
|
|
mul.f32 %f18, %f279, %f285;
|
|
mul.f32 %f19, %f280, %f285;
|
|
mul.f32 %f286, %f1691, %f18;
|
|
mul.f32 %f287, %f1690, %f19;
|
|
sub.f32 %f20, %f286, %f287;
|
|
mul.f32 %f288, %f1689, %f19;
|
|
mul.f32 %f289, %f1691, %f17;
|
|
sub.f32 %f21, %f288, %f289;
|
|
mul.f32 %f290, %f1690, %f17;
|
|
mul.f32 %f291, %f1689, %f18;
|
|
sub.f32 %f22, %f290, %f291;
|
|
add.s32 %r79, %r67, -1;
|
|
add.s32 %r80, %r64, 1;
|
|
min.u32 %r81, %r80, %r79;
|
|
add.s32 %r82, %r77, %r81;
|
|
mul.wide.u32 %rd38, %r82, 12;
|
|
add.s64 %rd39, %rd35, %rd38;
|
|
ld.global.f32 %f292, [%rd39];
|
|
setp.eq.f32 %p16, %f292, 0f00000000;
|
|
ld.global.f32 %f293, [%rd39+4];
|
|
setp.eq.f32 %p17, %f293, 0f00000000;
|
|
and.pred %p18, %p16, %p17;
|
|
ld.global.f32 %f294, [%rd39+8];
|
|
setp.eq.f32 %p19, %f294, 0f00000000;
|
|
and.pred %p20, %p18, %p19;
|
|
selp.f32 %f295, %f257, %f292, %p20;
|
|
selp.f32 %f296, %f259, %f293, %p20;
|
|
selp.f32 %f297, %f261, %f294, %p20;
|
|
add.s32 %r83, %r68, -1;
|
|
add.s32 %r84, %r65, 1;
|
|
min.u32 %r85, %r84, %r83;
|
|
mad.lo.s32 %r86, %r76, %r85, %r64;
|
|
mul.wide.u32 %rd40, %r86, 12;
|
|
add.s64 %rd41, %rd35, %rd40;
|
|
ld.global.f32 %f298, [%rd41];
|
|
setp.eq.f32 %p21, %f298, 0f00000000;
|
|
ld.global.f32 %f299, [%rd41+4];
|
|
setp.eq.f32 %p22, %f299, 0f00000000;
|
|
and.pred %p23, %p21, %p22;
|
|
ld.global.f32 %f300, [%rd41+8];
|
|
setp.eq.f32 %p24, %f300, 0f00000000;
|
|
and.pred %p25, %p23, %p24;
|
|
selp.f32 %f301, %f257, %f298, %p25;
|
|
selp.f32 %f302, %f259, %f299, %p25;
|
|
selp.f32 %f303, %f261, %f300, %p25;
|
|
sub.f32 %f304, %f295, %f257;
|
|
sub.f32 %f305, %f296, %f259;
|
|
sub.f32 %f306, %f297, %f261;
|
|
sub.f32 %f307, %f301, %f257;
|
|
sub.f32 %f308, %f302, %f259;
|
|
sub.f32 %f309, %f303, %f261;
|
|
abs.f32 %f310, %f304;
|
|
abs.f32 %f311, %f307;
|
|
max.f32 %f312, %f310, %f311;
|
|
abs.f32 %f313, %f305;
|
|
abs.f32 %f314, %f308;
|
|
max.f32 %f315, %f313, %f314;
|
|
abs.f32 %f316, %f306;
|
|
abs.f32 %f317, %f309;
|
|
max.f32 %f318, %f316, %f317;
|
|
max.f32 %f319, %f312, %f315;
|
|
max.f32 %f320, %f319, %f318;
|
|
setp.eq.f32 %p26, %f304, 0f00000000;
|
|
setp.eq.f32 %p27, %f305, 0f00000000;
|
|
and.pred %p28, %p26, %p27;
|
|
setp.eq.f32 %p29, %f306, 0f00000000;
|
|
and.pred %p30, %p29, %p28;
|
|
setp.eq.f32 %p31, %f307, 0f00000000;
|
|
setp.eq.f32 %p32, %f308, 0f00000000;
|
|
and.pred %p33, %p31, %p32;
|
|
setp.eq.f32 %p34, %f309, 0f00000000;
|
|
and.pred %p35, %p34, %p33;
|
|
or.pred %p36, %p30, %p35;
|
|
selp.f32 %f23, 0f00000000, %f320, %p36;
|
|
abs.f32 %f321, %f247;
|
|
abs.f32 %f322, %f249;
|
|
setp.gt.f32 %p37, %f321, %f322;
|
|
selp.f32 %f323, %f251, 0f00000000, %p37;
|
|
selp.f32 %f324, %f247, %f252, %p37;
|
|
selp.f32 %f325, 0f00000000, %f248, %p37;
|
|
mul.f32 %f326, %f324, %f324;
|
|
fma.rn.f32 %f327, %f323, %f323, %f326;
|
|
fma.rn.f32 %f328, %f325, %f325, %f327;
|
|
sqrt.rn.f32 %f329, %f328;
|
|
rcp.rn.f32 %f330, %f329;
|
|
mul.f32 %f24, %f323, %f330;
|
|
mul.f32 %f25, %f324, %f330;
|
|
mul.f32 %f26, %f325, %f330;
|
|
ld.const.u64 %rd42, [params+128];
|
|
cvta.to.global.u64 %rd43, %rd42;
|
|
ld.const.u32 %r87, [params+120];
|
|
mad.lo.s32 %r88, %r87, %r65, %r64;
|
|
mul.wide.u32 %rd44, %r88, 4;
|
|
add.s64 %rd3, %rd43, %rd44;
|
|
ld.const.u32 %r7, [params+540];
|
|
setp.lt.s32 %p38, %r7, 1;
|
|
mov.f32 %f1703, %f1702;
|
|
@%p38 bra $L__BB0_52;
|
|
|
|
cvt.rn.f32.s32 %f333, %r7;
|
|
rcp.rn.f32 %f27, %f333;
|
|
ld.global.u32 %r1531, [%rd3];
|
|
ld.const.f32 %f28, [params+536];
|
|
ld.const.u8 %rs23, [params+104];
|
|
and.b16 %rs24, %rs23, 32;
|
|
setp.eq.s16 %p39, %rs24, 0;
|
|
mov.u32 %r89, 0;
|
|
selp.f32 %f29, 0f3F800000, 0f41200000, %p39;
|
|
mul.f32 %f30, %f14, 0f3456BF95;
|
|
mul.f32 %f31, %f15, 0f3456BF95;
|
|
mul.f32 %f32, %f16, 0f3456BF95;
|
|
ld.const.u64 %rd4, [params+96];
|
|
mul.f32 %f334, %f247, %f25;
|
|
mul.f32 %f335, %f248, %f24;
|
|
sub.f32 %f33, %f335, %f334;
|
|
mul.f32 %f336, %f249, %f24;
|
|
mul.f32 %f337, %f247, %f26;
|
|
sub.f32 %f34, %f337, %f336;
|
|
mul.f32 %f338, %f248, %f26;
|
|
mul.f32 %f339, %f249, %f25;
|
|
sub.f32 %f35, %f339, %f338;
|
|
abs.f32 %f422, %f31;
|
|
abs.f32 %f423, %f30;
|
|
max.f32 %f424, %f423, %f422;
|
|
abs.f32 %f425, %f32;
|
|
max.f32 %f426, %f424, %f425;
|
|
mov.u32 %r1528, %r89;
|
|
|
|
$L__BB0_7:
|
|
mov.u32 %r1530, %r89;
|
|
|
|
$L__BB0_8:
|
|
cvt.rn.f32.s32 %f1688, %r1528;
|
|
mad.lo.s32 %r91, %r1531, 1664525, 1013904223;
|
|
and.b32 %r92, %r91, 16777215;
|
|
cvt.rn.f32.u32 %f340, %r92;
|
|
fma.rn.f32 %f341, %f340, 0f33800000, %f1688;
|
|
mul.f32 %f342, %f27, %f341;
|
|
mad.lo.s32 %r13, %r91, 1664525, 1013904223;
|
|
and.b32 %r93, %r13, 16777215;
|
|
cvt.rn.f32.u32 %f343, %r93;
|
|
cvt.rn.f32.s32 %f344, %r1530;
|
|
fma.rn.f32 %f345, %f343, 0f33800000, %f344;
|
|
mul.f32 %f346, %f27, %f345;
|
|
sqrt.rn.f32 %f41, %f342;
|
|
mul.f32 %f42, %f346, 0f40C90FDB;
|
|
mul.f32 %f347, %f42, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r1538, %f347;
|
|
cvt.rn.f32.s32 %f348, %r1538;
|
|
mov.f32 %f349, 0fBFC90FDA;
|
|
fma.rn.f32 %f350, %f348, %f349, %f42;
|
|
mov.f32 %f351, 0fB3A22168;
|
|
fma.rn.f32 %f352, %f348, %f351, %f350;
|
|
mov.f32 %f353, 0fA7C234C5;
|
|
fma.rn.f32 %f1699, %f348, %f353, %f352;
|
|
abs.f32 %f44, %f42;
|
|
setp.ltu.f32 %p40, %f44, 0f47CE4780;
|
|
add.s64 %rd5, %rd1, 24;
|
|
mov.u32 %r1535, %r1538;
|
|
mov.f32 %f1696, %f1699;
|
|
@%p40 bra $L__BB0_16;
|
|
|
|
setp.eq.f32 %p41, %f44, 0f7F800000;
|
|
@%p41 bra $L__BB0_15;
|
|
bra.uni $L__BB0_10;
|
|
|
|
$L__BB0_15:
|
|
mov.f32 %f356, 0f00000000;
|
|
mul.rn.f32 %f1696, %f42, %f356;
|
|
mov.u32 %r1535, 0;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_10:
|
|
mov.b32 %r15, %f42;
|
|
bfe.u32 %r95, %r15, 23, 8;
|
|
add.s32 %r16, %r95, -128;
|
|
shl.b32 %r96, %r15, 8;
|
|
or.b32 %r17, %r96, -2147483648;
|
|
shr.u32 %r18, %r16, 5;
|
|
mov.u64 %rd132, 0;
|
|
mov.u32 %r1532, 0;
|
|
mov.u64 %rd131, __cudart_i2opi_f;
|
|
mov.u64 %rd130, %rd1;
|
|
|
|
$L__BB0_11:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r97, [%rd131];
|
|
mad.wide.u32 %rd47, %r97, %r17, %rd132;
|
|
shr.u64 %rd132, %rd47, 32;
|
|
st.local.u32 [%rd130], %rd47;
|
|
add.s64 %rd131, %rd131, 4;
|
|
add.s64 %rd130, %rd130, 4;
|
|
add.s32 %r1532, %r1532, 1;
|
|
setp.ne.s32 %p42, %r1532, 6;
|
|
@%p42 bra $L__BB0_11;
|
|
|
|
st.local.u32 [%rd5], %rd132;
|
|
mov.u32 %r98, 4;
|
|
sub.s32 %r21, %r98, %r18;
|
|
mov.u32 %r99, 6;
|
|
sub.s32 %r100, %r99, %r18;
|
|
mul.wide.s32 %rd48, %r100, 4;
|
|
add.s64 %rd49, %rd1, %rd48;
|
|
ld.local.u32 %r1533, [%rd49];
|
|
ld.local.u32 %r1534, [%rd49+-4];
|
|
and.b32 %r24, %r16, 31;
|
|
setp.eq.s32 %p43, %r24, 0;
|
|
@%p43 bra $L__BB0_14;
|
|
|
|
mov.u32 %r101, 32;
|
|
sub.s32 %r102, %r101, %r24;
|
|
shr.u32 %r103, %r1534, %r102;
|
|
shl.b32 %r104, %r1533, %r24;
|
|
add.s32 %r1533, %r103, %r104;
|
|
mul.wide.s32 %rd50, %r21, 4;
|
|
add.s64 %rd51, %rd1, %rd50;
|
|
ld.local.u32 %r105, [%rd51];
|
|
shr.u32 %r106, %r105, %r102;
|
|
shl.b32 %r107, %r1534, %r24;
|
|
add.s32 %r1534, %r106, %r107;
|
|
|
|
$L__BB0_14:
|
|
and.b32 %r108, %r15, -2147483648;
|
|
shr.u32 %r109, %r1534, 30;
|
|
shl.b32 %r110, %r1533, 2;
|
|
or.b32 %r111, %r109, %r110;
|
|
shr.u32 %r112, %r111, 31;
|
|
shr.u32 %r113, %r1533, 30;
|
|
add.s32 %r114, %r112, %r113;
|
|
neg.s32 %r115, %r114;
|
|
setp.eq.s32 %p44, %r108, 0;
|
|
selp.b32 %r1535, %r114, %r115, %p44;
|
|
setp.ne.s32 %p45, %r112, 0;
|
|
xor.b32 %r116, %r108, -2147483648;
|
|
selp.b32 %r117, %r116, %r108, %p45;
|
|
selp.b32 %r118, -1, 0, %p45;
|
|
xor.b32 %r119, %r111, %r118;
|
|
shl.b32 %r120, %r1534, 2;
|
|
xor.b32 %r121, %r120, %r118;
|
|
cvt.u64.u32 %rd52, %r119;
|
|
cvt.u64.u32 %rd53, %r121;
|
|
bfi.b64 %rd54, %rd52, %rd53, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd54;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f354, %fd2;
|
|
setp.eq.s32 %p46, %r117, 0;
|
|
neg.f32 %f355, %f354;
|
|
selp.f32 %f1696, %f354, %f355, %p46;
|
|
|
|
$L__BB0_16:
|
|
add.s32 %r31, %r1535, 1;
|
|
and.b32 %r32, %r31, 1;
|
|
setp.eq.s32 %p47, %r32, 0;
|
|
selp.f32 %f48, %f1696, 0f3F800000, %p47;
|
|
mul.rn.f32 %f49, %f1696, %f1696;
|
|
mov.f32 %f1697, 0fB94D4153;
|
|
@%p47 bra $L__BB0_18;
|
|
|
|
mov.f32 %f358, 0fBAB607ED;
|
|
mov.f32 %f359, 0f37CBAC00;
|
|
fma.rn.f32 %f1697, %f359, %f49, %f358;
|
|
|
|
$L__BB0_18:
|
|
selp.f32 %f360, 0f3C0885E4, 0f3D2AAABB, %p47;
|
|
fma.rn.f32 %f361, %f1697, %f49, %f360;
|
|
selp.f32 %f362, 0fBE2AAAA8, 0fBEFFFFFF, %p47;
|
|
fma.rn.f32 %f363, %f361, %f49, %f362;
|
|
mov.f32 %f364, 0f00000000;
|
|
fma.rn.f32 %f365, %f49, %f48, %f364;
|
|
fma.rn.f32 %f1698, %f363, %f365, %f48;
|
|
and.b32 %r123, %r31, 2;
|
|
setp.eq.s32 %p49, %r123, 0;
|
|
@%p49 bra $L__BB0_20;
|
|
|
|
mov.f32 %f367, 0fBF800000;
|
|
fma.rn.f32 %f1698, %f1698, %f367, %f364;
|
|
|
|
$L__BB0_20:
|
|
@%p40 bra $L__BB0_28;
|
|
|
|
setp.eq.f32 %p51, %f44, 0f7F800000;
|
|
@%p51 bra $L__BB0_27;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f370, 0f00000000;
|
|
mul.rn.f32 %f1699, %f42, %f370;
|
|
mov.u32 %r1538, 0;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_22:
|
|
mov.b32 %r33, %f42;
|
|
bfe.u32 %r124, %r33, 23, 8;
|
|
add.s32 %r34, %r124, -128;
|
|
shl.b32 %r125, %r33, 8;
|
|
or.b32 %r35, %r125, -2147483648;
|
|
shr.u32 %r36, %r34, 5;
|
|
mov.u64 %rd133, 0;
|
|
mov.u64 %rd134, %rd133;
|
|
|
|
$L__BB0_23:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd57, %rd133, 2;
|
|
mov.u64 %rd58, __cudart_i2opi_f;
|
|
add.s64 %rd59, %rd58, %rd57;
|
|
ld.global.nc.u32 %r126, [%rd59];
|
|
mad.wide.u32 %rd60, %r126, %r35, %rd134;
|
|
shr.u64 %rd134, %rd60, 32;
|
|
add.s64 %rd61, %rd1, %rd57;
|
|
st.local.u32 [%rd61], %rd60;
|
|
cvt.u32.u64 %r127, %rd133;
|
|
add.s32 %r128, %r127, 1;
|
|
cvt.s64.s32 %rd133, %r128;
|
|
setp.ne.s32 %p52, %r128, 6;
|
|
@%p52 bra $L__BB0_23;
|
|
|
|
st.local.u32 [%rd5], %rd134;
|
|
mov.u32 %r129, 4;
|
|
sub.s32 %r37, %r129, %r36;
|
|
mov.u32 %r130, 6;
|
|
sub.s32 %r131, %r130, %r36;
|
|
mul.wide.s32 %rd62, %r131, 4;
|
|
add.s64 %rd63, %rd1, %rd62;
|
|
ld.local.u32 %r1536, [%rd63];
|
|
ld.local.u32 %r1537, [%rd63+-4];
|
|
and.b32 %r40, %r34, 31;
|
|
setp.eq.s32 %p53, %r40, 0;
|
|
@%p53 bra $L__BB0_26;
|
|
|
|
mov.u32 %r132, 32;
|
|
sub.s32 %r133, %r132, %r40;
|
|
shr.u32 %r134, %r1537, %r133;
|
|
shl.b32 %r135, %r1536, %r40;
|
|
add.s32 %r1536, %r134, %r135;
|
|
mul.wide.s32 %rd64, %r37, 4;
|
|
add.s64 %rd65, %rd1, %rd64;
|
|
ld.local.u32 %r136, [%rd65];
|
|
shr.u32 %r137, %r136, %r133;
|
|
shl.b32 %r138, %r1537, %r40;
|
|
add.s32 %r1537, %r137, %r138;
|
|
|
|
$L__BB0_26:
|
|
and.b32 %r139, %r33, -2147483648;
|
|
shr.u32 %r140, %r1537, 30;
|
|
shl.b32 %r141, %r1536, 2;
|
|
or.b32 %r142, %r140, %r141;
|
|
shr.u32 %r143, %r142, 31;
|
|
shr.u32 %r144, %r1536, 30;
|
|
add.s32 %r145, %r143, %r144;
|
|
neg.s32 %r146, %r145;
|
|
setp.eq.s32 %p54, %r139, 0;
|
|
selp.b32 %r1538, %r145, %r146, %p54;
|
|
setp.ne.s32 %p55, %r143, 0;
|
|
xor.b32 %r147, %r139, -2147483648;
|
|
selp.b32 %r148, %r147, %r139, %p55;
|
|
selp.b32 %r149, -1, 0, %p55;
|
|
xor.b32 %r150, %r142, %r149;
|
|
shl.b32 %r151, %r1537, 2;
|
|
xor.b32 %r152, %r151, %r149;
|
|
cvt.u64.u32 %rd66, %r150;
|
|
cvt.u64.u32 %rd67, %r152;
|
|
bfi.b64 %rd68, %rd66, %rd67, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd68;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f368, %fd4;
|
|
setp.eq.s32 %p56, %r148, 0;
|
|
neg.f32 %f369, %f368;
|
|
selp.f32 %f1699, %f368, %f369, %p56;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f58, %f41, %f1698;
|
|
and.b32 %r47, %r1538, 1;
|
|
setp.eq.s32 %p57, %r47, 0;
|
|
selp.f32 %f59, %f1699, 0f3F800000, %p57;
|
|
mul.rn.f32 %f60, %f1699, %f1699;
|
|
mov.f32 %f1700, 0fB94D4153;
|
|
@%p57 bra $L__BB0_30;
|
|
|
|
mov.f32 %f372, 0fBAB607ED;
|
|
mov.f32 %f373, 0f37CBAC00;
|
|
fma.rn.f32 %f1700, %f373, %f60, %f372;
|
|
|
|
$L__BB0_30:
|
|
selp.f32 %f374, 0f3C0885E4, 0f3D2AAABB, %p57;
|
|
fma.rn.f32 %f375, %f1700, %f60, %f374;
|
|
selp.f32 %f376, 0fBE2AAAA8, 0fBEFFFFFF, %p57;
|
|
fma.rn.f32 %f377, %f375, %f60, %f376;
|
|
mov.f32 %f378, 0f00000000;
|
|
fma.rn.f32 %f379, %f60, %f59, %f378;
|
|
fma.rn.f32 %f1701, %f377, %f379, %f59;
|
|
and.b32 %r154, %r1538, 2;
|
|
setp.eq.s32 %p59, %r154, 0;
|
|
@%p59 bra $L__BB0_32;
|
|
|
|
mov.f32 %f381, 0fBF800000;
|
|
fma.rn.f32 %f1701, %f1701, %f381, %f378;
|
|
|
|
$L__BB0_32:
|
|
mul.f32 %f391, %f58, %f58;
|
|
mov.f32 %f392, 0f3F800000;
|
|
sub.f32 %f393, %f392, %f391;
|
|
mul.f32 %f394, %f41, %f1701;
|
|
mul.f32 %f395, %f394, %f394;
|
|
sub.f32 %f396, %f393, %f395;
|
|
max.f32 %f397, %f378, %f396;
|
|
sqrt.rn.f32 %f398, %f397;
|
|
mul.f32 %f399, %f24, %f394;
|
|
mul.f32 %f400, %f25, %f394;
|
|
mul.f32 %f401, %f26, %f394;
|
|
fma.rn.f32 %f402, %f35, %f58, %f399;
|
|
fma.rn.f32 %f403, %f34, %f58, %f400;
|
|
fma.rn.f32 %f404, %f33, %f58, %f401;
|
|
fma.rn.f32 %f405, %f247, %f398, %f402;
|
|
fma.rn.f32 %f406, %f248, %f398, %f403;
|
|
fma.rn.f32 %f407, %f249, %f398, %f404;
|
|
add.f32 %f408, %f247, %f405;
|
|
add.f32 %f409, %f248, %f406;
|
|
add.f32 %f410, %f249, %f407;
|
|
mul.f32 %f411, %f28, %f408;
|
|
mul.f32 %f412, %f28, %f409;
|
|
mul.f32 %f413, %f28, %f410;
|
|
sub.f32 %f414, %f411, %f247;
|
|
sub.f32 %f415, %f412, %f248;
|
|
sub.f32 %f416, %f413, %f249;
|
|
mul.f32 %f417, %f415, %f415;
|
|
fma.rn.f32 %f418, %f414, %f414, %f417;
|
|
fma.rn.f32 %f419, %f416, %f416, %f418;
|
|
sqrt.rn.f32 %f420, %f419;
|
|
rcp.rn.f32 %f421, %f420;
|
|
mul.f32 %f66, %f421, %f414;
|
|
mul.f32 %f67, %f421, %f415;
|
|
mul.f32 %f68, %f421, %f416;
|
|
mov.f32 %f427, 0f38D1B717;
|
|
max.f32 %f428, %f426, %f427;
|
|
mul.f32 %f388, %f29, %f428;
|
|
mad.lo.s32 %r226, %r13, 1664525, 1013904223;
|
|
and.b32 %r227, %r226, 16777215;
|
|
cvt.rn.f32.u32 %f429, %r227;
|
|
mul.f32 %f430, %f429, 0f33800000;
|
|
fma.rn.f32 %f431, %f430, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r48, %r226, 1664525, 1013904223;
|
|
and.b32 %r228, %r48, 16777215;
|
|
cvt.rn.f32.u32 %f432, %r228;
|
|
mul.f32 %f433, %f432, 0f33800000;
|
|
fma.rn.f32 %f434, %f433, 0f40000000, 0fBF800000;
|
|
mul.f32 %f435, %f17, %f434;
|
|
mul.f32 %f436, %f18, %f434;
|
|
mul.f32 %f437, %f19, %f434;
|
|
fma.rn.f32 %f438, %f20, %f431, %f435;
|
|
fma.rn.f32 %f439, %f21, %f431, %f436;
|
|
fma.rn.f32 %f440, %f22, %f431, %f437;
|
|
mul.f32 %f441, %f439, %f439;
|
|
fma.rn.f32 %f442, %f438, %f438, %f441;
|
|
fma.rn.f32 %f443, %f440, %f440, %f442;
|
|
sqrt.rn.f32 %f444, %f443;
|
|
rcp.rn.f32 %f445, %f444;
|
|
mul.f32 %f446, %f438, %f445;
|
|
mul.f32 %f447, %f439, %f445;
|
|
mul.f32 %f448, %f440, %f445;
|
|
mul.f32 %f449, %f1690, %f448;
|
|
mul.f32 %f450, %f1691, %f447;
|
|
sub.f32 %f451, %f449, %f450;
|
|
mul.f32 %f452, %f1691, %f446;
|
|
mul.f32 %f453, %f1689, %f448;
|
|
sub.f32 %f454, %f452, %f453;
|
|
mul.f32 %f455, %f1689, %f447;
|
|
mul.f32 %f456, %f1690, %f446;
|
|
sub.f32 %f457, %f455, %f456;
|
|
mul.f32 %f458, %f446, 0f3E24A490;
|
|
mul.f32 %f459, %f447, 0f3E24A490;
|
|
mul.f32 %f460, %f448, 0f3E24A490;
|
|
fma.rn.f32 %f461, %f23, %f458, %f14;
|
|
fma.rn.f32 %f462, %f23, %f459, %f15;
|
|
fma.rn.f32 %f463, %f23, %f460, %f16;
|
|
mul.f32 %f464, %f451, 0fBECECEDE;
|
|
mul.f32 %f465, %f454, 0fBECECEDE;
|
|
mul.f32 %f466, %f457, 0fBECECEDE;
|
|
fma.rn.f32 %f70, %f23, %f464, %f461;
|
|
fma.rn.f32 %f71, %f23, %f465, %f462;
|
|
fma.rn.f32 %f72, %f23, %f466, %f463;
|
|
sub.f32 %f467, %f70, %f14;
|
|
sub.f32 %f468, %f71, %f15;
|
|
sub.f32 %f469, %f72, %f16;
|
|
mul.f32 %f470, %f468, %f468;
|
|
fma.rn.f32 %f471, %f467, %f467, %f470;
|
|
fma.rn.f32 %f472, %f469, %f469, %f471;
|
|
sqrt.rn.f32 %f389, %f472;
|
|
rcp.rn.f32 %f473, %f389;
|
|
mul.f32 %f385, %f473, %f467;
|
|
mul.f32 %f386, %f473, %f468;
|
|
mul.f32 %f387, %f473, %f469;
|
|
mov.u32 %r191, 2;
|
|
mov.u32 %r193, 1;
|
|
mov.u32 %r194, 1065353216;
|
|
mov.u32 %r225, 0;
|
|
// begin inline asm
|
|
call(%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166,%r167,%r168,%r169,%r170,%r171,%r172,%r173,%r174,%r175,%r176,%r177,%r178,%r179,%r180,%r181,%r182,%r183,%r184,%r185,%r186),_optix_trace_typed_32,(%r225,%rd4,%f14,%f15,%f16,%f385,%f386,%f387,%f388,%f389,%f378,%r193,%r225,%r193,%r191,%r193,%r193,%r194,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225);
|
|
// end inline asm
|
|
mov.b32 %f474, %r155;
|
|
setp.neu.f32 %p60, %f474, 0f3F800000;
|
|
mov.u16 %rs196, 0;
|
|
@%p60 bra $L__BB0_34;
|
|
|
|
mov.f32 %f482, 0f6C4ECB8F;
|
|
mov.f32 %f483, 0f00000000;
|
|
// begin inline asm
|
|
call(%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260),_optix_trace_typed_32,(%r225,%rd4,%f70,%f71,%f72,%f66,%f67,%f68,%f388,%f482,%f483,%r193,%r225,%r193,%r191,%r193,%r193,%r194,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225);
|
|
// end inline asm
|
|
mov.b32 %f484, %r229;
|
|
add.f32 %f1702, %f1702, %f484;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_34:
|
|
mad.lo.s32 %r371, %r48, 1664525, 1013904223;
|
|
and.b32 %r372, %r371, 16777215;
|
|
cvt.rn.f32.u32 %f494, %r372;
|
|
mul.f32 %f495, %f494, 0f33800000;
|
|
fma.rn.f32 %f496, %f495, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r49, %r371, 1664525, 1013904223;
|
|
and.b32 %r373, %r49, 16777215;
|
|
cvt.rn.f32.u32 %f497, %r373;
|
|
mul.f32 %f498, %f497, 0f33800000;
|
|
fma.rn.f32 %f499, %f498, 0f40000000, 0fBF800000;
|
|
mul.f32 %f500, %f17, %f499;
|
|
mul.f32 %f501, %f18, %f499;
|
|
mul.f32 %f502, %f19, %f499;
|
|
fma.rn.f32 %f503, %f20, %f496, %f500;
|
|
fma.rn.f32 %f504, %f21, %f496, %f501;
|
|
fma.rn.f32 %f505, %f22, %f496, %f502;
|
|
mul.f32 %f506, %f504, %f504;
|
|
fma.rn.f32 %f507, %f503, %f503, %f506;
|
|
fma.rn.f32 %f508, %f505, %f505, %f507;
|
|
sqrt.rn.f32 %f509, %f508;
|
|
rcp.rn.f32 %f510, %f509;
|
|
mul.f32 %f511, %f503, %f510;
|
|
mul.f32 %f512, %f504, %f510;
|
|
mul.f32 %f513, %f505, %f510;
|
|
mul.f32 %f514, %f1690, %f513;
|
|
mul.f32 %f515, %f1691, %f512;
|
|
sub.f32 %f516, %f514, %f515;
|
|
mul.f32 %f517, %f1691, %f511;
|
|
mul.f32 %f518, %f1689, %f513;
|
|
sub.f32 %f519, %f517, %f518;
|
|
mul.f32 %f520, %f1689, %f512;
|
|
mul.f32 %f521, %f1690, %f511;
|
|
sub.f32 %f522, %f520, %f521;
|
|
mul.f32 %f523, %f511, 0fBE24A490;
|
|
mul.f32 %f524, %f512, 0fBE24A490;
|
|
mul.f32 %f525, %f513, 0fBE24A490;
|
|
fma.rn.f32 %f526, %f23, %f523, %f14;
|
|
fma.rn.f32 %f527, %f23, %f524, %f15;
|
|
fma.rn.f32 %f528, %f23, %f525, %f16;
|
|
mul.f32 %f529, %f516, 0f3ECACABC;
|
|
mul.f32 %f530, %f519, 0f3ECACABC;
|
|
mul.f32 %f531, %f522, 0f3ECACABC;
|
|
fma.rn.f32 %f77, %f23, %f529, %f526;
|
|
fma.rn.f32 %f78, %f23, %f530, %f527;
|
|
fma.rn.f32 %f79, %f23, %f531, %f528;
|
|
sub.f32 %f532, %f77, %f14;
|
|
sub.f32 %f533, %f78, %f15;
|
|
sub.f32 %f534, %f79, %f16;
|
|
mul.f32 %f535, %f533, %f533;
|
|
fma.rn.f32 %f536, %f532, %f532, %f535;
|
|
fma.rn.f32 %f537, %f534, %f534, %f536;
|
|
sqrt.rn.f32 %f492, %f537;
|
|
rcp.rn.f32 %f538, %f492;
|
|
mul.f32 %f488, %f538, %f532;
|
|
mul.f32 %f489, %f538, %f533;
|
|
mul.f32 %f490, %f538, %f534;
|
|
mov.f32 %f493, 0f00000000;
|
|
// begin inline asm
|
|
call(%r300,%r301,%r302,%r303,%r304,%r305,%r306,%r307,%r308,%r309,%r310,%r311,%r312,%r313,%r314,%r315,%r316,%r317,%r318,%r319,%r320,%r321,%r322,%r323,%r324,%r325,%r326,%r327,%r328,%r329,%r330,%r331),_optix_trace_typed_32,(%r225,%rd4,%f14,%f15,%f16,%f488,%f489,%f490,%f388,%f492,%f493,%r193,%r225,%r193,%r191,%r193,%r193,%r194,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225,%r225);
|
|
// end inline asm
|
|
mov.b32 %f539, %r300;
|
|
setp.neu.f32 %p61, %f539, 0f3F800000;
|
|
@%p61 bra $L__BB0_36;
|
|
|
|
mov.f32 %f547, 0f6C4ECB8F;
|
|
mov.u32 %r410, 2;
|
|
mov.u32 %r412, 1;
|
|
mov.u32 %r413, 1065353216;
|
|
mov.u32 %r444, 0;
|
|
// begin inline asm
|
|
call(%r374,%r375,%r376,%r377,%r378,%r379,%r380,%r381,%r382,%r383,%r384,%r385,%r386,%r387,%r388,%r389,%r390,%r391,%r392,%r393,%r394,%r395,%r396,%r397,%r398,%r399,%r400,%r401,%r402,%r403,%r404,%r405),_optix_trace_typed_32,(%r444,%rd4,%f77,%f78,%f79,%f66,%f67,%f68,%f388,%f547,%f493,%r412,%r444,%r412,%r410,%r412,%r412,%r413,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444,%r444);
|
|
// end inline asm
|
|
mov.b32 %f549, %r374;
|
|
add.f32 %f1702, %f1702, %f549;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_36:
|
|
mad.lo.s32 %r516, %r49, 1664525, 1013904223;
|
|
and.b32 %r517, %r516, 16777215;
|
|
cvt.rn.f32.u32 %f559, %r517;
|
|
mul.f32 %f560, %f559, 0f33800000;
|
|
fma.rn.f32 %f561, %f560, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r50, %r516, 1664525, 1013904223;
|
|
and.b32 %r518, %r50, 16777215;
|
|
cvt.rn.f32.u32 %f562, %r518;
|
|
mul.f32 %f563, %f562, 0f33800000;
|
|
fma.rn.f32 %f564, %f563, 0f40000000, 0fBF800000;
|
|
mul.f32 %f565, %f17, %f564;
|
|
mul.f32 %f566, %f18, %f564;
|
|
mul.f32 %f567, %f19, %f564;
|
|
fma.rn.f32 %f568, %f20, %f561, %f565;
|
|
fma.rn.f32 %f569, %f21, %f561, %f566;
|
|
fma.rn.f32 %f570, %f22, %f561, %f567;
|
|
mul.f32 %f571, %f569, %f569;
|
|
fma.rn.f32 %f572, %f568, %f568, %f571;
|
|
fma.rn.f32 %f573, %f570, %f570, %f572;
|
|
sqrt.rn.f32 %f574, %f573;
|
|
rcp.rn.f32 %f575, %f574;
|
|
mul.f32 %f576, %f568, %f575;
|
|
mul.f32 %f577, %f569, %f575;
|
|
mul.f32 %f578, %f570, %f575;
|
|
mul.f32 %f579, %f1690, %f578;
|
|
mul.f32 %f580, %f1691, %f577;
|
|
sub.f32 %f581, %f579, %f580;
|
|
mul.f32 %f582, %f1691, %f576;
|
|
mul.f32 %f583, %f1689, %f578;
|
|
sub.f32 %f584, %f582, %f583;
|
|
mul.f32 %f585, %f1689, %f577;
|
|
mul.f32 %f586, %f1690, %f576;
|
|
sub.f32 %f587, %f585, %f586;
|
|
mul.f32 %f588, %f576, 0f3F23A3A8;
|
|
mul.f32 %f589, %f577, 0f3F23A3A8;
|
|
mul.f32 %f590, %f578, 0f3F23A3A8;
|
|
fma.rn.f32 %f591, %f23, %f588, %f14;
|
|
fma.rn.f32 %f592, %f23, %f589, %f15;
|
|
fma.rn.f32 %f593, %f23, %f590, %f16;
|
|
mul.f32 %f594, %f581, 0f3E24A490;
|
|
mul.f32 %f595, %f584, 0f3E24A490;
|
|
mul.f32 %f596, %f587, 0f3E24A490;
|
|
fma.rn.f32 %f84, %f23, %f594, %f591;
|
|
fma.rn.f32 %f85, %f23, %f595, %f592;
|
|
fma.rn.f32 %f86, %f23, %f596, %f593;
|
|
sub.f32 %f597, %f84, %f14;
|
|
sub.f32 %f598, %f85, %f15;
|
|
sub.f32 %f599, %f86, %f16;
|
|
mul.f32 %f600, %f598, %f598;
|
|
fma.rn.f32 %f601, %f597, %f597, %f600;
|
|
fma.rn.f32 %f602, %f599, %f599, %f601;
|
|
sqrt.rn.f32 %f557, %f602;
|
|
rcp.rn.f32 %f603, %f557;
|
|
mul.f32 %f553, %f603, %f597;
|
|
mul.f32 %f554, %f603, %f598;
|
|
mul.f32 %f555, %f603, %f599;
|
|
mov.u32 %r481, 2;
|
|
mov.u32 %r483, 1;
|
|
mov.u32 %r484, 1065353216;
|
|
mov.u32 %r515, 0;
|
|
// begin inline asm
|
|
call(%r445,%r446,%r447,%r448,%r449,%r450,%r451,%r452,%r453,%r454,%r455,%r456,%r457,%r458,%r459,%r460,%r461,%r462,%r463,%r464,%r465,%r466,%r467,%r468,%r469,%r470,%r471,%r472,%r473,%r474,%r475,%r476),_optix_trace_typed_32,(%r515,%rd4,%f14,%f15,%f16,%f553,%f554,%f555,%f388,%f557,%f493,%r483,%r515,%r483,%r481,%r483,%r483,%r484,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515);
|
|
// end inline asm
|
|
mov.b32 %f604, %r445;
|
|
setp.neu.f32 %p62, %f604, 0f3F800000;
|
|
@%p62 bra $L__BB0_38;
|
|
|
|
mov.f32 %f612, 0f6C4ECB8F;
|
|
mov.f32 %f613, 0f00000000;
|
|
// begin inline asm
|
|
call(%r519,%r520,%r521,%r522,%r523,%r524,%r525,%r526,%r527,%r528,%r529,%r530,%r531,%r532,%r533,%r534,%r535,%r536,%r537,%r538,%r539,%r540,%r541,%r542,%r543,%r544,%r545,%r546,%r547,%r548,%r549,%r550),_optix_trace_typed_32,(%r515,%rd4,%f84,%f85,%f86,%f66,%f67,%f68,%f388,%f612,%f613,%r483,%r515,%r483,%r481,%r483,%r483,%r484,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515);
|
|
// end inline asm
|
|
mov.b32 %f614, %r519;
|
|
add.f32 %f1702, %f1702, %f614;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_38:
|
|
mad.lo.s32 %r661, %r50, 1664525, 1013904223;
|
|
and.b32 %r662, %r661, 16777215;
|
|
cvt.rn.f32.u32 %f624, %r662;
|
|
mul.f32 %f625, %f624, 0f33800000;
|
|
fma.rn.f32 %f626, %f625, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r51, %r661, 1664525, 1013904223;
|
|
and.b32 %r663, %r51, 16777215;
|
|
cvt.rn.f32.u32 %f627, %r663;
|
|
mul.f32 %f628, %f627, 0f33800000;
|
|
fma.rn.f32 %f629, %f628, 0f40000000, 0fBF800000;
|
|
mul.f32 %f630, %f17, %f629;
|
|
mul.f32 %f631, %f18, %f629;
|
|
mul.f32 %f632, %f19, %f629;
|
|
fma.rn.f32 %f633, %f20, %f626, %f630;
|
|
fma.rn.f32 %f634, %f21, %f626, %f631;
|
|
fma.rn.f32 %f635, %f22, %f626, %f632;
|
|
mul.f32 %f636, %f634, %f634;
|
|
fma.rn.f32 %f637, %f633, %f633, %f636;
|
|
fma.rn.f32 %f638, %f635, %f635, %f637;
|
|
sqrt.rn.f32 %f639, %f638;
|
|
rcp.rn.f32 %f640, %f639;
|
|
mul.f32 %f641, %f633, %f640;
|
|
mul.f32 %f642, %f634, %f640;
|
|
mul.f32 %f643, %f635, %f640;
|
|
mul.f32 %f644, %f1690, %f643;
|
|
mul.f32 %f645, %f1691, %f642;
|
|
sub.f32 %f646, %f644, %f645;
|
|
mul.f32 %f647, %f1691, %f641;
|
|
mul.f32 %f648, %f1689, %f643;
|
|
sub.f32 %f649, %f647, %f648;
|
|
mul.f32 %f650, %f1689, %f642;
|
|
mul.f32 %f651, %f1690, %f641;
|
|
sub.f32 %f652, %f650, %f651;
|
|
mul.f32 %f653, %f641, 0fBECECEDE;
|
|
mul.f32 %f654, %f642, 0fBECECEDE;
|
|
mul.f32 %f655, %f643, 0fBECECEDE;
|
|
fma.rn.f32 %f656, %f23, %f653, %f14;
|
|
fma.rn.f32 %f657, %f23, %f654, %f15;
|
|
fma.rn.f32 %f658, %f23, %f655, %f16;
|
|
mul.f32 %f659, %f646, 0fBF23A3A9;
|
|
mul.f32 %f660, %f649, 0fBF23A3A9;
|
|
mul.f32 %f661, %f652, 0fBF23A3A9;
|
|
fma.rn.f32 %f91, %f23, %f659, %f656;
|
|
fma.rn.f32 %f92, %f23, %f660, %f657;
|
|
fma.rn.f32 %f93, %f23, %f661, %f658;
|
|
sub.f32 %f662, %f91, %f14;
|
|
sub.f32 %f663, %f92, %f15;
|
|
sub.f32 %f664, %f93, %f16;
|
|
mul.f32 %f665, %f663, %f663;
|
|
fma.rn.f32 %f666, %f662, %f662, %f665;
|
|
fma.rn.f32 %f667, %f664, %f664, %f666;
|
|
sqrt.rn.f32 %f622, %f667;
|
|
rcp.rn.f32 %f668, %f622;
|
|
mul.f32 %f618, %f668, %f662;
|
|
mul.f32 %f619, %f668, %f663;
|
|
mul.f32 %f620, %f668, %f664;
|
|
mov.f32 %f623, 0f00000000;
|
|
// begin inline asm
|
|
call(%r590,%r591,%r592,%r593,%r594,%r595,%r596,%r597,%r598,%r599,%r600,%r601,%r602,%r603,%r604,%r605,%r606,%r607,%r608,%r609,%r610,%r611,%r612,%r613,%r614,%r615,%r616,%r617,%r618,%r619,%r620,%r621),_optix_trace_typed_32,(%r515,%rd4,%f14,%f15,%f16,%f618,%f619,%f620,%f388,%f622,%f623,%r483,%r515,%r483,%r481,%r483,%r483,%r484,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515,%r515);
|
|
// end inline asm
|
|
mov.b32 %f669, %r590;
|
|
setp.neu.f32 %p63, %f669, 0f3F800000;
|
|
@%p63 bra $L__BB0_40;
|
|
|
|
mov.f32 %f677, 0f6C4ECB8F;
|
|
mov.u32 %r700, 2;
|
|
mov.u32 %r702, 1;
|
|
mov.u32 %r703, 1065353216;
|
|
mov.u32 %r734, 0;
|
|
// begin inline asm
|
|
call(%r664,%r665,%r666,%r667,%r668,%r669,%r670,%r671,%r672,%r673,%r674,%r675,%r676,%r677,%r678,%r679,%r680,%r681,%r682,%r683,%r684,%r685,%r686,%r687,%r688,%r689,%r690,%r691,%r692,%r693,%r694,%r695),_optix_trace_typed_32,(%r734,%rd4,%f91,%f92,%f93,%f66,%f67,%f68,%f388,%f677,%f623,%r702,%r734,%r702,%r700,%r702,%r702,%r703,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734,%r734);
|
|
// end inline asm
|
|
mov.b32 %f679, %r664;
|
|
add.f32 %f1702, %f1702, %f679;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_40:
|
|
mad.lo.s32 %r806, %r51, 1664525, 1013904223;
|
|
and.b32 %r807, %r806, 16777215;
|
|
cvt.rn.f32.u32 %f689, %r807;
|
|
mul.f32 %f690, %f689, 0f33800000;
|
|
fma.rn.f32 %f691, %f690, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r52, %r806, 1664525, 1013904223;
|
|
and.b32 %r808, %r52, 16777215;
|
|
cvt.rn.f32.u32 %f692, %r808;
|
|
mul.f32 %f693, %f692, 0f33800000;
|
|
fma.rn.f32 %f694, %f693, 0f40000000, 0fBF800000;
|
|
mul.f32 %f695, %f17, %f694;
|
|
mul.f32 %f696, %f18, %f694;
|
|
mul.f32 %f697, %f19, %f694;
|
|
fma.rn.f32 %f698, %f20, %f691, %f695;
|
|
fma.rn.f32 %f699, %f21, %f691, %f696;
|
|
fma.rn.f32 %f700, %f22, %f691, %f697;
|
|
mul.f32 %f701, %f699, %f699;
|
|
fma.rn.f32 %f702, %f698, %f698, %f701;
|
|
fma.rn.f32 %f703, %f700, %f700, %f702;
|
|
sqrt.rn.f32 %f704, %f703;
|
|
rcp.rn.f32 %f705, %f704;
|
|
mul.f32 %f706, %f698, %f705;
|
|
mul.f32 %f707, %f699, %f705;
|
|
mul.f32 %f708, %f700, %f705;
|
|
mul.f32 %f709, %f1690, %f708;
|
|
mul.f32 %f710, %f1691, %f707;
|
|
sub.f32 %f711, %f709, %f710;
|
|
mul.f32 %f712, %f1691, %f706;
|
|
mul.f32 %f713, %f1689, %f708;
|
|
sub.f32 %f714, %f712, %f713;
|
|
mul.f32 %f715, %f1689, %f707;
|
|
mul.f32 %f716, %f1690, %f706;
|
|
sub.f32 %f717, %f715, %f716;
|
|
mul.f32 %f718, %f706, 0fBF23A3A9;
|
|
mul.f32 %f719, %f707, 0fBF23A3A9;
|
|
mul.f32 %f720, %f708, 0fBF23A3A9;
|
|
fma.rn.f32 %f721, %f23, %f718, %f14;
|
|
fma.rn.f32 %f722, %f23, %f719, %f15;
|
|
fma.rn.f32 %f723, %f23, %f720, %f16;
|
|
mul.f32 %f724, %f711, 0f3F23A3A8;
|
|
mul.f32 %f725, %f714, 0f3F23A3A8;
|
|
mul.f32 %f726, %f717, 0f3F23A3A8;
|
|
fma.rn.f32 %f98, %f23, %f724, %f721;
|
|
fma.rn.f32 %f99, %f23, %f725, %f722;
|
|
fma.rn.f32 %f100, %f23, %f726, %f723;
|
|
sub.f32 %f727, %f98, %f14;
|
|
sub.f32 %f728, %f99, %f15;
|
|
sub.f32 %f729, %f100, %f16;
|
|
mul.f32 %f730, %f728, %f728;
|
|
fma.rn.f32 %f731, %f727, %f727, %f730;
|
|
fma.rn.f32 %f732, %f729, %f729, %f731;
|
|
sqrt.rn.f32 %f687, %f732;
|
|
rcp.rn.f32 %f733, %f687;
|
|
mul.f32 %f683, %f733, %f727;
|
|
mul.f32 %f684, %f733, %f728;
|
|
mul.f32 %f685, %f733, %f729;
|
|
mov.u32 %r771, 2;
|
|
mov.u32 %r773, 1;
|
|
mov.u32 %r774, 1065353216;
|
|
mov.u32 %r805, 0;
|
|
// begin inline asm
|
|
call(%r735,%r736,%r737,%r738,%r739,%r740,%r741,%r742,%r743,%r744,%r745,%r746,%r747,%r748,%r749,%r750,%r751,%r752,%r753,%r754,%r755,%r756,%r757,%r758,%r759,%r760,%r761,%r762,%r763,%r764,%r765,%r766),_optix_trace_typed_32,(%r805,%rd4,%f14,%f15,%f16,%f683,%f684,%f685,%f388,%f687,%f623,%r773,%r805,%r773,%r771,%r773,%r773,%r774,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805);
|
|
// end inline asm
|
|
mov.b32 %f734, %r735;
|
|
setp.neu.f32 %p64, %f734, 0f3F800000;
|
|
@%p64 bra $L__BB0_42;
|
|
|
|
mov.f32 %f742, 0f6C4ECB8F;
|
|
mov.f32 %f743, 0f00000000;
|
|
// begin inline asm
|
|
call(%r809,%r810,%r811,%r812,%r813,%r814,%r815,%r816,%r817,%r818,%r819,%r820,%r821,%r822,%r823,%r824,%r825,%r826,%r827,%r828,%r829,%r830,%r831,%r832,%r833,%r834,%r835,%r836,%r837,%r838,%r839,%r840),_optix_trace_typed_32,(%r805,%rd4,%f98,%f99,%f100,%f66,%f67,%f68,%f388,%f742,%f743,%r773,%r805,%r773,%r771,%r773,%r773,%r774,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805);
|
|
// end inline asm
|
|
mov.b32 %f744, %r809;
|
|
add.f32 %f1702, %f1702, %f744;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_42:
|
|
mad.lo.s32 %r951, %r52, 1664525, 1013904223;
|
|
and.b32 %r952, %r951, 16777215;
|
|
cvt.rn.f32.u32 %f754, %r952;
|
|
mul.f32 %f755, %f754, 0f33800000;
|
|
fma.rn.f32 %f756, %f755, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r53, %r951, 1664525, 1013904223;
|
|
and.b32 %r953, %r53, 16777215;
|
|
cvt.rn.f32.u32 %f757, %r953;
|
|
mul.f32 %f758, %f757, 0f33800000;
|
|
fma.rn.f32 %f759, %f758, 0f40000000, 0fBF800000;
|
|
mul.f32 %f760, %f17, %f759;
|
|
mul.f32 %f761, %f18, %f759;
|
|
mul.f32 %f762, %f19, %f759;
|
|
fma.rn.f32 %f763, %f20, %f756, %f760;
|
|
fma.rn.f32 %f764, %f21, %f756, %f761;
|
|
fma.rn.f32 %f765, %f22, %f756, %f762;
|
|
mul.f32 %f766, %f764, %f764;
|
|
fma.rn.f32 %f767, %f763, %f763, %f766;
|
|
fma.rn.f32 %f768, %f765, %f765, %f767;
|
|
sqrt.rn.f32 %f769, %f768;
|
|
rcp.rn.f32 %f770, %f769;
|
|
mul.f32 %f771, %f763, %f770;
|
|
mul.f32 %f772, %f764, %f770;
|
|
mul.f32 %f773, %f765, %f770;
|
|
mul.f32 %f774, %f1690, %f773;
|
|
mul.f32 %f775, %f1691, %f772;
|
|
sub.f32 %f776, %f774, %f775;
|
|
mul.f32 %f777, %f1691, %f771;
|
|
mul.f32 %f778, %f1689, %f773;
|
|
sub.f32 %f779, %f777, %f778;
|
|
mul.f32 %f780, %f1689, %f772;
|
|
mul.f32 %f781, %f1690, %f771;
|
|
sub.f32 %f782, %f780, %f781;
|
|
mul.f32 %f783, %f771, 0fBF61E1E3;
|
|
mul.f32 %f784, %f772, 0fBF61E1E3;
|
|
mul.f32 %f785, %f773, 0fBF61E1E3;
|
|
fma.rn.f32 %f786, %f23, %f783, %f14;
|
|
fma.rn.f32 %f787, %f23, %f784, %f15;
|
|
fma.rn.f32 %f788, %f23, %f785, %f16;
|
|
mul.f32 %f789, %f776, 0fBE24A490;
|
|
mul.f32 %f790, %f779, 0fBE24A490;
|
|
mul.f32 %f791, %f782, 0fBE24A490;
|
|
fma.rn.f32 %f105, %f23, %f789, %f786;
|
|
fma.rn.f32 %f106, %f23, %f790, %f787;
|
|
fma.rn.f32 %f107, %f23, %f791, %f788;
|
|
sub.f32 %f792, %f105, %f14;
|
|
sub.f32 %f793, %f106, %f15;
|
|
sub.f32 %f794, %f107, %f16;
|
|
mul.f32 %f795, %f793, %f793;
|
|
fma.rn.f32 %f796, %f792, %f792, %f795;
|
|
fma.rn.f32 %f797, %f794, %f794, %f796;
|
|
sqrt.rn.f32 %f752, %f797;
|
|
rcp.rn.f32 %f798, %f752;
|
|
mul.f32 %f748, %f798, %f792;
|
|
mul.f32 %f749, %f798, %f793;
|
|
mul.f32 %f750, %f798, %f794;
|
|
mov.f32 %f753, 0f00000000;
|
|
// begin inline asm
|
|
call(%r880,%r881,%r882,%r883,%r884,%r885,%r886,%r887,%r888,%r889,%r890,%r891,%r892,%r893,%r894,%r895,%r896,%r897,%r898,%r899,%r900,%r901,%r902,%r903,%r904,%r905,%r906,%r907,%r908,%r909,%r910,%r911),_optix_trace_typed_32,(%r805,%rd4,%f14,%f15,%f16,%f748,%f749,%f750,%f388,%f752,%f753,%r773,%r805,%r773,%r771,%r773,%r773,%r774,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805,%r805);
|
|
// end inline asm
|
|
mov.b32 %f799, %r880;
|
|
setp.neu.f32 %p65, %f799, 0f3F800000;
|
|
@%p65 bra $L__BB0_44;
|
|
|
|
mov.f32 %f807, 0f6C4ECB8F;
|
|
mov.u32 %r990, 2;
|
|
mov.u32 %r992, 1;
|
|
mov.u32 %r993, 1065353216;
|
|
mov.u32 %r1024, 0;
|
|
// begin inline asm
|
|
call(%r954,%r955,%r956,%r957,%r958,%r959,%r960,%r961,%r962,%r963,%r964,%r965,%r966,%r967,%r968,%r969,%r970,%r971,%r972,%r973,%r974,%r975,%r976,%r977,%r978,%r979,%r980,%r981,%r982,%r983,%r984,%r985),_optix_trace_typed_32,(%r1024,%rd4,%f105,%f106,%f107,%f66,%f67,%f68,%f388,%f807,%f753,%r992,%r1024,%r992,%r990,%r992,%r992,%r993,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024,%r1024);
|
|
// end inline asm
|
|
mov.b32 %f809, %r954;
|
|
add.f32 %f1702, %f1702, %f809;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_44:
|
|
mad.lo.s32 %r1096, %r53, 1664525, 1013904223;
|
|
and.b32 %r1097, %r1096, 16777215;
|
|
cvt.rn.f32.u32 %f819, %r1097;
|
|
mul.f32 %f820, %f819, 0f33800000;
|
|
fma.rn.f32 %f821, %f820, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r54, %r1096, 1664525, 1013904223;
|
|
and.b32 %r1098, %r54, 16777215;
|
|
cvt.rn.f32.u32 %f822, %r1098;
|
|
mul.f32 %f823, %f822, 0f33800000;
|
|
fma.rn.f32 %f824, %f823, 0f40000000, 0fBF800000;
|
|
mul.f32 %f825, %f17, %f824;
|
|
mul.f32 %f826, %f18, %f824;
|
|
mul.f32 %f827, %f19, %f824;
|
|
fma.rn.f32 %f828, %f20, %f821, %f825;
|
|
fma.rn.f32 %f829, %f21, %f821, %f826;
|
|
fma.rn.f32 %f830, %f22, %f821, %f827;
|
|
mul.f32 %f831, %f829, %f829;
|
|
fma.rn.f32 %f832, %f828, %f828, %f831;
|
|
fma.rn.f32 %f833, %f830, %f830, %f832;
|
|
sqrt.rn.f32 %f834, %f833;
|
|
rcp.rn.f32 %f835, %f834;
|
|
mul.f32 %f836, %f828, %f835;
|
|
mul.f32 %f837, %f829, %f835;
|
|
mul.f32 %f838, %f830, %f835;
|
|
mul.f32 %f839, %f1690, %f838;
|
|
mul.f32 %f840, %f1691, %f837;
|
|
sub.f32 %f841, %f839, %f840;
|
|
mul.f32 %f842, %f1691, %f836;
|
|
mul.f32 %f843, %f1689, %f838;
|
|
sub.f32 %f844, %f842, %f843;
|
|
mul.f32 %f845, %f1689, %f837;
|
|
mul.f32 %f846, %f1690, %f836;
|
|
sub.f32 %f847, %f845, %f846;
|
|
mul.f32 %f848, %f836, 0f3ECACABC;
|
|
mul.f32 %f849, %f837, 0f3ECACABC;
|
|
mul.f32 %f850, %f838, 0f3ECACABC;
|
|
fma.rn.f32 %f851, %f23, %f848, %f14;
|
|
fma.rn.f32 %f852, %f23, %f849, %f15;
|
|
fma.rn.f32 %f853, %f23, %f850, %f16;
|
|
mul.f32 %f854, %f841, 0f3F61E1D2;
|
|
mul.f32 %f855, %f844, 0f3F61E1D2;
|
|
mul.f32 %f856, %f847, 0f3F61E1D2;
|
|
fma.rn.f32 %f112, %f23, %f854, %f851;
|
|
fma.rn.f32 %f113, %f23, %f855, %f852;
|
|
fma.rn.f32 %f114, %f23, %f856, %f853;
|
|
sub.f32 %f857, %f112, %f14;
|
|
sub.f32 %f858, %f113, %f15;
|
|
sub.f32 %f859, %f114, %f16;
|
|
mul.f32 %f860, %f858, %f858;
|
|
fma.rn.f32 %f861, %f857, %f857, %f860;
|
|
fma.rn.f32 %f862, %f859, %f859, %f861;
|
|
sqrt.rn.f32 %f817, %f862;
|
|
rcp.rn.f32 %f863, %f817;
|
|
mul.f32 %f813, %f863, %f857;
|
|
mul.f32 %f814, %f863, %f858;
|
|
mul.f32 %f815, %f863, %f859;
|
|
mov.u32 %r1061, 2;
|
|
mov.u32 %r1063, 1;
|
|
mov.u32 %r1064, 1065353216;
|
|
mov.u32 %r1095, 0;
|
|
// begin inline asm
|
|
call(%r1025,%r1026,%r1027,%r1028,%r1029,%r1030,%r1031,%r1032,%r1033,%r1034,%r1035,%r1036,%r1037,%r1038,%r1039,%r1040,%r1041,%r1042,%r1043,%r1044,%r1045,%r1046,%r1047,%r1048,%r1049,%r1050,%r1051,%r1052,%r1053,%r1054,%r1055,%r1056),_optix_trace_typed_32,(%r1095,%rd4,%f14,%f15,%f16,%f813,%f814,%f815,%f388,%f817,%f753,%r1063,%r1095,%r1063,%r1061,%r1063,%r1063,%r1064,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095);
|
|
// end inline asm
|
|
mov.b32 %f864, %r1025;
|
|
setp.neu.f32 %p66, %f864, 0f3F800000;
|
|
@%p66 bra $L__BB0_46;
|
|
|
|
mov.f32 %f872, 0f6C4ECB8F;
|
|
mov.f32 %f873, 0f00000000;
|
|
// begin inline asm
|
|
call(%r1099,%r1100,%r1101,%r1102,%r1103,%r1104,%r1105,%r1106,%r1107,%r1108,%r1109,%r1110,%r1111,%r1112,%r1113,%r1114,%r1115,%r1116,%r1117,%r1118,%r1119,%r1120,%r1121,%r1122,%r1123,%r1124,%r1125,%r1126,%r1127,%r1128,%r1129,%r1130),_optix_trace_typed_32,(%r1095,%rd4,%f112,%f113,%f114,%f66,%f67,%f68,%f388,%f872,%f873,%r1063,%r1095,%r1063,%r1061,%r1063,%r1063,%r1064,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095);
|
|
// end inline asm
|
|
mov.b32 %f874, %r1099;
|
|
add.f32 %f1702, %f1702, %f874;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_46:
|
|
mad.lo.s32 %r1241, %r54, 1664525, 1013904223;
|
|
and.b32 %r1242, %r1241, 16777215;
|
|
cvt.rn.f32.u32 %f884, %r1242;
|
|
mul.f32 %f885, %f884, 0f33800000;
|
|
fma.rn.f32 %f886, %f885, 0f40000000, 0fBF800000;
|
|
mad.lo.s32 %r1531, %r1241, 1664525, 1013904223;
|
|
and.b32 %r1243, %r1531, 16777215;
|
|
cvt.rn.f32.u32 %f887, %r1243;
|
|
mul.f32 %f888, %f887, 0f33800000;
|
|
fma.rn.f32 %f889, %f888, 0f40000000, 0fBF800000;
|
|
mul.f32 %f890, %f17, %f889;
|
|
mul.f32 %f891, %f18, %f889;
|
|
mul.f32 %f892, %f19, %f889;
|
|
fma.rn.f32 %f893, %f20, %f886, %f890;
|
|
fma.rn.f32 %f894, %f21, %f886, %f891;
|
|
fma.rn.f32 %f895, %f22, %f886, %f892;
|
|
mul.f32 %f896, %f894, %f894;
|
|
fma.rn.f32 %f897, %f893, %f893, %f896;
|
|
fma.rn.f32 %f898, %f895, %f895, %f897;
|
|
sqrt.rn.f32 %f899, %f898;
|
|
rcp.rn.f32 %f900, %f899;
|
|
mul.f32 %f901, %f893, %f900;
|
|
mul.f32 %f902, %f894, %f900;
|
|
mul.f32 %f903, %f895, %f900;
|
|
mul.f32 %f904, %f1690, %f903;
|
|
mul.f32 %f905, %f1691, %f902;
|
|
sub.f32 %f906, %f904, %f905;
|
|
mul.f32 %f907, %f1691, %f901;
|
|
mul.f32 %f908, %f1689, %f903;
|
|
sub.f32 %f909, %f907, %f908;
|
|
mul.f32 %f910, %f1689, %f902;
|
|
mul.f32 %f911, %f1690, %f901;
|
|
sub.f32 %f912, %f910, %f911;
|
|
mul.f32 %f913, %f901, 0f3F61E1D2;
|
|
mul.f32 %f914, %f902, 0f3F61E1D2;
|
|
mul.f32 %f915, %f903, 0f3F61E1D2;
|
|
fma.rn.f32 %f916, %f23, %f913, %f14;
|
|
fma.rn.f32 %f917, %f23, %f914, %f15;
|
|
fma.rn.f32 %f918, %f23, %f915, %f16;
|
|
mul.f32 %f919, %f906, 0fBF61E1E3;
|
|
mul.f32 %f920, %f909, 0fBF61E1E3;
|
|
mul.f32 %f921, %f912, 0fBF61E1E3;
|
|
fma.rn.f32 %f119, %f23, %f919, %f916;
|
|
fma.rn.f32 %f120, %f23, %f920, %f917;
|
|
fma.rn.f32 %f121, %f23, %f921, %f918;
|
|
sub.f32 %f922, %f119, %f14;
|
|
sub.f32 %f923, %f120, %f15;
|
|
sub.f32 %f924, %f121, %f16;
|
|
mul.f32 %f925, %f923, %f923;
|
|
fma.rn.f32 %f926, %f922, %f922, %f925;
|
|
fma.rn.f32 %f927, %f924, %f924, %f926;
|
|
sqrt.rn.f32 %f882, %f927;
|
|
rcp.rn.f32 %f928, %f882;
|
|
mul.f32 %f878, %f928, %f922;
|
|
mul.f32 %f879, %f928, %f923;
|
|
mul.f32 %f880, %f928, %f924;
|
|
mov.f32 %f883, 0f00000000;
|
|
// begin inline asm
|
|
call(%r1170,%r1171,%r1172,%r1173,%r1174,%r1175,%r1176,%r1177,%r1178,%r1179,%r1180,%r1181,%r1182,%r1183,%r1184,%r1185,%r1186,%r1187,%r1188,%r1189,%r1190,%r1191,%r1192,%r1193,%r1194,%r1195,%r1196,%r1197,%r1198,%r1199,%r1200,%r1201),_optix_trace_typed_32,(%r1095,%rd4,%f14,%f15,%f16,%f878,%f879,%f880,%f388,%f882,%f883,%r1063,%r1095,%r1063,%r1061,%r1063,%r1063,%r1064,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095,%r1095);
|
|
// end inline asm
|
|
mov.b32 %f929, %r1170;
|
|
setp.neu.f32 %p67, %f929, 0f3F800000;
|
|
@%p67 bra $L__BB0_48;
|
|
|
|
mov.f32 %f937, 0f6C4ECB8F;
|
|
mov.u32 %r1280, 2;
|
|
mov.u32 %r1282, 1;
|
|
mov.u32 %r1283, 1065353216;
|
|
mov.u32 %r1314, 0;
|
|
// begin inline asm
|
|
call(%r1244,%r1245,%r1246,%r1247,%r1248,%r1249,%r1250,%r1251,%r1252,%r1253,%r1254,%r1255,%r1256,%r1257,%r1258,%r1259,%r1260,%r1261,%r1262,%r1263,%r1264,%r1265,%r1266,%r1267,%r1268,%r1269,%r1270,%r1271,%r1272,%r1273,%r1274,%r1275),_optix_trace_typed_32,(%r1314,%rd4,%f119,%f120,%f121,%f66,%f67,%f68,%f388,%f937,%f883,%r1282,%r1314,%r1282,%r1280,%r1282,%r1282,%r1283,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314,%r1314);
|
|
// end inline asm
|
|
mov.b32 %f939, %r1244;
|
|
add.f32 %f1702, %f1702, %f939;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
mov.u16 %rs196, 1;
|
|
|
|
$L__BB0_48:
|
|
setp.ne.s16 %p68, %rs196, 0;
|
|
@%p68 bra $L__BB0_50;
|
|
|
|
mov.f32 %f947, 0f6C4ECB8F;
|
|
mov.f32 %f948, 0f00000000;
|
|
mov.u32 %r1351, 2;
|
|
mov.u32 %r1353, 1;
|
|
mov.u32 %r1354, 1065353216;
|
|
mov.u32 %r1385, 0;
|
|
// begin inline asm
|
|
call(%r1315,%r1316,%r1317,%r1318,%r1319,%r1320,%r1321,%r1322,%r1323,%r1324,%r1325,%r1326,%r1327,%r1328,%r1329,%r1330,%r1331,%r1332,%r1333,%r1334,%r1335,%r1336,%r1337,%r1338,%r1339,%r1340,%r1341,%r1342,%r1343,%r1344,%r1345,%r1346),_optix_trace_typed_32,(%r1385,%rd4,%f14,%f15,%f16,%f66,%f67,%f68,%f388,%f947,%f948,%r1353,%r1385,%r1353,%r1351,%r1353,%r1353,%r1354,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385,%r1385);
|
|
// end inline asm
|
|
mov.b32 %f949, %r1315;
|
|
add.f32 %f1702, %f1702, %f949;
|
|
add.f32 %f1703, %f1703, 0f3F800000;
|
|
|
|
$L__BB0_50:
|
|
add.s32 %r1530, %r1530, 1;
|
|
setp.lt.s32 %p69, %r1530, %r7;
|
|
@%p69 bra $L__BB0_8;
|
|
|
|
add.s32 %r1528, %r1528, 1;
|
|
setp.lt.s32 %p70, %r1528, %r7;
|
|
@%p70 bra $L__BB0_7;
|
|
|
|
$L__BB0_52:
|
|
setp.eq.s32 %p71, %r7, 0;
|
|
mov.f32 %f1722, 0f3F800000;
|
|
@%p71 bra $L__BB0_54;
|
|
|
|
mov.f32 %f951, 0f3F800000;
|
|
max.f32 %f952, %f1703, %f951;
|
|
div.rn.f32 %f1722, %f1702, %f952;
|
|
|
|
$L__BB0_54:
|
|
ld.const.f32 %f953, [params+524];
|
|
mul.f32 %f954, %f1722, %f953;
|
|
ld.const.v2.f32 {%f955, %f956}, [params+528];
|
|
mul.f32 %f959, %f1722, %f955;
|
|
mul.f32 %f960, %f1722, %f956;
|
|
cvt.sat.f32.f32 %f961, %f13;
|
|
mul.f32 %f134, %f954, %f961;
|
|
mul.f32 %f135, %f959, %f961;
|
|
mul.f32 %f136, %f960, %f961;
|
|
mul.f32 %f962, %f13, 0f40800000;
|
|
cvt.sat.f32.f32 %f963, %f962;
|
|
mul.f32 %f964, %f954, %f963;
|
|
mul.f32 %f965, %f959, %f963;
|
|
mul.f32 %f966, %f960, %f963;
|
|
mul.f32 %f137, %f964, 0f3E800000;
|
|
mul.f32 %f138, %f965, 0f3E800000;
|
|
mul.f32 %f139, %f966, 0f3E800000;
|
|
ld.const.u32 %r58, [params+104];
|
|
and.b32 %r1386, %r58, 8;
|
|
setp.eq.s32 %p72, %r1386, 0;
|
|
@%p72 bra $L__BB0_68;
|
|
|
|
ld.const.u64 %rd86, [params+192];
|
|
cvta.to.global.u64 %rd16, %rd86;
|
|
ld.const.u32 %r1387, [params+184];
|
|
mad.lo.s32 %r1388, %r1387, %r6, %r5;
|
|
cvt.u64.u32 %rd17, %r1388;
|
|
mov.f32 %f968, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f969, %f968;
|
|
add.f32 %f970, %f969, %f969;
|
|
mov.f32 %f971, 0f3EE8BA2E;
|
|
sub.f32 %f972, %f971, %f970;
|
|
abs.f32 %f140, %f972;
|
|
abs.f32 %f141, %f1722;
|
|
setp.lt.f32 %p73, %f141, 0f00800000;
|
|
mul.f32 %f973, %f141, 0f4B800000;
|
|
selp.f32 %f974, %f973, %f141, %p73;
|
|
selp.f32 %f975, 0fC3170000, 0fC2FE0000, %p73;
|
|
mov.b32 %r1389, %f974;
|
|
and.b32 %r1390, %r1389, 8388607;
|
|
or.b32 %r1391, %r1390, 1065353216;
|
|
mov.b32 %f976, %r1391;
|
|
shr.u32 %r1392, %r1389, 23;
|
|
cvt.rn.f32.u32 %f977, %r1392;
|
|
add.f32 %f978, %f975, %f977;
|
|
setp.gt.f32 %p74, %f976, 0f3FB504F3;
|
|
mul.f32 %f979, %f976, 0f3F000000;
|
|
add.f32 %f980, %f978, 0f3F800000;
|
|
selp.f32 %f981, %f980, %f978, %p74;
|
|
selp.f32 %f982, %f979, %f976, %p74;
|
|
add.f32 %f983, %f982, 0fBF800000;
|
|
add.f32 %f984, %f982, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f985, %f984;
|
|
add.f32 %f986, %f983, %f983;
|
|
mul.f32 %f987, %f986, %f985;
|
|
mul.f32 %f988, %f987, %f987;
|
|
mov.f32 %f989, 0f3C4CAF63;
|
|
mov.f32 %f990, 0f3B18F0FE;
|
|
fma.rn.f32 %f991, %f990, %f988, %f989;
|
|
mov.f32 %f992, 0f3DAAAABD;
|
|
fma.rn.f32 %f993, %f991, %f988, %f992;
|
|
mul.rn.f32 %f994, %f993, %f988;
|
|
mul.rn.f32 %f995, %f994, %f987;
|
|
sub.f32 %f996, %f983, %f987;
|
|
add.f32 %f997, %f996, %f996;
|
|
neg.f32 %f998, %f987;
|
|
fma.rn.f32 %f999, %f998, %f983, %f997;
|
|
mul.rn.f32 %f1000, %f985, %f999;
|
|
add.f32 %f1001, %f995, %f987;
|
|
sub.f32 %f1002, %f987, %f1001;
|
|
add.f32 %f1003, %f995, %f1002;
|
|
add.f32 %f1004, %f1000, %f1003;
|
|
add.f32 %f1005, %f1001, %f1004;
|
|
sub.f32 %f1006, %f1001, %f1005;
|
|
add.f32 %f1007, %f1004, %f1006;
|
|
mov.f32 %f1008, 0f3F317200;
|
|
mul.rn.f32 %f1009, %f981, %f1008;
|
|
mov.f32 %f1010, 0f35BFBE8E;
|
|
mul.rn.f32 %f1011, %f981, %f1010;
|
|
add.f32 %f1012, %f1009, %f1005;
|
|
sub.f32 %f1013, %f1009, %f1012;
|
|
add.f32 %f1014, %f1005, %f1013;
|
|
add.f32 %f1015, %f1007, %f1014;
|
|
add.f32 %f1016, %f1011, %f1015;
|
|
add.f32 %f1017, %f1012, %f1016;
|
|
sub.f32 %f1018, %f1012, %f1017;
|
|
add.f32 %f1019, %f1016, %f1018;
|
|
mul.rn.f32 %f1020, %f971, %f1017;
|
|
neg.f32 %f1021, %f1020;
|
|
fma.rn.f32 %f1022, %f971, %f1017, %f1021;
|
|
fma.rn.f32 %f1023, %f971, %f1019, %f1022;
|
|
mov.f32 %f1024, 0f00000000;
|
|
fma.rn.f32 %f1025, %f1024, %f1017, %f1023;
|
|
add.rn.f32 %f1026, %f1020, %f1025;
|
|
neg.f32 %f1027, %f1026;
|
|
add.rn.f32 %f1028, %f1020, %f1027;
|
|
add.rn.f32 %f1029, %f1028, %f1025;
|
|
mov.b32 %r1393, %f1026;
|
|
setp.eq.s32 %p75, %r1393, 1118925336;
|
|
add.s32 %r1394, %r1393, -1;
|
|
mov.b32 %f1030, %r1394;
|
|
add.f32 %f1031, %f1029, 0f37000000;
|
|
selp.f32 %f142, %f1031, %f1029, %p75;
|
|
selp.f32 %f1032, %f1030, %f1026, %p75;
|
|
mov.f32 %f1033, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1034, %f1032, %f1033;
|
|
cvt.rzi.f32.f32 %f1035, %f1034;
|
|
abs.f32 %f1036, %f1035;
|
|
setp.gt.f32 %p76, %f1036, 0f42FC0000;
|
|
mov.b32 %r1395, %f1035;
|
|
and.b32 %r1396, %r1395, -2147483648;
|
|
or.b32 %r1397, %r1396, 1123811328;
|
|
mov.b32 %f1037, %r1397;
|
|
selp.f32 %f1038, %f1037, %f1035, %p76;
|
|
mov.f32 %f1039, 0fBF317218;
|
|
fma.rn.f32 %f1040, %f1038, %f1039, %f1032;
|
|
mov.f32 %f1041, 0f3102E308;
|
|
fma.rn.f32 %f1042, %f1038, %f1041, %f1040;
|
|
mul.f32 %f1043, %f1042, 0f3FB8AA3B;
|
|
add.f32 %f1044, %f1038, 0f4B40007F;
|
|
mov.b32 %r1398, %f1044;
|
|
shl.b32 %r1399, %r1398, 23;
|
|
mov.b32 %f1045, %r1399;
|
|
ex2.approx.ftz.f32 %f1046, %f1043;
|
|
mul.f32 %f143, %f1046, %f1045;
|
|
setp.eq.f32 %p77, %f143, 0f7F800000;
|
|
mov.f32 %f1723, 0f7F800000;
|
|
@%p77 bra $L__BB0_57;
|
|
|
|
fma.rn.f32 %f1723, %f143, %f142, %f143;
|
|
|
|
$L__BB0_57:
|
|
setp.lt.f32 %p78, %f1722, 0f00000000;
|
|
setp.eq.f32 %p79, %f140, 0f3F800000;
|
|
and.pred %p1, %p78, %p79;
|
|
setp.eq.f32 %p80, %f1722, 0f00000000;
|
|
@%p80 bra $L__BB0_61;
|
|
bra.uni $L__BB0_58;
|
|
|
|
$L__BB0_61:
|
|
add.f32 %f1051, %f1722, %f1722;
|
|
selp.f32 %f1725, %f1051, 0f00000000, %p79;
|
|
bra.uni $L__BB0_62;
|
|
|
|
$L__BB0_165:
|
|
mov.f32 %f1651, 0f00000000;
|
|
mov.u32 %r1540, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs131, %f1651;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs130, %f1651;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f1651;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs132, 0;
|
|
st.global.v4.u16 [%rd25], {%rs129, %rs130, %rs131, %rs132};
|
|
|
|
$L__BB0_166:
|
|
ld.const.u64 %rd118, [params+256];
|
|
cvta.to.global.u64 %rd119, %rd118;
|
|
ld.const.u32 %r1520, [params+248];
|
|
mad.lo.s32 %r1521, %r1520, %r6, %r5;
|
|
mul.wide.u32 %rd120, %r1521, 8;
|
|
add.s64 %rd26, %rd119, %rd120;
|
|
setp.eq.s32 %p198, %r1540, 0;
|
|
@%p198 bra $L__BB0_168;
|
|
|
|
ld.global.v4.u16 {%rs139, %rs140, %rs141, %rs142}, [%rd26];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1652, %rs139;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1653, %rs140;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1654, %rs141;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1655, %f1652, 0f00000000;
|
|
add.f32 %f1656, %f1653, 0f00000000;
|
|
add.f32 %f1657, %f1654, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1657;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f1656;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f1655;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs143, 0;
|
|
st.global.v4.u16 [%rd26], {%rs136, %rs137, %rs138, %rs143};
|
|
bra.uni $L__BB0_169;
|
|
|
|
$L__BB0_168:
|
|
mov.f32 %f1660, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1660;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1660;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs144, %f1660;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs147, 0;
|
|
st.global.v4.u16 [%rd26], {%rs144, %rs145, %rs146, %rs147};
|
|
|
|
$L__BB0_169:
|
|
ld.const.u64 %rd121, [params+272];
|
|
cvta.to.global.u64 %rd122, %rd121;
|
|
ld.const.u32 %r1522, [params+264];
|
|
mad.lo.s32 %r1523, %r1522, %r6, %r5;
|
|
mul.wide.u32 %rd123, %r1523, 8;
|
|
add.s64 %rd27, %rd122, %rd123;
|
|
@%p198 bra $L__BB0_171;
|
|
|
|
ld.global.v4.u16 {%rs154, %rs155, %rs156, %rs157}, [%rd27];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1661, %rs154;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1662, %rs155;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1663, %rs156;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1664, %f1661, 0f00000000;
|
|
add.f32 %f1665, %f1662, 0f00000000;
|
|
add.f32 %f1666, %f1663, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f1666;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1665;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1664;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs158, 0;
|
|
st.global.v4.u16 [%rd27], {%rs151, %rs152, %rs153, %rs158};
|
|
bra.uni $L__BB0_172;
|
|
|
|
$L__BB0_171:
|
|
mov.f32 %f1669, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs161, %f1669;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs160, %f1669;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1669;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs162, 0;
|
|
st.global.v4.u16 [%rd27], {%rs159, %rs160, %rs161, %rs162};
|
|
|
|
$L__BB0_172:
|
|
ld.const.u64 %rd124, [params+288];
|
|
cvta.to.global.u64 %rd125, %rd124;
|
|
ld.const.u32 %r1524, [params+280];
|
|
mad.lo.s32 %r1525, %r1524, %r6, %r5;
|
|
mul.wide.u32 %rd126, %r1525, 8;
|
|
add.s64 %rd28, %rd125, %rd126;
|
|
@%p198 bra $L__BB0_174;
|
|
|
|
ld.global.v4.u16 {%rs169, %rs170, %rs171, %rs172}, [%rd28];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1670, %rs169;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1671, %rs170;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1672, %rs171;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1673, %f1670, 0f00000000;
|
|
add.f32 %f1674, %f1671, 0f00000000;
|
|
add.f32 %f1675, %f1672, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs168, %f1675;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs167, %f1674;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs166, %f1673;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs173, 0;
|
|
st.global.v4.u16 [%rd28], {%rs166, %rs167, %rs168, %rs173};
|
|
bra.uni $L__BB0_175;
|
|
|
|
$L__BB0_174:
|
|
mov.f32 %f1678, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs176, %f1678;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs175, %f1678;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs174, %f1678;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs177, 0;
|
|
st.global.v4.u16 [%rd28], {%rs174, %rs175, %rs176, %rs177};
|
|
|
|
$L__BB0_175:
|
|
ld.const.u64 %rd127, [params+304];
|
|
cvta.to.global.u64 %rd128, %rd127;
|
|
ld.const.u32 %r1526, [params+296];
|
|
mad.lo.s32 %r1527, %r1526, %r6, %r5;
|
|
mul.wide.u32 %rd129, %r1527, 8;
|
|
add.s64 %rd29, %rd128, %rd129;
|
|
@%p198 bra $L__BB0_177;
|
|
|
|
ld.global.v4.u16 {%rs184, %rs185, %rs186, %rs187}, [%rd29];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1679, %rs184;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1680, %rs185;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1681, %rs186;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1682, %f1679, 0f00000000;
|
|
add.f32 %f1683, %f1680, 0f00000000;
|
|
add.f32 %f1684, %f1681, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs183, %f1684;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs182, %f1683;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs181, %f1682;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs188, 0;
|
|
st.global.v4.u16 [%rd29], {%rs181, %rs182, %rs183, %rs188};
|
|
bra.uni $L__BB0_178;
|
|
|
|
$L__BB0_177:
|
|
mov.f32 %f1687, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs191, %f1687;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs190, %f1687;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs189, %f1687;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs192, 0;
|
|
st.global.v4.u16 [%rd29], {%rs189, %rs190, %rs191, %rs192};
|
|
bra.uni $L__BB0_178;
|
|
|
|
$L__BB0_58:
|
|
mov.b32 %r1400, %f1723;
|
|
xor.b32 %r1401, %r1400, -2147483648;
|
|
mov.b32 %f1047, %r1401;
|
|
selp.f32 %f1725, %f1047, %f1723, %p1;
|
|
setp.geu.f32 %p81, %f1722, 0f00000000;
|
|
@%p81 bra $L__BB0_62;
|
|
|
|
mov.f32 %f1048, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f1049, %f1048;
|
|
setp.eq.f32 %p82, %f1049, 0f3EE8BA2E;
|
|
@%p82 bra $L__BB0_62;
|
|
|
|
mov.f32 %f1725, 0f7FFFFFFF;
|
|
|
|
$L__BB0_62:
|
|
add.f32 %f1052, %f141, 0f3EE8BA2E;
|
|
mov.b32 %r1402, %f1052;
|
|
setp.lt.s32 %p84, %r1402, 2139095040;
|
|
@%p84 bra $L__BB0_67;
|
|
|
|
setp.gtu.f32 %p85, %f141, 0f7F800000;
|
|
@%p85 bra $L__BB0_66;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_66:
|
|
add.f32 %f1725, %f1722, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_67;
|
|
|
|
$L__BB0_64:
|
|
setp.neu.f32 %p86, %f141, 0f7F800000;
|
|
@%p86 bra $L__BB0_67;
|
|
|
|
selp.f32 %f1725, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_67:
|
|
mul.f32 %f1053, %f1725, 0f437F0000;
|
|
setp.eq.f32 %p87, %f1722, 0f3F800000;
|
|
selp.f32 %f1054, 0f437F0000, %f1053, %p87;
|
|
cvt.rzi.u32.f32 %r1403, %f1054;
|
|
shl.b64 %rd87, %rd17, 1;
|
|
add.s64 %rd88, %rd16, %rd87;
|
|
cvt.u16.u32 %rs34, %r1403;
|
|
mov.u16 %rs35, 255;
|
|
st.global.v2.u8 [%rd88], {%rs34, %rs35};
|
|
|
|
$L__BB0_68:
|
|
and.b32 %r1404, %r58, 1;
|
|
setp.eq.b32 %p88, %r1404, 1;
|
|
mov.pred %p89, 0;
|
|
xor.pred %p90, %p88, %p89;
|
|
not.pred %p91, %p90;
|
|
@%p91 bra $L__BB0_142;
|
|
|
|
mov.f32 %f1056, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1057, %f1056;
|
|
add.f32 %f1058, %f1057, %f1057;
|
|
mov.f32 %f1059, 0f3EE66666;
|
|
sub.f32 %f1060, %f1059, %f1058;
|
|
abs.f32 %f152, %f1060;
|
|
abs.f32 %f153, %f134;
|
|
setp.lt.f32 %p92, %f153, 0f00800000;
|
|
mul.f32 %f1061, %f153, 0f4B800000;
|
|
selp.f32 %f1062, %f1061, %f153, %p92;
|
|
selp.f32 %f1063, 0fC3170000, 0fC2FE0000, %p92;
|
|
mov.b32 %r1405, %f1062;
|
|
and.b32 %r1406, %r1405, 8388607;
|
|
or.b32 %r1407, %r1406, 1065353216;
|
|
mov.b32 %f1064, %r1407;
|
|
shr.u32 %r1408, %r1405, 23;
|
|
cvt.rn.f32.u32 %f1065, %r1408;
|
|
add.f32 %f1066, %f1063, %f1065;
|
|
setp.gt.f32 %p93, %f1064, 0f3FB504F3;
|
|
mul.f32 %f1067, %f1064, 0f3F000000;
|
|
add.f32 %f1068, %f1066, 0f3F800000;
|
|
selp.f32 %f1069, %f1068, %f1066, %p93;
|
|
selp.f32 %f1070, %f1067, %f1064, %p93;
|
|
add.f32 %f1071, %f1070, 0fBF800000;
|
|
add.f32 %f1072, %f1070, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1073, %f1072;
|
|
add.f32 %f1074, %f1071, %f1071;
|
|
mul.f32 %f1075, %f1074, %f1073;
|
|
mul.f32 %f1076, %f1075, %f1075;
|
|
mov.f32 %f1077, 0f3C4CAF63;
|
|
mov.f32 %f1078, 0f3B18F0FE;
|
|
fma.rn.f32 %f1079, %f1078, %f1076, %f1077;
|
|
mov.f32 %f1080, 0f3DAAAABD;
|
|
fma.rn.f32 %f1081, %f1079, %f1076, %f1080;
|
|
mul.rn.f32 %f1082, %f1081, %f1076;
|
|
mul.rn.f32 %f1083, %f1082, %f1075;
|
|
sub.f32 %f1084, %f1071, %f1075;
|
|
add.f32 %f1085, %f1084, %f1084;
|
|
neg.f32 %f1086, %f1075;
|
|
fma.rn.f32 %f1087, %f1086, %f1071, %f1085;
|
|
mul.rn.f32 %f1088, %f1073, %f1087;
|
|
add.f32 %f1089, %f1083, %f1075;
|
|
sub.f32 %f1090, %f1075, %f1089;
|
|
add.f32 %f1091, %f1083, %f1090;
|
|
add.f32 %f1092, %f1088, %f1091;
|
|
add.f32 %f1093, %f1089, %f1092;
|
|
sub.f32 %f1094, %f1089, %f1093;
|
|
add.f32 %f1095, %f1092, %f1094;
|
|
mov.f32 %f1096, 0f3F317200;
|
|
mul.rn.f32 %f1097, %f1069, %f1096;
|
|
mov.f32 %f1098, 0f35BFBE8E;
|
|
mul.rn.f32 %f1099, %f1069, %f1098;
|
|
add.f32 %f1100, %f1097, %f1093;
|
|
sub.f32 %f1101, %f1097, %f1100;
|
|
add.f32 %f1102, %f1093, %f1101;
|
|
add.f32 %f1103, %f1095, %f1102;
|
|
add.f32 %f1104, %f1099, %f1103;
|
|
add.f32 %f1105, %f1100, %f1104;
|
|
sub.f32 %f1106, %f1100, %f1105;
|
|
add.f32 %f1107, %f1104, %f1106;
|
|
mul.rn.f32 %f1108, %f1059, %f1105;
|
|
neg.f32 %f1109, %f1108;
|
|
fma.rn.f32 %f1110, %f1059, %f1105, %f1109;
|
|
fma.rn.f32 %f1111, %f1059, %f1107, %f1110;
|
|
mov.f32 %f1112, 0f00000000;
|
|
fma.rn.f32 %f1113, %f1112, %f1105, %f1111;
|
|
add.rn.f32 %f1114, %f1108, %f1113;
|
|
neg.f32 %f1115, %f1114;
|
|
add.rn.f32 %f1116, %f1108, %f1115;
|
|
add.rn.f32 %f1117, %f1116, %f1113;
|
|
mov.b32 %r1409, %f1114;
|
|
setp.eq.s32 %p94, %r1409, 1118925336;
|
|
add.s32 %r1410, %r1409, -1;
|
|
mov.b32 %f1118, %r1410;
|
|
add.f32 %f1119, %f1117, 0f37000000;
|
|
selp.f32 %f154, %f1119, %f1117, %p94;
|
|
selp.f32 %f1120, %f1118, %f1114, %p94;
|
|
mov.f32 %f1121, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1122, %f1120, %f1121;
|
|
cvt.rzi.f32.f32 %f1123, %f1122;
|
|
abs.f32 %f1124, %f1123;
|
|
setp.gt.f32 %p95, %f1124, 0f42FC0000;
|
|
mov.b32 %r1411, %f1123;
|
|
and.b32 %r1412, %r1411, -2147483648;
|
|
or.b32 %r1413, %r1412, 1123811328;
|
|
mov.b32 %f1125, %r1413;
|
|
selp.f32 %f1126, %f1125, %f1123, %p95;
|
|
mov.f32 %f1127, 0fBF317218;
|
|
fma.rn.f32 %f1128, %f1126, %f1127, %f1120;
|
|
mov.f32 %f1129, 0f3102E308;
|
|
fma.rn.f32 %f1130, %f1126, %f1129, %f1128;
|
|
mul.f32 %f1131, %f1130, 0f3FB8AA3B;
|
|
add.f32 %f1132, %f1126, 0f4B40007F;
|
|
mov.b32 %r1414, %f1132;
|
|
shl.b32 %r1415, %r1414, 23;
|
|
mov.b32 %f1133, %r1415;
|
|
ex2.approx.ftz.f32 %f1134, %f1131;
|
|
mul.f32 %f155, %f1134, %f1133;
|
|
setp.eq.f32 %p96, %f155, 0f7F800000;
|
|
mov.f32 %f1726, 0f7F800000;
|
|
@%p96 bra $L__BB0_71;
|
|
|
|
fma.rn.f32 %f1726, %f155, %f154, %f155;
|
|
|
|
$L__BB0_71:
|
|
setp.lt.f32 %p97, %f134, 0f00000000;
|
|
setp.eq.f32 %p98, %f152, 0f3F800000;
|
|
and.pred %p2, %p97, %p98;
|
|
setp.eq.f32 %p99, %f134, 0f00000000;
|
|
@%p99 bra $L__BB0_75;
|
|
bra.uni $L__BB0_72;
|
|
|
|
$L__BB0_75:
|
|
add.f32 %f1139, %f134, %f134;
|
|
selp.f32 %f1728, %f1139, 0f00000000, %p98;
|
|
bra.uni $L__BB0_76;
|
|
|
|
$L__BB0_72:
|
|
mov.b32 %r1416, %f1726;
|
|
xor.b32 %r1417, %r1416, -2147483648;
|
|
mov.b32 %f1135, %r1417;
|
|
selp.f32 %f1728, %f1135, %f1726, %p2;
|
|
setp.geu.f32 %p100, %f134, 0f00000000;
|
|
@%p100 bra $L__BB0_76;
|
|
|
|
mov.f32 %f1136, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1137, %f1136;
|
|
setp.eq.f32 %p101, %f1137, 0f3EE66666;
|
|
@%p101 bra $L__BB0_76;
|
|
|
|
mov.f32 %f1728, 0f7FFFFFFF;
|
|
|
|
$L__BB0_76:
|
|
add.f32 %f1140, %f153, 0f3EE66666;
|
|
mov.b32 %r1418, %f1140;
|
|
setp.lt.s32 %p103, %r1418, 2139095040;
|
|
@%p103 bra $L__BB0_81;
|
|
|
|
setp.gtu.f32 %p104, %f153, 0f7F800000;
|
|
@%p104 bra $L__BB0_80;
|
|
bra.uni $L__BB0_78;
|
|
|
|
$L__BB0_80:
|
|
add.f32 %f1728, %f134, 0f3EE66666;
|
|
bra.uni $L__BB0_81;
|
|
|
|
$L__BB0_78:
|
|
setp.neu.f32 %p105, %f153, 0f7F800000;
|
|
@%p105 bra $L__BB0_81;
|
|
|
|
selp.f32 %f1728, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
$L__BB0_81:
|
|
setp.eq.f32 %p106, %f134, 0f3F800000;
|
|
selp.f32 %f164, 0f3F800000, %f1728, %p106;
|
|
abs.f32 %f165, %f135;
|
|
setp.lt.f32 %p107, %f165, 0f00800000;
|
|
mul.f32 %f1142, %f165, 0f4B800000;
|
|
selp.f32 %f1143, %f1142, %f165, %p107;
|
|
selp.f32 %f1144, 0fC3170000, 0fC2FE0000, %p107;
|
|
mov.b32 %r1419, %f1143;
|
|
and.b32 %r1420, %r1419, 8388607;
|
|
or.b32 %r1421, %r1420, 1065353216;
|
|
mov.b32 %f1145, %r1421;
|
|
shr.u32 %r1422, %r1419, 23;
|
|
cvt.rn.f32.u32 %f1146, %r1422;
|
|
add.f32 %f1147, %f1144, %f1146;
|
|
setp.gt.f32 %p108, %f1145, 0f3FB504F3;
|
|
mul.f32 %f1148, %f1145, 0f3F000000;
|
|
add.f32 %f1149, %f1147, 0f3F800000;
|
|
selp.f32 %f1150, %f1149, %f1147, %p108;
|
|
selp.f32 %f1151, %f1148, %f1145, %p108;
|
|
add.f32 %f1152, %f1151, 0fBF800000;
|
|
add.f32 %f1153, %f1151, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1154, %f1153;
|
|
add.f32 %f1155, %f1152, %f1152;
|
|
mul.f32 %f1156, %f1155, %f1154;
|
|
mul.f32 %f1157, %f1156, %f1156;
|
|
mov.f32 %f1158, 0f3C4CAF63;
|
|
mov.f32 %f1159, 0f3B18F0FE;
|
|
fma.rn.f32 %f1160, %f1159, %f1157, %f1158;
|
|
mov.f32 %f1161, 0f3DAAAABD;
|
|
fma.rn.f32 %f1162, %f1160, %f1157, %f1161;
|
|
mul.rn.f32 %f1163, %f1162, %f1157;
|
|
mul.rn.f32 %f1164, %f1163, %f1156;
|
|
sub.f32 %f1165, %f1152, %f1156;
|
|
add.f32 %f1166, %f1165, %f1165;
|
|
neg.f32 %f1167, %f1156;
|
|
fma.rn.f32 %f1168, %f1167, %f1152, %f1166;
|
|
mul.rn.f32 %f1169, %f1154, %f1168;
|
|
add.f32 %f1170, %f1164, %f1156;
|
|
sub.f32 %f1171, %f1156, %f1170;
|
|
add.f32 %f1172, %f1164, %f1171;
|
|
add.f32 %f1173, %f1169, %f1172;
|
|
add.f32 %f1174, %f1170, %f1173;
|
|
sub.f32 %f1175, %f1170, %f1174;
|
|
add.f32 %f1176, %f1173, %f1175;
|
|
mov.f32 %f1177, 0f3F317200;
|
|
mul.rn.f32 %f1178, %f1150, %f1177;
|
|
mov.f32 %f1179, 0f35BFBE8E;
|
|
mul.rn.f32 %f1180, %f1150, %f1179;
|
|
add.f32 %f1181, %f1178, %f1174;
|
|
sub.f32 %f1182, %f1178, %f1181;
|
|
add.f32 %f1183, %f1174, %f1182;
|
|
add.f32 %f1184, %f1176, %f1183;
|
|
add.f32 %f1185, %f1180, %f1184;
|
|
add.f32 %f1186, %f1181, %f1185;
|
|
sub.f32 %f1187, %f1181, %f1186;
|
|
add.f32 %f1188, %f1185, %f1187;
|
|
mov.f32 %f1189, 0f3EE66666;
|
|
mul.rn.f32 %f1190, %f1189, %f1186;
|
|
neg.f32 %f1191, %f1190;
|
|
fma.rn.f32 %f1192, %f1189, %f1186, %f1191;
|
|
fma.rn.f32 %f1193, %f1189, %f1188, %f1192;
|
|
mov.f32 %f1194, 0f00000000;
|
|
fma.rn.f32 %f1195, %f1194, %f1186, %f1193;
|
|
add.rn.f32 %f1196, %f1190, %f1195;
|
|
neg.f32 %f1197, %f1196;
|
|
add.rn.f32 %f1198, %f1190, %f1197;
|
|
add.rn.f32 %f1199, %f1198, %f1195;
|
|
mov.b32 %r1423, %f1196;
|
|
setp.eq.s32 %p109, %r1423, 1118925336;
|
|
add.s32 %r1424, %r1423, -1;
|
|
mov.b32 %f1200, %r1424;
|
|
add.f32 %f1201, %f1199, 0f37000000;
|
|
selp.f32 %f166, %f1201, %f1199, %p109;
|
|
selp.f32 %f1202, %f1200, %f1196, %p109;
|
|
mov.f32 %f1203, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1204, %f1202, %f1203;
|
|
cvt.rzi.f32.f32 %f1205, %f1204;
|
|
abs.f32 %f1206, %f1205;
|
|
setp.gt.f32 %p110, %f1206, 0f42FC0000;
|
|
mov.b32 %r1425, %f1205;
|
|
and.b32 %r1426, %r1425, -2147483648;
|
|
or.b32 %r1427, %r1426, 1123811328;
|
|
mov.b32 %f1207, %r1427;
|
|
selp.f32 %f1208, %f1207, %f1205, %p110;
|
|
mov.f32 %f1209, 0fBF317218;
|
|
fma.rn.f32 %f1210, %f1208, %f1209, %f1202;
|
|
mov.f32 %f1211, 0f3102E308;
|
|
fma.rn.f32 %f1212, %f1208, %f1211, %f1210;
|
|
mul.f32 %f1213, %f1212, 0f3FB8AA3B;
|
|
add.f32 %f1214, %f1208, 0f4B40007F;
|
|
mov.b32 %r1428, %f1214;
|
|
shl.b32 %r1429, %r1428, 23;
|
|
mov.b32 %f1215, %r1429;
|
|
ex2.approx.ftz.f32 %f1216, %f1213;
|
|
mul.f32 %f167, %f1216, %f1215;
|
|
setp.eq.f32 %p111, %f167, 0f7F800000;
|
|
mov.f32 %f1729, 0f7F800000;
|
|
@%p111 bra $L__BB0_83;
|
|
|
|
fma.rn.f32 %f1729, %f167, %f166, %f167;
|
|
|
|
$L__BB0_83:
|
|
setp.lt.f32 %p112, %f135, 0f00000000;
|
|
and.pred %p3, %p112, %p98;
|
|
setp.eq.f32 %p114, %f135, 0f00000000;
|
|
@%p114 bra $L__BB0_87;
|
|
bra.uni $L__BB0_84;
|
|
|
|
$L__BB0_87:
|
|
add.f32 %f1221, %f135, %f135;
|
|
selp.f32 %f1731, %f1221, 0f00000000, %p98;
|
|
bra.uni $L__BB0_88;
|
|
|
|
$L__BB0_84:
|
|
mov.b32 %r1430, %f1729;
|
|
xor.b32 %r1431, %r1430, -2147483648;
|
|
mov.b32 %f1217, %r1431;
|
|
selp.f32 %f1731, %f1217, %f1729, %p3;
|
|
setp.geu.f32 %p115, %f135, 0f00000000;
|
|
@%p115 bra $L__BB0_88;
|
|
|
|
mov.f32 %f1218, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1219, %f1218;
|
|
setp.eq.f32 %p116, %f1219, 0f3EE66666;
|
|
@%p116 bra $L__BB0_88;
|
|
|
|
mov.f32 %f1731, 0f7FFFFFFF;
|
|
|
|
$L__BB0_88:
|
|
add.f32 %f1222, %f165, 0f3EE66666;
|
|
mov.b32 %r1432, %f1222;
|
|
setp.lt.s32 %p118, %r1432, 2139095040;
|
|
@%p118 bra $L__BB0_93;
|
|
|
|
setp.gtu.f32 %p119, %f165, 0f7F800000;
|
|
@%p119 bra $L__BB0_92;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_92:
|
|
add.f32 %f1731, %f135, 0f3EE66666;
|
|
bra.uni $L__BB0_93;
|
|
|
|
$L__BB0_90:
|
|
setp.neu.f32 %p120, %f165, 0f7F800000;
|
|
@%p120 bra $L__BB0_93;
|
|
|
|
selp.f32 %f1731, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_93:
|
|
setp.eq.f32 %p121, %f135, 0f3F800000;
|
|
selp.f32 %f176, 0f3F800000, %f1731, %p121;
|
|
abs.f32 %f177, %f136;
|
|
setp.lt.f32 %p122, %f177, 0f00800000;
|
|
mul.f32 %f1224, %f177, 0f4B800000;
|
|
selp.f32 %f1225, %f1224, %f177, %p122;
|
|
selp.f32 %f1226, 0fC3170000, 0fC2FE0000, %p122;
|
|
mov.b32 %r1433, %f1225;
|
|
and.b32 %r1434, %r1433, 8388607;
|
|
or.b32 %r1435, %r1434, 1065353216;
|
|
mov.b32 %f1227, %r1435;
|
|
shr.u32 %r1436, %r1433, 23;
|
|
cvt.rn.f32.u32 %f1228, %r1436;
|
|
add.f32 %f1229, %f1226, %f1228;
|
|
setp.gt.f32 %p123, %f1227, 0f3FB504F3;
|
|
mul.f32 %f1230, %f1227, 0f3F000000;
|
|
add.f32 %f1231, %f1229, 0f3F800000;
|
|
selp.f32 %f1232, %f1231, %f1229, %p123;
|
|
selp.f32 %f1233, %f1230, %f1227, %p123;
|
|
add.f32 %f1234, %f1233, 0fBF800000;
|
|
add.f32 %f1235, %f1233, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1236, %f1235;
|
|
add.f32 %f1237, %f1234, %f1234;
|
|
mul.f32 %f1238, %f1237, %f1236;
|
|
mul.f32 %f1239, %f1238, %f1238;
|
|
mov.f32 %f1240, 0f3C4CAF63;
|
|
mov.f32 %f1241, 0f3B18F0FE;
|
|
fma.rn.f32 %f1242, %f1241, %f1239, %f1240;
|
|
mov.f32 %f1243, 0f3DAAAABD;
|
|
fma.rn.f32 %f1244, %f1242, %f1239, %f1243;
|
|
mul.rn.f32 %f1245, %f1244, %f1239;
|
|
mul.rn.f32 %f1246, %f1245, %f1238;
|
|
sub.f32 %f1247, %f1234, %f1238;
|
|
add.f32 %f1248, %f1247, %f1247;
|
|
neg.f32 %f1249, %f1238;
|
|
fma.rn.f32 %f1250, %f1249, %f1234, %f1248;
|
|
mul.rn.f32 %f1251, %f1236, %f1250;
|
|
add.f32 %f1252, %f1246, %f1238;
|
|
sub.f32 %f1253, %f1238, %f1252;
|
|
add.f32 %f1254, %f1246, %f1253;
|
|
add.f32 %f1255, %f1251, %f1254;
|
|
add.f32 %f1256, %f1252, %f1255;
|
|
sub.f32 %f1257, %f1252, %f1256;
|
|
add.f32 %f1258, %f1255, %f1257;
|
|
mov.f32 %f1259, 0f3F317200;
|
|
mul.rn.f32 %f1260, %f1232, %f1259;
|
|
mov.f32 %f1261, 0f35BFBE8E;
|
|
mul.rn.f32 %f1262, %f1232, %f1261;
|
|
add.f32 %f1263, %f1260, %f1256;
|
|
sub.f32 %f1264, %f1260, %f1263;
|
|
add.f32 %f1265, %f1256, %f1264;
|
|
add.f32 %f1266, %f1258, %f1265;
|
|
add.f32 %f1267, %f1262, %f1266;
|
|
add.f32 %f1268, %f1263, %f1267;
|
|
sub.f32 %f1269, %f1263, %f1268;
|
|
add.f32 %f1270, %f1267, %f1269;
|
|
mov.f32 %f1271, 0f3EE66666;
|
|
mul.rn.f32 %f1272, %f1271, %f1268;
|
|
neg.f32 %f1273, %f1272;
|
|
fma.rn.f32 %f1274, %f1271, %f1268, %f1273;
|
|
fma.rn.f32 %f1275, %f1271, %f1270, %f1274;
|
|
mov.f32 %f1276, 0f00000000;
|
|
fma.rn.f32 %f1277, %f1276, %f1268, %f1275;
|
|
add.rn.f32 %f1278, %f1272, %f1277;
|
|
neg.f32 %f1279, %f1278;
|
|
add.rn.f32 %f1280, %f1272, %f1279;
|
|
add.rn.f32 %f1281, %f1280, %f1277;
|
|
mov.b32 %r1437, %f1278;
|
|
setp.eq.s32 %p124, %r1437, 1118925336;
|
|
add.s32 %r1438, %r1437, -1;
|
|
mov.b32 %f1282, %r1438;
|
|
add.f32 %f1283, %f1281, 0f37000000;
|
|
selp.f32 %f178, %f1283, %f1281, %p124;
|
|
selp.f32 %f1284, %f1282, %f1278, %p124;
|
|
mov.f32 %f1285, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1286, %f1284, %f1285;
|
|
cvt.rzi.f32.f32 %f1287, %f1286;
|
|
abs.f32 %f1288, %f1287;
|
|
setp.gt.f32 %p125, %f1288, 0f42FC0000;
|
|
mov.b32 %r1439, %f1287;
|
|
and.b32 %r1440, %r1439, -2147483648;
|
|
or.b32 %r1441, %r1440, 1123811328;
|
|
mov.b32 %f1289, %r1441;
|
|
selp.f32 %f1290, %f1289, %f1287, %p125;
|
|
mov.f32 %f1291, 0fBF317218;
|
|
fma.rn.f32 %f1292, %f1290, %f1291, %f1284;
|
|
mov.f32 %f1293, 0f3102E308;
|
|
fma.rn.f32 %f1294, %f1290, %f1293, %f1292;
|
|
mul.f32 %f1295, %f1294, 0f3FB8AA3B;
|
|
add.f32 %f1296, %f1290, 0f4B40007F;
|
|
mov.b32 %r1442, %f1296;
|
|
shl.b32 %r1443, %r1442, 23;
|
|
mov.b32 %f1297, %r1443;
|
|
ex2.approx.ftz.f32 %f1298, %f1295;
|
|
mul.f32 %f179, %f1298, %f1297;
|
|
setp.eq.f32 %p126, %f179, 0f7F800000;
|
|
mov.f32 %f1732, 0f7F800000;
|
|
@%p126 bra $L__BB0_95;
|
|
|
|
fma.rn.f32 %f1732, %f179, %f178, %f179;
|
|
|
|
$L__BB0_95:
|
|
setp.lt.f32 %p127, %f136, 0f00000000;
|
|
and.pred %p4, %p127, %p98;
|
|
setp.eq.f32 %p129, %f136, 0f00000000;
|
|
@%p129 bra $L__BB0_99;
|
|
bra.uni $L__BB0_96;
|
|
|
|
$L__BB0_99:
|
|
add.f32 %f1303, %f136, %f136;
|
|
selp.f32 %f1734, %f1303, 0f00000000, %p98;
|
|
bra.uni $L__BB0_100;
|
|
|
|
$L__BB0_96:
|
|
mov.b32 %r1444, %f1732;
|
|
xor.b32 %r1445, %r1444, -2147483648;
|
|
mov.b32 %f1299, %r1445;
|
|
selp.f32 %f1734, %f1299, %f1732, %p4;
|
|
setp.geu.f32 %p130, %f136, 0f00000000;
|
|
@%p130 bra $L__BB0_100;
|
|
|
|
mov.f32 %f1300, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1301, %f1300;
|
|
setp.eq.f32 %p131, %f1301, 0f3EE66666;
|
|
@%p131 bra $L__BB0_100;
|
|
|
|
mov.f32 %f1734, 0f7FFFFFFF;
|
|
|
|
$L__BB0_100:
|
|
add.f32 %f1304, %f177, 0f3EE66666;
|
|
mov.b32 %r1446, %f1304;
|
|
setp.lt.s32 %p133, %r1446, 2139095040;
|
|
@%p133 bra $L__BB0_105;
|
|
|
|
setp.gtu.f32 %p134, %f177, 0f7F800000;
|
|
@%p134 bra $L__BB0_104;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_104:
|
|
add.f32 %f1734, %f136, 0f3EE66666;
|
|
bra.uni $L__BB0_105;
|
|
|
|
$L__BB0_102:
|
|
setp.neu.f32 %p135, %f177, 0f7F800000;
|
|
@%p135 bra $L__BB0_105;
|
|
|
|
selp.f32 %f1734, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_105:
|
|
setp.eq.f32 %p136, %f136, 0f3F800000;
|
|
mov.f32 %f1306, 0f3F800000;
|
|
selp.f32 %f1307, 0f3F800000, %f1734, %p136;
|
|
ld.const.u64 %rd89, [params+144];
|
|
cvta.to.global.u64 %rd18, %rd89;
|
|
ld.const.u32 %r1447, [params+136];
|
|
mad.lo.s32 %r1448, %r1447, %r6, %r5;
|
|
cvt.u64.u32 %rd19, %r1448;
|
|
min.f32 %f1308, %f164, %f1306;
|
|
mov.f32 %f1309, 0f00000000;
|
|
max.f32 %f188, %f1309, %f1308;
|
|
min.f32 %f1310, %f176, %f1306;
|
|
max.f32 %f189, %f1309, %f1310;
|
|
min.f32 %f1311, %f1307, %f1306;
|
|
max.f32 %f190, %f1309, %f1311;
|
|
mov.f32 %f1312, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1313, %f1312;
|
|
add.f32 %f1314, %f1313, %f1313;
|
|
mov.f32 %f1315, 0f3ED55555;
|
|
sub.f32 %f1316, %f1315, %f1314;
|
|
abs.f32 %f191, %f1316;
|
|
abs.f32 %f192, %f188;
|
|
setp.lt.f32 %p137, %f192, 0f00800000;
|
|
mul.f32 %f1317, %f192, 0f4B800000;
|
|
selp.f32 %f1318, %f1317, %f192, %p137;
|
|
selp.f32 %f1319, 0fC3170000, 0fC2FE0000, %p137;
|
|
mov.b32 %r1449, %f1318;
|
|
and.b32 %r1450, %r1449, 8388607;
|
|
or.b32 %r1451, %r1450, 1065353216;
|
|
mov.b32 %f1320, %r1451;
|
|
shr.u32 %r1452, %r1449, 23;
|
|
cvt.rn.f32.u32 %f1321, %r1452;
|
|
add.f32 %f1322, %f1319, %f1321;
|
|
setp.gt.f32 %p138, %f1320, 0f3FB504F3;
|
|
mul.f32 %f1323, %f1320, 0f3F000000;
|
|
add.f32 %f1324, %f1322, 0f3F800000;
|
|
selp.f32 %f1325, %f1324, %f1322, %p138;
|
|
selp.f32 %f1326, %f1323, %f1320, %p138;
|
|
add.f32 %f1327, %f1326, 0fBF800000;
|
|
add.f32 %f1328, %f1326, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1329, %f1328;
|
|
add.f32 %f1330, %f1327, %f1327;
|
|
mul.f32 %f1331, %f1330, %f1329;
|
|
mul.f32 %f1332, %f1331, %f1331;
|
|
mov.f32 %f1333, 0f3C4CAF63;
|
|
mov.f32 %f1334, 0f3B18F0FE;
|
|
fma.rn.f32 %f1335, %f1334, %f1332, %f1333;
|
|
mov.f32 %f1336, 0f3DAAAABD;
|
|
fma.rn.f32 %f1337, %f1335, %f1332, %f1336;
|
|
mul.rn.f32 %f1338, %f1337, %f1332;
|
|
mul.rn.f32 %f1339, %f1338, %f1331;
|
|
sub.f32 %f1340, %f1327, %f1331;
|
|
add.f32 %f1341, %f1340, %f1340;
|
|
neg.f32 %f1342, %f1331;
|
|
fma.rn.f32 %f1343, %f1342, %f1327, %f1341;
|
|
mul.rn.f32 %f1344, %f1329, %f1343;
|
|
add.f32 %f1345, %f1339, %f1331;
|
|
sub.f32 %f1346, %f1331, %f1345;
|
|
add.f32 %f1347, %f1339, %f1346;
|
|
add.f32 %f1348, %f1344, %f1347;
|
|
add.f32 %f1349, %f1345, %f1348;
|
|
sub.f32 %f1350, %f1345, %f1349;
|
|
add.f32 %f1351, %f1348, %f1350;
|
|
mov.f32 %f1352, 0f3F317200;
|
|
mul.rn.f32 %f1353, %f1325, %f1352;
|
|
mov.f32 %f1354, 0f35BFBE8E;
|
|
mul.rn.f32 %f1355, %f1325, %f1354;
|
|
add.f32 %f1356, %f1353, %f1349;
|
|
sub.f32 %f1357, %f1353, %f1356;
|
|
add.f32 %f1358, %f1349, %f1357;
|
|
add.f32 %f1359, %f1351, %f1358;
|
|
add.f32 %f1360, %f1355, %f1359;
|
|
add.f32 %f1361, %f1356, %f1360;
|
|
sub.f32 %f1362, %f1356, %f1361;
|
|
add.f32 %f1363, %f1360, %f1362;
|
|
mul.rn.f32 %f1364, %f1315, %f1361;
|
|
neg.f32 %f1365, %f1364;
|
|
fma.rn.f32 %f1366, %f1315, %f1361, %f1365;
|
|
fma.rn.f32 %f1367, %f1315, %f1363, %f1366;
|
|
fma.rn.f32 %f1368, %f1309, %f1361, %f1367;
|
|
add.rn.f32 %f1369, %f1364, %f1368;
|
|
neg.f32 %f1370, %f1369;
|
|
add.rn.f32 %f1371, %f1364, %f1370;
|
|
add.rn.f32 %f1372, %f1371, %f1368;
|
|
mov.b32 %r1453, %f1369;
|
|
setp.eq.s32 %p139, %r1453, 1118925336;
|
|
add.s32 %r1454, %r1453, -1;
|
|
mov.b32 %f1373, %r1454;
|
|
add.f32 %f1374, %f1372, 0f37000000;
|
|
selp.f32 %f193, %f1374, %f1372, %p139;
|
|
selp.f32 %f1375, %f1373, %f1369, %p139;
|
|
mov.f32 %f1376, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1377, %f1375, %f1376;
|
|
cvt.rzi.f32.f32 %f1378, %f1377;
|
|
abs.f32 %f1379, %f1378;
|
|
setp.gt.f32 %p140, %f1379, 0f42FC0000;
|
|
mov.b32 %r1455, %f1378;
|
|
and.b32 %r1456, %r1455, -2147483648;
|
|
or.b32 %r1457, %r1456, 1123811328;
|
|
mov.b32 %f1380, %r1457;
|
|
selp.f32 %f1381, %f1380, %f1378, %p140;
|
|
mov.f32 %f1382, 0fBF317218;
|
|
fma.rn.f32 %f1383, %f1381, %f1382, %f1375;
|
|
mov.f32 %f1384, 0f3102E308;
|
|
fma.rn.f32 %f1385, %f1381, %f1384, %f1383;
|
|
mul.f32 %f1386, %f1385, 0f3FB8AA3B;
|
|
add.f32 %f1387, %f1381, 0f4B40007F;
|
|
mov.b32 %r1458, %f1387;
|
|
shl.b32 %r1459, %r1458, 23;
|
|
mov.b32 %f1388, %r1459;
|
|
ex2.approx.ftz.f32 %f1389, %f1386;
|
|
mul.f32 %f194, %f1389, %f1388;
|
|
setp.eq.f32 %p141, %f194, 0f7F800000;
|
|
mov.f32 %f1735, 0f7F800000;
|
|
@%p141 bra $L__BB0_107;
|
|
|
|
fma.rn.f32 %f1735, %f194, %f193, %f194;
|
|
|
|
$L__BB0_107:
|
|
setp.lt.f32 %p142, %f188, 0f00000000;
|
|
setp.eq.f32 %p143, %f191, 0f3F800000;
|
|
and.pred %p5, %p142, %p143;
|
|
setp.eq.f32 %p144, %f188, 0f00000000;
|
|
@%p144 bra $L__BB0_111;
|
|
bra.uni $L__BB0_108;
|
|
|
|
$L__BB0_111:
|
|
add.f32 %f1394, %f188, %f188;
|
|
selp.f32 %f1737, %f1394, 0f00000000, %p143;
|
|
bra.uni $L__BB0_112;
|
|
|
|
$L__BB0_108:
|
|
mov.b32 %r1460, %f1735;
|
|
xor.b32 %r1461, %r1460, -2147483648;
|
|
mov.b32 %f1390, %r1461;
|
|
selp.f32 %f1737, %f1390, %f1735, %p5;
|
|
setp.geu.f32 %p145, %f188, 0f00000000;
|
|
@%p145 bra $L__BB0_112;
|
|
|
|
mov.f32 %f1391, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1392, %f1391;
|
|
setp.eq.f32 %p146, %f1392, 0f3ED55555;
|
|
@%p146 bra $L__BB0_112;
|
|
|
|
mov.f32 %f1737, 0f7FFFFFFF;
|
|
|
|
$L__BB0_112:
|
|
add.f32 %f1395, %f192, 0f3ED55555;
|
|
mov.b32 %r1462, %f1395;
|
|
setp.lt.s32 %p148, %r1462, 2139095040;
|
|
@%p148 bra $L__BB0_117;
|
|
|
|
setp.gtu.f32 %p149, %f192, 0f7F800000;
|
|
@%p149 bra $L__BB0_116;
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_116:
|
|
add.f32 %f1737, %f188, 0f3ED55555;
|
|
bra.uni $L__BB0_117;
|
|
|
|
$L__BB0_114:
|
|
setp.neu.f32 %p150, %f192, 0f7F800000;
|
|
@%p150 bra $L__BB0_117;
|
|
|
|
selp.f32 %f1737, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_117:
|
|
abs.f32 %f203, %f189;
|
|
setp.lt.f32 %p151, %f203, 0f00800000;
|
|
mul.f32 %f1397, %f203, 0f4B800000;
|
|
selp.f32 %f1398, %f1397, %f203, %p151;
|
|
selp.f32 %f1399, 0fC3170000, 0fC2FE0000, %p151;
|
|
mov.b32 %r1463, %f1398;
|
|
and.b32 %r1464, %r1463, 8388607;
|
|
or.b32 %r1465, %r1464, 1065353216;
|
|
mov.b32 %f1400, %r1465;
|
|
shr.u32 %r1466, %r1463, 23;
|
|
cvt.rn.f32.u32 %f1401, %r1466;
|
|
add.f32 %f1402, %f1399, %f1401;
|
|
setp.gt.f32 %p152, %f1400, 0f3FB504F3;
|
|
mul.f32 %f1403, %f1400, 0f3F000000;
|
|
add.f32 %f1404, %f1402, 0f3F800000;
|
|
selp.f32 %f1405, %f1404, %f1402, %p152;
|
|
selp.f32 %f1406, %f1403, %f1400, %p152;
|
|
add.f32 %f1407, %f1406, 0fBF800000;
|
|
add.f32 %f1408, %f1406, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1409, %f1408;
|
|
add.f32 %f1410, %f1407, %f1407;
|
|
mul.f32 %f1411, %f1410, %f1409;
|
|
mul.f32 %f1412, %f1411, %f1411;
|
|
mov.f32 %f1413, 0f3C4CAF63;
|
|
mov.f32 %f1414, 0f3B18F0FE;
|
|
fma.rn.f32 %f1415, %f1414, %f1412, %f1413;
|
|
mov.f32 %f1416, 0f3DAAAABD;
|
|
fma.rn.f32 %f1417, %f1415, %f1412, %f1416;
|
|
mul.rn.f32 %f1418, %f1417, %f1412;
|
|
mul.rn.f32 %f1419, %f1418, %f1411;
|
|
sub.f32 %f1420, %f1407, %f1411;
|
|
add.f32 %f1421, %f1420, %f1420;
|
|
neg.f32 %f1422, %f1411;
|
|
fma.rn.f32 %f1423, %f1422, %f1407, %f1421;
|
|
mul.rn.f32 %f1424, %f1409, %f1423;
|
|
add.f32 %f1425, %f1419, %f1411;
|
|
sub.f32 %f1426, %f1411, %f1425;
|
|
add.f32 %f1427, %f1419, %f1426;
|
|
add.f32 %f1428, %f1424, %f1427;
|
|
add.f32 %f1429, %f1425, %f1428;
|
|
sub.f32 %f1430, %f1425, %f1429;
|
|
add.f32 %f1431, %f1428, %f1430;
|
|
mov.f32 %f1432, 0f3F317200;
|
|
mul.rn.f32 %f1433, %f1405, %f1432;
|
|
mov.f32 %f1434, 0f35BFBE8E;
|
|
mul.rn.f32 %f1435, %f1405, %f1434;
|
|
add.f32 %f1436, %f1433, %f1429;
|
|
sub.f32 %f1437, %f1433, %f1436;
|
|
add.f32 %f1438, %f1429, %f1437;
|
|
add.f32 %f1439, %f1431, %f1438;
|
|
add.f32 %f1440, %f1435, %f1439;
|
|
add.f32 %f1441, %f1436, %f1440;
|
|
sub.f32 %f1442, %f1436, %f1441;
|
|
add.f32 %f1443, %f1440, %f1442;
|
|
mov.f32 %f1444, 0f3ED55555;
|
|
mul.rn.f32 %f1445, %f1444, %f1441;
|
|
neg.f32 %f1446, %f1445;
|
|
fma.rn.f32 %f1447, %f1444, %f1441, %f1446;
|
|
fma.rn.f32 %f1448, %f1444, %f1443, %f1447;
|
|
mov.f32 %f1449, 0f00000000;
|
|
fma.rn.f32 %f1450, %f1449, %f1441, %f1448;
|
|
add.rn.f32 %f1451, %f1445, %f1450;
|
|
neg.f32 %f1452, %f1451;
|
|
add.rn.f32 %f1453, %f1445, %f1452;
|
|
add.rn.f32 %f1454, %f1453, %f1450;
|
|
mov.b32 %r1467, %f1451;
|
|
setp.eq.s32 %p153, %r1467, 1118925336;
|
|
add.s32 %r1468, %r1467, -1;
|
|
mov.b32 %f1455, %r1468;
|
|
add.f32 %f1456, %f1454, 0f37000000;
|
|
selp.f32 %f204, %f1456, %f1454, %p153;
|
|
selp.f32 %f1457, %f1455, %f1451, %p153;
|
|
mov.f32 %f1458, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1459, %f1457, %f1458;
|
|
cvt.rzi.f32.f32 %f1460, %f1459;
|
|
abs.f32 %f1461, %f1460;
|
|
setp.gt.f32 %p154, %f1461, 0f42FC0000;
|
|
mov.b32 %r1469, %f1460;
|
|
and.b32 %r1470, %r1469, -2147483648;
|
|
or.b32 %r1471, %r1470, 1123811328;
|
|
mov.b32 %f1462, %r1471;
|
|
selp.f32 %f1463, %f1462, %f1460, %p154;
|
|
mov.f32 %f1464, 0fBF317218;
|
|
fma.rn.f32 %f1465, %f1463, %f1464, %f1457;
|
|
mov.f32 %f1466, 0f3102E308;
|
|
fma.rn.f32 %f1467, %f1463, %f1466, %f1465;
|
|
mul.f32 %f1468, %f1467, 0f3FB8AA3B;
|
|
add.f32 %f1469, %f1463, 0f4B40007F;
|
|
mov.b32 %r1472, %f1469;
|
|
shl.b32 %r1473, %r1472, 23;
|
|
mov.b32 %f1470, %r1473;
|
|
ex2.approx.ftz.f32 %f1471, %f1468;
|
|
mul.f32 %f205, %f1471, %f1470;
|
|
setp.eq.f32 %p155, %f205, 0f7F800000;
|
|
mov.f32 %f1738, 0f7F800000;
|
|
@%p155 bra $L__BB0_119;
|
|
|
|
fma.rn.f32 %f1738, %f205, %f204, %f205;
|
|
|
|
$L__BB0_119:
|
|
setp.lt.f32 %p156, %f189, 0f00000000;
|
|
and.pred %p6, %p156, %p143;
|
|
setp.eq.f32 %p158, %f189, 0f00000000;
|
|
@%p158 bra $L__BB0_123;
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_123:
|
|
add.f32 %f1476, %f189, %f189;
|
|
selp.f32 %f1740, %f1476, 0f00000000, %p143;
|
|
bra.uni $L__BB0_124;
|
|
|
|
$L__BB0_120:
|
|
mov.b32 %r1474, %f1738;
|
|
xor.b32 %r1475, %r1474, -2147483648;
|
|
mov.b32 %f1472, %r1475;
|
|
selp.f32 %f1740, %f1472, %f1738, %p6;
|
|
setp.geu.f32 %p159, %f189, 0f00000000;
|
|
@%p159 bra $L__BB0_124;
|
|
|
|
mov.f32 %f1473, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1474, %f1473;
|
|
setp.eq.f32 %p160, %f1474, 0f3ED55555;
|
|
@%p160 bra $L__BB0_124;
|
|
|
|
mov.f32 %f1740, 0f7FFFFFFF;
|
|
|
|
$L__BB0_124:
|
|
add.f32 %f1477, %f203, 0f3ED55555;
|
|
mov.b32 %r1476, %f1477;
|
|
setp.lt.s32 %p162, %r1476, 2139095040;
|
|
@%p162 bra $L__BB0_129;
|
|
|
|
setp.gtu.f32 %p163, %f203, 0f7F800000;
|
|
@%p163 bra $L__BB0_128;
|
|
bra.uni $L__BB0_126;
|
|
|
|
$L__BB0_128:
|
|
add.f32 %f1740, %f189, 0f3ED55555;
|
|
bra.uni $L__BB0_129;
|
|
|
|
$L__BB0_126:
|
|
setp.neu.f32 %p164, %f203, 0f7F800000;
|
|
@%p164 bra $L__BB0_129;
|
|
|
|
selp.f32 %f1740, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_129:
|
|
abs.f32 %f214, %f190;
|
|
setp.lt.f32 %p165, %f214, 0f00800000;
|
|
mul.f32 %f1479, %f214, 0f4B800000;
|
|
selp.f32 %f1480, %f1479, %f214, %p165;
|
|
selp.f32 %f1481, 0fC3170000, 0fC2FE0000, %p165;
|
|
mov.b32 %r1477, %f1480;
|
|
and.b32 %r1478, %r1477, 8388607;
|
|
or.b32 %r1479, %r1478, 1065353216;
|
|
mov.b32 %f1482, %r1479;
|
|
shr.u32 %r1480, %r1477, 23;
|
|
cvt.rn.f32.u32 %f1483, %r1480;
|
|
add.f32 %f1484, %f1481, %f1483;
|
|
setp.gt.f32 %p166, %f1482, 0f3FB504F3;
|
|
mul.f32 %f1485, %f1482, 0f3F000000;
|
|
add.f32 %f1486, %f1484, 0f3F800000;
|
|
selp.f32 %f1487, %f1486, %f1484, %p166;
|
|
selp.f32 %f1488, %f1485, %f1482, %p166;
|
|
add.f32 %f1489, %f1488, 0fBF800000;
|
|
add.f32 %f1490, %f1488, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1491, %f1490;
|
|
add.f32 %f1492, %f1489, %f1489;
|
|
mul.f32 %f1493, %f1492, %f1491;
|
|
mul.f32 %f1494, %f1493, %f1493;
|
|
mov.f32 %f1495, 0f3C4CAF63;
|
|
mov.f32 %f1496, 0f3B18F0FE;
|
|
fma.rn.f32 %f1497, %f1496, %f1494, %f1495;
|
|
mov.f32 %f1498, 0f3DAAAABD;
|
|
fma.rn.f32 %f1499, %f1497, %f1494, %f1498;
|
|
mul.rn.f32 %f1500, %f1499, %f1494;
|
|
mul.rn.f32 %f1501, %f1500, %f1493;
|
|
sub.f32 %f1502, %f1489, %f1493;
|
|
add.f32 %f1503, %f1502, %f1502;
|
|
neg.f32 %f1504, %f1493;
|
|
fma.rn.f32 %f1505, %f1504, %f1489, %f1503;
|
|
mul.rn.f32 %f1506, %f1491, %f1505;
|
|
add.f32 %f1507, %f1501, %f1493;
|
|
sub.f32 %f1508, %f1493, %f1507;
|
|
add.f32 %f1509, %f1501, %f1508;
|
|
add.f32 %f1510, %f1506, %f1509;
|
|
add.f32 %f1511, %f1507, %f1510;
|
|
sub.f32 %f1512, %f1507, %f1511;
|
|
add.f32 %f1513, %f1510, %f1512;
|
|
mov.f32 %f1514, 0f3F317200;
|
|
mul.rn.f32 %f1515, %f1487, %f1514;
|
|
mov.f32 %f1516, 0f35BFBE8E;
|
|
mul.rn.f32 %f1517, %f1487, %f1516;
|
|
add.f32 %f1518, %f1515, %f1511;
|
|
sub.f32 %f1519, %f1515, %f1518;
|
|
add.f32 %f1520, %f1511, %f1519;
|
|
add.f32 %f1521, %f1513, %f1520;
|
|
add.f32 %f1522, %f1517, %f1521;
|
|
add.f32 %f1523, %f1518, %f1522;
|
|
sub.f32 %f1524, %f1518, %f1523;
|
|
add.f32 %f1525, %f1522, %f1524;
|
|
mov.f32 %f1526, 0f3ED55555;
|
|
mul.rn.f32 %f1527, %f1526, %f1523;
|
|
neg.f32 %f1528, %f1527;
|
|
fma.rn.f32 %f1529, %f1526, %f1523, %f1528;
|
|
fma.rn.f32 %f1530, %f1526, %f1525, %f1529;
|
|
mov.f32 %f1531, 0f00000000;
|
|
fma.rn.f32 %f1532, %f1531, %f1523, %f1530;
|
|
add.rn.f32 %f1533, %f1527, %f1532;
|
|
neg.f32 %f1534, %f1533;
|
|
add.rn.f32 %f1535, %f1527, %f1534;
|
|
add.rn.f32 %f1536, %f1535, %f1532;
|
|
mov.b32 %r1481, %f1533;
|
|
setp.eq.s32 %p167, %r1481, 1118925336;
|
|
add.s32 %r1482, %r1481, -1;
|
|
mov.b32 %f1537, %r1482;
|
|
add.f32 %f1538, %f1536, 0f37000000;
|
|
selp.f32 %f215, %f1538, %f1536, %p167;
|
|
selp.f32 %f1539, %f1537, %f1533, %p167;
|
|
mov.f32 %f1540, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1541, %f1539, %f1540;
|
|
cvt.rzi.f32.f32 %f1542, %f1541;
|
|
abs.f32 %f1543, %f1542;
|
|
setp.gt.f32 %p168, %f1543, 0f42FC0000;
|
|
mov.b32 %r1483, %f1542;
|
|
and.b32 %r1484, %r1483, -2147483648;
|
|
or.b32 %r1485, %r1484, 1123811328;
|
|
mov.b32 %f1544, %r1485;
|
|
selp.f32 %f1545, %f1544, %f1542, %p168;
|
|
mov.f32 %f1546, 0fBF317218;
|
|
fma.rn.f32 %f1547, %f1545, %f1546, %f1539;
|
|
mov.f32 %f1548, 0f3102E308;
|
|
fma.rn.f32 %f1549, %f1545, %f1548, %f1547;
|
|
mul.f32 %f1550, %f1549, 0f3FB8AA3B;
|
|
add.f32 %f1551, %f1545, 0f4B40007F;
|
|
mov.b32 %r1486, %f1551;
|
|
shl.b32 %r1487, %r1486, 23;
|
|
mov.b32 %f1552, %r1487;
|
|
ex2.approx.ftz.f32 %f1553, %f1550;
|
|
mul.f32 %f216, %f1553, %f1552;
|
|
setp.eq.f32 %p169, %f216, 0f7F800000;
|
|
mov.f32 %f1741, 0f7F800000;
|
|
@%p169 bra $L__BB0_131;
|
|
|
|
fma.rn.f32 %f1741, %f216, %f215, %f216;
|
|
|
|
$L__BB0_131:
|
|
setp.lt.f32 %p170, %f190, 0f00000000;
|
|
and.pred %p7, %p170, %p143;
|
|
setp.eq.f32 %p172, %f190, 0f00000000;
|
|
@%p172 bra $L__BB0_135;
|
|
bra.uni $L__BB0_132;
|
|
|
|
$L__BB0_135:
|
|
add.f32 %f1558, %f190, %f190;
|
|
selp.f32 %f1743, %f1558, 0f00000000, %p143;
|
|
bra.uni $L__BB0_136;
|
|
|
|
$L__BB0_132:
|
|
mov.b32 %r1488, %f1741;
|
|
xor.b32 %r1489, %r1488, -2147483648;
|
|
mov.b32 %f1554, %r1489;
|
|
selp.f32 %f1743, %f1554, %f1741, %p7;
|
|
setp.geu.f32 %p173, %f190, 0f00000000;
|
|
@%p173 bra $L__BB0_136;
|
|
|
|
mov.f32 %f1555, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1556, %f1555;
|
|
setp.eq.f32 %p174, %f1556, 0f3ED55555;
|
|
@%p174 bra $L__BB0_136;
|
|
|
|
mov.f32 %f1743, 0f7FFFFFFF;
|
|
|
|
$L__BB0_136:
|
|
add.f32 %f1559, %f214, 0f3ED55555;
|
|
mov.b32 %r1490, %f1559;
|
|
setp.lt.s32 %p176, %r1490, 2139095040;
|
|
@%p176 bra $L__BB0_141;
|
|
|
|
setp.gtu.f32 %p177, %f214, 0f7F800000;
|
|
@%p177 bra $L__BB0_140;
|
|
bra.uni $L__BB0_138;
|
|
|
|
$L__BB0_140:
|
|
add.f32 %f1743, %f190, 0f3ED55555;
|
|
bra.uni $L__BB0_141;
|
|
|
|
$L__BB0_138:
|
|
setp.neu.f32 %p178, %f214, 0f7F800000;
|
|
@%p178 bra $L__BB0_141;
|
|
|
|
selp.f32 %f1743, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_141:
|
|
fma.rn.f32 %f1560, %f1737, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p179, %f188, 0f3F800000;
|
|
mov.f32 %f1561, 0f3F800000;
|
|
selp.f32 %f1562, 0f3F7FFFFF, %f1560, %p179;
|
|
mul.f32 %f1563, %f188, 0f414EB852;
|
|
setp.lt.f32 %p180, %f188, 0f3B4D2E1C;
|
|
selp.f32 %f1564, %f1563, %f1562, %p180;
|
|
fma.rn.f32 %f1565, %f1740, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p181, %f189, 0f3F800000;
|
|
selp.f32 %f1566, 0f3F7FFFFF, %f1565, %p181;
|
|
mul.f32 %f1567, %f189, 0f414EB852;
|
|
setp.lt.f32 %p182, %f189, 0f3B4D2E1C;
|
|
selp.f32 %f1568, %f1567, %f1566, %p182;
|
|
fma.rn.f32 %f1569, %f1743, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p183, %f190, 0f3F800000;
|
|
selp.f32 %f1570, 0f3F7FFFFF, %f1569, %p183;
|
|
mul.f32 %f1571, %f190, 0f414EB852;
|
|
setp.lt.f32 %p184, %f190, 0f3B4D2E1C;
|
|
selp.f32 %f1572, %f1571, %f1570, %p184;
|
|
min.f32 %f1573, %f1564, %f1561;
|
|
mov.f32 %f1574, 0f00000000;
|
|
max.f32 %f1575, %f1574, %f1573;
|
|
mul.f32 %f1576, %f1575, 0f43800000;
|
|
cvt.rzi.u32.f32 %r1491, %f1576;
|
|
min.u32 %r1492, %r1491, 255;
|
|
min.f32 %f1577, %f1568, %f1561;
|
|
max.f32 %f1578, %f1574, %f1577;
|
|
mul.f32 %f1579, %f1578, 0f43800000;
|
|
cvt.rzi.u32.f32 %r1493, %f1579;
|
|
min.u32 %r1494, %r1493, 255;
|
|
min.f32 %f1580, %f1572, %f1561;
|
|
max.f32 %f1581, %f1574, %f1580;
|
|
mul.f32 %f1582, %f1581, 0f43800000;
|
|
cvt.rzi.u32.f32 %r1495, %f1582;
|
|
min.u32 %r1496, %r1495, 255;
|
|
shl.b64 %rd90, %rd19, 2;
|
|
add.s64 %rd91, %rd18, %rd90;
|
|
cvt.u16.u32 %rs36, %r1496;
|
|
cvt.u16.u32 %rs37, %r1494;
|
|
cvt.u16.u32 %rs38, %r1492;
|
|
mov.u16 %rs39, 255;
|
|
st.global.v4.u8 [%rd91], {%rs38, %rs37, %rs36, %rs39};
|
|
|
|
$L__BB0_142:
|
|
and.b32 %r1497, %r58, 4;
|
|
setp.eq.s32 %p185, %r1497, 0;
|
|
ld.const.u32 %r1539, [params+108];
|
|
@%p185 bra $L__BB0_146;
|
|
|
|
setp.eq.s32 %p186, %r1539, 0;
|
|
ld.const.u64 %rd92, [params+224];
|
|
cvta.to.global.u64 %rd93, %rd92;
|
|
ld.const.u32 %r1498, [params+216];
|
|
mad.lo.s32 %r1499, %r1498, %r6, %r5;
|
|
mul.wide.u32 %rd94, %r1499, 8;
|
|
add.s64 %rd20, %rd93, %rd94;
|
|
@%p186 bra $L__BB0_145;
|
|
|
|
ld.global.v4.u16 {%rs47, %rs48, %rs49, %rs50}, [%rd20];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1583, %rs47;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1584, %rs48;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1585, %rs49;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1586, %f134, %f1583;
|
|
add.f32 %f1587, %f135, %f1584;
|
|
add.f32 %f1588, %f136, %f1585;
|
|
mov.f32 %f1589, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs45, %f1588;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs44, %f1587;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1586;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f1589;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd20], {%rs43, %rs44, %rs45, %rs46};
|
|
bra.uni $L__BB0_146;
|
|
|
|
$L__BB0_145:
|
|
mov.f32 %f1593, 0f3F800000;
|
|
mov.u32 %r1539, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f1593;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f136;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f135;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f134;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd20], {%rs51, %rs52, %rs53, %rs54};
|
|
|
|
$L__BB0_146:
|
|
ld.const.u64 %rd95, [params+256];
|
|
cvta.to.global.u64 %rd96, %rd95;
|
|
ld.const.u32 %r1501, [params+248];
|
|
mad.lo.s32 %r1502, %r1501, %r6, %r5;
|
|
mul.wide.u32 %rd97, %r1502, 8;
|
|
add.s64 %rd21, %rd96, %rd97;
|
|
setp.eq.s32 %p187, %r1539, 0;
|
|
@%p187 bra $L__BB0_148;
|
|
|
|
ld.global.v4.u16 {%rs62, %rs63, %rs64, %rs65}, [%rd21];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1594, %rs62;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1595, %rs63;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1596, %rs64;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1597, %f137, %f1594;
|
|
add.f32 %f1598, %f138, %f1595;
|
|
add.f32 %f1599, %f139, %f1596;
|
|
mov.f32 %f1600, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1599;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f1598;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1597;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs61, %f1600;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd21], {%rs58, %rs59, %rs60, %rs61};
|
|
bra.uni $L__BB0_149;
|
|
|
|
$L__BB0_148:
|
|
mov.f32 %f1604, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1604;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs68, %f139;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f138;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f137;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd21], {%rs66, %rs67, %rs68, %rs69};
|
|
|
|
$L__BB0_149:
|
|
mul.f32 %f1605, %f247, 0f3F000000;
|
|
mov.f32 %f1606, 0f3F000000;
|
|
sub.f32 %f225, %f1606, %f1605;
|
|
mul.f32 %f1607, %f248, 0f3F000000;
|
|
sub.f32 %f226, %f1606, %f1607;
|
|
mul.f32 %f1608, %f249, 0f3F000000;
|
|
sub.f32 %f227, %f1606, %f1608;
|
|
ld.const.u64 %rd98, [params+272];
|
|
cvta.to.global.u64 %rd99, %rd98;
|
|
ld.const.u32 %r1503, [params+264];
|
|
mad.lo.s32 %r1504, %r1503, %r6, %r5;
|
|
mul.wide.u32 %rd100, %r1504, 8;
|
|
add.s64 %rd22, %rd99, %rd100;
|
|
@%p187 bra $L__BB0_151;
|
|
|
|
ld.global.v4.u16 {%rs77, %rs78, %rs79, %rs80}, [%rd22];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1609, %rs77;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1610, %rs78;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1611, %rs79;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1612, %f225, %f1609;
|
|
add.f32 %f1613, %f225, %f1610;
|
|
add.f32 %f1614, %f225, %f1611;
|
|
mov.f32 %f1615, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs75, %f1614;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1613;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f1612;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f1615;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd22], {%rs73, %rs74, %rs75, %rs76};
|
|
bra.uni $L__BB0_152;
|
|
|
|
$L__BB0_151:
|
|
mov.f32 %f1619, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f1619;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f225;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f225;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f225;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd22], {%rs81, %rs82, %rs83, %rs84};
|
|
|
|
$L__BB0_152:
|
|
ld.const.u64 %rd101, [params+288];
|
|
cvta.to.global.u64 %rd102, %rd101;
|
|
ld.const.u32 %r1505, [params+280];
|
|
mad.lo.s32 %r1506, %r1505, %r6, %r5;
|
|
mul.wide.u32 %rd103, %r1506, 8;
|
|
add.s64 %rd23, %rd102, %rd103;
|
|
@%p187 bra $L__BB0_154;
|
|
|
|
ld.global.v4.u16 {%rs92, %rs93, %rs94, %rs95}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1620, %rs92;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1621, %rs93;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1622, %rs94;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1623, %f226, %f1620;
|
|
add.f32 %f1624, %f226, %f1621;
|
|
add.f32 %f1625, %f226, %f1622;
|
|
mov.f32 %f1626, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f1625;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1624;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1623;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f1626;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs88, %rs89, %rs90, %rs91};
|
|
bra.uni $L__BB0_155;
|
|
|
|
$L__BB0_154:
|
|
mov.f32 %f1630, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f1630;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs98, %f226;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f226;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f226;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs96, %rs97, %rs98, %rs99};
|
|
|
|
$L__BB0_155:
|
|
ld.const.u64 %rd104, [params+304];
|
|
cvta.to.global.u64 %rd105, %rd104;
|
|
ld.const.u32 %r1507, [params+296];
|
|
mad.lo.s32 %r1508, %r1507, %r6, %r5;
|
|
mul.wide.u32 %rd106, %r1508, 8;
|
|
add.s64 %rd24, %rd105, %rd106;
|
|
@%p187 bra $L__BB0_157;
|
|
|
|
ld.global.v4.u16 {%rs107, %rs108, %rs109, %rs110}, [%rd24];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1631, %rs107;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1632, %rs108;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1633, %rs109;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1634, %f227, %f1631;
|
|
add.f32 %f1635, %f227, %f1632;
|
|
add.f32 %f1636, %f227, %f1633;
|
|
mov.f32 %f1637, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs105, %f1636;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1635;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1634;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs106, %f1637;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs103, %rs104, %rs105, %rs106};
|
|
bra.uni $L__BB0_178;
|
|
|
|
$L__BB0_157:
|
|
mov.f32 %f1641, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs114, %f1641;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs113, %f227;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f227;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f227;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs111, %rs112, %rs113, %rs114};
|
|
|
|
$L__BB0_178:
|
|
ret;
|
|
|
|
}
|
|
|