2523 lines
74 KiB
Plaintext
2523 lines
74 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 uvtangent[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<145>;
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.reg .b16 %rs<161>;
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.reg .f32 %f<1560>;
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.reg .b32 %r<260>;
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.reg .b64 %rd<256>;
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mov.u64 %rd255, __local_depot0;
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cvta.local.u64 %SP, %rd255;
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ld.global.v2.u32 {%r36, %r37}, [pixelID];
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cvt.u64.u32 %rd13, %r36;
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cvt.u64.u32 %rd14, %r37;
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mov.u64 %rd17, uvnormal;
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cvta.global.u64 %rd12, %rd17;
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mov.u32 %r34, 2;
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mov.u32 %r35, 4;
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mov.u64 %rd16, 0;
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// inline asm
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call (%rd11), _rt_buffer_get_64, (%rd12, %r34, %r35, %rd13, %rd14, %rd16, %rd16);
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// inline asm
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ld.u32 %r1, [%rd11];
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shr.u32 %r40, %r1, 16;
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cvt.u16.u32 %rs1, %r40;
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and.b16 %rs8, %rs1, 255;
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cvt.u16.u32 %rs9, %r1;
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or.b16 %rs10, %rs9, %rs8;
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setp.eq.s16 %p8, %rs10, 0;
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mov.f32 %f1467, 0f00000000;
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mov.f32 %f1468, %f1467;
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mov.f32 %f1469, %f1467;
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@%p8 bra BB0_2;
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ld.u8 %rs11, [%rd11+1];
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and.b16 %rs13, %rs9, 255;
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cvt.rn.f32.u16 %f283, %rs13;
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div.rn.f32 %f284, %f283, 0f437F0000;
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fma.rn.f32 %f285, %f284, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f286, %rs11;
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div.rn.f32 %f287, %f286, 0f437F0000;
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fma.rn.f32 %f288, %f287, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f289, %rs8;
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div.rn.f32 %f290, %f289, 0f437F0000;
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fma.rn.f32 %f291, %f290, 0f40000000, 0fBF800000;
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mul.f32 %f292, %f288, %f288;
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fma.rn.f32 %f293, %f285, %f285, %f292;
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fma.rn.f32 %f294, %f291, %f291, %f293;
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sqrt.rn.f32 %f295, %f294;
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rcp.rn.f32 %f296, %f295;
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mul.f32 %f1467, %f285, %f296;
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mul.f32 %f1468, %f288, %f296;
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mul.f32 %f1469, %f291, %f296;
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BB0_2:
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ld.global.v2.u32 {%r41, %r42}, [pixelID];
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ld.global.v2.u32 {%r44, %r45}, [tileInfo];
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add.s32 %r2, %r41, %r44;
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add.s32 %r3, %r42, %r45;
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setp.eq.f32 %p9, %f1468, 0f00000000;
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setp.eq.f32 %p10, %f1467, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1469, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_114;
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bra.uni BB0_3;
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BB0_114:
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ld.global.u32 %r259, [imageEnabled];
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and.b32 %r215, %r259, 1;
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setp.eq.b32 %p137, %r215, 1;
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@!%p137 bra BB0_116;
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bra.uni BB0_115;
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BB0_115:
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cvt.u64.u32 %rd163, %r2;
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cvt.u64.u32 %rd164, %r3;
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mov.u64 %rd167, image;
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cvta.global.u64 %rd162, %rd167;
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// inline asm
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call (%rd161), _rt_buffer_get_64, (%rd162, %r34, %r35, %rd163, %rd164, %rd16, %rd16);
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// inline asm
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mov.u16 %rs105, 0;
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st.v4.u8 [%rd161], {%rs105, %rs105, %rs105, %rs105};
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ld.global.u32 %r259, [imageEnabled];
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BB0_116:
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and.b32 %r218, %r259, 8;
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setp.eq.s32 %p138, %r218, 0;
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@%p138 bra BB0_118;
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cvt.u64.u32 %rd171, %r3;
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cvt.u64.u32 %rd170, %r2;
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mov.u64 %rd174, image_Mask;
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cvta.global.u64 %rd169, %rd174;
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// inline asm
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call (%rd168), _rt_buffer_get_64, (%rd169, %r34, %r34, %rd170, %rd171, %rd16, %rd16);
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// inline asm
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mov.f32 %f1435, 0f00000000;
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cvt.rzi.u32.f32 %r221, %f1435;
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cvt.u16.u32 %rs106, %r221;
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mov.u16 %rs107, 0;
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st.v2.u8 [%rd168], {%rs106, %rs107};
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ld.global.u32 %r259, [imageEnabled];
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BB0_118:
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cvt.u64.u32 %rd9, %r2;
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cvt.u64.u32 %rd10, %r3;
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and.b32 %r222, %r259, 4;
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setp.eq.s32 %p139, %r222, 0;
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@%p139 bra BB0_122;
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ld.global.u32 %r223, [additive];
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setp.eq.s32 %p140, %r223, 0;
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@%p140 bra BB0_121;
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mov.u64 %rd187, image_HDR;
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cvta.global.u64 %rd176, %rd187;
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mov.u32 %r227, 8;
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// inline asm
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call (%rd175), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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ld.v4.u16 {%rs114, %rs115, %rs116, %rs117}, [%rd175];
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// inline asm
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{ cvt.f32.f16 %f1436, %rs114;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1437, %rs115;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1438, %rs116;}
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// inline asm
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// inline asm
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call (%rd181), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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add.f32 %f1439, %f1436, 0f00000000;
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add.f32 %f1440, %f1437, 0f00000000;
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add.f32 %f1441, %f1438, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs113, %f1441;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs112, %f1440;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs111, %f1439;}
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// inline asm
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mov.u16 %rs118, 0;
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st.v4.u16 [%rd181], {%rs111, %rs112, %rs113, %rs118};
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bra.uni BB0_122;
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BB0_3:
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ld.global.v2.u32 {%r53, %r54}, [pixelID];
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cvt.u64.u32 %rd20, %r53;
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cvt.u64.u32 %rd21, %r54;
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mov.u64 %rd30, uvpos;
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cvta.global.u64 %rd19, %rd30;
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mov.u32 %r50, 12;
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// inline asm
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call (%rd18), _rt_buffer_get_64, (%rd19, %r34, %r50, %rd20, %rd21, %rd16, %rd16);
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// inline asm
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ld.f32 %f9, [%rd18+8];
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ld.f32 %f8, [%rd18+4];
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ld.f32 %f7, [%rd18];
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mul.f32 %f300, %f7, 0f3456BF95;
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mul.f32 %f301, %f8, 0f3456BF95;
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mul.f32 %f302, %f9, 0f3456BF95;
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abs.f32 %f303, %f1467;
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div.rn.f32 %f304, %f300, %f303;
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abs.f32 %f305, %f1468;
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div.rn.f32 %f306, %f301, %f305;
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abs.f32 %f307, %f1469;
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div.rn.f32 %f308, %f302, %f307;
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abs.f32 %f309, %f304;
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abs.f32 %f310, %f306;
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abs.f32 %f311, %f308;
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mov.f32 %f312, 0f38D1B717;
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max.f32 %f313, %f309, %f312;
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max.f32 %f314, %f310, %f312;
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max.f32 %f315, %f311, %f312;
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fma.rn.f32 %f10, %f1467, %f313, %f7;
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fma.rn.f32 %f11, %f1468, %f314, %f8;
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fma.rn.f32 %f12, %f1469, %f315, %f9;
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ld.global.v2.u32 {%r57, %r58}, [pixelID];
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cvt.rn.f32.u32 %f13, %r57;
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cvt.rn.f32.u32 %f14, %r58;
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cvt.u64.u32 %rd26, %r57;
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cvt.u64.u32 %rd27, %r58;
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mov.u64 %rd31, uvtangent;
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cvta.global.u64 %rd25, %rd31;
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// inline asm
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call (%rd24), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd26, %rd27, %rd16, %rd16);
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// inline asm
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ld.u32 %r4, [%rd24];
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shr.u32 %r5, %r4, 16;
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cvt.u16.u32 %rs15, %r5;
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and.b16 %rs16, %rs15, 255;
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cvt.u16.u32 %rs17, %r4;
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or.b16 %rs18, %rs17, %rs16;
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setp.eq.s16 %p14, %rs18, 0;
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mov.f32 %f1479, 0f00000000;
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mov.f32 %f1470, %f1479;
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mov.f32 %f1471, %f1479;
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mov.f32 %f1472, %f1479;
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@%p14 bra BB0_5;
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ld.u8 %rs19, [%rd24+1];
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and.b16 %rs21, %rs17, 255;
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cvt.rn.f32.u16 %f316, %rs21;
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div.rn.f32 %f317, %f316, 0f437F0000;
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fma.rn.f32 %f318, %f317, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f319, %rs19;
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div.rn.f32 %f320, %f319, 0f437F0000;
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fma.rn.f32 %f321, %f320, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f322, %rs16;
|
|
div.rn.f32 %f323, %f322, 0f437F0000;
|
|
fma.rn.f32 %f324, %f323, 0f40000000, 0fBF800000;
|
|
mul.f32 %f325, %f321, %f321;
|
|
fma.rn.f32 %f326, %f318, %f318, %f325;
|
|
fma.rn.f32 %f327, %f324, %f324, %f326;
|
|
sqrt.rn.f32 %f328, %f327;
|
|
rcp.rn.f32 %f329, %f328;
|
|
mul.f32 %f1470, %f318, %f329;
|
|
mul.f32 %f1471, %f321, %f329;
|
|
mul.f32 %f1472, %f324, %f329;
|
|
|
|
BB0_5:
|
|
mul.f32 %f333, %f1469, %f1471;
|
|
mul.f32 %f334, %f1468, %f1472;
|
|
sub.f32 %f335, %f334, %f333;
|
|
mul.f32 %f336, %f1467, %f1472;
|
|
mul.f32 %f337, %f1469, %f1470;
|
|
sub.f32 %f338, %f337, %f336;
|
|
mul.f32 %f339, %f1468, %f1470;
|
|
mul.f32 %f340, %f1467, %f1471;
|
|
sub.f32 %f341, %f340, %f339;
|
|
setp.lt.u32 %p15, %r4, 16777216;
|
|
selp.f32 %f342, 0fBF800000, 0f3F800000, %p15;
|
|
mul.f32 %f343, %f335, %f342;
|
|
mul.f32 %f344, %f338, %f342;
|
|
mul.f32 %f345, %f341, %f342;
|
|
mul.f32 %f346, %f343, 0f00000000;
|
|
mul.f32 %f347, %f344, 0f00000000;
|
|
mul.f32 %f348, %f345, 0f00000000;
|
|
fma.rn.f32 %f349, %f1470, 0f3F5105EC, %f346;
|
|
fma.rn.f32 %f350, %f1471, 0f3F5105EC, %f347;
|
|
fma.rn.f32 %f351, %f1472, 0f3F5105EC, %f348;
|
|
mul.f32 %f21, %f1467, 0f3F13CD3A;
|
|
add.f32 %f22, %f21, %f349;
|
|
mul.f32 %f23, %f1468, 0f3F13CD3A;
|
|
add.f32 %f24, %f23, %f350;
|
|
mul.f32 %f25, %f1469, 0f3F13CD3A;
|
|
add.f32 %f26, %f25, %f351;
|
|
ld.global.v2.u32 {%r63, %r64}, [pixelID];
|
|
cvt.u64.u32 %rd34, %r63;
|
|
cvt.u64.u32 %rd35, %r64;
|
|
// inline asm
|
|
call (%rd32), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd34, %rd35, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r6, [%rd32];
|
|
shr.u32 %r7, %r6, 16;
|
|
cvt.u16.u32 %rs24, %r7;
|
|
and.b16 %rs25, %rs24, 255;
|
|
cvt.u16.u32 %rs26, %r6;
|
|
or.b16 %rs27, %rs26, %rs25;
|
|
setp.eq.s16 %p16, %rs27, 0;
|
|
mov.f32 %f1473, %f1479;
|
|
mov.f32 %f1474, %f1479;
|
|
mov.f32 %f1475, %f1479;
|
|
@%p16 bra BB0_7;
|
|
|
|
ld.u8 %rs28, [%rd32+1];
|
|
and.b16 %rs30, %rs26, 255;
|
|
cvt.rn.f32.u16 %f352, %rs30;
|
|
div.rn.f32 %f353, %f352, 0f437F0000;
|
|
fma.rn.f32 %f354, %f353, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f355, %rs28;
|
|
div.rn.f32 %f356, %f355, 0f437F0000;
|
|
fma.rn.f32 %f357, %f356, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f358, %rs25;
|
|
div.rn.f32 %f359, %f358, 0f437F0000;
|
|
fma.rn.f32 %f360, %f359, 0f40000000, 0fBF800000;
|
|
mul.f32 %f361, %f357, %f357;
|
|
fma.rn.f32 %f362, %f354, %f354, %f361;
|
|
fma.rn.f32 %f363, %f360, %f360, %f362;
|
|
sqrt.rn.f32 %f364, %f363;
|
|
rcp.rn.f32 %f365, %f364;
|
|
mul.f32 %f1473, %f354, %f365;
|
|
mul.f32 %f1474, %f357, %f365;
|
|
mul.f32 %f1475, %f360, %f365;
|
|
|
|
BB0_7:
|
|
mul.f32 %f369, %f1469, %f1474;
|
|
mul.f32 %f370, %f1468, %f1475;
|
|
sub.f32 %f371, %f370, %f369;
|
|
mul.f32 %f372, %f1467, %f1475;
|
|
mul.f32 %f373, %f1469, %f1473;
|
|
sub.f32 %f374, %f373, %f372;
|
|
mul.f32 %f375, %f1468, %f1473;
|
|
mul.f32 %f376, %f1467, %f1474;
|
|
sub.f32 %f377, %f376, %f375;
|
|
setp.lt.u32 %p17, %r6, 16777216;
|
|
selp.f32 %f378, 0fBF800000, 0f3F800000, %p17;
|
|
mul.f32 %f379, %f371, %f378;
|
|
mul.f32 %f380, %f374, %f378;
|
|
mul.f32 %f381, %f377, %f378;
|
|
mul.f32 %f382, %f379, 0f3F3504F3;
|
|
mul.f32 %f383, %f380, 0f3F3504F3;
|
|
mul.f32 %f384, %f381, 0f3F3504F3;
|
|
fma.rn.f32 %f385, %f1473, 0fBED105EC, %f382;
|
|
fma.rn.f32 %f386, %f1474, 0fBED105EC, %f383;
|
|
fma.rn.f32 %f387, %f1475, 0fBED105EC, %f384;
|
|
add.f32 %f33, %f21, %f385;
|
|
add.f32 %f34, %f23, %f386;
|
|
add.f32 %f35, %f25, %f387;
|
|
ld.global.v2.u32 {%r69, %r70}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r69;
|
|
cvt.u64.u32 %rd42, %r70;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd41, %rd42, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r8, [%rd39];
|
|
shr.u32 %r9, %r8, 16;
|
|
cvt.u16.u32 %rs33, %r9;
|
|
and.b16 %rs34, %rs33, 255;
|
|
cvt.u16.u32 %rs35, %r8;
|
|
or.b16 %rs36, %rs35, %rs34;
|
|
setp.eq.s16 %p18, %rs36, 0;
|
|
mov.f32 %f1476, %f1479;
|
|
mov.f32 %f1477, %f1479;
|
|
mov.f32 %f1478, %f1479;
|
|
@%p18 bra BB0_9;
|
|
|
|
ld.u8 %rs37, [%rd39+1];
|
|
and.b16 %rs39, %rs35, 255;
|
|
cvt.rn.f32.u16 %f388, %rs39;
|
|
div.rn.f32 %f389, %f388, 0f437F0000;
|
|
fma.rn.f32 %f390, %f389, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f391, %rs37;
|
|
div.rn.f32 %f392, %f391, 0f437F0000;
|
|
fma.rn.f32 %f393, %f392, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f394, %rs34;
|
|
div.rn.f32 %f395, %f394, 0f437F0000;
|
|
fma.rn.f32 %f396, %f395, 0f40000000, 0fBF800000;
|
|
mul.f32 %f397, %f393, %f393;
|
|
fma.rn.f32 %f398, %f390, %f390, %f397;
|
|
fma.rn.f32 %f399, %f396, %f396, %f398;
|
|
sqrt.rn.f32 %f400, %f399;
|
|
rcp.rn.f32 %f401, %f400;
|
|
mul.f32 %f1476, %f390, %f401;
|
|
mul.f32 %f1477, %f393, %f401;
|
|
mul.f32 %f1478, %f396, %f401;
|
|
|
|
BB0_9:
|
|
mul.f32 %f415, %f1469, %f1477;
|
|
mul.f32 %f416, %f1468, %f1478;
|
|
sub.f32 %f417, %f416, %f415;
|
|
mul.f32 %f418, %f1467, %f1478;
|
|
mul.f32 %f419, %f1469, %f1476;
|
|
sub.f32 %f420, %f419, %f418;
|
|
mul.f32 %f421, %f1468, %f1476;
|
|
mul.f32 %f422, %f1467, %f1477;
|
|
sub.f32 %f423, %f422, %f421;
|
|
setp.lt.u32 %p19, %r8, 16777216;
|
|
selp.f32 %f424, 0fBF800000, 0f3F800000, %p19;
|
|
mul.f32 %f425, %f417, %f424;
|
|
mul.f32 %f426, %f420, %f424;
|
|
mul.f32 %f427, %f423, %f424;
|
|
mul.f32 %f428, %f425, 0fBF3504F3;
|
|
mul.f32 %f429, %f426, 0fBF3504F3;
|
|
mul.f32 %f430, %f427, 0fBF3504F3;
|
|
fma.rn.f32 %f431, %f1476, 0fBED105EC, %f428;
|
|
fma.rn.f32 %f432, %f1477, 0fBED105EC, %f429;
|
|
fma.rn.f32 %f433, %f1478, 0fBED105EC, %f430;
|
|
add.f32 %f42, %f21, %f431;
|
|
add.f32 %f43, %f23, %f432;
|
|
add.f32 %f44, %f25, %f433;
|
|
mov.u64 %rd51, localLights;
|
|
cvta.global.u64 %rd50, %rd51;
|
|
mov.u32 %r73, 1;
|
|
mov.u32 %r74, 96;
|
|
// inline asm
|
|
call (%rd46, %rd47, %rd48, %rd49), _rt_buffer_get_size_64, (%rd50, %r73, %r74);
|
|
// inline asm
|
|
cvt.u32.u64 %r10, %rd46;
|
|
setp.eq.s32 %p20, %r10, 0;
|
|
mov.f32 %f1480, %f1479;
|
|
mov.f32 %f1481, %f1479;
|
|
mov.f32 %f1482, %f1479;
|
|
mov.f32 %f1483, %f1479;
|
|
mov.f32 %f1484, %f1479;
|
|
mov.f32 %f1485, %f1479;
|
|
mov.f32 %f1486, %f1479;
|
|
mov.f32 %f1487, %f1479;
|
|
mov.f32 %f1488, %f1479;
|
|
mov.f32 %f1489, %f1479;
|
|
mov.f32 %f1490, %f1479;
|
|
mov.f32 %f1491, %f1479;
|
|
@%p20 bra BB0_53;
|
|
|
|
mov.f32 %f447, 0f40000000;
|
|
cvt.rzi.f32.f32 %f448, %f447;
|
|
add.f32 %f449, %f448, %f448;
|
|
mov.f32 %f450, 0f40800000;
|
|
sub.f32 %f451, %f450, %f449;
|
|
abs.f32 %f45, %f451;
|
|
mul.f32 %f46, %f10, 0f3456BF95;
|
|
mul.f32 %f47, %f11, 0f3456BF95;
|
|
mul.f32 %f48, %f12, 0f3456BF95;
|
|
mul.f32 %f49, %f13, 0f3DD32618;
|
|
mul.f32 %f50, %f14, 0f3DD2F1AA;
|
|
mov.f32 %f446, 0f00000000;
|
|
mov.u32 %r251, 0;
|
|
abs.f32 %f676, %f46;
|
|
abs.f32 %f677, %f47;
|
|
max.f32 %f678, %f676, %f677;
|
|
abs.f32 %f679, %f48;
|
|
max.f32 %f680, %f678, %f679;
|
|
mov.f32 %f1479, %f446;
|
|
mov.f32 %f1480, %f446;
|
|
mov.f32 %f1481, %f446;
|
|
mov.f32 %f1482, %f446;
|
|
mov.f32 %f1483, %f446;
|
|
mov.f32 %f1484, %f446;
|
|
mov.f32 %f1485, %f446;
|
|
mov.f32 %f1486, %f446;
|
|
mov.f32 %f1487, %f446;
|
|
mov.f32 %f1488, %f446;
|
|
mov.f32 %f1489, %f446;
|
|
mov.f32 %f1490, %f446;
|
|
mov.f32 %f1491, %f446;
|
|
|
|
BB0_11:
|
|
cvt.u64.u32 %rd54, %r251;
|
|
// inline asm
|
|
call (%rd52), _rt_buffer_get_64, (%rd50, %r73, %r74, %rd54, %rd16, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.f32 {%f454, %f455, %f456, %f457}, [%rd52+80];
|
|
ld.v4.f32 {%f458, %f459, %f460, %f461}, [%rd52+64];
|
|
ld.v4.f32 {%f462, %f463, %f464, %f465}, [%rd52+48];
|
|
ld.v4.f32 {%f466, %f1500, %f1501, %f469}, [%rd52+32];
|
|
ld.v4.f32 {%f470, %f471, %f472, %f473}, [%rd52+16];
|
|
ld.v4.f32 {%f474, %f475, %f476, %f477}, [%rd52];
|
|
mov.b32 %r12, %f457;
|
|
sub.f32 %f88, %f475, %f7;
|
|
sub.f32 %f90, %f476, %f8;
|
|
sub.f32 %f92, %f477, %f9;
|
|
mul.f32 %f479, %f90, %f90;
|
|
fma.rn.f32 %f480, %f88, %f88, %f479;
|
|
fma.rn.f32 %f481, %f92, %f92, %f480;
|
|
sqrt.rn.f32 %f93, %f481;
|
|
rcp.rn.f32 %f482, %f93;
|
|
mul.f32 %f94, %f88, %f482;
|
|
mul.f32 %f95, %f90, %f482;
|
|
mul.f32 %f96, %f92, %f482;
|
|
mul.f32 %f97, %f93, %f473;
|
|
abs.f32 %f98, %f97;
|
|
setp.lt.f32 %p21, %f98, 0f00800000;
|
|
mul.f32 %f483, %f98, 0f4B800000;
|
|
selp.f32 %f484, 0fC3170000, 0fC2FE0000, %p21;
|
|
selp.f32 %f485, %f483, %f98, %p21;
|
|
mov.b32 %r78, %f485;
|
|
and.b32 %r79, %r78, 8388607;
|
|
or.b32 %r80, %r79, 1065353216;
|
|
mov.b32 %f486, %r80;
|
|
shr.u32 %r81, %r78, 23;
|
|
cvt.rn.f32.u32 %f487, %r81;
|
|
add.f32 %f488, %f484, %f487;
|
|
setp.gt.f32 %p22, %f486, 0f3FB504F3;
|
|
mul.f32 %f489, %f486, 0f3F000000;
|
|
add.f32 %f490, %f488, 0f3F800000;
|
|
selp.f32 %f491, %f489, %f486, %p22;
|
|
selp.f32 %f492, %f490, %f488, %p22;
|
|
add.f32 %f493, %f491, 0fBF800000;
|
|
add.f32 %f453, %f491, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f452,%f453;
|
|
// inline asm
|
|
add.f32 %f494, %f493, %f493;
|
|
mul.f32 %f495, %f452, %f494;
|
|
mul.f32 %f496, %f495, %f495;
|
|
mov.f32 %f497, 0f3C4CAF63;
|
|
mov.f32 %f498, 0f3B18F0FE;
|
|
fma.rn.f32 %f499, %f498, %f496, %f497;
|
|
mov.f32 %f500, 0f3DAAAABD;
|
|
fma.rn.f32 %f501, %f499, %f496, %f500;
|
|
mul.rn.f32 %f502, %f501, %f496;
|
|
mul.rn.f32 %f503, %f502, %f495;
|
|
sub.f32 %f504, %f493, %f495;
|
|
neg.f32 %f505, %f495;
|
|
add.f32 %f506, %f504, %f504;
|
|
fma.rn.f32 %f507, %f505, %f493, %f506;
|
|
mul.rn.f32 %f508, %f452, %f507;
|
|
add.f32 %f509, %f503, %f495;
|
|
sub.f32 %f510, %f495, %f509;
|
|
add.f32 %f511, %f503, %f510;
|
|
add.f32 %f512, %f508, %f511;
|
|
add.f32 %f513, %f509, %f512;
|
|
sub.f32 %f514, %f509, %f513;
|
|
add.f32 %f515, %f512, %f514;
|
|
mov.f32 %f516, 0f3F317200;
|
|
mul.rn.f32 %f517, %f492, %f516;
|
|
mov.f32 %f518, 0f35BFBE8E;
|
|
mul.rn.f32 %f519, %f492, %f518;
|
|
add.f32 %f520, %f517, %f513;
|
|
sub.f32 %f521, %f517, %f520;
|
|
add.f32 %f522, %f513, %f521;
|
|
add.f32 %f523, %f515, %f522;
|
|
add.f32 %f524, %f519, %f523;
|
|
add.f32 %f525, %f520, %f524;
|
|
sub.f32 %f526, %f520, %f525;
|
|
add.f32 %f527, %f524, %f526;
|
|
mul.rn.f32 %f99, %f450, %f525;
|
|
neg.f32 %f529, %f99;
|
|
fma.rn.f32 %f530, %f450, %f525, %f529;
|
|
fma.rn.f32 %f531, %f450, %f527, %f530;
|
|
fma.rn.f32 %f100, %f446, %f525, %f531;
|
|
add.rn.f32 %f101, %f99, %f100;
|
|
mov.b32 %r82, %f101;
|
|
setp.eq.s32 %p1, %r82, 1118925336;
|
|
add.s32 %r83, %r82, -1;
|
|
mov.b32 %f533, %r83;
|
|
selp.f32 %f534, %f533, %f101, %p1;
|
|
mul.f32 %f535, %f534, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f536, %f535;
|
|
mov.f32 %f537, 0fBF317200;
|
|
fma.rn.f32 %f538, %f536, %f537, %f534;
|
|
mov.f32 %f539, 0fB5BFBE8E;
|
|
fma.rn.f32 %f540, %f536, %f539, %f538;
|
|
mul.f32 %f541, %f540, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f542, %f541;
|
|
add.f32 %f543, %f536, 0f00000000;
|
|
ex2.approx.f32 %f544, %f543;
|
|
mul.f32 %f545, %f542, %f544;
|
|
setp.lt.f32 %p23, %f534, 0fC2D20000;
|
|
selp.f32 %f546, 0f00000000, %f545, %p23;
|
|
setp.gt.f32 %p24, %f534, 0f42D20000;
|
|
selp.f32 %f1492, 0f7F800000, %f546, %p24;
|
|
setp.eq.f32 %p25, %f1492, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
|
|
neg.f32 %f547, %f101;
|
|
add.rn.f32 %f548, %f99, %f547;
|
|
add.rn.f32 %f549, %f548, %f100;
|
|
add.f32 %f550, %f549, 0f37000000;
|
|
selp.f32 %f551, %f550, %f549, %p1;
|
|
fma.rn.f32 %f1492, %f1492, %f551, %f1492;
|
|
|
|
BB0_13:
|
|
setp.lt.f32 %p26, %f97, 0f00000000;
|
|
setp.eq.f32 %p27, %f45, 0f3F800000;
|
|
and.pred %p2, %p26, %p27;
|
|
mov.b32 %r84, %f1492;
|
|
xor.b32 %r85, %r84, -2147483648;
|
|
mov.b32 %f552, %r85;
|
|
selp.f32 %f1494, %f552, %f1492, %p2;
|
|
setp.eq.f32 %p28, %f97, 0f00000000;
|
|
@%p28 bra BB0_16;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_16:
|
|
add.f32 %f555, %f97, %f97;
|
|
selp.f32 %f1494, %f555, 0f00000000, %p27;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_14:
|
|
setp.geu.f32 %p29, %f97, 0f00000000;
|
|
@%p29 bra BB0_17;
|
|
|
|
cvt.rzi.f32.f32 %f554, %f450;
|
|
setp.neu.f32 %p30, %f554, 0f40800000;
|
|
selp.f32 %f1494, 0f7FFFFFFF, %f1494, %p30;
|
|
|
|
BB0_17:
|
|
add.f32 %f556, %f98, 0f40800000;
|
|
mov.b32 %r86, %f556;
|
|
setp.lt.s32 %p32, %r86, 2139095040;
|
|
@%p32 bra BB0_22;
|
|
|
|
setp.gtu.f32 %p33, %f98, 0f7F800000;
|
|
@%p33 bra BB0_21;
|
|
bra.uni BB0_19;
|
|
|
|
BB0_21:
|
|
add.f32 %f1494, %f97, 0f40800000;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_19:
|
|
setp.neu.f32 %p34, %f98, 0f7F800000;
|
|
@%p34 bra BB0_22;
|
|
|
|
selp.f32 %f1494, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_22:
|
|
mul.f32 %f557, %f93, %f471;
|
|
mov.f32 %f1520, 0f3F800000;
|
|
sub.f32 %f559, %f1520, %f1494;
|
|
setp.eq.f32 %p35, %f97, 0f3F800000;
|
|
selp.f32 %f560, 0f00000000, %f559, %p35;
|
|
cvt.sat.f32.f32 %f561, %f560;
|
|
fma.rn.f32 %f562, %f557, %f557, %f472;
|
|
div.rn.f32 %f127, %f561, %f562;
|
|
mul.f32 %f563, %f1468, %f95;
|
|
fma.rn.f32 %f564, %f1467, %f94, %f563;
|
|
fma.rn.f32 %f565, %f1469, %f96, %f564;
|
|
ld.global.u32 %r87, [ignoreNormal];
|
|
setp.eq.s32 %p36, %r87, 0;
|
|
selp.f32 %f566, %f565, 0f3F800000, %p36;
|
|
cvt.sat.f32.f32 %f128, %f566;
|
|
setp.eq.f32 %p37, %f474, 0f3F800000;
|
|
@%p37 bra BB0_29;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_29:
|
|
setp.leu.f32 %p41, %f469, 0f00000000;
|
|
@%p41 bra BB0_25;
|
|
|
|
setp.geu.f32 %p42, %f465, 0f00000000;
|
|
@%p42 bra BB0_31;
|
|
|
|
sub.f32 %f1466, %f477, %f9;
|
|
sub.f32 %f1465, %f475, %f7;
|
|
sub.f32 %f1464, %f476, %f8;
|
|
mul.f32 %f589, %f455, %f1464;
|
|
fma.rn.f32 %f590, %f454, %f1465, %f589;
|
|
fma.rn.f32 %f591, %f456, %f1466, %f590;
|
|
rcp.rn.f32 %f592, %f591;
|
|
mul.f32 %f1495, %f1465, %f592;
|
|
mul.f32 %f1496, %f1464, %f592;
|
|
mul.f32 %f1497, %f1466, %f592;
|
|
neg.f32 %f465, %f465;
|
|
bra.uni BB0_33;
|
|
|
|
BB0_23:
|
|
setp.eq.f32 %p38, %f474, 0f40000000;
|
|
@%p38 bra BB0_27;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_27:
|
|
setp.leu.f32 %p40, %f469, 0f00000000;
|
|
@%p40 bra BB0_25;
|
|
|
|
mul.f32 %f583, %f463, %f95;
|
|
fma.rn.f32 %f584, %f462, %f94, %f583;
|
|
mul.f32 %f585, %f459, %f95;
|
|
fma.rn.f32 %f586, %f458, %f94, %f585;
|
|
mul.f32 %f587, %f455, %f95;
|
|
fma.rn.f32 %f588, %f454, %f94, %f587;
|
|
fma.rn.f32 %f580, %f464, %f96, %f584;
|
|
fma.rn.f32 %f581, %f460, %f96, %f586;
|
|
fma.rn.f32 %f582, %f456, %f96, %f588;
|
|
cvt.rzi.s32.f32 %r88, %f469;
|
|
mov.u32 %r89, 6;
|
|
mov.u32 %r90, 0;
|
|
// inline asm
|
|
call (%f576, %f577, %f578, %f579), _rt_texture_get_base_id, (%r88, %r89, %f580, %f581, %f582, %r90);
|
|
// inline asm
|
|
mul.f32 %f1499, %f466, %f576;
|
|
mul.f32 %f1500, %f1500, %f577;
|
|
mul.f32 %f1501, %f1501, %f578;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_24:
|
|
setp.neu.f32 %p39, %f474, 0f40800000;
|
|
@%p39 bra BB0_25;
|
|
|
|
mul.f32 %f567, %f454, %f94;
|
|
mul.f32 %f568, %f455, %f95;
|
|
neg.f32 %f569, %f568;
|
|
sub.f32 %f570, %f569, %f567;
|
|
mul.f32 %f571, %f456, %f96;
|
|
sub.f32 %f572, %f570, %f571;
|
|
fma.rn.f32 %f573, %f469, %f572, %f465;
|
|
cvt.sat.f32.f32 %f574, %f573;
|
|
mul.f32 %f575, %f574, %f574;
|
|
mul.f32 %f1502, %f127, %f575;
|
|
mov.f32 %f1499, %f466;
|
|
bra.uni BB0_35;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1499, %f466;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_31:
|
|
mov.f32 %f1495, %f94;
|
|
mov.f32 %f1496, %f95;
|
|
mov.f32 %f1497, %f96;
|
|
|
|
BB0_33:
|
|
mul.f32 %f601, %f456, %f96;
|
|
mul.f32 %f602, %f455, %f95;
|
|
neg.f32 %f603, %f602;
|
|
mul.f32 %f604, %f454, %f94;
|
|
sub.f32 %f605, %f603, %f604;
|
|
sub.f32 %f606, %f605, %f601;
|
|
setp.gt.f32 %p43, %f606, 0f00000000;
|
|
selp.f32 %f607, 0f3F800000, 0f00000000, %p43;
|
|
mul.f32 %f608, %f463, %f1496;
|
|
fma.rn.f32 %f609, %f462, %f1495, %f608;
|
|
mul.f32 %f610, %f459, %f1496;
|
|
fma.rn.f32 %f611, %f458, %f1495, %f610;
|
|
fma.rn.f32 %f612, %f464, %f1497, %f609;
|
|
fma.rn.f32 %f613, %f460, %f1497, %f611;
|
|
fma.rn.f32 %f614, %f465, %f612, 0f3F000000;
|
|
mov.f32 %f615, 0f3F800000;
|
|
sub.f32 %f597, %f615, %f614;
|
|
fma.rn.f32 %f598, %f465, %f613, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r91, %f469;
|
|
mov.f32 %f600, 0f00000000;
|
|
// inline asm
|
|
call (%f593, %f594, %f595, %f596), _rt_texture_get_f_id, (%r91, %r34, %f597, %f598, %f600, %f600);
|
|
// inline asm
|
|
mul.f32 %f616, %f607, %f593;
|
|
mul.f32 %f617, %f607, %f594;
|
|
mul.f32 %f618, %f607, %f595;
|
|
mul.f32 %f1499, %f466, %f616;
|
|
mul.f32 %f1500, %f1500, %f617;
|
|
mul.f32 %f1501, %f1501, %f618;
|
|
|
|
BB0_34:
|
|
mov.f32 %f1502, %f127;
|
|
|
|
BB0_35:
|
|
max.f32 %f631, %f1499, %f1500;
|
|
max.f32 %f632, %f631, %f1501;
|
|
mul.f32 %f148, %f128, %f1502;
|
|
mul.f32 %f633, %f148, %f632;
|
|
setp.lt.f32 %p45, %f633, 0f3727C5AC;
|
|
mov.pred %p144, -1;
|
|
mov.f32 %f161, 0f00000000;
|
|
mov.f32 %f1504, %f161;
|
|
mov.f32 %f1505, %f161;
|
|
mov.f32 %f1506, %f161;
|
|
mov.f32 %f1507, %f161;
|
|
mov.f32 %f1508, %f161;
|
|
mov.f32 %f1509, %f161;
|
|
mov.f32 %f1510, %f161;
|
|
mov.f32 %f1511, %f161;
|
|
mov.f32 %f1512, %f161;
|
|
mov.f32 %f1513, %f161;
|
|
mov.f32 %f1514, %f161;
|
|
@%p45 bra BB0_37;
|
|
|
|
mul.f32 %f161, %f1499, %f148;
|
|
mul.f32 %f634, %f24, %f95;
|
|
fma.rn.f32 %f635, %f22, %f94, %f634;
|
|
fma.rn.f32 %f636, %f26, %f96, %f635;
|
|
cvt.sat.f32.f32 %f637, %f636;
|
|
mul.f32 %f638, %f1499, %f1502;
|
|
mul.f32 %f639, %f638, %f637;
|
|
mul.f32 %f640, %f1500, %f1502;
|
|
mul.f32 %f641, %f640, %f637;
|
|
mul.f32 %f642, %f1501, %f1502;
|
|
mul.f32 %f643, %f642, %f637;
|
|
mul.f32 %f644, %f34, %f95;
|
|
fma.rn.f32 %f645, %f33, %f94, %f644;
|
|
fma.rn.f32 %f646, %f35, %f96, %f645;
|
|
cvt.sat.f32.f32 %f647, %f646;
|
|
mul.f32 %f648, %f638, %f647;
|
|
mul.f32 %f649, %f640, %f647;
|
|
mul.f32 %f650, %f642, %f647;
|
|
mul.f32 %f651, %f43, %f95;
|
|
fma.rn.f32 %f652, %f42, %f94, %f651;
|
|
fma.rn.f32 %f653, %f44, %f96, %f652;
|
|
cvt.sat.f32.f32 %f654, %f653;
|
|
mul.f32 %f655, %f638, %f654;
|
|
mul.f32 %f656, %f640, %f654;
|
|
mul.f32 %f657, %f642, %f654;
|
|
add.f32 %f658, %f639, %f648;
|
|
add.f32 %f659, %f641, %f649;
|
|
add.f32 %f660, %f643, %f650;
|
|
add.f32 %f661, %f658, %f655;
|
|
add.f32 %f662, %f659, %f656;
|
|
add.f32 %f663, %f660, %f657;
|
|
mul.f32 %f664, %f661, 0f3F13CD3A;
|
|
mul.f32 %f665, %f662, 0f3F13CD3A;
|
|
mul.f32 %f666, %f663, 0f3F13CD3A;
|
|
div.rn.f32 %f667, %f161, %f664;
|
|
mul.f32 %f1504, %f1500, %f148;
|
|
div.rn.f32 %f668, %f1504, %f665;
|
|
mul.f32 %f1505, %f1501, %f148;
|
|
div.rn.f32 %f669, %f1505, %f666;
|
|
setp.eq.f32 %p47, %f161, 0f00000000;
|
|
selp.f32 %f670, 0f00000000, %f667, %p47;
|
|
setp.eq.f32 %p48, %f1504, 0f00000000;
|
|
selp.f32 %f671, 0f00000000, %f668, %p48;
|
|
setp.eq.f32 %p49, %f1505, 0f00000000;
|
|
selp.f32 %f672, 0f00000000, %f669, %p49;
|
|
mul.f32 %f1506, %f639, %f670;
|
|
mul.f32 %f1507, %f641, %f671;
|
|
mul.f32 %f1508, %f643, %f672;
|
|
mul.f32 %f1509, %f648, %f670;
|
|
mul.f32 %f1510, %f649, %f671;
|
|
mul.f32 %f1511, %f650, %f672;
|
|
mul.f32 %f1512, %f655, %f670;
|
|
mul.f32 %f1513, %f656, %f671;
|
|
mul.f32 %f1514, %f657, %f672;
|
|
mov.pred %p144, 0;
|
|
|
|
BB0_37:
|
|
@%p144 bra BB0_52;
|
|
|
|
setp.eq.s32 %p50, %r12, 0;
|
|
mov.u16 %rs160, 0;
|
|
@%p50 bra BB0_49;
|
|
|
|
abs.s32 %r14, %r12;
|
|
mov.f32 %f1519, 0f00000000;
|
|
setp.lt.s32 %p51, %r14, 1;
|
|
@%p51 bra BB0_48;
|
|
|
|
max.f32 %f174, %f680, %f312;
|
|
and.b32 %r15, %r14, 3;
|
|
setp.eq.s32 %p52, %r15, 0;
|
|
add.u64 %rd59, %SP, 0;
|
|
cvta.to.local.u64 %rd5, %rd59;
|
|
mov.f32 %f1519, 0f00000000;
|
|
mov.u32 %r255, 0;
|
|
@%p52 bra BB0_46;
|
|
|
|
setp.eq.s32 %p53, %r15, 1;
|
|
mov.f32 %f1516, 0f00000000;
|
|
mov.u32 %r253, 0;
|
|
@%p53 bra BB0_45;
|
|
|
|
setp.eq.s32 %p54, %r15, 2;
|
|
mov.f32 %f1515, 0f00000000;
|
|
mov.u32 %r252, 0;
|
|
@%p54 bra BB0_44;
|
|
|
|
cvt.rmi.f32.f32 %f692, %f49;
|
|
sub.f32 %f693, %f49, %f692;
|
|
cvt.rmi.f32.f32 %f694, %f50;
|
|
sub.f32 %f695, %f50, %f694;
|
|
add.f32 %f696, %f695, 0f420551EC;
|
|
add.f32 %f697, %f693, 0f420551EC;
|
|
mul.f32 %f698, %f693, %f696;
|
|
fma.rn.f32 %f699, %f695, %f697, %f698;
|
|
add.f32 %f700, %f699, 0f00000000;
|
|
add.f32 %f701, %f693, %f700;
|
|
add.f32 %f702, %f695, %f700;
|
|
add.f32 %f703, %f701, %f702;
|
|
mul.f32 %f704, %f700, %f703;
|
|
cvt.rmi.f32.f32 %f705, %f704;
|
|
sub.f32 %f706, %f704, %f705;
|
|
add.f32 %f707, %f701, %f701;
|
|
mul.f32 %f708, %f702, %f707;
|
|
cvt.rmi.f32.f32 %f709, %f708;
|
|
sub.f32 %f710, %f708, %f709;
|
|
mul.f32 %f711, %f701, %f703;
|
|
cvt.rmi.f32.f32 %f712, %f711;
|
|
sub.f32 %f713, %f711, %f712;
|
|
fma.rn.f32 %f714, %f706, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f715, %f710, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f716, %f713, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f717, %f470, %f714, %f475;
|
|
fma.rn.f32 %f718, %f470, %f715, %f476;
|
|
fma.rn.f32 %f719, %f470, %f716, %f477;
|
|
sub.f32 %f720, %f717, %f7;
|
|
sub.f32 %f721, %f718, %f8;
|
|
sub.f32 %f722, %f719, %f9;
|
|
mul.f32 %f723, %f721, %f721;
|
|
fma.rn.f32 %f724, %f720, %f720, %f723;
|
|
fma.rn.f32 %f725, %f722, %f722, %f724;
|
|
sqrt.rn.f32 %f691, %f725;
|
|
rcp.rn.f32 %f726, %f691;
|
|
mul.f32 %f687, %f726, %f720;
|
|
mul.f32 %f688, %f726, %f721;
|
|
mul.f32 %f689, %f726, %f722;
|
|
ld.global.u32 %r100, [imageEnabled];
|
|
and.b32 %r101, %r100, 32;
|
|
setp.eq.s32 %p55, %r101, 0;
|
|
selp.f32 %f727, 0f3F800000, 0f41200000, %p55;
|
|
mul.f32 %f690, %f727, %f174;
|
|
mov.u32 %r102, 1065353216;
|
|
st.local.u32 [%rd5], %r102;
|
|
ld.global.u32 %r96, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r96, %f10, %f11, %f12, %f687, %f688, %f689, %r73, %f690, %f691, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f728, [%rd5];
|
|
add.f32 %f1515, %f728, 0f00000000;
|
|
mov.u32 %r252, %r73;
|
|
|
|
BB0_44:
|
|
cvt.rn.f32.s32 %f737, %r252;
|
|
add.f32 %f738, %f13, %f737;
|
|
sub.f32 %f739, %f14, %f737;
|
|
mul.f32 %f740, %f738, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f741, %f740;
|
|
sub.f32 %f742, %f740, %f741;
|
|
mul.f32 %f743, %f739, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f744, %f743;
|
|
sub.f32 %f745, %f743, %f744;
|
|
mul.f32 %f746, %f737, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f747, %f746;
|
|
sub.f32 %f748, %f746, %f747;
|
|
add.f32 %f749, %f745, 0f420551EC;
|
|
add.f32 %f750, %f742, 0f420551EC;
|
|
add.f32 %f751, %f748, 0f420551EC;
|
|
mul.f32 %f752, %f742, %f749;
|
|
fma.rn.f32 %f753, %f745, %f750, %f752;
|
|
fma.rn.f32 %f754, %f748, %f751, %f753;
|
|
add.f32 %f755, %f742, %f754;
|
|
add.f32 %f756, %f745, %f754;
|
|
add.f32 %f757, %f748, %f754;
|
|
add.f32 %f758, %f755, %f756;
|
|
mul.f32 %f759, %f757, %f758;
|
|
cvt.rmi.f32.f32 %f760, %f759;
|
|
sub.f32 %f761, %f759, %f760;
|
|
add.f32 %f762, %f755, %f755;
|
|
mul.f32 %f763, %f756, %f762;
|
|
cvt.rmi.f32.f32 %f764, %f763;
|
|
sub.f32 %f765, %f763, %f764;
|
|
mul.f32 %f766, %f755, %f758;
|
|
cvt.rmi.f32.f32 %f767, %f766;
|
|
sub.f32 %f768, %f766, %f767;
|
|
fma.rn.f32 %f769, %f761, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f770, %f765, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f771, %f768, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f772, %f470, %f769, %f475;
|
|
fma.rn.f32 %f773, %f470, %f770, %f476;
|
|
fma.rn.f32 %f774, %f470, %f771, %f477;
|
|
sub.f32 %f775, %f772, %f7;
|
|
sub.f32 %f776, %f773, %f8;
|
|
sub.f32 %f777, %f774, %f9;
|
|
mul.f32 %f778, %f776, %f776;
|
|
fma.rn.f32 %f779, %f775, %f775, %f778;
|
|
fma.rn.f32 %f780, %f777, %f777, %f779;
|
|
sqrt.rn.f32 %f736, %f780;
|
|
rcp.rn.f32 %f781, %f736;
|
|
mul.f32 %f732, %f781, %f775;
|
|
mul.f32 %f733, %f781, %f776;
|
|
mul.f32 %f734, %f781, %f777;
|
|
ld.global.u32 %r106, [imageEnabled];
|
|
and.b32 %r107, %r106, 32;
|
|
setp.eq.s32 %p56, %r107, 0;
|
|
selp.f32 %f782, 0f3F800000, 0f41200000, %p56;
|
|
mul.f32 %f735, %f782, %f174;
|
|
mov.u32 %r108, 1065353216;
|
|
st.local.u32 [%rd5], %r108;
|
|
ld.global.u32 %r103, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r103, %f10, %f11, %f12, %f732, %f733, %f734, %r73, %f735, %f736, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f783, [%rd5];
|
|
add.f32 %f1516, %f1515, %f783;
|
|
add.s32 %r253, %r252, 1;
|
|
|
|
BB0_45:
|
|
cvt.rn.f32.s32 %f792, %r253;
|
|
add.f32 %f793, %f13, %f792;
|
|
sub.f32 %f794, %f14, %f792;
|
|
mul.f32 %f795, %f793, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f796, %f795;
|
|
sub.f32 %f797, %f795, %f796;
|
|
mul.f32 %f798, %f794, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f799, %f798;
|
|
sub.f32 %f800, %f798, %f799;
|
|
mul.f32 %f801, %f792, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f802, %f801;
|
|
sub.f32 %f803, %f801, %f802;
|
|
add.f32 %f804, %f800, 0f420551EC;
|
|
add.f32 %f805, %f797, 0f420551EC;
|
|
add.f32 %f806, %f803, 0f420551EC;
|
|
mul.f32 %f807, %f797, %f804;
|
|
fma.rn.f32 %f808, %f800, %f805, %f807;
|
|
fma.rn.f32 %f809, %f803, %f806, %f808;
|
|
add.f32 %f810, %f797, %f809;
|
|
add.f32 %f811, %f800, %f809;
|
|
add.f32 %f812, %f803, %f809;
|
|
add.f32 %f813, %f810, %f811;
|
|
mul.f32 %f814, %f812, %f813;
|
|
cvt.rmi.f32.f32 %f815, %f814;
|
|
sub.f32 %f816, %f814, %f815;
|
|
add.f32 %f817, %f810, %f810;
|
|
mul.f32 %f818, %f811, %f817;
|
|
cvt.rmi.f32.f32 %f819, %f818;
|
|
sub.f32 %f820, %f818, %f819;
|
|
mul.f32 %f821, %f810, %f813;
|
|
cvt.rmi.f32.f32 %f822, %f821;
|
|
sub.f32 %f823, %f821, %f822;
|
|
fma.rn.f32 %f824, %f816, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f825, %f820, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f826, %f823, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f827, %f470, %f824, %f475;
|
|
fma.rn.f32 %f828, %f470, %f825, %f476;
|
|
fma.rn.f32 %f829, %f470, %f826, %f477;
|
|
sub.f32 %f830, %f827, %f7;
|
|
sub.f32 %f831, %f828, %f8;
|
|
sub.f32 %f832, %f829, %f9;
|
|
mul.f32 %f833, %f831, %f831;
|
|
fma.rn.f32 %f834, %f830, %f830, %f833;
|
|
fma.rn.f32 %f835, %f832, %f832, %f834;
|
|
sqrt.rn.f32 %f791, %f835;
|
|
rcp.rn.f32 %f836, %f791;
|
|
mul.f32 %f787, %f836, %f830;
|
|
mul.f32 %f788, %f836, %f831;
|
|
mul.f32 %f789, %f836, %f832;
|
|
ld.global.u32 %r112, [imageEnabled];
|
|
and.b32 %r113, %r112, 32;
|
|
setp.eq.s32 %p57, %r113, 0;
|
|
selp.f32 %f837, 0f3F800000, 0f41200000, %p57;
|
|
mul.f32 %f790, %f837, %f174;
|
|
mov.u32 %r114, 1065353216;
|
|
st.local.u32 [%rd5], %r114;
|
|
ld.global.u32 %r109, [root];
|
|
mov.u32 %r110, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r109, %f10, %f11, %f12, %f787, %f788, %f789, %r110, %f790, %f791, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f838, [%rd5];
|
|
add.f32 %f1519, %f1516, %f838;
|
|
add.s32 %r255, %r253, 1;
|
|
|
|
BB0_46:
|
|
setp.lt.u32 %p58, %r14, 4;
|
|
@%p58 bra BB0_48;
|
|
|
|
BB0_47:
|
|
cvt.rn.f32.s32 %f871, %r255;
|
|
add.f32 %f872, %f13, %f871;
|
|
sub.f32 %f873, %f14, %f871;
|
|
mul.f32 %f874, %f872, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f875, %f874;
|
|
sub.f32 %f876, %f874, %f875;
|
|
mul.f32 %f877, %f873, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f878, %f877;
|
|
sub.f32 %f879, %f877, %f878;
|
|
mul.f32 %f880, %f871, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f881, %f880;
|
|
sub.f32 %f882, %f880, %f881;
|
|
add.f32 %f883, %f879, 0f420551EC;
|
|
add.f32 %f884, %f876, 0f420551EC;
|
|
add.f32 %f885, %f882, 0f420551EC;
|
|
mul.f32 %f886, %f876, %f883;
|
|
fma.rn.f32 %f887, %f879, %f884, %f886;
|
|
fma.rn.f32 %f888, %f882, %f885, %f887;
|
|
add.f32 %f889, %f876, %f888;
|
|
add.f32 %f890, %f879, %f888;
|
|
add.f32 %f891, %f882, %f888;
|
|
add.f32 %f892, %f889, %f890;
|
|
mul.f32 %f893, %f891, %f892;
|
|
cvt.rmi.f32.f32 %f894, %f893;
|
|
sub.f32 %f895, %f893, %f894;
|
|
add.f32 %f896, %f889, %f889;
|
|
mul.f32 %f897, %f890, %f896;
|
|
cvt.rmi.f32.f32 %f898, %f897;
|
|
sub.f32 %f899, %f897, %f898;
|
|
mul.f32 %f900, %f889, %f892;
|
|
cvt.rmi.f32.f32 %f901, %f900;
|
|
sub.f32 %f902, %f900, %f901;
|
|
fma.rn.f32 %f903, %f895, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f904, %f899, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f905, %f902, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f906, %f470, %f903, %f475;
|
|
fma.rn.f32 %f907, %f470, %f904, %f476;
|
|
fma.rn.f32 %f908, %f470, %f905, %f477;
|
|
sub.f32 %f909, %f906, %f7;
|
|
sub.f32 %f910, %f907, %f8;
|
|
sub.f32 %f911, %f908, %f9;
|
|
mul.f32 %f912, %f910, %f910;
|
|
fma.rn.f32 %f913, %f909, %f909, %f912;
|
|
fma.rn.f32 %f914, %f911, %f911, %f913;
|
|
sqrt.rn.f32 %f846, %f914;
|
|
rcp.rn.f32 %f915, %f846;
|
|
mul.f32 %f842, %f915, %f909;
|
|
mul.f32 %f843, %f915, %f910;
|
|
mul.f32 %f844, %f915, %f911;
|
|
ld.global.u32 %r127, [imageEnabled];
|
|
and.b32 %r128, %r127, 32;
|
|
setp.eq.s32 %p59, %r128, 0;
|
|
selp.f32 %f916, 0f3F800000, 0f41200000, %p59;
|
|
mul.f32 %f845, %f916, %f174;
|
|
mov.u32 %r129, 1065353216;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r115, [root];
|
|
mov.u32 %r125, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r115, %f10, %f11, %f12, %f842, %f843, %f844, %r125, %f845, %f846, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f917, [%rd5];
|
|
add.f32 %f918, %f1519, %f917;
|
|
add.s32 %r130, %r255, 1;
|
|
cvt.rn.f32.s32 %f919, %r130;
|
|
add.f32 %f920, %f13, %f919;
|
|
sub.f32 %f921, %f14, %f919;
|
|
mul.f32 %f922, %f920, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f923, %f922;
|
|
sub.f32 %f924, %f922, %f923;
|
|
mul.f32 %f925, %f921, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f926, %f925;
|
|
sub.f32 %f927, %f925, %f926;
|
|
mul.f32 %f928, %f919, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f929, %f928;
|
|
sub.f32 %f930, %f928, %f929;
|
|
add.f32 %f931, %f927, 0f420551EC;
|
|
add.f32 %f932, %f924, 0f420551EC;
|
|
add.f32 %f933, %f930, 0f420551EC;
|
|
mul.f32 %f934, %f924, %f931;
|
|
fma.rn.f32 %f935, %f927, %f932, %f934;
|
|
fma.rn.f32 %f936, %f930, %f933, %f935;
|
|
add.f32 %f937, %f924, %f936;
|
|
add.f32 %f938, %f927, %f936;
|
|
add.f32 %f939, %f930, %f936;
|
|
add.f32 %f940, %f937, %f938;
|
|
mul.f32 %f941, %f939, %f940;
|
|
cvt.rmi.f32.f32 %f942, %f941;
|
|
sub.f32 %f943, %f941, %f942;
|
|
add.f32 %f944, %f937, %f937;
|
|
mul.f32 %f945, %f938, %f944;
|
|
cvt.rmi.f32.f32 %f946, %f945;
|
|
sub.f32 %f947, %f945, %f946;
|
|
mul.f32 %f948, %f937, %f940;
|
|
cvt.rmi.f32.f32 %f949, %f948;
|
|
sub.f32 %f950, %f948, %f949;
|
|
fma.rn.f32 %f951, %f943, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f952, %f947, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f953, %f950, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f954, %f470, %f951, %f475;
|
|
fma.rn.f32 %f955, %f470, %f952, %f476;
|
|
fma.rn.f32 %f956, %f470, %f953, %f477;
|
|
sub.f32 %f957, %f954, %f7;
|
|
sub.f32 %f958, %f955, %f8;
|
|
sub.f32 %f959, %f956, %f9;
|
|
mul.f32 %f960, %f958, %f958;
|
|
fma.rn.f32 %f961, %f957, %f957, %f960;
|
|
fma.rn.f32 %f962, %f959, %f959, %f961;
|
|
sqrt.rn.f32 %f854, %f962;
|
|
rcp.rn.f32 %f963, %f854;
|
|
mul.f32 %f850, %f963, %f957;
|
|
mul.f32 %f851, %f963, %f958;
|
|
mul.f32 %f852, %f963, %f959;
|
|
ld.global.u32 %r131, [imageEnabled];
|
|
and.b32 %r132, %r131, 32;
|
|
setp.eq.s32 %p60, %r132, 0;
|
|
selp.f32 %f964, 0f3F800000, 0f41200000, %p60;
|
|
mul.f32 %f853, %f964, %f174;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r118, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r118, %f10, %f11, %f12, %f850, %f851, %f852, %r125, %f853, %f854, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f965, [%rd5];
|
|
add.f32 %f966, %f918, %f965;
|
|
add.s32 %r133, %r255, 2;
|
|
cvt.rn.f32.s32 %f967, %r133;
|
|
add.f32 %f968, %f13, %f967;
|
|
sub.f32 %f969, %f14, %f967;
|
|
mul.f32 %f970, %f968, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f971, %f970;
|
|
sub.f32 %f972, %f970, %f971;
|
|
mul.f32 %f973, %f969, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f974, %f973;
|
|
sub.f32 %f975, %f973, %f974;
|
|
mul.f32 %f976, %f967, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f977, %f976;
|
|
sub.f32 %f978, %f976, %f977;
|
|
add.f32 %f979, %f975, 0f420551EC;
|
|
add.f32 %f980, %f972, 0f420551EC;
|
|
add.f32 %f981, %f978, 0f420551EC;
|
|
mul.f32 %f982, %f972, %f979;
|
|
fma.rn.f32 %f983, %f975, %f980, %f982;
|
|
fma.rn.f32 %f984, %f978, %f981, %f983;
|
|
add.f32 %f985, %f972, %f984;
|
|
add.f32 %f986, %f975, %f984;
|
|
add.f32 %f987, %f978, %f984;
|
|
add.f32 %f988, %f985, %f986;
|
|
mul.f32 %f989, %f987, %f988;
|
|
cvt.rmi.f32.f32 %f990, %f989;
|
|
sub.f32 %f991, %f989, %f990;
|
|
add.f32 %f992, %f985, %f985;
|
|
mul.f32 %f993, %f986, %f992;
|
|
cvt.rmi.f32.f32 %f994, %f993;
|
|
sub.f32 %f995, %f993, %f994;
|
|
mul.f32 %f996, %f985, %f988;
|
|
cvt.rmi.f32.f32 %f997, %f996;
|
|
sub.f32 %f998, %f996, %f997;
|
|
fma.rn.f32 %f999, %f991, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1000, %f995, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1001, %f998, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1002, %f470, %f999, %f475;
|
|
fma.rn.f32 %f1003, %f470, %f1000, %f476;
|
|
fma.rn.f32 %f1004, %f470, %f1001, %f477;
|
|
sub.f32 %f1005, %f1002, %f7;
|
|
sub.f32 %f1006, %f1003, %f8;
|
|
sub.f32 %f1007, %f1004, %f9;
|
|
mul.f32 %f1008, %f1006, %f1006;
|
|
fma.rn.f32 %f1009, %f1005, %f1005, %f1008;
|
|
fma.rn.f32 %f1010, %f1007, %f1007, %f1009;
|
|
sqrt.rn.f32 %f862, %f1010;
|
|
rcp.rn.f32 %f1011, %f862;
|
|
mul.f32 %f858, %f1011, %f1005;
|
|
mul.f32 %f859, %f1011, %f1006;
|
|
mul.f32 %f860, %f1011, %f1007;
|
|
ld.global.u32 %r134, [imageEnabled];
|
|
and.b32 %r135, %r134, 32;
|
|
setp.eq.s32 %p61, %r135, 0;
|
|
selp.f32 %f1012, 0f3F800000, 0f41200000, %p61;
|
|
mul.f32 %f861, %f1012, %f174;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r121, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r121, %f10, %f11, %f12, %f858, %f859, %f860, %r125, %f861, %f862, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f1013, [%rd5];
|
|
add.f32 %f1014, %f966, %f1013;
|
|
add.s32 %r136, %r255, 3;
|
|
cvt.rn.f32.s32 %f1015, %r136;
|
|
add.f32 %f1016, %f13, %f1015;
|
|
sub.f32 %f1017, %f14, %f1015;
|
|
mul.f32 %f1018, %f1016, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f1019, %f1018;
|
|
sub.f32 %f1020, %f1018, %f1019;
|
|
mul.f32 %f1021, %f1017, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f1022, %f1021;
|
|
sub.f32 %f1023, %f1021, %f1022;
|
|
mul.f32 %f1024, %f1015, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f1025, %f1024;
|
|
sub.f32 %f1026, %f1024, %f1025;
|
|
add.f32 %f1027, %f1023, 0f420551EC;
|
|
add.f32 %f1028, %f1020, 0f420551EC;
|
|
add.f32 %f1029, %f1026, 0f420551EC;
|
|
mul.f32 %f1030, %f1020, %f1027;
|
|
fma.rn.f32 %f1031, %f1023, %f1028, %f1030;
|
|
fma.rn.f32 %f1032, %f1026, %f1029, %f1031;
|
|
add.f32 %f1033, %f1020, %f1032;
|
|
add.f32 %f1034, %f1023, %f1032;
|
|
add.f32 %f1035, %f1026, %f1032;
|
|
add.f32 %f1036, %f1033, %f1034;
|
|
mul.f32 %f1037, %f1035, %f1036;
|
|
cvt.rmi.f32.f32 %f1038, %f1037;
|
|
sub.f32 %f1039, %f1037, %f1038;
|
|
add.f32 %f1040, %f1033, %f1033;
|
|
mul.f32 %f1041, %f1034, %f1040;
|
|
cvt.rmi.f32.f32 %f1042, %f1041;
|
|
sub.f32 %f1043, %f1041, %f1042;
|
|
mul.f32 %f1044, %f1033, %f1036;
|
|
cvt.rmi.f32.f32 %f1045, %f1044;
|
|
sub.f32 %f1046, %f1044, %f1045;
|
|
fma.rn.f32 %f1047, %f1039, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1048, %f1043, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1049, %f1046, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1050, %f470, %f1047, %f475;
|
|
fma.rn.f32 %f1051, %f470, %f1048, %f476;
|
|
fma.rn.f32 %f1052, %f470, %f1049, %f477;
|
|
sub.f32 %f1053, %f1050, %f7;
|
|
sub.f32 %f1054, %f1051, %f8;
|
|
sub.f32 %f1055, %f1052, %f9;
|
|
mul.f32 %f1056, %f1054, %f1054;
|
|
fma.rn.f32 %f1057, %f1053, %f1053, %f1056;
|
|
fma.rn.f32 %f1058, %f1055, %f1055, %f1057;
|
|
sqrt.rn.f32 %f870, %f1058;
|
|
rcp.rn.f32 %f1059, %f870;
|
|
mul.f32 %f866, %f1059, %f1053;
|
|
mul.f32 %f867, %f1059, %f1054;
|
|
mul.f32 %f868, %f1059, %f1055;
|
|
ld.global.u32 %r137, [imageEnabled];
|
|
and.b32 %r138, %r137, 32;
|
|
setp.eq.s32 %p62, %r138, 0;
|
|
selp.f32 %f1060, 0f3F800000, 0f41200000, %p62;
|
|
mul.f32 %f869, %f1060, %f174;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r124, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r124, %f10, %f11, %f12, %f866, %f867, %f868, %r125, %f869, %f870, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f1061, [%rd5];
|
|
add.f32 %f1519, %f1014, %f1061;
|
|
add.s32 %r255, %r255, 4;
|
|
setp.lt.s32 %p63, %r255, %r14;
|
|
@%p63 bra BB0_47;
|
|
|
|
BB0_48:
|
|
cvt.rn.f32.s32 %f1062, %r14;
|
|
div.rn.f32 %f1520, %f1519, %f1062;
|
|
shr.u32 %r139, %r12, 31;
|
|
cvt.u16.u32 %rs160, %r139;
|
|
|
|
BB0_49:
|
|
fma.rn.f32 %f1491, %f161, %f1520, %f1491;
|
|
fma.rn.f32 %f1490, %f1504, %f1520, %f1490;
|
|
fma.rn.f32 %f1489, %f1505, %f1520, %f1489;
|
|
fma.rn.f32 %f1488, %f1506, %f1520, %f1488;
|
|
fma.rn.f32 %f1487, %f1507, %f1520, %f1487;
|
|
fma.rn.f32 %f1486, %f1508, %f1520, %f1486;
|
|
fma.rn.f32 %f1485, %f1509, %f1520, %f1485;
|
|
fma.rn.f32 %f1484, %f1510, %f1520, %f1484;
|
|
fma.rn.f32 %f1483, %f1511, %f1520, %f1483;
|
|
fma.rn.f32 %f1482, %f1512, %f1520, %f1482;
|
|
fma.rn.f32 %f1481, %f1513, %f1520, %f1481;
|
|
fma.rn.f32 %f1480, %f1514, %f1520, %f1480;
|
|
setp.eq.s16 %p64, %rs160, 0;
|
|
@%p64 bra BB0_51;
|
|
|
|
div.rn.f32 %f1063, %f161, %f466;
|
|
div.rn.f32 %f1064, %f1063, %f127;
|
|
cvt.sat.f32.f32 %f1065, %f1064;
|
|
mul.f32 %f1520, %f1520, %f1065;
|
|
|
|
BB0_51:
|
|
add.f32 %f1479, %f1479, %f1520;
|
|
|
|
BB0_52:
|
|
add.s32 %r251, %r251, 1;
|
|
setp.lt.u32 %p65, %r251, %r10;
|
|
@%p65 bra BB0_11;
|
|
|
|
BB0_53:
|
|
ld.global.u32 %r257, [imageEnabled];
|
|
and.b32 %r140, %r257, 8;
|
|
setp.eq.s32 %p66, %r140, 0;
|
|
@%p66 bra BB0_66;
|
|
|
|
cvt.sat.f32.f32 %f227, %f1479;
|
|
cvt.u64.u32 %rd70, %r3;
|
|
cvt.u64.u32 %rd69, %r2;
|
|
mov.u64 %rd73, image_Mask;
|
|
cvta.global.u64 %rd68, %rd73;
|
|
// inline asm
|
|
call (%rd67), _rt_buffer_get_64, (%rd68, %r34, %r34, %rd69, %rd70, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1068, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1069, %f1068;
|
|
fma.rn.f32 %f1070, %f1069, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f228, %f1070;
|
|
abs.f32 %f229, %f227;
|
|
setp.lt.f32 %p67, %f229, 0f00800000;
|
|
mul.f32 %f1071, %f229, 0f4B800000;
|
|
selp.f32 %f1072, 0fC3170000, 0fC2FE0000, %p67;
|
|
selp.f32 %f1073, %f1071, %f229, %p67;
|
|
mov.b32 %r143, %f1073;
|
|
and.b32 %r144, %r143, 8388607;
|
|
or.b32 %r145, %r144, 1065353216;
|
|
mov.b32 %f1074, %r145;
|
|
shr.u32 %r146, %r143, 23;
|
|
cvt.rn.f32.u32 %f1075, %r146;
|
|
add.f32 %f1076, %f1072, %f1075;
|
|
setp.gt.f32 %p68, %f1074, 0f3FB504F3;
|
|
mul.f32 %f1077, %f1074, 0f3F000000;
|
|
add.f32 %f1078, %f1076, 0f3F800000;
|
|
selp.f32 %f1079, %f1077, %f1074, %p68;
|
|
selp.f32 %f1080, %f1078, %f1076, %p68;
|
|
add.f32 %f1081, %f1079, 0fBF800000;
|
|
add.f32 %f1067, %f1079, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1066,%f1067;
|
|
// inline asm
|
|
add.f32 %f1082, %f1081, %f1081;
|
|
mul.f32 %f1083, %f1066, %f1082;
|
|
mul.f32 %f1084, %f1083, %f1083;
|
|
mov.f32 %f1085, 0f3C4CAF63;
|
|
mov.f32 %f1086, 0f3B18F0FE;
|
|
fma.rn.f32 %f1087, %f1086, %f1084, %f1085;
|
|
mov.f32 %f1088, 0f3DAAAABD;
|
|
fma.rn.f32 %f1089, %f1087, %f1084, %f1088;
|
|
mul.rn.f32 %f1090, %f1089, %f1084;
|
|
mul.rn.f32 %f1091, %f1090, %f1083;
|
|
sub.f32 %f1092, %f1081, %f1083;
|
|
neg.f32 %f1093, %f1083;
|
|
add.f32 %f1094, %f1092, %f1092;
|
|
fma.rn.f32 %f1095, %f1093, %f1081, %f1094;
|
|
mul.rn.f32 %f1096, %f1066, %f1095;
|
|
add.f32 %f1097, %f1091, %f1083;
|
|
sub.f32 %f1098, %f1083, %f1097;
|
|
add.f32 %f1099, %f1091, %f1098;
|
|
add.f32 %f1100, %f1096, %f1099;
|
|
add.f32 %f1101, %f1097, %f1100;
|
|
sub.f32 %f1102, %f1097, %f1101;
|
|
add.f32 %f1103, %f1100, %f1102;
|
|
mov.f32 %f1104, 0f3F317200;
|
|
mul.rn.f32 %f1105, %f1080, %f1104;
|
|
mov.f32 %f1106, 0f35BFBE8E;
|
|
mul.rn.f32 %f1107, %f1080, %f1106;
|
|
add.f32 %f1108, %f1105, %f1101;
|
|
sub.f32 %f1109, %f1105, %f1108;
|
|
add.f32 %f1110, %f1101, %f1109;
|
|
add.f32 %f1111, %f1103, %f1110;
|
|
add.f32 %f1112, %f1107, %f1111;
|
|
add.f32 %f1113, %f1108, %f1112;
|
|
sub.f32 %f1114, %f1108, %f1113;
|
|
add.f32 %f1115, %f1112, %f1114;
|
|
mov.f32 %f1116, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1117, %f1116, %f1113;
|
|
neg.f32 %f1118, %f1117;
|
|
fma.rn.f32 %f1119, %f1116, %f1113, %f1118;
|
|
fma.rn.f32 %f1120, %f1116, %f1115, %f1119;
|
|
mov.f32 %f1121, 0f00000000;
|
|
fma.rn.f32 %f1122, %f1121, %f1113, %f1120;
|
|
add.rn.f32 %f1123, %f1117, %f1122;
|
|
neg.f32 %f1124, %f1123;
|
|
add.rn.f32 %f1125, %f1117, %f1124;
|
|
add.rn.f32 %f1126, %f1125, %f1122;
|
|
mov.b32 %r147, %f1123;
|
|
setp.eq.s32 %p69, %r147, 1118925336;
|
|
add.s32 %r148, %r147, -1;
|
|
mov.b32 %f1127, %r148;
|
|
add.f32 %f1128, %f1126, 0f37000000;
|
|
selp.f32 %f1129, %f1127, %f1123, %p69;
|
|
selp.f32 %f230, %f1128, %f1126, %p69;
|
|
mul.f32 %f1130, %f1129, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1131, %f1130;
|
|
mov.f32 %f1132, 0fBF317200;
|
|
fma.rn.f32 %f1133, %f1131, %f1132, %f1129;
|
|
mov.f32 %f1134, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1135, %f1131, %f1134, %f1133;
|
|
mul.f32 %f1136, %f1135, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1137, %f1136;
|
|
add.f32 %f1138, %f1131, 0f00000000;
|
|
ex2.approx.f32 %f1139, %f1138;
|
|
mul.f32 %f1140, %f1137, %f1139;
|
|
setp.lt.f32 %p70, %f1129, 0fC2D20000;
|
|
selp.f32 %f1141, 0f00000000, %f1140, %p70;
|
|
setp.gt.f32 %p71, %f1129, 0f42D20000;
|
|
selp.f32 %f1548, 0f7F800000, %f1141, %p71;
|
|
setp.eq.f32 %p72, %f1548, 0f7F800000;
|
|
@%p72 bra BB0_56;
|
|
|
|
fma.rn.f32 %f1548, %f1548, %f230, %f1548;
|
|
|
|
BB0_56:
|
|
setp.lt.f32 %p73, %f227, 0f00000000;
|
|
setp.eq.f32 %p74, %f228, 0f3F800000;
|
|
and.pred %p4, %p73, %p74;
|
|
mov.b32 %r149, %f1548;
|
|
xor.b32 %r150, %r149, -2147483648;
|
|
mov.b32 %f1142, %r150;
|
|
selp.f32 %f1550, %f1142, %f1548, %p4;
|
|
setp.eq.f32 %p75, %f227, 0f00000000;
|
|
@%p75 bra BB0_59;
|
|
bra.uni BB0_57;
|
|
|
|
BB0_59:
|
|
add.f32 %f1145, %f227, %f227;
|
|
selp.f32 %f1550, %f1145, 0f00000000, %p74;
|
|
bra.uni BB0_60;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd194, image_HDR;
|
|
cvta.global.u64 %rd189, %rd194;
|
|
mov.u32 %r229, 8;
|
|
// inline asm
|
|
call (%rd188), _rt_buffer_get_64, (%rd189, %r34, %r229, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1442, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs119, %f1442;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs120, 0;
|
|
st.v4.u16 [%rd188], {%rs119, %rs119, %rs119, %rs120};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r230, [additive];
|
|
setp.eq.s32 %p141, %r230, 0;
|
|
@%p141 bra BB0_124;
|
|
|
|
mov.u64 %rd207, image_RNM0;
|
|
cvta.global.u64 %rd196, %rd207;
|
|
mov.u32 %r234, 8;
|
|
// inline asm
|
|
call (%rd195), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs127, %rs128, %rs129, %rs130}, [%rd195];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1443, %rs127;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1444, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1445, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd201), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1446, %f1443, 0f00000000;
|
|
add.f32 %f1447, %f1444, 0f00000000;
|
|
add.f32 %f1448, %f1445, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1448;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1447;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f1446;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs131, 0;
|
|
st.v4.u16 [%rd201], {%rs124, %rs125, %rs126, %rs131};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd214, image_RNM0;
|
|
cvta.global.u64 %rd209, %rd214;
|
|
mov.u32 %r236, 8;
|
|
// inline asm
|
|
call (%rd208), _rt_buffer_get_64, (%rd209, %r34, %r236, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1449, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1449;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs133, 0;
|
|
st.v4.u16 [%rd208], {%rs132, %rs132, %rs132, %rs133};
|
|
|
|
BB0_125:
|
|
ld.global.u32 %r237, [additive];
|
|
setp.eq.s32 %p142, %r237, 0;
|
|
@%p142 bra BB0_127;
|
|
|
|
mov.u64 %rd227, image_RNM1;
|
|
cvta.global.u64 %rd216, %rd227;
|
|
mov.u32 %r241, 8;
|
|
// inline asm
|
|
call (%rd215), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs140, %rs141, %rs142, %rs143}, [%rd215];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1450, %rs140;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1451, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1452, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd221), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1453, %f1450, 0f00000000;
|
|
add.f32 %f1454, %f1451, 0f00000000;
|
|
add.f32 %f1455, %f1452, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1455;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1454;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f1453;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs144, 0;
|
|
st.v4.u16 [%rd221], {%rs137, %rs138, %rs139, %rs144};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_127:
|
|
mov.u64 %rd234, image_RNM1;
|
|
cvta.global.u64 %rd229, %rd234;
|
|
mov.u32 %r243, 8;
|
|
// inline asm
|
|
call (%rd228), _rt_buffer_get_64, (%rd229, %r34, %r243, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1456, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1456;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs146, 0;
|
|
st.v4.u16 [%rd228], {%rs145, %rs145, %rs145, %rs146};
|
|
|
|
BB0_128:
|
|
ld.global.u32 %r244, [additive];
|
|
setp.eq.s32 %p143, %r244, 0;
|
|
@%p143 bra BB0_130;
|
|
|
|
mov.u64 %rd247, image_RNM2;
|
|
cvta.global.u64 %rd236, %rd247;
|
|
mov.u32 %r248, 8;
|
|
// inline asm
|
|
call (%rd235), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs153, %rs154, %rs155, %rs156}, [%rd235];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1457, %rs153;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1458, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1459, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd241), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1460, %f1457, 0f00000000;
|
|
add.f32 %f1461, %f1458, 0f00000000;
|
|
add.f32 %f1462, %f1459, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1462;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1461;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f1460;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs157, 0;
|
|
st.v4.u16 [%rd241], {%rs150, %rs151, %rs152, %rs157};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_130:
|
|
mov.u64 %rd254, image_RNM2;
|
|
cvta.global.u64 %rd249, %rd254;
|
|
mov.u32 %r250, 8;
|
|
// inline asm
|
|
call (%rd248), _rt_buffer_get_64, (%rd249, %r34, %r250, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1463, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1463;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs159, 0;
|
|
st.v4.u16 [%rd248], {%rs158, %rs158, %rs158, %rs159};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_57:
|
|
setp.geu.f32 %p76, %f227, 0f00000000;
|
|
@%p76 bra BB0_60;
|
|
|
|
cvt.rzi.f32.f32 %f1144, %f1116;
|
|
setp.neu.f32 %p77, %f1144, 0f3EE8BA2E;
|
|
selp.f32 %f1550, 0f7FFFFFFF, %f1550, %p77;
|
|
|
|
BB0_60:
|
|
add.f32 %f1146, %f229, 0f3EE8BA2E;
|
|
mov.b32 %r151, %f1146;
|
|
setp.lt.s32 %p79, %r151, 2139095040;
|
|
@%p79 bra BB0_65;
|
|
|
|
setp.gtu.f32 %p80, %f229, 0f7F800000;
|
|
@%p80 bra BB0_64;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_64:
|
|
add.f32 %f1550, %f227, 0f3EE8BA2E;
|
|
bra.uni BB0_65;
|
|
|
|
BB0_62:
|
|
setp.neu.f32 %p81, %f229, 0f7F800000;
|
|
@%p81 bra BB0_65;
|
|
|
|
selp.f32 %f1550, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_65:
|
|
mul.f32 %f1147, %f1550, 0f437F0000;
|
|
setp.eq.f32 %p82, %f227, 0f3F800000;
|
|
selp.f32 %f1148, 0f437F0000, %f1147, %p82;
|
|
cvt.rzi.u32.f32 %r152, %f1148;
|
|
cvt.u16.u32 %rs43, %r152;
|
|
mov.u16 %rs44, 255;
|
|
st.v2.u8 [%rd67], {%rs43, %rs44};
|
|
ld.global.u32 %r257, [imageEnabled];
|
|
|
|
BB0_66:
|
|
and.b32 %r153, %r257, 1;
|
|
setp.eq.b32 %p83, %r153, 1;
|
|
@!%p83 bra BB0_101;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_67:
|
|
mov.f32 %f1151, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1152, %f1151;
|
|
fma.rn.f32 %f1153, %f1152, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f241, %f1153;
|
|
abs.f32 %f242, %f1491;
|
|
setp.lt.f32 %p84, %f242, 0f00800000;
|
|
mul.f32 %f1154, %f242, 0f4B800000;
|
|
selp.f32 %f1155, 0fC3170000, 0fC2FE0000, %p84;
|
|
selp.f32 %f1156, %f1154, %f242, %p84;
|
|
mov.b32 %r154, %f1156;
|
|
and.b32 %r155, %r154, 8388607;
|
|
or.b32 %r156, %r155, 1065353216;
|
|
mov.b32 %f1157, %r156;
|
|
shr.u32 %r157, %r154, 23;
|
|
cvt.rn.f32.u32 %f1158, %r157;
|
|
add.f32 %f1159, %f1155, %f1158;
|
|
setp.gt.f32 %p85, %f1157, 0f3FB504F3;
|
|
mul.f32 %f1160, %f1157, 0f3F000000;
|
|
add.f32 %f1161, %f1159, 0f3F800000;
|
|
selp.f32 %f1162, %f1160, %f1157, %p85;
|
|
selp.f32 %f1163, %f1161, %f1159, %p85;
|
|
add.f32 %f1164, %f1162, 0fBF800000;
|
|
add.f32 %f1150, %f1162, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1149,%f1150;
|
|
// inline asm
|
|
add.f32 %f1165, %f1164, %f1164;
|
|
mul.f32 %f1166, %f1149, %f1165;
|
|
mul.f32 %f1167, %f1166, %f1166;
|
|
mov.f32 %f1168, 0f3C4CAF63;
|
|
mov.f32 %f1169, 0f3B18F0FE;
|
|
fma.rn.f32 %f1170, %f1169, %f1167, %f1168;
|
|
mov.f32 %f1171, 0f3DAAAABD;
|
|
fma.rn.f32 %f1172, %f1170, %f1167, %f1171;
|
|
mul.rn.f32 %f1173, %f1172, %f1167;
|
|
mul.rn.f32 %f1174, %f1173, %f1166;
|
|
sub.f32 %f1175, %f1164, %f1166;
|
|
neg.f32 %f1176, %f1166;
|
|
add.f32 %f1177, %f1175, %f1175;
|
|
fma.rn.f32 %f1178, %f1176, %f1164, %f1177;
|
|
mul.rn.f32 %f1179, %f1149, %f1178;
|
|
add.f32 %f1180, %f1174, %f1166;
|
|
sub.f32 %f1181, %f1166, %f1180;
|
|
add.f32 %f1182, %f1174, %f1181;
|
|
add.f32 %f1183, %f1179, %f1182;
|
|
add.f32 %f1184, %f1180, %f1183;
|
|
sub.f32 %f1185, %f1180, %f1184;
|
|
add.f32 %f1186, %f1183, %f1185;
|
|
mov.f32 %f1187, 0f3F317200;
|
|
mul.rn.f32 %f1188, %f1163, %f1187;
|
|
mov.f32 %f1189, 0f35BFBE8E;
|
|
mul.rn.f32 %f1190, %f1163, %f1189;
|
|
add.f32 %f1191, %f1188, %f1184;
|
|
sub.f32 %f1192, %f1188, %f1191;
|
|
add.f32 %f1193, %f1184, %f1192;
|
|
add.f32 %f1194, %f1186, %f1193;
|
|
add.f32 %f1195, %f1190, %f1194;
|
|
add.f32 %f1196, %f1191, %f1195;
|
|
sub.f32 %f1197, %f1191, %f1196;
|
|
add.f32 %f1198, %f1195, %f1197;
|
|
mov.f32 %f1199, 0f3EE66666;
|
|
mul.rn.f32 %f1200, %f1199, %f1196;
|
|
neg.f32 %f1201, %f1200;
|
|
fma.rn.f32 %f1202, %f1199, %f1196, %f1201;
|
|
fma.rn.f32 %f1203, %f1199, %f1198, %f1202;
|
|
mov.f32 %f1204, 0f00000000;
|
|
fma.rn.f32 %f1205, %f1204, %f1196, %f1203;
|
|
add.rn.f32 %f1206, %f1200, %f1205;
|
|
neg.f32 %f1207, %f1206;
|
|
add.rn.f32 %f1208, %f1200, %f1207;
|
|
add.rn.f32 %f1209, %f1208, %f1205;
|
|
mov.b32 %r158, %f1206;
|
|
setp.eq.s32 %p86, %r158, 1118925336;
|
|
add.s32 %r159, %r158, -1;
|
|
mov.b32 %f1210, %r159;
|
|
add.f32 %f1211, %f1209, 0f37000000;
|
|
selp.f32 %f1212, %f1210, %f1206, %p86;
|
|
selp.f32 %f243, %f1211, %f1209, %p86;
|
|
mul.f32 %f1213, %f1212, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1214, %f1213;
|
|
mov.f32 %f1215, 0fBF317200;
|
|
fma.rn.f32 %f1216, %f1214, %f1215, %f1212;
|
|
mov.f32 %f1217, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1218, %f1214, %f1217, %f1216;
|
|
mul.f32 %f1219, %f1218, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1220, %f1219;
|
|
add.f32 %f1221, %f1214, 0f00000000;
|
|
ex2.approx.f32 %f1222, %f1221;
|
|
mul.f32 %f1223, %f1220, %f1222;
|
|
setp.lt.f32 %p87, %f1212, 0fC2D20000;
|
|
selp.f32 %f1224, 0f00000000, %f1223, %p87;
|
|
setp.gt.f32 %p88, %f1212, 0f42D20000;
|
|
selp.f32 %f1551, 0f7F800000, %f1224, %p88;
|
|
setp.eq.f32 %p89, %f1551, 0f7F800000;
|
|
@%p89 bra BB0_69;
|
|
|
|
fma.rn.f32 %f1551, %f1551, %f243, %f1551;
|
|
|
|
BB0_69:
|
|
setp.lt.f32 %p90, %f1491, 0f00000000;
|
|
setp.eq.f32 %p91, %f241, 0f3F800000;
|
|
and.pred %p5, %p90, %p91;
|
|
mov.b32 %r160, %f1551;
|
|
xor.b32 %r161, %r160, -2147483648;
|
|
mov.b32 %f1225, %r161;
|
|
selp.f32 %f1553, %f1225, %f1551, %p5;
|
|
setp.eq.f32 %p92, %f1491, 0f00000000;
|
|
@%p92 bra BB0_72;
|
|
bra.uni BB0_70;
|
|
|
|
BB0_72:
|
|
add.f32 %f1228, %f1491, %f1491;
|
|
selp.f32 %f1553, %f1228, 0f00000000, %p91;
|
|
bra.uni BB0_73;
|
|
|
|
BB0_70:
|
|
setp.geu.f32 %p93, %f1491, 0f00000000;
|
|
@%p93 bra BB0_73;
|
|
|
|
cvt.rzi.f32.f32 %f1227, %f1199;
|
|
setp.neu.f32 %p94, %f1227, 0f3EE66666;
|
|
selp.f32 %f1553, 0f7FFFFFFF, %f1553, %p94;
|
|
|
|
BB0_73:
|
|
add.f32 %f1229, %f242, 0f3EE66666;
|
|
mov.b32 %r162, %f1229;
|
|
setp.lt.s32 %p96, %r162, 2139095040;
|
|
@%p96 bra BB0_78;
|
|
|
|
setp.gtu.f32 %p97, %f242, 0f7F800000;
|
|
@%p97 bra BB0_77;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_77:
|
|
add.f32 %f1553, %f1491, 0f3EE66666;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_75:
|
|
setp.neu.f32 %p98, %f242, 0f7F800000;
|
|
@%p98 bra BB0_78;
|
|
|
|
selp.f32 %f1553, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_78:
|
|
setp.eq.f32 %p99, %f1491, 0f3F800000;
|
|
selp.f32 %f254, 0f3F800000, %f1553, %p99;
|
|
abs.f32 %f255, %f1490;
|
|
setp.lt.f32 %p100, %f255, 0f00800000;
|
|
mul.f32 %f1232, %f255, 0f4B800000;
|
|
selp.f32 %f1233, 0fC3170000, 0fC2FE0000, %p100;
|
|
selp.f32 %f1234, %f1232, %f255, %p100;
|
|
mov.b32 %r163, %f1234;
|
|
and.b32 %r164, %r163, 8388607;
|
|
or.b32 %r165, %r164, 1065353216;
|
|
mov.b32 %f1235, %r165;
|
|
shr.u32 %r166, %r163, 23;
|
|
cvt.rn.f32.u32 %f1236, %r166;
|
|
add.f32 %f1237, %f1233, %f1236;
|
|
setp.gt.f32 %p101, %f1235, 0f3FB504F3;
|
|
mul.f32 %f1238, %f1235, 0f3F000000;
|
|
add.f32 %f1239, %f1237, 0f3F800000;
|
|
selp.f32 %f1240, %f1238, %f1235, %p101;
|
|
selp.f32 %f1241, %f1239, %f1237, %p101;
|
|
add.f32 %f1242, %f1240, 0fBF800000;
|
|
add.f32 %f1231, %f1240, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1230,%f1231;
|
|
// inline asm
|
|
add.f32 %f1243, %f1242, %f1242;
|
|
mul.f32 %f1244, %f1230, %f1243;
|
|
mul.f32 %f1245, %f1244, %f1244;
|
|
fma.rn.f32 %f1248, %f1169, %f1245, %f1168;
|
|
fma.rn.f32 %f1250, %f1248, %f1245, %f1171;
|
|
mul.rn.f32 %f1251, %f1250, %f1245;
|
|
mul.rn.f32 %f1252, %f1251, %f1244;
|
|
sub.f32 %f1253, %f1242, %f1244;
|
|
neg.f32 %f1254, %f1244;
|
|
add.f32 %f1255, %f1253, %f1253;
|
|
fma.rn.f32 %f1256, %f1254, %f1242, %f1255;
|
|
mul.rn.f32 %f1257, %f1230, %f1256;
|
|
add.f32 %f1258, %f1252, %f1244;
|
|
sub.f32 %f1259, %f1244, %f1258;
|
|
add.f32 %f1260, %f1252, %f1259;
|
|
add.f32 %f1261, %f1257, %f1260;
|
|
add.f32 %f1262, %f1258, %f1261;
|
|
sub.f32 %f1263, %f1258, %f1262;
|
|
add.f32 %f1264, %f1261, %f1263;
|
|
mul.rn.f32 %f1266, %f1241, %f1187;
|
|
mul.rn.f32 %f1268, %f1241, %f1189;
|
|
add.f32 %f1269, %f1266, %f1262;
|
|
sub.f32 %f1270, %f1266, %f1269;
|
|
add.f32 %f1271, %f1262, %f1270;
|
|
add.f32 %f1272, %f1264, %f1271;
|
|
add.f32 %f1273, %f1268, %f1272;
|
|
add.f32 %f1274, %f1269, %f1273;
|
|
sub.f32 %f1275, %f1269, %f1274;
|
|
add.f32 %f1276, %f1273, %f1275;
|
|
mul.rn.f32 %f1278, %f1199, %f1274;
|
|
neg.f32 %f1279, %f1278;
|
|
fma.rn.f32 %f1280, %f1199, %f1274, %f1279;
|
|
fma.rn.f32 %f1281, %f1199, %f1276, %f1280;
|
|
fma.rn.f32 %f1283, %f1204, %f1274, %f1281;
|
|
add.rn.f32 %f1284, %f1278, %f1283;
|
|
neg.f32 %f1285, %f1284;
|
|
add.rn.f32 %f1286, %f1278, %f1285;
|
|
add.rn.f32 %f1287, %f1286, %f1283;
|
|
mov.b32 %r167, %f1284;
|
|
setp.eq.s32 %p102, %r167, 1118925336;
|
|
add.s32 %r168, %r167, -1;
|
|
mov.b32 %f1288, %r168;
|
|
add.f32 %f1289, %f1287, 0f37000000;
|
|
selp.f32 %f1290, %f1288, %f1284, %p102;
|
|
selp.f32 %f256, %f1289, %f1287, %p102;
|
|
mul.f32 %f1291, %f1290, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1292, %f1291;
|
|
fma.rn.f32 %f1294, %f1292, %f1215, %f1290;
|
|
fma.rn.f32 %f1296, %f1292, %f1217, %f1294;
|
|
mul.f32 %f1297, %f1296, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1298, %f1297;
|
|
add.f32 %f1299, %f1292, 0f00000000;
|
|
ex2.approx.f32 %f1300, %f1299;
|
|
mul.f32 %f1301, %f1298, %f1300;
|
|
setp.lt.f32 %p103, %f1290, 0fC2D20000;
|
|
selp.f32 %f1302, 0f00000000, %f1301, %p103;
|
|
setp.gt.f32 %p104, %f1290, 0f42D20000;
|
|
selp.f32 %f1554, 0f7F800000, %f1302, %p104;
|
|
setp.eq.f32 %p105, %f1554, 0f7F800000;
|
|
@%p105 bra BB0_80;
|
|
|
|
fma.rn.f32 %f1554, %f1554, %f256, %f1554;
|
|
|
|
BB0_80:
|
|
setp.lt.f32 %p106, %f1490, 0f00000000;
|
|
and.pred %p6, %p106, %p91;
|
|
mov.b32 %r169, %f1554;
|
|
xor.b32 %r170, %r169, -2147483648;
|
|
mov.b32 %f1303, %r170;
|
|
selp.f32 %f1556, %f1303, %f1554, %p6;
|
|
setp.eq.f32 %p108, %f1490, 0f00000000;
|
|
@%p108 bra BB0_83;
|
|
bra.uni BB0_81;
|
|
|
|
BB0_83:
|
|
add.f32 %f1306, %f1490, %f1490;
|
|
selp.f32 %f1556, %f1306, 0f00000000, %p91;
|
|
bra.uni BB0_84;
|
|
|
|
BB0_81:
|
|
setp.geu.f32 %p109, %f1490, 0f00000000;
|
|
@%p109 bra BB0_84;
|
|
|
|
cvt.rzi.f32.f32 %f1305, %f1199;
|
|
setp.neu.f32 %p110, %f1305, 0f3EE66666;
|
|
selp.f32 %f1556, 0f7FFFFFFF, %f1556, %p110;
|
|
|
|
BB0_84:
|
|
add.f32 %f1307, %f255, 0f3EE66666;
|
|
mov.b32 %r171, %f1307;
|
|
setp.lt.s32 %p112, %r171, 2139095040;
|
|
@%p112 bra BB0_89;
|
|
|
|
setp.gtu.f32 %p113, %f255, 0f7F800000;
|
|
@%p113 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f1556, %f1490, 0f3EE66666;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.neu.f32 %p114, %f255, 0f7F800000;
|
|
@%p114 bra BB0_89;
|
|
|
|
selp.f32 %f1556, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_89:
|
|
setp.eq.f32 %p115, %f1490, 0f3F800000;
|
|
selp.f32 %f267, 0f3F800000, %f1556, %p115;
|
|
abs.f32 %f268, %f1489;
|
|
setp.lt.f32 %p116, %f268, 0f00800000;
|
|
mul.f32 %f1310, %f268, 0f4B800000;
|
|
selp.f32 %f1311, 0fC3170000, 0fC2FE0000, %p116;
|
|
selp.f32 %f1312, %f1310, %f268, %p116;
|
|
mov.b32 %r172, %f1312;
|
|
and.b32 %r173, %r172, 8388607;
|
|
or.b32 %r174, %r173, 1065353216;
|
|
mov.b32 %f1313, %r174;
|
|
shr.u32 %r175, %r172, 23;
|
|
cvt.rn.f32.u32 %f1314, %r175;
|
|
add.f32 %f1315, %f1311, %f1314;
|
|
setp.gt.f32 %p117, %f1313, 0f3FB504F3;
|
|
mul.f32 %f1316, %f1313, 0f3F000000;
|
|
add.f32 %f1317, %f1315, 0f3F800000;
|
|
selp.f32 %f1318, %f1316, %f1313, %p117;
|
|
selp.f32 %f1319, %f1317, %f1315, %p117;
|
|
add.f32 %f1320, %f1318, 0fBF800000;
|
|
add.f32 %f1309, %f1318, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1308,%f1309;
|
|
// inline asm
|
|
add.f32 %f1321, %f1320, %f1320;
|
|
mul.f32 %f1322, %f1308, %f1321;
|
|
mul.f32 %f1323, %f1322, %f1322;
|
|
fma.rn.f32 %f1326, %f1169, %f1323, %f1168;
|
|
fma.rn.f32 %f1328, %f1326, %f1323, %f1171;
|
|
mul.rn.f32 %f1329, %f1328, %f1323;
|
|
mul.rn.f32 %f1330, %f1329, %f1322;
|
|
sub.f32 %f1331, %f1320, %f1322;
|
|
neg.f32 %f1332, %f1322;
|
|
add.f32 %f1333, %f1331, %f1331;
|
|
fma.rn.f32 %f1334, %f1332, %f1320, %f1333;
|
|
mul.rn.f32 %f1335, %f1308, %f1334;
|
|
add.f32 %f1336, %f1330, %f1322;
|
|
sub.f32 %f1337, %f1322, %f1336;
|
|
add.f32 %f1338, %f1330, %f1337;
|
|
add.f32 %f1339, %f1335, %f1338;
|
|
add.f32 %f1340, %f1336, %f1339;
|
|
sub.f32 %f1341, %f1336, %f1340;
|
|
add.f32 %f1342, %f1339, %f1341;
|
|
mul.rn.f32 %f1344, %f1319, %f1187;
|
|
mul.rn.f32 %f1346, %f1319, %f1189;
|
|
add.f32 %f1347, %f1344, %f1340;
|
|
sub.f32 %f1348, %f1344, %f1347;
|
|
add.f32 %f1349, %f1340, %f1348;
|
|
add.f32 %f1350, %f1342, %f1349;
|
|
add.f32 %f1351, %f1346, %f1350;
|
|
add.f32 %f1352, %f1347, %f1351;
|
|
sub.f32 %f1353, %f1347, %f1352;
|
|
add.f32 %f1354, %f1351, %f1353;
|
|
mul.rn.f32 %f1356, %f1199, %f1352;
|
|
neg.f32 %f1357, %f1356;
|
|
fma.rn.f32 %f1358, %f1199, %f1352, %f1357;
|
|
fma.rn.f32 %f1359, %f1199, %f1354, %f1358;
|
|
fma.rn.f32 %f1361, %f1204, %f1352, %f1359;
|
|
add.rn.f32 %f1362, %f1356, %f1361;
|
|
neg.f32 %f1363, %f1362;
|
|
add.rn.f32 %f1364, %f1356, %f1363;
|
|
add.rn.f32 %f1365, %f1364, %f1361;
|
|
mov.b32 %r176, %f1362;
|
|
setp.eq.s32 %p118, %r176, 1118925336;
|
|
add.s32 %r177, %r176, -1;
|
|
mov.b32 %f1366, %r177;
|
|
add.f32 %f1367, %f1365, 0f37000000;
|
|
selp.f32 %f1368, %f1366, %f1362, %p118;
|
|
selp.f32 %f269, %f1367, %f1365, %p118;
|
|
mul.f32 %f1369, %f1368, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1370, %f1369;
|
|
fma.rn.f32 %f1372, %f1370, %f1215, %f1368;
|
|
fma.rn.f32 %f1374, %f1370, %f1217, %f1372;
|
|
mul.f32 %f1375, %f1374, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1376, %f1375;
|
|
add.f32 %f1377, %f1370, 0f00000000;
|
|
ex2.approx.f32 %f1378, %f1377;
|
|
mul.f32 %f1379, %f1376, %f1378;
|
|
setp.lt.f32 %p119, %f1368, 0fC2D20000;
|
|
selp.f32 %f1380, 0f00000000, %f1379, %p119;
|
|
setp.gt.f32 %p120, %f1368, 0f42D20000;
|
|
selp.f32 %f1557, 0f7F800000, %f1380, %p120;
|
|
setp.eq.f32 %p121, %f1557, 0f7F800000;
|
|
@%p121 bra BB0_91;
|
|
|
|
fma.rn.f32 %f1557, %f1557, %f269, %f1557;
|
|
|
|
BB0_91:
|
|
setp.lt.f32 %p122, %f1489, 0f00000000;
|
|
and.pred %p7, %p122, %p91;
|
|
mov.b32 %r178, %f1557;
|
|
xor.b32 %r179, %r178, -2147483648;
|
|
mov.b32 %f1381, %r179;
|
|
selp.f32 %f1559, %f1381, %f1557, %p7;
|
|
setp.eq.f32 %p124, %f1489, 0f00000000;
|
|
@%p124 bra BB0_94;
|
|
bra.uni BB0_92;
|
|
|
|
BB0_94:
|
|
add.f32 %f1384, %f1489, %f1489;
|
|
selp.f32 %f1559, %f1384, 0f00000000, %p91;
|
|
bra.uni BB0_95;
|
|
|
|
BB0_92:
|
|
setp.geu.f32 %p125, %f1489, 0f00000000;
|
|
@%p125 bra BB0_95;
|
|
|
|
cvt.rzi.f32.f32 %f1383, %f1199;
|
|
setp.neu.f32 %p126, %f1383, 0f3EE66666;
|
|
selp.f32 %f1559, 0f7FFFFFFF, %f1559, %p126;
|
|
|
|
BB0_95:
|
|
add.f32 %f1385, %f268, 0f3EE66666;
|
|
mov.b32 %r180, %f1385;
|
|
setp.lt.s32 %p128, %r180, 2139095040;
|
|
@%p128 bra BB0_100;
|
|
|
|
setp.gtu.f32 %p129, %f268, 0f7F800000;
|
|
@%p129 bra BB0_99;
|
|
bra.uni BB0_97;
|
|
|
|
BB0_99:
|
|
add.f32 %f1559, %f1489, 0f3EE66666;
|
|
bra.uni BB0_100;
|
|
|
|
BB0_97:
|
|
setp.neu.f32 %p130, %f268, 0f7F800000;
|
|
@%p130 bra BB0_100;
|
|
|
|
selp.f32 %f1559, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_100:
|
|
setp.eq.f32 %p131, %f1489, 0f3F800000;
|
|
selp.f32 %f1386, 0f3F800000, %f1559, %p131;
|
|
cvt.u64.u32 %rd77, %r3;
|
|
cvt.u64.u32 %rd76, %r2;
|
|
mov.u64 %rd80, image;
|
|
cvta.global.u64 %rd75, %rd80;
|
|
// inline asm
|
|
call (%rd74), _rt_buffer_get_64, (%rd75, %r34, %r35, %rd76, %rd77, %rd16, %rd16);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1387, %f1386;
|
|
mul.f32 %f1388, %f1387, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r183, %f1388;
|
|
cvt.sat.f32.f32 %f1389, %f267;
|
|
mul.f32 %f1390, %f1389, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r184, %f1390;
|
|
cvt.sat.f32.f32 %f1391, %f254;
|
|
mul.f32 %f1392, %f1391, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r185, %f1392;
|
|
cvt.u16.u32 %rs45, %r183;
|
|
cvt.u16.u32 %rs46, %r185;
|
|
cvt.u16.u32 %rs47, %r184;
|
|
mov.u16 %rs48, 255;
|
|
st.v4.u8 [%rd74], {%rs45, %rs47, %rs46, %rs48};
|
|
ld.global.u32 %r257, [imageEnabled];
|
|
|
|
BB0_101:
|
|
cvt.u64.u32 %rd7, %r2;
|
|
cvt.u64.u32 %rd8, %r3;
|
|
and.b32 %r186, %r257, 4;
|
|
setp.eq.s32 %p132, %r186, 0;
|
|
@%p132 bra BB0_105;
|
|
|
|
ld.global.u32 %r187, [additive];
|
|
setp.eq.s32 %p133, %r187, 0;
|
|
mov.f32 %f1393, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1393;}
|
|
|
|
// inline asm
|
|
@%p133 bra BB0_104;
|
|
|
|
mov.u64 %rd93, image_HDR;
|
|
cvta.global.u64 %rd82, %rd93;
|
|
mov.u32 %r191, 8;
|
|
// inline asm
|
|
call (%rd81), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs56, %rs57, %rs58, %rs59}, [%rd81];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1394, %rs56;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1395, %rs57;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1396, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd87), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1397, %f1491, %f1394;
|
|
add.f32 %f1398, %f1490, %f1395;
|
|
add.f32 %f1399, %f1489, %f1396;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1399;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f1398;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1397;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd87], {%rs53, %rs54, %rs55, %rs49};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd100, image_HDR;
|
|
cvta.global.u64 %rd95, %rd100;
|
|
mov.u32 %r193, 8;
|
|
// inline asm
|
|
call (%rd94), _rt_buffer_get_64, (%rd95, %r34, %r193, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f1489;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs61, %f1490;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1491;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd94], {%rs60, %rs61, %rs62, %rs49};
|
|
|
|
BB0_105:
|
|
ld.global.u32 %r194, [additive];
|
|
setp.eq.s32 %p134, %r194, 0;
|
|
mov.f32 %f1403, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f1403;}
|
|
|
|
// inline asm
|
|
@%p134 bra BB0_107;
|
|
|
|
mov.u64 %rd113, image_RNM0;
|
|
cvta.global.u64 %rd102, %rd113;
|
|
mov.u32 %r198, 8;
|
|
// inline asm
|
|
call (%rd101), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs70, %rs71, %rs72, %rs73}, [%rd101];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1404, %rs70;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1405, %rs71;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1406, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd107), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1407, %f1488, %f1404;
|
|
add.f32 %f1408, %f1487, %f1405;
|
|
add.f32 %f1409, %f1486, %f1406;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1409;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs68, %f1408;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f1407;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd107], {%rs67, %rs68, %rs69, %rs63};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd120, image_RNM0;
|
|
cvta.global.u64 %rd115, %rd120;
|
|
mov.u32 %r200, 8;
|
|
// inline asm
|
|
call (%rd114), _rt_buffer_get_64, (%rd115, %r34, %r200, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f1486;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs75, %f1487;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1488;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd114], {%rs74, %rs75, %rs76, %rs63};
|
|
|
|
BB0_108:
|
|
ld.global.u32 %r201, [additive];
|
|
setp.eq.s32 %p135, %r201, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f1403;}
|
|
|
|
// inline asm
|
|
@%p135 bra BB0_110;
|
|
|
|
mov.u64 %rd133, image_RNM1;
|
|
cvta.global.u64 %rd122, %rd133;
|
|
mov.u32 %r205, 8;
|
|
// inline asm
|
|
call (%rd121), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd121];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1414, %rs84;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1415, %rs85;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1416, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd127), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1417, %f1485, %f1414;
|
|
add.f32 %f1418, %f1484, %f1415;
|
|
add.f32 %f1419, %f1483, %f1416;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1419;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f1418;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f1417;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd127], {%rs81, %rs82, %rs83, %rs77};
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bra.uni BB0_111;
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|
|
|
BB0_110:
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|
mov.u64 %rd140, image_RNM1;
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|
cvta.global.u64 %rd135, %rd140;
|
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mov.u32 %r207, 8;
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|
// inline asm
|
|
call (%rd134), _rt_buffer_get_64, (%rd135, %r34, %r207, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f1483;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1484;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1485;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd134], {%rs88, %rs89, %rs90, %rs77};
|
|
|
|
BB0_111:
|
|
ld.global.u32 %r208, [additive];
|
|
setp.eq.s32 %p136, %r208, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f1403;}
|
|
|
|
// inline asm
|
|
@%p136 bra BB0_113;
|
|
|
|
mov.u64 %rd153, image_RNM2;
|
|
cvta.global.u64 %rd142, %rd153;
|
|
mov.u32 %r212, 8;
|
|
// inline asm
|
|
call (%rd141), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs98, %rs99, %rs100, %rs101}, [%rd141];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1424, %rs98;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1425, %rs99;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1426, %rs100;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd147), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1427, %f1482, %f1424;
|
|
add.f32 %f1428, %f1481, %f1425;
|
|
add.f32 %f1429, %f1480, %f1426;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f1429;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f1428;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f1427;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd147], {%rs95, %rs96, %rs97, %rs91};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_113:
|
|
mov.u64 %rd160, image_RNM2;
|
|
cvta.global.u64 %rd155, %rd160;
|
|
mov.u32 %r214, 8;
|
|
// inline asm
|
|
call (%rd154), _rt_buffer_get_64, (%rd155, %r34, %r214, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1480;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1481;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1482;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd154], {%rs102, %rs103, %rs104, %rs91};
|
|
|
|
BB0_131:
|
|
ret;
|
|
}
|
|
|
|
|